AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

AT32F435/437 Firmwary Library 2.0.9
AT32F435/437 Peripherals Driver Library
  • AT32F435_437_Firmware_Library_V2.0.9
  • project
  • at_start_f435
  • examples
  • usb_device
  • otg1_host_otg2_device_demo
  • src
project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • project
  • at_start_f435
  • examples
  • usb_device
  • otg1_host_otg2_device_demo
  • src
Functions
project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • usb_device
  • otg1_host_otg2_device_demo
  • src
project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • otg1_host_otg2_device_demo
  • src
Functions | Variables
project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "usbh_int.h"
#include "custom_hid_class.h"
#include "custom_hid_desc.h"
#include "usbh_hid_class.h"
#include "usbh_user.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | button_exint_init (void)
configure button exint More...
void | button_isr (void)
button handler function More...
int | main (void)
main function. More...
void | EXINT0_IRQHandler (void)
exint0 interrupt handler More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | OTG2_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
otg_core_type otg2_core_struct
uint8_t | report_buf [USBD_CUSTOM_IN_MAXPACKET_SIZE]
__IO uint8_t | button_press = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • usb_device
  • otg1_host_otg2_device_demo
  • src
project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "usbh_int.h"
33#include "custom_hid_class.h"
34#include "custom_hid_desc.h"
35#include "usbh_hid_class.h"
36#include "usbh_user.h"
37
46/* usb global struct define */
47 otg_core_type otg_core_struct;
48 otg_core_type otg2_core_struct;
49uint8_t report_buf[USBD_CUSTOM_IN_MAXPACKET_SIZE];
50__IO uint8_t button_press = 0;
51
52void usb_clock48m_select(usb_clk48_s clk_s);
53void usb_gpio_config(void);
54void usb_low_power_wakeup_config(void);
55void button_exint_init(void);
56void button_isr(void);
57
63int main(void)
64{
65 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
66
67 system_clock_config();
68
69 at32_board_init();
70
71 button_exint_init();
72
73 /* usb gpio config */
74 usb_gpio_config();
75
76 uart_print_init(115200);
77
78#ifdef USB_LOW_POWER_WAKUP
79 usb_low_power_wakeup_config();
80#endif
81
82 /* enable otgfs clock */
83 crm_periph_clock_enable(OTG_CLOCK, TRUE);
84 crm_periph_clock_enable(OTG2_CLOCK, TRUE);
85
86 /* select usb 48m clcok source */
87 usb_clock48m_select(USB_CLK_HEXT);
88
89 /* enable otgfs irq */
90 nvic_irq_enable(OTG_IRQ, 0, 0);
91 nvic_irq_enable(OTG2_IRQ, 0, 0);
92
93 /* init otg1 device */
94 usbh_init(&otg_core_struct,
95 USB_FULL_SPEED_CORE_ID,
96 USB_ID,
97 &uhost_hid_class_handler,
98 &usbh_user_handle);
99
100 /* init otg2 device */
101 usbd_init(&otg2_core_struct,
102 USB_FULL_SPEED_CORE_ID,
103 USB2_ID,
104 &custom_hid_class_handler,
105 &custom_hid_desc_handler);
106 while(1)
107 {
108 usbh_loop_handler(&otg_core_struct.host);
109 /* otg2 custom hid */
110 if(button_press == 1)
111 {
112 report_buf[0] = HID_REPORT_ID_5;
113 report_buf[1] = (~report_buf[1]) & 0x1;
114 custom_hid_class_send_report(&otg2_core_struct.dev, report_buf, USBD_CUSTOM_IN_MAXPACKET_SIZE);
115 button_press = 0;
116 }
117 }
118}
119
125void button_exint_init(void)
126{
127 exint_init_type exint_init_struct;
128
129 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
130 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
131
132 exint_default_para_init(&exint_init_struct);
133 exint_init_struct.line_enable = TRUE;
134 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
135 exint_init_struct.line_select = EXINT_LINE_0;
136 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
137 exint_init(&exint_init_struct);
138
139 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
140 nvic_irq_enable(EXINT0_IRQn, 0, 0);
141}
142
148void button_isr(void)
149{
150 /* delay 5ms */
151 delay_ms(5);
152
153 /* clear interrupt pending bit */
154 exint_flag_clear(EXINT_LINE_0);
155
156 button_press = 1;
157}
158
164void EXINT0_IRQHandler(void)
165{
166 button_isr();
167}
168
174void usb_clock48m_select(usb_clk48_s clk_s)
175{
176 if(clk_s == USB_CLK_HICK)
177 {
178 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
179
180 /* enable the acc calibration ready interrupt */
181 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
182
183 /* update the c1\c2\c3 value */
184 acc_write_c1(7980);
185 acc_write_c2(8000);
186 acc_write_c3(8020);
187
188 acc_sof_select(ACC_SOF_OTG2);
189
190 /* open acc calibration */
191 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
192 }
193 else
194 {
195 switch(system_core_clock)
196 {
197 /* 48MHz */
198 case 48000000:
199 crm_usb_clock_div_set(CRM_USB_DIV_1);
200 break;
201
202 /* 72MHz */
203 case 72000000:
204 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
205 break;
206
207 /* 96MHz */
208 case 96000000:
209 crm_usb_clock_div_set(CRM_USB_DIV_2);
210 break;
211
212 /* 120MHz */
213 case 120000000:
214 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
215 break;
216
217 /* 144MHz */
218 case 144000000:
219 crm_usb_clock_div_set(CRM_USB_DIV_3);
220 break;
221
222 /* 168MHz */
223 case 168000000:
224 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
225 break;
226
227 /* 192MHz */
228 case 192000000:
229 crm_usb_clock_div_set(CRM_USB_DIV_4);
230 break;
231
232 /* 216MHz */
233 case 216000000:
234 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
235 break;
236
237 /* 240MHz */
238 case 240000000:
239 crm_usb_clock_div_set(CRM_USB_DIV_5);
240 break;
241
242 /* 264MHz */
243 case 264000000:
244 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
245 break;
246
247 /* 288MHz */
248 case 288000000:
249 crm_usb_clock_div_set(CRM_USB_DIV_6);
250 break;
251
252 default:
253 break;
254
255 }
256 }
257}
258
264void usb_gpio_config(void)
265{
266 gpio_init_type gpio_init_struct;
267
268 /* otg1 gpio config */
269 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
270 gpio_default_para_init(&gpio_init_struct);
271
272 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
273 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
274 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
275 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
276
277 /* dp and dm */
278 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
279 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
280
281 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
282 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
283
284#ifdef USB_SOF_OUTPUT_ENABLE
285 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
286 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
287 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
288 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
289#endif
290
291 /* otgfs use vbus pin */
292#ifndef USB_VBUS_IGNORE
293 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
294 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
295 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
296 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
297#endif
298
299#ifdef USBH_5V_POWER_SWITCH
300 crm_periph_clock_enable(OTG_PIN_POWER_SWITCH_CLOCK, TRUE);
301 gpio_bits_set(OTG_PIN_POWER_SWITCH_GPIO, OTG_PIN_POWER_SWITCH);
302
303 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
304 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
305 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
306 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
307 gpio_init_struct.gpio_pins = OTG_PIN_POWER_SWITCH;
308 gpio_init(OTG_PIN_POWER_SWITCH_GPIO, &gpio_init_struct);
309#endif
310
311 /* otg2 gpio config */
312 crm_periph_clock_enable(OTG2_PIN_GPIO_CLOCK, TRUE);
313 gpio_default_para_init(&gpio_init_struct);
314
315 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
316 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
317 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
318 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
319
320 /* dp and dm */
321 gpio_init_struct.gpio_pins = OTG2_PIN_DP | OTG2_PIN_DM;
322 gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
323
324 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DP_SOURCE, OTG2_PIN_MUX);
325 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DM_SOURCE, OTG2_PIN_MUX);
326
327#ifdef USB_SOF_OUTPUT_ENABLE
328 crm_periph_clock_enable(OTG2_PIN_SOF_GPIO_CLOCK, TRUE);
329 gpio_init_struct.gpio_pins = OTG2_PIN_SOF;
330 gpio_init(OTG2_PIN_SOF_GPIO, &gpio_init_struct);
331 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_SOF_SOURCE, OTG2_PIN_MUX);
332#endif
333
334 /* otgfs use vbus pin */
335#ifndef USB_VBUS_IGNORE
336 gpio_init_struct.gpio_pins = OTG2_PIN_VBUS;
337 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
338 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_VBUS_SOURCE, OTG2_PIN_MUX);
339 gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
340#endif
341
342
343}
344#ifdef USB_LOW_POWER_WAKUP
350void usb_low_power_wakeup_config(void)
351{
352 exint_init_type exint_init_struct;
353
354 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
355 exint_default_para_init(&exint_init_struct);
356
357 /*otg1*/
358 exint_init_struct.line_enable = TRUE;
359 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
360 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
361 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
362 exint_init(&exint_init_struct);
363
364 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
365
366 /*otg2*/
367 exint_init_struct.line_enable = TRUE;
368 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
369 exint_init_struct.line_select = OTG2_WKUP_EXINT_LINE;
370 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
371 exint_init(&exint_init_struct);
372
373 nvic_irq_enable(OTG2_WKUP_IRQ, 0, 0);
374}
375
381void OTG_WKUP_HANDLER(void)
382{
383 exint_flag_clear(OTG_WKUP_EXINT_LINE);
384}
385
391void OTG2_WKUP_HANDLER(void)
392{
393 exint_flag_clear(OTG2_WKUP_EXINT_LINE);
394}
395
396#endif
397
403void OTG_IRQ_HANDLER(void)
404{
405 usbh_irq_handler(&otg_core_struct);
406}
407
413void OTG2_IRQ_HANDLER(void)
414{
415 usbd_irq_handler(&otg2_core_struct);
416}
417
423void usb_delay_ms(uint32_t ms)
424{
425 /* user can define self delay function */
426 delay_ms(ms);
427}
428
434void usb_delay_us(uint32_t us)
435{
436 delay_us(us);
437}
438
at32f435_437_board.h
usbh_user.h
usb host user header file
custom_hid_class.h
usb hid header file
custom_hid_desc.h
usb custom hid descriptor header file
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
OTG_PIN_POWER_SWITCH_GPIO
#define OTG_PIN_POWER_SWITCH_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:91
OTG2_PIN_DP_SOURCE
#define OTG2_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:108
OTG_PIN_POWER_SWITCH
#define OTG_PIN_POWER_SWITCH
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:93
OTG2_IRQ
#define OTG2_IRQ
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:98
report_buf
uint8_t report_buf[USBD_CUSTOM_IN_MAXPACKET_SIZE]
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:49
OTG2_IRQ_HANDLER
void OTG2_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:413
OTG2_PIN_VBUS_SOURCE
#define OTG2_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:114
OTG2_PIN_SOF_SOURCE
#define OTG2_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:122
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:125
button_press
__IO uint8_t button_press
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:50
otg2_core_struct
otg_core_type otg2_core_struct
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:48
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:174
OTG2_PIN_GPIO_CLOCK
#define OTG2_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:105
OTG2_WKUP_IRQ
#define OTG2_WKUP_IRQ
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:100
main
int main(void)
main function.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:63
OTG2_PIN_GPIO
#define OTG2_PIN_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:104
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
OTG_PIN_POWER_SWITCH_CLOCK
#define OTG_PIN_POWER_SWITCH_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:92
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:264
usbh_user_handle
usbh_user_handler_type usbh_user_handle
Definition: at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c:50
OTG2_PIN_DM
#define OTG2_PIN_DM
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:110
OTG_IRQ_HANDLER
void OTG_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:403
OTG2_PIN_DP
#define OTG2_PIN_DP
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:107
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:164
OTG2_PIN_VBUS
#define OTG2_PIN_VBUS
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:113
USB2_ID
#define USB2_ID
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:96
OTG2_PIN_SOF_GPIO_CLOCK
#define OTG2_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:120
button_isr
void button_isr(void)
button handler function
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:148
OTG2_PIN_SOF_GPIO
#define OTG2_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:119
OTG2_CLOCK
#define OTG2_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:97
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:47
OTG2_PIN_DM_SOURCE
#define OTG2_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:111
OTG2_WKUP_HANDLER
#define OTG2_WKUP_HANDLER
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:101
OTG2_WKUP_EXINT_LINE
#define OTG2_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:102
OTG2_PIN_SOF
#define OTG2_PIN_SOF
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:121
OTG2_PIN_MUX
#define OTG2_PIN_MUX
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:124
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
HID_REPORT_ID_5
#define HID_REPORT_ID_5
Definition: audio_hid_desc.h:226
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
USBD_CUSTOM_IN_MAXPACKET_SIZE
#define USBD_CUSTOM_IN_MAXPACKET_SIZE
usb custom hid in and out max packet size define
Definition: custom_hid_class.h:59
custom_hid_class_send_report
usb_sts_type custom_hid_class_send_report(void *udev, uint8_t *report, uint16_t len)
usb device class send report
Definition: custom_hid_class.c:316
custom_hid_class_handler
usbd_class_handler custom_hid_class_handler
Definition: custom_hid_class.c:57
custom_hid_desc_handler
usbd_desc_handler custom_hid_desc_handler
custom hid device descriptor handler structure
Definition: custom_hid_desc.c:62
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
usbh_loop_handler
usb_sts_type usbh_loop_handler(usbh_core_type *uhost)
usb host enum loop handler
Definition: usbh_core.c:1142
uhost_hid_class_handler
usbh_class_handler_type uhost_hid_class_handler
Definition: usbh_hid_class.c:52
usbh_irq_handler
void usbh_irq_handler(otg_core_type *hdev)
usb host interrupt handler
Definition: usbh_int.c:47
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
usbh_hid_class.h
usb host hid class header file
usbh_int.h
usb header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • usb_device
  • printer
  • inc
project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • usb_device
  • printer
  • inc
project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • usb_device
  • printer
  • inc
project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • at_start_f435
  • examples
  • usb_device
  • printer
  • inc
project/at_start_f435/examples/usb_device/printer/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
51#define USE_OTG_DEVICE_MODE
52
56/* #define USE_OTG_HOST_MODE */
57
62/* use otgfs1 */
63#define OTG_USB_ID 1
64
65/* use otgfs2 */
66/* #define OTG_USB_ID 2 */
67
68#if (OTG_USB_ID == 1)
69#define USB_ID 0
70#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
71#define OTG_IRQ OTGFS1_IRQn
72#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
73#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
74#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
75#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
76
77#define OTG_PIN_GPIO GPIOA
78#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
79
80#define OTG_PIN_DP GPIO_PINS_12
81#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
82
83#define OTG_PIN_DM GPIO_PINS_11
84#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
85
86#define OTG_PIN_VBUS GPIO_PINS_9
87#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
88
89#define OTG_PIN_ID GPIO_PINS_10
90#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
91
92#define OTG_PIN_SOF_GPIO GPIOA
93#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
94#define OTG_PIN_SOF GPIO_PINS_8
95#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
96
97#define OTG_PIN_MUX GPIO_MUX_10
98#endif
99
100#if (OTG_USB_ID == 2)
101#define USB_ID 1
102#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
103#define OTG_IRQ OTGFS2_IRQn
104#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
105#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
106#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
107#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
108
109#define OTG_PIN_GPIO GPIOB
110#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
111
112#define OTG_PIN_DP GPIO_PINS_15
113#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
114
115#define OTG_PIN_DM GPIO_PINS_14
116#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
117
118#define OTG_PIN_VBUS GPIO_PINS_13
119#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
120
121#define OTG_PIN_ID GPIO_PINS_12
122#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
123
124#define OTG_PIN_SOF_GPIO GPIOA
125#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
126#define OTG_PIN_SOF GPIO_PINS_4
127#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
128
129#define OTG_PIN_MUX GPIO_MUX_12
130#endif
131
135#ifdef USE_OTG_DEVICE_MODE
139/* otg1 device fifo */
140#define USBD_RX_SIZE 128
141#define USBD_EP0_TX_SIZE 24
142#define USBD_EP1_TX_SIZE 20
143#define USBD_EP2_TX_SIZE 20
144#define USBD_EP3_TX_SIZE 20
145#define USBD_EP4_TX_SIZE 20
146#define USBD_EP5_TX_SIZE 20
147#define USBD_EP6_TX_SIZE 20
148#define USBD_EP7_TX_SIZE 20
149
150/* otg2 device fifo */
151#define USBD2_RX_SIZE 128
152#define USBD2_EP0_TX_SIZE 24
153#define USBD2_EP1_TX_SIZE 20
154#define USBD2_EP2_TX_SIZE 20
155#define USBD2_EP3_TX_SIZE 20
156#define USBD2_EP4_TX_SIZE 20
157#define USBD2_EP5_TX_SIZE 20
158#define USBD2_EP6_TX_SIZE 20
159#define USBD2_EP7_TX_SIZE 20
160
164#ifndef USB_EPT_MAX_NUM
165#define USB_EPT_MAX_NUM 8
166#endif
167#endif
168
172#ifdef USE_OTG_HOST_MODE
173#ifndef USB_HOST_CHANNEL_NUM
174#define USB_HOST_CHANNEL_NUM 16
175#endif
176
180/* otg1 host fifo */
181#define USBH_RX_FIFO_SIZE 128
182#define USBH_NP_TX_FIFO_SIZE 96
183#define USBH_P_TX_FIFO_SIZE 96
184
185/* otg2 host fifo */
186#define USBH2_RX_FIFO_SIZE 128
187#define USBH2_NP_TX_FIFO_SIZE 96
188#define USBH2_P_TX_FIFO_SIZE 96
189#endif
190
194/* #define USB_SOF_OUTPUT_ENABLE */
195
199#define USB_VBUS_IGNORE
200
204/* #define USB_LOW_POWER_WAKUP */
205
206void usb_delay_ms(uint32_t ms);
207void usb_delay_us(uint32_t us);
208
216#ifdef __cplusplus
217}
218#endif
219
220#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/printer/src/main.c:277
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/printer/src/main.c:288


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • printer
  • src
Functions
project/at_start_f435/examples/usb_device/printer/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/printer/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • usb_device
  • printer
  • src
project/at_start_f435/examples/usb_device/printer/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/usb_device/printer/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • printer
  • src
Functions
project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • usb_device
  • printer
  • src
project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • printer
  • src
Functions | Variables
project/at_start_f435/examples/usb_device/printer/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "printer_class.h"
#include "printer_desc.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/printer/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • usb_device
  • printer
  • src
project/at_start_f435/examples/usb_device/printer/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "printer_class.h"
33#include "printer_desc.h"
34
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46void usb_clock48m_select(usb_clk48_s clk_s);
47void usb_gpio_config(void);
48void usb_low_power_wakeup_config(void);
49
55int main(void)
56{
57 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
58
59 system_clock_config();
60
61 at32_board_init();
62
63 /* usb gpio config */
64 usb_gpio_config();
65
66#ifdef USB_LOW_POWER_WAKUP
67 usb_low_power_wakeup_config();
68#endif
69
70 /* enable otgfs clock */
71 crm_periph_clock_enable(OTG_CLOCK, TRUE);
72
73 /* select usb 48m clcok source */
74 usb_clock48m_select(USB_CLK_HEXT);
75
76 /* enable otgfs irq */
77 nvic_irq_enable(OTG_IRQ, 0, 0);
78
79 /* init usb */
80 usbd_init(&otg_core_struct,
81 USB_FULL_SPEED_CORE_ID,
82 USB_ID,
83 &printer_class_handler,
84 &printer_desc_handler);
85
86 while(1)
87 {
88 /* get usb printer receive data */
89 /* usb_printer_get_rxdata(&otg_core_struct.dev, usb_buffer); */
90
91 /* user code ...*/
92 }
93}
94
100void usb_clock48m_select(usb_clk48_s clk_s)
101{
102 if(clk_s == USB_CLK_HICK)
103 {
104 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
105
106 /* enable the acc calibration ready interrupt */
107 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
108
109 /* update the c1\c2\c3 value */
110 acc_write_c1(7980);
111 acc_write_c2(8000);
112 acc_write_c3(8020);
113#if (USB_ID == 0)
114 acc_sof_select(ACC_SOF_OTG1);
115#else
116 acc_sof_select(ACC_SOF_OTG2);
117#endif
118 /* open acc calibration */
119 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
120 }
121 else
122 {
123 switch(system_core_clock)
124 {
125 /* 48MHz */
126 case 48000000:
127 crm_usb_clock_div_set(CRM_USB_DIV_1);
128 break;
129
130 /* 72MHz */
131 case 72000000:
132 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
133 break;
134
135 /* 96MHz */
136 case 96000000:
137 crm_usb_clock_div_set(CRM_USB_DIV_2);
138 break;
139
140 /* 120MHz */
141 case 120000000:
142 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
143 break;
144
145 /* 144MHz */
146 case 144000000:
147 crm_usb_clock_div_set(CRM_USB_DIV_3);
148 break;
149
150 /* 168MHz */
151 case 168000000:
152 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
153 break;
154
155 /* 192MHz */
156 case 192000000:
157 crm_usb_clock_div_set(CRM_USB_DIV_4);
158 break;
159
160 /* 216MHz */
161 case 216000000:
162 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
163 break;
164
165 /* 240MHz */
166 case 240000000:
167 crm_usb_clock_div_set(CRM_USB_DIV_5);
168 break;
169
170 /* 264MHz */
171 case 264000000:
172 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
173 break;
174
175 /* 288MHz */
176 case 288000000:
177 crm_usb_clock_div_set(CRM_USB_DIV_6);
178 break;
179
180 default:
181 break;
182
183 }
184 }
185}
186
192void usb_gpio_config(void)
193{
194 gpio_init_type gpio_init_struct;
195
196 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
197 gpio_default_para_init(&gpio_init_struct);
198
199 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
200 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
201 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
202 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
203
204 /* dp and dm */
205 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
206 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
207
208 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
209 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
210
211#ifdef USB_SOF_OUTPUT_ENABLE
212 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
213 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
214 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
215 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
216#endif
217
218 /* otgfs use vbus pin */
219#ifndef USB_VBUS_IGNORE
220 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
221 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
222 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
223 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
224#endif
225
226
227}
228#ifdef USB_LOW_POWER_WAKUP
234void usb_low_power_wakeup_config(void)
235{
236 exint_init_type exint_init_struct;
237
238 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
239 exint_default_para_init(&exint_init_struct);
240
241 exint_init_struct.line_enable = TRUE;
242 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
243 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
244 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
245 exint_init(&exint_init_struct);
246
247 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
248}
249
255void OTG_WKUP_HANDLER(void)
256{
257 exint_flag_clear(OTG_WKUP_EXINT_LINE);
258}
259
260#endif
261
267void OTG_IRQ_HANDLER(void)
268{
269 usbd_irq_handler(&otg_core_struct);
270}
271
277void usb_delay_ms(uint32_t ms)
278{
279 /* user can define self delay function */
280 delay_ms(ms);
281}
282
288void usb_delay_us(uint32_t us)
289{
290 delay_us(us);
291}
292
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/usb_device/printer/src/main.c:100
main
int main(void)
main function.
Definition: project/at_start_f435/examples/usb_device/printer/src/main.c:55
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/usb_device/printer/src/main.c:192
OTG_IRQ_HANDLER
void OTG_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_device/printer/src/main.c:267
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f435/examples/usb_device/printer/src/main.c:45
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
printer_class_handler
usbd_class_handler printer_class_handler
Definition: printer_class.c:64
printer_desc_handler
usbd_desc_handler printer_desc_handler
device descriptor handler structure
Definition: printer_desc.c:64
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
printer_class.h
usb cdc class file
printer_desc.h
usb printer descriptor header file
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • usb_device
  • two_otg_device_demo
  • inc
project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • usb_device
  • two_otg_device_demo
  • inc
project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • usb_device
  • two_otg_device_demo
  • inc
project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • at_start_f435
  • examples
  • usb_device
  • two_otg_device_demo
  • inc
project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "at32f435_437_board.h"
38#include "stdio.h"
39
51#define USE_OTG_DEVICE_MODE
52
56/* #define USE_OTG_HOST_MODE */
57
62#define USB_ID 0
63#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
64#define OTG_IRQ OTGFS1_IRQn
65#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
66#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
67#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
68#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
69
70#define OTG_PIN_GPIO GPIOA
71#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
72
73#define OTG_PIN_DP GPIO_PINS_12
74#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
75
76#define OTG_PIN_DM GPIO_PINS_11
77#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
78
79#define OTG_PIN_VBUS GPIO_PINS_9
80#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
81
82#define OTG_PIN_ID GPIO_PINS_10
83#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
84
85#define OTG_PIN_SOF_GPIO GPIOA
86#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
87#define OTG_PIN_SOF GPIO_PINS_8
88#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
89
90#define OTG_PIN_MUX GPIO_MUX_10
91
92
93#define USB2_ID 1
94#define OTG2_CLOCK CRM_OTGFS2_PERIPH_CLOCK
95#define OTG2_IRQ OTGFS2_IRQn
96#define OTG2_IRQ_HANDLER OTGFS2_IRQHandler
97#define OTG2_WKUP_IRQ OTGFS2_WKUP_IRQn
98#define OTG2_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
99#define OTG2_WKUP_EXINT_LINE EXINT_LINE_20
100
101#define OTG2_PIN_GPIO GPIOB
102#define OTG2_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
103
104#define OTG2_PIN_DP GPIO_PINS_15
105#define OTG2_PIN_DP_SOURCE GPIO_PINS_SOURCE15
106
107#define OTG2_PIN_DM GPIO_PINS_14
108#define OTG2_PIN_DM_SOURCE GPIO_PINS_SOURCE14
109
110#define OTG2_PIN_VBUS GPIO_PINS_13
111#define OTG2_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
112
113#define OTG2_PIN_ID GPIO_PINS_12
114#define OTG2_PIN_ID_SOURCE GPIO_PINS_SOURCE10
115
116#define OTG2_PIN_SOF_GPIO GPIOA
117#define OTG2_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
118#define OTG2_PIN_SOF GPIO_PINS_4
119#define OTG2_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
120
121#define OTG2_PIN_MUX GPIO_MUX_12
122
126#ifdef USE_OTG_DEVICE_MODE
130/* otg1 device fifo */
131#define USBD_RX_SIZE 128
132#define USBD_EP0_TX_SIZE 24
133#define USBD_EP1_TX_SIZE 20
134#define USBD_EP2_TX_SIZE 20
135#define USBD_EP3_TX_SIZE 20
136#define USBD_EP4_TX_SIZE 20
137#define USBD_EP5_TX_SIZE 20
138#define USBD_EP6_TX_SIZE 20
139#define USBD_EP7_TX_SIZE 20
140
141/* otg2 device fifo */
142#define USBD2_RX_SIZE 128
143#define USBD2_EP0_TX_SIZE 24
144#define USBD2_EP1_TX_SIZE 20
145#define USBD2_EP2_TX_SIZE 20
146#define USBD2_EP3_TX_SIZE 20
147#define USBD2_EP4_TX_SIZE 20
148#define USBD2_EP5_TX_SIZE 20
149#define USBD2_EP6_TX_SIZE 20
150#define USBD2_EP7_TX_SIZE 20
151
155#ifndef USB_EPT_MAX_NUM
156#define USB_EPT_MAX_NUM 8
157#endif
158#endif
159
163#ifdef USE_OTG_HOST_MODE
164#ifndef USB_HOST_CHANNEL_NUM
165#define USB_HOST_CHANNEL_NUM 16
166#endif
167
171/* otg1 host fifo */
172#define USBH_RX_FIFO_SIZE 128
173#define USBH_NP_TX_FIFO_SIZE 96
174#define USBH_P_TX_FIFO_SIZE 96
175
176/* otg2 host fifo */
177#define USBH2_RX_FIFO_SIZE 128
178#define USBH2_NP_TX_FIFO_SIZE 96
179#define USBH2_P_TX_FIFO_SIZE 96
180#endif
181
185/* #define USB_SOF_OUTPUT_ENABLE */
186
190#define USB_VBUS_IGNORE
191
195/* #define USB_LOW_POWER_WAKUP */
196
197void usb_delay_ms(uint32_t ms);
198void usb_delay_us(uint32_t us);
206#ifdef __cplusplus
207}
208#endif
209
210#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_board.h
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:443
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:454


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • two_otg_device_demo
  • src
Functions
project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • usb_device
  • two_otg_device_demo
  • src
project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • two_otg_device_demo
  • src
Functions
project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • usb_device
  • two_otg_device_demo
  • src
project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • two_otg_device_demo
  • src
Functions | Variables
project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "cdc_class.h"
#include "cdc_desc.h"
#include "custom_hid_class.h"
#include "custom_hid_desc.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | button_exint_init (void)
configure button exint More...
void | button_isr (void)
button handler function More...
int | main (void)
main function. More...
void | EXINT0_IRQHandler (void)
exint0 interrupt handler More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | OTG2_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
otg_core_type otg2_core_struct
uint8_t | usb_buffer [256]
uint8_t | report_buf [USBD_CUSTOM_IN_MAXPACKET_SIZE]
__IO uint8_t | button_press = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • usb_device
  • two_otg_device_demo
  • src
project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "cdc_class.h"
33#include "cdc_desc.h"
34#include "custom_hid_class.h"
35#include "custom_hid_desc.h"
36
45/* usb global struct define */
46 otg_core_type otg_core_struct;
47 otg_core_type otg2_core_struct;
48uint8_t usb_buffer[256];
49uint8_t report_buf[USBD_CUSTOM_IN_MAXPACKET_SIZE];
50__IO uint8_t button_press = 0;
51
52void usb_clock48m_select(usb_clk48_s clk_s);
53void usb_gpio_config(void);
54void usb_low_power_wakeup_config(void);
55void button_exint_init(void);
56void button_isr(void);
57
63int main(void)
64{
65 uint16_t data_len;
66
67 uint32_t timeout;
68
69 uint8_t send_zero_packet = 0;
70
71 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
72
73 system_clock_config();
74
75 at32_board_init();
76
77 button_exint_init();
78
79 /* usb gpio config */
80 usb_gpio_config();
81
82#ifdef USB_LOW_POWER_WAKUP
83 usb_low_power_wakeup_config();
84#endif
85
86 /* enable otgfs clock */
87 crm_periph_clock_enable(OTG_CLOCK, TRUE);
88 crm_periph_clock_enable(OTG2_CLOCK, TRUE);
89
90 /* select usb 48m clcok source */
91 usb_clock48m_select(USB_CLK_HEXT);
92
93 /* enable otgfs irq */
94 nvic_irq_enable(OTG_IRQ, 0, 0);
95 nvic_irq_enable(OTG2_IRQ, 0, 0);
96
97 /* init otg1 device */
98 usbd_init(&otg_core_struct,
99 USB_FULL_SPEED_CORE_ID,
100 USB_ID,
101 &cdc_class_handler,
102 &cdc_desc_handler);
103
104 /* init otg2 device */
105 usbd_init(&otg2_core_struct,
106 USB_FULL_SPEED_CORE_ID,
107 USB2_ID,
108 &custom_hid_class_handler,
109 &custom_hid_desc_handler);
110 while(1)
111 {
112 /* get usb vcp receive data */
113 data_len = usb_vcp_get_rxdata(&otg_core_struct.dev, usb_buffer);
114
115 if(data_len > 0 || send_zero_packet == 1)
116 {
117
118 /* bulk transfer is complete when the endpoint does one of the following
119 1 has transferred exactly the amount of data expected
120 2 transfers a packet with a payload size less than wMaxPacketSize or transfers a zero-length packet
121 */
122 if(data_len > 0)
123 send_zero_packet = 1;
124
125 if(data_len == 0)
126 send_zero_packet = 0;
127
128 timeout = 5000000;
129 do
130 {
131 /* send data to host */
132 if(usb_vcp_send_data(&otg_core_struct.dev, usb_buffer, data_len) == SUCCESS)
133 {
134 break;
135 }
136 }while(timeout --);
137 }
138
139 /* otg2 custom hid */
140 if(button_press == 1)
141 {
142 report_buf[0] = HID_REPORT_ID_5;
143 report_buf[1] = (~report_buf[1]) & 0x1;
144 custom_hid_class_send_report(&otg2_core_struct.dev, report_buf, USBD_CUSTOM_IN_MAXPACKET_SIZE);
145 button_press = 0;
146 }
147 }
148}
149
155void button_exint_init(void)
156{
157 exint_init_type exint_init_struct;
158
159 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
160 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
161
162 exint_default_para_init(&exint_init_struct);
163 exint_init_struct.line_enable = TRUE;
164 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
165 exint_init_struct.line_select = EXINT_LINE_0;
166 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
167 exint_init(&exint_init_struct);
168
169 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
170 nvic_irq_enable(EXINT0_IRQn, 0, 0);
171}
172
178void button_isr(void)
179{
180 /* delay 5ms */
181 delay_ms(5);
182
183 /* clear interrupt pending bit */
184 exint_flag_clear(EXINT_LINE_0);
185
186 button_press = 1;
187}
188
194void EXINT0_IRQHandler(void)
195{
196 button_isr();
197}
198
204void usb_clock48m_select(usb_clk48_s clk_s)
205{
206 if(clk_s == USB_CLK_HICK)
207 {
208 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
209
210 /* enable the acc calibration ready interrupt */
211 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
212
213 /* update the c1\c2\c3 value */
214 acc_write_c1(7980);
215 acc_write_c2(8000);
216 acc_write_c3(8020);
217#if (USB_ID == 0)
218 acc_sof_select(ACC_SOF_OTG1);
219#else
220 acc_sof_select(ACC_SOF_OTG2);
221#endif
222 /* open acc calibration */
223 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
224 }
225 else
226 {
227 switch(system_core_clock)
228 {
229 /* 48MHz */
230 case 48000000:
231 crm_usb_clock_div_set(CRM_USB_DIV_1);
232 break;
233
234 /* 72MHz */
235 case 72000000:
236 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
237 break;
238
239 /* 96MHz */
240 case 96000000:
241 crm_usb_clock_div_set(CRM_USB_DIV_2);
242 break;
243
244 /* 120MHz */
245 case 120000000:
246 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
247 break;
248
249 /* 144MHz */
250 case 144000000:
251 crm_usb_clock_div_set(CRM_USB_DIV_3);
252 break;
253
254 /* 168MHz */
255 case 168000000:
256 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
257 break;
258
259 /* 192MHz */
260 case 192000000:
261 crm_usb_clock_div_set(CRM_USB_DIV_4);
262 break;
263
264 /* 216MHz */
265 case 216000000:
266 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
267 break;
268
269 /* 240MHz */
270 case 240000000:
271 crm_usb_clock_div_set(CRM_USB_DIV_5);
272 break;
273
274 /* 264MHz */
275 case 264000000:
276 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
277 break;
278
279 /* 288MHz */
280 case 288000000:
281 crm_usb_clock_div_set(CRM_USB_DIV_6);
282 break;
283
284 default:
285 break;
286
287 }
288 }
289}
290
296void usb_gpio_config(void)
297{
298 gpio_init_type gpio_init_struct;
299
300 /* otg1 gpio config */
301 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
302 gpio_default_para_init(&gpio_init_struct);
303
304 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
305 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
306 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
307 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
308
309 /* dp and dm */
310 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
311 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
312
313 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
314 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
315
316#ifdef USB_SOF_OUTPUT_ENABLE
317 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
318 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
319 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
320 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
321#endif
322
323 /* otgfs use vbus pin */
324#ifndef USB_VBUS_IGNORE
325 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
326 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
327 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
328 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
329#endif
330
331 /* otg2 gpio config */
332 crm_periph_clock_enable(OTG2_PIN_GPIO_CLOCK, TRUE);
333 gpio_default_para_init(&gpio_init_struct);
334
335 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
336 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
337 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
338 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
339
340 /* dp and dm */
341 gpio_init_struct.gpio_pins = OTG2_PIN_DP | OTG2_PIN_DM;
342 gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
343
344 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DP_SOURCE, OTG2_PIN_MUX);
345 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DM_SOURCE, OTG2_PIN_MUX);
346
347#ifdef USB_SOF_OUTPUT_ENABLE
348 crm_periph_clock_enable(OTG2_PIN_SOF_GPIO_CLOCK, TRUE);
349 gpio_init_struct.gpio_pins = OTG2_PIN_SOF;
350 gpio_init(OTG2_PIN_SOF_GPIO, &gpio_init_struct);
351 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_SOF_SOURCE, OTG2_PIN_MUX);
352#endif
353
354 /* otgfs use vbus pin */
355#ifndef USB_VBUS_IGNORE
356 gpio_init_struct.gpio_pins = OTG2_PIN_VBUS;
357 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
358 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_VBUS_SOURCE, OTG2_PIN_MUX);
359 gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
360#endif
361
362
363}
364#ifdef USB_LOW_POWER_WAKUP
370void usb_low_power_wakeup_config(void)
371{
372 exint_init_type exint_init_struct;
373
374 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
375 exint_default_para_init(&exint_init_struct);
376
377 /*otg1*/
378 exint_init_struct.line_enable = TRUE;
379 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
380 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
381 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
382 exint_init(&exint_init_struct);
383
384 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
385
386 /*otg2*/
387 exint_init_struct.line_enable = TRUE;
388 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
389 exint_init_struct.line_select = OTG2_WKUP_EXINT_LINE;
390 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
391 exint_init(&exint_init_struct);
392
393 nvic_irq_enable(OTG2_WKUP_IRQ, 0, 0);
394}
395
401void OTG_WKUP_HANDLER(void)
402{
403 exint_flag_clear(OTG_WKUP_EXINT_LINE);
404}
405
411void OTG2_WKUP_HANDLER(void)
412{
413 exint_flag_clear(OTG2_WKUP_EXINT_LINE);
414}
415
416#endif
417
423void OTG_IRQ_HANDLER(void)
424{
425 usbd_irq_handler(&otg_core_struct);
426}
427
433void OTG2_IRQ_HANDLER(void)
434{
435 usbd_irq_handler(&otg2_core_struct);
436}
437
443void usb_delay_ms(uint32_t ms)
444{
445 /* user can define self delay function */
446 delay_ms(ms);
447}
448
454void usb_delay_us(uint32_t us)
455{
456 delay_us(us);
457}
458
at32f435_437_board.h
cdc_class.h
usb cdc class file
cdc_desc.h
usb cdc descriptor header file
custom_hid_class.h
usb hid header file
custom_hid_desc.h
usb custom hid descriptor header file
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
OTG2_PIN_DP_SOURCE
#define OTG2_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:108
OTG2_IRQ
#define OTG2_IRQ
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:98
OTG2_PIN_VBUS_SOURCE
#define OTG2_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:114
OTG2_PIN_SOF_SOURCE
#define OTG2_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:122
OTG2_PIN_GPIO_CLOCK
#define OTG2_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:105
OTG2_WKUP_IRQ
#define OTG2_WKUP_IRQ
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:100
OTG2_PIN_GPIO
#define OTG2_PIN_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:104
OTG2_PIN_DM
#define OTG2_PIN_DM
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:110
OTG2_PIN_DP
#define OTG2_PIN_DP
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:107
OTG2_PIN_VBUS
#define OTG2_PIN_VBUS
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:113
USB2_ID
#define USB2_ID
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:96
OTG2_PIN_SOF_GPIO_CLOCK
#define OTG2_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:120
OTG2_PIN_SOF_GPIO
#define OTG2_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:119
OTG2_CLOCK
#define OTG2_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:97
OTG2_PIN_DM_SOURCE
#define OTG2_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:111
OTG2_WKUP_HANDLER
#define OTG2_WKUP_HANDLER
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:101
OTG2_WKUP_EXINT_LINE
#define OTG2_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:102
OTG2_PIN_SOF
#define OTG2_PIN_SOF
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:121
OTG2_PIN_MUX
#define OTG2_PIN_MUX
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:124
report_buf
uint8_t report_buf[USBD_CUSTOM_IN_MAXPACKET_SIZE]
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:49
OTG2_IRQ_HANDLER
void OTG2_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:433
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:155
button_press
__IO uint8_t button_press
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:50
otg2_core_struct
otg_core_type otg2_core_struct
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:47
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:204
main
int main(void)
main function.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:63
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:296
OTG_IRQ_HANDLER
void OTG_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:423
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:194
usb_buffer
uint8_t usb_buffer[256]
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:48
button_isr
void button_isr(void)
button handler function
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:178
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c:46
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
data_len
uint16_t data_len
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:47
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
HID_REPORT_ID_5
#define HID_REPORT_ID_5
Definition: audio_hid_desc.h:226
usb_vcp_get_rxdata
uint16_t usb_vcp_get_rxdata(void *udev, uint8_t *recv_data)
usb device class rx data process
Definition: cdc_class.c:339
usb_vcp_send_data
error_status usb_vcp_send_data(void *udev, uint8_t *send_data, uint16_t len)
usb device class send data
Definition: cdc_class.c:369
cdc_class_handler
usbd_class_handler cdc_class_handler
Definition: cdc_class.c:69
cdc_desc_handler
usbd_desc_handler cdc_desc_handler
device descriptor handler structure
Definition: cdc_desc.c:64
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
USBD_CUSTOM_IN_MAXPACKET_SIZE
#define USBD_CUSTOM_IN_MAXPACKET_SIZE
usb custom hid in and out max packet size define
Definition: custom_hid_class.h:59
custom_hid_class_send_report
usb_sts_type custom_hid_class_send_report(void *udev, uint8_t *report, uint16_t len)
usb device class send report
Definition: custom_hid_class.c:316
custom_hid_class_handler
usbd_class_handler custom_hid_class_handler
Definition: custom_hid_class.c:57
custom_hid_desc_handler
usbd_desc_handler custom_hid_desc_handler
custom hid device descriptor handler structure
Definition: custom_hid_desc.c:62
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • usb_device
  • vcp_loopback
  • inc
project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • usb_device
  • vcp_loopback
  • inc
project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • usb_device
  • vcp_loopback
  • inc
project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • at_start_f435
  • examples
  • usb_device
  • vcp_loopback
  • inc
project/at_start_f435/examples/usb_device/vcp_loopback/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
50#define USE_OTG_DEVICE_MODE
51
55/* #define USE_OTG_HOST_MODE */
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65//#define OTG_USB_ID 2
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97#endif
98
99#if (OTG_USB_ID == 2)
100#define USB_ID 1
101#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
102#define OTG_IRQ OTGFS2_IRQn
103#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
104#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
105#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
106#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
107
108#define OTG_PIN_GPIO GPIOB
109#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
110
111#define OTG_PIN_DP GPIO_PINS_15
112#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
113
114#define OTG_PIN_DM GPIO_PINS_14
115#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
116
117#define OTG_PIN_VBUS GPIO_PINS_13
118#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
119
120#define OTG_PIN_ID GPIO_PINS_12
121#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
122
123#define OTG_PIN_SOF_GPIO GPIOA
124#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
125#define OTG_PIN_SOF GPIO_PINS_4
126#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
127
128#define OTG_PIN_MUX GPIO_MUX_12
129#endif
130
134#ifdef USE_OTG_DEVICE_MODE
138/* otg1 device fifo */
139#define USBD_RX_SIZE 128
140#define USBD_EP0_TX_SIZE 24
141#define USBD_EP1_TX_SIZE 20
142#define USBD_EP2_TX_SIZE 20
143#define USBD_EP3_TX_SIZE 20
144#define USBD_EP4_TX_SIZE 20
145#define USBD_EP5_TX_SIZE 20
146#define USBD_EP6_TX_SIZE 20
147#define USBD_EP7_TX_SIZE 20
148
149/* otg2 device fifo */
150#define USBD2_RX_SIZE 128
151#define USBD2_EP0_TX_SIZE 24
152#define USBD2_EP1_TX_SIZE 20
153#define USBD2_EP2_TX_SIZE 20
154#define USBD2_EP3_TX_SIZE 20
155#define USBD2_EP4_TX_SIZE 20
156#define USBD2_EP5_TX_SIZE 20
157#define USBD2_EP6_TX_SIZE 20
158#define USBD2_EP7_TX_SIZE 20
159
163#ifndef USB_EPT_MAX_NUM
164#define USB_EPT_MAX_NUM 8
165#endif
166#endif
167
171#ifdef USE_OTG_HOST_MODE
172#ifndef USB_HOST_CHANNEL_NUM
173#define USB_HOST_CHANNEL_NUM 16
174#endif
175
179/* otg1 host fifo */
180#define USBH_RX_FIFO_SIZE 128
181#define USBH_NP_TX_FIFO_SIZE 96
182#define USBH_P_TX_FIFO_SIZE 96
183
184/* otg2 host fifo */
185#define USBH2_RX_FIFO_SIZE 128
186#define USBH2_NP_TX_FIFO_SIZE 96
187#define USBH2_P_TX_FIFO_SIZE 96
188#endif
189
193/* #define USB_SOF_OUTPUT_ENABLE */
194
198#define USB_VBUS_IGNORE
199
203/* #define USB_LOW_POWER_WAKUP */
204
205void usb_delay_ms(uint32_t ms);
206void usb_delay_us(uint32_t us);
214#ifdef __cplusplus
215}
216#endif
217
218#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • vcp_loopback
  • src
Functions
project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • usb_device
  • vcp_loopback
  • src
project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • vcp_loopback
  • src
Functions
project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • usb_device
  • vcp_loopback
  • src
project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • vcp_loopback
  • src
Functions | Variables
project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "cdc_class.h"
#include "cdc_desc.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
uint8_t usb_buffer [256]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • usb_device
  • vcp_loopback
  • src
project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "cdc_class.h"
33#include "cdc_desc.h"
34
43/* usb global struct define */
44 otg_core_type otg_core_struct;
45uint8_t usb_buffer[256];
46void usb_clock48m_select(usb_clk48_s clk_s);
47void usb_gpio_config(void);
48void usb_low_power_wakeup_config(void);
49
55int main(void)
56{
57 uint16_t data_len;
58
59 uint32_t timeout;
60
61 uint8_t send_zero_packet = 0;
62
63 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
64
65 system_clock_config();
66
67 at32_board_init();
68
69 /* usb gpio config */
70 usb_gpio_config();
71
72#ifdef USB_LOW_POWER_WAKUP
73 usb_low_power_wakeup_config();
74#endif
75
76 /* enable otgfs clock */
77 crm_periph_clock_enable(OTG_CLOCK, TRUE);
78
79 /* select usb 48m clcok source */
80 usb_clock48m_select(USB_CLK_HEXT);
81
82 /* enable otgfs irq */
83 nvic_irq_enable(OTG_IRQ, 0, 0);
84
85 /* init usb */
86 usbd_init(&otg_core_struct,
87 USB_FULL_SPEED_CORE_ID,
88 USB_ID,
89 &cdc_class_handler,
90 &cdc_desc_handler);
91 while(1)
92 {
93 /* get usb vcp receive data */
94 data_len = usb_vcp_get_rxdata(&otg_core_struct.dev, usb_buffer);
95
96 if(data_len > 0 || send_zero_packet == 1)
97 {
98
99 /* bulk transfer is complete when the endpoint does one of the following
100 1 has transferred exactly the amount of data expected
101 2 transfers a packet with a payload size less than wMaxPacketSize or transfers a zero-length packet
102 */
103 if(data_len > 0)
104 send_zero_packet = 1;
105
106 if(data_len == 0)
107 send_zero_packet = 0;
108
109 timeout = 5000000;
110 do
111 {
112 /* send data to host */
113 if(usb_vcp_send_data(&otg_core_struct.dev, usb_buffer, data_len) == SUCCESS)
114 {
115 break;
116 }
117 }while(timeout --);
118 }
119 }
120}
121
127void usb_clock48m_select(usb_clk48_s clk_s)
128{
129 if(clk_s == USB_CLK_HICK)
130 {
131 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
132
133 /* enable the acc calibration ready interrupt */
134 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
135
136 /* update the c1\c2\c3 value */
137 acc_write_c1(7980);
138 acc_write_c2(8000);
139 acc_write_c3(8020);
140#if (USB_ID == 0)
141 acc_sof_select(ACC_SOF_OTG1);
142#else
143 acc_sof_select(ACC_SOF_OTG2);
144#endif
145 /* open acc calibration */
146 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
147 }
148 else
149 {
150 switch(system_core_clock)
151 {
152 /* 48MHz */
153 case 48000000:
154 crm_usb_clock_div_set(CRM_USB_DIV_1);
155 break;
156
157 /* 72MHz */
158 case 72000000:
159 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
160 break;
161
162 /* 96MHz */
163 case 96000000:
164 crm_usb_clock_div_set(CRM_USB_DIV_2);
165 break;
166
167 /* 120MHz */
168 case 120000000:
169 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
170 break;
171
172 /* 144MHz */
173 case 144000000:
174 crm_usb_clock_div_set(CRM_USB_DIV_3);
175 break;
176
177 /* 168MHz */
178 case 168000000:
179 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
180 break;
181
182 /* 192MHz */
183 case 192000000:
184 crm_usb_clock_div_set(CRM_USB_DIV_4);
185 break;
186
187 /* 216MHz */
188 case 216000000:
189 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
190 break;
191
192 /* 240MHz */
193 case 240000000:
194 crm_usb_clock_div_set(CRM_USB_DIV_5);
195 break;
196
197 /* 264MHz */
198 case 264000000:
199 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
200 break;
201
202 /* 288MHz */
203 case 288000000:
204 crm_usb_clock_div_set(CRM_USB_DIV_6);
205 break;
206
207 default:
208 break;
209
210 }
211 }
212}
213
219void usb_gpio_config(void)
220{
221 gpio_init_type gpio_init_struct;
222
223 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
224 gpio_default_para_init(&gpio_init_struct);
225
226 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
227 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
228 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
229 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
230
231 /* dp and dm */
232 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
233 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
234
235 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
236 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
237
238#ifdef USB_SOF_OUTPUT_ENABLE
239 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
240 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
241 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
242 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
243#endif
244
245 /* otgfs use vbus pin */
246#ifndef USB_VBUS_IGNORE
247 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
248 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
249 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
250 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
251#endif
252
253
254}
255#ifdef USB_LOW_POWER_WAKUP
261void usb_low_power_wakeup_config(void)
262{
263 exint_init_type exint_init_struct;
264
265 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
266 exint_default_para_init(&exint_init_struct);
267
268 exint_init_struct.line_enable = TRUE;
269 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
270 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
271 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
272 exint_init(&exint_init_struct);
273
274 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
275}
276
282void OTG_WKUP_HANDLER(void)
283{
284 exint_flag_clear(OTG_WKUP_EXINT_LINE);
285}
286
287#endif
288
294void OTG_IRQ_HANDLER(void)
295{
296 usbd_irq_handler(&otg_core_struct);
297}
298
304void usb_delay_ms(uint32_t ms)
305{
306 /* user can define self delay function */
307 delay_ms(ms);
308}
309
315void usb_delay_us(uint32_t us)
316{
317 delay_us(us);
318}
319
at32f435_437_board.h
cdc_class.h
usb cdc class file
cdc_desc.h
usb cdc descriptor header file
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:127
main
int main(void)
main function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:55
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:219
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
OTG_IRQ_HANDLER
void OTG_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:294
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
usb_buffer
uint8_t usb_buffer[256]
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:45
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:44
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
data_len
uint16_t data_len
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:47
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
usb_vcp_get_rxdata
uint16_t usb_vcp_get_rxdata(void *udev, uint8_t *recv_data)
usb device class rx data process
Definition: cdc_class.c:339
usb_vcp_send_data
error_status usb_vcp_send_data(void *udev, uint8_t *send_data, uint16_t len)
usb device class send data
Definition: cdc_class.c:369
cdc_class_handler
usbd_class_handler cdc_class_handler
Definition: cdc_class.c:69
cdc_desc_handler
usbd_desc_handler cdc_desc_handler
device descriptor handler structure
Definition: cdc_desc.c:64
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_comport
  • inc
project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_comport
  • inc
project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_comport
  • inc
project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_comport
  • inc
project/at_start_f435/examples/usb_device/virtual_comport/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
50#define USE_OTG_DEVICE_MODE
51
55/* #define USE_OTG_HOST_MODE */
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65//#define OTG_USB_ID 2
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97#endif
98
99#if (OTG_USB_ID == 2)
100#define USB_ID 1
101#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
102#define OTG_IRQ OTGFS2_IRQn
103#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
104#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
105#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
106#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
107
108#define OTG_PIN_GPIO GPIOB
109#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
110
111#define OTG_PIN_DP GPIO_PINS_15
112#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
113
114#define OTG_PIN_DM GPIO_PINS_14
115#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
116
117#define OTG_PIN_VBUS GPIO_PINS_13
118#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
119
120#define OTG_PIN_ID GPIO_PINS_12
121#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
122
123#define OTG_PIN_SOF_GPIO GPIOA
124#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
125#define OTG_PIN_SOF GPIO_PINS_4
126#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
127
128#define OTG_PIN_MUX GPIO_MUX_12
129#endif
130
134#ifdef USE_OTG_DEVICE_MODE
138/* otg1 device fifo */
139#define USBD_RX_SIZE 128
140#define USBD_EP0_TX_SIZE 24
141#define USBD_EP1_TX_SIZE 20
142#define USBD_EP2_TX_SIZE 20
143#define USBD_EP3_TX_SIZE 20
144#define USBD_EP4_TX_SIZE 20
145#define USBD_EP5_TX_SIZE 20
146#define USBD_EP6_TX_SIZE 20
147#define USBD_EP7_TX_SIZE 20
148
149/* otg2 device fifo */
150#define USBD2_RX_SIZE 128
151#define USBD2_EP0_TX_SIZE 24
152#define USBD2_EP1_TX_SIZE 20
153#define USBD2_EP2_TX_SIZE 20
154#define USBD2_EP3_TX_SIZE 20
155#define USBD2_EP4_TX_SIZE 20
156#define USBD2_EP5_TX_SIZE 20
157#define USBD2_EP6_TX_SIZE 20
158#define USBD2_EP7_TX_SIZE 20
159
163#ifndef USB_EPT_MAX_NUM
164#define USB_EPT_MAX_NUM 8
165#endif
166#endif
167
171#ifdef USE_OTG_HOST_MODE
172#ifndef USB_HOST_CHANNEL_NUM
173#define USB_HOST_CHANNEL_NUM 16
174#endif
175
179/* otg1 host fifo */
180#define USBH_RX_FIFO_SIZE 128
181#define USBH_NP_TX_FIFO_SIZE 96
182#define USBH_P_TX_FIFO_SIZE 96
183
184/* otg2 host fifo */
185#define USBH2_RX_FIFO_SIZE 128
186#define USBH2_NP_TX_FIFO_SIZE 96
187#define USBH2_P_TX_FIFO_SIZE 96
188#endif
189
193/* #define USB_SOF_OUTPUT_ENABLE */
194
198#define USB_VBUS_IGNORE
199
203/* #define USB_LOW_POWER_WAKUP */
204
208#define USB_VIRTUAL_COMPORT
209
210void usb_delay_ms(uint32_t ms);
211void usb_delay_us(uint32_t us);
219#ifdef __cplusplus
220}
221#endif
222
223#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • virtual_comport
  • src
Functions
project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_comport
  • src
project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • virtual_comport
  • src
Functions
project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_comport
  • src
project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • virtual_comport
  • src
Macros | Functions | Variables
project/at_start_f435/examples/usb_device/virtual_comport/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "cdc_class.h"
#include "cdc_desc.h"

Go to the source code of this file.

Macros

#define usart_buffer_size 2048

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | usb_usart_config (linecoding_type linecoding)
this function handles usart2 and linecoding config. More...
void | usart_gpio_config (void)
this function handles usart2 gpio config. More...
void | usart_send_data (uint8_t *send_data, uint16_t len)
this function handles usart2 send data. More...
uint16_t | usart_receive_data (void)
this function handles usart2 receive data. More...
int | main (void)
main function. More...
void | USART2_IRQHandler (void)
this function handles usart2 handler. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
uint8_t | usb_buffer [256]
uint8_t | usart2_tx_counter = 0
uint16_t | data_len
linecoding_type linecoding
uint8_t | usart_rx_buffer [2048]
uint16_t | hw_usart_rx_index = 0
uint16_t | hw_usart_read_index = 0
uint16_t | usart_rx_data_len = 0
uint16_t | ov_cnt = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/virtual_comport/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_comport
  • src
project/at_start_f435/examples/usb_device/virtual_comport/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "cdc_class.h"
33#include "cdc_desc.h"
34
43/* usb global struct define */
44 otg_core_type otg_core_struct;
45uint8_t usb_buffer[256];
46uint8_t usart2_tx_counter = 0;
47uint16_t data_len;
48void usb_clock48m_select(usb_clk48_s clk_s);
49void usb_gpio_config(void);
50void usb_low_power_wakeup_config(void);
51
52/* usart global struct define */
53extern linecoding_type linecoding;
54void usb_usart_config(linecoding_type linecoding);
55void usart_gpio_config(void);
56#define usart_buffer_size 2048
57uint8_t usart_rx_buffer[usart_buffer_size];
58uint16_t hw_usart_rx_index = 0;
59uint16_t hw_usart_read_index = 0;
60uint16_t usart_rx_data_len = 0;
61uint16_t ov_cnt = 0;
62void usart_send_data(uint8_t *send_data, uint16_t len);
63uint16_t usart_receive_data(void);
69int main(void)
70{
71 uint32_t timeout;
72
73 uint8_t send_zero_packet = 0;
74
75 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
76
77 system_clock_config();
78
79 at32_board_init();
80
81 /* usart gpio config */
82 usart_gpio_config();
83
84 /* hardware usart config: usart2 */
85 usb_usart_config(linecoding);
86
87 /* usb gpio config */
88 usb_gpio_config();
89
90#ifdef USB_LOW_POWER_WAKUP
91 usb_low_power_wakeup_config();
92#endif
93
94 /* enable otgfs clock */
95 crm_periph_clock_enable(OTG_CLOCK, TRUE);
96
97 /* select usb 48m clcok source */
98 usb_clock48m_select(USB_CLK_HEXT);
99
100 /* enable otgfs irq */
101 nvic_irq_enable(OTG_IRQ, 0, 0);
102
103 /* init usb */
104 usbd_init(&otg_core_struct,
105 USB_FULL_SPEED_CORE_ID,
106 USB_ID,
107 &cdc_class_handler,
108 &cdc_desc_handler);
109 while(1)
110 {
111 /* get usb vcp receive data */
112 data_len = usb_vcp_get_rxdata(&otg_core_struct.dev, usb_buffer);
113
114 /* send data to hardware usart */
115 if(data_len > 0)
116 {
117 usart_send_data(usb_buffer, data_len);
118 }
119
120 /* if hardware usart received data,usb send data to host */
121 usart_rx_data_len = usart_receive_data();
122 if(usart_rx_data_len || send_zero_packet == 1)
123 {
124 if(usart_rx_data_len > 0)
125 send_zero_packet = 1;
126
127 if(usart_rx_data_len == 0)
128 send_zero_packet = 0;
129
130 timeout = 50000;
131
132 if((hw_usart_read_index + usart_rx_data_len) < usart_buffer_size)
133 {
134 do
135 {
136 /* send data to host */
137 if(usb_vcp_send_data(&otg_core_struct.dev, &usart_rx_buffer[hw_usart_read_index], usart_rx_data_len) == SUCCESS)
138 {
139 hw_usart_read_index = hw_usart_read_index + usart_rx_data_len;
140
141 break;
142 }
143 }while(timeout --);
144
145 }
146 /* process the fifo overflow */
147 else
148 {
149 do
150 {
151 /* send data to host */
152 if(usb_vcp_send_data(&otg_core_struct.dev, &usart_rx_buffer[hw_usart_read_index], usart_buffer_size - hw_usart_read_index) == SUCCESS)
153 {
154 /* get fifo overflow data count */
155 ov_cnt = usart_rx_data_len - (usart_buffer_size - hw_usart_read_index);
156 hw_usart_read_index = 0;
157 break;
158 }
159 }while(timeout --);
160 timeout = 50000;
161 do
162 {
163 /* send data to host */
164 if(usb_vcp_send_data(&otg_core_struct.dev, &usart_rx_buffer[hw_usart_read_index], ov_cnt) == SUCCESS)
165 {
166 hw_usart_read_index = ov_cnt;
167 break;
168 }
169 }while(timeout --);
170 }
171 }
172 }
173}
174
181void usart_send_data(uint8_t *send_data, uint16_t len)
182{
183 uint16_t index = 0;
184 for(index = 0; index < len; index++ )
185 {
186 do
187 {
188 ;
189 }while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
190
191 usart_data_transmit(USART2, send_data[index]);
192 }
193}
194
200uint16_t usart_receive_data(void)
201{
202 uint16_t usart_data_len;
203 if(hw_usart_read_index == hw_usart_rx_index)
204 {
205 usart_data_len = 0;
206 }
207 else
208 {
209 /* whether to process the fifo overflow or not */
210 if(hw_usart_rx_index > hw_usart_read_index)
211 usart_data_len = hw_usart_rx_index - hw_usart_read_index;
212 else if(hw_usart_rx_index == 0 && hw_usart_rx_index != hw_usart_read_index)
213 usart_data_len = usart_buffer_size - hw_usart_read_index;
214 else
215 usart_data_len = (usart_buffer_size-1) + hw_usart_rx_index - hw_usart_read_index;
216 }
217
218 return usart_data_len;
219}
220
226void USART2_IRQHandler(void)
227{
228 if(usart_flag_get(USART2, USART_RDBF_FLAG) != RESET)
229 {
230 /* read one byte from the receive data register */
231 usart_rx_buffer[hw_usart_rx_index] = usart_data_receive(USART2);
232 hw_usart_rx_index = ( (hw_usart_rx_index+1) & (usart_buffer_size-1) );
233 }
234}
235
241void usb_usart_config( linecoding_type linecoding)
242{
243 usart_stop_bit_num_type usart_stop_bit;
244 usart_data_bit_num_type usart_data_bit;
245 usart_parity_selection_type usart_parity_select;
246
247 /* enable the usart2 and gpio clock */
248 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, FALSE);
249 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
250
251 /* stop bit */
252 switch(linecoding.format)
253 {
254 case 0x0:
255 usart_stop_bit = USART_STOP_1_BIT;
256 break;
257 /* to be used when transmitting and receiving data in smartcard mode */
258 case 0x1:
259 usart_stop_bit = USART_STOP_1_5_BIT;
260 break;
261 case 0x2:
262 usart_stop_bit = USART_STOP_2_BIT;
263 break;
264 default :
265 break;
266 }
267 /* data bits */
268 switch(linecoding.data)
269 {
270 /* hardware usart not support data bits for 5/6 */
271 case 0x5:
272 case 0x6:
273 break;
274 case 0x7:
275 usart_data_bit = USART_DATA_7BITS;
276 break;
277 case 0x8:
278 usart_data_bit = USART_DATA_8BITS;
279 break;
280 /* hardware usart not support data bits for 16 */
281 case 0x10:
282 break;
283 default :
284 break;
285 }
286 /* parity */
287 switch(linecoding.parity)
288 {
289 case 0x0:
290 usart_parity_select = USART_PARITY_NONE;
291 break;
292 case 0x1:
293 usart_parity_select = USART_PARITY_ODD;
294 break;
295 case 0x2:
296 usart_parity_select = USART_PARITY_EVEN;
297 break;
298 /* hardware usart not support parity for mark and space */
299 case 0x3:
300 case 0x4:
301 break;
302 default :
303 break;
304 }
305
306 nvic_irq_enable(USART2_IRQn, 0, 0);
307
308 /* configure usart2 param */
309 usart_init(USART2, linecoding.bitrate, usart_data_bit, usart_stop_bit);
310 usart_parity_selection_config(USART2, usart_parity_select);
311 usart_transmitter_enable(USART2, TRUE);
312 usart_receiver_enable(USART2, TRUE);
313
314 /* enable usart2 interrupt */
315 usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE);
316 usart_enable(USART2, TRUE);
317}
318
324void usart_gpio_config(void)
325{
326 gpio_init_type gpio_init_struct;
327 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
328
329 /* configure the usart2 tx, rx pin */
330 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
331 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
332 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
333 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
334 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
335 gpio_init(GPIOA, &gpio_init_struct);
336 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
337 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7);
338}
339
345void usb_clock48m_select(usb_clk48_s clk_s)
346{
347 if(clk_s == USB_CLK_HICK)
348 {
349 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
350
351 /* enable the acc calibration ready interrupt */
352 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
353
354 /* update the c1\c2\c3 value */
355 acc_write_c1(7980);
356 acc_write_c2(8000);
357 acc_write_c3(8020);
358#if (USB_ID == 0)
359 acc_sof_select(ACC_SOF_OTG1);
360#else
361 acc_sof_select(ACC_SOF_OTG2);
362#endif
363 /* open acc calibration */
364 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
365 }
366 else
367 {
368 switch(system_core_clock)
369 {
370 /* 48MHz */
371 case 48000000:
372 crm_usb_clock_div_set(CRM_USB_DIV_1);
373 break;
374
375 /* 72MHz */
376 case 72000000:
377 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
378 break;
379
380 /* 96MHz */
381 case 96000000:
382 crm_usb_clock_div_set(CRM_USB_DIV_2);
383 break;
384
385 /* 120MHz */
386 case 120000000:
387 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
388 break;
389
390 /* 144MHz */
391 case 144000000:
392 crm_usb_clock_div_set(CRM_USB_DIV_3);
393 break;
394
395 /* 168MHz */
396 case 168000000:
397 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
398 break;
399
400 /* 192MHz */
401 case 192000000:
402 crm_usb_clock_div_set(CRM_USB_DIV_4);
403 break;
404
405 /* 216MHz */
406 case 216000000:
407 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
408 break;
409
410 /* 240MHz */
411 case 240000000:
412 crm_usb_clock_div_set(CRM_USB_DIV_5);
413 break;
414
415 /* 264MHz */
416 case 264000000:
417 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
418 break;
419
420 /* 288MHz */
421 case 288000000:
422 crm_usb_clock_div_set(CRM_USB_DIV_6);
423 break;
424
425 default:
426 break;
427
428 }
429 }
430}
431
437void usb_gpio_config(void)
438{
439 gpio_init_type gpio_init_struct;
440
441 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
442 gpio_default_para_init(&gpio_init_struct);
443
444 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
445 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
446 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
447 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
448
449 /* dp and dm */
450 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
451 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
452
453 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
454 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
455
456#ifdef USB_SOF_OUTPUT_ENABLE
457 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
458 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
459 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
460 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
461#endif
462
463 /* otgfs use vbus pin */
464#ifndef USB_VBUS_IGNORE
465 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
466 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
467 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
468 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
469#endif
470
471
472}
473#ifdef USB_LOW_POWER_WAKUP
479void usb_low_power_wakeup_config(void)
480{
481 exint_init_type exint_init_struct;
482
483 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
484 exint_default_para_init(&exint_init_struct);
485
486 exint_init_struct.line_enable = TRUE;
487 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
488 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
489 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
490 exint_init(&exint_init_struct);
491
492 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
493}
494
500void OTG_WKUP_HANDLER(void)
501{
502 exint_flag_clear(OTG_WKUP_EXINT_LINE);
503}
504
505#endif
506
512void OTG_IRQ_HANDLER(void)
513{
514 usbd_irq_handler(&otg_core_struct);
515}
516
522void usb_delay_ms(uint32_t ms)
523{
524 /* user can define self delay function */
525 delay_ms(ms);
526}
527
533void usb_delay_us(uint32_t us)
534{
535 delay_us(us);
536}
537
at32f435_437_board.h
cdc_class.h
usb cdc class file
cdc_desc.h
usb cdc descriptor header file
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
usart_buffer_size
#define usart_buffer_size
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:56
USART2_IRQHandler
void USART2_IRQHandler(void)
this function handles usart2 handler.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:226
hw_usart_read_index
uint16_t hw_usart_read_index
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:59
usart2_tx_counter
uint8_t usart2_tx_counter
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:46
usb_usart_config
void usb_usart_config(linecoding_type linecoding)
this function handles usart2 and linecoding config.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:241
usart_rx_data_len
uint16_t usart_rx_data_len
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:60
linecoding
linecoding_type linecoding
Definition: cdc_class.c:57
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:345
ov_cnt
uint16_t ov_cnt
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:61
usart_gpio_config
void usart_gpio_config(void)
this function handles usart2 gpio config.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:324
main
int main(void)
main function.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:69
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:437
OTG_IRQ_HANDLER
void OTG_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:512
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb delay millisecond function.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:522
usart_rx_buffer
uint8_t usart_rx_buffer[2048]
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:57
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:533
usart_send_data
void usart_send_data(uint8_t *send_data, uint16_t len)
this function handles usart2 send data.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:181
usb_buffer
uint8_t usb_buffer[256]
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:45
usart_receive_data
uint16_t usart_receive_data(void)
this function handles usart2 receive data.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:200
data_len
uint16_t data_len
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:47
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:44
hw_usart_rx_index
uint16_t hw_usart_rx_index
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:58
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_parity_selection_config
void usart_parity_selection_config(usart_type *usart_x, usart_parity_selection_type parity)
usart parity selection config.
Definition: at32f435_437_usart.c:168
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_interrupt_enable
void usart_interrupt_enable(usart_type *usart_x, uint32_t usart_int, confirm_state new_state)
enable or disable the specified usart interrupts.
Definition: at32f435_437_usart.c:287
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
usart_stop_bit_num_type
usart_stop_bit_num_type
usart stop bit num type
Definition: at32f435_437_usart.h:158
usart_data_bit_num_type
usart_data_bit_num_type
usart data bit num type
Definition: at32f435_437_usart.h:112
usart_parity_selection_type
usart_parity_selection_type
usart parity selection type
Definition: at32f435_437_usart.h:93
USART_STOP_1_5_BIT
@ USART_STOP_1_5_BIT
Definition: at32f435_437_usart.h:162
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_STOP_2_BIT
@ USART_STOP_2_BIT
Definition: at32f435_437_usart.h:161
USART_DATA_7BITS
@ USART_DATA_7BITS
Definition: at32f435_437_usart.h:113
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_PARITY_ODD
@ USART_PARITY_ODD
Definition: at32f435_437_usart.h:96
USART_PARITY_EVEN
@ USART_PARITY_EVEN
Definition: at32f435_437_usart.h:95
USART_PARITY_NONE
@ USART_PARITY_NONE
Definition: at32f435_437_usart.h:94
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART_RDBF_INT
#define USART_RDBF_INT
Definition: at32f435_437_usart.h:73
USART2
#define USART2
Definition: at32f435_437_usart.h:349
usb_vcp_get_rxdata
uint16_t usb_vcp_get_rxdata(void *udev, uint8_t *recv_data)
usb device class rx data process
Definition: cdc_class.c:339
usb_vcp_send_data
error_status usb_vcp_send_data(void *udev, uint8_t *send_data, uint16_t len)
usb device class send data
Definition: cdc_class.c:369
cdc_class_handler
usbd_class_handler cdc_class_handler
Definition: cdc_class.c:69
cdc_desc_handler
usbd_desc_handler cdc_desc_handler
device descriptor handler structure
Definition: cdc_desc.c:64
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
USART2_IRQn
@ USART2_IRQn
Definition: at32f435_437.h:186
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
linecoding_type
usb cdc class set line coding struct
Definition: usb_std.h:213
linecoding_type::bitrate
uint32_t bitrate
Definition: usb_std.h:214
linecoding_type::data
uint8_t data
Definition: usb_std.h:217
linecoding_type::parity
uint8_t parity
Definition: usb_std.h:216
linecoding_type::format
uint8_t format
Definition: usb_std.h:215
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_msc_iap
  • inc
project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_msc_iap
  • inc
project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_msc_iap
  • inc
project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_msc_iap
  • inc
project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
39
52#define USE_OTG_DEVICE_MODE
53
57/* #define USE_OTG_HOST_MODE */
58
63/* use otgfs1 */
64#define OTG_USB_ID 1
65
66/* use otgfs2 */
67/* #define OTG_USB_ID 2 */
68
69#if (OTG_USB_ID == 1)
70#define USB_ID 0
71#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
72#define OTG_IRQ OTGFS1_IRQn
73#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
74#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
75#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
76#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
77
78#define OTG_PIN_GPIO GPIOA
79#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
80
81#define OTG_PIN_DP GPIO_PINS_12
82#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
83
84#define OTG_PIN_DM GPIO_PINS_11
85#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
86
87#define OTG_PIN_VBUS GPIO_PINS_9
88#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
89
90#define OTG_PIN_ID GPIO_PINS_10
91#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
92
93#define OTG_PIN_SOF_GPIO GPIOA
94#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
95#define OTG_PIN_SOF GPIO_PINS_8
96#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
97
98#define OTG_PIN_MUX GPIO_MUX_10
99#endif
100
101#if (OTG_USB_ID == 2)
102#define USB_ID 1
103#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
104#define OTG_IRQ OTGFS2_IRQn
105#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
106#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
107#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
108#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
109
110#define OTG_PIN_GPIO GPIOB
111#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
112
113#define OTG_PIN_DP GPIO_PINS_15
114#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
115
116#define OTG_PIN_DM GPIO_PINS_14
117#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
118
119#define OTG_PIN_VBUS GPIO_PINS_13
120#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
121
122#define OTG_PIN_ID GPIO_PINS_12
123#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
124
125#define OTG_PIN_SOF_GPIO GPIOA
126#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
127#define OTG_PIN_SOF GPIO_PINS_4
128#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
129
130#define OTG_PIN_MUX GPIO_MUX_12
131#endif
135#ifdef USE_OTG_DEVICE_MODE
139/* otg1 device fifo */
140#define USBD_RX_SIZE 128
141#define USBD_EP0_TX_SIZE 24
142#define USBD_EP1_TX_SIZE 20
143#define USBD_EP2_TX_SIZE 20
144#define USBD_EP3_TX_SIZE 20
145#define USBD_EP4_TX_SIZE 20
146#define USBD_EP5_TX_SIZE 20
147#define USBD_EP6_TX_SIZE 20
148#define USBD_EP7_TX_SIZE 20
149
150/* otg2 device fifo */
151#define USBD2_RX_SIZE 128
152#define USBD2_EP0_TX_SIZE 24
153#define USBD2_EP1_TX_SIZE 20
154#define USBD2_EP2_TX_SIZE 20
155#define USBD2_EP3_TX_SIZE 20
156#define USBD2_EP4_TX_SIZE 20
157#define USBD2_EP5_TX_SIZE 20
158#define USBD2_EP6_TX_SIZE 20
159#define USBD2_EP7_TX_SIZE 20
160
164#ifndef USB_EPT_MAX_NUM
165#define USB_EPT_MAX_NUM 8
166#endif
167#endif
168
172#ifdef USE_OTG_HOST_MODE
173#ifndef USB_HOST_CHANNEL_NUM
174#define USB_HOST_CHANNEL_NUM 16
175#endif
176
180/* otg1 host fifo */
181#define USBH_RX_FIFO_SIZE 128
182#define USBH_NP_TX_FIFO_SIZE 96
183#define USBH_P_TX_FIFO_SIZE 96
184
185/* otg2 host fifo */
186#define USBH2_RX_FIFO_SIZE 128
187#define USBH2_NP_TX_FIFO_SIZE 96
188#define USBH2_P_TX_FIFO_SIZE 96
189#endif
190
194/* #define USB_SOF_OUTPUT_ENABLE */
195
199#define USB_VBUS_IGNORE
200
204/* #define USB_LOW_POWER_WAKUP */
205
206void usb_delay_ms(uint32_t ms);
207void usb_delay_us(uint32_t us);
208
209
217#ifdef __cplusplus
218}
219#endif
220
221#endif
222
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c:392
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c:403


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • virtual_msc_iap
  • src
Functions
project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_msc_iap
  • src
project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • virtual_msc_iap
  • src
Functions
project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_msc_iap
  • src
project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • usb_device
  • virtual_msc_iap
  • src
Functions | Variables
project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "msc_class.h"
#include "msc_desc.h"
#include "flash_fat16.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | button_exint_init (button_type button)
void | button_isr (void)
button handler function More...
void | jump_to_app (uint32_t address)
jump to app More...
void | usb_re_connect (void)
int | main (void)
main function. More...
void | usb_reset ()
usb re-connect More...
void | flash_fat16_loop_status (void)
loop status More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
void(* pftarget )(void)

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • usb_device
  • virtual_msc_iap
  • src
project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "msc_class.h"
33#include "msc_desc.h"
34#include "flash_fat16.h"
35
36
37
46/* usb global struct define */
47 otg_core_type otg_core_struct;
48void (*pftarget)(void);
49void usb_clock48m_select(usb_clk48_s clk_s);
50void usb_gpio_config(void);
51void usb_low_power_wakeup_config(void);
52void button_exint_init(button_type button);
53void button_isr(void);
54void jump_to_app(uint32_t address);
55void usb_re_connect(void);
56
57
63int main(void)
64{
65 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
66
67 system_clock_config();
68
69 flash_fat16_init();
70
71 at32_board_init();
72
73 if(flash_fat16_get_upgrade_flag() == IAP_SUCCESS &&
74 (at32_button_press() == NO_BUTTON))
75 {
76 jump_to_app(flash_iap.flash_app_addr);
77 }
78
79 /* usb gpio config */
80 usb_gpio_config();
81
82#ifdef USB_LOW_POWER_WAKUP
83 usb_low_power_wakeup_config();
84#endif
85
86 /* enable otgfs clock */
87 crm_periph_clock_enable(OTG_CLOCK, TRUE);
88
89 /* select usb 48m clcok source */
90 usb_clock48m_select(USB_CLK_HEXT);
91
92 /* enable otgfs irq */
93 nvic_irq_enable(OTG_IRQ, 0, 0);
94
95 /* init usb */
96 usbd_init(&otg_core_struct,
97 USB_FULL_SPEED_CORE_ID,
98 USB_ID,
99 &msc_class_handler,
100 &msc_desc_handler);
101
102 while(1)
103 {
104 flash_fat16_loop_status();
105 }
106}
107
113void usb_clock48m_select(usb_clk48_s clk_s)
114{
115 if(clk_s == USB_CLK_HICK)
116 {
117 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
118
119 /* enable the acc calibration ready interrupt */
120 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
121
122 /* update the c1\c2\c3 value */
123 acc_write_c1(7980);
124 acc_write_c2(8000);
125 acc_write_c3(8020);
126#if (USB_ID == 0)
127 acc_sof_select(ACC_SOF_OTG1);
128#else
129 acc_sof_select(ACC_SOF_OTG2);
130#endif
131 /* open acc calibration */
132 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
133 }
134 else
135 {
136 switch(system_core_clock)
137 {
138 /* 48MHz */
139 case 48000000:
140 crm_usb_clock_div_set(CRM_USB_DIV_1);
141 break;
142
143 /* 72MHz */
144 case 72000000:
145 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
146 break;
147
148 /* 96MHz */
149 case 96000000:
150 crm_usb_clock_div_set(CRM_USB_DIV_2);
151 break;
152
153 /* 120MHz */
154 case 120000000:
155 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
156 break;
157
158 /* 144MHz */
159 case 144000000:
160 crm_usb_clock_div_set(CRM_USB_DIV_3);
161 break;
162
163 /* 168MHz */
164 case 168000000:
165 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
166 break;
167
168 /* 192MHz */
169 case 192000000:
170 crm_usb_clock_div_set(CRM_USB_DIV_4);
171 break;
172
173 /* 216MHz */
174 case 216000000:
175 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
176 break;
177
178 /* 240MHz */
179 case 240000000:
180 crm_usb_clock_div_set(CRM_USB_DIV_5);
181 break;
182
183 /* 264MHz */
184 case 264000000:
185 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
186 break;
187
188 /* 288MHz */
189 case 288000000:
190 crm_usb_clock_div_set(CRM_USB_DIV_6);
191 break;
192
193 default:
194 break;
195
196 }
197 }
198}
199
205void usb_gpio_config(void)
206{
207 gpio_init_type gpio_init_struct;
208
209 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
210 gpio_default_para_init(&gpio_init_struct);
211
212 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
213 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
214 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
215 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
216
217 /* dp and dm */
218 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
219 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
220
221 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
222 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
223
224#ifdef USB_SOF_OUTPUT_ENABLE
225 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
226 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
227 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
228 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
229#endif
230
231 /* otgfs use vbus pin */
232#ifndef USB_VBUS_IGNORE
233 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
234 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
235 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
236 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
237#endif
238
239
240}
241#ifdef USB_LOW_POWER_WAKUP
247void usb_low_power_wakeup_config(void)
248{
249 exint_init_type exint_init_struct;
250
251 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
252 exint_default_para_init(&exint_init_struct);
253
254 exint_init_struct.line_enable = TRUE;
255 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
256 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
257 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
258 exint_init(&exint_init_struct);
259
260 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
261}
262
268void OTG_WKUP_HANDLER(void)
269{
270 exint_flag_clear(OTG_WKUP_EXINT_LINE);
271}
272
273#endif
274
275
281void usb_reset()
282{
283 delay_ms(1000);
284 usbd_disconnect(&otg_core_struct.dev);
285 delay_ms(1000);
286 usbd_connect(&otg_core_struct.dev);
287}
288
294void flash_fat16_loop_status(void)
295{
296 static uint8_t status = UPGRADE_READY;
297 if(status == flash_iap.msc_up_status)
298 {
299 return;
300 }
301 else
302 {
303 status = flash_iap.msc_up_status;
304 }
305
306 switch(flash_iap.msc_up_status)
307 {
308 case UPGRADE_READY:
309 flash_fat16_set_name((const uint8_t *)"Ready", 5);
310 break;
311 case UPGRAGE_ONGOING:
312 break;
313 case UPGRADE_SUCCESS:
314 flash_fat16_set_name((const uint8_t *)"Success", 7);
315 flash_iap.msc_up_status = UPGRADE_DONE;
316 usb_reset();
317 break;
318 case UPGRADE_FAILED:
319 flash_fat16_set_name((const uint8_t *)"Failed", 6);
320 flash_iap.msc_up_status = UPGRADE_DONE;
321 usb_reset();
322 break;
323 case UPGRADE_LARGE:
324 flash_fat16_set_name((const uint8_t *)"Large", 5);
325 flash_iap.msc_up_status = UPGRADE_DONE;
326 usb_reset();
327 break;
328 case UPGRADE_UNKNOWN:
329 flash_fat16_set_name((const uint8_t *)"Unkown", 6);
330 break;
331 case UPGRADE_DONE:
332 break;
333 case UPGRADE_JUMP:
334 flash_fat16_set_name((const uint8_t *)"Jump", 6);
335 delay_ms(1000);
336 jump_to_app(flash_iap.write_addr);
337 break;
338 default:
339 break;
340 }
341
342}
343
344
350void jump_to_app(uint32_t address)
351{
352 uint32_t stkptr, jumpaddr;
353 stkptr = *(uint32_t *)address;
354 jumpaddr = *(uint32_t *)(address + sizeof(uint32_t));
355
356 /* disable nvic irq and periph clock, clear pending */
357 nvic_irq_disable(OTGFS1_IRQn);
358 nvic_irq_disable(OTGFS2_IRQn);
359
360 __NVIC_ClearPendingIRQ(OTGFS1_IRQn);
361 __NVIC_ClearPendingIRQ(OTGFS2_IRQn);
362
363 crm_periph_clock_enable(CRM_OTGFS1_PERIPH_CLOCK, FALSE);
364 crm_periph_clock_enable(CRM_OTGFS2_PERIPH_CLOCK, FALSE);
365
366 crm_periph_reset(CRM_OTGFS1_PERIPH_RESET, TRUE);
367 crm_periph_reset(CRM_OTGFS1_PERIPH_RESET, FALSE);
368
369 crm_periph_reset(CRM_OTGFS2_PERIPH_RESET, TRUE);
370 crm_periph_reset(CRM_OTGFS2_PERIPH_RESET, FALSE);
371
372 __set_MSP(stkptr);
373 pftarget = (void (*) (void))jumpaddr;
374 pftarget();
375}
376
382void OTG_IRQ_HANDLER(void)
383{
384 usbd_irq_handler(&otg_core_struct);
385}
386
392void usb_delay_ms(uint32_t ms)
393{
394 /* user can define self delay function */
395 delay_ms(ms);
396}
397
403void usb_delay_us(uint32_t us)
404{
405 delay_us(us);
406}
407
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
usb_reset
void usb_reset()
usb re-connect
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c:281
jump_to_app
void jump_to_app(uint32_t address)
jump to app
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c:350
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c:113
button_exint_init
void button_exint_init(button_type button)
main
int main(void)
main function.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c:63
flash_fat16_loop_status
void flash_fat16_loop_status(void)
loop status
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c:294
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c:205
OTG_IRQ_HANDLER
void OTG_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c:382
button_isr
void button_isr(void)
button handler function
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:84
pftarget
void(* pftarget)(void)
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c:48
usb_re_connect
void usb_re_connect(void)
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c:47
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
button_type
button_type
Definition: at32f435_437_board.h:97
NO_BUTTON
@ NO_BUTTON
Definition: at32f435_437_board.h:99
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_reset
void crm_periph_reset(crm_periph_reset_type value, confirm_state new_state)
enable or disable the peripheral reset
Definition: at32f435_437_crm.c:251
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_OTGFS1_PERIPH_CLOCK
@ CRM_OTGFS1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:120
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_OTGFS2_PERIPH_CLOCK
@ CRM_OTGFS2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:117
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
CRM_OTGFS1_PERIPH_RESET
@ CRM_OTGFS1_PERIPH_RESET
Definition: at32f435_437_crm.h:267
CRM_OTGFS2_PERIPH_RESET
@ CRM_OTGFS2_PERIPH_RESET
Definition: at32f435_437_crm.h:264
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_irq_disable
void nvic_irq_disable(IRQn_Type irqn)
disable nvic irq number
Definition: at32f435_437_misc.c:81
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
flash_fat16_set_name
uint32_t flash_fat16_set_name(const uint8_t *file_name, uint8_t len)
set file name
Definition: at_start_f437/examples/usb_device/virtual_msc_iap/src/flash_fat16.c:360
flash_fat16_get_upgrade_flag
uint8_t flash_fat16_get_upgrade_flag(void)
get iap upgrade complete flag
Definition: at_start_f437/examples/usb_device/virtual_msc_iap/src/flash_fat16.c:270
flash_iap
flash_iap_type flash_iap
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/src/flash_fat16.c:173
flash_fat16_init
void flash_fat16_init(void)
flash fat16 iap init
Definition: at_start_f437/examples/usb_device/virtual_msc_iap/src/flash_fat16.c:712
UPGRADE_LARGE
@ UPGRADE_LARGE
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:86
UPGRADE_UNKNOWN
@ UPGRADE_UNKNOWN
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:87
UPGRADE_JUMP
@ UPGRADE_JUMP
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:89
UPGRADE_FAILED
@ UPGRADE_FAILED
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:85
UPGRADE_SUCCESS
@ UPGRADE_SUCCESS
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:84
UPGRADE_READY
@ UPGRADE_READY
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:82
UPGRAGE_ONGOING
@ UPGRAGE_ONGOING
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:83
UPGRADE_DONE
@ UPGRADE_DONE
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:88
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
IAP_SUCCESS
@ IAP_SUCCESS
Definition: hid_iap_class.h:87
msc_class_handler
usbd_class_handler msc_class_handler
Definition: msc_class.c:57
msc_desc_handler
usbd_desc_handler msc_desc_handler
device descriptor handler structure
Definition: msc_desc.c:64
usbd_connect
void usbd_connect(usbd_core_type *udev)
usb device connect to host
Definition: usbd_core.c:369
usbd_disconnect
void usbd_disconnect(usbd_core_type *udev)
usb device disconnect to host
Definition: usbd_core.c:379
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
OTGFS2_IRQn
@ OTGFS2_IRQn
Definition: at32f435_437.h:220
OTGFS1_IRQn
@ OTGFS1_IRQn
Definition: at32f435_437.h:213
msc_class.h
usb msc class file
msc_desc.h
usb msc descriptor header file
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
flash_iap_type::msc_up_status
upgrade_status_type msc_up_status
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:122
flash_iap_type::write_addr
uint32_t write_addr
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:120
flash_iap_type::flash_app_addr
uint32_t flash_app_addr
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:111
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • usb_host
  • hid_demo
  • inc
project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • usb_host
  • hid_demo
  • inc
project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • usb_host
  • hid_demo
  • inc
project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • at_start_f435
  • examples
  • usb_host
  • hid_demo
  • inc
project/at_start_f435/examples/usb_host/hid_demo/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
50/* #define USE_OTG_DEVICE_MODE */
51
55#define USE_OTG_HOST_MODE
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65/* #define OTG_USB_ID 2 */
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97
98#define OTG_PIN_POWER_SWITCH_GPIO GPIOH
99#define OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOH_PERIPH_CLOCK
100#define OTG_PIN_POWER_SWITCH GPIO_PINS_3
101#endif
102
103#if (OTG_USB_ID == 2)
104#define USB_ID 1
105#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
106#define OTG_IRQ OTGFS2_IRQn
107#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
108#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
109#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
110#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
111
112#define OTG_PIN_GPIO GPIOB
113#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
114
115#define OTG_PIN_DP GPIO_PINS_15
116#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
117
118#define OTG_PIN_DM GPIO_PINS_14
119#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
120
121#define OTG_PIN_VBUS GPIO_PINS_13
122#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
123
124#define OTG_PIN_ID GPIO_PINS_12
125#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
126
127#define OTG_PIN_SOF_GPIO GPIOA
128#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
129#define OTG_PIN_SOF GPIO_PINS_4
130#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
131
132#define OTG_PIN_MUX GPIO_MUX_12
133
134#define OTG_PIN_POWER_SWITCH_GPIO GPIOB
135#define OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOB_PERIPH_CLOCK
136#define OTG_PIN_POWER_SWITCH GPIO_PINS_10
137#endif
138
142#ifdef USE_OTG_DEVICE_MODE
146/* otg1 device fifo */
147#define USBD_RX_SIZE 128
148#define USBD_EP0_TX_SIZE 24
149#define USBD_EP1_TX_SIZE 20
150#define USBD_EP2_TX_SIZE 20
151#define USBD_EP3_TX_SIZE 20
152#define USBD_EP4_TX_SIZE 20
153#define USBD_EP5_TX_SIZE 20
154#define USBD_EP6_TX_SIZE 20
155#define USBD_EP7_TX_SIZE 20
156
157/* otg2 device fifo */
158#define USBD2_RX_SIZE 128
159#define USBD2_EP0_TX_SIZE 24
160#define USBD2_EP1_TX_SIZE 20
161#define USBD2_EP2_TX_SIZE 20
162#define USBD2_EP3_TX_SIZE 20
163#define USBD2_EP4_TX_SIZE 20
164#define USBD2_EP5_TX_SIZE 20
165#define USBD2_EP6_TX_SIZE 20
166#define USBD2_EP7_TX_SIZE 20
167
171#ifndef USB_EPT_MAX_NUM
172#define USB_EPT_MAX_NUM 8
173#endif
174#endif
175
179#ifdef USE_OTG_HOST_MODE
180
181#ifndef USB_HOST_CHANNEL_NUM
182#define USB_HOST_CHANNEL_NUM 16
183#endif
184
188/* otg1 host fifo */
189#define USBH_RX_FIFO_SIZE 128
190#define USBH_NP_TX_FIFO_SIZE 96
191#define USBH_P_TX_FIFO_SIZE 96
192
193/* otg2 host fifo */
194#define USBH2_RX_FIFO_SIZE 128
195#define USBH2_NP_TX_FIFO_SIZE 96
196#define USBH2_P_TX_FIFO_SIZE 96
197
198/* usb host vbus power switch */
199#define USBH_5V_POWER_SWITCH
200
201#endif
202
206/* #define USB_SOF_OUTPUT_ENABLE */
207
211#define USB_VBUS_IGNORE
212
216/* #define USB_LOW_POWER_WAKUP */
217
218#define USBH_DEBUG_ENABLE
219
220#ifdef USBH_DEBUG_ENABLE
221#define USBH_DEBUG(...) printf(__VA_ARGS__);\
222 printf("\r\n");
223#else
224#define USBH_DEBUG(...)
225#endif
226
227void usb_delay_ms(uint32_t ms);
228void usb_delay_us(uint32_t us);
236#ifdef __cplusplus
237}
238#endif
239
240#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb delay millisecond function.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/main.c:329
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/main.c:340


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • usb_host
  • hid_demo
  • src
Functions
project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • usb_host
  • hid_demo
  • src
project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • usb_host
  • hid_demo
  • src
Functions
project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • usb_host
  • hid_demo
  • src
project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • usb_host
  • hid_demo
  • src
Functions | Variables
project/at_start_f435/examples/usb_host/hid_demo/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbh_int.h"
#include "usbh_hid_class.h"
#include "usbh_user.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | button_exint_init (void)
configure button exint More...
void | button_isr (void)
button handler function More...
void | EXINT0_IRQHandler (void)
exint0 interrupt handler More...
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_host/hid_demo/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • usb_host
  • hid_demo
  • src
project/at_start_f435/examples/usb_host/hid_demo/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbh_int.h"
32#include "usbh_hid_class.h"
33#include "usbh_user.h"
34
43/* usb global struct define */
44 otg_core_type otg_core_struct;
45void usb_clock48m_select(usb_clk48_s clk_s);
46void usb_gpio_config(void);
47void usb_low_power_wakeup_config(void);
48void button_exint_init(void);
49void button_isr(void);
50
56void button_exint_init(void)
57{
58 exint_init_type exint_init_struct;
59
60 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
61 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
62
63 exint_default_para_init(&exint_init_struct);
64 exint_init_struct.line_enable = TRUE;
65 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
66 exint_init_struct.line_select = EXINT_LINE_0;
67 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
68 exint_init(&exint_init_struct);
69
70 nvic_irq_enable(EXINT0_IRQn, 0, 0);
71}
72
78void EXINT0_IRQHandler(void)
79{
80 delay_ms(50);
81 exint_flag_clear(EXINT_LINE_0);
82 if(USBH_CLASS == otg_core_struct.host.global_state)
83 {
84 otg_core_struct.host.global_state = USBH_SUSPEND;
85 USBH_DEBUG("Host Start Enter Suspend Mode");
86 }
87 else if(USBH_SUSPENDED == otg_core_struct.host.global_state)
88 {
89 otg_core_struct.host.global_state = USBH_WAKEUP;
90 USBH_DEBUG("Host Start Wakeup");
91 }
92}
93
99int main(void)
100{
101 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
102
103 system_clock_config();
104
105 at32_board_init();
106
107 button_exint_init();
108
109 /* usb gpio config */
110 usb_gpio_config();
111
112 uart_print_init(115200);
113
114#ifdef USB_LOW_POWER_WAKUP
115 usb_low_power_wakeup_config();
116#endif
117
118 /* enable otgfs clock */
119 crm_periph_clock_enable(OTG_CLOCK, TRUE);
120
121 /* select usb 48m clcok source */
122 usb_clock48m_select(USB_CLK_HEXT);
123
124 /* enable otgfs irq */
125 nvic_irq_enable(OTG_IRQ, 0, 0);
126
127 /* init usb */
128 usbh_init(&otg_core_struct,
129 USB_FULL_SPEED_CORE_ID,
130 USB_ID,
131 &uhost_hid_class_handler,
132 &usbh_user_handle);
133 while(1)
134 {
135 usbh_loop_handler(&otg_core_struct.host);
136 }
137}
138
144void usb_clock48m_select(usb_clk48_s clk_s)
145{
146 if(clk_s == USB_CLK_HICK)
147 {
148 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
149
150 /* enable the acc calibration ready interrupt */
151 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
152
153 /* update the c1\c2\c3 value */
154 acc_write_c1(7980);
155 acc_write_c2(8000);
156 acc_write_c3(8020);
157
158 /* open acc calibration */
159 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
160 }
161 else
162 {
163 switch(system_core_clock)
164 {
165 /* 48MHz */
166 case 48000000:
167 crm_usb_clock_div_set(CRM_USB_DIV_1);
168 break;
169
170 /* 72MHz */
171 case 72000000:
172 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
173 break;
174
175 /* 96MHz */
176 case 96000000:
177 crm_usb_clock_div_set(CRM_USB_DIV_2);
178 break;
179
180 /* 120MHz */
181 case 120000000:
182 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
183 break;
184
185 /* 144MHz */
186 case 144000000:
187 crm_usb_clock_div_set(CRM_USB_DIV_3);
188 break;
189
190 /* 168MHz */
191 case 168000000:
192 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
193 break;
194
195 /* 192MHz */
196 case 192000000:
197 crm_usb_clock_div_set(CRM_USB_DIV_4);
198 break;
199
200 /* 216MHz */
201 case 216000000:
202 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
203 break;
204
205 /* 240MHz */
206 case 240000000:
207 crm_usb_clock_div_set(CRM_USB_DIV_5);
208 break;
209
210 /* 264MHz */
211 case 264000000:
212 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
213 break;
214
215 /* 288MHz */
216 case 288000000:
217 crm_usb_clock_div_set(CRM_USB_DIV_6);
218 break;
219
220 default:
221 break;
222
223 }
224 }
225}
226
232void usb_gpio_config(void)
233{
234 gpio_init_type gpio_init_struct;
235
236 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
237 gpio_default_para_init(&gpio_init_struct);
238
239 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
240 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
241 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
242 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
243
244 /* dp and dm */
245 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
246 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
247
248 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
249 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
250
251#ifdef USB_SOF_OUTPUT_ENABLE
252 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
253 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
254 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
255 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
256#endif
257
258 /* otgfs use vbus pin */
259#ifndef USB_VBUS_IGNORE
260 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
261 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
262 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
263 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
264#endif
265
266#ifdef USBH_5V_POWER_SWITCH
267 crm_periph_clock_enable(OTG_PIN_POWER_SWITCH_CLOCK, TRUE);
268 gpio_bits_set(OTG_PIN_POWER_SWITCH_GPIO, OTG_PIN_POWER_SWITCH);
269
270 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
271 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
272 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
273 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
274 gpio_init_struct.gpio_pins = OTG_PIN_POWER_SWITCH;
275 gpio_init(OTG_PIN_POWER_SWITCH_GPIO, &gpio_init_struct);
276#endif
277
278
279}
280#ifdef USB_LOW_POWER_WAKUP
286void usb_low_power_wakeup_config(void)
287{
288 exint_init_type exint_init_struct;
289
290 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
291 exint_default_para_init(&exint_init_struct);
292
293 exint_init_struct.line_enable = TRUE;
294 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
295 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
296 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
297 exint_init(&exint_init_struct);
298
299 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
300}
301
307void OTG_WKUP_HANDLER(void)
308{
309 exint_flag_clear(OTG_WKUP_EXINT_LINE);
310}
311
312#endif
313
319void OTG_IRQ_HANDLER(void)
320{
321 usbh_irq_handler(&otg_core_struct);
322}
323
329void usb_delay_ms(uint32_t ms)
330{
331 /* user can define self delay function */
332 delay_ms(ms);
333}
334
340void usb_delay_us(uint32_t us)
341{
342 delay_us(us);
343}
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
OTG_PIN_POWER_SWITCH_GPIO
#define OTG_PIN_POWER_SWITCH_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:91
OTG_PIN_POWER_SWITCH
#define OTG_PIN_POWER_SWITCH
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:93
OTG_PIN_POWER_SWITCH_CLOCK
#define OTG_PIN_POWER_SWITCH_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:92
usbh_user_handle
usbh_user_handler_type usbh_user_handle
Definition: at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c:50
USBH_DEBUG
#define USBH_DEBUG(...)
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:206
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/main.c:56
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/main.c:144
main
int main(void)
main function.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/main.c:99
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/main.c:232
OTG_IRQ_HANDLER
void OTG_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/main.c:319
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/main.c:78
button_isr
void button_isr(void)
button handler function
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:84
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f435/examples/usb_host/hid_demo/src/main.c:44
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbh_loop_handler
usb_sts_type usbh_loop_handler(usbh_core_type *uhost)
usb host enum loop handler
Definition: usbh_core.c:1142
uhost_hid_class_handler
usbh_class_handler_type uhost_hid_class_handler
Definition: usbh_hid_class.c:52
usbh_irq_handler
void usbh_irq_handler(otg_core_type *hdev)
usb host interrupt handler
Definition: usbh_int.c:47
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbh_hid_class.h
usb host hid class header file
usbh_int.h
usb header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • usb_host
  • msc_only_fat32
  • inc
project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • usb_host
  • msc_only_fat32
  • inc
project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • usb_host
  • msc_only_fat32
  • inc
project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • at_start_f435
  • examples
  • usb_host
  • msc_only_fat32
  • inc
project/at_start_f435/examples/usb_host/msc_only_fat32/inc/usb_conf.h
Go to the documentation of this file.
1
26/* define to prevent recursive inclusion -------------------------------------*/
27#ifndef __USB_CONF_H
28#define __USB_CONF_H
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#include "at32f435_437_usb.h"
35#include "at32f435_437.h"
36#include "stdio.h"
37
49/* #define USE_OTG_DEVICE_MODE */
50
54#define USE_OTG_HOST_MODE
55
60/* use otgfs1 */
61#define OTG_USB_ID 1
62
63/* use otgfs2 */
64/* #define OTG_USB_ID 2 */
65
66#if (OTG_USB_ID == 1)
67#define USB_ID 0
68#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
69#define OTG_IRQ OTGFS1_IRQn
70#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
71#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
72#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
73#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
74
75#define OTG_PIN_GPIO GPIOA
76#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
77
78#define OTG_PIN_DP GPIO_PINS_12
79#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
80
81#define OTG_PIN_DM GPIO_PINS_11
82#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
83
84#define OTG_PIN_VBUS GPIO_PINS_9
85#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
86
87#define OTG_PIN_ID GPIO_PINS_10
88#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
89
90#define OTG_PIN_SOF_GPIO GPIOA
91#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
92#define OTG_PIN_SOF GPIO_PINS_8
93#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
94
95#define OTG_PIN_MUX GPIO_MUX_10
96
97#define OTG_PIN_POWER_SWITCH_GPIO GPIOH
98#define OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOH_PERIPH_CLOCK
99#define OTG_PIN_POWER_SWITCH GPIO_PINS_3
100#endif
101
102#if (OTG_USB_ID == 2)
103#define USB_ID 1
104#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
105#define OTG_IRQ OTGFS2_IRQn
106#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
107#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
108#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
109#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
110
111#define OTG_PIN_GPIO GPIOB
112#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
113
114#define OTG_PIN_DP GPIO_PINS_15
115#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
116
117#define OTG_PIN_DM GPIO_PINS_14
118#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
119
120#define OTG_PIN_VBUS GPIO_PINS_13
121#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
122
123#define OTG_PIN_ID GPIO_PINS_12
124#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
125
126#define OTG_PIN_SOF_GPIO GPIOA
127#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
128#define OTG_PIN_SOF GPIO_PINS_4
129#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
130
131#define OTG_PIN_MUX GPIO_MUX_12
132
133#define OTG_PIN_POWER_SWITCH_GPIO GPIOB
134#define OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOB_PERIPH_CLOCK
135#define OTG_PIN_POWER_SWITCH GPIO_PINS_10
136#endif
137
141#ifdef USE_OTG_DEVICE_MODE
145/* otg1 device fifo */
146#define USBD_RX_SIZE 128
147#define USBD_EP0_TX_SIZE 24
148#define USBD_EP1_TX_SIZE 20
149#define USBD_EP2_TX_SIZE 20
150#define USBD_EP3_TX_SIZE 20
151#define USBD_EP4_TX_SIZE 20
152#define USBD_EP5_TX_SIZE 20
153#define USBD_EP6_TX_SIZE 20
154#define USBD_EP7_TX_SIZE 20
155
156/* otg2 device fifo */
157#define USBD2_RX_SIZE 128
158#define USBD2_EP0_TX_SIZE 24
159#define USBD2_EP1_TX_SIZE 20
160#define USBD2_EP2_TX_SIZE 20
161#define USBD2_EP3_TX_SIZE 20
162#define USBD2_EP4_TX_SIZE 20
163#define USBD2_EP5_TX_SIZE 20
164#define USBD2_EP6_TX_SIZE 20
165#define USBD2_EP7_TX_SIZE 20
166
170#ifndef USB_EPT_MAX_NUM
171#define USB_EPT_MAX_NUM 8
172#endif
173#endif
174
178#ifdef USE_OTG_HOST_MODE
179#ifndef USB_HOST_CHANNEL_NUM
180#define USB_HOST_CHANNEL_NUM 16
181#endif
182
186/* otg1 host fifo */
187#define USBH_RX_FIFO_SIZE 128
188#define USBH_NP_TX_FIFO_SIZE 96
189#define USBH_P_TX_FIFO_SIZE 96
190
191/* otg2 host fifo */
192#define USBH2_RX_FIFO_SIZE 128
193#define USBH2_NP_TX_FIFO_SIZE 96
194#define USBH2_P_TX_FIFO_SIZE 96
195
196/* usb host vbus power switch */
197#define USBH_5V_POWER_SWITCH
198#endif
199
203/* #define USB_SOF_OUTPUT_ENABLE */
204
208#define USB_VBUS_IGNORE
209
213/* #define USB_LOW_POWER_WAKUP */
214
215#define USBH_DEBUG_ENABLE
216
217#ifdef USBH_DEBUG_ENABLE
218#define USBH_DEBUG(...) printf(__VA_ARGS__);\
219 printf("\r\n");
220#else
221#define USBH_DEBUG(...)
222#endif
223
224void usb_delay_ms(uint32_t ms);
225void usb_delay_us(uint32_t us);
226
234#ifdef __cplusplus
235}
236#endif
237
238#endif
239
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb delay millisecond function.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c:283
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c:294


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • usb_host
  • msc_only_fat32
  • src
Functions
project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • usb_host
  • msc_only_fat32
  • src
project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • usb_host
  • msc_only_fat32
  • src
Functions
project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • usb_host
  • msc_only_fat32
  • src
project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c
Go to the documentation of this file.
1
26/* includes ------------------------------------------------------------------*/
27#include "at32f435_437_int.h"
40void NMI_Handler(void)
41{
42}
43
49void HardFault_Handler(void)
50{
51 /* go to infinite loop when hard fault exception occurs */
52 while (1)
53 {
54 }
55}
56
62void MemManage_Handler(void)
63{
64 /* go to infinite loop when memory manage exception occurs */
65 while (1)
66 {
67 }
68}
69
75void BusFault_Handler(void)
76{
77 /* go to infinite loop when bus fault exception occurs */
78 while (1)
79 {
80 }
81}
82
88void UsageFault_Handler(void)
89{
90 /* go to infinite loop when usage fault exception occurs */
91 while (1)
92 {
93 }
94}
95
101void SVC_Handler(void)
102{
103}
104
110void DebugMon_Handler(void)
111{
112}
113
119void PendSV_Handler(void)
120{
121}
122
128void SysTick_Handler(void)
129{
130}
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c:88
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c:49
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c:62
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c:101
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c:119
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c:40
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c:75
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c:128
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c:110
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • usb_host
  • msc_only_fat32
  • src
Functions | Variables
project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbh_int.h"
#include "usbh_user.h"
#include "usbh_msc_class.h"
#include "ff.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • usb_host
  • msc_only_fat32
  • src
project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbh_int.h"
32#include "usbh_user.h"
33#include "usbh_msc_class.h"
34#include "ff.h"
35
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46void usb_clock48m_select(usb_clk48_s clk_s);
47void usb_gpio_config(void);
48void usb_low_power_wakeup_config(void);
49
55int main(void)
56{
57 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
58
59 system_clock_config();
60
61 at32_board_init();
62
63 /* usb gpio config */
64 usb_gpio_config();
65
66#ifdef USB_LOW_POWER_WAKUP
67 usb_low_power_wakeup_config();
68#endif
69
70 uart_print_init(115200);
71
72 /* enable otgfs clock */
73 crm_periph_clock_enable(OTG_CLOCK, TRUE);
74
75 /* select usb 48m clcok source */
76 usb_clock48m_select(USB_CLK_HEXT);
77
78 /* enable otgfs irq */
79 nvic_irq_enable(OTG_IRQ, 0, 0);
80
81 /* init usb */
82 usbh_init(&otg_core_struct,
83 USB_FULL_SPEED_CORE_ID,
84 USB_ID,
85 &uhost_msc_class_handler,
86 &usbh_user_handle);
87 while(1)
88 {
89 usbh_loop_handler(&otg_core_struct.host);
90 }
91}
92
98void usb_clock48m_select(usb_clk48_s clk_s)
99{
100 if(clk_s == USB_CLK_HICK)
101 {
102 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
103
104 /* enable the acc calibration ready interrupt */
105 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
106
107 /* update the c1\c2\c3 value */
108 acc_write_c1(7980);
109 acc_write_c2(8000);
110 acc_write_c3(8020);
111
112 /* open acc calibration */
113 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
114 }
115 else
116 {
117 switch(system_core_clock)
118 {
119 /* 48MHz */
120 case 48000000:
121 crm_usb_clock_div_set(CRM_USB_DIV_1);
122 break;
123
124 /* 72MHz */
125 case 72000000:
126 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
127 break;
128
129 /* 96MHz */
130 case 96000000:
131 crm_usb_clock_div_set(CRM_USB_DIV_2);
132 break;
133
134 /* 120MHz */
135 case 120000000:
136 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
137 break;
138
139 /* 144MHz */
140 case 144000000:
141 crm_usb_clock_div_set(CRM_USB_DIV_3);
142 break;
143
144 /* 168MHz */
145 case 168000000:
146 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
147 break;
148
149 /* 192MHz */
150 case 192000000:
151 crm_usb_clock_div_set(CRM_USB_DIV_4);
152 break;
153
154 /* 216MHz */
155 case 216000000:
156 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
157 break;
158
159 /* 240MHz */
160 case 240000000:
161 crm_usb_clock_div_set(CRM_USB_DIV_5);
162 break;
163
164 /* 264MHz */
165 case 264000000:
166 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
167 break;
168
169 /* 288MHz */
170 case 288000000:
171 crm_usb_clock_div_set(CRM_USB_DIV_6);
172 break;
173
174 default:
175 break;
176
177 }
178 }
179}
180
186void usb_gpio_config(void)
187{
188 gpio_init_type gpio_init_struct;
189
190 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
191 gpio_default_para_init(&gpio_init_struct);
192
193 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
194 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
195 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
196 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
197
198 /* dp and dm */
199 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
200 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
201
202 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
203 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
204
205#ifdef USB_SOF_OUTPUT_ENABLE
206 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
207 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
208 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
209 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
210#endif
211
212 /* otgfs use vbus pin */
213#ifndef USB_VBUS_IGNORE
214 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
215 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
216 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
217 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
218#endif
219
220#ifdef USBH_5V_POWER_SWITCH
221 crm_periph_clock_enable(OTG_PIN_POWER_SWITCH_CLOCK, TRUE);
222 gpio_bits_set(OTG_PIN_POWER_SWITCH_GPIO, OTG_PIN_POWER_SWITCH);
223
224 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
225 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
226 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
227 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
228 gpio_init_struct.gpio_pins = OTG_PIN_POWER_SWITCH;
229 gpio_init(OTG_PIN_POWER_SWITCH_GPIO, &gpio_init_struct);
230#endif
231
232
233}
234#ifdef USB_LOW_POWER_WAKUP
240void usb_low_power_wakeup_config(void)
241{
242 exint_init_type exint_init_struct;
243
244 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
245 exint_default_para_init(&exint_init_struct);
246
247 exint_init_struct.line_enable = TRUE;
248 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
249 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
250 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
251 exint_init(&exint_init_struct);
252
253 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
254}
255
261void OTG_WKUP_HANDLER(void)
262{
263 exint_flag_clear(OTG_WKUP_EXINT_LINE);
264}
265
266#endif
267
273void OTG_IRQ_HANDLER(void)
274{
275 usbh_irq_handler(&otg_core_struct);
276}
277
283void usb_delay_ms(uint32_t ms)
284{
285 /* user can define self delay function */
286 delay_ms(ms);
287}
288
294void usb_delay_us(uint32_t us)
295{
296 delay_us(us);
297}
298
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
OTG_PIN_POWER_SWITCH_GPIO
#define OTG_PIN_POWER_SWITCH_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:91
OTG_PIN_POWER_SWITCH
#define OTG_PIN_POWER_SWITCH
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:93
OTG_PIN_POWER_SWITCH_CLOCK
#define OTG_PIN_POWER_SWITCH_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:92
usbh_user_handle
usbh_user_handler_type usbh_user_handle
Definition: at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c:50
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c:98
main
int main(void)
main function.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c:55
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c:186
OTG_IRQ_HANDLER
void OTG_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c:273
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c:45
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbh_loop_handler
usb_sts_type usbh_loop_handler(usbh_core_type *uhost)
usb host enum loop handler
Definition: usbh_core.c:1142
usbh_irq_handler
void usbh_irq_handler(otg_core_type *hdev)
usb host interrupt handler
Definition: usbh_int.c:47
uhost_msc_class_handler
usbh_class_handler_type uhost_msc_class_handler
Definition: usbh_msc_class.c:55
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbh_int.h
usb header file
usbh_msc_class.h
usb host msc class header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • usb_host
  • two_otg_host_demo
  • inc
project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • usb_host
  • two_otg_host_demo
  • inc
project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • usb_host
  • two_otg_host_demo
  • inc
project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • at_start_f435
  • examples
  • usb_host
  • two_otg_host_demo
  • inc
project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usb_conf.h
Go to the documentation of this file.
1
26/* define to prevent recursive inclusion -------------------------------------*/
27#ifndef __USB_CONF_H
28#define __USB_CONF_H
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#include "at32f435_437_usb.h"
35#include "at32f435_437.h"
36#include "stdio.h"
37
49/* #define USE_OTG_DEVICE_MODE */
50
54#define USE_OTG_HOST_MODE
55
61#define USB_ID 0
62#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
63#define OTG_IRQ OTGFS1_IRQn
64#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
65#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
66#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
67#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
68
69#define OTG_PIN_GPIO GPIOA
70#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
71
72#define OTG_PIN_DP GPIO_PINS_12
73#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
74
75#define OTG_PIN_DM GPIO_PINS_11
76#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
77
78#define OTG_PIN_VBUS GPIO_PINS_9
79#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
80
81#define OTG_PIN_ID GPIO_PINS_10
82#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
83
84#define OTG_PIN_SOF_GPIO GPIOA
85#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
86#define OTG_PIN_SOF GPIO_PINS_8
87#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
88
89#define OTG_PIN_MUX GPIO_MUX_10
90
91#define OTG_PIN_POWER_SWITCH_GPIO GPIOH
92#define OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOH_PERIPH_CLOCK
93#define OTG_PIN_POWER_SWITCH GPIO_PINS_3
94
95
96#define USB2_ID 1
97#define OTG2_CLOCK CRM_OTGFS2_PERIPH_CLOCK
98#define OTG2_IRQ OTGFS2_IRQn
99#define OTG2_IRQ_HANDLER OTGFS2_IRQHandler
100#define OTG2_WKUP_IRQ OTGFS2_WKUP_IRQn
101#define OTG2_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
102#define OTG2_WKUP_EXINT_LINE EXINT_LINE_20
103
104#define OTG2_PIN_GPIO GPIOB
105#define OTG2_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
106
107#define OTG2_PIN_DP GPIO_PINS_15
108#define OTG2_PIN_DP_SOURCE GPIO_PINS_SOURCE15
109
110#define OTG2_PIN_DM GPIO_PINS_14
111#define OTG2_PIN_DM_SOURCE GPIO_PINS_SOURCE14
112
113#define OTG2_PIN_VBUS GPIO_PINS_13
114#define OTG2_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
115
116#define OTG2_PIN_ID GPIO_PINS_12
117#define OTG2_PIN_ID_SOURCE GPIO_PINS_SOURCE10
118
119#define OTG2_PIN_SOF_GPIO GPIOA
120#define OTG2_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
121#define OTG2_PIN_SOF GPIO_PINS_4
122#define OTG2_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
123
124#define OTG2_PIN_MUX GPIO_MUX_12
125
126
127#define OTG2_PIN_POWER_SWITCH_GPIO GPIOB
128#define OTG2_PIN_POWER_SWITCH_CLOCK CRM_GPIOB_PERIPH_CLOCK
129#define OTG2_PIN_POWER_SWITCH GPIO_PINS_10
130
131
135#ifdef USE_OTG_DEVICE_MODE
139/* otg1 device fifo */
140#define USBD_RX_SIZE 128
141#define USBD_EP0_TX_SIZE 24
142#define USBD_EP1_TX_SIZE 20
143#define USBD_EP2_TX_SIZE 20
144#define USBD_EP3_TX_SIZE 20
145#define USBD_EP4_TX_SIZE 20
146#define USBD_EP5_TX_SIZE 20
147#define USBD_EP6_TX_SIZE 20
148#define USBD_EP7_TX_SIZE 20
149
150/* otg2 device fifo */
151#define USBD2_RX_SIZE 128
152#define USBD2_EP0_TX_SIZE 24
153#define USBD2_EP1_TX_SIZE 20
154#define USBD2_EP2_TX_SIZE 20
155#define USBD2_EP3_TX_SIZE 20
156#define USBD2_EP4_TX_SIZE 20
157#define USBD2_EP5_TX_SIZE 20
158#define USBD2_EP6_TX_SIZE 20
159#define USBD2_EP7_TX_SIZE 20
160
164#ifndef USB_EPT_MAX_NUM
165#define USB_EPT_MAX_NUM 8
166#endif
167#endif
168
172#ifdef USE_OTG_HOST_MODE
173#ifndef USB_HOST_CHANNEL_NUM
174#define USB_HOST_CHANNEL_NUM 16
175#endif
176
180/* otg1 host fifo */
181#define USBH_RX_FIFO_SIZE 128
182#define USBH_NP_TX_FIFO_SIZE 96
183#define USBH_P_TX_FIFO_SIZE 96
184
185/* otg2 host fifo */
186#define USBH2_RX_FIFO_SIZE 128
187#define USBH2_NP_TX_FIFO_SIZE 96
188#define USBH2_P_TX_FIFO_SIZE 96
189
190/* usb host vbus power switch */
191#define USBH_5V_POWER_SWITCH
192#endif
193
197/* #define USB_SOF_OUTPUT_ENABLE */
198
202#define USB_VBUS_IGNORE
203
207/* #define USB_LOW_POWER_WAKUP */
208
209#define USBH_DEBUG_ENABLE
210
211#ifdef USBH_DEBUG_ENABLE
212#define USBH_DEBUG(...) printf(__VA_ARGS__);\
213 printf("\r\n");
214#else
215#define USBH_DEBUG(...)
216#endif
217
218void usb_delay_ms(uint32_t ms);
219void usb_delay_us(uint32_t us);
220
228#ifdef __cplusplus
229}
230#endif
231
232#endif
233
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb delay millisecond function.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c:366
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c:377


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • usb_host
  • two_otg_host_demo
  • src
Functions
project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • usb_host
  • two_otg_host_demo
  • src
project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • usb_host
  • two_otg_host_demo
  • src
Functions
project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • usb_host
  • two_otg_host_demo
  • src
project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c
Go to the documentation of this file.
1
26/* includes ------------------------------------------------------------------*/
27#include "at32f435_437_int.h"
40void NMI_Handler(void)
41{
42}
43
49void HardFault_Handler(void)
50{
51 /* go to infinite loop when hard fault exception occurs */
52 while (1)
53 {
54 }
55}
56
62void MemManage_Handler(void)
63{
64 /* go to infinite loop when memory manage exception occurs */
65 while (1)
66 {
67 }
68}
69
75void BusFault_Handler(void)
76{
77 /* go to infinite loop when bus fault exception occurs */
78 while (1)
79 {
80 }
81}
82
88void UsageFault_Handler(void)
89{
90 /* go to infinite loop when usage fault exception occurs */
91 while (1)
92 {
93 }
94}
95
101void SVC_Handler(void)
102{
103}
104
110void DebugMon_Handler(void)
111{
112}
113
119void PendSV_Handler(void)
120{
121}
122
128void SysTick_Handler(void)
129{
130}
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c:88
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c:49
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c:62
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c:101
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c:119
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c:40
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c:75
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c:128
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c:110
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • usb_host
  • two_otg_host_demo
  • src
Functions | Variables
project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbh_int.h"
#include "usbh_user.h"
#include "usbh_msc_class.h"
#include "usbh_hid_class.h"
#include "ff.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | OTG2_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
otg_core_type otg2_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • usb_host
  • two_otg_host_demo
  • src
project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbh_int.h"
32#include "usbh_user.h"
33#include "usbh_msc_class.h"
34#include "usbh_hid_class.h"
35#include "ff.h"
36
45/* usb global struct define */
46 otg_core_type otg_core_struct;
47 otg_core_type otg2_core_struct;
48void usb_clock48m_select(usb_clk48_s clk_s);
49void usb_gpio_config(void);
50void usb_low_power_wakeup_config(void);
51
57int main(void)
58{
59 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
60
61 system_clock_config();
62
63 at32_board_init();
64
65 /* usb gpio config */
66 usb_gpio_config();
67
68#ifdef USB_LOW_POWER_WAKUP
69 usb_low_power_wakeup_config();
70#endif
71
72 uart_print_init(115200);
73
74 /* enable otgfs clock */
75 crm_periph_clock_enable(OTG_CLOCK, TRUE);
76 crm_periph_clock_enable(OTG2_CLOCK, TRUE);
77
78 /* select usb 48m clcok source */
79 usb_clock48m_select(USB_CLK_HEXT);
80
81 /* enable otgfs irq */
82 nvic_irq_enable(OTG_IRQ, 0, 0);
83 nvic_irq_enable(OTG2_IRQ, 0, 0);
84
85 /* init otg1 host */
86 usbh_init(&otg_core_struct,
87 USB_FULL_SPEED_CORE_ID,
88 USB_ID,
89 &uhost_msc_class_handler,
90 &usbh_user_handle);
91 /* init otg2 host */
92 usbh_init(&otg2_core_struct,
93 USB_FULL_SPEED_CORE_ID,
94 USB2_ID,
95 &uhost_hid_class_handler,
96 &usbh_user_handle);
97 while(1)
98 {
99 usbh_loop_handler(&otg_core_struct.host);
100 usbh_loop_handler(&otg2_core_struct.host);
101 }
102}
103
109void usb_clock48m_select(usb_clk48_s clk_s)
110{
111 if(clk_s == USB_CLK_HICK)
112 {
113 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
114
115 /* enable the acc calibration ready interrupt */
116 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
117
118 /* update the c1\c2\c3 value */
119 acc_write_c1(7980);
120 acc_write_c2(8000);
121 acc_write_c3(8020);
122
123 /* open acc calibration */
124 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
125 }
126 else
127 {
128 switch(system_core_clock)
129 {
130 /* 48MHz */
131 case 48000000:
132 crm_usb_clock_div_set(CRM_USB_DIV_1);
133 break;
134
135 /* 72MHz */
136 case 72000000:
137 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
138 break;
139
140 /* 96MHz */
141 case 96000000:
142 crm_usb_clock_div_set(CRM_USB_DIV_2);
143 break;
144
145 /* 120MHz */
146 case 120000000:
147 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
148 break;
149
150 /* 144MHz */
151 case 144000000:
152 crm_usb_clock_div_set(CRM_USB_DIV_3);
153 break;
154
155 /* 168MHz */
156 case 168000000:
157 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
158 break;
159
160 /* 192MHz */
161 case 192000000:
162 crm_usb_clock_div_set(CRM_USB_DIV_4);
163 break;
164
165 /* 216MHz */
166 case 216000000:
167 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
168 break;
169
170 /* 240MHz */
171 case 240000000:
172 crm_usb_clock_div_set(CRM_USB_DIV_5);
173 break;
174
175 /* 264MHz */
176 case 264000000:
177 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
178 break;
179
180 /* 288MHz */
181 case 288000000:
182 crm_usb_clock_div_set(CRM_USB_DIV_6);
183 break;
184
185 default:
186 break;
187
188 }
189 }
190}
191
197void usb_gpio_config(void)
198{
199 gpio_init_type gpio_init_struct;
200
201 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
202 gpio_default_para_init(&gpio_init_struct);
203
204 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
205 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
206 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
207 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
208
209 /* dp and dm */
210 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
211 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
212
213 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
214 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
215
216#ifdef USB_SOF_OUTPUT_ENABLE
217 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
218 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
219 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
220 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
221#endif
222
223 /* otgfs use vbus pin */
224#ifndef USB_VBUS_IGNORE
225 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
226 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
227 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
228 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
229#endif
230
231#ifdef USBH_5V_POWER_SWITCH
232 crm_periph_clock_enable(OTG_PIN_POWER_SWITCH_CLOCK, TRUE);
233 gpio_bits_set(OTG_PIN_POWER_SWITCH_GPIO, OTG_PIN_POWER_SWITCH);
234
235 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
236 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
237 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
238 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
239 gpio_init_struct.gpio_pins = OTG_PIN_POWER_SWITCH;
240 gpio_init(OTG_PIN_POWER_SWITCH_GPIO, &gpio_init_struct);
241#endif
242
243/* otg2 gpio config */
244 crm_periph_clock_enable(OTG2_PIN_GPIO_CLOCK, TRUE);
245 gpio_default_para_init(&gpio_init_struct);
246
247 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
248 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
249 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
250 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
251
252 /* dp and dm */
253 gpio_init_struct.gpio_pins = OTG2_PIN_DP | OTG2_PIN_DM;
254 gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
255
256 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DP_SOURCE, OTG2_PIN_MUX);
257 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DM_SOURCE, OTG2_PIN_MUX);
258
259#ifdef USB_SOF_OUTPUT_ENABLE
260 crm_periph_clock_enable(OTG2_PIN_SOF_GPIO_CLOCK, TRUE);
261 gpio_init_struct.gpio_pins = OTG2_PIN_SOF;
262 gpio_init(OTG2_PIN_SOF_GPIO, &gpio_init_struct);
263 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_SOF_SOURCE, OTG2_PIN_MUX);
264#endif
265
266 /* otgfs use vbus pin */
267#ifndef USB_VBUS_IGNORE
268 gpio_init_struct.gpio_pins = OTG2_PIN_VBUS;
269 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
270 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_VBUS_SOURCE, OTG2_PIN_MUX);
271 gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
272#endif
273
274#ifdef USBH_5V_POWER_SWITCH
275 crm_periph_clock_enable(OTG2_PIN_POWER_SWITCH_CLOCK, TRUE);
276 gpio_bits_set(OTG2_PIN_POWER_SWITCH_GPIO, OTG2_PIN_POWER_SWITCH);
277
278 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
279 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
280 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
281 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
282 gpio_init_struct.gpio_pins = OTG2_PIN_POWER_SWITCH;
283 gpio_init(OTG2_PIN_POWER_SWITCH_GPIO, &gpio_init_struct);
284#endif
285
286
287}
288#ifdef USB_LOW_POWER_WAKUP
294void usb_low_power_wakeup_config(void)
295{
296 exint_init_type exint_init_struct;
297
298 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
299 exint_default_para_init(&exint_init_struct);
300
301 exint_init_struct.line_enable = TRUE;
302 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
303 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
304 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
305 exint_init(&exint_init_struct);
306
307 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
308
309 /*otg2*/
310 exint_init_struct.line_enable = TRUE;
311 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
312 exint_init_struct.line_select = OTG2_WKUP_EXINT_LINE;
313 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
314 exint_init(&exint_init_struct);
315
316 nvic_irq_enable(OTG2_WKUP_IRQ, 0, 0);
317}
318
324void OTG_WKUP_HANDLER(void)
325{
326 exint_flag_clear(OTG_WKUP_EXINT_LINE);
327}
328
334void OTG2_WKUP_HANDLER(void)
335{
336 exint_flag_clear(OTG2_WKUP_EXINT_LINE);
337}
338
339#endif
340
346void OTG_IRQ_HANDLER(void)
347{
348 usbh_irq_handler(&otg_core_struct);
349}
350
356void OTG2_IRQ_HANDLER(void)
357{
358 usbh_irq_handler(&otg2_core_struct);
359}
360
366void usb_delay_ms(uint32_t ms)
367{
368 /* user can define self delay function */
369 delay_ms(ms);
370}
371
377void usb_delay_us(uint32_t us)
378{
379 delay_us(us);
380}
381
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
OTG_PIN_POWER_SWITCH_GPIO
#define OTG_PIN_POWER_SWITCH_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:91
OTG2_PIN_DP_SOURCE
#define OTG2_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:108
OTG_PIN_POWER_SWITCH
#define OTG_PIN_POWER_SWITCH
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:93
OTG2_IRQ
#define OTG2_IRQ
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:98
OTG2_PIN_VBUS_SOURCE
#define OTG2_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:114
OTG2_PIN_SOF_SOURCE
#define OTG2_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:122
OTG2_PIN_GPIO_CLOCK
#define OTG2_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:105
OTG2_WKUP_IRQ
#define OTG2_WKUP_IRQ
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:100
OTG2_PIN_GPIO
#define OTG2_PIN_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:104
OTG_PIN_POWER_SWITCH_CLOCK
#define OTG_PIN_POWER_SWITCH_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:92
usbh_user_handle
usbh_user_handler_type usbh_user_handle
Definition: at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c:50
OTG2_PIN_DM
#define OTG2_PIN_DM
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:110
OTG2_PIN_DP
#define OTG2_PIN_DP
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:107
OTG2_PIN_VBUS
#define OTG2_PIN_VBUS
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:113
USB2_ID
#define USB2_ID
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:96
OTG2_PIN_SOF_GPIO_CLOCK
#define OTG2_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:120
OTG2_PIN_SOF_GPIO
#define OTG2_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:119
OTG2_CLOCK
#define OTG2_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:97
OTG2_PIN_DM_SOURCE
#define OTG2_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:111
OTG2_WKUP_HANDLER
#define OTG2_WKUP_HANDLER
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:101
OTG2_WKUP_EXINT_LINE
#define OTG2_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:102
OTG2_PIN_SOF
#define OTG2_PIN_SOF
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:121
OTG2_PIN_MUX
#define OTG2_PIN_MUX
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:124
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
OTG2_IRQ_HANDLER
void OTG2_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c:356
OTG2_PIN_POWER_SWITCH
#define OTG2_PIN_POWER_SWITCH
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usb_conf.h:129
OTG2_PIN_POWER_SWITCH_GPIO
#define OTG2_PIN_POWER_SWITCH_GPIO
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usb_conf.h:127
otg2_core_struct
otg_core_type otg2_core_struct
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c:47
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c:109
main
int main(void)
main function.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c:57
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c:197
OTG2_PIN_POWER_SWITCH_CLOCK
#define OTG2_PIN_POWER_SWITCH_CLOCK
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usb_conf.h:128
OTG_IRQ_HANDLER
void OTG_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c:346
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c:46
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbh_loop_handler
usb_sts_type usbh_loop_handler(usbh_core_type *uhost)
usb host enum loop handler
Definition: usbh_core.c:1142
uhost_hid_class_handler
usbh_class_handler_type uhost_hid_class_handler
Definition: usbh_hid_class.c:52
usbh_irq_handler
void usbh_irq_handler(otg_core_type *hdev)
usb host interrupt handler
Definition: usbh_int.c:47
uhost_msc_class_handler
usbh_class_handler_type uhost_msc_class_handler
Definition: usbh_msc_class.c:55
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbh_hid_class.h
usb host hid class header file
usbh_int.h
usb header file
usbh_msc_class.h
usb host msc class header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • wdt
  • wdt_reset
  • inc
project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • wdt
  • wdt_reset
  • inc
project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • wdt
  • wdt_reset
  • inc
project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • wdt
  • wdt_reset
  • src
Functions
project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • wdt
  • wdt_reset
  • src
project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • wdt
  • wdt_reset
  • src
Functions
project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • wdt
  • wdt_reset
  • src
project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • wdt
  • wdt_reset
  • src
Functions
project/at_start_f435/examples/wdt/wdt_reset/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/wdt/wdt_reset/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • wdt
  • wdt_reset
  • src
project/at_start_f435/examples/wdt/wdt_reset/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43int main(void)
44{
45 system_clock_config();
46
47 at32_board_init();
48
49 if(crm_flag_get(CRM_WDT_RESET_FLAG) != RESET)
50 {
51 /* reset from wdt */
52 crm_flag_clear(CRM_WDT_RESET_FLAG);
53
54 at32_led_on(LED4);
55 }
56 else
57 {
58 /* reset from other mode */
59 at32_led_off(LED4);
60 }
61
62 /* disable register write protection */
63 wdt_register_write_enable(TRUE);
64
65 /* set the wdt divider value */
66 wdt_divider_set(WDT_CLK_DIV_4);
67
68 /* set reload value
69
70 timeout = reload_value * (divider / lick_freq ) (s)
71
72 lick_freq = 40000 Hz
73 divider = 4
74 reload_value = 3000
75
76 timeout = 3000 * (4 / 40000 ) = 0.3s = 300ms
77 */
78 wdt_reload_value_set(3000 - 1);
79
80 /* enable wdt */
81 wdt_enable();
82
83 while(1)
84 {
85 /* reload wdt counter */
86 wdt_counter_reload();
87
88 at32_led_toggle(LED3);
89
90 delay_ms(200);
91
92 if(at32_button_press() == USER_BUTTON)
93 {
94 while(1);
95 }
96 }
97}
98
at32f435_437_board.h
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
main
int main(void)
main function.
Definition: project/at_start_f435/examples/wdt/wdt_reset/src/main.c:43
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED4
@ LED4
Definition: at32f435_437_board.h:67
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_flag_clear
void crm_flag_clear(uint32_t flag)
clear the crm reset flags
Definition: at32f435_437_crm.c:358
CRM_WDT_RESET_FLAG
#define CRM_WDT_RESET_FLAG
Definition: at32f435_437_crm.h:64
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
wdt_register_write_enable
void wdt_register_write_enable(confirm_state new_state)
enable or disable wdt cmd register write
Definition: at32f435_437_wdt.c:97
wdt_enable
void wdt_enable(void)
wdt enable ,the reload value will be sent to the counter
Definition: at32f435_437_wdt.c:49
wdt_counter_reload
void wdt_counter_reload(void)
reload wdt counter
Definition: at32f435_437_wdt.c:59
wdt_reload_value_set
void wdt_reload_value_set(uint16_t reload_value)
set wdt counter reload value
Definition: at32f435_437_wdt.c:69
wdt_divider_set
void wdt_divider_set(wdt_division_type division)
set wdt division divider
Definition: at32f435_437_wdt.c:87
WDT_CLK_DIV_4
@ WDT_CLK_DIV_4
Definition: at32f435_437_wdt.h:70
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • wdt
  • wdt_standby
  • inc
project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • wdt
  • wdt_standby
  • inc
project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • wdt
  • wdt_standby
  • inc
project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • wdt
  • wdt_standby
  • src
Functions
project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • wdt
  • wdt_standby
  • src
project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • wdt
  • wdt_standby
  • src
Functions
project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • wdt
  • wdt_standby
  • src
project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • wdt
  • wdt_standby
  • src
Functions
project/at_start_f435/examples/wdt/wdt_standby/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/wdt/wdt_standby/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • wdt
  • wdt_standby
  • src
project/at_start_f435/examples/wdt/wdt_standby/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43int main(void)
44{
45 system_clock_config();
46
47 at32_board_init();
48
49 /* enable the pwc clock */
50 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
51
52 if(crm_flag_get(CRM_WDT_RESET_FLAG) != RESET)
53 {
54 /* reset from wdt */
55 crm_flag_clear(CRM_WDT_RESET_FLAG);
56
57 at32_led_on(LED4);
58 }
59 else
60 {
61 /* reset from other mode */
62 at32_led_off(LED4);
63 }
64
65 delay_ms(100);
66
67 /* disable register write protection */
68 wdt_register_write_enable(TRUE);
69
70 /* set the wdt divider value */
71 wdt_divider_set(WDT_CLK_DIV_4);
72
73 /* set reload value
74
75 timeout = reload_value * (divider / lick_freq ) (s)
76
77 lick_freq = 40000 Hz
78 divider = 4
79 reload_value = 3000
80
81 timeout = 3000 * (4 / 40000 ) = 0.3s = 300ms
82 */
83 wdt_reload_value_set(3000 - 1);
84
85 /* enable wdt */
86 wdt_enable();
87
88 /* enter standby mode */
89 pwc_standby_mode_enter();
90
91 while(1)
92 {
93
94 }
95}
96
at32f435_437_board.h
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
main
int main(void)
main function.
Definition: project/at_start_f435/examples/wdt/wdt_standby/src/main.c:43
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_flag_clear
void crm_flag_clear(uint32_t flag)
clear the crm reset flags
Definition: at32f435_437_crm.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_WDT_RESET_FLAG
#define CRM_WDT_RESET_FLAG
Definition: at32f435_437_crm.h:64
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
pwc_standby_mode_enter
void pwc_standby_mode_enter(void)
enter pwc standby mode
Definition: at32f435_437_pwc.c:224
wdt_register_write_enable
void wdt_register_write_enable(confirm_state new_state)
enable or disable wdt cmd register write
Definition: at32f435_437_wdt.c:97
wdt_enable
void wdt_enable(void)
wdt enable ,the reload value will be sent to the counter
Definition: at32f435_437_wdt.c:49
wdt_reload_value_set
void wdt_reload_value_set(uint16_t reload_value)
set wdt counter reload value
Definition: at32f435_437_wdt.c:69
wdt_divider_set
void wdt_divider_set(wdt_division_type division)
set wdt division divider
Definition: at32f435_437_wdt.c:87
WDT_CLK_DIV_4
@ WDT_CLK_DIV_4
Definition: at32f435_437_wdt.h:70
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • wwdt
  • wwdt_reset
  • inc
project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • wwdt
  • wwdt_reset
  • inc
project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • wwdt
  • wwdt_reset
  • inc
project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • wwdt
  • wwdt_reset
  • src
Functions
project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • wwdt
  • wwdt_reset
  • src
project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • wwdt
  • wwdt_reset
  • src
Functions
project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • wwdt
  • wwdt_reset
  • src
project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • wwdt
  • wwdt_reset
  • src
Functions
project/at_start_f435/examples/wwdt/wwdt_reset/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/wwdt/wwdt_reset/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • wwdt
  • wwdt_reset
  • src
project/at_start_f435/examples/wwdt/wwdt_reset/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43int main(void)
44{
45 system_clock_config();
46
47 at32_board_init();
48
49 if(crm_flag_get(CRM_WWDT_RESET_FLAG) != RESET)
50 {
51 /* reset from wwdt */
52 crm_flag_clear(CRM_WWDT_RESET_FLAG);
53
54 at32_led_on(LED4);
55 }
56 else
57 {
58 /* reset from other mode */
59 at32_led_off(LED4);
60 }
61
62 /* enable the wwdt clock */
63 crm_periph_clock_enable(CRM_WWDT_PERIPH_CLOCK, TRUE);
64
65 /* set the wwdt divider value */
66 wwdt_divider_set(WWDT_PCLK1_DIV_32768);
67
68 /* set the wwdt window counter value */
69 wwdt_window_counter_set(0x6F);
70
71 /* enable wwdt
72
73 window_value: (0x7F - 0x6F)
74 timeout_value: (0x7F - 0x40) + 1
75
76 timeout = timeout_value * (divider / pclk1_freq ) (s)
77 window = window_value * (divider / pclk1_freq ) (s)
78
79 pclk1_freq = 120 MHz
80 divider = 32768
81 reload_value = 0x40 = 64
82 window_value = 0x10 = 16
83
84 timeout = 64 * (32768 / 120000000 ) = 0.0174s = 17.4ms
85 window = 16 * (32768 / 120000000 ) = 0.0044s = 4.4ms
86
87 */
88 wwdt_enable(0x7F);
89
90 while(1)
91 {
92 at32_led_toggle(LED3);
93
94 /* the reload time must within the window (6ms > 4.4ms) */
95 delay_ms(6);
96
97 /* update the wwdt window counter */
98 wwdt_counter_set(0x7F);
99
100 if(at32_button_press() == USER_BUTTON)
101 {
102 while(1);
103 }
104 }
105}
106
at32f435_437_board.h
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
main
int main(void)
main function.
Definition: project/at_start_f435/examples/wwdt/wwdt_reset/src/main.c:43
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED4
@ LED4
Definition: at32f435_437_board.h:67
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_flag_clear
void crm_flag_clear(uint32_t flag)
clear the crm reset flags
Definition: at32f435_437_crm.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_WWDT_PERIPH_CLOCK
@ CRM_WWDT_PERIPH_CLOCK
Definition: at32f435_437_crm.h:137
CRM_WWDT_RESET_FLAG
#define CRM_WWDT_RESET_FLAG
Definition: at32f435_437_crm.h:65
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
wwdt_counter_set
void wwdt_counter_set(uint8_t wwdt_cnt)
wwdt counter value set
Definition: at32f435_437_wwdt.c:114
wwdt_divider_set
void wwdt_divider_set(wwdt_division_type division)
wwdt division set
Definition: at32f435_437_wwdt.c:64
wwdt_window_counter_set
void wwdt_window_counter_set(uint8_t window_cnt)
wwdt window counter value set
Definition: at32f435_437_wwdt.c:124
wwdt_enable
void wwdt_enable(uint8_t wwdt_cnt)
wwdt enable and the counter value load
Definition: at32f435_437_wwdt.c:84
WWDT_PCLK1_DIV_32768
@ WWDT_PCLK1_DIV_32768
Definition: at32f435_437_wwdt.h:70
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • xmc
  • lcd_8bit
  • inc
project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • xmc
  • lcd_8bit
  • inc
project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • xmc
  • lcd_8bit
  • inc
project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • xmc
  • lcd_8bit
  • src
Functions
project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • xmc
  • lcd_8bit
  • src
project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • xmc
  • lcd_8bit
  • src
Functions
project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • xmc
  • lcd_8bit
  • src
project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • xmc
  • lcd_8bit
  • src
Functions | Variables
project/at_start_f435/examples/xmc/lcd_8bit/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_lcd.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

uint16_t point_color

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/lcd_8bit/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • xmc
  • lcd_8bit
  • src
project/at_start_f435/examples/xmc/lcd_8bit/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_lcd.h"
30
39uint16_t point_color;
40
46int main(void)
47{
48 system_clock_config();
49
50 at32_board_init();
51
52 /* turn led2/led3/led4 on */
53 at32_led_on(LED2);
54 at32_led_on(LED3);
55 at32_led_on(LED4);
56
57 /* configures xmc&lcd */
58 lcd_init();
59
60 /* clear the lcd */
61 point_color = WHITE;
62 lcd_clear(point_color);
63
64 while(1)
65 {
66 /* display number on lcd */
67 lcd_display_number();
68 }
69}
70
at32f435_437_board.h
lcd_init
void lcd_init(void)
configures the lcd. this function must be called before any write/read operation on the lcd.
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:165
WHITE
#define WHITE
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:84
lcd_clear
void lcd_clear(uint16_t color)
this function is clear the lcd.
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:379
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
main
int main(void)
main function.
Definition: project/at_start_f435/examples/xmc/lcd_8bit/src/main.c:46
point_color
uint16_t point_color
Definition: project/at_start_f435/examples/xmc/lcd_8bit/src/main.c:39
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
lcd_display_number
void lcd_display_number(void)
this function is display number on the lcd.
Definition: at_start_f437/examples/xmc/lcd_8bit/src/xmc_lcd.c:347
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • xmc
  • lcd_touch_16bit
  • inc
project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • xmc
  • lcd_touch_16bit
  • inc
project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • xmc
  • lcd_touch_16bit
  • inc
project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • xmc
  • lcd_touch_16bit
  • src
Functions
project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • xmc
  • lcd_touch_16bit
  • src
project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • xmc
  • lcd_touch_16bit
  • src
Functions
project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • xmc
  • lcd_touch_16bit
  • src
project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • xmc
  • lcd_touch_16bit
  • src
Functions | Variables
project/at_start_f435/examples/xmc/lcd_touch_16bit/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_lcd.h"
#include "touch.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

uint16_t point_color

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/lcd_touch_16bit/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • xmc
  • lcd_touch_16bit
  • src
project/at_start_f435/examples/xmc/lcd_touch_16bit/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_lcd.h"
30#include "touch.h"
31
40uint16_t point_color;
41
47int main(void)
48{
49 touch_struct = &touch_dev_struct;
50 lcd_struct = &lcd_dev_struct;
51 system_clock_config();
52 at32_board_init();
53
54 lcd_struct->lcd_init();
55 point_color = GBLUE;
56 lcd_struct->lcd_clear(point_color);
57
58 touch_struct->init();
59
60 while(1)
61 {
62 touch_struct->touch_scan();
63 }
64}
65
at32f435_437_board.h
GBLUE
#define GBLUE
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:89
lcd_dev_struct
lcd_dev_type lcd_dev_struct
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:38
lcd_struct
lcd_dev_type * lcd_struct
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:48
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
main
int main(void)
main function.
Definition: project/at_start_f435/examples/xmc/lcd_touch_16bit/src/main.c:47
touch_struct
touch_dev_type * touch_struct
Definition: at_start_f435/examples/xmc/lcd_touch_16bit/src/touch.c:51
touch_dev_struct
touch_dev_type touch_dev_struct
Definition: at_start_f435/examples/xmc/lcd_touch_16bit/src/touch.c:38
point_color
uint16_t point_color
Definition: project/at_start_f435/examples/xmc/lcd_touch_16bit/src/main.c:40
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
lcd_dev_type::lcd_clear
void(* lcd_clear)(uint16_t color)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:50
lcd_dev_type::lcd_init
void(* lcd_init)(void)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:47
touch_dev_type::init
void(* init)(void)
Definition: at_start_f435/examples/xmc/lcd_touch_16bit/inc/touch.h:48
touch_dev_type::touch_scan
void(* touch_scan)(void)
Definition: at_start_f435/examples/xmc/lcd_touch_16bit/inc/touch.h:50
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • ecc
  • inc
project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • ecc
  • inc
project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • ecc
  • inc
project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • ecc
  • src
Functions
project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • ecc
  • src
project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • ecc
  • src
Functions
project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • ecc
  • src
project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • ecc
  • src
Functions | Variables
project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c File Reference

main program More...

#include "xmc_ecc.h"
#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | fill_buffer (uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer. More...
void | nand_ecc_correction (uint8_t *pbuffer, uint32_t tx_ecc_value,uint32_t rx_ecc_value)
ecc correct 1 bit error More...
int | main (void)
main function. More...

Variables

crm_clocks_freq_type | crm_clocks_freq_struct = {0}
nand_id_type nand_id_struct
nand_address_type write_read_addr_struct
uint8_t | tx_buffer [BUFFER_SIZE]
uint8_t | rx_buffer [BUFFER_SIZE]
uint32_t | page_number = 1
uint32_t | status = 0
uint32_t | j = 0
uint32_t | ecc_value_write = 0
uint32_t | ecc_value_read = 0
uint32_t | ecc_value_write_last = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • ecc
  • src
project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c
Go to the documentation of this file.
1
27#include "xmc_ecc.h"
28#include "at32f435_437_board.h"
29#include "at32f435_437_clock.h"
30
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40 nand_id_type nand_id_struct;
41 nand_address_type write_read_addr_struct;
42uint8_t tx_buffer[BUFFER_SIZE], rx_buffer[BUFFER_SIZE];
43uint32_t page_number = 1, status = 0;
44uint32_t j = 0, ecc_value_write = 0, ecc_value_read = 0, ecc_value_write_last = 0;
45
46void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset);
47void nand_ecc_correction(uint8_t *pbuffer, uint32_t tx_ecc_value, uint32_t rx_ecc_value);
48
55void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
56{
57 uint16_t indextmp = 0;
58
59 /* Put in global buffer same values */
60 for(indextmp = 0; indextmp < bufferlenght; indextmp++ )
61 {
62 pbuffer[indextmp] = indextmp + offset;
63 }
64}
65
72void nand_ecc_correction(uint8_t *pbuffer,uint32_t tx_ecc_value ,uint32_t rx_ecc_value)
73{
74 uint32_t ecc_value=0, position=0 ,byte_position=0;
75 uint8_t i,compare_data;
76
77 /* check ecc value */
78 if(tx_ecc_value!=rx_ecc_value)
79 {
80 /* 2048 byte -- 28bit ecc valid value; 8192 byte -- 32bit ecc valid value */
81#ifdef H27U1G8F2CTR
82 ecc_value =(tx_ecc_value^rx_ecc_value) & (uint32_t)0x0FFFFFFF;
83#elif defined K9GAG08U0E
84 ecc_value =(tx_ecc_value^rx_ecc_value) & (uint32_t)0xFFFFFFFF;
85#endif
86 /* 1 bit error correction */
87#ifdef H27U1G8F2CTR
88 for(i=0;i<(28/2);i++)
89#elif defined K9GAG08U0E
90 for(i=0;i<(32/2);i++)
91#endif
92 {
93 compare_data = (ecc_value>>(i*2))&0x3;
94
95 /* find position */
96 if(compare_data == 0x2)
97 {
98 position |= (1<<i);
99 }
100 /* more than 1 bit erroc */
101 else if(compare_data != 0x1)
102 {
103 return;
104 }
105 }
106
107 /* correct receive value */
108 byte_position = (uint32_t)(position/8);
109 pbuffer[byte_position] ^= 1 << (position % 8);
110 }
111}
112
118int main(void)
119{
120 /* configure the system clock */
121 system_clock_config();
122
123 /* led initalization */
124 at32_board_init();
125
126 /* usart1 initalization */
127 uart_print_init(115200);
128
129 /* get system clock */
130 crm_clocks_freq_get(&crm_clocks_freq_struct);
131
132 /* xmc initialization */
133 nand_init();
134
135 /* nand reset command */
136 nand_reset();
137 delay_us(10);
138
139 /* nand read id command */
140 nand_read_id(&nand_id_struct);
141
142 /* verify the nand id */
143 /* nand support:samsung:k9gag08u0e hynix:h27u1g8f2ctr
144 id :0xecd58472 id :0xadf1801d
145 */
146 if((nand_id_struct.maker_id == NAND_AT_MakerID) && (nand_id_struct.device_id == NAND_AT_DeviceID))
147 {
148 /* nand memory address to write to */
149 write_read_addr_struct.zone = 0x00;
150 write_read_addr_struct.block = 0x00;
151 write_read_addr_struct.page = 0x00;
152 write_read_addr_struct.byte = 0x00;
153
154 /* erase the nand first block */
155 status = nand_erase_block(write_read_addr_struct);
156
157 /* write data to xmc nand memory */
158 /* fill the buffer to send */
159 fill_buffer(tx_buffer, BUFFER_SIZE , 0x0);
160
161 /* change the regular to make ecc value isn't 0 */
162 tx_buffer[10]=0x03;
163
164 /* calculate ecc value while transmiting */
165 xmc_nand_ecc_enable(XMC_BANK2_NAND, TRUE);
166 status = nand_write_small_page(tx_buffer, write_read_addr_struct, page_number);
167
168 /* save the right ecc_value (in this case ,we suppose it as the true value) */
169 ecc_value_write_last = ecc_value_write;
170
171 /* change the 85 data like there is a 1 bit error happened */
172 status = nand_erase_block(write_read_addr_struct);
173 tx_buffer[10]=0x23;
174 status = nand_write_small_page(tx_buffer, write_read_addr_struct, page_number);
175
176 /* calculate ecc value while transmiting */
177 xmc_nand_ecc_enable(XMC_BANK2_NAND, TRUE);
178
179 /* read back the written data */
180 status = nand_read_small_page (rx_buffer, write_read_addr_struct, page_number);
181
182 /* ecc check and correct 1 bit error */
183 nand_ecc_correction(rx_buffer ,ecc_value_write_last ,ecc_value_read);
184
185 if(rx_buffer[10]==0x03)
186 {
187 /* pass : printf "ecc is work" */
188 printf("ecc is work\r\n");
189 }
190 else
191 {
192 /* fail: printf "ecc is not work" */
193 printf("ecc is not work\r\n");
194 }
195 }
196
197 /* printf to indicate that whether there is an device error (id not correct) */
198 else
199 {
200 printf("the id is error\r\n");
201 }
202
203 while(1)
204 {
205 }
206}
207
at32f435_437_board.h
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f435/examples/crc/calculation/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
write_read_addr_struct
nand_address_type write_read_addr_struct
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:41
j
uint32_t j
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:44
nand_ecc_correction
void nand_ecc_correction(uint8_t *pbuffer, uint32_t tx_ecc_value, uint32_t rx_ecc_value)
ecc correct 1 bit error
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:72
rx_buffer
uint8_t rx_buffer[BUFFER_SIZE]
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:42
main
int main(void)
main function.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:118
page_number
uint32_t page_number
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
ecc_value_read
uint32_t ecc_value_read
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:44
ecc_value_write_last
uint32_t ecc_value_write_last
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:44
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:39
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
nand_id_struct
nand_id_type nand_id_struct
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:40
ecc_value_write
uint32_t ecc_value_write
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:44
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
tx_buffer
uint8_t tx_buffer[BUFFER_SIZE]
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:42
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
TRUE
@ TRUE
Definition: at32f435_437.h:379
xmc_nand_ecc_enable
void xmc_nand_ecc_enable(xmc_class_bank_type xmc_bank, confirm_state new_state)
enable or disable the xmc nand ecc feature.
Definition: at32f435_437_xmc.c:407
XMC_BANK2_NAND
@ XMC_BANK2_NAND
Definition: at32f435_437_xmc.h:157
nand_read_small_page
uint32_t nand_read_small_page(uint8_t *pbuffer, nand_address_type address_struct, uint32_t num_page_to_read)
this routine is for sequential read from one or several 512 bytes page size.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:228
nand_read_id
void nand_read_id(nand_id_type *nand_id_struct)
reads nand memory's id.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:120
nand_init
void nand_init(void)
configures the xmc and gpios to interface with the nand memory. this function must be called before a...
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:44
nand_reset
uint32_t nand_reset(void)
this routine reset the nand flash.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:426
nand_erase_block
uint32_t nand_erase_block(nand_address_type address_struct)
this routine erase complete block from nand flash
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:403
nand_write_small_page
uint32_t nand_write_small_page(uint8_t *pbuffer, nand_address_type address_struct, uint32_t num_page_to_write)
this routine is for writing one or several 512 bytes page size.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:161
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
nand_address_type
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:63
nand_address_type::byte
uint16_t byte
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:67
nand_address_type::page
uint16_t page
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:66
nand_address_type::block
uint16_t block
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:65
nand_address_type::zone
uint16_t zone
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:64
nand_id_type
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:45
nand_id_type::device_id
uint8_t device_id
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:47
nand_id_type::maker_id
uint8_t maker_id
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:46
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • nand
  • inc
project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • nand
  • inc
project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • nand
  • inc
project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • nand
  • src
Functions
project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • nand
  • src
project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • nand
  • src
Functions
project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • nand
  • src
project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
135
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • nand
  • src
Functions | Variables
project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c File Reference

main program More...

#include "xmc_nand.h"
#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | fill_buffer (uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
fill the global buffer More...
int | main (void)
main function. More...

Variables

crm_clocks_freq_type | crm_clocks_freq_struct = {0}
nand_id_type | nand_id_struct = {0}
nand_address_type write_read_addr_struct
uint8_t | txbuffer [BUFFER_SIZE]
uint8_t | rxbuffer [BUFFER_SIZE+NAND_SPARE_AREA_SIZE]
uint32_t | pagenumber = BUFFER_SIZE / NAND_PAGE_SIZE
uint32_t | writereadstatus = 0
uint32_t | status = 0
uint32_t | j = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • xmc
  • nand_flash
  • nand
  • src
project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c
Go to the documentation of this file.
1
27#include "xmc_nand.h"
28#include "at32f435_437_board.h"
29#include "at32f435_437_clock.h"
30
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40 nand_id_type nand_id_struct = {0};
41 nand_address_type write_read_addr_struct;
42uint8_t txbuffer[BUFFER_SIZE], rxbuffer[BUFFER_SIZE + NAND_SPARE_AREA_SIZE];
43uint32_t pagenumber = BUFFER_SIZE / NAND_PAGE_SIZE, writereadstatus = 0, status= 0;
44uint32_t j = 0;
45
46void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset);
47
53int main(void)
54{
55 /* configure the system clock */
56 system_clock_config();
57
58 /* led initalization */
59 at32_board_init();
60
61 /* usart1 initalization */
62 uart_print_init(115200);
63
64 /* get system clock */
65 crm_clocks_freq_get(&crm_clocks_freq_struct);
66
67 /* xmc initialization */
68 nand_init();
69
70
71 /* nand reset command */
72 nand_reset();
73 delay_us(10);
74
75 /* nand read id command */
76 nand_read_id(&nand_id_struct);
77
78 /* verify the nand id */
79 /* nand support:samsung:k9gag08u0e hynix:h27u1g8f2ctr
80 id :0xecd58472 id :0xadf1801d
81 */
82 if((nand_id_struct.maker_id == NAND_AT_MakerID) && (nand_id_struct.device_id == NAND_AT_DeviceID))
83 {
84 /* nand memory address to write to */
85 write_read_addr_struct.zone = 0x00;
86 write_read_addr_struct.block = 0x00;
87 write_read_addr_struct.page = 0x00;
88 write_read_addr_struct.byte = 0x00;
89
90 /* erase the nand first block */
91 status = nand_erase_block(write_read_addr_struct);
92
93 /* fill the buffer to send */
94 fill_buffer(txbuffer, BUFFER_SIZE , 0x66);
95
96 /* write data to xmc nand memory */
97 status = nand_write_small_page(txbuffer, write_read_addr_struct, pagenumber);
98
99 /* read back the written data */
100 status = nand_read_small_page (rxbuffer, write_read_addr_struct, pagenumber);
101
102 /* verify the written data */
103 for(j = 0; j < BUFFER_SIZE; j++)
104 {
105 if(txbuffer[j] != rxbuffer[j])
106 {
107 writereadstatus++;
108 }
109 }
110
111 if(writereadstatus == 0)
112 {
113 /* pass : printf "data is right" */
114 printf("data is right\r\n");
115 }
116 else
117 {
118 /* fail: printf "data is error" */
119 printf("data is error\r\n");
120 }
121 }
122
123 /* printf to indicate that whether there is an device error (id not correct) */
124 else
125 {
126 printf("the id is error\r\n");
127 }
128
129 while(1)
130 {
131 }
132}
133
140void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
141{
142 uint16_t indextmp = 0;
143
144 /* put in global buffer same values */
145 for(indextmp = 0; indextmp < bufferlenght; indextmp++ )
146 {
147 pbuffer[indextmp] = indextmp + offset;
148 }
149}
150
151
at32f435_437_board.h
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f435/examples/crc/calculation/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
write_read_addr_struct
nand_address_type write_read_addr_struct
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c:41
txbuffer
uint8_t txbuffer[BUFFER_SIZE]
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c:42
j
uint32_t j
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c:44
main
int main(void)
main function.
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c:53
rxbuffer
uint8_t rxbuffer[BUFFER_SIZE+NAND_SPARE_AREA_SIZE]
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c:42
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c:39
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
fill the global buffer
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c:140
nand_id_struct
nand_id_type nand_id_struct
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c:40
writereadstatus
uint32_t writereadstatus
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c:43
pagenumber
uint32_t pagenumber
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c:43
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c:43
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
nand_read_small_page
uint32_t nand_read_small_page(uint8_t *pbuffer, nand_address_type address_struct, uint32_t num_page_to_read)
this routine is for sequential read from one or several 512 bytes page size.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:228
nand_read_id
void nand_read_id(nand_id_type *nand_id_struct)
reads nand memory's id.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:120
nand_init
void nand_init(void)
configures the xmc and gpios to interface with the nand memory. this function must be called before a...
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:44
nand_reset
uint32_t nand_reset(void)
this routine reset the nand flash.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:426
nand_erase_block
uint32_t nand_erase_block(nand_address_type address_struct)
this routine erase complete block from nand flash
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:403
nand_write_small_page
uint32_t nand_write_small_page(uint8_t *pbuffer, nand_address_type address_struct, uint32_t num_page_to_write)
this routine is for writing one or several 512 bytes page size.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:161
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
nand_address_type
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:63
nand_address_type::byte
uint16_t byte
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:67
nand_address_type::page
uint16_t page
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:66
nand_address_type::block
uint16_t block
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:65
nand_address_type::zone
uint16_t zone
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:64
nand_id_type
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:45
nand_id_type::device_id
uint8_t device_id
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:47
nand_id_type::maker_id
uint8_t maker_id
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:46
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • xmc
  • nor_flash
  • inc
project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • xmc
  • nor_flash
  • inc
project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • xmc
  • nor_flash
  • inc
project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • xmc
  • nor_flash
  • src
Functions
project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • xmc
  • nor_flash
  • src
project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • xmc
  • nor_flash
  • src
Functions
project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • xmc
  • nor_flash
  • src
project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • xmc
  • nor_flash
  • src
Macros | Functions | Variables
project/at_start_f435/examples/xmc/nor_flash/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_nor.h"

Go to the source code of this file.

Macros

#define | buffer_size 0x400
#define | write_read_addr 0x8000

Functions

int main (void)
main function. More...

Variables

uint16_t | txbuffer [0x400]
uint16_t | rxbuffer [0x400]
uint32_t | writereadstatus = 0
uint32_t | number = 0
nor_idtype nor_id

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/nor_flash/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • xmc
  • nor_flash
  • src
project/at_start_f435/examples/xmc/nor_flash/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_nor.h"
30
39#define buffer_size 0x400
40#define write_read_addr 0x8000
41
42uint16_t txbuffer[buffer_size];
43uint16_t rxbuffer[buffer_size];
44uint32_t writereadstatus = 0, number = 0;
45 nor_idtype nor_id;
46
52int main(void)
53{
54 system_clock_config();
55
56 at32_board_init();
57
58 uart_print_init(115200);
59
60 /* nor flash interface confoig */
61 nor_init();
62
63 /* read nor memory id */
64 nor_readid(&nor_id);
65
66 nor_returntoreadmode();
67
68 /* erase the nor memory block to write on */
69 nor_eraseblock(write_read_addr);
70
71 /* write data to xmc nor memory */
72 /* fill the buffer to send */
73 fill_buffer(txbuffer, buffer_size, 0x3210);
74 nor_writebuffer(txbuffer, write_read_addr, buffer_size);
75
76 /* read data from xmc nor memory */
77 nor_readbuffer(rxbuffer, write_read_addr, buffer_size);
78
79 /* read back sram memory and check content correctness */
80 for(number = 0x00; (number < buffer_size) && (writereadstatus == 0); number++)
81 {
82 if (rxbuffer[number] != txbuffer[number])
83 {
84 writereadstatus = number + 1;
85 }
86 }
87
88 if(writereadstatus == 0)
89 {
90 /* pass : printf "data is right" */
91 printf("data is right\r\n");
92 }
93 else
94 {
95 /* fail: printf "data is error" */
96 printf("data is error\r\n");
97 }
98 while(1)
99 {
100 }
101}
102
at32f435_437_board.h
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
rxbuffer
uint16_t rxbuffer[0x400]
Definition: project/at_start_f435/examples/xmc/nor_flash/src/main.c:43
nor_eraseblock
nor_status nor_eraseblock(uint32_t blockaddr)
erases the specified nor memory block.
Definition: at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c:266
nor_writebuffer
nor_status nor_writebuffer(uint16_t *pbuffer, uint32_t writeaddr, uint32_t numhalfwordtowrite)
writes a half-word buffer to the xmc nor memory.
Definition: at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c:322
nor_readid
void nor_readid(nor_idtype *nor_id)
reads nor memory's manufacturer and device code.
Definition: at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c:248
nor_id
nor_idtype nor_id
Definition: project/at_start_f435/examples/xmc/nor_flash/src/main.c:45
nor_init
void nor_init(void)
init nor flash interface
Definition: at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c:51
write_read_addr
#define write_read_addr
Definition: project/at_start_f435/examples/xmc/nor_flash/src/main.c:40
main
int main(void)
main function.
Definition: project/at_start_f435/examples/xmc/nor_flash/src/main.c:52
buffer_size
#define buffer_size
Definition: project/at_start_f435/examples/xmc/nor_flash/src/main.c:39
writereadstatus
uint32_t writereadstatus
Definition: project/at_start_f435/examples/xmc/nor_flash/src/main.c:44
nor_returntoreadmode
nor_status nor_returntoreadmode(void)
returns the nor memory to read mode.
Definition: at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c:425
number
uint32_t number
Definition: project/at_start_f435/examples/xmc/nor_flash/src/main.c:44
nor_readbuffer
void nor_readbuffer(uint16_t *pbuffer, uint32_t readaddr, uint32_t numhalfwordtoread)
reads a block of data from the xmc nor memory.
Definition: at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c:406
txbuffer
uint16_t txbuffer[0x400]
Definition: project/at_start_f435/examples/xmc/nor_flash/src/main.c:42
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
nor_idtype
Definition: at_start_f435/examples/xmc/nor_flash/inc/xmc_nor.h:33
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • xmc
  • psram
  • inc
project/at_start_f435/examples/xmc/psram/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • xmc
  • psram
  • inc
project/at_start_f435/examples/xmc/psram/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • xmc
  • psram
  • inc
project/at_start_f435/examples/xmc/psram/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • xmc
  • psram
  • src
Functions
project/at_start_f435/examples/xmc/psram/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/psram/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • xmc
  • psram
  • src
project/at_start_f435/examples/xmc/psram/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/xmc/psram/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • xmc
  • psram
  • src
Functions
project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • xmc
  • psram
  • src
project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • xmc
  • psram
  • src
Macros | Functions | Variables
project/at_start_f435/examples/xmc/psram/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_psram.h"

Go to the source code of this file.

Macros

#define | buffer_size (uint16_t)0x400
#define | write_read_addr (uint32_t)0x8000

Functions

int main (void)
main function. More...

Variables

uint16_t | txbuffer [(uint16_t) 0x400]
uint16_t | rxbuffer [(uint16_t) 0x400]
uint32_t | writereadstatus = 0
uint32_t | number = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/psram/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • xmc
  • psram
  • src
project/at_start_f435/examples/xmc/psram/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_psram.h"
30
39#define buffer_size (uint16_t)0x400
40#define write_read_addr (uint32_t)0x8000
41
42uint16_t txbuffer[buffer_size];
43uint16_t rxbuffer[buffer_size];
44uint32_t writereadstatus = 0, number = 0;
45
46
52int main(void)
53{
54 system_clock_config();
55
56 at32_board_init();
57
58 uart_print_init(115200);
59
60 /* psram interface config */
61 psram_init();
62
63 /* write data to xmc psram memory */
64 /* fill the buffer to send */
65 fill_buffer(txbuffer, buffer_size, 0x3212);
66 psram_writebuffer(txbuffer, write_read_addr, buffer_size);
67
68 /* read data from xmc psram memory */
69 psram_readbuffer(rxbuffer, write_read_addr, buffer_size);
70
71 /* read back psram memory and check content correctness */
72 for(number = 0x00; (number < buffer_size) && (writereadstatus == 0); number++)
73 {
74 if (rxbuffer[number] != txbuffer[number])
75 {
76 writereadstatus = number + 1;
77 }
78 }
79
80 if(writereadstatus == 0)
81 {
82 /* pass : printf "data is right" */
83 printf("data is right\r\n");
84 }
85 else
86 {
87 /* fail: printf "data is error" */
88 printf("data is error\r\n");
89 }
90 while(1)
91 {
92 }
93}
94
at32f435_437_board.h
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
psram_init
void psram_init(void)
init psram interface
Definition: at_start_f437/examples/xmc/psram/src/xmc_psram.c:44
rxbuffer
uint16_t rxbuffer[(uint16_t) 0x400]
Definition: project/at_start_f435/examples/xmc/psram/src/main.c:43
psram_readbuffer
void psram_readbuffer(uint16_t *pbuffer, uint32_t readaddr, uint32_t numhalfwordtoread)
reads a block of data from the xmc psram memory.
Definition: at_start_f437/examples/xmc/psram/src/xmc_psram.c:235
psram_writebuffer
void psram_writebuffer(uint16_t *pbuffer, uint32_t writeaddr, uint32_t numhalfwordtowrite)
writes a half-word buffer to the xmc psram memory.
Definition: at_start_f437/examples/xmc/psram/src/xmc_psram.c:215
write_read_addr
#define write_read_addr
Definition: project/at_start_f435/examples/xmc/psram/src/main.c:40
main
int main(void)
main function.
Definition: project/at_start_f435/examples/xmc/psram/src/main.c:52
txbuffer
uint16_t txbuffer[(uint16_t) 0x400]
Definition: project/at_start_f435/examples/xmc/psram/src/main.c:42
buffer_size
#define buffer_size
Definition: project/at_start_f435/examples/xmc/psram/src/main.c:39
writereadstatus
uint32_t writereadstatus
Definition: project/at_start_f435/examples/xmc/psram/src/main.c:44
number
uint32_t number
Definition: project/at_start_f435/examples/xmc/psram/src/main.c:44
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • xmc
  • sdram_basic
  • inc
project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • xmc
  • sdram_basic
  • inc
project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • xmc
  • sdram_basic
  • inc
project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • xmc
  • sdram_basic
  • src
Functions
project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • xmc
  • sdram_basic
  • src
project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • xmc
  • sdram_basic
  • src
Functions
project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • xmc
  • sdram_basic
  • src
project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • xmc
  • sdram_basic
  • src
Macros | Functions | Variables
project/at_start_f435/examples/xmc/sdram_basic/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_sdram.h"

Go to the source code of this file.

Macros

#define | buffer_size 0x400
#define | write_read_addr 0x8000

Functions

int main (void)
main function. More...

Variables

uint16_t | txbuffer [0x400]
uint16_t | rxbuffer [0x400]
uint32_t | writereadstatus = 0
uint32_t | number = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/sdram_basic/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • xmc
  • sdram_basic
  • src
project/at_start_f435/examples/xmc/sdram_basic/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_sdram.h"
30
39#define buffer_size 0x400
40#define write_read_addr 0x8000
41
42uint16_t txbuffer[buffer_size];
43uint16_t rxbuffer[buffer_size];
44uint32_t writereadstatus = 0, number = 0;
45
46
52int main(void)
53{
54 system_clock_config();
55
56 at32_board_init();
57
58 /* sdram interface config */
59 sdram_init();
60
61 /* write data to xmc sdram memory */
62 /* fill the buffer to send */
63 fill_buffer(txbuffer, buffer_size, 0x3212);
64 sdram_writebuffer(txbuffer, write_read_addr, buffer_size);
65
66 /* read data from xmc sdram memory */
67 sdram_readbuffer(rxbuffer, write_read_addr, buffer_size);
68
69 /* read back sdram memory and check content correctness */
70 for(number = 0x00; (number < buffer_size) && (writereadstatus == 0); number++)
71 {
72 if(rxbuffer[number] != txbuffer[number])
73 {
74 writereadstatus = number + 1;
75 }
76 }
77
78 if(writereadstatus == 0)
79 {
80 /* pass :turn led2/led3/led4 on */
81 at32_led_on(LED2);
82 at32_led_on(LED3);
83 at32_led_on(LED4);
84 }
85 else
86 {
87 /* fail: turn led2/led3/led4 off */
88 at32_led_off(LED2);
89 at32_led_off(LED3);
90 at32_led_off(LED4);
91 }
92 while(1)
93 {
94 }
95}
96
at32f435_437_board.h
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
rxbuffer
uint16_t rxbuffer[0x400]
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/main.c:43
sdram_writebuffer
void sdram_writebuffer(uint16_t *pbuffer, uint32_t writeaddr, uint32_t numhalfwordtowrite)
writes a half-word buffer to the sdram memory.
Definition: at_start_f437/examples/xmc/sdram_basic/src/xmc_sdram.c:248
sdram_init
void sdram_init(void)
init sdram interface
Definition: at_start_f437/examples/xmc/sdram_basic/src/xmc_sdram.c:46
write_read_addr
#define write_read_addr
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/main.c:40
main
int main(void)
main function.
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/main.c:52
sdram_readbuffer
void sdram_readbuffer(uint16_t *pbuffer, uint32_t readaddr, uint32_t numhalfwordtoread)
reads a block of data from the sdram.
Definition: at_start_f437/examples/xmc/sdram_basic/src/xmc_sdram.c:268
buffer_size
#define buffer_size
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/main.c:39
writereadstatus
uint32_t writereadstatus
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/main.c:44
number
uint32_t number
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/main.c:44
txbuffer
uint16_t txbuffer[0x400]
Definition: project/at_start_f435/examples/xmc/sdram_basic/src/main.c:42
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • xmc
  • sdram_dma
  • inc
project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • xmc
  • sdram_dma
  • inc
project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • xmc
  • sdram_dma
  • inc
project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • xmc
  • sdram_dma
  • src
Functions
project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • xmc
  • sdram_dma
  • src
project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • xmc
  • sdram_dma
  • src
Functions
project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • xmc
  • sdram_dma
  • src
project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • xmc
  • sdram_dma
  • src
Macros | Functions | Variables
project/at_start_f435/examples/xmc/sdram_dma/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_sdram.h"

Go to the source code of this file.

Macros

#define | buffer_size 0x400
#define | write_read_addr 0x0000

Functions

int main (void)
main function. More...

Variables

uint16_t | txbuffer [0x400]
uint16_t | rxbuffer [0x400]
uint32_t | writereadstatus = 0
uint32_t | number = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/sdram_dma/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • xmc
  • sdram_dma
  • src
project/at_start_f435/examples/xmc/sdram_dma/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_sdram.h"
30
39#define buffer_size 0x400
40#define write_read_addr 0x0000
41
42uint16_t txbuffer[buffer_size];
43uint16_t rxbuffer[buffer_size];
44uint32_t writereadstatus = 0, number = 0;
45
46
52int main(void)
53{
54 system_clock_config();
55
56 at32_board_init();
57
58 /* sdram interface config */
59 sdram_init();
60
61 /* write data to xmc sdram memory */
62 /* fill the buffer to send */
63 fill_buffer(txbuffer, buffer_size, 0x2512);
64
65 sram_copy_to_sdram_dma(txbuffer, buffer_size);
66
67 sdram_copy_to_sram_dma(rxbuffer, buffer_size);
68
69 /* read back sdram memory and check content correctness */
70 for(number = 0x00; (number < buffer_size) && (writereadstatus == 0); number++)
71 {
72 if(rxbuffer[number] != txbuffer[number])
73 {
74 writereadstatus = number + 1;
75 }
76 }
77
78 if(writereadstatus == 0)
79 {
80 /* pass :turn led2/led3/led4 on */
81 at32_led_on(LED2);
82 at32_led_on(LED3);
83 at32_led_on(LED4);
84 }
85 else
86 {
87 /* fail: turn led2/led3/led4 off */
88 at32_led_off(LED2);
89 at32_led_off(LED3);
90 at32_led_off(LED4);
91 }
92 while(1)
93 {
94 }
95}
96
at32f435_437_board.h
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
sdram_init
void sdram_init(void)
init sdram interface
Definition: at_start_f437/examples/xmc/sdram_basic/src/xmc_sdram.c:46
rxbuffer
uint16_t rxbuffer[0x400]
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/main.c:43
sram_copy_to_sdram_dma
void sram_copy_to_sdram_dma(uint16_t *buffer, uint32_t length)
copy sram data copy to sdram
Definition: at_start_f437/examples/xmc/sdram_dma/src/xmc_sdram.c:336
sdram_copy_to_sram_dma
void sdram_copy_to_sram_dma(uint16_t *buffer, uint32_t length)
copy sdram data to sram
Definition: at_start_f437/examples/xmc/sdram_dma/src/xmc_sdram.c:305
main
int main(void)
main function.
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/main.c:52
buffer_size
#define buffer_size
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/main.c:39
writereadstatus
uint32_t writereadstatus
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/main.c:44
number
uint32_t number
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/main.c:44
txbuffer
uint16_t txbuffer[0x400]
Definition: project/at_start_f435/examples/xmc/sdram_dma/src/main.c:42
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • examples
  • xmc
  • sram
  • inc
project/at_start_f435/examples/xmc/sram/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • examples
  • xmc
  • sram
  • inc
project/at_start_f435/examples/xmc/sram/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • examples
  • xmc
  • sram
  • inc
project/at_start_f435/examples/xmc/sram/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • examples
  • xmc
  • sram
  • src
Functions
project/at_start_f435/examples/xmc/sram/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/sram/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • examples
  • xmc
  • sram
  • src
project/at_start_f435/examples/xmc/sram/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/xmc/sram/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • examples
  • xmc
  • sram
  • src
Functions
project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • examples
  • xmc
  • sram
  • src
project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • examples
  • xmc
  • sram
  • src
Macros | Functions | Variables
project/at_start_f435/examples/xmc/sram/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_sram.h"

Go to the source code of this file.

Macros

#define | buffer_size (uint16_t)0x400
#define | write_read_addr (uint32_t)0x8000

Functions

int main (void)
main function. More...

Variables

uint16_t | txbuffer [(uint16_t) 0x400]
uint16_t | rxbuffer [(uint16_t) 0x400]
uint32_t | writereadstatus = 0
uint32_t | number = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/examples/xmc/sram/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • examples
  • xmc
  • sram
  • src
project/at_start_f435/examples/xmc/sram/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_sram.h"
30
39#define buffer_size (uint16_t)0x400
40#define write_read_addr (uint32_t)0x8000
41
42uint16_t txbuffer[buffer_size];
43uint16_t rxbuffer[buffer_size];
44uint32_t writereadstatus = 0, number = 0;
45
51int main(void)
52{
53 system_clock_config();
54
55 at32_board_init();
56
57 uart_print_init(115200);
58
59 /* sram interface config */
60 sram_init();
61
62 /* write data to xmc sram memory */
63 /* fill the buffer to send */
64 fill_buffer(txbuffer, buffer_size, 0x3212);
65 sram_writebuffer(txbuffer, write_read_addr, buffer_size);
66
67 /* read data from xmc sram memory */
68 sram_readbuffer(rxbuffer, write_read_addr, buffer_size);
69
70 /* read back sram memory and check content correctness */
71 for(number = 0x00; (number < buffer_size) && (writereadstatus == 0); number++)
72 {
73 if(rxbuffer[number] != txbuffer[number])
74 {
75 writereadstatus = number + 1;
76 }
77 }
78
79 if(writereadstatus == 0)
80 {
81 /* pass : printf "data is right" */
82 printf("data is right\r\n");
83 }
84 else
85 {
86 /* fail: printf "data is error" */
87 printf("data is error\r\n");
88 }
89 while(1)
90 {
91 }
92}
93
at32f435_437_board.h
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
rxbuffer
uint16_t rxbuffer[(uint16_t) 0x400]
Definition: project/at_start_f435/examples/xmc/sram/src/main.c:43
write_read_addr
#define write_read_addr
Definition: project/at_start_f435/examples/xmc/sram/src/main.c:40
main
int main(void)
main function.
Definition: project/at_start_f435/examples/xmc/sram/src/main.c:51
sram_init
void sram_init(void)
init sram interface
Definition: at_start_f437/examples/xmc/sram/src/xmc_sram.c:44
txbuffer
uint16_t txbuffer[(uint16_t) 0x400]
Definition: project/at_start_f435/examples/xmc/sram/src/main.c:42
buffer_size
#define buffer_size
Definition: project/at_start_f435/examples/xmc/sram/src/main.c:39
sram_readbuffer
void sram_readbuffer(uint16_t *pbuffer, uint32_t readaddr, uint32_t numhalfwordtoread)
reads a block of data from the xmc sram memory.
Definition: at_start_f437/examples/xmc/sram/src/xmc_sram.c:249
writereadstatus
uint32_t writereadstatus
Definition: project/at_start_f435/examples/xmc/sram/src/main.c:44
number
uint32_t number
Definition: project/at_start_f435/examples/xmc/sram/src/main.c:44
sram_writebuffer
void sram_writebuffer(uint16_t *pbuffer, uint32_t writeaddr, uint32_t numhalfwordtowrite)
writes a half-word buffer to the xmc sram memory.
Definition: at_start_f437/examples/xmc/sram/src/xmc_sram.c:229
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f435
  • templates
  • inc
project/at_start_f435/templates/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • at_start_f435
  • templates
  • inc
project/at_start_f435/templates/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
52#if !defined HEXT_VALUE
53#define HEXT_VALUE ((uint32_t)8000000)
54#endif
55
60#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
61#define HICK_VALUE ((uint32_t)8000000)
63/* module define -------------------------------------------------------------*/
64#define CRM_MODULE_ENABLED
65#define TMR_MODULE_ENABLED
66#define ERTC_MODULE_ENABLED
67#define GPIO_MODULE_ENABLED
68#define I2C_MODULE_ENABLED
69#define USART_MODULE_ENABLED
70#define PWC_MODULE_ENABLED
71#define CAN_MODULE_ENABLED
72#define ADC_MODULE_ENABLED
73#define DAC_MODULE_ENABLED
74#define SPI_MODULE_ENABLED
75#define EDMA_MODULE_ENABLED
76#define DMA_MODULE_ENABLED
77#define DEBUG_MODULE_ENABLED
78#define FLASH_MODULE_ENABLED
79#define CRC_MODULE_ENABLED
80#define WWDT_MODULE_ENABLED
81#define WDT_MODULE_ENABLED
82#define EXINT_MODULE_ENABLED
83#define SDIO_MODULE_ENABLED
84#define XMC_MODULE_ENABLED
85#define USB_MODULE_ENABLED
86#define ACC_MODULE_ENABLED
87#define MISC_MODULE_ENABLED
88#define QSPI_MODULE_ENABLED
89#define DVP_MODULE_ENABLED
90#define SCFG_MODULE_ENABLED
91#define EMAC_MODULE_ENABLED
92
93/* includes ------------------------------------------------------------------*/
94#ifdef CRM_MODULE_ENABLED
95#include "at32f435_437_crm.h"
96#endif
97#ifdef TMR_MODULE_ENABLED
98#include "at32f435_437_tmr.h"
99#endif
100#ifdef ERTC_MODULE_ENABLED
101#include "at32f435_437_ertc.h"
102#endif
103#ifdef GPIO_MODULE_ENABLED
104#include "at32f435_437_gpio.h"
105#endif
106#ifdef I2C_MODULE_ENABLED
107#include "at32f435_437_i2c.h"
108#endif
109#ifdef USART_MODULE_ENABLED
110#include "at32f435_437_usart.h"
111#endif
112#ifdef PWC_MODULE_ENABLED
113#include "at32f435_437_pwc.h"
114#endif
115#ifdef CAN_MODULE_ENABLED
116#include "at32f435_437_can.h"
117#endif
118#ifdef ADC_MODULE_ENABLED
119#include "at32f435_437_adc.h"
120#endif
121#ifdef DAC_MODULE_ENABLED
122#include "at32f435_437_dac.h"
123#endif
124#ifdef SPI_MODULE_ENABLED
125#include "at32f435_437_spi.h"
126#endif
127#ifdef DMA_MODULE_ENABLED
128#include "at32f435_437_dma.h"
129#endif
130#ifdef DEBUG_MODULE_ENABLED
131#include "at32f435_437_debug.h"
132#endif
133#ifdef FLASH_MODULE_ENABLED
134#include "at32f435_437_flash.h"
135#endif
136#ifdef CRC_MODULE_ENABLED
137#include "at32f435_437_crc.h"
138#endif
139#ifdef WWDT_MODULE_ENABLED
140#include "at32f435_437_wwdt.h"
141#endif
142#ifdef WDT_MODULE_ENABLED
143#include "at32f435_437_wdt.h"
144#endif
145#ifdef EXINT_MODULE_ENABLED
146#include "at32f435_437_exint.h"
147#endif
148#ifdef SDIO_MODULE_ENABLED
149#include "at32f435_437_sdio.h"
150#endif
151#ifdef XMC_MODULE_ENABLED
152#include "at32f435_437_xmc.h"
153#endif
154#ifdef ACC_MODULE_ENABLED
155#include "at32f435_437_acc.h"
156#endif
157#ifdef MISC_MODULE_ENABLED
158#include "at32f435_437_misc.h"
159#endif
160#ifdef EDMA_MODULE_ENABLED
161#include "at32f435_437_edma.h"
162#endif
163#ifdef QSPI_MODULE_ENABLED
164#include "at32f435_437_qspi.h"
165#endif
166#ifdef SCFG_MODULE_ENABLED
167#include "at32f435_437_scfg.h"
168#endif
169#ifdef EMAC_MODULE_ENABLED
170#include "at32f435_437_emac.h"
171#endif
172#ifdef DVP_MODULE_ENABLED
173#include "at32f435_437_dvp.h"
174#endif
175#ifdef USB_MODULE_ENABLED
176#include "at32f435_437_usb.h"
177#endif
178
187#ifdef __cplusplus
188}
189#endif
190
191#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • at_start_f435
  • templates
  • inc
project/at_start_f435/templates/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • at_start_f435
  • templates
  • src
Functions
project/at_start_f435/templates/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/templates/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • at_start_f435
  • templates
  • src
project/at_start_f435/templates/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
57void system_clock_config(void)
58{
59 /* enable pwc periph clock */
60 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
61
62 /* config ldo voltage */
63 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
64
65 /* set the flash clock divider */
66 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
67
68 /* reset crm */
69 crm_reset();
70
71 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
72
73 /* wait till hext is ready */
74 while(crm_hext_stable_wait() == ERROR)
75 {
76 }
77
78 /* config pll clock resource
79 common frequency config list: pll source selected hick or hext(8mhz)
80 _______________________________________________________________________________________
81 | | | | | | | | | |
82 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
83 |________|_________|_________|_________|_________|_________|_________|_________________|
84 | | | | | | | | | |
85 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
86 | | | | | | | | | |
87 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
88 | | | | | | | | | |
89 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
90 |________|_________|_________|_________|_________|_________|_________|________|________|
91
92 if pll clock source selects hext with other frequency values, or configure pll to other
93 frequency values, please use the at32 new clock configuration tool for configuration. */
94 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
95
96 /* enable pll */
97 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
98
99 /* wait till pll is ready */
100 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
101 {
102 }
103
104 /* config ahbclk */
105 crm_ahb_div_set(CRM_AHB_DIV_1);
106
107 /* config apb2clk */
108 crm_apb2_div_set(CRM_APB2_DIV_2);
109
110 /* config apb1clk */
111 crm_apb1_div_set(CRM_APB1_DIV_2);
112
113 /* enable auto step mode */
114 crm_auto_step_mode_enable(TRUE);
115
116 /* select pll as system clock source */
117 crm_sysclk_switch(CRM_SCLK_PLL);
118
119 /* wait till pll is used as system clock source */
120 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
121 {
122 }
123
124 /* disable auto step mode */
125 crm_auto_step_mode_enable(FALSE);
126
127 /* update system_core_clock global variable */
128 system_core_clock_update();
129}
130
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • at_start_f435
  • templates
  • src
Functions
project/at_start_f435/templates/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/templates/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • at_start_f435
  • templates
  • src
project/at_start_f435/templates/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/templates/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/templates/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/templates/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/templates/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/templates/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/templates/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/templates/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/templates/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/templates/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • at_start_f435
  • templates
  • src
Macros | Functions | Variables
project/at_start_f435/templates/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | DELAY 100
#define | FAST 1
#define | SLOW 4

Functions

void | button_exint_init (void)
configure button exint More...
void | button_isr (void)
button handler function More...
void | EXINT0_IRQHandler (void)
exint0 interrupt handler More...
int | main (void)
main function. More...

Variables

uint8_t g_speed = 1

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f435/templates/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • at_start_f435
  • templates
  • src
project/at_start_f435/templates/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define DELAY 100
39#define FAST 1
40#define SLOW 4
41
42uint8_t g_speed = FAST;
43
44void button_exint_init(void);
45void button_isr(void);
46
52void button_exint_init(void)
53{
54 exint_init_type exint_init_struct;
55
56 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
57 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
58
59 exint_default_para_init(&exint_init_struct);
60 exint_init_struct.line_enable = TRUE;
61 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
62 exint_init_struct.line_select = EXINT_LINE_0;
63 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
64 exint_init(&exint_init_struct);
65
66 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
67 nvic_irq_enable(EXINT0_IRQn, 0, 0);
68}
69
75void button_isr(void)
76{
77 /* delay 5ms */
78 delay_ms(5);
79
80 /* clear interrupt pending bit */
81 exint_flag_clear(EXINT_LINE_0);
82
83 /* check input pin state */
84 if(SET == gpio_input_data_bit_read(USER_BUTTON_PORT, USER_BUTTON_PIN))
85 {
86 if(g_speed == SLOW)
87 g_speed = FAST;
88 else
89 g_speed = SLOW;
90 }
91}
92
98void EXINT0_IRQHandler(void)
99{
100 button_isr();
101}
102
108int main(void)
109{
110 system_clock_config();
111
112 at32_board_init();
113
114 button_exint_init();
115
116 while(1)
117 {
118 at32_led_toggle(LED2);
119 delay_ms(g_speed * DELAY);
120 at32_led_toggle(LED3);
121 delay_ms(g_speed * DELAY);
122 at32_led_toggle(LED4);
123 delay_ms(g_speed * DELAY);
124 }
125}
126
at32f435_437_board.h
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
SLOW
#define SLOW
Definition: project/at_start_f435/templates/src/main.c:40
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/templates/src/main.c:52
DELAY
#define DELAY
Definition: project/at_start_f435/templates/src/main.c:38
FAST
#define FAST
Definition: project/at_start_f435/templates/src/main.c:39
main
int main(void)
main function.
Definition: project/at_start_f435/templates/src/main.c:108
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/templates/src/main.c:98
g_speed
uint8_t g_speed
Definition: project/at_start_f435/templates/src/main.c:42
button_isr
void button_isr(void)
button handler function
Definition: project/at_start_f435/templates/src/main.c:75
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
USER_BUTTON_PORT
#define USER_BUTTON_PORT
Definition: at32f435_437_board.h:103
USER_BUTTON_PIN
#define USER_BUTTON_PIN
Definition: at32f435_437_board.h:102
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_input_data_bit_read
flag_status gpio_input_data_bit_read(gpio_type *gpio_x, uint16_t pins)
read the specified input port pin.
Definition: at32f435_437_gpio.c:170
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • at_start_f437
  • examples
  • acc
  • calibration
  • inc
project/at_start_f437/examples/acc/calibration/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • acc
  • calibration
  • inc
project/at_start_f437/examples/acc/calibration/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • acc
  • calibration
  • inc
project/at_start_f437/examples/acc/calibration/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • acc
  • calibration
  • inc
project/at_start_f437/examples/acc/calibration/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
50#define USE_OTG_DEVICE_MODE
51
55/* #define USE_OTG_HOST_MODE */
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65//#define OTG_USB_ID 2
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97#endif
98
99#if (OTG_USB_ID == 2)
100#define USB_ID 1
101#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
102#define OTG_IRQ OTGFS2_IRQn
103#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
104#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
105#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
106#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
107
108#define OTG_PIN_GPIO GPIOB
109#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
110
111#define OTG_PIN_DP GPIO_PINS_15
112#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
113
114#define OTG_PIN_DM GPIO_PINS_14
115#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
116
117#define OTG_PIN_VBUS GPIO_PINS_13
118#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
119
120#define OTG_PIN_ID GPIO_PINS_12
121#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
122
123#define OTG_PIN_SOF_GPIO GPIOA
124#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
125#define OTG_PIN_SOF GPIO_PINS_4
126#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
127
128#define OTG_PIN_MUX GPIO_MUX_12
129#endif
130
134#ifdef USE_OTG_DEVICE_MODE
138/* otg1 device fifo */
139#define USBD_RX_SIZE 128
140#define USBD_EP0_TX_SIZE 24
141#define USBD_EP1_TX_SIZE 20
142#define USBD_EP2_TX_SIZE 20
143#define USBD_EP3_TX_SIZE 20
144#define USBD_EP4_TX_SIZE 20
145#define USBD_EP5_TX_SIZE 20
146#define USBD_EP6_TX_SIZE 20
147#define USBD_EP7_TX_SIZE 20
148
149/* otg2 device fifo */
150#define USBD2_RX_SIZE 128
151#define USBD2_EP0_TX_SIZE 24
152#define USBD2_EP1_TX_SIZE 20
153#define USBD2_EP2_TX_SIZE 20
154#define USBD2_EP3_TX_SIZE 20
155#define USBD2_EP4_TX_SIZE 20
156#define USBD2_EP5_TX_SIZE 20
157#define USBD2_EP6_TX_SIZE 20
158#define USBD2_EP7_TX_SIZE 20
159
163#ifndef USB_EPT_MAX_NUM
164#define USB_EPT_MAX_NUM 8
165#endif
166#endif
167
171#ifdef USE_OTG_HOST_MODE
172#ifndef USB_HOST_CHANNEL_NUM
173#define USB_HOST_CHANNEL_NUM 16
174#endif
175
179/* otg1 host fifo */
180#define USBH_RX_FIFO_SIZE 128
181#define USBH_NP_TX_FIFO_SIZE 96
182#define USBH_P_TX_FIFO_SIZE 96
183
184/* otg2 host fifo */
185#define USBH2_RX_FIFO_SIZE 128
186#define USBH2_NP_TX_FIFO_SIZE 96
187#define USBH2_P_TX_FIFO_SIZE 96
188#endif
189
193/* #define USB_SOF_OUTPUT_ENABLE */
194
198#define USB_VBUS_IGNORE
199
203/* #define USB_LOW_POWER_WAKUP */
204
205void usb_delay_ms(uint32_t ms);
206void usb_delay_us(uint32_t us);
207#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • acc
  • calibration
  • src
Functions
project/at_start_f437/examples/acc/calibration/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/acc/calibration/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • acc
  • calibration
  • src
project/at_start_f437/examples/acc/calibration/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/acc/calibration/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • acc
  • calibration
  • src
Functions
project/at_start_f437/examples/acc/calibration/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/acc/calibration/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • acc
  • calibration
  • src
project/at_start_f437/examples/acc/calibration/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • acc
  • calibration
  • src
Macros | Functions | Variables
project/at_start_f437/examples/acc/calibration/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "cdc_class.h"
#include "cdc_desc.h"

Go to the source code of this file.

Macros

#define ACC_TRIM

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | ACC_IRQHandler (void)
acc interrupt handler More...
int | main (void)
main function. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
uint8_t | usb_buffer [256]
uint32_t | acc_c2_value = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/acc/calibration/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • acc
  • calibration
  • src
project/at_start_f437/examples/acc/calibration/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
30#include "usb_conf.h"
31#include "usb_core.h"
32#include "usbd_int.h"
33#include "cdc_class.h"
34#include "cdc_desc.h"
35
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46uint8_t usb_buffer[256];
47
48void usb_clock48m_select(usb_clk48_s clk_s);
49void usb_gpio_config(void);
50void usb_low_power_wakeup_config(void);
51
52//#define ACC_CAL
53#define ACC_TRIM
54
55uint32_t acc_c2_value = 0;
56
62void usb_gpio_config(void)
63{
64 gpio_init_type gpio_init_struct;
65
66 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
67 gpio_default_para_init(&gpio_init_struct);
68
69 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
70 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
71 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
72 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
73
74 /* dp and dm */
75 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
76 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
77
78 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
79 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
80
81#ifdef USB_SOF_OUTPUT_ENABLE
82 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
83 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
84 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
85 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
86#endif
87
88 /* otgfs use vbus pin */
89#ifndef USB_VBUS_IGNORE
90 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
91 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
92 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
93 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
94#endif
95}
96#ifdef USB_LOW_POWER_WAKUP
102void usb_low_power_wakeup_config(void)
103{
104 exint_init_type exint_init_struct;
105
106 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
107 exint_default_para_init(&exint_init_struct);
108
109 exint_init_struct.line_enable = TRUE;
110 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
111 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
112 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
113 exint_init(&exint_init_struct);
114
115 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
116}
117
123void OTG_WKUP_HANDLER(void)
124{
125 exint_flag_clear(OTG_WKUP_EXINT_LINE);
126}
127
128#endif
129
135void OTG_IRQ_HANDLER(void)
136{
137 usbd_irq_handler(&otg_core_struct);
138}
144void ACC_IRQHandler(void)
145{
146 if(acc_flag_get(ACC_CALRDY_FLAG) != RESET)
147 {
148 at32_led_toggle(LED2);
149
150 /* clear acc calibration ready flag */
151 acc_flag_clear(ACC_CALRDY_FLAG);
152 }
153 if(acc_flag_get(ACC_RSLOST_FLAG) != RESET)
154 {
155 at32_led_toggle(LED3);
156
157 /* clear acc reference signal lost flag */
158 acc_flag_clear(ACC_RSLOST_FLAG);
159 }
160}
161
167int main(void)
168{
169 uint16_t data_len;
170
171 uint8_t send_zero_packet = 0;
172
173 uint32_t timeout;
174
175 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
176
177 system_clock_config();
178
179 at32_board_init();
180
181 usb_gpio_config();
182#ifdef USB_LOW_POWER_WAKUP
183 usb_low_power_wakeup_config();
184#endif
185
186 /* enable otgfs clock */
187 crm_periph_clock_enable(OTG_CLOCK, TRUE);
188
189 /* select usb 48m clcok source */
190 usb_clock48m_select(USB_CLK_HICK);
191
192 /* enable otgfs irq */
193 nvic_irq_enable(OTG_IRQ, 0, 0);
194
195 /* init usb */
196 usbd_init(&otg_core_struct,
197 USB_FULL_SPEED_CORE_ID,
198 USB_ID,
199 &cdc_class_handler,
200 &cdc_desc_handler);
201
202
203 /* acc config */
204 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
205
206 /* enable the acc calibration ready interrupt */
207 acc_interrupt_enable(ACC_CALRDYIEN_INT, TRUE);
208
209 /* enable the acc reference signal lost interrupt */
210 acc_interrupt_enable(ACC_EIEN_INT, TRUE);
211
212 /* config nvic for acc int */
213 nvic_irq_enable(ACC_IRQn, 1, 0);
214
215 /* update the c1\c2\c3 value */
216 acc_c2_value = 8000;
217 #ifdef ACC_CAL
218 acc_write_c1(acc_c2_value - 20);
219 acc_write_c2(acc_c2_value);
220 acc_write_c3(acc_c2_value + 20);
221 #else
222 acc_write_c1(acc_c2_value - 10);
223 acc_write_c2(acc_c2_value);
224 acc_write_c3(acc_c2_value + 10);
225 #endif
226
227 #if (USB_ID == 0)
228 acc_sof_select(ACC_SOF_OTG1);
229#else
230 acc_sof_select(ACC_SOF_OTG2);
231#endif
232
233 /* open acc calibration */
234 #if defined(ACC_CAL)
235 acc_calibration_mode_enable(ACC_CAL_HICKCAL, TRUE);
236 #elif defined(ACC_TRIM)
237 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
238 #endif
239
240 while(1)
241 {
242 /* get usb vcp receive data */
243 data_len = usb_vcp_get_rxdata(&otg_core_struct.dev, usb_buffer);
244
245 if(data_len > 0 || send_zero_packet == 1)
246 {
247
248 /* bulk transfer is complete when the endpoint does one of the following
249 1 has transferred exactly the amount of data expected
250 2 transfers a packet with a payload size less than wMaxPacketSize or transfers a zero-length packet
251 */
252 if(data_len > 0)
253 send_zero_packet = 1;
254
255 if(data_len == 0)
256 send_zero_packet = 0;
257
258 timeout = 5000000;
259 do
260 {
261 /* send data to host */
262 if(usb_vcp_send_data(&otg_core_struct.dev, usb_buffer, data_len) == SUCCESS)
263 {
264 break;
265 }
266 }while(timeout --);
267 }
268 }
269}
270
276void usb_clock48m_select(usb_clk48_s clk_s)
277{
278 if(clk_s == USB_CLK_HICK)
279 {
280 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
281 }
282 else
283 {
284 switch(system_core_clock)
285 {
286 /* 48MHz */
287 case 48000000:
288 crm_usb_clock_div_set(CRM_USB_DIV_1);
289 break;
290
291 /* 72MHz */
292 case 72000000:
293 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
294 break;
295
296 /* 96MHz */
297 case 96000000:
298 crm_usb_clock_div_set(CRM_USB_DIV_2);
299 break;
300
301 /* 120MHz */
302 case 120000000:
303 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
304 break;
305
306 /* 144MHz */
307 case 144000000:
308 crm_usb_clock_div_set(CRM_USB_DIV_3);
309 break;
310
311 /* 168MHz */
312 case 168000000:
313 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
314 break;
315
316 /* 192MHz */
317 case 192000000:
318 crm_usb_clock_div_set(CRM_USB_DIV_4);
319 break;
320
321 /* 216MHz */
322 case 216000000:
323 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
324 break;
325
326 /* 240MHz */
327 case 240000000:
328 crm_usb_clock_div_set(CRM_USB_DIV_5);
329 break;
330
331 /* 264MHz */
332 case 264000000:
333 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
334 break;
335
336 /* 288MHz */
337 case 288000000:
338 crm_usb_clock_div_set(CRM_USB_DIV_6);
339 break;
340
341 default:
342 break;
343
344 }
345 }
346}
347
353void usb_delay_ms(uint32_t ms)
354{
355 /* user can define self delay function */
356 delay_ms(ms);
357}
358
364void usb_delay_us(uint32_t us)
365{
366 delay_us(us);
367}
368
at32f435_437_board.h
cdc_class.h
usb cdc class file
cdc_desc.h
usb cdc descriptor header file
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
ACC_IRQHandler
void ACC_IRQHandler(void)
acc interrupt handler
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:144
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
usb_buffer
uint8_t usb_buffer[256]
Definition: project/at_start_f437/examples/acc/calibration/src/main.c:46
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/acc/calibration/src/main.c:45
acc_c2_value
uint32_t acc_c2_value
Definition: project/at_start_f437/examples/acc/calibration/src/main.c:55
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
data_len
uint16_t data_len
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:47
ACC_CAL_HICKCAL
#define ACC_CAL_HICKCAL
Definition: at32f435_437_acc.h:51
ACC_RSLOST_FLAG
#define ACC_RSLOST_FLAG
Definition: at32f435_437_acc.h:54
ACC_EIEN_INT
#define ACC_EIEN_INT
Definition: at32f435_437_acc.h:58
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_CALRDYIEN_INT
#define ACC_CALRDYIEN_INT
Definition: at32f435_437_acc.h:57
ACC_CALRDY_FLAG
#define ACC_CALRDY_FLAG
Definition: at32f435_437_acc.h:55
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_interrupt_enable
void acc_interrupt_enable(uint16_t acc_int, confirm_state new_state)
enable or disable the specified acc interrupts.
Definition: at32f435_437_acc.c:98
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_flag_get
flag_status acc_flag_get(uint16_t acc_flag)
check whether the specified acc flag is set or not.
Definition: at32f435_437_acc.c:198
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_flag_clear
void acc_flag_clear(uint16_t acc_flag)
clear the specified acc flag is set or not.
Definition: at32f435_437_acc.c:214
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
usb_vcp_get_rxdata
uint16_t usb_vcp_get_rxdata(void *udev, uint8_t *recv_data)
usb device class rx data process
Definition: cdc_class.c:339
usb_vcp_send_data
error_status usb_vcp_send_data(void *udev, uint8_t *send_data, uint16_t len)
usb device class send data
Definition: cdc_class.c:369
cdc_class_handler
usbd_class_handler cdc_class_handler
Definition: cdc_class.c:69
cdc_desc_handler
usbd_desc_handler cdc_desc_handler
device descriptor handler structure
Definition: cdc_desc.c:64
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
ACC_IRQn
@ ACC_IRQn
Definition: at32f435_437.h:230
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • combine_mode_ordinary_shift_twoslave_dma3
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • combine_mode_ordinary_shift_twoslave_dma3
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • combine_mode_ordinary_shift_twoslave_dma3
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • combine_mode_ordinary_shift_twoslave_dma3
  • src
Functions
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • combine_mode_ordinary_shift_twoslave_dma3
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • combine_mode_ordinary_shift_twoslave_dma3
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1_channel1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint32_t | dma1_trans_complete_flag
__IO uint32_t | adc1_overflow_flag
__IO uint32_t | adc2_overflow_flag
__IO uint32_t | adc3_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • combine_mode_ordinary_shift_twoslave_dma3
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38extern __IO uint32_t dma1_trans_complete_flag;
39extern __IO uint32_t adc1_overflow_flag;
40extern __IO uint32_t adc2_overflow_flag;
41extern __IO uint32_t adc3_overflow_flag;
42
48void NMI_Handler(void)
49{
50}
51
57void HardFault_Handler(void)
58{
59 /* go to infinite loop when hard fault exception occurs */
60 while(1)
61 {
62 }
63}
64
70void MemManage_Handler(void)
71{
72 /* go to infinite loop when memory manage exception occurs */
73 while(1)
74 {
75 }
76}
77
83void BusFault_Handler(void)
84{
85 /* go to infinite loop when bus fault exception occurs */
86 while(1)
87 {
88 }
89}
90
96void UsageFault_Handler(void)
97{
98 /* go to infinite loop when usage fault exception occurs */
99 while(1)
100 {
101 }
102}
103
109void SVC_Handler(void)
110{
111}
112
118void DebugMon_Handler(void)
119{
120}
121
127void PendSV_Handler(void)
128{
129}
130
136void SysTick_Handler(void)
137{
138}
139
145void DMA1_Channel1_IRQHandler(void)
146{
147 if(dma_flag_get(DMA1_FDT1_FLAG) != RESET)
148 {
149 dma_flag_clear(DMA1_FDT1_FLAG);
150 dma1_trans_complete_flag = 1;
151 }
152}
153
159void ADC1_2_3_IRQHandler(void)
160{
161 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
162 {
163 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
164 adc1_overflow_flag++;
165 }
166 if(adc_flag_get(ADC2, ADC_OCCO_FLAG) != RESET)
167 {
168 adc_flag_clear(ADC2, ADC_OCCO_FLAG);
169 adc2_overflow_flag++;
170 }
171 if(adc_flag_get(ADC3, ADC_OCCO_FLAG) != RESET)
172 {
173 adc_flag_clear(ADC3, ADC_OCCO_FLAG);
174 adc3_overflow_flag++;
175 }
176}
177
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
adc3_overflow_flag
__IO uint32_t adc3_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:42
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
dma1_trans_complete_flag
__IO uint32_t dma1_trans_complete_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:39
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
adc2_overflow_flag
__IO uint32_t adc2_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:41
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
ADC3
#define ADC3
Definition: at32f435_437_adc.h:868
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • combine_mode_ordinary_shift_twoslave_dma3
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | tmr1_config (void)
tmr1 configuration. More...
static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adccom_ordinary_valuetab [6]
__IO uint32_t | dma1_trans_complete_flag = 0
__IO uint32_t | adc1_overflow_flag = 0
__IO uint32_t | adc2_overflow_flag = 0
__IO uint32_t | adc3_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< ordinary channel conversion overflow interrupt

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

< adc ready to conversion flag

< adc ready to conversion flag

< adc ready to conversion flag

< adc ready to conversion flag

< adc ready to conversion flag

Definition at line 132 of file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 99 of file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 7

< gpio pins number 0

Definition at line 54 of file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c.

◆ tmr1_config()

static void tmr1_config ( void )
static

tmr1 configuration.

Parameters
none
Return values
none

Definition at line 78 of file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • combine_mode_ordinary_shift_twoslave_dma3
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adccom_ordinary_valuetab[6];
39__IO uint32_t dma1_trans_complete_flag = 0;
40__IO uint32_t adc1_overflow_flag = 0;
41__IO uint32_t adc2_overflow_flag = 0;
42__IO uint32_t adc3_overflow_flag = 0;
43
44static void gpio_config(void);
45static void tmr1_config(void);
46static void dma_config(void);
47static void adc_config(void);
48
54static void gpio_config(void)
55{
56 gpio_init_type gpio_initstructure;
57 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
58 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
59 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
60
61 gpio_default_para_init(&gpio_initstructure);
62
63 /* config adc pin as analog input mode */
64 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
65 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_7;
66 gpio_init(GPIOA, &gpio_initstructure);
67
68 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
69 gpio_initstructure.gpio_pins = GPIO_PINS_0;
70 gpio_init(GPIOC, &gpio_initstructure);
71}
72
78static void tmr1_config(void)
79{
80 crm_clocks_freq_type crm_clocks_freq_struct = {0};
81
82 /* get system clock */
83 crm_clocks_freq_get(&crm_clocks_freq_struct);
84
85 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
86
87 /* (systemclock/(systemclock/10000))/1000 = 10Hz(100ms) */
88 tmr_base_init(TMR1, 999, (crm_clocks_freq_struct.sclk_freq/10000 - 1));
89 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
90 tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
91 tmr_primary_mode_select(TMR1, TMR_PRIMARY_SEL_OVERFLOW);
92}
93
99static void dma_config(void)
100{
101 dma_init_type dma_init_struct;
102 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
103 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
104
105 dma_reset(DMA1_CHANNEL1);
106 dma_default_para_init(&dma_init_struct);
107 dma_init_struct.buffer_size = 6;
108 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
109 dma_init_struct.memory_base_addr = (uint32_t)adccom_ordinary_valuetab;
110 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
111 dma_init_struct.memory_inc_enable = TRUE;
112 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADCCOM->codt);
113 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
114 dma_init_struct.peripheral_inc_enable = FALSE;
115 dma_init_struct.priority = DMA_PRIORITY_HIGH;
116 dma_init_struct.loop_mode_enable = FALSE;
117 dma_init(DMA1_CHANNEL1, &dma_init_struct);
118
119 dmamux_enable(DMA1, TRUE);
120 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
121
122 /* enable dma transfer complete interrupt */
123 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
124 dma_channel_enable(DMA1_CHANNEL1, TRUE);
125}
126
132static void adc_config(void)
133{
134 adc_common_config_type adc_common_struct;
135 adc_base_config_type adc_base_struct;
136 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
137 crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
138 crm_periph_clock_enable(CRM_ADC3_PERIPH_CLOCK, TRUE);
139 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
140
141 adc_common_default_para_init(&adc_common_struct);
142
143 /* config combine mode */
144 adc_common_struct.combine_mode = ADC_ORDINARY_SHIFT_ONLY_TWOSLAVE_MODE;
145
146 /* config division,adcclk is division by hclk */
147 adc_common_struct.div = ADC_HCLK_DIV_4;
148
149 /* config common dma mode,it's useful for ordinary group in combine mode */
150 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_3;
151
152 /* config common dma request repeat */
153 adc_common_struct.common_dma_request_repeat_state = FALSE;
154
155 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
156 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_20CYCLES;
157
158 /* config inner temperature sensor and vintrv */
159 adc_common_struct.tempervintrv_state = FALSE;
160
161 /* config voltage battery */
162 adc_common_struct.vbat_state = FALSE;
163 adc_common_config(&adc_common_struct);
164
165 adc_base_default_para_init(&adc_base_struct);
166
167 adc_base_struct.sequence_mode = FALSE;
168 adc_base_struct.repeat_mode = FALSE;
169 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
170 adc_base_struct.ordinary_channel_length = 1;
171 adc_base_config(ADC1, &adc_base_struct);
172
173 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
174
175 /* config ordinary channel */
176 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_2_5);
177
178 /* config ordinary trigger source and trigger edge */
179 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1TRGOUT, ADC_ORDINARY_TRIG_EDGE_RISING);
180
181 /* config dma mode,it's not useful when common dma mode is use */
182 adc_dma_mode_enable(ADC1, FALSE);
183
184 /* config dma request repeat,it's not useful when common dma mode is use */
185 adc_dma_request_repeat_enable(ADC1, FALSE);
186
187 /* enable adc overflow interrupt */
188 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
189
190 adc_base_config(ADC2, &adc_base_struct);
191 adc_resolution_set(ADC2, ADC_RESOLUTION_12B);
192 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_7, 1, ADC_SAMPLETIME_2_5);
193 adc_ordinary_conversion_trigger_set(ADC2, ADC_ORDINARY_TRIG_TMR1TRGOUT, ADC_ORDINARY_TRIG_EDGE_NONE);
194 adc_dma_mode_enable(ADC2, FALSE);
195 adc_dma_request_repeat_enable(ADC2, FALSE);
196 adc_interrupt_enable(ADC2, ADC_OCCO_INT, TRUE);
197
198 adc_base_config(ADC3, &adc_base_struct);
199 adc_resolution_set(ADC3, ADC_RESOLUTION_12B);
200 adc_ordinary_channel_set(ADC3, ADC_CHANNEL_10, 1, ADC_SAMPLETIME_2_5);
201 adc_ordinary_conversion_trigger_set(ADC3, ADC_ORDINARY_TRIG_TMR1TRGOUT, ADC_ORDINARY_TRIG_EDGE_NONE);
202 adc_dma_mode_enable(ADC3, FALSE);
203 adc_dma_request_repeat_enable(ADC3, FALSE);
204 adc_interrupt_enable(ADC3, ADC_OCCO_INT, TRUE);
205
206 /* adc enable */
207 adc_enable(ADC1, TRUE);
208 adc_enable(ADC2, TRUE);
209 adc_enable(ADC3, TRUE);
210 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
211 while(adc_flag_get(ADC2, ADC_RDY_FLAG) == RESET);
212 while(adc_flag_get(ADC3, ADC_RDY_FLAG) == RESET);
213
214 /* adc calibration */
215 adc_calibration_init(ADC1);
216 while(adc_calibration_init_status_get(ADC1));
217 adc_calibration_start(ADC1);
218 while(adc_calibration_status_get(ADC1));
219 adc_calibration_init(ADC2);
220 while(adc_calibration_init_status_get(ADC2));
221 adc_calibration_start(ADC2);
222 while(adc_calibration_status_get(ADC2));
223 adc_calibration_init(ADC3);
224 while(adc_calibration_init_status_get(ADC3));
225 adc_calibration_start(ADC3);
226 while(adc_calibration_status_get(ADC3));
227
228 /*set resolution to 8bit.this because calibration must perform at 12 bit resolution */
229 adc_resolution_set(ADC1,ADC_RESOLUTION_8B);
230 adc_resolution_set(ADC2,ADC_RESOLUTION_8B);
231 adc_resolution_set(ADC3,ADC_RESOLUTION_8B);
232 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
233 while(adc_flag_get(ADC2, ADC_RDY_FLAG) == RESET);
234 while(adc_flag_get(ADC3, ADC_RDY_FLAG) == RESET);
235}
236
242int main(void)
243{
244 __IO uint32_t index = 0;
245 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
246
247 /* config the system clock */
248 system_clock_config();
249
250 /* init at start board */
251 at32_board_init();
252 at32_led_off(LED2);
253 at32_led_off(LED3);
254 at32_led_off(LED4);
255 uart_print_init(115200);
256 gpio_config();
257 tmr1_config();
258 dma_config();
259 adc_config();
260 printf("combine_mode_ordinary_shift_twoslave_dma3 \r\n");
261 tmr_counter_enable(TMR1, TRUE);
262 while(dma1_trans_complete_flag == 0);
263 tmr_counter_enable(TMR1, FALSE);
264 if((adc1_overflow_flag != 0) || (adc2_overflow_flag != 0) || (adc3_overflow_flag != 0))
265 {
266 /* printf flag when error occur */
267 at32_led_on(LED3);
268 at32_led_on(LED4);
269 printf("error occur\r\n");
270 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
271 printf("adc2_overflow_flag = %d\r\n",adc2_overflow_flag);
272 printf("adc3_overflow_flag = %d\r\n",adc3_overflow_flag);
273 }
274 else
275 {
276 /* printf data when conversion end without error */
277 printf("conversion end without error\r\n");
278 for(index = 0; index < 6; index++)
279 {
280 printf("adccom_ordinary_valuetab[%d] = 0x%x\r\n",index, adccom_ordinary_valuetab[index]);
281 }
282 printf("\r\n");
283 }
284 at32_led_on(LED2);
285 while(1)
286 {
287 }
288}
289
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adc3_overflow_flag
__IO uint32_t adc3_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:42
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
adccom_ordinary_valuetab
__IO uint16_t adccom_ordinary_valuetab[6]
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:38
dma1_trans_complete_flag
__IO uint32_t dma1_trans_complete_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:39
adc2_overflow_flag
__IO uint32_t adc2_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:41
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_10
@ ADC_CHANNEL_10
Definition: at32f435_437_adc.h:197
ADC_CHANNEL_7
@ ADC_CHANNEL_7
Definition: at32f435_437_adc.h:194
ADC_SAMPLETIME_2_5
@ ADC_SAMPLETIME_2_5
Definition: at32f435_437_adc.h:213
ADC_SAMPLING_INTERVAL_20CYCLES
@ ADC_SAMPLING_INTERVAL_20CYCLES
Definition: at32f435_437_adc.h:159
ADC_COMMON_DMAMODE_3
@ ADC_COMMON_DMAMODE_3
Definition: at32f435_437_adc.h:134
ADC_ORDINARY_SHIFT_ONLY_TWOSLAVE_MODE
@ ADC_ORDINARY_SHIFT_ONLY_TWOSLAVE_MODE
Definition: at32f435_437_adc.h:122
ADC_ORDINARY_TRIG_TMR1TRGOUT
@ ADC_ORDINARY_TRIG_TMR1TRGOUT
Definition: at32f435_437_adc.h:255
ADC_ORDINARY_TRIG_EDGE_RISING
@ ADC_ORDINARY_TRIG_EDGE_RISING
Definition: at32f435_437_adc.h:266
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_RESOLUTION_8B
@ ADC_RESOLUTION_8B
Definition: at32f435_437_adc.h:169
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
ADC3
#define ADC3
Definition: at32f435_437_adc.h:868
ADCCOM
#define ADCCOM
Definition: at32f435_437_adc.h:869
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC3_PERIPH_CLOCK
@ CRM_ADC3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:160
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
CRM_ADC2_PERIPH_CLOCK
@ CRM_ADC2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:159
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_primary_mode_select
void tmr_primary_mode_select(tmr_type *tmr_x, tmr_primary_select_type primary_mode)
select tmr primary mode
Definition: at32f435_437_tmr.c:1222
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_PRIMARY_SEL_OVERFLOW
@ TMR_PRIMARY_SEL_OVERFLOW
Definition: at32f435_437_tmr.h:121
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:99
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:132
tmr1_config
static void tmr1_config(void)
tmr1 configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:78
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:54
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::sclk_freq
uint32_t sclk_freq
Definition: at32f435_437_crm.h:789
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • combine_mode_ordinary_shift_twoslave_dma4
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • combine_mode_ordinary_shift_twoslave_dma4
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • combine_mode_ordinary_shift_twoslave_dma4
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • combine_mode_ordinary_shift_twoslave_dma4
  • src
Functions
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • combine_mode_ordinary_shift_twoslave_dma4
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • combine_mode_ordinary_shift_twoslave_dma4
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1_channel1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint32_t | dma1_trans_complete_flag
__IO uint32_t | adc1_overflow_flag
__IO uint32_t | adc2_overflow_flag
__IO uint32_t | adc3_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • combine_mode_ordinary_shift_twoslave_dma4
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38extern __IO uint32_t dma1_trans_complete_flag;
39extern __IO uint32_t adc1_overflow_flag;
40extern __IO uint32_t adc2_overflow_flag;
41extern __IO uint32_t adc3_overflow_flag;
42
48void NMI_Handler(void)
49{
50}
51
57void HardFault_Handler(void)
58{
59 /* go to infinite loop when hard fault exception occurs */
60 while(1)
61 {
62 }
63}
64
70void MemManage_Handler(void)
71{
72 /* go to infinite loop when memory manage exception occurs */
73 while(1)
74 {
75 }
76}
77
83void BusFault_Handler(void)
84{
85 /* go to infinite loop when bus fault exception occurs */
86 while(1)
87 {
88 }
89}
90
96void UsageFault_Handler(void)
97{
98 /* go to infinite loop when usage fault exception occurs */
99 while(1)
100 {
101 }
102}
103
109void SVC_Handler(void)
110{
111}
112
118void DebugMon_Handler(void)
119{
120}
121
127void PendSV_Handler(void)
128{
129}
130
136void SysTick_Handler(void)
137{
138}
139
145void DMA1_Channel1_IRQHandler(void)
146{
147 if(dma_flag_get(DMA1_FDT1_FLAG) != RESET)
148 {
149 dma_flag_clear(DMA1_FDT1_FLAG);
150 dma1_trans_complete_flag = 1;
151 }
152}
153
159void ADC1_2_3_IRQHandler(void)
160{
161 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
162 {
163 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
164 adc1_overflow_flag++;
165 }
166 if(adc_flag_get(ADC2, ADC_OCCO_FLAG) != RESET)
167 {
168 adc_flag_clear(ADC2, ADC_OCCO_FLAG);
169 adc2_overflow_flag++;
170 }
171 if(adc_flag_get(ADC3, ADC_OCCO_FLAG) != RESET)
172 {
173 adc_flag_clear(ADC3, ADC_OCCO_FLAG);
174 adc3_overflow_flag++;
175 }
176}
177
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
adc3_overflow_flag
__IO uint32_t adc3_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:42
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
dma1_trans_complete_flag
__IO uint32_t dma1_trans_complete_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:39
adc2_overflow_flag
__IO uint32_t adc2_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:41
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
ADC3
#define ADC3
Definition: at32f435_437_adc.h:868
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • combine_mode_ordinary_shift_twoslave_dma4
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | tmr1_config (void)
tmr1 configuration. More...
static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint32_t | adccom_ordinary_valuetab [5]
__IO uint32_t | dma1_trans_complete_flag = 0
__IO uint32_t | adc1_overflow_flag = 0
__IO uint32_t | adc2_overflow_flag = 0
__IO uint32_t | adc3_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< ordinary channel conversion overflow interrupt

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

< adc ready to conversion flag

< adc ready to conversion flag

< adc ready to conversion flag

< adc ready to conversion flag

< adc ready to conversion flag

Definition at line 132 of file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 99 of file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 7

< gpio pins number 0

Definition at line 54 of file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c.

◆ tmr1_config()

static void tmr1_config ( void )
static

tmr1 configuration.

Parameters
none
Return values
none

Definition at line 78 of file project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • combine_mode_ordinary_shift_twoslave_dma4
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint32_t adccom_ordinary_valuetab[5];
39__IO uint32_t dma1_trans_complete_flag = 0;
40__IO uint32_t adc1_overflow_flag = 0;
41__IO uint32_t adc2_overflow_flag = 0;
42__IO uint32_t adc3_overflow_flag = 0;
43
44static void gpio_config(void);
45static void tmr1_config(void);
46static void dma_config(void);
47static void adc_config(void);
48
54static void gpio_config(void)
55{
56 gpio_init_type gpio_initstructure;
57 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
58 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
59 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
60
61 gpio_default_para_init(&gpio_initstructure);
62
63 /* config adc pin as analog input mode */
64 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
65 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_7;
66 gpio_init(GPIOA, &gpio_initstructure);
67
68 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
69 gpio_initstructure.gpio_pins = GPIO_PINS_0;
70 gpio_init(GPIOC, &gpio_initstructure);
71}
72
78static void tmr1_config(void)
79{
80 crm_clocks_freq_type crm_clocks_freq_struct = {0};
81
82 /* get system clock */
83 crm_clocks_freq_get(&crm_clocks_freq_struct);
84
85 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
86
87 /* (systemclock/(systemclock/10000))/1000 = 10Hz(100ms) */
88 tmr_base_init(TMR1, 999, (crm_clocks_freq_struct.sclk_freq/10000 - 1));
89 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
90 tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
91 tmr_primary_mode_select(TMR1, TMR_PRIMARY_SEL_OVERFLOW);
92}
93
99static void dma_config(void)
100{
101 dma_init_type dma_init_struct;
102 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
103 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
104
105 dma_reset(DMA1_CHANNEL1);
106 dma_default_para_init(&dma_init_struct);
107 dma_init_struct.buffer_size = 5;
108 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
109 dma_init_struct.memory_base_addr = (uint32_t)adccom_ordinary_valuetab;
110 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_WORD;
111 dma_init_struct.memory_inc_enable = TRUE;
112 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADCCOM->codt);
113 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_WORD;
114 dma_init_struct.peripheral_inc_enable = FALSE;
115 dma_init_struct.priority = DMA_PRIORITY_HIGH;
116 dma_init_struct.loop_mode_enable = FALSE;
117 dma_init(DMA1_CHANNEL1, &dma_init_struct);
118
119 dmamux_enable(DMA1, TRUE);
120 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
121
122 /* enable dma transfer complete interrupt */
123 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
124 dma_channel_enable(DMA1_CHANNEL1, TRUE);
125}
126
132static void adc_config(void)
133{
134 adc_common_config_type adc_common_struct;
135 adc_base_config_type adc_base_struct;
136 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
137 crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
138 crm_periph_clock_enable(CRM_ADC3_PERIPH_CLOCK, TRUE);
139 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
140
141 adc_common_default_para_init(&adc_common_struct);
142
143 /* config combine mode */
144 adc_common_struct.combine_mode = ADC_ORDINARY_SHIFT_ONLY_TWOSLAVE_MODE;
145
146 /* config division,adcclk is division by hclk */
147 adc_common_struct.div = ADC_HCLK_DIV_4;
148
149 /* config common dma mode,it's useful for ordinary group in combine mode */
150 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_4;
151
152 /* config common dma request repeat */
153 adc_common_struct.common_dma_request_repeat_state = FALSE;
154
155 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
156 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_20CYCLES;
157
158 /* config inner temperature sensor and vintrv */
159 adc_common_struct.tempervintrv_state = FALSE;
160
161 /* config voltage battery */
162 adc_common_struct.vbat_state = FALSE;
163 adc_common_config(&adc_common_struct);
164
165 adc_base_default_para_init(&adc_base_struct);
166
167 adc_base_struct.sequence_mode = FALSE;
168 adc_base_struct.repeat_mode = FALSE;
169 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
170 adc_base_struct.ordinary_channel_length = 1;
171 adc_base_config(ADC1, &adc_base_struct);
172 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
173
174 /* config ordinary channel */
175 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_2_5);
176
177 /* config ordinary trigger source and trigger edge */
178 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1TRGOUT, ADC_ORDINARY_TRIG_EDGE_RISING);
179
180 /* config dma mode,it's not useful when common dma mode is use */
181 adc_dma_mode_enable(ADC1, FALSE);
182
183 /* config dma request repeat,it's not useful when common dma mode is use */
184 adc_dma_request_repeat_enable(ADC1, FALSE);
185
186 /* enable adc overflow interrupt */
187 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
188
189 adc_base_config(ADC2, &adc_base_struct);
190 adc_resolution_set(ADC2, ADC_RESOLUTION_12B);
191 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_7, 1, ADC_SAMPLETIME_2_5);
192 adc_ordinary_conversion_trigger_set(ADC2, ADC_ORDINARY_TRIG_TMR1TRGOUT, ADC_ORDINARY_TRIG_EDGE_NONE);
193 adc_dma_mode_enable(ADC2, FALSE);
194 adc_dma_request_repeat_enable(ADC2, FALSE);
195 adc_interrupt_enable(ADC2, ADC_OCCO_INT, TRUE);
196
197 adc_base_config(ADC3, &adc_base_struct);
198 adc_resolution_set(ADC3, ADC_RESOLUTION_12B);
199 adc_ordinary_channel_set(ADC3, ADC_CHANNEL_10, 1, ADC_SAMPLETIME_2_5);
200 adc_ordinary_conversion_trigger_set(ADC3, ADC_ORDINARY_TRIG_TMR1TRGOUT, ADC_ORDINARY_TRIG_EDGE_NONE);
201 adc_dma_mode_enable(ADC3, FALSE);
202 adc_dma_request_repeat_enable(ADC3, FALSE);
203 adc_interrupt_enable(ADC3, ADC_OCCO_INT, TRUE);
204
205 /* adc enable */
206 adc_enable(ADC1, TRUE);
207 adc_enable(ADC2, TRUE);
208 adc_enable(ADC3, TRUE);
209 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
210 while(adc_flag_get(ADC2, ADC_RDY_FLAG) == RESET);
211 while(adc_flag_get(ADC3, ADC_RDY_FLAG) == RESET);
212
213 /* adc calibration */
214 adc_calibration_init(ADC1);
215 while(adc_calibration_init_status_get(ADC1));
216 adc_calibration_start(ADC1);
217 while(adc_calibration_status_get(ADC1));
218 adc_calibration_init(ADC2);
219 while(adc_calibration_init_status_get(ADC2));
220 adc_calibration_start(ADC2);
221 while(adc_calibration_status_get(ADC2));
222 adc_calibration_init(ADC3);
223 while(adc_calibration_init_status_get(ADC3));
224 adc_calibration_start(ADC3);
225 while(adc_calibration_status_get(ADC3));
226
227 /*set resolution to 8bit.this because calibration must perform at 12 bit resolution */
228 adc_resolution_set(ADC1,ADC_RESOLUTION_8B);
229 adc_resolution_set(ADC2,ADC_RESOLUTION_8B);
230 adc_resolution_set(ADC3,ADC_RESOLUTION_8B);
231 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
232 while(adc_flag_get(ADC2, ADC_RDY_FLAG) == RESET);
233 while(adc_flag_get(ADC3, ADC_RDY_FLAG) == RESET);
234}
235
241int main(void)
242{
243 __IO uint32_t index = 0;
244 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
245
246 /* config the system clock */
247 system_clock_config();
248
249 /* init at start board */
250 at32_board_init();
251 at32_led_off(LED2);
252 at32_led_off(LED3);
253 at32_led_off(LED4);
254 uart_print_init(115200);
255 gpio_config();
256 tmr1_config();
257 dma_config();
258 adc_config();
259 printf("combine_mode_ordinary_shift_twoslave_dma4 \r\n");
260 tmr_counter_enable(TMR1, TRUE);
261 while(dma1_trans_complete_flag == 0);
262 tmr_counter_enable(TMR1, FALSE);
263 if((adc1_overflow_flag != 0) || (adc2_overflow_flag != 0) || (adc3_overflow_flag != 0))
264 {
265 /* printf flag when error occur */
266 at32_led_on(LED3);
267 at32_led_on(LED4);
268 printf("error occur\r\n");
269 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
270 printf("adc2_overflow_flag = %d\r\n",adc2_overflow_flag);
271 printf("adc3_overflow_flag = %d\r\n",adc3_overflow_flag);
272 }
273 else
274 {
275 /* printf data when conversion end without error */
276 printf("conversion end without error\r\n");
277 for(index = 0; index < 5; index++)
278 {
279 printf("adccom_ordinary_valuetab[%d] = 0x%x\r\n",index, adccom_ordinary_valuetab[index]);
280 }
281 printf("\r\n");
282 }
283 at32_led_on(LED2);
284 while(1)
285 {
286 }
287}
288
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adc3_overflow_flag
__IO uint32_t adc3_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c:42
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c:40
dma1_trans_complete_flag
__IO uint32_t dma1_trans_complete_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c:39
adc2_overflow_flag
__IO uint32_t adc2_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c:41
adccom_ordinary_valuetab
__IO uint32_t adccom_ordinary_valuetab[5]
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_10
@ ADC_CHANNEL_10
Definition: at32f435_437_adc.h:197
ADC_CHANNEL_7
@ ADC_CHANNEL_7
Definition: at32f435_437_adc.h:194
ADC_SAMPLETIME_2_5
@ ADC_SAMPLETIME_2_5
Definition: at32f435_437_adc.h:213
ADC_SAMPLING_INTERVAL_20CYCLES
@ ADC_SAMPLING_INTERVAL_20CYCLES
Definition: at32f435_437_adc.h:159
ADC_COMMON_DMAMODE_4
@ ADC_COMMON_DMAMODE_4
Definition: at32f435_437_adc.h:135
ADC_ORDINARY_SHIFT_ONLY_TWOSLAVE_MODE
@ ADC_ORDINARY_SHIFT_ONLY_TWOSLAVE_MODE
Definition: at32f435_437_adc.h:122
ADC_ORDINARY_TRIG_TMR1TRGOUT
@ ADC_ORDINARY_TRIG_TMR1TRGOUT
Definition: at32f435_437_adc.h:255
ADC_ORDINARY_TRIG_EDGE_RISING
@ ADC_ORDINARY_TRIG_EDGE_RISING
Definition: at32f435_437_adc.h:266
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_RESOLUTION_8B
@ ADC_RESOLUTION_8B
Definition: at32f435_437_adc.h:169
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
ADC3
#define ADC3
Definition: at32f435_437_adc.h:868
ADCCOM
#define ADCCOM
Definition: at32f435_437_adc.h:869
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC3_PERIPH_CLOCK
@ CRM_ADC3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:160
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
CRM_ADC2_PERIPH_CLOCK
@ CRM_ADC2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:159
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_WORD
@ DMA_PERIPHERAL_DATA_WIDTH_WORD
Definition: at32f435_437_dma.h:164
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_WORD
@ DMA_MEMORY_DATA_WIDTH_WORD
Definition: at32f435_437_dma.h:174
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_primary_mode_select
void tmr_primary_mode_select(tmr_type *tmr_x, tmr_primary_select_type primary_mode)
select tmr primary mode
Definition: at32f435_437_tmr.c:1222
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_PRIMARY_SEL_OVERFLOW
@ TMR_PRIMARY_SEL_OVERFLOW
Definition: at32f435_437_tmr.h:121
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c:99
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c:132
tmr1_config
static void tmr1_config(void)
tmr1 configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c:78
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c:54
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::sclk_freq
uint32_t sclk_freq
Definition: at32f435_437_crm.h:789
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • combine_mode_ordinary_smlt_oneslave_dma2
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • combine_mode_ordinary_smlt_oneslave_dma2
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • combine_mode_ordinary_smlt_oneslave_dma2
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • combine_mode_ordinary_smlt_oneslave_dma2
  • src
Functions
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • combine_mode_ordinary_smlt_oneslave_dma2
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • combine_mode_ordinary_smlt_oneslave_dma2
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1_channel1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint32_t | dma1_trans_complete_flag
__IO uint32_t | adc1_overflow_flag
__IO uint32_t | adc2_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • combine_mode_ordinary_smlt_oneslave_dma2
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38extern __IO uint32_t dma1_trans_complete_flag;
39extern __IO uint32_t adc1_overflow_flag;
40extern __IO uint32_t adc2_overflow_flag;
41
47void NMI_Handler(void)
48{
49}
50
56void HardFault_Handler(void)
57{
58 /* go to infinite loop when hard fault exception occurs */
59 while(1)
60 {
61 }
62}
63
69void MemManage_Handler(void)
70{
71 /* go to infinite loop when memory manage exception occurs */
72 while(1)
73 {
74 }
75}
76
82void BusFault_Handler(void)
83{
84 /* go to infinite loop when bus fault exception occurs */
85 while(1)
86 {
87 }
88}
89
95void UsageFault_Handler(void)
96{
97 /* go to infinite loop when usage fault exception occurs */
98 while(1)
99 {
100 }
101}
102
108void SVC_Handler(void)
109{
110}
111
117void DebugMon_Handler(void)
118{
119}
120
126void PendSV_Handler(void)
127{
128}
129
135void SysTick_Handler(void)
136{
137}
138
144void DMA1_Channel1_IRQHandler(void)
145{
146 if(dma_flag_get(DMA1_FDT1_FLAG) != RESET)
147 {
148 dma_flag_clear(DMA1_FDT1_FLAG);
149 dma1_trans_complete_flag = 1;
150 }
151}
152
158void ADC1_2_3_IRQHandler(void)
159{
160 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
161 {
162 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
163 adc1_overflow_flag++;
164 }
165 if(adc_flag_get(ADC2, ADC_OCCO_FLAG) != RESET)
166 {
167 adc_flag_clear(ADC2, ADC_OCCO_FLAG);
168 adc2_overflow_flag++;
169 }
170}
171
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
dma1_trans_complete_flag
__IO uint32_t dma1_trans_complete_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:39
adc2_overflow_flag
__IO uint32_t adc2_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:41
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • combine_mode_ordinary_smlt_oneslave_dma2
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint32_t | adccom_ordinary_valuetab [5][3]
__IO uint32_t | dma1_trans_complete_flag = 0
__IO uint32_t | adc1_overflow_flag = 0
__IO uint32_t | adc2_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

< adc ready to conversion flag

Definition at line 108 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 75 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

< gpio pins number 7

< gpio pins number 0

< gpio pins number 1

Definition at line 52 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • combine_mode_ordinary_smlt_oneslave_dma2
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint32_t adccom_ordinary_valuetab[5][3];
39__IO uint32_t dma1_trans_complete_flag = 0;
40__IO uint32_t adc1_overflow_flag = 0;
41__IO uint32_t adc2_overflow_flag = 0;
42
43static void gpio_config(void);
44static void dma_config(void);
45static void adc_config(void);
46
52static void gpio_config(void)
53{
54 gpio_init_type gpio_initstructure;
55 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
56 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
57
58 gpio_default_para_init(&gpio_initstructure);
59
60 /* config adc pin as analog input mode */
61 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
62 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7;
63 gpio_init(GPIOA, &gpio_initstructure);
64
65 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
66 gpio_initstructure.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1;
67 gpio_init(GPIOB, &gpio_initstructure);
68}
69
75static void dma_config(void)
76{
77 dma_init_type dma_init_struct;
78 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
79 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
80
81 dma_reset(DMA1_CHANNEL1);
82 dma_default_para_init(&dma_init_struct);
83 dma_init_struct.buffer_size = 15;
84 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
85 dma_init_struct.memory_base_addr = (uint32_t)adccom_ordinary_valuetab;
86 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_WORD;
87 dma_init_struct.memory_inc_enable = TRUE;
88 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADCCOM->codt);
89 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_WORD;
90 dma_init_struct.peripheral_inc_enable = FALSE;
91 dma_init_struct.priority = DMA_PRIORITY_HIGH;
92 dma_init_struct.loop_mode_enable = FALSE;
93 dma_init(DMA1_CHANNEL1, &dma_init_struct);
94
95 dmamux_enable(DMA1, TRUE);
96 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
97
98 /* enable dma transfer complete interrupt */
99 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
100 dma_channel_enable(DMA1_CHANNEL1, TRUE);
101}
102
108static void adc_config(void)
109{
110 adc_common_config_type adc_common_struct;
111 adc_base_config_type adc_base_struct;
112 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
113 crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
114 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
115
116 adc_common_default_para_init(&adc_common_struct);
117
118 /* config combine mode */
119 adc_common_struct.combine_mode = ADC_ORDINARY_SMLT_ONLY_ONESLAVE_MODE;
120
121 /* config division,adcclk is division by hclk */
122 adc_common_struct.div = ADC_HCLK_DIV_4;
123
124 /* config common dma mode,it's useful for ordinary group in combine mode */
125 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_2;
126
127 /* config common dma request repeat */
128 adc_common_struct.common_dma_request_repeat_state = FALSE;
129
130 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
131 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
132
133 /* config inner temperature sensor and vintrv */
134 adc_common_struct.tempervintrv_state = FALSE;
135
136 /* config voltage battery */
137 adc_common_struct.vbat_state = FALSE;
138 adc_common_config(&adc_common_struct);
139
140 adc_base_default_para_init(&adc_base_struct);
141
142 adc_base_struct.sequence_mode = TRUE;
143 adc_base_struct.repeat_mode = FALSE;
144 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
145 adc_base_struct.ordinary_channel_length = 3;
146 adc_base_config(ADC1, &adc_base_struct);
147 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
148
149 /* config ordinary channel */
150 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_640_5);
151 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_640_5);
152 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_640_5);
153
154 /* config ordinary trigger source and trigger edge */
155 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
156
157 /* config dma mode,it's not useful when common dma mode is use */
158 adc_dma_mode_enable(ADC1, FALSE);
159
160 /* config dma request repeat,it's not useful when common dma mode is use */
161 adc_dma_request_repeat_enable(ADC1, FALSE);
162
163 /* enable adc overflow interrupt */
164 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
165
166 adc_base_config(ADC2, &adc_base_struct);
167 adc_resolution_set(ADC2, ADC_RESOLUTION_12B);
168 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_7, 1, ADC_SAMPLETIME_640_5);
169 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_8, 2, ADC_SAMPLETIME_640_5);
170 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_9, 3, ADC_SAMPLETIME_640_5);
171 adc_ordinary_conversion_trigger_set(ADC2, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
172 adc_dma_mode_enable(ADC2, FALSE);
173 adc_dma_request_repeat_enable(ADC2, FALSE);
174 adc_interrupt_enable(ADC2, ADC_OCCO_INT, TRUE);
175
176 /* adc enable */
177 adc_enable(ADC1, TRUE);
178 adc_enable(ADC2, TRUE);
179 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
180 while(adc_flag_get(ADC2, ADC_RDY_FLAG) == RESET);
181
182 /* adc calibration */
183 adc_calibration_init(ADC1);
184 while(adc_calibration_init_status_get(ADC1));
185 adc_calibration_start(ADC1);
186 while(adc_calibration_status_get(ADC1));
187 adc_calibration_init(ADC2);
188 while(adc_calibration_init_status_get(ADC2));
189 adc_calibration_start(ADC2);
190 while(adc_calibration_status_get(ADC2));
191}
192
198int main(void)
199{
200 __IO uint32_t index = 0;
201 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
202
203 /* config the system clock */
204 system_clock_config();
205
206 /* init at start board */
207 at32_board_init();
208 at32_led_off(LED2);
209 at32_led_off(LED3);
210 at32_led_off(LED4);
211 uart_print_init(115200);
212 gpio_config();
213 dma_config();
214 adc_config();
215 printf("combine_mode_ordinary_smlt_oneslave_dma2 \r\n");
216
217 /* adc1 software trigger start conversion */
218 for(index = 0; index < 5; index++)
219 {
220 adc_ordinary_software_trigger_enable(ADC1, TRUE);
221 delay_ms(100);
222 }
223
224 if((dma1_trans_complete_flag == 0) || (adc1_overflow_flag != 0) || (adc2_overflow_flag != 0))
225 {
226 /* printf flag when error occur */
227 at32_led_on(LED3);
228 at32_led_on(LED4);
229 printf("error occur\r\n");
230 printf("dma1_trans_complete_flag = %d\r\n",dma1_trans_complete_flag);
231 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
232 printf("adc2_overflow_flag = %d\r\n",adc2_overflow_flag);
233 }
234 else
235 {
236 /* printf data when conversion end without error */
237 printf("conversion end without error\r\n");
238 for(index = 0; index < 5; index++)
239 {
240 printf("adc1_ordinary_channel4[%d] = 0x%x\r\n",index, adccom_ordinary_valuetab[index][0] & 0xFFFF);
241 printf("adc1_ordinary_channel5[%d] = 0x%x\r\n",index, adccom_ordinary_valuetab[index][1] & 0xFFFF);
242 printf("adc1_ordinary_channel6[%d] = 0x%x\r\n",index, adccom_ordinary_valuetab[index][2] & 0xFFFF);
243 printf("adc2_ordinary_channel7[%d] = 0x%x\r\n",index, (adccom_ordinary_valuetab[index][0] >> 16) & 0xFFFF);
244 printf("adc2_ordinary_channel8[%d] = 0x%x\r\n",index, (adccom_ordinary_valuetab[index][1] >> 16) & 0xFFFF);
245 printf("adc2_ordinary_channel9[%d] = 0x%x\r\n",index, (adccom_ordinary_valuetab[index][2] >> 16) & 0xFFFF);
246 printf("\r\n");
247 }
248 }
249 at32_led_on(LED2);
250 while(1)
251 {
252 }
253}
254
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adccom_ordinary_valuetab
__IO uint32_t adccom_ordinary_valuetab[5][3]
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c:38
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c:40
dma1_trans_complete_flag
__IO uint32_t dma1_trans_complete_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c:39
adc2_overflow_flag
__IO uint32_t adc2_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c:41
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_9
@ ADC_CHANNEL_9
Definition: at32f435_437_adc.h:196
ADC_CHANNEL_8
@ ADC_CHANNEL_8
Definition: at32f435_437_adc.h:195
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_7
@ ADC_CHANNEL_7
Definition: at32f435_437_adc.h:194
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_640_5
@ ADC_SAMPLETIME_640_5
Definition: at32f435_437_adc.h:220
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_2
@ ADC_COMMON_DMAMODE_2
Definition: at32f435_437_adc.h:133
ADC_ORDINARY_SMLT_ONLY_ONESLAVE_MODE
@ ADC_ORDINARY_SMLT_ONLY_ONESLAVE_MODE
Definition: at32f435_437_adc.h:115
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
ADCCOM
#define ADCCOM
Definition: at32f435_437_adc.h:869
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
CRM_ADC2_PERIPH_CLOCK
@ CRM_ADC2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:159
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_WORD
@ DMA_PERIPHERAL_DATA_WIDTH_WORD
Definition: at32f435_437_dma.h:164
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_WORD
@ DMA_MEMORY_DATA_WIDTH_WORD
Definition: at32f435_437_dma.h:174
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c:75
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c:108
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c:52
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • combine_mode_ordinary_smlt_oneslave_edma
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • combine_mode_ordinary_smlt_oneslave_edma
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • combine_mode_ordinary_smlt_oneslave_edma
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • combine_mode_ordinary_smlt_oneslave_edma
  • src
Functions
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • combine_mode_ordinary_smlt_oneslave_edma
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • combine_mode_ordinary_smlt_oneslave_edma
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | EDMA_Stream1_IRQHandler (void)
this function handles edma_stream1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint32_t | edma_trans_complete_flag
__IO uint32_t | adc1_overflow_flag
__IO uint32_t | adc2_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • combine_mode_ordinary_smlt_oneslave_edma
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38extern __IO uint32_t edma_trans_complete_flag;
39extern __IO uint32_t adc1_overflow_flag;
40extern __IO uint32_t adc2_overflow_flag;
41
47void NMI_Handler(void)
48{
49}
50
56void HardFault_Handler(void)
57{
58 /* go to infinite loop when hard fault exception occurs */
59 while(1)
60 {
61 }
62}
63
69void MemManage_Handler(void)
70{
71 /* go to infinite loop when memory manage exception occurs */
72 while(1)
73 {
74 }
75}
76
82void BusFault_Handler(void)
83{
84 /* go to infinite loop when bus fault exception occurs */
85 while(1)
86 {
87 }
88}
89
95void UsageFault_Handler(void)
96{
97 /* go to infinite loop when usage fault exception occurs */
98 while(1)
99 {
100 }
101}
102
108void SVC_Handler(void)
109{
110}
111
117void DebugMon_Handler(void)
118{
119}
120
126void PendSV_Handler(void)
127{
128}
129
135void SysTick_Handler(void)
136{
137}
138
144void EDMA_Stream1_IRQHandler(void)
145{
146 if(edma_flag_get(EDMA_FDT1_FLAG) != RESET)
147 {
148 edma_flag_clear(EDMA_FDT1_FLAG);
149 edma_trans_complete_flag = 1;
150 }
151}
152
158void ADC1_2_3_IRQHandler(void)
159{
160 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
161 {
162 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
163 adc1_overflow_flag++;
164 }
165 if(adc_flag_get(ADC2, ADC_OCCO_FLAG) != RESET)
166 {
167 adc_flag_clear(ADC2, ADC_OCCO_FLAG);
168 adc2_overflow_flag++;
169 }
170}
171
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
EDMA_Stream1_IRQHandler
void EDMA_Stream1_IRQHandler(void)
this function handles edma_stream1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c:144
adc2_overflow_flag
__IO uint32_t adc2_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:41
edma_trans_complete_flag
__IO uint32_t edma_trans_complete_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c:39
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
edma_flag_get
flag_status edma_flag_get(uint32_t edma_flag)
get the edma flag.
Definition: at32f435_437_edma.c:512
edma_flag_clear
void edma_flag_clear(uint32_t edma_flag)
clear the edma flag.
Definition: at32f435_437_edma.c:549
EDMA_FDT1_FLAG
#define EDMA_FDT1_FLAG
Definition: at32f435_437_edma.h:71
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • combine_mode_ordinary_smlt_oneslave_edma
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | edma_config (void)
edma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint32_t | adccom_ordinary_valuetab [5][3]
__IO uint32_t | edma_trans_complete_flag = 0
__IO uint32_t | adc1_overflow_flag = 0
__IO uint32_t | adc2_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

< adc ready to conversion flag

Definition at line 113 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c.

◆ edma_config()

static void edma_config ( void )
static

edma configuration.

Parameters
none
Return values
none

Definition at line 75 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

< gpio pins number 7

< gpio pins number 0

< gpio pins number 1

Definition at line 52 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • combine_mode_ordinary_smlt_oneslave_edma
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint32_t adccom_ordinary_valuetab[5][3];
39__IO uint32_t edma_trans_complete_flag = 0;
40__IO uint32_t adc1_overflow_flag = 0;
41__IO uint32_t adc2_overflow_flag = 0;
42
43static void gpio_config(void);
44static void edma_config(void);
45static void adc_config(void);
46
52static void gpio_config(void)
53{
54 gpio_init_type gpio_initstructure;
55 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
56 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
57
58 gpio_default_para_init(&gpio_initstructure);
59
60 /* config adc pin as analog input mode */
61 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
62 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7;
63 gpio_init(GPIOA, &gpio_initstructure);
64
65 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
66 gpio_initstructure.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1;
67 gpio_init(GPIOB, &gpio_initstructure);
68}
69
75static void edma_config(void)
76{
77 edma_init_type edma_init_struct;
78 crm_periph_clock_enable(CRM_EDMA_PERIPH_CLOCK, TRUE);
79 nvic_irq_enable(EDMA_Stream1_IRQn, 0, 0);
80
81 edma_reset(EDMA_STREAM1);
82 edma_default_para_init(&edma_init_struct);
83 edma_init_struct.buffer_size = 15;
84 edma_init_struct.direction = EDMA_DIR_PERIPHERAL_TO_MEMORY;
85 edma_init_struct.memory0_base_addr = (uint32_t)adccom_ordinary_valuetab;
86 edma_init_struct.memory_burst_mode = EDMA_MEMORY_SINGLE;
87 edma_init_struct.memory_data_width = EDMA_MEMORY_DATA_WIDTH_WORD;
88 edma_init_struct.memory_inc_enable = TRUE;
89 edma_init_struct.peripheral_base_addr = (uint32_t)&(ADCCOM->codt);
90 edma_init_struct.peripheral_burst_mode = EDMA_PERIPHERAL_SINGLE;
91 edma_init_struct.peripheral_data_width = EDMA_PERIPHERAL_DATA_WIDTH_WORD;
92 edma_init_struct.peripheral_inc_enable = FALSE;
93 edma_init_struct.priority = EDMA_PRIORITY_VERY_HIGH;
94 edma_init_struct.loop_mode_enable = FALSE;
95 edma_init_struct.fifo_threshold = EDMA_FIFO_THRESHOLD_1QUARTER;
96 edma_init_struct.fifo_mode_enable = FALSE;
97 edma_init(EDMA_STREAM1, &edma_init_struct);
98
99 /* edmamux init and enable */
100 edmamux_enable(TRUE);
101 edmamux_init(EDMAMUX_CHANNEL1, EDMAMUX_DMAREQ_ID_ADC1);
102
103 /* enable edma full data transfer intterrupt */
104 edma_interrupt_enable(EDMA_STREAM1, EDMA_FDT_INT, TRUE);
105 edma_stream_enable(EDMA_STREAM1, TRUE);
106}
107
113static void adc_config(void)
114{
115 adc_common_config_type adc_common_struct;
116 adc_base_config_type adc_base_struct;
117 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
118 crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
119 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
120
121 adc_common_default_para_init(&adc_common_struct);
122
123 /* config combine mode */
124 adc_common_struct.combine_mode = ADC_ORDINARY_SMLT_ONLY_ONESLAVE_MODE;
125
126 /* config division,adcclk is division by hclk */
127 adc_common_struct.div = ADC_HCLK_DIV_4;
128
129 /* config common dma mode,it's useful for ordinary group in combine mode */
130 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_2;
131
132 /* config common dma request repeat */
133 adc_common_struct.common_dma_request_repeat_state = FALSE;
134
135 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
136 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
137
138 /* config inner temperature sensor and vintrv */
139 adc_common_struct.tempervintrv_state = FALSE;
140
141 /* config voltage battery */
142 adc_common_struct.vbat_state = FALSE;
143 adc_common_config(&adc_common_struct);
144
145 adc_base_default_para_init(&adc_base_struct);
146
147 adc_base_struct.sequence_mode = TRUE;
148 adc_base_struct.repeat_mode = FALSE;
149 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
150 adc_base_struct.ordinary_channel_length = 3;
151 adc_base_config(ADC1, &adc_base_struct);
152 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
153
154 /* config ordinary channel */
155 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_640_5);
156 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_640_5);
157 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_640_5);
158
159 /* config ordinary trigger source and trigger edge */
160 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
161
162 /* config dma mode,it's not useful when common dma mode is use */
163 adc_dma_mode_enable(ADC1, FALSE);
164
165 /* config dma request repeat,it's not useful when common dma mode is use */
166 adc_dma_request_repeat_enable(ADC1, FALSE);
167
168 /* enable adc overflow interrupt */
169 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
170
171 adc_base_config(ADC2, &adc_base_struct);
172 adc_resolution_set(ADC2, ADC_RESOLUTION_12B);
173 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_7, 1, ADC_SAMPLETIME_640_5);
174 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_8, 2, ADC_SAMPLETIME_640_5);
175 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_9, 3, ADC_SAMPLETIME_640_5);
176 adc_ordinary_conversion_trigger_set(ADC2, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
177 adc_dma_mode_enable(ADC2, FALSE);
178 adc_dma_request_repeat_enable(ADC2, FALSE);
179 adc_interrupt_enable(ADC2, ADC_OCCO_INT, TRUE);
180
181 /* adc enable */
182 adc_enable(ADC1, TRUE);
183 adc_enable(ADC2, TRUE);
184 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
185 while(adc_flag_get(ADC2, ADC_RDY_FLAG) == RESET);
186
187 /* adc calibration */
188 adc_calibration_init(ADC1);
189 while(adc_calibration_init_status_get(ADC1));
190 adc_calibration_start(ADC1);
191 while(adc_calibration_status_get(ADC1));
192 adc_calibration_init(ADC2);
193 while(adc_calibration_init_status_get(ADC2));
194 adc_calibration_start(ADC2);
195 while(adc_calibration_status_get(ADC2));
196}
197
203int main(void)
204{
205 __IO uint32_t index = 0;
206 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
207
208 /* config the system clock */
209 system_clock_config();
210
211 /* init at start board */
212 at32_board_init();
213 at32_led_off(LED2);
214 at32_led_off(LED3);
215 at32_led_off(LED4);
216 uart_print_init(115200);
217 gpio_config();
218 edma_config();
219 adc_config();
220 printf("combine_mode_ordinary_simult \r\n");
221
222 /* adc1 software trigger start conversion */
223 for(index = 0; index < 5; index++)
224 {
225 adc_ordinary_software_trigger_enable(ADC1, TRUE);
226 delay_ms(100);
227 }
228
229 if((edma_trans_complete_flag == 0) || (adc1_overflow_flag != 0) || (adc2_overflow_flag != 0))
230 {
231 /* printf flag when error occur */
232 at32_led_on(LED3);
233 at32_led_on(LED4);
234 printf("error occur\r\n");
235 printf("edma_trans_complete_flag = %d\r\n",edma_trans_complete_flag);
236 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
237 printf("adc2_overflow_flag = %d\r\n",adc2_overflow_flag);
238 }
239 else
240 {
241 /* printf data when conversion end without error */
242 printf("conversion end without error\r\n");
243 for(index = 0; index < 5; index++)
244 {
245 printf("adc1_ordinary_channel4[%d] = 0x%x\r\n",index, adccom_ordinary_valuetab[index][0] & 0xFFFF);
246 printf("adc1_ordinary_channel5[%d] = 0x%x\r\n",index, adccom_ordinary_valuetab[index][1] & 0xFFFF);
247 printf("adc1_ordinary_channel6[%d] = 0x%x\r\n",index, adccom_ordinary_valuetab[index][2] & 0xFFFF);
248 printf("adc2_ordinary_channel7[%d] = 0x%x\r\n",index, (adccom_ordinary_valuetab[index][0] >> 16) & 0xFFFF);
249 printf("adc2_ordinary_channel8[%d] = 0x%x\r\n",index, (adccom_ordinary_valuetab[index][1] >> 16) & 0xFFFF);
250 printf("adc2_ordinary_channel9[%d] = 0x%x\r\n",index, (adccom_ordinary_valuetab[index][2] >> 16) & 0xFFFF);
251 printf("\r\n");
252 }
253 }
254 at32_led_on(LED2);
255 while(1)
256 {
257 }
258}
259
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adccom_ordinary_valuetab
__IO uint32_t adccom_ordinary_valuetab[5][3]
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c:38
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c:40
adc2_overflow_flag
__IO uint32_t adc2_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c:41
edma_trans_complete_flag
__IO uint32_t edma_trans_complete_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c:39
edma_init_struct
edma_init_type edma_init_struct
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c:40
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_9
@ ADC_CHANNEL_9
Definition: at32f435_437_adc.h:196
ADC_CHANNEL_8
@ ADC_CHANNEL_8
Definition: at32f435_437_adc.h:195
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_7
@ ADC_CHANNEL_7
Definition: at32f435_437_adc.h:194
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_640_5
@ ADC_SAMPLETIME_640_5
Definition: at32f435_437_adc.h:220
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_2
@ ADC_COMMON_DMAMODE_2
Definition: at32f435_437_adc.h:133
ADC_ORDINARY_SMLT_ONLY_ONESLAVE_MODE
@ ADC_ORDINARY_SMLT_ONLY_ONESLAVE_MODE
Definition: at32f435_437_adc.h:115
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
ADCCOM
#define ADCCOM
Definition: at32f435_437_adc.h:869
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_EDMA_PERIPH_CLOCK
@ CRM_EDMA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:114
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_ADC2_PERIPH_CLOCK
@ CRM_ADC2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:159
edmamux_init
void edmamux_init(edmamux_channel_type *edmamux_channelx, edmamux_requst_id_sel_type edmamux_req_id)
edmamux init.
Definition: at32f435_437_edma.c:718
edma_init
void edma_init(edma_stream_type *edma_streamx, edma_init_type *edma_init_struct)
edma init.
Definition: at32f435_437_edma.c:115
edma_stream_enable
void edma_stream_enable(edma_stream_type *edma_streamx, confirm_state new_state)
enable or disable the edma streamx.
Definition: at32f435_437_edma.c:198
edma_reset
void edma_reset(edma_stream_type *edma_streamx)
reset edma_streamx channely register.
Definition: at32f435_437_edma.c:58
edmamux_enable
void edmamux_enable(confirm_state new_state)
enable or disable the edma edmamux.
Definition: at32f435_437_edma.c:673
edma_interrupt_enable
void edma_interrupt_enable(edma_stream_type *edma_streamx, uint32_t edma_int, confirm_state new_state)
enable or disable the edma streamx interrupts.
Definition: at32f435_437_edma.c:225
edma_default_para_init
void edma_default_para_init(edma_init_type *edma_init_struct)
edma init struct config with its default value.
Definition: at32f435_437_edma.c:165
EDMA_PRIORITY_VERY_HIGH
@ EDMA_PRIORITY_VERY_HIGH
Definition: at32f435_437_edma.h:192
EDMA_PERIPHERAL_DATA_WIDTH_WORD
@ EDMA_PERIPHERAL_DATA_WIDTH_WORD
Definition: at32f435_437_edma.h:171
EDMA_MEMORY_DATA_WIDTH_WORD
@ EDMA_MEMORY_DATA_WIDTH_WORD
Definition: at32f435_437_edma.h:181
EDMA_MEMORY_SINGLE
@ EDMA_MEMORY_SINGLE
Definition: at32f435_437_edma.h:224
EDMA_PERIPHERAL_SINGLE
@ EDMA_PERIPHERAL_SINGLE
Definition: at32f435_437_edma.h:235
EDMA_FIFO_THRESHOLD_1QUARTER
@ EDMA_FIFO_THRESHOLD_1QUARTER
Definition: at32f435_437_edma.h:200
EDMA_DIR_PERIPHERAL_TO_MEMORY
@ EDMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_edma.h:159
EDMAMUX_DMAREQ_ID_ADC1
@ EDMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_edma.h:259
EDMA_FDT_INT
#define EDMA_FDT_INT
Definition: at32f435_437_edma.h:55
EDMA_STREAM1
#define EDMA_STREAM1
Definition: at32f435_437_edma.h:962
EDMAMUX_CHANNEL1
#define EDMAMUX_CHANNEL1
Definition: at32f435_437_edma.h:989
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
EDMA_Stream1_IRQn
@ EDMA_Stream1_IRQn
Definition: at32f435_437.h:157
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c:113
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c:52
edma_config
static void edma_config(void)
edma configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c:75
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
edma_init_type
edma init type
Definition: at32f435_437_edma.h:440
edma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_edma.h:441
edma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_edma.h:444
edma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_edma.h:446
edma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_edma.h:445
edma_init_type::direction
edma_dir_type direction
Definition: at32f435_437_edma.h:443
edma_init_type::fifo_mode_enable
confirm_state fifo_mode_enable
Definition: at32f435_437_edma.h:451
edma_init_type::peripheral_data_width
edma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_edma.h:447
edma_init_type::fifo_threshold
edma_fifo_threshold_type fifo_threshold
Definition: at32f435_437_edma.h:452
edma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_edma.h:449
edma_init_type::priority
edma_priority_level_type priority
Definition: at32f435_437_edma.h:450
edma_init_type::memory0_base_addr
uint32_t memory0_base_addr
Definition: at32f435_437_edma.h:442
edma_init_type::peripheral_burst_mode
edma_peripheral_burst_type peripheral_burst_mode
Definition: at32f435_437_edma.h:454
edma_init_type::memory_data_width
edma_memory_data_size_type memory_data_width
Definition: at32f435_437_edma.h:448
edma_init_type::memory_burst_mode
edma_memory_burst_type memory_burst_mode
Definition: at32f435_437_edma.h:453
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma1
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma1
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma1
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma1
  • src
Functions
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma1
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma1
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1_channel1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint32_t | dma1_trans_complete_flag
__IO uint32_t | adc1_overflow_flag
__IO uint32_t | adc2_overflow_flag
__IO uint32_t | adc3_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma1
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38extern __IO uint32_t dma1_trans_complete_flag;
39extern __IO uint32_t adc1_overflow_flag;
40extern __IO uint32_t adc2_overflow_flag;
41extern __IO uint32_t adc3_overflow_flag;
42
48void NMI_Handler(void)
49{
50}
51
57void HardFault_Handler(void)
58{
59 /* go to infinite loop when hard fault exception occurs */
60 while(1)
61 {
62 }
63}
64
70void MemManage_Handler(void)
71{
72 /* go to infinite loop when memory manage exception occurs */
73 while(1)
74 {
75 }
76}
77
83void BusFault_Handler(void)
84{
85 /* go to infinite loop when bus fault exception occurs */
86 while(1)
87 {
88 }
89}
90
96void UsageFault_Handler(void)
97{
98 /* go to infinite loop when usage fault exception occurs */
99 while(1)
100 {
101 }
102}
103
109void SVC_Handler(void)
110{
111}
112
118void DebugMon_Handler(void)
119{
120}
121
127void PendSV_Handler(void)
128{
129}
130
136void SysTick_Handler(void)
137{
138}
139
145void DMA1_Channel1_IRQHandler(void)
146{
147 if(dma_flag_get(DMA1_FDT1_FLAG) != RESET)
148 {
149 dma_flag_clear(DMA1_FDT1_FLAG);
150 dma1_trans_complete_flag = 1;
151 }
152}
153
159void ADC1_2_3_IRQHandler(void)
160{
161 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
162 {
163 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
164 adc1_overflow_flag++;
165 }
166 if(adc_flag_get(ADC2, ADC_OCCO_FLAG) != RESET)
167 {
168 adc_flag_clear(ADC2, ADC_OCCO_FLAG);
169 adc2_overflow_flag++;
170 }
171 if(adc_flag_get(ADC3, ADC_OCCO_FLAG) != RESET)
172 {
173 adc_flag_clear(ADC3, ADC_OCCO_FLAG);
174 adc3_overflow_flag++;
175 }
176}
177
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
adc3_overflow_flag
__IO uint32_t adc3_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:42
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
dma1_trans_complete_flag
__IO uint32_t dma1_trans_complete_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:39
adc2_overflow_flag
__IO uint32_t adc2_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:41
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
ADC3
#define ADC3
Definition: at32f435_437_adc.h:868
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma1
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | tmr1_config (void)
tmr1 configuration. More...
static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adccom_ordinary_valuetab [3][3][3]
__IO uint32_t | dma1_trans_complete_flag = 0
__IO uint32_t | adc1_overflow_flag = 0
__IO uint32_t | adc2_overflow_flag = 0
__IO uint32_t | adc3_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< ordinary channel conversion overflow interrupt

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

< adc ready to conversion flag

< adc ready to conversion flag

Definition at line 159 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 126 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

< gpio pins number 7

< gpio pins number 0

< gpio pins number 1

< gpio pins number 0

< gpio pins number 2

< gpio pins number 3

Definition at line 54 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c.

◆ tmr1_config()

static void tmr1_config ( void )
static

tmr1 configuration.

Parameters
none
Return values
none

< gpio pins number 14

Definition at line 82 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma1
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adccom_ordinary_valuetab[3][3][3];
39__IO uint32_t dma1_trans_complete_flag = 0;
40__IO uint32_t adc1_overflow_flag = 0;
41__IO uint32_t adc2_overflow_flag = 0;
42__IO uint32_t adc3_overflow_flag = 0;
43
44static void gpio_config(void);
45static void tmr1_config(void);
46static void dma_config(void);
47static void adc_config(void);
48
54static void gpio_config(void)
55{
56 gpio_init_type gpio_initstructure;
57 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
58 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
59 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
60
61 gpio_default_para_init(&gpio_initstructure);
62
63 /* config adc pin as analog input mode */
64 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
65 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7;
66 gpio_init(GPIOA, &gpio_initstructure);
67
68 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
69 gpio_initstructure.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1;
70 gpio_init(GPIOB, &gpio_initstructure);
71
72 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
73 gpio_initstructure.gpio_pins = GPIO_PINS_0 | GPIO_PINS_2 | GPIO_PINS_3;
74 gpio_init(GPIOC, &gpio_initstructure);
75}
76
82static void tmr1_config(void)
83{
84 gpio_init_type gpio_initstructure;
85 tmr_output_config_type tmr_oc_init_structure;
86 crm_clocks_freq_type crm_clocks_freq_struct = {0};
87 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
88 gpio_pin_mux_config(GPIOE, GPIO_PINS_SOURCE14, GPIO_MUX_1);
89
90 gpio_default_para_init(&gpio_initstructure);
91 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
92 gpio_initstructure.gpio_pins = GPIO_PINS_14;
93 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
94 gpio_initstructure.gpio_pull = GPIO_PULL_NONE;
95 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
96 gpio_init(GPIOE, &gpio_initstructure);
97
98 /* get system clock */
99 crm_clocks_freq_get(&crm_clocks_freq_struct);
100
101 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
102
103 /* (systemclock/(systemclock/10000))/1000 = 10Hz(100ms) */
104 tmr_base_init(TMR1, 999, (crm_clocks_freq_struct.sclk_freq/10000 - 1));
105 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
106 tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
107
108 tmr_output_default_para_init(&tmr_oc_init_structure);
109 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
110 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;
111 tmr_oc_init_structure.oc_output_state = TRUE;
112 tmr_oc_init_structure.oc_idle_state = FALSE;
113 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_4, &tmr_oc_init_structure);
114 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_4, 500);
115 tmr_trgout2_enable(TMR1, TRUE);
116 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_4, TRUE);
117 tmr_output_enable(TMR1, TRUE);
118 tmr_primary_mode_select(TMR1, TMR_PRIMARY_SEL_C4ORAW);
119}
120
126static void dma_config(void)
127{
128 dma_init_type dma_init_struct;
129 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
130 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
131
132 dma_reset(DMA1_CHANNEL1);
133 dma_default_para_init(&dma_init_struct);
134 dma_init_struct.buffer_size = 27;
135 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
136 dma_init_struct.memory_base_addr = (uint32_t)adccom_ordinary_valuetab;
137 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
138 dma_init_struct.memory_inc_enable = TRUE;
139 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADCCOM->codt);
140 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
141 dma_init_struct.peripheral_inc_enable = FALSE;
142 dma_init_struct.priority = DMA_PRIORITY_HIGH;
143 dma_init_struct.loop_mode_enable = FALSE;
144 dma_init(DMA1_CHANNEL1, &dma_init_struct);
145
146 dmamux_enable(DMA1, TRUE);
147 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
148
149 /* enable dma transfer complete interrupt */
150 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
151 dma_channel_enable(DMA1_CHANNEL1, TRUE);
152}
153
159static void adc_config(void)
160{
161 adc_common_config_type adc_common_struct;
162 adc_base_config_type adc_base_struct;
163 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
164 crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
165 crm_periph_clock_enable(CRM_ADC3_PERIPH_CLOCK, TRUE);
166 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
167
168 adc_common_default_para_init(&adc_common_struct);
169
170 /* config combine mode */
171 adc_common_struct.combine_mode = ADC_ORDINARY_SMLT_ONLY_TWOSLAVE_MODE;
172
173 /* config division,adcclk is division by hclk */
174 adc_common_struct.div = ADC_HCLK_DIV_4;
175
176 /* config common dma mode,it's useful for ordinary group in combine mode */
177 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_1;
178
179 /* config common dma request repeat */
180 adc_common_struct.common_dma_request_repeat_state = FALSE;
181
182 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
183 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
184
185 /* config inner temperature sensor and vintrv */
186 adc_common_struct.tempervintrv_state = FALSE;
187
188 /* config voltage battery */
189 adc_common_struct.vbat_state = FALSE;
190 adc_common_config(&adc_common_struct);
191
192 adc_base_default_para_init(&adc_base_struct);
193
194 adc_base_struct.sequence_mode = TRUE;
195 adc_base_struct.repeat_mode = FALSE;
196 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
197 adc_base_struct.ordinary_channel_length = 3;
198 adc_base_config(ADC1, &adc_base_struct);
199 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
200
201 /* config ordinary channel */
202 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_47_5);
203 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_47_5);
204 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_47_5);
205
206 /* config ordinary trigger source and trigger edge */
207 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1TRGOUT2, ADC_ORDINARY_TRIG_EDGE_RISING);
208
209 /* config dma mode,it's not useful when common dma mode is use */
210 adc_dma_mode_enable(ADC1, FALSE);
211
212 /* config dma request repeat,it's not useful when common dma mode is use */
213 adc_dma_request_repeat_enable(ADC1, FALSE);
214
215 /* enable adc overflow interrupt */
216 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
217
218 adc_base_config(ADC2, &adc_base_struct);
219 adc_resolution_set(ADC2, ADC_RESOLUTION_12B);
220 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_7, 1, ADC_SAMPLETIME_47_5);
221 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_8, 2, ADC_SAMPLETIME_47_5);
222 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_9, 3, ADC_SAMPLETIME_47_5);
223 adc_ordinary_conversion_trigger_set(ADC2, ADC_ORDINARY_TRIG_TMR1TRGOUT2, ADC_ORDINARY_TRIG_EDGE_NONE);
224 adc_dma_mode_enable(ADC2, FALSE);
225 adc_dma_request_repeat_enable(ADC2, FALSE);
226 adc_interrupt_enable(ADC2, ADC_OCCO_INT, TRUE);
227
228 adc_base_config(ADC3, &adc_base_struct);
229 adc_resolution_set(ADC3, ADC_RESOLUTION_12B);
230 adc_ordinary_channel_set(ADC3, ADC_CHANNEL_10, 1, ADC_SAMPLETIME_47_5);
231 adc_ordinary_channel_set(ADC3, ADC_CHANNEL_12, 2, ADC_SAMPLETIME_47_5);
232 adc_ordinary_channel_set(ADC3, ADC_CHANNEL_13, 3, ADC_SAMPLETIME_47_5);
233 adc_ordinary_conversion_trigger_set(ADC3, ADC_ORDINARY_TRIG_TMR1TRGOUT2, ADC_ORDINARY_TRIG_EDGE_NONE);
234 adc_dma_mode_enable(ADC3, FALSE);
235 adc_dma_request_repeat_enable(ADC3, FALSE);
236 adc_interrupt_enable(ADC3, ADC_OCCO_INT, TRUE);
237
238 /* adc enable */
239 adc_enable(ADC1, TRUE);
240 adc_enable(ADC2, TRUE);
241 adc_enable(ADC3, TRUE);
242 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
243 while(adc_flag_get(ADC2, ADC_RDY_FLAG) == RESET);
244 while(adc_flag_get(ADC3, ADC_RDY_FLAG) == RESET);
245
246 /* adc calibration */
247 adc_calibration_init(ADC1);
248 while(adc_calibration_init_status_get(ADC1));
249 adc_calibration_start(ADC1);
250 while(adc_calibration_status_get(ADC1));
251 adc_calibration_init(ADC2);
252 while(adc_calibration_init_status_get(ADC2));
253 adc_calibration_start(ADC2);
254 while(adc_calibration_status_get(ADC2));
255 adc_calibration_init(ADC3);
256 while(adc_calibration_init_status_get(ADC3));
257 adc_calibration_start(ADC3);
258 while(adc_calibration_status_get(ADC3));
259}
260
266int main(void)
267{
268 __IO uint32_t index1 = 0;
269 __IO uint32_t index2 = 0;
270 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
271
272 /* config the system clock */
273 system_clock_config();
274
275 /* init at start board */
276 at32_board_init();
277 at32_led_off(LED2);
278 at32_led_off(LED3);
279 at32_led_off(LED4);
280 uart_print_init(115200);
281 gpio_config();
282 tmr1_config();
283 dma_config();
284 adc_config();
285 printf("combine_mode_ordinary_smlt_twoslave_dma1 \r\n");
286 tmr_counter_enable(TMR1, TRUE);
287 while(dma1_trans_complete_flag == 0);
288 tmr_counter_enable(TMR1, FALSE);
289 if((adc1_overflow_flag != 0) || (adc2_overflow_flag != 0) || (adc3_overflow_flag != 0))
290 {
291 /* printf flag when error occur */
292 at32_led_on(LED3);
293 at32_led_on(LED4);
294 printf("error occur\r\n");
295 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
296 printf("adc2_overflow_flag = %d\r\n",adc2_overflow_flag);
297 printf("adc3_overflow_flag = %d\r\n",adc3_overflow_flag);
298 }
299 else
300 {
301 /* printf data when conversion end without error */
302 printf("conversion end without error\r\n");
303 for(index1 = 0; index1 < 3; index1++)
304 {
305 for(index2 = 0; index2 < 3; index2++)
306 {
307 printf("adccom_ordinary_valuetab[%d][%d][0] = 0x%x\r\n",index1, index2, adccom_ordinary_valuetab[index1][index2][0]);
308 printf("adccom_ordinary_valuetab[%d][%d][1] = 0x%x\r\n",index1, index2, adccom_ordinary_valuetab[index1][index2][1]);
309 printf("adccom_ordinary_valuetab[%d][%d][2] = 0x%x\r\n",index1, index2, adccom_ordinary_valuetab[index1][index2][2]);
310 }
311 printf("\r\n");
312 }
313 }
314 at32_led_on(LED2);
315 while(1)
316 {
317 }
318}
319
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adccom_ordinary_valuetab
__IO uint16_t adccom_ordinary_valuetab[3][3][3]
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c:38
adc3_overflow_flag
__IO uint32_t adc3_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c:42
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c:40
dma1_trans_complete_flag
__IO uint32_t dma1_trans_complete_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c:39
adc2_overflow_flag
__IO uint32_t adc2_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c:41
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_9
@ ADC_CHANNEL_9
Definition: at32f435_437_adc.h:196
ADC_CHANNEL_8
@ ADC_CHANNEL_8
Definition: at32f435_437_adc.h:195
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_12
@ ADC_CHANNEL_12
Definition: at32f435_437_adc.h:199
ADC_CHANNEL_10
@ ADC_CHANNEL_10
Definition: at32f435_437_adc.h:197
ADC_CHANNEL_13
@ ADC_CHANNEL_13
Definition: at32f435_437_adc.h:200
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_7
@ ADC_CHANNEL_7
Definition: at32f435_437_adc.h:194
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_47_5
@ ADC_SAMPLETIME_47_5
Definition: at32f435_437_adc.h:217
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_1
@ ADC_COMMON_DMAMODE_1
Definition: at32f435_437_adc.h:132
ADC_ORDINARY_SMLT_ONLY_TWOSLAVE_MODE
@ ADC_ORDINARY_SMLT_ONLY_TWOSLAVE_MODE
Definition: at32f435_437_adc.h:121
ADC_ORDINARY_TRIG_TMR1TRGOUT2
@ ADC_ORDINARY_TRIG_TMR1TRGOUT2
Definition: at32f435_437_adc.h:250
ADC_ORDINARY_TRIG_EDGE_RISING
@ ADC_ORDINARY_TRIG_EDGE_RISING
Definition: at32f435_437_adc.h:266
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
ADC3
#define ADC3
Definition: at32f435_437_adc.h:868
ADCCOM
#define ADCCOM
Definition: at32f435_437_adc.h:869
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC3_PERIPH_CLOCK
@ CRM_ADC3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:160
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
CRM_GPIOE_PERIPH_CLOCK
@ CRM_GPIOE_PERIPH_CLOCK
Definition: at32f435_437_crm.h:109
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
CRM_ADC2_PERIPH_CLOCK
@ CRM_ADC2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:159
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
GPIOE
#define GPIOE
Definition: at32f435_437_gpio.h:525
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_output_enable
void tmr_output_enable(tmr_type *tmr_x, confirm_state new_state)
tmr output enable(oen),this function is important for advtm output enable
Definition: at32f435_437_tmr.c:1499
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_trgout2_enable
void tmr_trgout2_enable(tmr_type *tmr_x, confirm_state new_state)
select tmr trgout2
Definition: at32f435_437_tmr.c:1300
tmr_primary_mode_select
void tmr_primary_mode_select(tmr_type *tmr_x, tmr_primary_select_type primary_mode)
select tmr primary mode
Definition: at32f435_437_tmr.c:1222
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_enable
void tmr_channel_enable(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, confirm_state new_state)
tmr channel enable
Definition: at32f435_437_tmr.c:940
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_LOW
@ TMR_OUTPUT_ACTIVE_LOW
Definition: at32f435_437_tmr.h:199
TMR_PRIMARY_SEL_C4ORAW
@ TMR_PRIMARY_SEL_C4ORAW
Definition: at32f435_437_tmr.h:126
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c:126
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c:159
tmr1_config
static void tmr1_config(void)
tmr1 configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c:82
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c:54
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::sclk_freq
uint32_t sclk_freq
Definition: at32f435_437_crm.h:789
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma5
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma5
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma5
  • inc
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma5
  • src
Functions
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma5
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma5
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1_channel1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint32_t | dma1_trans_complete_flag
__IO uint32_t | adc1_overflow_flag
__IO uint32_t | adc2_overflow_flag
__IO uint32_t | adc3_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma5
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38extern __IO uint32_t dma1_trans_complete_flag;
39extern __IO uint32_t adc1_overflow_flag;
40extern __IO uint32_t adc2_overflow_flag;
41extern __IO uint32_t adc3_overflow_flag;
42
48void NMI_Handler(void)
49{
50}
51
57void HardFault_Handler(void)
58{
59 /* go to infinite loop when hard fault exception occurs */
60 while(1)
61 {
62 }
63}
64
70void MemManage_Handler(void)
71{
72 /* go to infinite loop when memory manage exception occurs */
73 while(1)
74 {
75 }
76}
77
83void BusFault_Handler(void)
84{
85 /* go to infinite loop when bus fault exception occurs */
86 while(1)
87 {
88 }
89}
90
96void UsageFault_Handler(void)
97{
98 /* go to infinite loop when usage fault exception occurs */
99 while(1)
100 {
101 }
102}
103
109void SVC_Handler(void)
110{
111}
112
118void DebugMon_Handler(void)
119{
120}
121
127void PendSV_Handler(void)
128{
129}
130
136void SysTick_Handler(void)
137{
138}
139
145void DMA1_Channel1_IRQHandler(void)
146{
147 if(dma_flag_get(DMA1_FDT1_FLAG) != RESET)
148 {
149 dma_flag_clear(DMA1_FDT1_FLAG);
150 dma1_trans_complete_flag = 1;
151 }
152}
153
159void ADC1_2_3_IRQHandler(void)
160{
161 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
162 {
163 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
164 adc1_overflow_flag++;
165 }
166 if(adc_flag_get(ADC2, ADC_OCCO_FLAG) != RESET)
167 {
168 adc_flag_clear(ADC2, ADC_OCCO_FLAG);
169 adc2_overflow_flag++;
170 }
171 if(adc_flag_get(ADC3, ADC_OCCO_FLAG) != RESET)
172 {
173 adc_flag_clear(ADC3, ADC_OCCO_FLAG);
174 adc3_overflow_flag++;
175 }
176}
177
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
adc3_overflow_flag
__IO uint32_t adc3_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:42
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
dma1_trans_complete_flag
__IO uint32_t dma1_trans_complete_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:39
adc2_overflow_flag
__IO uint32_t adc2_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:41
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
ADC3
#define ADC3
Definition: at32f435_437_adc.h:868
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma5
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | tmr1_config (void)
tmr1 configuration. More...
static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint32_t | adccom_ordinary_valuetab [3][3][2]
__IO uint32_t | dma1_trans_complete_flag = 0
__IO uint32_t | adc1_overflow_flag = 0
__IO uint32_t | adc2_overflow_flag = 0
__IO uint32_t | adc3_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< ordinary channel conversion overflow interrupt

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

< adc ready to conversion flag

< adc ready to conversion flag

Definition at line 157 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 124 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

< gpio pins number 7

< gpio pins number 0

< gpio pins number 1

< gpio pins number 0

< gpio pins number 2

< gpio pins number 3

Definition at line 54 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c.

◆ tmr1_config()

static void tmr1_config ( void )
static

tmr1 configuration.

Parameters
none
Return values
none

< gpio pins number 8

Definition at line 82 of file project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • combine_mode_ordinary_smlt_twoslave_dma5
  • src
project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint32_t adccom_ordinary_valuetab[3][3][2];
39__IO uint32_t dma1_trans_complete_flag = 0;
40__IO uint32_t adc1_overflow_flag = 0;
41__IO uint32_t adc2_overflow_flag = 0;
42__IO uint32_t adc3_overflow_flag = 0;
43
44static void gpio_config(void);
45static void tmr1_config(void);
46static void dma_config(void);
47static void adc_config(void);
48
54static void gpio_config(void)
55{
56 gpio_init_type gpio_initstructure;
57 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
58 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
59 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
60
61 gpio_default_para_init(&gpio_initstructure);
62
63 /* config adc pin as analog input mode */
64 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
65 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7;
66 gpio_init(GPIOA, &gpio_initstructure);
67
68 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
69 gpio_initstructure.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1;
70 gpio_init(GPIOB, &gpio_initstructure);
71
72 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
73 gpio_initstructure.gpio_pins = GPIO_PINS_0 | GPIO_PINS_2 | GPIO_PINS_3;
74 gpio_init(GPIOC, &gpio_initstructure);
75}
76
82static void tmr1_config(void)
83{
84 gpio_init_type gpio_initstructure;
85 tmr_output_config_type tmr_oc_init_structure;
86 crm_clocks_freq_type crm_clocks_freq_struct = {0};
87 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
88
89 gpio_default_para_init(&gpio_initstructure);
90 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
91 gpio_initstructure.gpio_pins = GPIO_PINS_8;
92 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
93 gpio_initstructure.gpio_pull = GPIO_PULL_NONE;
94 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
95 gpio_init(GPIOA, &gpio_initstructure);
96 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_1);
97
98 /* get system clock */
99 crm_clocks_freq_get(&crm_clocks_freq_struct);
100
101 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
102
103 /* (systemclock/(systemclock/10000))/1000 = 10Hz(100ms) */
104 tmr_base_init(TMR1, 999, (crm_clocks_freq_struct.sclk_freq/10000 - 1));
105 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
106 tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
107
108 tmr_output_default_para_init(&tmr_oc_init_structure);
109 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
110 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;
111 tmr_oc_init_structure.oc_output_state = TRUE;
112 tmr_oc_init_structure.oc_idle_state = FALSE;
113 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
114 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 500);
115 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1, TRUE);
116 tmr_output_enable(TMR1, TRUE);
117}
118
124static void dma_config(void)
125{
126 dma_init_type dma_init_struct;
127 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
128 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
129
130 dma_reset(DMA1_CHANNEL1);
131 dma_default_para_init(&dma_init_struct);
132 dma_init_struct.buffer_size = 18;
133 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
134 dma_init_struct.memory_base_addr = (uint32_t)adccom_ordinary_valuetab;
135 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_WORD;
136 dma_init_struct.memory_inc_enable = TRUE;
137 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADCCOM->codt);
138 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_WORD;
139 dma_init_struct.peripheral_inc_enable = FALSE;
140 dma_init_struct.priority = DMA_PRIORITY_HIGH;
141 dma_init_struct.loop_mode_enable = FALSE;
142 dma_init(DMA1_CHANNEL1, &dma_init_struct);
143
144 dmamux_enable(DMA1, TRUE);
145 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
146
147 /* enable dma transfer complete interrupt */
148 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
149 dma_channel_enable(DMA1_CHANNEL1, TRUE);
150}
151
157static void adc_config(void)
158{
159 adc_common_config_type adc_common_struct;
160 adc_base_config_type adc_base_struct;
161 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
162 crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
163 crm_periph_clock_enable(CRM_ADC3_PERIPH_CLOCK, TRUE);
164 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
165
166 adc_common_default_para_init(&adc_common_struct);
167
168 /* config combine mode */
169 adc_common_struct.combine_mode = ADC_ORDINARY_SMLT_ONLY_TWOSLAVE_MODE;
170
171 /* config division,adcclk is division by hclk */
172 adc_common_struct.div = ADC_HCLK_DIV_4;
173
174 /* config common dma mode,it's useful for ordinary group in combine mode */
175 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_5;
176
177 /* config common dma request repeat */
178 adc_common_struct.common_dma_request_repeat_state = FALSE;
179
180 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
181 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
182
183 /* config inner temperature sensor and vintrv */
184 adc_common_struct.tempervintrv_state = FALSE;
185
186 /* config voltage battery */
187 adc_common_struct.vbat_state = FALSE;
188 adc_common_config(&adc_common_struct);
189
190 adc_base_default_para_init(&adc_base_struct);
191
192 adc_base_struct.sequence_mode = TRUE;
193 adc_base_struct.repeat_mode = FALSE;
194 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
195 adc_base_struct.ordinary_channel_length = 3;
196 adc_base_config(ADC1, &adc_base_struct);
197 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
198
199 /* config ordinary channel */
200 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_47_5);
201 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_47_5);
202 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_47_5);
203
204 /* config ordinary trigger source and trigger edge */
205 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_RISING);
206
207 /* config dma mode,it's not useful when common dma mode is use */
208 adc_dma_mode_enable(ADC1, FALSE);
209
210 /* config dma request repeat,it's not useful when common dma mode is use */
211 adc_dma_request_repeat_enable(ADC1, FALSE);
212
213 /* enable adc overflow interrupt */
214 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
215
216 adc_base_config(ADC2, &adc_base_struct);
217 adc_resolution_set(ADC2, ADC_RESOLUTION_12B);
218 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_7, 1, ADC_SAMPLETIME_47_5);
219 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_8, 2, ADC_SAMPLETIME_47_5);
220 adc_ordinary_channel_set(ADC2, ADC_CHANNEL_9, 3, ADC_SAMPLETIME_47_5);
221 adc_ordinary_conversion_trigger_set(ADC2, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
222 adc_dma_mode_enable(ADC2, FALSE);
223 adc_dma_request_repeat_enable(ADC2, FALSE);
224 adc_interrupt_enable(ADC2, ADC_OCCO_INT, TRUE);
225
226 adc_base_config(ADC3, &adc_base_struct);
227 adc_resolution_set(ADC3, ADC_RESOLUTION_12B);
228 adc_ordinary_channel_set(ADC3, ADC_CHANNEL_10, 1, ADC_SAMPLETIME_47_5);
229 adc_ordinary_channel_set(ADC3, ADC_CHANNEL_12, 2, ADC_SAMPLETIME_47_5);
230 adc_ordinary_channel_set(ADC3, ADC_CHANNEL_13, 3, ADC_SAMPLETIME_47_5);
231 adc_ordinary_conversion_trigger_set(ADC3, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
232 adc_dma_mode_enable(ADC3, FALSE);
233 adc_dma_request_repeat_enable(ADC3, FALSE);
234 adc_interrupt_enable(ADC3, ADC_OCCO_INT, TRUE);
235
236 /* adc enable */
237 adc_enable(ADC1, TRUE);
238 adc_enable(ADC2, TRUE);
239 adc_enable(ADC3, TRUE);
240 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
241 while(adc_flag_get(ADC2, ADC_RDY_FLAG) == RESET);
242 while(adc_flag_get(ADC3, ADC_RDY_FLAG) == RESET);
243
244 /* adc calibration */
245 adc_calibration_init(ADC1);
246 while(adc_calibration_init_status_get(ADC1));
247 adc_calibration_start(ADC1);
248 while(adc_calibration_status_get(ADC1));
249 adc_calibration_init(ADC2);
250 while(adc_calibration_init_status_get(ADC2));
251 adc_calibration_start(ADC2);
252 while(adc_calibration_status_get(ADC2));
253 adc_calibration_init(ADC3);
254 while(adc_calibration_init_status_get(ADC3));
255 adc_calibration_start(ADC3);
256 while(adc_calibration_status_get(ADC3));
257}
258
264int main(void)
265{
266 __IO uint32_t index1 = 0;
267 __IO uint32_t index2 = 0;
268 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
269
270 /* config the system clock */
271 system_clock_config();
272
273 /* init at start board */
274 at32_board_init();
275 at32_led_off(LED2);
276 at32_led_off(LED3);
277 at32_led_off(LED4);
278 uart_print_init(115200);
279 gpio_config();
280 tmr1_config();
281 dma_config();
282 adc_config();
283 printf("combine_mode_ordinary_smlt_twoslave_dma5 \r\n");
284 tmr_counter_enable(TMR1, TRUE);
285 while(dma1_trans_complete_flag == 0);
286 tmr_counter_enable(TMR1, FALSE);
287 if((adc1_overflow_flag != 0) || (adc2_overflow_flag != 0) || (adc3_overflow_flag != 0))
288 {
289 /* printf flag when error occur */
290 at32_led_on(LED3);
291 at32_led_on(LED4);
292 printf("error occur\r\n");
293 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
294 printf("adc2_overflow_flag = %d\r\n",adc2_overflow_flag);
295 printf("adc3_overflow_flag = %d\r\n",adc3_overflow_flag);
296 }
297 else
298 {
299 /* printf data when conversion end without error */
300 printf("conversion end without error\r\n");
301 for(index1 = 0; index1 < 3; index1++)
302 {
303 for(index2 = 0; index2 < 3; index2++)
304 {
305 printf("adccom_ordinary_valuetab[%d][%d][0] = 0x%x\r\n",index1, index2, adccom_ordinary_valuetab[index1][index2][0]);
306 printf("adccom_ordinary_valuetab[%d][%d][1] = 0x%x\r\n",index1, index2, adccom_ordinary_valuetab[index1][index2][1]);
307 }
308 printf("\r\n");
309 }
310 }
311 at32_led_on(LED2);
312 while(1)
313 {
314 }
315}
316
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adc3_overflow_flag
__IO uint32_t adc3_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c:42
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c:40
dma1_trans_complete_flag
__IO uint32_t dma1_trans_complete_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c:39
adc2_overflow_flag
__IO uint32_t adc2_overflow_flag
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c:41
adccom_ordinary_valuetab
__IO uint32_t adccom_ordinary_valuetab[3][3][2]
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_9
@ ADC_CHANNEL_9
Definition: at32f435_437_adc.h:196
ADC_CHANNEL_8
@ ADC_CHANNEL_8
Definition: at32f435_437_adc.h:195
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_12
@ ADC_CHANNEL_12
Definition: at32f435_437_adc.h:199
ADC_CHANNEL_10
@ ADC_CHANNEL_10
Definition: at32f435_437_adc.h:197
ADC_CHANNEL_13
@ ADC_CHANNEL_13
Definition: at32f435_437_adc.h:200
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_7
@ ADC_CHANNEL_7
Definition: at32f435_437_adc.h:194
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_47_5
@ ADC_SAMPLETIME_47_5
Definition: at32f435_437_adc.h:217
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_5
@ ADC_COMMON_DMAMODE_5
Definition: at32f435_437_adc.h:136
ADC_ORDINARY_SMLT_ONLY_TWOSLAVE_MODE
@ ADC_ORDINARY_SMLT_ONLY_TWOSLAVE_MODE
Definition: at32f435_437_adc.h:121
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_RISING
@ ADC_ORDINARY_TRIG_EDGE_RISING
Definition: at32f435_437_adc.h:266
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
ADC3
#define ADC3
Definition: at32f435_437_adc.h:868
ADCCOM
#define ADCCOM
Definition: at32f435_437_adc.h:869
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC3_PERIPH_CLOCK
@ CRM_ADC3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:160
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
CRM_ADC2_PERIPH_CLOCK
@ CRM_ADC2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:159
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_WORD
@ DMA_PERIPHERAL_DATA_WIDTH_WORD
Definition: at32f435_437_dma.h:164
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_WORD
@ DMA_MEMORY_DATA_WIDTH_WORD
Definition: at32f435_437_dma.h:174
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_output_enable
void tmr_output_enable(tmr_type *tmr_x, confirm_state new_state)
tmr output enable(oen),this function is important for advtm output enable
Definition: at32f435_437_tmr.c:1499
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_enable
void tmr_channel_enable(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, confirm_state new_state)
tmr channel enable
Definition: at32f435_437_tmr.c:940
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_LOW
@ TMR_OUTPUT_ACTIVE_LOW
Definition: at32f435_437_tmr.h:199
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c:124
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c:157
tmr1_config
static void tmr1_config(void)
tmr1 configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c:82
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c:54
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::sclk_freq
uint32_t sclk_freq
Definition: at32f435_437_crm.h:789
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • combine_mode_preempt_interltrig_twoslave
  • inc
project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • combine_mode_preempt_interltrig_twoslave
  • inc
project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • combine_mode_preempt_interltrig_twoslave
  • inc
project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • combine_mode_preempt_interltrig_twoslave
  • src
Functions
project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • combine_mode_preempt_interltrig_twoslave
  • src
project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • combine_mode_preempt_interltrig_twoslave
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint16_t | adc1_preempt_valuetab [2][3]
__IO uint16_t | adc2_preempt_valuetab [2][3]
__IO uint16_t | adc3_preempt_valuetab [2][3]
__IO uint16_t | adc1_preempt_conversion_count
__IO uint16_t | adc2_preempt_conversion_count
__IO uint16_t | adc3_preempt_conversion_count

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • combine_mode_preempt_interltrig_twoslave
  • src
project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38extern __IO uint16_t adc1_preempt_valuetab[2][3];
39extern __IO uint16_t adc2_preempt_valuetab[2][3];
40extern __IO uint16_t adc3_preempt_valuetab[2][3];
41extern __IO uint16_t adc1_preempt_conversion_count;
42extern __IO uint16_t adc2_preempt_conversion_count;
43extern __IO uint16_t adc3_preempt_conversion_count;
44
45
51void NMI_Handler(void)
52{
53}
54
60void HardFault_Handler(void)
61{
62 /* go to infinite loop when hard fault exception occurs */
63 while(1)
64 {
65 }
66}
67
73void MemManage_Handler(void)
74{
75 /* go to infinite loop when memory manage exception occurs */
76 while(1)
77 {
78 }
79}
80
86void BusFault_Handler(void)
87{
88 /* go to infinite loop when bus fault exception occurs */
89 while(1)
90 {
91 }
92}
93
99void UsageFault_Handler(void)
100{
101 /* go to infinite loop when usage fault exception occurs */
102 while(1)
103 {
104 }
105}
106
112void SVC_Handler(void)
113{
114}
115
121void DebugMon_Handler(void)
122{
123}
124
130void PendSV_Handler(void)
131{
132}
133
139void SysTick_Handler(void)
140{
141}
142
148void ADC1_2_3_IRQHandler(void)
149{
150 if(adc_flag_get(ADC1, ADC_PCCE_FLAG) != RESET)
151 {
152 adc_flag_clear(ADC1, ADC_PCCE_FLAG);
153 if(adc1_preempt_conversion_count < 2)
154 {
155 adc1_preempt_valuetab[adc1_preempt_conversion_count][0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1);
156 adc1_preempt_valuetab[adc1_preempt_conversion_count][1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2);
157 adc1_preempt_valuetab[adc1_preempt_conversion_count][2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3);
158 adc1_preempt_conversion_count++;
159 }
160 }
161 if(adc_flag_get(ADC2, ADC_PCCE_FLAG) != RESET)
162 {
163 adc_flag_clear(ADC2, ADC_PCCE_FLAG);
164 if(adc2_preempt_conversion_count < 2)
165 {
166 adc2_preempt_valuetab[adc2_preempt_conversion_count][0] = adc_preempt_conversion_data_get(ADC2, ADC_PREEMPT_CHANNEL_1);
167 adc2_preempt_valuetab[adc2_preempt_conversion_count][1] = adc_preempt_conversion_data_get(ADC2, ADC_PREEMPT_CHANNEL_2);
168 adc2_preempt_valuetab[adc2_preempt_conversion_count][2] = adc_preempt_conversion_data_get(ADC2, ADC_PREEMPT_CHANNEL_3);
169 adc2_preempt_conversion_count++;
170 }
171 }
172 if(adc_flag_get(ADC3, ADC_PCCE_FLAG) != RESET)
173 {
174 adc_flag_clear(ADC3, ADC_PCCE_FLAG);
175 if(adc3_preempt_conversion_count < 2)
176 {
177 adc3_preempt_valuetab[adc3_preempt_conversion_count][0] = adc_preempt_conversion_data_get(ADC3, ADC_PREEMPT_CHANNEL_1);
178 adc3_preempt_valuetab[adc3_preempt_conversion_count][1] = adc_preempt_conversion_data_get(ADC3, ADC_PREEMPT_CHANNEL_2);
179 adc3_preempt_valuetab[adc3_preempt_conversion_count][2] = adc_preempt_conversion_data_get(ADC3, ADC_PREEMPT_CHANNEL_3);
180 adc3_preempt_conversion_count++;
181 }
182 }
183}
184
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
adc1_preempt_conversion_count
__IO uint16_t adc1_preempt_conversion_count
Definition: project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:41
adc3_preempt_conversion_count
__IO uint16_t adc3_preempt_conversion_count
Definition: project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:43
adc3_preempt_valuetab
__IO uint16_t adc3_preempt_valuetab[2][3]
Definition: project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:40
adc2_preempt_valuetab
__IO uint16_t adc2_preempt_valuetab[2][3]
Definition: project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:39
adc2_preempt_conversion_count
__IO uint16_t adc2_preempt_conversion_count
Definition: project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:42
adc1_preempt_valuetab
__IO uint16_t adc1_preempt_valuetab[2][3]
Definition: project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:38
adc_preempt_conversion_data_get
uint16_t adc_preempt_conversion_data_get(adc_type *adc_x, adc_preempt_channel_type adc_preempt_channel)
return the conversion data for selection preempt channel of the specified adc peripheral.
Definition: at32f435_437_adc.c:1036
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_PREEMPT_CHANNEL_3
@ ADC_PREEMPT_CHANNEL_3
Definition: at32f435_437_adc.h:326
ADC_PREEMPT_CHANNEL_2
@ ADC_PREEMPT_CHANNEL_2
Definition: at32f435_437_adc.h:325
ADC_PREEMPT_CHANNEL_1
@ ADC_PREEMPT_CHANNEL_1
Definition: at32f435_437_adc.h:324
ADC_PCCE_FLAG
#define ADC_PCCE_FLAG
Definition: at32f435_437_adc.h:69
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
ADC3
#define ADC3
Definition: at32f435_437_adc.h:868
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • combine_mode_preempt_interltrig_twoslave
  • src
Functions | Variables
project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_preempt_valuetab [2][3] = {0}
__IO uint16_t | adc2_preempt_valuetab [2][3] = {0}
__IO uint16_t | adc3_preempt_valuetab [2][3] = {0}
__IO uint16_t | adc1_preempt_conversion_count = 0
__IO uint16_t | adc2_preempt_conversion_count = 0
__IO uint16_t | adc3_preempt_conversion_count = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< preempt channels conversion end interrupt

< preempt channels conversion end interrupt

< preempt channels conversion end interrupt

< adc ready to conversion flag

< adc ready to conversion flag

< adc ready to conversion flag

Definition at line 81 of file project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

< gpio pins number 7

< gpio pins number 0

< gpio pins number 1

< gpio pins number 0

< gpio pins number 2

< gpio pins number 3

Definition at line 53 of file project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • combine_mode_preempt_interltrig_twoslave
  • src
project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adc1_preempt_valuetab[2][3] = {0};
39__IO uint16_t adc2_preempt_valuetab[2][3] = {0};
40__IO uint16_t adc3_preempt_valuetab[2][3] = {0};
41__IO uint16_t adc1_preempt_conversion_count = 0;
42__IO uint16_t adc2_preempt_conversion_count = 0;
43__IO uint16_t adc3_preempt_conversion_count = 0;
44
45static void gpio_config(void);
46static void adc_config(void);
47
53static void gpio_config(void)
54{
55 gpio_init_type gpio_initstructure;
56 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
57 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
58 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
59
60 gpio_default_para_init(&gpio_initstructure);
61
62 /* config adc pin as analog input mode */
63 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
64 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7;
65 gpio_init(GPIOA, &gpio_initstructure);
66
67 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
68 gpio_initstructure.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1;
69 gpio_init(GPIOB, &gpio_initstructure);
70
71 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
72 gpio_initstructure.gpio_pins = GPIO_PINS_0 | GPIO_PINS_2 | GPIO_PINS_3;
73 gpio_init(GPIOC, &gpio_initstructure);
74}
75
81static void adc_config(void)
82{
83 adc_common_config_type adc_common_struct;
84 adc_base_config_type adc_base_struct;
85 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
87 crm_periph_clock_enable(CRM_ADC3_PERIPH_CLOCK, TRUE);
88 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
89
90 adc_common_default_para_init(&adc_common_struct);
91
92 /* config combine mode */
93 adc_common_struct.combine_mode = ADC_PREEMPT_INTERLTRIG_ONLY_TWOSLAVE_MODE;
94
95 /* config division,adcclk is division by hclk */
96 adc_common_struct.div = ADC_HCLK_DIV_4;
97
98 /* config common dma mode,it's not useful in independent mode */
99 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
100
101 /* config common dma request repeat */
102 adc_common_struct.common_dma_request_repeat_state = FALSE;
103
104 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
105 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
106
107 /* config inner temperature sensor and vintrv */
108 adc_common_struct.tempervintrv_state = FALSE;
109
110 /* config voltage battery */
111 adc_common_struct.vbat_state = FALSE;
112 adc_common_config(&adc_common_struct);
113
114 adc_base_default_para_init(&adc_base_struct);
115
116 adc_base_struct.sequence_mode = TRUE;
117 adc_base_struct.repeat_mode = FALSE;
118 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
119 adc_base_struct.ordinary_channel_length = 3;
120 adc_base_config(ADC1, &adc_base_struct);
121 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
122
123 /* config ordinary trigger source and trigger edge */
124 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
125
126 /* config dma mode,it's not useful when common dma mode is use */
127 adc_dma_mode_enable(ADC1, FALSE);
128
129 /* config dma request repeat,it's not useful when common dma mode is use */
130 adc_dma_request_repeat_enable(ADC1, FALSE);
131
132 /* config preempt channel */
133 adc_preempt_channel_length_set(ADC1, 3);
134 adc_preempt_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_47_5);
135 adc_preempt_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_47_5);
136 adc_preempt_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_47_5);
137
138 /* config preempt trigger source and trigger edge */
139 adc_preempt_conversion_trigger_set(ADC1, ADC_PREEMPT_TRIG_TMR1CH4, ADC_PREEMPT_TRIG_EDGE_NONE);
140
141 /* disable preempt group automatic conversion after ordinary group */
142 adc_preempt_auto_mode_enable(ADC1, FALSE);
143
144 /* enable adc preempt channels conversion end interrupt */
145 adc_interrupt_enable(ADC1, ADC_PCCE_INT, TRUE);
146
147 adc_base_config(ADC2, &adc_base_struct);
148 adc_resolution_set(ADC2, ADC_RESOLUTION_12B);
149 adc_ordinary_conversion_trigger_set(ADC2, ADC_ORDINARY_TRIG_TMR1TRGOUT2, ADC_ORDINARY_TRIG_EDGE_NONE);
150 adc_dma_mode_enable(ADC2, FALSE);
151 adc_dma_request_repeat_enable(ADC2, FALSE);
152 adc_preempt_channel_length_set(ADC2, 3);
153 adc_preempt_channel_set(ADC2, ADC_CHANNEL_7, 1, ADC_SAMPLETIME_47_5);
154 adc_preempt_channel_set(ADC2, ADC_CHANNEL_8, 2, ADC_SAMPLETIME_47_5);
155 adc_preempt_channel_set(ADC2, ADC_CHANNEL_9, 3, ADC_SAMPLETIME_47_5);
156 adc_preempt_conversion_trigger_set(ADC2, ADC_PREEMPT_TRIG_TMR1CH4, ADC_PREEMPT_TRIG_EDGE_NONE);
157 adc_preempt_auto_mode_enable(ADC2, FALSE);
158 adc_interrupt_enable(ADC2, ADC_PCCE_INT, TRUE);
159
160 adc_base_config(ADC3, &adc_base_struct);
161 adc_resolution_set(ADC3, ADC_RESOLUTION_12B);
162 adc_ordinary_conversion_trigger_set(ADC3, ADC_ORDINARY_TRIG_TMR1TRGOUT2, ADC_ORDINARY_TRIG_EDGE_NONE);
163 adc_dma_mode_enable(ADC3, FALSE);
164 adc_dma_request_repeat_enable(ADC3, FALSE);
165 adc_preempt_channel_length_set(ADC3, 3);
166 adc_preempt_channel_set(ADC3, ADC_CHANNEL_10, 1, ADC_SAMPLETIME_47_5);
167 adc_preempt_channel_set(ADC3, ADC_CHANNEL_12, 2, ADC_SAMPLETIME_47_5);
168 adc_preempt_channel_set(ADC3, ADC_CHANNEL_13, 3, ADC_SAMPLETIME_47_5);
169 adc_preempt_conversion_trigger_set(ADC3, ADC_PREEMPT_TRIG_TMR1CH4, ADC_PREEMPT_TRIG_EDGE_NONE);
170 adc_preempt_auto_mode_enable(ADC3, FALSE);
171 adc_interrupt_enable(ADC3, ADC_PCCE_INT, TRUE);
172
173 /* adc enable */
174 adc_enable(ADC1, TRUE);
175 adc_enable(ADC2, TRUE);
176 adc_enable(ADC3, TRUE);
177 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
178 while(adc_flag_get(ADC2, ADC_RDY_FLAG) == RESET);
179 while(adc_flag_get(ADC3, ADC_RDY_FLAG) == RESET);
180
181 /* adc calibration */
182 adc_calibration_init(ADC1);
183 while(adc_calibration_init_status_get(ADC1));
184 adc_calibration_start(ADC1);
185 while(adc_calibration_status_get(ADC1));
186 adc_calibration_init(ADC2);
187 while(adc_calibration_init_status_get(ADC2));
188 adc_calibration_start(ADC2);
189 while(adc_calibration_status_get(ADC2));
190 adc_calibration_init(ADC3);
191 while(adc_calibration_init_status_get(ADC3));
192 adc_calibration_start(ADC3);
193 while(adc_calibration_status_get(ADC3));
194}
195
201int main(void)
202{
203 __IO uint32_t index = 0;
204 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
205
206 /* config the system clock */
207 system_clock_config();
208
209 /* init at start board */
210 at32_board_init();
211 at32_led_off(LED2);
212 at32_led_off(LED3);
213 at32_led_off(LED4);
214 uart_print_init(115200);
215 gpio_config();
216 adc_config();
217 printf("combine_mode_preempt_interltrig_twoslave \r\n");
218
219 /* adc1 software trigger start conversion */
220 for(index = 0; index < 6; index++)
221 {
222 adc_preempt_software_trigger_enable(ADC1, TRUE);
223 delay_sec(1);
224 }
225 if((adc1_preempt_conversion_count != 2) || (adc2_preempt_conversion_count != 2) || (adc3_preempt_conversion_count != 2))
226 {
227 /* printf flag when error occur */
228 at32_led_on(LED3);
229 at32_led_on(LED4);
230 printf("error occur\r\n");
231 printf("adc1_preempt_conversion_count = %d\r\n",adc1_preempt_conversion_count);
232 printf("adc2_preempt_conversion_count = %d\r\n",adc2_preempt_conversion_count);
233 printf("adc3_preempt_conversion_count = %d\r\n",adc3_preempt_conversion_count);
234 }
235 else
236 {
237 /* printf data when conversion end without error */
238 printf("conversion end without error\r\n");
239 for(index = 0; index < 2; index++)
240 {
241 printf("adc1_preempt_valuetab[%d][0] = 0x%x\r\n", index, adc1_preempt_valuetab[index][0]);
242 printf("adc1_preempt_valuetab[%d][1] = 0x%x\r\n", index, adc1_preempt_valuetab[index][1]);
243 printf("adc1_preempt_valuetab[%d][2] = 0x%x\r\n", index, adc1_preempt_valuetab[index][2]);
244 printf("adc2_preempt_valuetab[%d][0] = 0x%x\r\n", index, adc2_preempt_valuetab[index][0]);
245 printf("adc2_preempt_valuetab[%d][1] = 0x%x\r\n", index, adc2_preempt_valuetab[index][1]);
246 printf("adc2_preempt_valuetab[%d][2] = 0x%x\r\n", index, adc2_preempt_valuetab[index][2]);
247 printf("adc3_preempt_valuetab[%d][0] = 0x%x\r\n", index, adc3_preempt_valuetab[index][0]);
248 printf("adc3_preempt_valuetab[%d][1] = 0x%x\r\n", index, adc3_preempt_valuetab[index][1]);
249 printf("adc3_preempt_valuetab[%d][2] = 0x%x\r\n", index, adc3_preempt_valuetab[index][2]);
250 printf("\r\n");
251 }
252 }
253 at32_led_on(LED2);
254 while(1)
255 {
256 }
257}
258
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adc1_preempt_conversion_count
__IO uint16_t adc1_preempt_conversion_count
Definition: project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:41
adc3_preempt_conversion_count
__IO uint16_t adc3_preempt_conversion_count
Definition: project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:43
adc3_preempt_valuetab
__IO uint16_t adc3_preempt_valuetab[2][3]
Definition: project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:40
adc2_preempt_valuetab
__IO uint16_t adc2_preempt_valuetab[2][3]
Definition: project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:39
adc2_preempt_conversion_count
__IO uint16_t adc2_preempt_conversion_count
Definition: project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:42
adc1_preempt_valuetab
__IO uint16_t adc1_preempt_valuetab[2][3]
Definition: project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_preempt_auto_mode_enable
void adc_preempt_auto_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable automatic preempt group conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:886
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_preempt_conversion_trigger_set
void adc_preempt_conversion_trigger_set(adc_type *adc_x, adc_preempt_trig_select_type adc_preempt_trig, adc_preempt_trig_edge_type adc_preempt_trig_edge)
enable or disable the preempt channel's external trigger and set external trigger event of the specif...
Definition: at32f435_437_adc.c:781
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_preempt_channel_set
void adc_preempt_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
configure preempt channel's corresponding rank in the sequencer and sample time of the specified adc ...
Definition: at32f435_437_adc.c:633
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_preempt_channel_length_set
void adc_preempt_channel_length_set(adc_type *adc_x, uint8_t adc_channel_lenght)
set preempt channel lenghth of the specified adc peripheral.
Definition: at32f435_437_adc.c:601
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_preempt_software_trigger_enable
void adc_preempt_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable preempt software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:978
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_9
@ ADC_CHANNEL_9
Definition: at32f435_437_adc.h:196
ADC_CHANNEL_8
@ ADC_CHANNEL_8
Definition: at32f435_437_adc.h:195
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_12
@ ADC_CHANNEL_12
Definition: at32f435_437_adc.h:199
ADC_CHANNEL_10
@ ADC_CHANNEL_10
Definition: at32f435_437_adc.h:197
ADC_CHANNEL_13
@ ADC_CHANNEL_13
Definition: at32f435_437_adc.h:200
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_7
@ ADC_CHANNEL_7
Definition: at32f435_437_adc.h:194
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_47_5
@ ADC_SAMPLETIME_47_5
Definition: at32f435_437_adc.h:217
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_PREEMPT_TRIG_TMR1CH4
@ ADC_PREEMPT_TRIG_TMR1CH4
Definition: at32f435_437_adc.h:276
ADC_PREEMPT_INTERLTRIG_ONLY_TWOSLAVE_MODE
@ ADC_PREEMPT_INTERLTRIG_ONLY_TWOSLAVE_MODE
Definition: at32f435_437_adc.h:123
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_TMR1TRGOUT2
@ ADC_ORDINARY_TRIG_TMR1TRGOUT2
Definition: at32f435_437_adc.h:250
ADC_PREEMPT_TRIG_EDGE_NONE
@ ADC_PREEMPT_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:313
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_PCCE_INT
#define ADC_PCCE_INT
Definition: at32f435_437_adc.h:55
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
ADC2
#define ADC2
Definition: at32f435_437_adc.h:867
ADC3
#define ADC3
Definition: at32f435_437_adc.h:868
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC3_PERIPH_CLOCK
@ CRM_ADC3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:160
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_ADC2_PERIPH_CLOCK
@ CRM_ADC2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:159
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:81
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:53
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • conversion_abort
  • inc
project/at_start_f437/examples/adc/conversion_abort/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • conversion_abort
  • inc
project/at_start_f437/examples/adc/conversion_abort/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • conversion_abort
  • inc
project/at_start_f437/examples/adc/conversion_abort/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • conversion_abort
  • src
Functions
project/at_start_f437/examples/adc/conversion_abort/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/conversion_abort/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • conversion_abort
  • src
project/at_start_f437/examples/adc/conversion_abort/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/conversion_abort/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • conversion_abort
  • src
Functions | Variables
project/at_start_f437/examples/adc/conversion_abort/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1_channel1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint16_t | dma_trans_complete_flag
__IO uint32_t | adc1_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/conversion_abort/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • conversion_abort
  • src
project/at_start_f437/examples/adc/conversion_abort/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38extern __IO uint16_t dma_trans_complete_flag;
39extern __IO uint32_t adc1_overflow_flag;
40
46void NMI_Handler(void)
47{
48}
49
55void HardFault_Handler(void)
56{
57 /* go to infinite loop when hard fault exception occurs */
58 while(1)
59 {
60 }
61}
62
68void MemManage_Handler(void)
69{
70 /* go to infinite loop when memory manage exception occurs */
71 while(1)
72 {
73 }
74}
75
81void BusFault_Handler(void)
82{
83 /* go to infinite loop when bus fault exception occurs */
84 while(1)
85 {
86 }
87}
88
94void UsageFault_Handler(void)
95{
96 /* go to infinite loop when usage fault exception occurs */
97 while(1)
98 {
99 }
100}
101
107void SVC_Handler(void)
108{
109}
110
116void DebugMon_Handler(void)
117{
118}
119
125void PendSV_Handler(void)
126{
127}
128
134void SysTick_Handler(void)
135{
136}
137
143void DMA1_Channel1_IRQHandler(void)
144{
145 if(dma_flag_get(DMA1_FDT1_FLAG) != RESET)
146 {
147 dma_flag_clear(DMA1_FDT1_FLAG);
148 dma_trans_complete_flag = 1;
149 }
150}
151
157void ADC1_2_3_IRQHandler(void)
158{
159 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
160 {
161 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
162 adc1_overflow_flag++;
163 }
164}
165
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
dma_trans_complete_flag
__IO uint16_t dma_trans_complete_flag
Definition: project/at_start_f435/examples/adc/conversion_abort/src/main.c:39
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • conversion_abort
  • src
Functions | Variables
project/at_start_f437/examples/adc/conversion_abort/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_ordinary_valuetab [10][3] = {0}
__IO uint16_t | dma_trans_complete_flag = 0
__IO uint32_t | adc1_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/conversion_abort/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

Definition at line 102 of file project/at_start_f437/examples/adc/conversion_abort/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 69 of file project/at_start_f437/examples/adc/conversion_abort/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

Definition at line 51 of file project/at_start_f437/examples/adc/conversion_abort/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • conversion_abort
  • src
project/at_start_f437/examples/adc/conversion_abort/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adc1_ordinary_valuetab[10][3] = {0};
39__IO uint16_t dma_trans_complete_flag = 0;
40__IO uint32_t adc1_overflow_flag = 0;
41
42static void gpio_config(void);
43static void dma_config(void);
44static void adc_config(void);
45
51static void gpio_config(void)
52{
53 gpio_init_type gpio_initstructure;
54 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
55
56 gpio_default_para_init(&gpio_initstructure);
57
58 /* config adc pin as analog input mode */
59 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
60 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6;
61 gpio_init(GPIOA, &gpio_initstructure);
62}
63
69static void dma_config(void)
70{
71 dma_init_type dma_init_struct;
72 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
73 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
74
75 dma_reset(DMA1_CHANNEL1);
76 dma_default_para_init(&dma_init_struct);
77 dma_init_struct.buffer_size = 30;
78 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
79 dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
80 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
81 dma_init_struct.memory_inc_enable = TRUE;
82 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
83 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
84 dma_init_struct.peripheral_inc_enable = FALSE;
85 dma_init_struct.priority = DMA_PRIORITY_HIGH;
86 dma_init_struct.loop_mode_enable = FALSE;
87 dma_init(DMA1_CHANNEL1, &dma_init_struct);
88
89 dmamux_enable(DMA1, TRUE);
90 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
91
92 /* enable dma transfer complete interrupt */
93 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
94 dma_channel_enable(DMA1_CHANNEL1, TRUE);
95}
96
102static void adc_config(void)
103{
104 adc_common_config_type adc_common_struct;
105 adc_base_config_type adc_base_struct;
106 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
107 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
108
109 adc_common_default_para_init(&adc_common_struct);
110
111 /* config combine mode */
112 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
113
114 /* config division,adcclk is division by hclk */
115 adc_common_struct.div = ADC_HCLK_DIV_4;
116
117 /* config common dma mode,it's not useful in independent mode */
118 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
119
120 /* config common dma request repeat */
121 adc_common_struct.common_dma_request_repeat_state = FALSE;
122
123 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
124 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
125
126 /* config inner temperature sensor and vintrv */
127 adc_common_struct.tempervintrv_state = FALSE;
128
129 /* config voltage battery */
130 adc_common_struct.vbat_state = FALSE;
131 adc_common_config(&adc_common_struct);
132
133 adc_base_default_para_init(&adc_base_struct);
134
135 adc_base_struct.sequence_mode = TRUE;
136 adc_base_struct.repeat_mode = FALSE;
137 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
138 adc_base_struct.ordinary_channel_length = 3;
139 adc_base_config(ADC1, &adc_base_struct);
140 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
141
142 /* config ordinary channel */
143 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_92_5);
144 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_92_5);
145 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_92_5);
146
147 /* config ordinary trigger source and trigger edge */
148 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
149
150 /* config dma mode,it's not useful when common dma mode is use */
151 adc_dma_mode_enable(ADC1, TRUE);
152
153 /* config dma request repeat,it's not useful when common dma mode is use */
154 adc_dma_request_repeat_enable(ADC1, FALSE);
155
156 /* enable adc overflow interrupt */
157 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
158
159 /* adc enable */
160 adc_enable(ADC1, TRUE);
161 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
162
163 /* adc calibration */
164 adc_calibration_init(ADC1);
165 while(adc_calibration_init_status_get(ADC1));
166 adc_calibration_start(ADC1);
167 while(adc_calibration_status_get(ADC1));
168}
169
175int main(void)
176{
177 __IO uint32_t index = 0;
178 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
179
180 /* config the system clock */
181 system_clock_config();
182
183 /* init at start board */
184 at32_board_init();
185 at32_led_off(LED2);
186 at32_led_off(LED3);
187 at32_led_off(LED4);
188 uart_print_init(115200);
189 gpio_config();
190 dma_config();
191 adc_config();
192 printf("software_trigger_repeat \r\n");
193 for(index = 0; index < 20; index++)
194 {
195 adc_ordinary_software_trigger_enable(ADC1, TRUE);
196 if(index%2 == 0)
197 {
198 adc_conversion_stop(ADC1);
199 while(adc_conversion_stop_status_get(ADC1));
200 }
201 delay_ms(500);
202 }
203 if((dma_trans_complete_flag == 0) || (adc1_overflow_flag != 0))
204 {
205 /* printf flag when error occur */
206 at32_led_on(LED3);
207 at32_led_on(LED4);
208 printf("error occur\r\n");
209 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
210 printf("dma_trans_complete_flag = %d\r\n",dma_trans_complete_flag);
211 }
212 else
213 {
214 /* printf data when conversion end without error */
215 printf("conversion end without error\r\n");
216 for(index = 0; index < 10; index++)
217 {
218 printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][0]);
219 printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][1]);
220 printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][2]);
221 printf("\r\n");
222 }
223 }
224 at32_led_on(LED2);
225 while(1)
226 {
227 }
228}
229
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
dma_trans_complete_flag
__IO uint16_t dma_trans_complete_flag
Definition: project/at_start_f437/examples/adc/conversion_abort/src/main.c:39
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/conversion_abort/src/main.c:40
adc1_ordinary_valuetab
__IO uint16_t adc1_ordinary_valuetab[10][3]
Definition: project/at_start_f437/examples/adc/conversion_abort/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_conversion_stop_status_get
flag_status adc_conversion_stop_status_get(adc_type *adc_x)
get stop conversion's status of the specified adc peripheral.
Definition: at32f435_437_adc.c:910
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_conversion_stop
void adc_conversion_stop(adc_type *adc_x)
stop the ongoing conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:898
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_92_5
@ ADC_SAMPLETIME_92_5
Definition: at32f435_437_adc.h:218
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/conversion_abort/src/main.c:69
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/conversion_abort/src/main.c:102
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/conversion_abort/src/main.c:51
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • current_vref_value_check
  • inc
project/at_start_f437/examples/adc/current_vref_value_check/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • current_vref_value_check
  • inc
project/at_start_f437/examples/adc/current_vref_value_check/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • current_vref_value_check
  • inc
project/at_start_f437/examples/adc/current_vref_value_check/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • current_vref_value_check
  • src
Functions
project/at_start_f437/examples/adc/current_vref_value_check/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/current_vref_value_check/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • current_vref_value_check
  • src
project/at_start_f437/examples/adc/current_vref_value_check/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/current_vref_value_check/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • current_vref_value_check
  • src
Functions | Variables
project/at_start_f437/examples/adc/current_vref_value_check/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint32_t adc1_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/current_vref_value_check/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • current_vref_value_check
  • src
project/at_start_f437/examples/adc/current_vref_value_check/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
39extern __IO uint32_t adc1_overflow_flag;
40
46void NMI_Handler(void)
47{
48}
49
55void HardFault_Handler(void)
56{
57 /* go to infinite loop when hard fault exception occurs */
58 while(1)
59 {
60 }
61}
62
68void MemManage_Handler(void)
69{
70 /* go to infinite loop when memory manage exception occurs */
71 while(1)
72 {
73 }
74}
75
81void BusFault_Handler(void)
82{
83 /* go to infinite loop when bus fault exception occurs */
84 while(1)
85 {
86 }
87}
88
94void UsageFault_Handler(void)
95{
96 /* go to infinite loop when usage fault exception occurs */
97 while(1)
98 {
99 }
100}
101
107void SVC_Handler(void)
108{
109}
110
116void DebugMon_Handler(void)
117{
118}
119
125void PendSV_Handler(void)
126{
127}
128
134void SysTick_Handler(void)
135{
136}
137
143void ADC1_2_3_IRQHandler(void)
144{
145 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
146 {
147 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
148 adc1_overflow_flag++;
149 }
150}
151
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • current_vref_value_check
  • src
Functions | Variables
project/at_start_f437/examples/adc/current_vref_value_check/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_ordinary_value = 0
__IO uint32_t | adc1_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/current_vref_value_check/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

Definition at line 82 of file project/at_start_f437/examples/adc/current_vref_value_check/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 49 of file project/at_start_f437/examples/adc/current_vref_value_check/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • current_vref_value_check
  • src
project/at_start_f437/examples/adc/current_vref_value_check/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adc1_ordinary_value = 0;
39__IO uint32_t adc1_overflow_flag = 0;
40
41static void dma_config(void);
42static void adc_config(void);
43
49static void dma_config(void)
50{
51 dma_init_type dma_init_struct;
52 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
53 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
54
55 dma_reset(DMA1_CHANNEL1);
56 dma_default_para_init(&dma_init_struct);
57 dma_init_struct.buffer_size = 1;
58 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
59 dma_init_struct.memory_base_addr = (uint32_t)&adc1_ordinary_value;
60 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
61 dma_init_struct.memory_inc_enable = FALSE;
62 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
63 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
64 dma_init_struct.peripheral_inc_enable = FALSE;
65 dma_init_struct.priority = DMA_PRIORITY_HIGH;
66 dma_init_struct.loop_mode_enable = TRUE;
67 dma_init(DMA1_CHANNEL1, &dma_init_struct);
68
69 dmamux_enable(DMA1, TRUE);
70 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
71
72 /* disable dma transfer complete interrupt */
73 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, FALSE);
74 dma_channel_enable(DMA1_CHANNEL1, TRUE);
75}
76
82static void adc_config(void)
83{
84 adc_common_config_type adc_common_struct;
85 adc_base_config_type adc_base_struct;
86 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
87 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
88
89 adc_common_default_para_init(&adc_common_struct);
90
91 /* config combine mode */
92 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
93
94 /* config division,adcclk is division by hclk */
95 adc_common_struct.div = ADC_HCLK_DIV_4;
96
97 /* config common dma mode,it's not useful in independent mode */
98 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
99
100 /* config common dma request repeat */
101 adc_common_struct.common_dma_request_repeat_state = FALSE;
102
103 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
104 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
105
106 /* config inner temperature sensor and vintrv */
107 adc_common_struct.tempervintrv_state = TRUE;
108
109 /* config voltage battery */
110 adc_common_struct.vbat_state = FALSE;
111 adc_common_config(&adc_common_struct);
112
113 adc_base_default_para_init(&adc_base_struct);
114
115 adc_base_struct.sequence_mode = FALSE;
116 adc_base_struct.repeat_mode = FALSE;
117 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
118 adc_base_struct.ordinary_channel_length = 1;
119 adc_base_config(ADC1, &adc_base_struct);
120 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
121
122 /* config ordinary channel */
123 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_17, 1, ADC_SAMPLETIME_92_5);
124
125 /* config ordinary trigger source and trigger edge */
126 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
127
128 /* config dma mode,it's not useful when common dma mode is use */
129 adc_dma_mode_enable(ADC1, TRUE);
130
131 /* config dma request repeat,it's not useful when common dma mode is use */
132 adc_dma_request_repeat_enable(ADC1, TRUE);
133
134 /* enable adc overflow interrupt */
135 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
136
137 /* adc enable */
138 adc_enable(ADC1, TRUE);
139 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
140
141 /* adc calibration */
142 adc_calibration_init(ADC1);
143 while(adc_calibration_init_status_get(ADC1));
144 adc_calibration_start(ADC1);
145 while(adc_calibration_status_get(ADC1));
146}
147
153int main(void)
154{
155 __IO uint32_t index = 0;
156 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
157
158 /* config the system clock */
159 system_clock_config();
160
161 /* init at start board */
162 at32_board_init();
163 at32_led_off(LED2);
164 at32_led_off(LED3);
165 at32_led_off(LED4);
166 uart_print_init(115200);
167 dma_config();
168 adc_config();
169 printf("adc1_vref_check \r\n");
170
171 while(1)
172 {
173 at32_led_toggle(LED2);
174 delay_sec(1);
175 /* adc1 software trigger start conversion */
176 adc_ordinary_software_trigger_enable(ADC1, TRUE);
177 while(dma_flag_get(DMA1_FDT1_FLAG) == RESET);
178 dma_flag_clear(DMA1_FDT1_FLAG);
179 printf("vref_value = %f V\r\n", ((double)1.2 * 4095) / adc1_ordinary_value);
180 if(adc1_overflow_flag != 0)
181 {
182 /* printf flag when error occur */
183 at32_led_on(LED3);
184 at32_led_on(LED4);
185 printf("error occur\r\n");
186 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
187 }
188 }
189}
190
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adc1_ordinary_value
__IO uint16_t adc1_ordinary_value
Definition: project/at_start_f437/examples/adc/current_vref_value_check/src/main.c:38
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/current_vref_value_check/src/main.c:39
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_17
@ ADC_CHANNEL_17
Definition: at32f435_437_adc.h:204
ADC_SAMPLETIME_92_5
@ ADC_SAMPLETIME_92_5
Definition: at32f435_437_adc.h:218
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/current_vref_value_check/src/main.c:49
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/current_vref_value_check/src/main.c:82
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • edma_double_buffer
  • inc
project/at_start_f437/examples/adc/edma_double_buffer/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • edma_double_buffer
  • inc
project/at_start_f437/examples/adc/edma_double_buffer/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • edma_double_buffer
  • inc
project/at_start_f437/examples/adc/edma_double_buffer/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • edma_double_buffer
  • src
Functions
project/at_start_f437/examples/adc/edma_double_buffer/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/edma_double_buffer/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • edma_double_buffer
  • src
project/at_start_f437/examples/adc/edma_double_buffer/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/edma_double_buffer/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • edma_double_buffer
  • src
Functions | Variables
project/at_start_f437/examples/adc/edma_double_buffer/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | EDMA_Stream1_IRQHandler (void)
this function handles edma_stream1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint16_t | edma_trans_complete_flag
__IO uint16_t | double_buffer_is_useful
__IO uint32_t | adc1_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/edma_double_buffer/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • edma_double_buffer
  • src
project/at_start_f437/examples/adc/edma_double_buffer/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
39extern __IO uint16_t edma_trans_complete_flag;
40extern __IO uint16_t double_buffer_is_useful;
41extern __IO uint32_t adc1_overflow_flag;
42
48void NMI_Handler(void)
49{
50}
51
57void HardFault_Handler(void)
58{
59 /* go to infinite loop when hard fault exception occurs */
60 while(1)
61 {
62 }
63}
64
70void MemManage_Handler(void)
71{
72 /* go to infinite loop when memory manage exception occurs */
73 while(1)
74 {
75 }
76}
77
83void BusFault_Handler(void)
84{
85 /* go to infinite loop when bus fault exception occurs */
86 while(1)
87 {
88 }
89}
90
96void UsageFault_Handler(void)
97{
98 /* go to infinite loop when usage fault exception occurs */
99 while(1)
100 {
101 }
102}
103
109void SVC_Handler(void)
110{
111}
112
118void DebugMon_Handler(void)
119{
120}
121
127void PendSV_Handler(void)
128{
129}
130
136void SysTick_Handler(void)
137{
138}
139
145void EDMA_Stream1_IRQHandler(void)
146{
147 if(edma_flag_get(EDMA_FDT1_FLAG) != RESET)
148 {
149 if(edma_memory_target_get(EDMA_STREAM1))
150 {
151 double_buffer_is_useful = 0;
152 }
153 else
154 {
155 double_buffer_is_useful = 1;
156 }
157 edma_flag_clear(EDMA_FDT1_FLAG);
158 edma_trans_complete_flag = 1;
159 }
160}
161
167void ADC1_2_3_IRQHandler(void)
168{
169 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
170 {
171 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
172 adc1_overflow_flag++;
173 }
174}
175
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
EDMA_Stream1_IRQHandler
void EDMA_Stream1_IRQHandler(void)
this function handles edma_stream1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c:144
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
double_buffer_is_useful
__IO uint16_t double_buffer_is_useful
Definition: project/at_start_f435/examples/adc/edma_double_buffer/src/main.c:41
edma_trans_complete_flag
__IO uint16_t edma_trans_complete_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c:39
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
edma_flag_get
flag_status edma_flag_get(uint32_t edma_flag)
get the edma flag.
Definition: at32f435_437_edma.c:512
edma_flag_clear
void edma_flag_clear(uint32_t edma_flag)
clear the edma flag.
Definition: at32f435_437_edma.c:549
edma_memory_target_get
edma_memory_type edma_memory_target_get(edma_stream_type *edma_streamx)
get the current memory target.
Definition: at32f435_437_edma.c:442
EDMA_FDT1_FLAG
#define EDMA_FDT1_FLAG
Definition: at32f435_437_edma.h:71
EDMA_STREAM1
#define EDMA_STREAM1
Definition: at32f435_437_edma.h:962
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • edma_double_buffer
  • src
Functions | Variables
project/at_start_f437/examples/adc/edma_double_buffer/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | edma_config (void)
edma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_ordinary_valuetab [3] = {0}
__IO uint16_t | double_adc1_ordinary_valuetab [3] = {0}
__IO uint16_t | edma_trans_complete_flag = 0
__IO uint16_t | double_buffer_is_useful = 0
__IO uint32_t | adc1_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/edma_double_buffer/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

Definition at line 115 of file project/at_start_f437/examples/adc/edma_double_buffer/src/main.c.

◆ edma_config()

static void edma_config ( void )
static

edma configuration.

Parameters
none
Return values
none

Definition at line 71 of file project/at_start_f437/examples/adc/edma_double_buffer/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

Definition at line 53 of file project/at_start_f437/examples/adc/edma_double_buffer/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • edma_double_buffer
  • src
project/at_start_f437/examples/adc/edma_double_buffer/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adc1_ordinary_valuetab[3] = {0};
39__IO uint16_t double_adc1_ordinary_valuetab[3] = {0};
40__IO uint16_t edma_trans_complete_flag = 0;
41__IO uint16_t double_buffer_is_useful = 0;
42__IO uint32_t adc1_overflow_flag = 0;
43
44static void gpio_config(void);
45static void edma_config(void);
46static void adc_config(void);
47
53static void gpio_config(void)
54{
55 gpio_init_type gpio_initstructure;
56 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
57
58 gpio_default_para_init(&gpio_initstructure);
59
60 /* config adc pin as analog input mode */
61 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
62 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6;
63 gpio_init(GPIOA, &gpio_initstructure);
64}
65
71static void edma_config(void)
72{
73 edma_init_type edma_init_struct;
74 crm_periph_clock_enable(CRM_EDMA_PERIPH_CLOCK, TRUE);
75 nvic_irq_enable(EDMA_Stream1_IRQn, 0, 0);
76
77 edma_reset(EDMA_STREAM1);
78 edma_default_para_init(&edma_init_struct);
79 edma_init_struct.buffer_size = 3;
80 edma_init_struct.direction = EDMA_DIR_PERIPHERAL_TO_MEMORY;
81 edma_init_struct.memory0_base_addr = (uint32_t)adc1_ordinary_valuetab;
82 edma_init_struct.memory_burst_mode = EDMA_MEMORY_SINGLE;
83 edma_init_struct.memory_data_width = EDMA_MEMORY_DATA_WIDTH_HALFWORD;
84 edma_init_struct.memory_inc_enable = TRUE;
85 edma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
86 edma_init_struct.peripheral_burst_mode = EDMA_PERIPHERAL_SINGLE;
87 edma_init_struct.peripheral_data_width = EDMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
88 edma_init_struct.peripheral_inc_enable = FALSE;
89 edma_init_struct.priority = EDMA_PRIORITY_VERY_HIGH;
90 edma_init_struct.loop_mode_enable = FALSE;
91 edma_init_struct.fifo_threshold = EDMA_FIFO_THRESHOLD_1QUARTER;
92 edma_init_struct.fifo_mode_enable = FALSE;
93 edma_init(EDMA_STREAM1, &edma_init_struct);
94
95 /* edmamux init and enable */
96 edmamux_enable(TRUE);
97 edmamux_init(EDMAMUX_CHANNEL1, EDMAMUX_DMAREQ_ID_ADC1);
98
99 /* config double buffer mode */
100 edma_double_buffer_mode_init(EDMA_STREAM1, (uint32_t)double_adc1_ordinary_valuetab, EDMA_MEMORY_0);
101
102 /* enable the double memory mode */
103 edma_double_buffer_mode_enable(EDMA_STREAM1, TRUE);
104
105 /* enable edma full data transfer intterrupt */
106 edma_interrupt_enable(EDMA_STREAM1, EDMA_FDT_INT, TRUE);
107 edma_stream_enable(EDMA_STREAM1, TRUE);
108}
109
115static void adc_config(void)
116{
117 adc_common_config_type adc_common_struct;
118 adc_base_config_type adc_base_struct;
119 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
120 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
121
122 adc_common_default_para_init(&adc_common_struct);
123
124 /* config combine mode */
125 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
126
127 /* config division,adcclk is division by hclk */
128 adc_common_struct.div = ADC_HCLK_DIV_17;
129
130 /* config common dma mode,it's not useful in independent mode */
131 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
132
133 /* config common dma request repeat */
134 adc_common_struct.common_dma_request_repeat_state = FALSE;
135
136 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
137 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
138
139 /* config inner temperature sensor and vintrv */
140 adc_common_struct.tempervintrv_state = FALSE;
141
142 /* config voltage battery */
143 adc_common_struct.vbat_state = FALSE;
144 adc_common_config(&adc_common_struct);
145
146 adc_base_default_para_init(&adc_base_struct);
147
148 adc_base_struct.sequence_mode = TRUE;
149 adc_base_struct.repeat_mode = FALSE;
150 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
151 adc_base_struct.ordinary_channel_length = 3;
152 adc_base_config(ADC1, &adc_base_struct);
153
154 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
155
156 /* config ordinary channel */
157 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_640_5);
158 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_640_5);
159 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_640_5);
160
161 /* config ordinary trigger source and trigger edge */
162 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
163
164 /* config dma mode,it's not useful when common dma mode is use */
165 adc_dma_mode_enable(ADC1, TRUE);
166
167 /* config dma request repeat,it's not useful when common dma mode is use */
168 adc_dma_request_repeat_enable(ADC1, TRUE);
169
170 /* enable adc overflow interrupt */
171 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
172
173 /* adc enable */
174 adc_enable(ADC1, TRUE);
175 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
176
177 /* adc calibration */
178 adc_calibration_init(ADC1);
179 while(adc_calibration_init_status_get(ADC1));
180 adc_calibration_start(ADC1);
181 while(adc_calibration_status_get(ADC1));
182}
183
189int main(void)
190{
191 __IO uint32_t index = 0;
192 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
193
194 /* config the system clock */
195 system_clock_config();
196
197 /* init at start board */
198 at32_board_init();
199 at32_led_off(LED2);
200 at32_led_off(LED3);
201 at32_led_off(LED4);
202 uart_print_init(115200);
203 gpio_config();
204 edma_config();
205 adc_config();
206 printf("edma_double_buffer \r\n");
207 while(1)
208 {
209 adc_ordinary_software_trigger_enable(ADC1, TRUE);
210 while(edma_trans_complete_flag == 0);
211 edma_trans_complete_flag = 0;
212 if(adc1_overflow_flag != 0)
213 {
214 /* printf flag when error occur */
215 at32_led_on(LED4);
216 printf("error occur\r\n");
217 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
218 }
219 else
220 {
221 printf("conversion end without error\r\n");
222 /* printf data when conversion end without error */
223 if(double_buffer_is_useful == 1)
224 {
225 printf("double_adc1_ordinary_valuetab[0] = 0x%x\r\n", double_adc1_ordinary_valuetab[0]);
226 printf("double_adc1_ordinary_valuetab[1] = 0x%x\r\n", double_adc1_ordinary_valuetab[1]);
227 printf("double_adc1_ordinary_valuetab[2] = 0x%x\r\n", double_adc1_ordinary_valuetab[2]);
228 }
229 else
230 {
231 printf("adc1_ordinary_valuetab[0] = 0x%x\r\n", adc1_ordinary_valuetab[0]);
232 printf("adc1_ordinary_valuetab[1] = 0x%x\r\n", adc1_ordinary_valuetab[1]);
233 printf("adc1_ordinary_valuetab[2] = 0x%x\r\n", adc1_ordinary_valuetab[2]);
234 }
235 }
236 printf("\r\n");
237 delay_sec(1);
238 }
239}
240
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/edma_double_buffer/src/main.c:42
double_buffer_is_useful
__IO uint16_t double_buffer_is_useful
Definition: project/at_start_f437/examples/adc/edma_double_buffer/src/main.c:41
adc1_ordinary_valuetab
__IO uint16_t adc1_ordinary_valuetab[3]
Definition: project/at_start_f437/examples/adc/edma_double_buffer/src/main.c:38
edma_trans_complete_flag
__IO uint16_t edma_trans_complete_flag
Definition: project/at_start_f437/examples/adc/edma_double_buffer/src/main.c:40
double_adc1_ordinary_valuetab
__IO uint16_t double_adc1_ordinary_valuetab[3]
Definition: project/at_start_f437/examples/adc/edma_double_buffer/src/main.c:39
edma_init_struct
edma_init_type edma_init_struct
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c:40
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_640_5
@ ADC_SAMPLETIME_640_5
Definition: at32f435_437_adc.h:220
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_17
@ ADC_HCLK_DIV_17
Definition: at32f435_437_adc.h:103
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_EDMA_PERIPH_CLOCK
@ CRM_EDMA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:114
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
edma_double_buffer_mode_init
void edma_double_buffer_mode_init(edma_stream_type *edma_streamx, uint32_t memory1_addr, edma_memory_type current_memory)
config the the double buffer mode.
Definition: at32f435_437_edma.c:354
edmamux_init
void edmamux_init(edmamux_channel_type *edmamux_channelx, edmamux_requst_id_sel_type edmamux_req_id)
edmamux init.
Definition: at32f435_437_edma.c:718
edma_init
void edma_init(edma_stream_type *edma_streamx, edma_init_type *edma_init_struct)
edma init.
Definition: at32f435_437_edma.c:115
edma_double_buffer_mode_enable
void edma_double_buffer_mode_enable(edma_stream_type *edma_streamx, confirm_state new_state)
enable or disable the double memory mode.
Definition: at32f435_437_edma.c:383
edma_stream_enable
void edma_stream_enable(edma_stream_type *edma_streamx, confirm_state new_state)
enable or disable the edma streamx.
Definition: at32f435_437_edma.c:198
edma_reset
void edma_reset(edma_stream_type *edma_streamx)
reset edma_streamx channely register.
Definition: at32f435_437_edma.c:58
edmamux_enable
void edmamux_enable(confirm_state new_state)
enable or disable the edma edmamux.
Definition: at32f435_437_edma.c:673
edma_interrupt_enable
void edma_interrupt_enable(edma_stream_type *edma_streamx, uint32_t edma_int, confirm_state new_state)
enable or disable the edma streamx interrupts.
Definition: at32f435_437_edma.c:225
edma_default_para_init
void edma_default_para_init(edma_init_type *edma_init_struct)
edma init struct config with its default value.
Definition: at32f435_437_edma.c:165
EDMA_PRIORITY_VERY_HIGH
@ EDMA_PRIORITY_VERY_HIGH
Definition: at32f435_437_edma.h:192
EDMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ EDMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_edma.h:170
EDMA_MEMORY_DATA_WIDTH_HALFWORD
@ EDMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_edma.h:180
EDMA_MEMORY_SINGLE
@ EDMA_MEMORY_SINGLE
Definition: at32f435_437_edma.h:224
EDMA_PERIPHERAL_SINGLE
@ EDMA_PERIPHERAL_SINGLE
Definition: at32f435_437_edma.h:235
EDMA_FIFO_THRESHOLD_1QUARTER
@ EDMA_FIFO_THRESHOLD_1QUARTER
Definition: at32f435_437_edma.h:200
EDMA_MEMORY_0
@ EDMA_MEMORY_0
Definition: at32f435_437_edma.h:150
EDMA_DIR_PERIPHERAL_TO_MEMORY
@ EDMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_edma.h:159
EDMAMUX_DMAREQ_ID_ADC1
@ EDMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_edma.h:259
EDMA_FDT_INT
#define EDMA_FDT_INT
Definition: at32f435_437_edma.h:55
EDMA_STREAM1
#define EDMA_STREAM1
Definition: at32f435_437_edma.h:962
EDMAMUX_CHANNEL1
#define EDMAMUX_CHANNEL1
Definition: at32f435_437_edma.h:989
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
EDMA_Stream1_IRQn
@ EDMA_Stream1_IRQn
Definition: at32f435_437.h:157
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/edma_double_buffer/src/main.c:115
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/edma_double_buffer/src/main.c:53
edma_config
static void edma_config(void)
edma configuration.
Definition: project/at_start_f437/examples/adc/edma_double_buffer/src/main.c:71
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
edma_init_type
edma init type
Definition: at32f435_437_edma.h:440
edma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_edma.h:441
edma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_edma.h:444
edma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_edma.h:446
edma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_edma.h:445
edma_init_type::direction
edma_dir_type direction
Definition: at32f435_437_edma.h:443
edma_init_type::fifo_mode_enable
confirm_state fifo_mode_enable
Definition: at32f435_437_edma.h:451
edma_init_type::peripheral_data_width
edma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_edma.h:447
edma_init_type::fifo_threshold
edma_fifo_threshold_type fifo_threshold
Definition: at32f435_437_edma.h:452
edma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_edma.h:449
edma_init_type::priority
edma_priority_level_type priority
Definition: at32f435_437_edma.h:450
edma_init_type::memory0_base_addr
uint32_t memory0_base_addr
Definition: at32f435_437_edma.h:442
edma_init_type::peripheral_burst_mode
edma_peripheral_burst_type peripheral_burst_mode
Definition: at32f435_437_edma.h:454
edma_init_type::memory_data_width
edma_memory_data_size_type memory_data_width
Definition: at32f435_437_edma.h:448
edma_init_type::memory_burst_mode
edma_memory_burst_type memory_burst_mode
Definition: at32f435_437_edma.h:453
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • exint_trigger_partitioned
  • inc
project/at_start_f437/examples/adc/exint_trigger_partitioned/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • exint_trigger_partitioned
  • inc
project/at_start_f437/examples/adc/exint_trigger_partitioned/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • exint_trigger_partitioned
  • inc
project/at_start_f437/examples/adc/exint_trigger_partitioned/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • exint_trigger_partitioned
  • src
Functions
project/at_start_f437/examples/adc/exint_trigger_partitioned/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/exint_trigger_partitioned/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • exint_trigger_partitioned
  • src
project/at_start_f437/examples/adc/exint_trigger_partitioned/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/exint_trigger_partitioned/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • exint_trigger_partitioned
  • src
Functions | Variables
project/at_start_f437/examples/adc/exint_trigger_partitioned/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1_channel1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint16_t | adc1_preempt_valuetab [3][3]
__IO uint16_t | dma_trans_complete_flag
__IO uint16_t | preempt_trigger_count
__IO uint32_t | adc1_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/exint_trigger_partitioned/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • exint_trigger_partitioned
  • src
project/at_start_f437/examples/adc/exint_trigger_partitioned/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
39extern __IO uint16_t adc1_preempt_valuetab[3][3];
40extern __IO uint16_t dma_trans_complete_flag;
41extern __IO uint16_t preempt_trigger_count;
42extern __IO uint32_t adc1_overflow_flag;
43
49void NMI_Handler(void)
50{
51}
52
58void HardFault_Handler(void)
59{
60 /* go to infinite loop when hard fault exception occurs */
61 while(1)
62 {
63 }
64}
65
71void MemManage_Handler(void)
72{
73 /* go to infinite loop when memory manage exception occurs */
74 while(1)
75 {
76 }
77}
78
84void BusFault_Handler(void)
85{
86 /* go to infinite loop when bus fault exception occurs */
87 while(1)
88 {
89 }
90}
91
97void UsageFault_Handler(void)
98{
99 /* go to infinite loop when usage fault exception occurs */
100 while(1)
101 {
102 }
103}
104
110void SVC_Handler(void)
111{
112}
113
119void DebugMon_Handler(void)
120{
121}
122
128void PendSV_Handler(void)
129{
130}
131
137void SysTick_Handler(void)
138{
139}
140
146void DMA1_Channel1_IRQHandler(void)
147{
148 if(dma_flag_get(DMA1_FDT1_FLAG) != RESET)
149 {
150 dma_flag_clear(DMA1_FDT1_FLAG);
151 dma_trans_complete_flag = 1;
152 }
153}
154
160void ADC1_2_3_IRQHandler(void)
161{
162 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
163 {
164 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
165 adc1_overflow_flag++;
166 }
167 if(adc_flag_get(ADC1, ADC_PCCE_FLAG) != RESET)
168 {
169 adc_flag_clear(ADC1, ADC_PCCE_FLAG);
170 if(preempt_trigger_count < 3)
171 {
172 adc1_preempt_valuetab[preempt_trigger_count][0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1);
173 adc1_preempt_valuetab[preempt_trigger_count][1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2);
174 adc1_preempt_valuetab[preempt_trigger_count][2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3);
175 preempt_trigger_count++;
176 }
177 }
178}
179
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
adc1_preempt_valuetab
__IO uint16_t adc1_preempt_valuetab[3][3]
Definition: project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:38
dma_trans_complete_flag
__IO uint16_t dma_trans_complete_flag
Definition: project/at_start_f435/examples/adc/conversion_abort/src/main.c:39
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
preempt_trigger_count
__IO uint16_t preempt_trigger_count
Definition: project/at_start_f435/examples/adc/exint_trigger_partitioned/src/main.c:41
adc_preempt_conversion_data_get
uint16_t adc_preempt_conversion_data_get(adc_type *adc_x, adc_preempt_channel_type adc_preempt_channel)
return the conversion data for selection preempt channel of the specified adc peripheral.
Definition: at32f435_437_adc.c:1036
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_PREEMPT_CHANNEL_3
@ ADC_PREEMPT_CHANNEL_3
Definition: at32f435_437_adc.h:326
ADC_PREEMPT_CHANNEL_2
@ ADC_PREEMPT_CHANNEL_2
Definition: at32f435_437_adc.h:325
ADC_PREEMPT_CHANNEL_1
@ ADC_PREEMPT_CHANNEL_1
Definition: at32f435_437_adc.h:324
ADC_PCCE_FLAG
#define ADC_PCCE_FLAG
Definition: at32f435_437_adc.h:69
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • exint_trigger_partitioned
  • src
Functions | Variables
project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | exint_config (void)
exint configuration. More...
static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_ordinary_valuetab [3][3] = {0}
__IO uint16_t | adc1_preempt_valuetab [3][3] = {0}
__IO uint16_t | dma_trans_complete_flag = 0
__IO uint16_t | preempt_trigger_count = 0
__IO uint32_t | adc1_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< preempt channels conversion end interrupt

< adc ready to conversion flag

Definition at line 152 of file project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 119 of file project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c.

◆ exint_config()

static void exint_config ( void )
static

exint configuration.

Parameters
none
Return values
none

< gpio pins number 11

< gpio pins number 15

< external interrupt line 11

< external interrupt line 15

Definition at line 77 of file project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

< gpio pins number 7

< gpio pins number 0

< gpio pins number 1

Definition at line 54 of file project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • exint_trigger_partitioned
  • src
project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adc1_ordinary_valuetab[3][3] = {0};
39__IO uint16_t adc1_preempt_valuetab[3][3] = {0};
40__IO uint16_t dma_trans_complete_flag = 0;
41__IO uint16_t preempt_trigger_count = 0;
42__IO uint32_t adc1_overflow_flag = 0;
43
44static void gpio_config(void);
45static void exint_config(void);
46static void dma_config(void);
47static void adc_config(void);
48
54static void gpio_config(void)
55{
56 gpio_init_type gpio_initstructure;
57 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
58 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
59
60 gpio_default_para_init(&gpio_initstructure);
61
62 /* config adc pin as analog input mode */
63 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
64 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7;
65 gpio_init(GPIOA, &gpio_initstructure);
66
67 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
68 gpio_initstructure.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1;
69 gpio_init(GPIOB, &gpio_initstructure);
70}
71
77static void exint_config(void)
78{
79 gpio_init_type gpio_initstructure;
80 exint_init_type exint_init_struct;
81
82 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
83 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
84 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
85
86 gpio_default_para_init(&gpio_initstructure);
87
88 /* config exint line 11 and line 15 */
89 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
90 gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
91 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
92 gpio_initstructure.gpio_pins = GPIO_PINS_11;
93 gpio_init(GPIOC, &gpio_initstructure);
94 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
95 gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
96 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
97 gpio_initstructure.gpio_pins = GPIO_PINS_15;
98 gpio_init(GPIOA, &gpio_initstructure);
99
100 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOC, SCFG_PINS_SOURCE11);
101 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE15);
102
103 exint_default_para_init(&exint_init_struct);
104 exint_init_struct.line_enable = TRUE;
105 exint_init_struct.line_mode = EXINT_LINE_EVENT;
106 exint_init_struct.line_select = EXINT_LINE_11;
107 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
108 exint_init(&exint_init_struct);
109
110 exint_init_struct.line_select = EXINT_LINE_15;
111 exint_init(&exint_init_struct);
112}
113
119static void dma_config(void)
120{
121 dma_init_type dma_init_struct;
122 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
123 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
124
125 dma_reset(DMA1_CHANNEL1);
126 dma_default_para_init(&dma_init_struct);
127 dma_init_struct.buffer_size = 9;
128 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
129 dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
130 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
131 dma_init_struct.memory_inc_enable = TRUE;
132 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
133 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
134 dma_init_struct.peripheral_inc_enable = FALSE;
135 dma_init_struct.priority = DMA_PRIORITY_HIGH;
136 dma_init_struct.loop_mode_enable = FALSE;
137 dma_init(DMA1_CHANNEL1, &dma_init_struct);
138
139 dmamux_enable(DMA1, TRUE);
140 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
141
142 /* enable dma transfer complete interrupt */
143 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
144 dma_channel_enable(DMA1_CHANNEL1, TRUE);
145}
146
152static void adc_config(void)
153{
154 adc_common_config_type adc_common_struct;
155 adc_base_config_type adc_base_struct;
156 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
157 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
158
159 adc_common_default_para_init(&adc_common_struct);
160
161 /* config combine mode */
162 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
163
164 /* config division,adcclk is division by hclk */
165 adc_common_struct.div = ADC_HCLK_DIV_4;
166
167 /* config common dma mode,it's not useful in independent mode */
168 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
169
170 /* config common dma request repeat */
171 adc_common_struct.common_dma_request_repeat_state = FALSE;
172
173 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
174 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
175
176 /* config inner temperature sensor and vintrv */
177 adc_common_struct.tempervintrv_state = FALSE;
178
179 /* config voltage battery */
180 adc_common_struct.vbat_state = FALSE;
181 adc_common_config(&adc_common_struct);
182
183 adc_base_default_para_init(&adc_base_struct);
184
185 adc_base_struct.sequence_mode = TRUE;
186 adc_base_struct.repeat_mode = FALSE;
187 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
188 adc_base_struct.ordinary_channel_length = 3;
189 adc_base_config(ADC1, &adc_base_struct);
190 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
191
192 /* config ordinary channel */
193 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_47_5);
194 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_47_5);
195 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_47_5);
196
197 /* config ordinary trigger source and trigger edge */
198 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_EXINT11, ADC_ORDINARY_TRIG_EDGE_RISING);
199
200 /* config dma mode,it's not useful when common dma mode is use */
201 adc_dma_mode_enable(ADC1, TRUE);
202
203 /* config dma request repeat,it's not useful when common dma mode is use */
204 adc_dma_request_repeat_enable(ADC1, FALSE);
205
206 /* set partitioned mode channel count */
207 adc_ordinary_part_count_set(ADC1, 1);
208
209 /* enable the partitioned mode on ordinary channel */
210 adc_ordinary_part_mode_enable(ADC1, TRUE);
211
212 /* config preempt channel */
213 adc_preempt_channel_length_set(ADC1, 3);
214 adc_preempt_channel_set(ADC1, ADC_CHANNEL_7, 1, ADC_SAMPLETIME_47_5);
215 adc_preempt_channel_set(ADC1, ADC_CHANNEL_8, 2, ADC_SAMPLETIME_47_5);
216 adc_preempt_channel_set(ADC1, ADC_CHANNEL_9, 3, ADC_SAMPLETIME_47_5);
217
218 /* config preempt trigger source and trigger edge */
219 adc_preempt_conversion_trigger_set(ADC1, ADC_PREEMPT_TRIG_EXINT15, ADC_PREEMPT_TRIG_EDGE_RISING);
220
221 /* enable adc overflow interrupt */
222 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
223
224 /* enable adc preempt channels conversion end interrupt */
225 adc_interrupt_enable(ADC1, ADC_PCCE_INT, TRUE);
226
227 /* adc enable */
228 adc_enable(ADC1, TRUE);
229 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
230
231 /* adc calibration */
232 adc_calibration_init(ADC1);
233 while(adc_calibration_init_status_get(ADC1));
234 adc_calibration_start(ADC1);
235 while(adc_calibration_status_get(ADC1));
236}
237
243int main(void)
244{
245 __IO uint32_t index = 0;
246 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
247
248 /* config the system clock */
249 system_clock_config();
250
251 /* init at start board */
252 at32_board_init();
253 at32_led_off(LED2);
254 at32_led_off(LED3);
255 at32_led_off(LED4);
256 uart_print_init(115200);
257 gpio_config();
258 exint_config();
259 dma_config();
260 adc_config();
261 printf("exint_trigger_partitioned \r\n");
262
263 while(dma_trans_complete_flag == 0);
264 while(preempt_trigger_count != 3);
265 if(adc1_overflow_flag != 0)
266 {
267 /* printf flag when error occur */
268 at32_led_on(LED3);
269 at32_led_on(LED4);
270 printf("error occur\r\n");
271 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
272 }
273 else
274 {
275 /* printf data when conversion end without error */
276 printf("conversion end without error\r\n");
277 for(index = 0; index < 3; index++)
278 {
279 printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][0]);
280 printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][1]);
281 printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][2]);
282 printf("adc1_preempt_valuetab[%d][0] = 0x%x\r\n",index, adc1_preempt_valuetab[index][0]);
283 printf("adc1_preempt_valuetab[%d][1] = 0x%x\r\n",index, adc1_preempt_valuetab[index][1]);
284 printf("adc1_preempt_valuetab[%d][2] = 0x%x\r\n",index, adc1_preempt_valuetab[index][2]);
285 printf("\r\n");
286 }
287 }
288 at32_led_on(LED2);
289 while(1)
290 {
291 }
292}
293
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adc1_preempt_valuetab
__IO uint16_t adc1_preempt_valuetab[3][3]
Definition: project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c:39
dma_trans_complete_flag
__IO uint16_t dma_trans_complete_flag
Definition: project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c:40
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c:42
adc1_ordinary_valuetab
__IO uint16_t adc1_ordinary_valuetab[3][3]
Definition: project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c:38
preempt_trigger_count
__IO uint16_t preempt_trigger_count
Definition: project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c:41
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_ordinary_part_count_set
void adc_ordinary_part_count_set(adc_type *adc_x, uint8_t adc_channel_count)
set partitioned mode channel count of the specified adc peripheral.
Definition: at32f435_437_adc.c:843
adc_preempt_conversion_trigger_set
void adc_preempt_conversion_trigger_set(adc_type *adc_x, adc_preempt_trig_select_type adc_preempt_trig, adc_preempt_trig_edge_type adc_preempt_trig_edge)
enable or disable the preempt channel's external trigger and set external trigger event of the specif...
Definition: at32f435_437_adc.c:781
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_preempt_channel_set
void adc_preempt_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
configure preempt channel's corresponding rank in the sequencer and sample time of the specified adc ...
Definition: at32f435_437_adc.c:633
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_ordinary_part_mode_enable
void adc_ordinary_part_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the partitioned mode on ordinary channel of the specified adc peripheral.
Definition: at32f435_437_adc.c:858
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_preempt_channel_length_set
void adc_preempt_channel_length_set(adc_type *adc_x, uint8_t adc_channel_lenght)
set preempt channel lenghth of the specified adc peripheral.
Definition: at32f435_437_adc.c:601
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_9
@ ADC_CHANNEL_9
Definition: at32f435_437_adc.h:196
ADC_CHANNEL_8
@ ADC_CHANNEL_8
Definition: at32f435_437_adc.h:195
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_7
@ ADC_CHANNEL_7
Definition: at32f435_437_adc.h:194
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_47_5
@ ADC_SAMPLETIME_47_5
Definition: at32f435_437_adc.h:217
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_PREEMPT_TRIG_EXINT15
@ ADC_PREEMPT_TRIG_EXINT15
Definition: at32f435_437_adc.h:291
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_EXINT11
@ ADC_ORDINARY_TRIG_EXINT11
Definition: at32f435_437_adc.h:243
ADC_PREEMPT_TRIG_EDGE_RISING
@ ADC_PREEMPT_TRIG_EDGE_RISING
Definition: at32f435_437_adc.h:314
ADC_ORDINARY_TRIG_EDGE_RISING
@ ADC_ORDINARY_TRIG_EDGE_RISING
Definition: at32f435_437_adc.h:266
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_PCCE_INT
#define ADC_PCCE_INT
Definition: at32f435_437_adc.h:55
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_EVENT
@ EXINT_LINE_EVENT
Definition: at32f435_437_exint.h:90
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_15
#define EXINT_LINE_15
Definition: at32f435_437_exint.h:67
EXINT_LINE_11
#define EXINT_LINE_11
Definition: at32f435_437_exint.h:63
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_MODE_INPUT
@ GPIO_MODE_INPUT
Definition: at32f435_437_gpio.h:82
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE15
@ SCFG_PINS_SOURCE15
Definition: at32f435_437_scfg.h:116
SCFG_PINS_SOURCE11
@ SCFG_PINS_SOURCE11
Definition: at32f435_437_scfg.h:112
SCFG_PORT_SOURCE_GPIOC
@ SCFG_PORT_SOURCE_GPIOC
Definition: at32f435_437_scfg.h:126
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c:119
exint_config
static void exint_config(void)
exint configuration.
Definition: project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c:77
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c:152
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/exint_trigger_partitioned/src/main.c:54
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • internal_temperature_sensor
  • inc
project/at_start_f437/examples/adc/internal_temperature_sensor/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • internal_temperature_sensor
  • inc
project/at_start_f437/examples/adc/internal_temperature_sensor/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • internal_temperature_sensor
  • inc
project/at_start_f437/examples/adc/internal_temperature_sensor/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • internal_temperature_sensor
  • src
Functions
project/at_start_f437/examples/adc/internal_temperature_sensor/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/internal_temperature_sensor/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • internal_temperature_sensor
  • src
project/at_start_f437/examples/adc/internal_temperature_sensor/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/internal_temperature_sensor/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • internal_temperature_sensor
  • src
Functions | Variables
project/at_start_f437/examples/adc/internal_temperature_sensor/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint32_t adc1_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/internal_temperature_sensor/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • internal_temperature_sensor
  • src
project/at_start_f437/examples/adc/internal_temperature_sensor/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
39extern __IO uint32_t adc1_overflow_flag;
40
46void NMI_Handler(void)
47{
48}
49
55void HardFault_Handler(void)
56{
57 /* go to infinite loop when hard fault exception occurs */
58 while(1)
59 {
60 }
61}
62
68void MemManage_Handler(void)
69{
70 /* go to infinite loop when memory manage exception occurs */
71 while(1)
72 {
73 }
74}
75
81void BusFault_Handler(void)
82{
83 /* go to infinite loop when bus fault exception occurs */
84 while(1)
85 {
86 }
87}
88
94void UsageFault_Handler(void)
95{
96 /* go to infinite loop when usage fault exception occurs */
97 while(1)
98 {
99 }
100}
101
107void SVC_Handler(void)
108{
109}
110
116void DebugMon_Handler(void)
117{
118}
119
125void PendSV_Handler(void)
126{
127}
128
134void SysTick_Handler(void)
135{
136}
137
143void ADC1_2_3_IRQHandler(void)
144{
145 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
146 {
147 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
148 adc1_overflow_flag++;
149 }
150}
151
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • internal_temperature_sensor
  • src
Macros | Functions | Variables
project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | ADC_VREF (3.3)
#define | ADC_TEMP_BASE (1.26)
#define | ADC_TEMP_SLOPE (-0.00423)

Functions

static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_ordinary_value = 0
__IO uint32_t | adc1_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c.

Macro Definition Documentation

◆ ADC_TEMP_BASE

#define ADC_TEMP_BASE (1.26)

Definition at line 31 of file project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c.

◆ ADC_TEMP_SLOPE

#define ADC_TEMP_SLOPE (-0.00423)

Definition at line 32 of file project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c.

◆ ADC_VREF

#define ADC_VREF (3.3)

Definition at line 30 of file project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

Definition at line 86 of file project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 53 of file project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • internal_temperature_sensor
  • src
project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
30#define ADC_VREF (3.3)
31#define ADC_TEMP_BASE (1.26)
32#define ADC_TEMP_SLOPE (-0.00423)
33
42__IO uint16_t adc1_ordinary_value = 0;
43__IO uint32_t adc1_overflow_flag = 0;
44
45static void dma_config(void);
46static void adc_config(void);
47
53static void dma_config(void)
54{
55 dma_init_type dma_init_struct;
56 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
57 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
58
59 dma_reset(DMA1_CHANNEL1);
60 dma_default_para_init(&dma_init_struct);
61 dma_init_struct.buffer_size = 1;
62 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
63 dma_init_struct.memory_base_addr = (uint32_t)&adc1_ordinary_value;
64 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
65 dma_init_struct.memory_inc_enable = FALSE;
66 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
67 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
68 dma_init_struct.peripheral_inc_enable = FALSE;
69 dma_init_struct.priority = DMA_PRIORITY_HIGH;
70 dma_init_struct.loop_mode_enable = TRUE;
71 dma_init(DMA1_CHANNEL1, &dma_init_struct);
72
73 dmamux_enable(DMA1, TRUE);
74 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
75
76 /* disable dma transfer complete interrupt */
77 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, FALSE);
78 dma_channel_enable(DMA1_CHANNEL1, TRUE);
79}
80
86static void adc_config(void)
87{
88 adc_common_config_type adc_common_struct;
89 adc_base_config_type adc_base_struct;
90 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
91 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
92
93 adc_common_default_para_init(&adc_common_struct);
94
95 /* config combine mode */
96 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
97
98 /* config division,adcclk is division by hclk */
99 adc_common_struct.div = ADC_HCLK_DIV_4;
100
101 /* config common dma mode,it's not useful in independent mode */
102 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
103
104 /* config common dma request repeat */
105 adc_common_struct.common_dma_request_repeat_state = FALSE;
106
107 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
108 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
109
110 /* config inner temperature sensor and vintrv */
111 adc_common_struct.tempervintrv_state = TRUE;
112
113 /* config voltage battery */
114 adc_common_struct.vbat_state = FALSE;
115 adc_common_config(&adc_common_struct);
116
117 adc_base_default_para_init(&adc_base_struct);
118
119 adc_base_struct.sequence_mode = FALSE;
120 adc_base_struct.repeat_mode = FALSE;
121 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
122 adc_base_struct.ordinary_channel_length = 1;
123 adc_base_config(ADC1, &adc_base_struct);
124 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
125
126 /* config ordinary channel */
127 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_16, 1, ADC_SAMPLETIME_640_5);
128
129 /* config ordinary trigger source and trigger edge */
130 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
131
132 /* config dma mode,it's not useful when common dma mode is use */
133 adc_dma_mode_enable(ADC1, TRUE);
134
135 /* config dma request repeat,it's not useful when common dma mode is use */
136 adc_dma_request_repeat_enable(ADC1, TRUE);
137
138 /* enable adc overflow interrupt */
139 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
140
141 /* adc enable */
142 adc_enable(ADC1, TRUE);
143 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
144
145 /* adc calibration */
146 adc_calibration_init(ADC1);
147 while(adc_calibration_init_status_get(ADC1));
148 adc_calibration_start(ADC1);
149 while(adc_calibration_status_get(ADC1));
150}
151
157int main(void)
158{
159 __IO uint32_t index = 0;
160 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
161
162 /* config the system clock */
163 system_clock_config();
164
165 /* init at start board */
166 at32_board_init();
167 at32_led_off(LED2);
168 at32_led_off(LED3);
169 at32_led_off(LED4);
170 uart_print_init(115200);
171 dma_config();
172 adc_config();
173 printf("internal_temperature_sensor \r\n");
174
175 while(1)
176 {
177 at32_led_toggle(LED2);
178 delay_sec(1);
179 /* adc1 software trigger start conversion */
180 adc_ordinary_software_trigger_enable(ADC1, TRUE);
181 while(dma_flag_get(DMA1_FDT1_FLAG) == RESET);
182 dma_flag_clear(DMA1_FDT1_FLAG);
183 printf("internal_temperature = %f deg C\r\n",(ADC_TEMP_BASE-(double)adc1_ordinary_value*ADC_VREF/4096)/ADC_TEMP_SLOPE+25);
184 if(adc1_overflow_flag != 0)
185 {
186 /* printf flag when error occur */
187 at32_led_on(LED3);
188 at32_led_on(LED4);
189 printf("error occur\r\n");
190 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
191 }
192 }
193}
194
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adc1_ordinary_value
__IO uint16_t adc1_ordinary_value
Definition: project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c:42
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c:43
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_16
@ ADC_CHANNEL_16
Definition: at32f435_437_adc.h:203
ADC_SAMPLETIME_640_5
@ ADC_SAMPLETIME_640_5
Definition: at32f435_437_adc.h:220
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
ADC_VREF
#define ADC_VREF
Definition: project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c:30
ADC_TEMP_SLOPE
#define ADC_TEMP_SLOPE
Definition: project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c:32
ADC_TEMP_BASE
#define ADC_TEMP_BASE
Definition: project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c:31
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c:53
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/internal_temperature_sensor/src/main.c:86
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • ordinary_preempt_oversampling
  • inc
project/at_start_f437/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • ordinary_preempt_oversampling
  • inc
project/at_start_f437/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • ordinary_preempt_oversampling
  • inc
project/at_start_f437/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • ordinary_preempt_oversampling
  • src
Functions
project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • ordinary_preempt_oversampling
  • src
project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • ordinary_preempt_oversampling
  • src
Functions | Variables
project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1_channel1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint16_t | adc1_preempt_valuetab [5][3]
__IO uint16_t | dma_trans_complete_flag
__IO uint16_t | preempt_conversion_count
__IO uint32_t | adc1_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • ordinary_preempt_oversampling
  • src
project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
39extern __IO uint16_t adc1_preempt_valuetab[5][3];
40extern __IO uint16_t dma_trans_complete_flag;
41extern __IO uint16_t preempt_conversion_count;
42extern __IO uint32_t adc1_overflow_flag;
43
49void NMI_Handler(void)
50{
51}
52
58void HardFault_Handler(void)
59{
60 /* go to infinite loop when hard fault exception occurs */
61 while(1)
62 {
63 }
64}
65
71void MemManage_Handler(void)
72{
73 /* go to infinite loop when memory manage exception occurs */
74 while(1)
75 {
76 }
77}
78
84void BusFault_Handler(void)
85{
86 /* go to infinite loop when bus fault exception occurs */
87 while(1)
88 {
89 }
90}
91
97void UsageFault_Handler(void)
98{
99 /* go to infinite loop when usage fault exception occurs */
100 while(1)
101 {
102 }
103}
104
110void SVC_Handler(void)
111{
112}
113
119void DebugMon_Handler(void)
120{
121}
122
128void PendSV_Handler(void)
129{
130}
131
137void SysTick_Handler(void)
138{
139}
140
146void DMA1_Channel1_IRQHandler(void)
147{
148 if(dma_flag_get(DMA1_FDT1_FLAG) != RESET)
149 {
150 dma_flag_clear(DMA1_FDT1_FLAG);
151 dma_trans_complete_flag = 1;
152 }
153}
154
160void ADC1_2_3_IRQHandler(void)
161{
162 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
163 {
164 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
165 adc1_overflow_flag++;
166 }
167 if(adc_flag_get(ADC1, ADC_PCCE_FLAG) != RESET)
168 {
169 adc_flag_clear(ADC1, ADC_PCCE_FLAG);
170 if(preempt_conversion_count < 5)
171 {
172 adc1_preempt_valuetab[preempt_conversion_count][0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1);
173 adc1_preempt_valuetab[preempt_conversion_count][1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2);
174 adc1_preempt_valuetab[preempt_conversion_count][2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3);
175 preempt_conversion_count++;
176 }
177 }
178}
179
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
dma_trans_complete_flag
__IO uint16_t dma_trans_complete_flag
Definition: project/at_start_f435/examples/adc/conversion_abort/src/main.c:39
adc1_preempt_valuetab
__IO uint16_t adc1_preempt_valuetab[5][3]
Definition: project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:38
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
preempt_conversion_count
__IO uint16_t preempt_conversion_count
Definition: project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/main.c:41
adc_preempt_conversion_data_get
uint16_t adc_preempt_conversion_data_get(adc_type *adc_x, adc_preempt_channel_type adc_preempt_channel)
return the conversion data for selection preempt channel of the specified adc peripheral.
Definition: at32f435_437_adc.c:1036
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_PREEMPT_CHANNEL_3
@ ADC_PREEMPT_CHANNEL_3
Definition: at32f435_437_adc.h:326
ADC_PREEMPT_CHANNEL_2
@ ADC_PREEMPT_CHANNEL_2
Definition: at32f435_437_adc.h:325
ADC_PREEMPT_CHANNEL_1
@ ADC_PREEMPT_CHANNEL_1
Definition: at32f435_437_adc.h:324
ADC_PCCE_FLAG
#define ADC_PCCE_FLAG
Definition: at32f435_437_adc.h:69
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • ordinary_preempt_oversampling
  • src
Functions | Variables
project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_ordinary_valuetab [5][3] = {0}
__IO uint16_t | adc1_preempt_valuetab [5][3] = {0}
__IO uint16_t | dma_trans_complete_flag = 0
__IO uint16_t | preempt_conversion_count = 0
__IO uint32_t | adc1_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< preempt channels conversion end interrupt

< adc ready to conversion flag

Definition at line 109 of file project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 76 of file project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

< gpio pins number 7

< gpio pins number 0

< gpio pins number 1

Definition at line 53 of file project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • ordinary_preempt_oversampling
  • src
project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adc1_ordinary_valuetab[5][3] = {0};
39__IO uint16_t adc1_preempt_valuetab[5][3] = {0};
40__IO uint16_t dma_trans_complete_flag = 0;
41__IO uint16_t preempt_conversion_count = 0;
42__IO uint32_t adc1_overflow_flag = 0;
43
44static void gpio_config(void);
45static void dma_config(void);
46static void adc_config(void);
47
53static void gpio_config(void)
54{
55 gpio_init_type gpio_initstructure;
56 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
57 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
58
59 gpio_default_para_init(&gpio_initstructure);
60
61 /* config adc pin as analog input mode */
62 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
63 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7;
64 gpio_init(GPIOA, &gpio_initstructure);
65
66 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
67 gpio_initstructure.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1;
68 gpio_init(GPIOB, &gpio_initstructure);
69}
70
76static void dma_config(void)
77{
78 dma_init_type dma_init_struct;
79 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
80 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
81
82 dma_reset(DMA1_CHANNEL1);
83 dma_default_para_init(&dma_init_struct);
84 dma_init_struct.buffer_size = 15;
85 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
86 dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
87 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
88 dma_init_struct.memory_inc_enable = TRUE;
89 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
90 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
91 dma_init_struct.peripheral_inc_enable = FALSE;
92 dma_init_struct.priority = DMA_PRIORITY_HIGH;
93 dma_init_struct.loop_mode_enable = FALSE;
94 dma_init(DMA1_CHANNEL1, &dma_init_struct);
95
96 dmamux_enable(DMA1, TRUE);
97 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
98
99 /* enable dma transfer complete interrupt */
100 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
101 dma_channel_enable(DMA1_CHANNEL1, TRUE);
102}
103
109static void adc_config(void)
110{
111 adc_common_config_type adc_common_struct;
112 adc_base_config_type adc_base_struct;
113 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
114 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
115
116 adc_common_default_para_init(&adc_common_struct);
117
118 /* config combine mode */
119 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
120
121 /* config division,adcclk is division by hclk */
122 adc_common_struct.div = ADC_HCLK_DIV_4;
123
124 /* config common dma mode,it's not useful in independent mode */
125 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
126
127 /* config common dma request repeat */
128 adc_common_struct.common_dma_request_repeat_state = FALSE;
129
130 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
131 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
132
133 /* config inner temperature sensor and vintrv */
134 adc_common_struct.tempervintrv_state = FALSE;
135
136 /* config voltage battery */
137 adc_common_struct.vbat_state = FALSE;
138 adc_common_config(&adc_common_struct);
139
140 adc_base_default_para_init(&adc_base_struct);
141
142 adc_base_struct.sequence_mode = TRUE;
143 adc_base_struct.repeat_mode = FALSE;
144 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
145 adc_base_struct.ordinary_channel_length = 3;
146 adc_base_config(ADC1, &adc_base_struct);
147 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
148
149 /* config ordinary channel */
150 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_6_5);
151 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_6_5);
152 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_6_5);
153
154 /* config ordinary trigger source and trigger edge */
155 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
156
157 /* config dma mode,it's not useful when common dma mode is use */
158 adc_dma_mode_enable(ADC1, TRUE);
159
160 /* config dma request repeat,it's not useful when common dma mode is use */
161 adc_dma_request_repeat_enable(ADC1, FALSE);
162
163 /* config preempt channel */
164 adc_preempt_channel_length_set(ADC1, 3);
165 adc_preempt_channel_set(ADC1, ADC_CHANNEL_7, 1, ADC_SAMPLETIME_6_5);
166 adc_preempt_channel_set(ADC1, ADC_CHANNEL_8, 2, ADC_SAMPLETIME_6_5);
167 adc_preempt_channel_set(ADC1, ADC_CHANNEL_9, 3, ADC_SAMPLETIME_6_5);
168
169 /* config preempt trigger source and trigger edge */
170 adc_preempt_conversion_trigger_set(ADC1, ADC_PREEMPT_TRIG_TMR1CH4, ADC_PREEMPT_TRIG_EDGE_NONE);
171
172 /* disable preempt group automatic conversion after ordinary group */
173 adc_preempt_auto_mode_enable(ADC1, FALSE);
174
175 /* enable adc overflow interrupt */
176 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
177
178 /* enable adc preempt channels conversion end interrupt */
179 adc_interrupt_enable(ADC1, ADC_PCCE_INT, TRUE);
180
181 /* set oversampling ratio and shift */
182 adc_oversample_ratio_shift_set(ADC1, ADC_OVERSAMPLE_RATIO_8, ADC_OVERSAMPLE_SHIFT_3);
183
184 /* disable ordinary oversampling trigger mode */
185 adc_ordinary_oversample_trig_enable(ADC1, FALSE);
186
187 /* set ordinary oversample restart mode */
188 adc_ordinary_oversample_restart_set(ADC1, ADC_OVERSAMPLE_CONTINUE);
189
190 /* enable ordinary oversampling */
191 adc_ordinary_oversample_enable(ADC1, TRUE);
192
193 /* enable preempt oversampling */
194 adc_preempt_oversample_enable(ADC1, TRUE);
195
196 /* adc enable */
197 adc_enable(ADC1, TRUE);
198 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
199
200 /* adc calibration */
201 adc_calibration_init(ADC1);
202 while(adc_calibration_init_status_get(ADC1));
203 adc_calibration_start(ADC1);
204 while(adc_calibration_status_get(ADC1));
205}
206
212int main(void)
213{
214 __IO uint32_t index = 0;
215 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
216
217 /* config the system clock */
218 system_clock_config();
219
220 /* init at start board */
221 at32_board_init();
222 at32_led_off(LED2);
223 at32_led_off(LED3);
224 at32_led_off(LED4);
225 uart_print_init(115200);
226 gpio_config();
227 dma_config();
228 adc_config();
229 printf("tmr_trigger_automatic_preempt \r\n");
230
231 /* adc1 software trigger start conversion */
232 for(index = 0; index < 5; index++)
233 {
234 adc_ordinary_software_trigger_enable(ADC1, TRUE);
235 adc_preempt_software_trigger_enable(ADC1, TRUE);
236 delay_sec(1);
237 }
238 if((dma_trans_complete_flag == 0) || (adc1_overflow_flag != 0))
239 {
240 /* printf flag when error occur */
241 at32_led_on(LED3);
242 at32_led_on(LED4);
243 printf("error occur\r\n");
244 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
245 printf("dma_trans_complete_flag = %d\r\n",dma_trans_complete_flag);
246 }
247 else
248 {
249 /* printf data when conversion end without error */
250 printf("conversion end without error\r\n");
251 for(index = 0; index < 5; index++)
252 {
253 printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][0]);
254 printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][1]);
255 printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][2]);
256 printf("adc1_preempt_valuetab[%d][0] = 0x%x\r\n", index, adc1_preempt_valuetab[index][0]);
257 printf("adc1_preempt_valuetab[%d][1] = 0x%x\r\n", index, adc1_preempt_valuetab[index][1]);
258 printf("adc1_preempt_valuetab[%d][2] = 0x%x\r\n", index, adc1_preempt_valuetab[index][2]);
259 printf("\r\n");
260 }
261 }
262 at32_led_on(LED2);
263 while(1)
264 {
265 }
266}
267
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
dma_trans_complete_flag
__IO uint16_t dma_trans_complete_flag
Definition: project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c:40
adc1_preempt_valuetab
__IO uint16_t adc1_preempt_valuetab[5][3]
Definition: project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c:39
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c:42
adc1_ordinary_valuetab
__IO uint16_t adc1_ordinary_valuetab[5][3]
Definition: project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c:38
preempt_conversion_count
__IO uint16_t preempt_conversion_count
Definition: project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c:41
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_preempt_auto_mode_enable
void adc_preempt_auto_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable automatic preempt group conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:886
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_ordinary_oversample_enable
void adc_ordinary_oversample_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the ordinary oversampling of the specified adc peripheral.
Definition: at32f435_437_adc.c:1120
adc_oversample_ratio_shift_set
void adc_oversample_ratio_shift_set(adc_type *adc_x, adc_oversample_ratio_type adc_oversample_ratio, adc_oversample_shift_type adc_oversample_shift)
config the oversampling ratio and shift of the specified adc peripheral.
Definition: at32f435_437_adc.c:1167
adc_preempt_oversample_enable
void adc_preempt_oversample_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the preempt oversampling of the specified adc peripheral.
Definition: at32f435_437_adc.c:1134
adc_preempt_conversion_trigger_set
void adc_preempt_conversion_trigger_set(adc_type *adc_x, adc_preempt_trig_select_type adc_preempt_trig, adc_preempt_trig_edge_type adc_preempt_trig_edge)
enable or disable the preempt channel's external trigger and set external trigger event of the specif...
Definition: at32f435_437_adc.c:781
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_ordinary_oversample_trig_enable
void adc_ordinary_oversample_trig_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the ordinary oversampling trigger mode of the specified adc peripheral.
Definition: at32f435_437_adc.c:1182
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_ordinary_oversample_restart_set
void adc_ordinary_oversample_restart_set(adc_type *adc_x, adc_ordinary_oversample_restart_type adc_ordinary_oversample_restart)
set ordinary oversample restart mode of the specified adc peripheral.
Definition: at32f435_437_adc.c:1198
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_preempt_channel_set
void adc_preempt_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
configure preempt channel's corresponding rank in the sequencer and sample time of the specified adc ...
Definition: at32f435_437_adc.c:633
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_preempt_channel_length_set
void adc_preempt_channel_length_set(adc_type *adc_x, uint8_t adc_channel_lenght)
set preempt channel lenghth of the specified adc peripheral.
Definition: at32f435_437_adc.c:601
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_preempt_software_trigger_enable
void adc_preempt_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable preempt software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:978
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_9
@ ADC_CHANNEL_9
Definition: at32f435_437_adc.h:196
ADC_CHANNEL_8
@ ADC_CHANNEL_8
Definition: at32f435_437_adc.h:195
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_7
@ ADC_CHANNEL_7
Definition: at32f435_437_adc.h:194
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_6_5
@ ADC_SAMPLETIME_6_5
Definition: at32f435_437_adc.h:214
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_OVERSAMPLE_SHIFT_3
@ ADC_OVERSAMPLE_SHIFT_3
Definition: at32f435_437_adc.h:367
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_PREEMPT_TRIG_TMR1CH4
@ ADC_PREEMPT_TRIG_TMR1CH4
Definition: at32f435_437_adc.h:276
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_PREEMPT_TRIG_EDGE_NONE
@ ADC_PREEMPT_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:313
ADC_OVERSAMPLE_RATIO_8
@ ADC_OVERSAMPLE_RATIO_8
Definition: at32f435_437_adc.h:351
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_OVERSAMPLE_CONTINUE
@ ADC_OVERSAMPLE_CONTINUE
Definition: at32f435_437_adc.h:380
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_PCCE_INT
#define ADC_PCCE_INT
Definition: at32f435_437_adc.h:55
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c:76
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c:109
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/ordinary_preempt_oversampling/src/main.c:53
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • resolution_6bit
  • inc
project/at_start_f437/examples/adc/resolution_6bit/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • resolution_6bit
  • inc
project/at_start_f437/examples/adc/resolution_6bit/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • resolution_6bit
  • inc
project/at_start_f437/examples/adc/resolution_6bit/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • resolution_6bit
  • src
Functions
project/at_start_f437/examples/adc/resolution_6bit/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/resolution_6bit/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • resolution_6bit
  • src
project/at_start_f437/examples/adc/resolution_6bit/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/resolution_6bit/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • resolution_6bit
  • src
Functions | Variables
project/at_start_f437/examples/adc/resolution_6bit/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1_channel1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint16_t | dma_trans_complete_flag
__IO uint32_t | adc1_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/resolution_6bit/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • resolution_6bit
  • src
project/at_start_f437/examples/adc/resolution_6bit/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
39extern __IO uint16_t dma_trans_complete_flag;
40extern __IO uint32_t adc1_overflow_flag;
41
47void NMI_Handler(void)
48{
49}
50
56void HardFault_Handler(void)
57{
58 /* go to infinite loop when hard fault exception occurs */
59 while(1)
60 {
61 }
62}
63
69void MemManage_Handler(void)
70{
71 /* go to infinite loop when memory manage exception occurs */
72 while(1)
73 {
74 }
75}
76
82void BusFault_Handler(void)
83{
84 /* go to infinite loop when bus fault exception occurs */
85 while(1)
86 {
87 }
88}
89
95void UsageFault_Handler(void)
96{
97 /* go to infinite loop when usage fault exception occurs */
98 while(1)
99 {
100 }
101}
102
108void SVC_Handler(void)
109{
110}
111
117void DebugMon_Handler(void)
118{
119}
120
126void PendSV_Handler(void)
127{
128}
129
135void SysTick_Handler(void)
136{
137}
138
144void DMA1_Channel1_IRQHandler(void)
145{
146 if(dma_flag_get(DMA1_FDT1_FLAG) != RESET)
147 {
148 dma_flag_clear(DMA1_FDT1_FLAG);
149 dma_trans_complete_flag = 1;
150 }
151}
152
158void ADC1_2_3_IRQHandler(void)
159{
160 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
161 {
162 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
163 adc1_overflow_flag++;
164 }
165}
166
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
dma_trans_complete_flag
__IO uint16_t dma_trans_complete_flag
Definition: project/at_start_f435/examples/adc/conversion_abort/src/main.c:39
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • resolution_6bit
  • src
Functions | Variables
project/at_start_f437/examples/adc/resolution_6bit/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_ordinary_valuetab [10][3] = {0}
__IO uint16_t | dma_trans_complete_flag = 0
__IO uint32_t | adc1_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/resolution_6bit/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

< adc ready to conversion flag

Definition at line 102 of file project/at_start_f437/examples/adc/resolution_6bit/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 69 of file project/at_start_f437/examples/adc/resolution_6bit/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

Definition at line 51 of file project/at_start_f437/examples/adc/resolution_6bit/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • resolution_6bit
  • src
project/at_start_f437/examples/adc/resolution_6bit/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adc1_ordinary_valuetab[10][3] = {0};
39__IO uint16_t dma_trans_complete_flag = 0;
40__IO uint32_t adc1_overflow_flag = 0;
41
42static void gpio_config(void);
43static void dma_config(void);
44static void adc_config(void);
45
51static void gpio_config(void)
52{
53 gpio_init_type gpio_initstructure;
54 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
55
56 gpio_default_para_init(&gpio_initstructure);
57
58 /* config adc pin as analog input mode */
59 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
60 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6;
61 gpio_init(GPIOA, &gpio_initstructure);
62}
63
69static void dma_config(void)
70{
71 dma_init_type dma_init_struct;
72 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
73 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
74
75 dma_reset(DMA1_CHANNEL1);
76 dma_default_para_init(&dma_init_struct);
77 dma_init_struct.buffer_size = 30;
78 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
79 dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
80 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
81 dma_init_struct.memory_inc_enable = TRUE;
82 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
83 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
84 dma_init_struct.peripheral_inc_enable = FALSE;
85 dma_init_struct.priority = DMA_PRIORITY_HIGH;
86 dma_init_struct.loop_mode_enable = FALSE;
87 dma_init(DMA1_CHANNEL1, &dma_init_struct);
88
89 dmamux_enable(DMA1, TRUE);
90 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
91
92 /* enable dma transfer complete interrupt */
93 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
94 dma_channel_enable(DMA1_CHANNEL1, TRUE);
95}
96
102static void adc_config(void)
103{
104 adc_common_config_type adc_common_struct;
105 adc_base_config_type adc_base_struct;
106 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
107 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
108
109 adc_common_default_para_init(&adc_common_struct);
110
111 /* config combine mode */
112 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
113
114 /* config division,adcclk is division by hclk */
115 adc_common_struct.div = ADC_HCLK_DIV_4;
116
117 /* config common dma mode,it's not useful in independent mode */
118 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
119
120 /* config common dma request repeat */
121 adc_common_struct.common_dma_request_repeat_state = FALSE;
122
123 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
124 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
125
126 /* config inner temperature sensor and vintrv */
127 adc_common_struct.tempervintrv_state = FALSE;
128
129 /* config voltage battery */
130 adc_common_struct.vbat_state = FALSE;
131 adc_common_config(&adc_common_struct);
132
133 adc_base_default_para_init(&adc_base_struct);
134
135 adc_base_struct.sequence_mode = TRUE;
136 adc_base_struct.repeat_mode = TRUE;
137 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
138 adc_base_struct.ordinary_channel_length = 3;
139 adc_base_config(ADC1, &adc_base_struct);
140 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
141
142 /* config ordinary channel */
143 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_47_5);
144 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_47_5);
145 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_47_5);
146
147 /* config ordinary trigger source and trigger edge */
148 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
149
150 /* config dma mode,it's not useful when common dma mode is use */
151 adc_dma_mode_enable(ADC1, TRUE);
152
153 /* config dma request repeat,it's not useful when common dma mode is use */
154 adc_dma_request_repeat_enable(ADC1, FALSE);
155
156 /* enable adc overflow interrupt */
157 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
158
159 /* adc enable */
160 adc_enable(ADC1, TRUE);
161 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
162
163 /* adc calibration */
164 adc_calibration_init(ADC1);
165 while(adc_calibration_init_status_get(ADC1));
166 adc_calibration_start(ADC1);
167 while(adc_calibration_status_get(ADC1));
168
169 /*set resolution to 6bit.this because calibration must perform at 12 bit resolution */
170 adc_resolution_set(ADC1,ADC_RESOLUTION_6B);
171 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
172}
173
179int main(void)
180{
181 __IO uint32_t index = 0;
182 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
183
184 /* config the system clock */
185 system_clock_config();
186
187 /* init at start board */
188 at32_board_init();
189 at32_led_off(LED2);
190 at32_led_off(LED3);
191 at32_led_off(LED4);
192 uart_print_init(115200);
193 gpio_config();
194 dma_config();
195 adc_config();
196 printf("resolution_6bit \r\n");
197 adc_ordinary_software_trigger_enable(ADC1, TRUE);
198 while(dma_trans_complete_flag == 0);
199 if(adc1_overflow_flag != 0)
200 {
201 /* printf flag when error occur */
202 at32_led_on(LED3);
203 at32_led_on(LED4);
204 printf("error occur\r\n");
205 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
206 }
207 else
208 {
209 /* printf data when conversion end without error */
210 printf("conversion end without error\r\n");
211 for(index = 0; index < 10; index++)
212 {
213 printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][0]);
214 printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][1]);
215 printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][2]);
216 printf("\r\n");
217 }
218 }
219 at32_led_on(LED2);
220 while(1)
221 {
222 }
223}
224
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
dma_trans_complete_flag
__IO uint16_t dma_trans_complete_flag
Definition: project/at_start_f437/examples/adc/resolution_6bit/src/main.c:39
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/resolution_6bit/src/main.c:40
adc1_ordinary_valuetab
__IO uint16_t adc1_ordinary_valuetab[10][3]
Definition: project/at_start_f437/examples/adc/resolution_6bit/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_47_5
@ ADC_SAMPLETIME_47_5
Definition: at32f435_437_adc.h:217
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_6B
@ ADC_RESOLUTION_6B
Definition: at32f435_437_adc.h:170
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/resolution_6bit/src/main.c:69
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/resolution_6bit/src/main.c:102
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/resolution_6bit/src/main.c:51
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • software_trigger_repeat
  • inc
project/at_start_f437/examples/adc/software_trigger_repeat/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • software_trigger_repeat
  • inc
project/at_start_f437/examples/adc/software_trigger_repeat/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • software_trigger_repeat
  • inc
project/at_start_f437/examples/adc/software_trigger_repeat/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • software_trigger_repeat
  • src
Functions
project/at_start_f437/examples/adc/software_trigger_repeat/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/software_trigger_repeat/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • software_trigger_repeat
  • src
project/at_start_f437/examples/adc/software_trigger_repeat/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/software_trigger_repeat/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • software_trigger_repeat
  • src
Functions | Variables
project/at_start_f437/examples/adc/software_trigger_repeat/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1_channel1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint16_t | dma_trans_complete_flag
__IO uint32_t | adc1_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/software_trigger_repeat/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • software_trigger_repeat
  • src
project/at_start_f437/examples/adc/software_trigger_repeat/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
39extern __IO uint16_t dma_trans_complete_flag;
40extern __IO uint32_t adc1_overflow_flag;
41
47void NMI_Handler(void)
48{
49}
50
56void HardFault_Handler(void)
57{
58 /* go to infinite loop when hard fault exception occurs */
59 while(1)
60 {
61 }
62}
63
69void MemManage_Handler(void)
70{
71 /* go to infinite loop when memory manage exception occurs */
72 while(1)
73 {
74 }
75}
76
82void BusFault_Handler(void)
83{
84 /* go to infinite loop when bus fault exception occurs */
85 while(1)
86 {
87 }
88}
89
95void UsageFault_Handler(void)
96{
97 /* go to infinite loop when usage fault exception occurs */
98 while(1)
99 {
100 }
101}
102
108void SVC_Handler(void)
109{
110}
111
117void DebugMon_Handler(void)
118{
119}
120
126void PendSV_Handler(void)
127{
128}
129
135void SysTick_Handler(void)
136{
137}
138
144void DMA1_Channel1_IRQHandler(void)
145{
146 if(dma_flag_get(DMA1_FDT1_FLAG) != RESET)
147 {
148 dma_flag_clear(DMA1_FDT1_FLAG);
149 dma_trans_complete_flag = 1;
150 }
151}
152
158void ADC1_2_3_IRQHandler(void)
159{
160 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
161 {
162 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
163 adc1_overflow_flag++;
164 }
165}
166
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
dma_trans_complete_flag
__IO uint16_t dma_trans_complete_flag
Definition: project/at_start_f435/examples/adc/conversion_abort/src/main.c:39
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • software_trigger_repeat
  • src
Functions | Variables
project/at_start_f437/examples/adc/software_trigger_repeat/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_ordinary_valuetab [10][3] = {0}
__IO uint16_t | dma_trans_complete_flag = 0
__IO uint32_t | adc1_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/software_trigger_repeat/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

Definition at line 102 of file project/at_start_f437/examples/adc/software_trigger_repeat/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 69 of file project/at_start_f437/examples/adc/software_trigger_repeat/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

Definition at line 51 of file project/at_start_f437/examples/adc/software_trigger_repeat/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • software_trigger_repeat
  • src
project/at_start_f437/examples/adc/software_trigger_repeat/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adc1_ordinary_valuetab[10][3] = {0};
39__IO uint16_t dma_trans_complete_flag = 0;
40__IO uint32_t adc1_overflow_flag = 0;
41
42static void gpio_config(void);
43static void dma_config(void);
44static void adc_config(void);
45
51static void gpio_config(void)
52{
53 gpio_init_type gpio_initstructure;
54 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
55
56 gpio_default_para_init(&gpio_initstructure);
57
58 /* config adc pin as analog input mode */
59 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
60 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6;
61 gpio_init(GPIOA, &gpio_initstructure);
62}
63
69static void dma_config(void)
70{
71 dma_init_type dma_init_struct;
72 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
73 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
74
75 dma_reset(DMA1_CHANNEL1);
76 dma_default_para_init(&dma_init_struct);
77 dma_init_struct.buffer_size = 30;
78 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
79 dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
80 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
81 dma_init_struct.memory_inc_enable = TRUE;
82 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
83 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
84 dma_init_struct.peripheral_inc_enable = FALSE;
85 dma_init_struct.priority = DMA_PRIORITY_HIGH;
86 dma_init_struct.loop_mode_enable = FALSE;
87 dma_init(DMA1_CHANNEL1, &dma_init_struct);
88
89 dmamux_enable(DMA1, TRUE);
90 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
91
92 /* enable dma transfer complete interrupt */
93 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
94 dma_channel_enable(DMA1_CHANNEL1, TRUE);
95}
96
102static void adc_config(void)
103{
104 adc_common_config_type adc_common_struct;
105 adc_base_config_type adc_base_struct;
106 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
107 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
108
109 adc_common_default_para_init(&adc_common_struct);
110
111 /* config combine mode */
112 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
113
114 /* config division,adcclk is division by hclk */
115 adc_common_struct.div = ADC_HCLK_DIV_4;
116
117 /* config common dma mode,it's not useful in independent mode */
118 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
119
120 /* config common dma request repeat */
121 adc_common_struct.common_dma_request_repeat_state = FALSE;
122
123 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
124 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
125
126 /* config inner temperature sensor and vintrv */
127 adc_common_struct.tempervintrv_state = FALSE;
128
129 /* config voltage battery */
130 adc_common_struct.vbat_state = FALSE;
131 adc_common_config(&adc_common_struct);
132
133 adc_base_default_para_init(&adc_base_struct);
134
135 adc_base_struct.sequence_mode = TRUE;
136 adc_base_struct.repeat_mode = TRUE;
137 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
138 adc_base_struct.ordinary_channel_length = 3;
139 adc_base_config(ADC1, &adc_base_struct);
140 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
141
142 /* config ordinary channel */
143 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_47_5);
144 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_47_5);
145 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_47_5);
146
147 /* config ordinary trigger source and trigger edge */
148 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
149
150 /* config dma mode,it's not useful when common dma mode is use */
151 adc_dma_mode_enable(ADC1, TRUE);
152
153 /* config dma request repeat,it's not useful when common dma mode is use */
154 adc_dma_request_repeat_enable(ADC1, FALSE);
155
156 /* enable adc overflow interrupt */
157 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
158
159 /* adc enable */
160 adc_enable(ADC1, TRUE);
161 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
162
163 /* adc calibration */
164 adc_calibration_init(ADC1);
165 while(adc_calibration_init_status_get(ADC1));
166 adc_calibration_start(ADC1);
167 while(adc_calibration_status_get(ADC1));
168}
169
175int main(void)
176{
177 __IO uint32_t index = 0;
178 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
179
180 /* config the system clock */
181 system_clock_config();
182
183 /* init at start board */
184 at32_board_init();
185 at32_led_off(LED2);
186 at32_led_off(LED3);
187 at32_led_off(LED4);
188 uart_print_init(115200);
189 gpio_config();
190 dma_config();
191 adc_config();
192 printf("software_trigger_repeat \r\n");
193 adc_ordinary_software_trigger_enable(ADC1, TRUE);
194 while(dma_trans_complete_flag == 0);
195 if(adc1_overflow_flag != 0)
196 {
197 /* printf flag when error occur */
198 at32_led_on(LED3);
199 at32_led_on(LED4);
200 printf("error occur\r\n");
201 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
202 }
203 else
204 {
205 /* printf data when conversion end without error */
206 printf("conversion end without error\r\n");
207 for(index = 0; index < 10; index++)
208 {
209 printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][0]);
210 printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][1]);
211 printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][2]);
212 printf("\r\n");
213 }
214 }
215 at32_led_on(LED2);
216 while(1)
217 {
218 }
219}
220
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
dma_trans_complete_flag
__IO uint16_t dma_trans_complete_flag
Definition: project/at_start_f437/examples/adc/software_trigger_repeat/src/main.c:39
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/software_trigger_repeat/src/main.c:40
adc1_ordinary_valuetab
__IO uint16_t adc1_ordinary_valuetab[10][3]
Definition: project/at_start_f437/examples/adc/software_trigger_repeat/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_47_5
@ ADC_SAMPLETIME_47_5
Definition: at32f435_437_adc.h:217
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/software_trigger_repeat/src/main.c:69
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/software_trigger_repeat/src/main.c:102
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/software_trigger_repeat/src/main.c:51
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • tmr_trigger_automatic_preempted
  • inc
project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • tmr_trigger_automatic_preempted
  • inc
project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • tmr_trigger_automatic_preempted
  • inc
project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • tmr_trigger_automatic_preempted
  • src
Functions
project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • tmr_trigger_automatic_preempted
  • src
project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • tmr_trigger_automatic_preempted
  • src
Functions | Variables
project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1_channel1 handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint16_t | adc1_ordinary_valuetab [5][3]
__IO uint16_t | adc1_preempt_valuetab [5][3]
__IO uint16_t | dma_trans_complete_flag
__IO uint16_t | preempt_conversion_count
__IO uint32_t | adc1_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • tmr_trigger_automatic_preempted
  • src
project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
39extern __IO uint16_t adc1_ordinary_valuetab[5][3];
40extern __IO uint16_t adc1_preempt_valuetab[5][3];
41extern __IO uint16_t dma_trans_complete_flag;
42extern __IO uint16_t preempt_conversion_count;
43extern __IO uint32_t adc1_overflow_flag;
44
50void NMI_Handler(void)
51{
52}
53
59void HardFault_Handler(void)
60{
61 /* go to infinite loop when hard fault exception occurs */
62 while(1)
63 {
64 }
65}
66
72void MemManage_Handler(void)
73{
74 /* go to infinite loop when memory manage exception occurs */
75 while(1)
76 {
77 }
78}
79
85void BusFault_Handler(void)
86{
87 /* go to infinite loop when bus fault exception occurs */
88 while(1)
89 {
90 }
91}
92
98void UsageFault_Handler(void)
99{
100 /* go to infinite loop when usage fault exception occurs */
101 while(1)
102 {
103 }
104}
105
111void SVC_Handler(void)
112{
113}
114
120void DebugMon_Handler(void)
121{
122}
123
129void PendSV_Handler(void)
130{
131}
132
138void SysTick_Handler(void)
139{
140}
141
147void DMA1_Channel1_IRQHandler(void)
148{
149 if(dma_flag_get(DMA1_FDT1_FLAG) != RESET)
150 {
151 dma_flag_clear(DMA1_FDT1_FLAG);
152 dma_trans_complete_flag = 1;
153 }
154}
155
161void ADC1_2_3_IRQHandler(void)
162{
163 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
164 {
165 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
166 adc1_overflow_flag++;
167 }
168 if(adc_flag_get(ADC1, ADC_PCCE_FLAG) != RESET)
169 {
170 adc_flag_clear(ADC1, ADC_PCCE_FLAG);
171 if(preempt_conversion_count < 5)
172 {
173 adc1_preempt_valuetab[preempt_conversion_count][0] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_1);
174 adc1_preempt_valuetab[preempt_conversion_count][1] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_2);
175 adc1_preempt_valuetab[preempt_conversion_count][2] = adc_preempt_conversion_data_get(ADC1, ADC_PREEMPT_CHANNEL_3);
176 preempt_conversion_count++;
177 }
178 }
179}
180
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
dma_trans_complete_flag
__IO uint16_t dma_trans_complete_flag
Definition: project/at_start_f435/examples/adc/conversion_abort/src/main.c:39
adc1_preempt_valuetab
__IO uint16_t adc1_preempt_valuetab[5][3]
Definition: project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c:38
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
adc1_ordinary_valuetab
__IO uint16_t adc1_ordinary_valuetab[5][3]
Definition: project/at_start_f435/examples/adc/conversion_abort/src/main.c:38
preempt_conversion_count
__IO uint16_t preempt_conversion_count
Definition: project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/main.c:41
adc_preempt_conversion_data_get
uint16_t adc_preempt_conversion_data_get(adc_type *adc_x, adc_preempt_channel_type adc_preempt_channel)
return the conversion data for selection preempt channel of the specified adc peripheral.
Definition: at32f435_437_adc.c:1036
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_PREEMPT_CHANNEL_3
@ ADC_PREEMPT_CHANNEL_3
Definition: at32f435_437_adc.h:326
ADC_PREEMPT_CHANNEL_2
@ ADC_PREEMPT_CHANNEL_2
Definition: at32f435_437_adc.h:325
ADC_PREEMPT_CHANNEL_1
@ ADC_PREEMPT_CHANNEL_1
Definition: at32f435_437_adc.h:324
ADC_PCCE_FLAG
#define ADC_PCCE_FLAG
Definition: at32f435_437_adc.h:69
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • tmr_trigger_automatic_preempted
  • src
Functions | Variables
project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | tmr1_config (void)
tmr1 configuration. More...
static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_ordinary_valuetab [5][3] = {0}
__IO uint16_t | adc1_preempt_valuetab [5][3] = {0}
__IO uint16_t | dma_trans_complete_flag = 0
__IO uint16_t | preempt_conversion_count = 0
__IO uint32_t | adc1_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< preempt channels conversion end interrupt

< adc ready to conversion flag

Definition at line 152 of file project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 77 of file project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

< gpio pins number 7

< gpio pins number 0

< gpio pins number 1

Definition at line 54 of file project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c.

◆ tmr1_config()

static void tmr1_config ( void )
static

tmr1 configuration.

Parameters
none
Return values
none

< gpio pins number 8

Definition at line 110 of file project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • tmr_trigger_automatic_preempted
  • src
project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adc1_ordinary_valuetab[5][3] = {0};
39__IO uint16_t adc1_preempt_valuetab[5][3] = {0};
40__IO uint16_t dma_trans_complete_flag = 0;
41__IO uint16_t preempt_conversion_count = 0;
42__IO uint32_t adc1_overflow_flag = 0;
43
44static void gpio_config(void);
45static void tmr1_config(void);
46static void dma_config(void);
47static void adc_config(void);
48
54static void gpio_config(void)
55{
56 gpio_init_type gpio_initstructure;
57 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
58 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
59
60 gpio_default_para_init(&gpio_initstructure);
61
62 /* config adc pin as analog input mode */
63 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
64 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7;
65 gpio_init(GPIOA, &gpio_initstructure);
66
67 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
68 gpio_initstructure.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1;
69 gpio_init(GPIOB, &gpio_initstructure);
70}
71
77static void dma_config(void)
78{
79 dma_init_type dma_init_struct;
80 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
81 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
82
83 dma_reset(DMA1_CHANNEL1);
84 dma_default_para_init(&dma_init_struct);
85 dma_init_struct.buffer_size = 15;
86 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
87 dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
88 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
89 dma_init_struct.memory_inc_enable = TRUE;
90 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
91 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
92 dma_init_struct.peripheral_inc_enable = FALSE;
93 dma_init_struct.priority = DMA_PRIORITY_HIGH;
94 dma_init_struct.loop_mode_enable = FALSE;
95 dma_init(DMA1_CHANNEL1, &dma_init_struct);
96
97 dmamux_enable(DMA1, TRUE);
98 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
99
100 /* enable dma transfer complete interrupt */
101 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
102 dma_channel_enable(DMA1_CHANNEL1, TRUE);
103}
104
110static void tmr1_config(void)
111{
112 gpio_init_type gpio_initstructure;
113 tmr_output_config_type tmr_oc_init_structure;
114 crm_clocks_freq_type crm_clocks_freq_struct = {0};
115 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
116
117 gpio_default_para_init(&gpio_initstructure);
118 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
119 gpio_initstructure.gpio_pins = GPIO_PINS_8;
120 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
121 gpio_initstructure.gpio_pull = GPIO_PULL_NONE;
122 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
123 gpio_init(GPIOA, &gpio_initstructure);
124 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_1);
125
126 /* get system clock */
127 crm_clocks_freq_get(&crm_clocks_freq_struct);
128
129 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
130
131 /* (systemclock/(systemclock/10000))/1000 = 10Hz(100ms) */
132 tmr_base_init(TMR1, 999, (crm_clocks_freq_struct.sclk_freq/10000 - 1));
133 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
134 tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
135
136 tmr_output_default_para_init(&tmr_oc_init_structure);
137 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
138 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;
139 tmr_oc_init_structure.oc_output_state = TRUE;
140 tmr_oc_init_structure.oc_idle_state = FALSE;
141 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
142 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 500);
143 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1, TRUE);
144 tmr_output_enable(TMR1, TRUE);
145}
146
152static void adc_config(void)
153{
154 adc_common_config_type adc_common_struct;
155 adc_base_config_type adc_base_struct;
156 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
157 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
158
159 adc_common_default_para_init(&adc_common_struct);
160
161 /* config combine mode */
162 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
163
164 /* config division,adcclk is division by hclk */
165 adc_common_struct.div = ADC_HCLK_DIV_4;
166
167 /* config common dma mode,it's not useful in independent mode */
168 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
169
170 /* config common dma request repeat */
171 adc_common_struct.common_dma_request_repeat_state = FALSE;
172
173 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
174 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
175
176 /* config inner temperature sensor and vintrv */
177 adc_common_struct.tempervintrv_state = FALSE;
178
179 /* config voltage battery */
180 adc_common_struct.vbat_state = FALSE;
181 adc_common_config(&adc_common_struct);
182
183 adc_base_default_para_init(&adc_base_struct);
184
185 adc_base_struct.sequence_mode = TRUE;
186 adc_base_struct.repeat_mode = FALSE;
187 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
188 adc_base_struct.ordinary_channel_length = 3;
189 adc_base_config(ADC1, &adc_base_struct);
190 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
191
192 /* config ordinary channel */
193 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_47_5);
194 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_47_5);
195 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_47_5);
196
197 /* config ordinary trigger source and trigger edge */
198 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_RISING);
199
200 /* config dma mode,it's not useful when common dma mode is use */
201 adc_dma_mode_enable(ADC1, TRUE);
202
203 /* config dma request repeat,it's not useful when common dma mode is use */
204 adc_dma_request_repeat_enable(ADC1, FALSE);
205
206 /* config preempt channel */
207 adc_preempt_channel_length_set(ADC1, 3);
208 adc_preempt_channel_set(ADC1, ADC_CHANNEL_7, 1, ADC_SAMPLETIME_47_5);
209 adc_preempt_channel_set(ADC1, ADC_CHANNEL_8, 2, ADC_SAMPLETIME_47_5);
210 adc_preempt_channel_set(ADC1, ADC_CHANNEL_9, 3, ADC_SAMPLETIME_47_5);
211
212 /* config preempt trigger source and trigger edge */
213 adc_preempt_conversion_trigger_set(ADC1, ADC_PREEMPT_TRIG_TMR1CH4, ADC_PREEMPT_TRIG_EDGE_NONE);
214
215 /* preempt group automatic conversion after ordinary group */
216 adc_preempt_auto_mode_enable(ADC1, TRUE);
217
218 /* enable adc overflow interrupt */
219 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
220
221 /* enable adc preempt channels conversion end interrupt */
222 adc_interrupt_enable(ADC1, ADC_PCCE_INT, TRUE);
223
224 /* adc enable */
225 adc_enable(ADC1, TRUE);
226 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
227
228 /* adc calibration */
229 adc_calibration_init(ADC1);
230 while(adc_calibration_init_status_get(ADC1));
231 adc_calibration_start(ADC1);
232 while(adc_calibration_status_get(ADC1));
233}
234
240int main(void)
241{
242 __IO uint32_t index = 0;
243 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
244
245 /* config the system clock */
246 system_clock_config();
247
248 /* init at start board */
249 at32_board_init();
250 at32_led_off(LED2);
251 at32_led_off(LED3);
252 at32_led_off(LED4);
253 uart_print_init(115200);
254 gpio_config();
255 tmr1_config();
256 dma_config();
257 adc_config();
258 printf("tmr_trigger_automatic_preempt \r\n");
259 tmr_counter_enable(TMR1, TRUE);
260 while(preempt_conversion_count < 5);
261 while(dma_trans_complete_flag == 0);
262 tmr_counter_enable(TMR1, FALSE);
263 if(adc1_overflow_flag != 0)
264 {
265 /* printf flag when error occur */
266 at32_led_on(LED3);
267 at32_led_on(LED4);
268 printf("error occur\r\n");
269 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
270 }
271 else
272 {
273 /* printf data when conversion end without error */
274 printf("conversion end without error\r\n");
275 for(index = 0; index < 5; index++)
276 {
277 printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][0]);
278 printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][1]);
279 printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n", index, adc1_ordinary_valuetab[index][2]);
280 printf("adc1_preempt_valuetab[%d][0] = 0x%x\r\n", index, adc1_preempt_valuetab[index][0]);
281 printf("adc1_preempt_valuetab[%d][1] = 0x%x\r\n", index, adc1_preempt_valuetab[index][1]);
282 printf("adc1_preempt_valuetab[%d][2] = 0x%x\r\n", index, adc1_preempt_valuetab[index][2]);
283 printf("\r\n");
284 }
285 }
286 at32_led_on(LED2);
287 while(1)
288 {
289 }
290}
291
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
dma_trans_complete_flag
__IO uint16_t dma_trans_complete_flag
Definition: project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c:40
adc1_preempt_valuetab
__IO uint16_t adc1_preempt_valuetab[5][3]
Definition: project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c:39
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c:42
adc1_ordinary_valuetab
__IO uint16_t adc1_ordinary_valuetab[5][3]
Definition: project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c:38
preempt_conversion_count
__IO uint16_t preempt_conversion_count
Definition: project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c:41
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_preempt_auto_mode_enable
void adc_preempt_auto_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable automatic preempt group conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:886
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_preempt_conversion_trigger_set
void adc_preempt_conversion_trigger_set(adc_type *adc_x, adc_preempt_trig_select_type adc_preempt_trig, adc_preempt_trig_edge_type adc_preempt_trig_edge)
enable or disable the preempt channel's external trigger and set external trigger event of the specif...
Definition: at32f435_437_adc.c:781
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_preempt_channel_set
void adc_preempt_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
configure preempt channel's corresponding rank in the sequencer and sample time of the specified adc ...
Definition: at32f435_437_adc.c:633
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_preempt_channel_length_set
void adc_preempt_channel_length_set(adc_type *adc_x, uint8_t adc_channel_lenght)
set preempt channel lenghth of the specified adc peripheral.
Definition: at32f435_437_adc.c:601
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_9
@ ADC_CHANNEL_9
Definition: at32f435_437_adc.h:196
ADC_CHANNEL_8
@ ADC_CHANNEL_8
Definition: at32f435_437_adc.h:195
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_7
@ ADC_CHANNEL_7
Definition: at32f435_437_adc.h:194
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_47_5
@ ADC_SAMPLETIME_47_5
Definition: at32f435_437_adc.h:217
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_PREEMPT_TRIG_TMR1CH4
@ ADC_PREEMPT_TRIG_TMR1CH4
Definition: at32f435_437_adc.h:276
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_PREEMPT_TRIG_EDGE_NONE
@ ADC_PREEMPT_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:313
ADC_ORDINARY_TRIG_EDGE_RISING
@ ADC_ORDINARY_TRIG_EDGE_RISING
Definition: at32f435_437_adc.h:266
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_PCCE_INT
#define ADC_PCCE_INT
Definition: at32f435_437_adc.h:55
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_output_enable
void tmr_output_enable(tmr_type *tmr_x, confirm_state new_state)
tmr output enable(oen),this function is important for advtm output enable
Definition: at32f435_437_tmr.c:1499
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_enable
void tmr_channel_enable(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, confirm_state new_state)
tmr channel enable
Definition: at32f435_437_tmr.c:940
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_LOW
@ TMR_OUTPUT_ACTIVE_LOW
Definition: at32f435_437_tmr.h:199
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c:77
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c:152
tmr1_config
static void tmr1_config(void)
tmr1 configuration.
Definition: project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c:110
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/tmr_trigger_automatic_preempted/src/main.c:54
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::sclk_freq
uint32_t sclk_freq
Definition: at32f435_437_crm.h:789
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • use_polling_get_conversion_data
  • inc
project/at_start_f437/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • use_polling_get_conversion_data
  • inc
project/at_start_f437/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • use_polling_get_conversion_data
  • inc
project/at_start_f437/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • use_polling_get_conversion_data
  • src
Functions
project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • use_polling_get_conversion_data
  • src
project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • use_polling_get_conversion_data
  • src
Functions | Variables
project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint32_t adc1_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • use_polling_get_conversion_data
  • src
project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
39extern __IO uint32_t adc1_overflow_flag;
40
46void NMI_Handler(void)
47{
48}
49
55void HardFault_Handler(void)
56{
57 /* go to infinite loop when hard fault exception occurs */
58 while(1)
59 {
60 }
61}
62
68void MemManage_Handler(void)
69{
70 /* go to infinite loop when memory manage exception occurs */
71 while(1)
72 {
73 }
74}
75
81void BusFault_Handler(void)
82{
83 /* go to infinite loop when bus fault exception occurs */
84 while(1)
85 {
86 }
87}
88
94void UsageFault_Handler(void)
95{
96 /* go to infinite loop when usage fault exception occurs */
97 while(1)
98 {
99 }
100}
101
107void SVC_Handler(void)
108{
109}
110
116void DebugMon_Handler(void)
117{
118}
119
125void PendSV_Handler(void)
126{
127}
128
134void SysTick_Handler(void)
135{
136}
137
143void ADC1_2_3_IRQHandler(void)
144{
145 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
146 {
147 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
148 adc1_overflow_flag++;
149 }
150}
151
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • use_polling_get_conversion_data
  • src
Functions | Variables
project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_ordinary_valuetab [3] = {0}
__IO uint16_t * | p_adc1_ordinary = adc1_ordinary_valuetab
__IO uint32_t | adc1_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

Definition at line 68 of file project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

Definition at line 50 of file project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • use_polling_get_conversion_data
  • src
project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adc1_ordinary_valuetab[3] = {0};
39__IO uint16_t *p_adc1_ordinary = adc1_ordinary_valuetab;
40__IO uint32_t adc1_overflow_flag = 0;
41
42static void gpio_config(void);
43static void adc_config(void);
44
50static void gpio_config(void)
51{
52 gpio_init_type gpio_initstructure;
53 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
54
55 gpio_default_para_init(&gpio_initstructure);
56
57 /* config adc pin as analog input mode */
58 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
59 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6;
60 gpio_init(GPIOA, &gpio_initstructure);
61}
62
68static void adc_config(void)
69{
70 adc_common_config_type adc_common_struct;
71 adc_base_config_type adc_base_struct;
72 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
73 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
74
75 adc_common_default_para_init(&adc_common_struct);
76
77 /* config combine mode */
78 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
79
80 /* config division,adcclk is division by hclk */
81 adc_common_struct.div = ADC_HCLK_DIV_4;
82
83 /* config common dma mode,it's not useful in independent mode */
84 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
85
86 /* config common dma request repeat */
87 adc_common_struct.common_dma_request_repeat_state = FALSE;
88
89 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
90 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
91
92 /* config inner temperature sensor and vintrv */
93 adc_common_struct.tempervintrv_state = FALSE;
94
95 /* config voltage battery */
96 adc_common_struct.vbat_state = FALSE;
97 adc_common_config(&adc_common_struct);
98
99 adc_base_default_para_init(&adc_base_struct);
100
101 adc_base_struct.sequence_mode = TRUE;
102 adc_base_struct.repeat_mode = FALSE;
103 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
104 adc_base_struct.ordinary_channel_length = 3;
105 adc_base_config(ADC1, &adc_base_struct);
106 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
107
108 /* config ordinary channel */
109 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_640_5);
110 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_640_5);
111 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_640_5);
112
113 /* config ordinary trigger source and trigger edge */
114 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
115
116 /* config dma mode,it's not useful when common dma mode is use */
117 adc_dma_mode_enable(ADC1, FALSE);
118
119 /* config dma request repeat,it's not useful when common dma mode is use */
120 adc_dma_request_repeat_enable(ADC1, FALSE);
121
122 /* each ordinary channel conversion set occe flag */
123 adc_occe_each_conversion_enable(ADC1, TRUE);
124
125 /* enable adc overflow interrupt */
126 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
127
128 /* adc enable */
129 adc_enable(ADC1, TRUE);
130 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
131
132 /* adc calibration */
133 adc_calibration_init(ADC1);
134 while(adc_calibration_init_status_get(ADC1));
135 adc_calibration_start(ADC1);
136 while(adc_calibration_status_get(ADC1));
137}
138
144int main(void)
145{
146 __IO uint32_t index = 0;
147 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
148
149 /* config the system clock */
150 system_clock_config();
151
152 /* init at start board */
153 at32_board_init();
154 at32_led_off(LED2);
155 at32_led_off(LED3);
156 at32_led_off(LED4);
157 p_adc1_ordinary = adc1_ordinary_valuetab;
158 uart_print_init(115200);
159 gpio_config();
160 adc_config();
161 printf("use_polling_get_conversion_data \r\n");
162 adc_ordinary_software_trigger_enable(ADC1, TRUE);
163 while(1)
164 {
165 while(adc_flag_get(ADC1, ADC_OCCE_FLAG) == RESET);
166 *(p_adc1_ordinary++) = adc_ordinary_conversion_data_get(ADC1);
167 index++;
168 if(adc1_overflow_flag != 0)
169 {
170 /* printf flag when error occur */
171 at32_led_on(LED3);
172 at32_led_on(LED4);
173 printf("error occur\r\n");
174 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
175 while(1);
176 }
177 if(index%3 == 0)
178 {
179 printf("conversion end without error\r\n");
180 printf("adc1_ordinary_valuetab[0] = 0x%x\r\n", adc1_ordinary_valuetab[0]);
181 printf("adc1_ordinary_valuetab[1] = 0x%x\r\n", adc1_ordinary_valuetab[1]);
182 printf("adc1_ordinary_valuetab[2] = 0x%x\r\n", adc1_ordinary_valuetab[2]);
183 printf("\r\n");
184 delay_sec(1);
185 p_adc1_ordinary = adc1_ordinary_valuetab;
186 adc_ordinary_software_trigger_enable(ADC1, TRUE);
187 }
188 }
189}
190
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
p_adc1_ordinary
__IO uint16_t * p_adc1_ordinary
Definition: project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/main.c:39
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/main.c:40
adc1_ordinary_valuetab
__IO uint16_t adc1_ordinary_valuetab[3]
Definition: project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_ordinary_conversion_data_get
uint16_t adc_ordinary_conversion_data_get(adc_type *adc_x)
return the last conversion data for ordinary channel of the specified adc peripheral.
Definition: at32f435_437_adc.c:1009
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_occe_each_conversion_enable
void adc_occe_each_conversion_enable(adc_type *adc_x, confirm_state new_state)
enable or disable each ordinary channel conversion set occe flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:931
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_640_5
@ ADC_SAMPLETIME_640_5
Definition: at32f435_437_adc.h:220
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_OCCE_FLAG
#define ADC_OCCE_FLAG
Definition: at32f435_437_adc.h:68
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/main.c:68
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/use_polling_get_conversion_data/src/main.c:50
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • vbat_monitor
  • inc
project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • vbat_monitor
  • inc
project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • vbat_monitor
  • inc
project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • vbat_monitor
  • src
Functions
project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • vbat_monitor
  • src
project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • vbat_monitor
  • src
Functions | Variables
project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint32_t adc1_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • vbat_monitor
  • src
project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
39extern __IO uint32_t adc1_overflow_flag;
40
46void NMI_Handler(void)
47{
48}
49
55void HardFault_Handler(void)
56{
57 /* go to infinite loop when hard fault exception occurs */
58 while(1)
59 {
60 }
61}
62
68void MemManage_Handler(void)
69{
70 /* go to infinite loop when memory manage exception occurs */
71 while(1)
72 {
73 }
74}
75
81void BusFault_Handler(void)
82{
83 /* go to infinite loop when bus fault exception occurs */
84 while(1)
85 {
86 }
87}
88
94void UsageFault_Handler(void)
95{
96 /* go to infinite loop when usage fault exception occurs */
97 while(1)
98 {
99 }
100}
101
107void SVC_Handler(void)
108{
109}
110
116void DebugMon_Handler(void)
117{
118}
119
125void PendSV_Handler(void)
126{
127}
128
134void SysTick_Handler(void)
135{
136}
137
143void ADC1_2_3_IRQHandler(void)
144{
145 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
146 {
147 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
148 adc1_overflow_flag++;
149 }
150}
151
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • vbat_monitor
  • src
Functions | Variables
project/at_start_f437/examples/adc/vbat_monitor/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_ordinary_value = 0
__IO uint32_t | adc1_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/vbat_monitor/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< adc ready to conversion flag

Definition at line 82 of file project/at_start_f437/examples/adc/vbat_monitor/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 49 of file project/at_start_f437/examples/adc/vbat_monitor/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • vbat_monitor
  • src
project/at_start_f437/examples/adc/vbat_monitor/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adc1_ordinary_value = 0;
39__IO uint32_t adc1_overflow_flag = 0;
40
41static void dma_config(void);
42static void adc_config(void);
43
49static void dma_config(void)
50{
51 dma_init_type dma_init_struct;
52 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
53 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
54
55 dma_reset(DMA1_CHANNEL1);
56 dma_default_para_init(&dma_init_struct);
57 dma_init_struct.buffer_size = 1;
58 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
59 dma_init_struct.memory_base_addr = (uint32_t)&adc1_ordinary_value;
60 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
61 dma_init_struct.memory_inc_enable = FALSE;
62 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
63 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
64 dma_init_struct.peripheral_inc_enable = FALSE;
65 dma_init_struct.priority = DMA_PRIORITY_HIGH;
66 dma_init_struct.loop_mode_enable = TRUE;
67 dma_init(DMA1_CHANNEL1, &dma_init_struct);
68
69 dmamux_enable(DMA1, TRUE);
70 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
71
72 /* disable dma transfer complete interrupt */
73 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, FALSE);
74 dma_channel_enable(DMA1_CHANNEL1, TRUE);
75}
76
82static void adc_config(void)
83{
84 adc_common_config_type adc_common_struct;
85 adc_base_config_type adc_base_struct;
86 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
87 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
88
89 adc_common_default_para_init(&adc_common_struct);
90
91 /* config combine mode */
92 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
93
94 /* config division,adcclk is division by hclk */
95 adc_common_struct.div = ADC_HCLK_DIV_4;
96
97 /* config common dma mode,it's not useful in independent mode */
98 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
99
100 /* config common dma request repeat */
101 adc_common_struct.common_dma_request_repeat_state = FALSE;
102
103 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
104 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
105
106 /* config inner temperature sensor and vintrv */
107 adc_common_struct.tempervintrv_state = FALSE;
108
109 /* config voltage battery */
110 adc_common_struct.vbat_state = TRUE;
111 adc_common_config(&adc_common_struct);
112
113 adc_base_default_para_init(&adc_base_struct);
114
115 adc_base_struct.sequence_mode = FALSE;
116 adc_base_struct.repeat_mode = FALSE;
117 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
118 adc_base_struct.ordinary_channel_length = 1;
119 adc_base_config(ADC1, &adc_base_struct);
120 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
121
122 /* config ordinary channel */
123 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_18, 1, ADC_SAMPLETIME_47_5);
124
125 /* config ordinary trigger source and trigger edge */
126 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
127
128 /* config dma mode,it's not useful when common dma mode is use */
129 adc_dma_mode_enable(ADC1, TRUE);
130
131 /* config dma request repeat,it's not useful when common dma mode is use */
132 adc_dma_request_repeat_enable(ADC1, TRUE);
133
134 /* enable adc overflow interrupt */
135 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
136
137 /* adc enable */
138 adc_enable(ADC1, TRUE);
139 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
140
141 /* adc calibration */
142 adc_calibration_init(ADC1);
143 while(adc_calibration_init_status_get(ADC1));
144 adc_calibration_start(ADC1);
145 while(adc_calibration_status_get(ADC1));
146}
147
153int main(void)
154{
155 __IO uint32_t index = 0;
156 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
157
158 /* config the system clock */
159 system_clock_config();
160
161 /* init at start board */
162 at32_board_init();
163 at32_led_off(LED2);
164 at32_led_off(LED3);
165 at32_led_off(LED4);
166 uart_print_init(115200);
167 dma_config();
168 adc_config();
169 printf("adc1_vbat_monitor \r\n");
170
171 while(1)
172 {
173 at32_led_toggle(LED2);
174
175 /* adc1 software trigger start conversion */
176 adc_ordinary_software_trigger_enable(ADC1, TRUE);
177
178 while(dma_flag_get(DMA1_FDT1_FLAG) == RESET);
179
180 /* adc voltage battery disable */
181 adc_voltage_battery_enable(FALSE);
182
183 dma_flag_clear(DMA1_FDT1_FLAG);
184 printf("vbat_value = %f V\r\n", ((double)3.3 * 4 * adc1_ordinary_value) / 4095);
185 if(adc1_overflow_flag != 0)
186 {
187 /* printf flag when error occur */
188 at32_led_on(LED3);
189 at32_led_on(LED4);
190 printf("error occur\r\n");
191 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
192 }
193 delay_sec(1);
194
195 /* adc voltage battery enable */
196 adc_voltage_battery_enable(TRUE);
197 }
198}
199
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adc1_ordinary_value
__IO uint16_t adc1_ordinary_value
Definition: project/at_start_f437/examples/adc/vbat_monitor/src/main.c:38
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/vbat_monitor/src/main.c:39
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_voltage_battery_enable
void adc_voltage_battery_enable(confirm_state new_state)
enable or disable the adc voltage battery.
Definition: at32f435_437_adc.c:246
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_18
@ ADC_CHANNEL_18
Definition: at32f435_437_adc.h:205
ADC_SAMPLETIME_47_5
@ ADC_SAMPLETIME_47_5
Definition: at32f435_437_adc.h:217
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/vbat_monitor/src/main.c:49
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/vbat_monitor/src/main.c:82
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • adc
  • voltage_monitoring
  • inc
project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • adc
  • voltage_monitoring
  • inc
project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • adc
  • voltage_monitoring
  • inc
project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • adc
  • voltage_monitoring
  • src
Functions
project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • adc
  • voltage_monitoring
  • src
project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • adc
  • voltage_monitoring
  • src
Functions | Variables
project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | ADC1_2_3_IRQHandler (void)
this function handles adc1_2_3 handler. More...

Variables

__IO uint32_t | vmor_flag_index
__IO uint32_t | adc1_overflow_flag

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • adc
  • voltage_monitoring
  • src
project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
39extern __IO uint32_t vmor_flag_index;
40extern __IO uint32_t adc1_overflow_flag;
41
47void NMI_Handler(void)
48{
49}
50
56void HardFault_Handler(void)
57{
58 /* go to infinite loop when hard fault exception occurs */
59 while(1)
60 {
61 }
62}
63
69void MemManage_Handler(void)
70{
71 /* go to infinite loop when memory manage exception occurs */
72 while(1)
73 {
74 }
75}
76
82void BusFault_Handler(void)
83{
84 /* go to infinite loop when bus fault exception occurs */
85 while(1)
86 {
87 }
88}
89
95void UsageFault_Handler(void)
96{
97 /* go to infinite loop when usage fault exception occurs */
98 while(1)
99 {
100 }
101}
102
108void SVC_Handler(void)
109{
110}
111
117void DebugMon_Handler(void)
118{
119}
120
126void PendSV_Handler(void)
127{
128}
129
135void SysTick_Handler(void)
136{
137}
138
144void ADC1_2_3_IRQHandler(void)
145{
146 if(adc_flag_get(ADC1, ADC_OCCO_FLAG) != RESET)
147 {
148 adc_flag_clear(ADC1, ADC_OCCO_FLAG);
149 adc1_overflow_flag++;
150 }
151 if(adc_flag_get(ADC1, ADC_VMOR_FLAG) != RESET)
152 {
153 adc_flag_clear(ADC1, ADC_VMOR_FLAG);
154 vmor_flag_index++;
155 }
156}
157
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ADC1_2_3_IRQHandler
void ADC1_2_3_IRQHandler(void)
this function handles adc1_2_3 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:159
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c:40
vmor_flag_index
__IO uint32_t vmor_flag_index
Definition: project/at_start_f435/examples/adc/voltage_monitoring/src/main.c:39
adc_flag_clear
void adc_flag_clear(adc_type *adc_x, uint32_t adc_flag)
clear flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1106
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
ADC_OCCO_FLAG
#define ADC_OCCO_FLAG
Definition: at32f435_437_adc.h:72
ADC_VMOR_FLAG
#define ADC_VMOR_FLAG
Definition: at32f435_437_adc.h:67
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • adc
  • voltage_monitoring
  • src
Functions | Variables
project/at_start_f437/examples/adc/voltage_monitoring/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | dma_config (void)
dma configuration. More...
static void | adc_config (void)
adc configuration. More...
int | main (void)
main function. More...

Variables

__IO uint16_t | adc1_ordinary_valuetab [3] = {0}
__IO uint32_t | vmor_flag_index = 0
__IO uint32_t | adc1_overflow_flag = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/adc/voltage_monitoring/src/main.c.

Function Documentation

◆ adc_config()

static void adc_config ( void )
static

adc configuration.

Parameters
none
Return values
none

< ordinary channel conversion overflow interrupt

< voltage monitoring out of range interrupt

< adc ready to conversion flag

Definition at line 102 of file project/at_start_f437/examples/adc/voltage_monitoring/src/main.c.

◆ dma_config()

static void dma_config ( void )
static

dma configuration.

Parameters
none
Return values
none

< dma full data transfer interrupt

Definition at line 69 of file project/at_start_f437/examples/adc/voltage_monitoring/src/main.c.

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 5

< gpio pins number 6

Definition at line 51 of file project/at_start_f437/examples/adc/voltage_monitoring/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • adc
  • voltage_monitoring
  • src
project/at_start_f437/examples/adc/voltage_monitoring/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint16_t adc1_ordinary_valuetab[3] = {0};
39__IO uint32_t vmor_flag_index = 0;
40__IO uint32_t adc1_overflow_flag = 0;
41
42static void gpio_config(void);
43static void dma_config(void);
44static void adc_config(void);
45
51static void gpio_config(void)
52{
53 gpio_init_type gpio_initstructure;
54 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
55
56 gpio_default_para_init(&gpio_initstructure);
57
58 /* config adc pin as analog input mode */
59 gpio_initstructure.gpio_mode = GPIO_MODE_ANALOG;
60 gpio_initstructure.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6;
61 gpio_init(GPIOA, &gpio_initstructure);
62}
63
69static void dma_config(void)
70{
71 dma_init_type dma_init_struct;
72 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
73 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
74
75 dma_reset(DMA1_CHANNEL1);
76 dma_default_para_init(&dma_init_struct);
77 dma_init_struct.buffer_size = 3;
78 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
79 dma_init_struct.memory_base_addr = (uint32_t)adc1_ordinary_valuetab;
80 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
81 dma_init_struct.memory_inc_enable = TRUE;
82 dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
83 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
84 dma_init_struct.peripheral_inc_enable = FALSE;
85 dma_init_struct.priority = DMA_PRIORITY_HIGH;
86 dma_init_struct.loop_mode_enable = TRUE;
87 dma_init(DMA1_CHANNEL1, &dma_init_struct);
88
89 dmamux_enable(DMA1, TRUE);
90 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_ADC1);
91
92 /* enable dma transfer complete interrupt */
93 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, FALSE);
94 dma_channel_enable(DMA1_CHANNEL1, TRUE);
95}
96
102static void adc_config(void)
103{
104 adc_common_config_type adc_common_struct;
105 adc_base_config_type adc_base_struct;
106 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
107 nvic_irq_enable(ADC1_2_3_IRQn, 0, 0);
108
109 adc_common_default_para_init(&adc_common_struct);
110
111 /* config combine mode */
112 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
113
114 /* config division,adcclk is division by hclk */
115 adc_common_struct.div = ADC_HCLK_DIV_4;
116
117 /* config common dma mode,it's not useful in independent mode */
118 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
119
120 /* config common dma request repeat */
121 adc_common_struct.common_dma_request_repeat_state = FALSE;
122
123 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
124 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
125
126 /* config inner temperature sensor and vintrv */
127 adc_common_struct.tempervintrv_state = FALSE;
128
129 /* config voltage battery */
130 adc_common_struct.vbat_state = FALSE;
131 adc_common_config(&adc_common_struct);
132
133 adc_base_default_para_init(&adc_base_struct);
134
135 adc_base_struct.sequence_mode = TRUE;
136 adc_base_struct.repeat_mode = FALSE;
137 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
138 adc_base_struct.ordinary_channel_length = 3;
139 adc_base_config(ADC1, &adc_base_struct);
140 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
141
142 /* config ordinary channel */
143 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_47_5);
144 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_5, 2, ADC_SAMPLETIME_47_5);
145 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_6, 3, ADC_SAMPLETIME_47_5);
146
147 /* config ordinary trigger source and trigger edge */
148 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
149
150 /* config dma mode,it's not useful when common dma mode is use */
151 adc_dma_mode_enable(ADC1, TRUE);
152
153 /* config dma request repeat,it's not useful when common dma mode is use */
154 adc_dma_request_repeat_enable(ADC1, TRUE);
155
156 /* config voltage_monitoring */
157 adc_voltage_monitor_threshold_value_set(ADC1, 0x100, 0x000);
158 adc_voltage_monitor_single_channel_select(ADC1, ADC_CHANNEL_5);
159 adc_voltage_monitor_enable(ADC1, ADC_VMONITOR_SINGLE_ORDINARY);
160
161 /* enable adc overflow interrupt */
162 adc_interrupt_enable(ADC1, ADC_OCCO_INT, TRUE);
163
164 /* enable voltage monitoring out of range interrupt */
165 adc_interrupt_enable(ADC1, ADC_VMOR_INT, TRUE);
166
167 /* adc enable */
168 adc_enable(ADC1, TRUE);
169 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
170
171 /* adc calibration */
172 adc_calibration_init(ADC1);
173 while(adc_calibration_init_status_get(ADC1));
174 adc_calibration_start(ADC1);
175 while(adc_calibration_status_get(ADC1));
176}
177
183int main(void)
184{
185 __IO uint32_t index = 0;
186 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
187
188 /* config the system clock */
189 system_clock_config();
190
191 /* init at start board */
192 at32_board_init();
193 at32_led_off(LED2);
194 at32_led_off(LED3);
195 at32_led_off(LED4);
196 uart_print_init(115200);
197 gpio_config();
198 dma_config();
199 adc_config();
200 printf("voltage_monitoring \r\n");
201 while(1)
202 {
203 at32_led_toggle(LED2);
204 delay_sec(1);
205 if((adc1_overflow_flag != 0) || (vmor_flag_index != 0))
206 {
207 /* printf flag when error occur */
208 at32_led_on(LED3);
209 at32_led_on(LED4);
210 printf("error occur\r\n");
211 printf("vmor_flag_index = %d\r\n",vmor_flag_index);
212 printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag);
213 printf("out of range:adc1_channel_5 value is = 0x%x!\r\n", adc1_ordinary_valuetab[1]);
214 }
215 adc_ordinary_software_trigger_enable(ADC1, TRUE);
216 }
217}
218
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
adc1_overflow_flag
__IO uint32_t adc1_overflow_flag
Definition: project/at_start_f437/examples/adc/voltage_monitoring/src/main.c:40
adc1_ordinary_valuetab
__IO uint16_t adc1_ordinary_valuetab[3]
Definition: project/at_start_f437/examples/adc/voltage_monitoring/src/main.c:38
vmor_flag_index
__IO uint32_t vmor_flag_index
Definition: project/at_start_f437/examples/adc/voltage_monitoring/src/main.c:39
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_voltage_monitor_enable
void adc_voltage_monitor_enable(adc_type *adc_x, adc_voltage_monitoring_type adc_voltage_monitoring)
enable or disable the voltage monitoring on single/all ordinary or preempt channels of the specified ...
Definition: at32f435_437_adc.c:399
adc_voltage_monitor_single_channel_select
void adc_voltage_monitor_single_channel_select(adc_type *adc_x, adc_channel_select_type adc_channel)
select the voltage monitoring's channel of the specified adc peripheral.
Definition: at32f435_437_adc.c:440
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_interrupt_enable
void adc_interrupt_enable(adc_type *adc_x, uint32_t adc_int, confirm_state new_state)
enable or disable the specified adc interrupts.
Definition: at32f435_437_adc.c:294
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_dma_request_repeat_enable
void adc_dma_request_repeat_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma request repeat.
Definition: at32f435_437_adc.c:274
adc_voltage_monitor_threshold_value_set
void adc_voltage_monitor_threshold_value_set(adc_type *adc_x, uint16_t adc_high_threshold, uint16_t adc_low_threshold)
set voltage monitoring's high and low thresholds value of the specified adc peripheral.
Definition: at32f435_437_adc.c:420
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_dma_mode_enable
void adc_dma_mode_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the adc dma transfer.
Definition: at32f435_437_adc.c:260
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_VMONITOR_SINGLE_ORDINARY
@ ADC_VMONITOR_SINGLE_ORDINARY
Definition: at32f435_437_adc.h:335
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_CHANNEL_6
@ ADC_CHANNEL_6
Definition: at32f435_437_adc.h:193
ADC_CHANNEL_5
@ ADC_CHANNEL_5
Definition: at32f435_437_adc.h:192
ADC_SAMPLETIME_47_5
@ ADC_SAMPLETIME_47_5
Definition: at32f435_437_adc.h:217
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_4
@ ADC_HCLK_DIV_4
Definition: at32f435_437_adc.h:90
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC_OCCO_INT
#define ADC_OCCO_INT
Definition: at32f435_437_adc.h:56
ADC_VMOR_INT
#define ADC_VMOR_INT
Definition: at32f435_437_adc.h:54
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_ADC1
@ DMAMUX_DMAREQ_ID_ADC1
Definition: at32f435_437_dma.h:197
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
ADC1_2_3_IRQn
@ ADC1_2_3_IRQn
Definition: at32f435_437.h:166
dma_config
static void dma_config(void)
dma configuration.
Definition: project/at_start_f437/examples/adc/voltage_monitoring/src/main.c:69
adc_config
static void adc_config(void)
adc configuration.
Definition: project/at_start_f437/examples/adc/voltage_monitoring/src/main.c:102
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/adc/voltage_monitoring/src/main.c:51
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • can
  • communication_mode
  • inc
project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • can
  • communication_mode
  • inc
project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • can
  • communication_mode
  • inc
project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • can
  • communication_mode
  • src
Functions
project/at_start_f437/examples/can/communication_mode/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/can/communication_mode/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • can
  • communication_mode
  • src
project/at_start_f437/examples/can/communication_mode/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/can/communication_mode/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • can
  • communication_mode
  • src
Functions
project/at_start_f437/examples/can/communication_mode/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/can/communication_mode/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • can
  • communication_mode
  • src
project/at_start_f437/examples/can/communication_mode/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • can
  • communication_mode
  • src
Functions
project/at_start_f437/examples/can/communication_mode/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | can_gpio_config (void)
can gpio config More...
static void | can_configuration (void)
can configiguration. More...
static void | can_transmit_data (void)
can transmit data More...
void | CAN1_RX0_IRQHandler (void)
can1 interrupt function rx0 More...
void | CAN1_SE_IRQHandler (void)
can1 interrupt function se More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/can/communication_mode/src/main.c.

Function Documentation

◆ can_configuration()

static void can_configuration ( void )
static

can configiguration.

Parameters
none
Return values
none

< receive fifo 0 message interrupt

< error type record interrupt

< error occur interrupt

Definition at line 68 of file project/at_start_f437/examples/can/communication_mode/src/main.c.

◆ can_gpio_config()

static void can_gpio_config ( void )
static

can gpio config

Parameters
none
Return values
none

< gpio pins number 9

< gpio pins number 8

Definition at line 43 of file project/at_start_f437/examples/can/communication_mode/src/main.c.

◆ can_transmit_data()

static void can_transmit_data ( void )
static

can transmit data

Parameters
none
Return values
none

Definition at line 121 of file project/at_start_f437/examples/can/communication_mode/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • can
  • communication_mode
  • src
project/at_start_f437/examples/can/communication_mode/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43static void can_gpio_config(void)
44{
45 gpio_init_type gpio_init_struct;
46 /* enable the gpio clock */
47 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
48
49 gpio_default_para_init(&gpio_init_struct);
50
51 /* configure the can tx, rx pin */
52 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
53 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
54 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
55 gpio_init_struct.gpio_pins = GPIO_PINS_9 | GPIO_PINS_8;
56 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
57 gpio_init(GPIOB, &gpio_init_struct);
58
59 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE9, GPIO_MUX_9);
60 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_9);
61}
62
68static void can_configuration(void)
69{
70 can_base_type can_base_struct;
71 can_baudrate_type can_baudrate_struct;
72 can_filter_init_type can_filter_init_struct;
73 /* enable the can clock */
74 crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
75
76 /* can base init */
77 can_default_para_init(&can_base_struct);
78 can_base_struct.mode_selection = CAN_MODE_COMMUNICATE;
79 can_base_struct.ttc_enable = FALSE;
80 can_base_struct.aebo_enable = TRUE;
81 can_base_struct.aed_enable = TRUE;
82 can_base_struct.prsf_enable = FALSE;
83 can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED;
84 can_base_struct.mmssr_selection = CAN_SENDING_BY_ID;
85 can_base_init(CAN1, &can_base_struct);
86
87 /* can baudrate, set boudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size)) */
88 can_baudrate_struct.baudrate_div = 12;
89 can_baudrate_struct.rsaw_size = CAN_RSAW_3TQ;
90 can_baudrate_struct.bts1_size = CAN_BTS1_8TQ;
91 can_baudrate_struct.bts2_size = CAN_BTS2_3TQ;
92 can_baudrate_set(CAN1, &can_baudrate_struct);
93
94 /* can filter init */
95 can_filter_init_struct.filter_activate_enable = TRUE;
96 can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK;
97 can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
98 can_filter_init_struct.filter_number = 0;
99 can_filter_init_struct.filter_bit = CAN_FILTER_32BIT;
100 can_filter_init_struct.filter_id_high = 0;
101 can_filter_init_struct.filter_id_low = 0;
102 can_filter_init_struct.filter_mask_high = 0;
103 can_filter_init_struct.filter_mask_low = 0;
104 can_filter_init(CAN1, &can_filter_init_struct);
105
106 /* can interrupt config */
107 nvic_irq_enable(CAN1_SE_IRQn, 0x00, 0x00);
108 nvic_irq_enable(CAN1_RX0_IRQn, 0x00, 0x00);
109 can_interrupt_enable(CAN1, CAN_RF0MIEN_INT, TRUE);
110
111 /* error interrupt enable */
112 can_interrupt_enable(CAN1, CAN_ETRIEN_INT, TRUE);
113 can_interrupt_enable(CAN1, CAN_EOIEN_INT, TRUE);
114}
115
121static void can_transmit_data(void)
122{
123 uint8_t transmit_mailbox;
124 can_tx_message_type tx_message_struct;
125 tx_message_struct.standard_id = 0x400;
126 tx_message_struct.extended_id = 0;
127 tx_message_struct.id_type = CAN_ID_STANDARD;
128 tx_message_struct.frame_type = CAN_TFT_DATA;
129 tx_message_struct.dlc = 8;
130 tx_message_struct.data[0] = 0x11;
131 tx_message_struct.data[1] = 0x22;
132 tx_message_struct.data[2] = 0x33;
133 tx_message_struct.data[3] = 0x44;
134 tx_message_struct.data[4] = 0x55;
135 tx_message_struct.data[5] = 0x66;
136 tx_message_struct.data[6] = 0x77;
137 tx_message_struct.data[7] = 0x88;
138 transmit_mailbox = can_message_transmit(CAN1, &tx_message_struct);
139 while(can_transmit_status_get(CAN1, (can_tx_mailbox_num_type)transmit_mailbox) != CAN_TX_STATUS_SUCCESSFUL);
140}
141
147void CAN1_RX0_IRQHandler(void)
148{
149 can_rx_message_type rx_message_struct;
150 if(can_flag_get(CAN1,CAN_RF0MN_FLAG) != RESET)
151 {
152 can_message_receive(CAN1, CAN_RX_FIFO0, &rx_message_struct);
153 if(rx_message_struct.standard_id == 0x400)
154 at32_led_toggle(LED2);
155 else
156 at32_led_toggle(LED3);
157 }
158}
159
165void CAN1_SE_IRQHandler(void)
166{
167 __IO uint32_t err_index = 0;
168 if(can_flag_get(CAN1,CAN_ETR_FLAG) != RESET)
169 {
170 err_index = CAN1->ests & 0x70;
171 can_flag_clear(CAN1, CAN_ETR_FLAG);
172 /* error type is stuff error */
173 if(err_index == 0x00000010)
174 {
175 /* when stuff error occur: in order to ensure communication normally,
176 user must restart can or send a frame of highest priority message here */
177 }
178 }
179}
180
186int main(void)
187{
188 system_clock_config();
189 at32_board_init();
190 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
191 can_gpio_config();
192 can_configuration();
193 while(1)
194 {
195 can_transmit_data();
196
197 at32_led_toggle(LED4);
198
199 delay_sec(1);
200 }
201}
202
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
CAN1_SE_IRQHandler
void CAN1_SE_IRQHandler(void)
can1 interrupt function se
Definition: project/at_start_f435/examples/can/communication_mode/src/main.c:165
CAN1_RX0_IRQHandler
void CAN1_RX0_IRQHandler(void)
can1 interrupt function rx0
Definition: project/at_start_f435/examples/can/communication_mode/src/main.c:147
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
can_base_init
error_status can_base_init(can_type *can_x, can_base_type *can_base_struct)
initialize the can peripheral according to the specified parameters in the can_init_struct.
Definition: at32f435_437_can.c:194
can_transmit_status_get
can_transmit_status_type can_transmit_status_get(can_type *can_x, can_tx_mailbox_num_type transmit_mailbox)
check the transmission state of the specified can peripheral.
Definition: at32f435_437_can.c:514
can_message_transmit
uint8_t can_message_transmit(can_type *can_x, can_tx_message_type *tx_message_struct)
fill the transmission message and transmit of the specified can peripheral.
Definition: at32f435_437_can.c:440
can_message_receive
void can_message_receive(can_type *can_x, can_rx_fifo_num_type fifo_number, can_rx_message_type *rx_message_struct)
receive message of the specified can peripheral.
Definition: at32f435_437_can.c:619
can_interrupt_enable
void can_interrupt_enable(can_type *can_x, uint32_t can_int, confirm_state new_state)
enable or disable the interrupt of the specified can peripheral.
Definition: at32f435_437_can.c:924
can_flag_get
flag_status can_flag_get(can_type *can_x, uint32_t can_flag)
get flag of the specified can peripheral.
Definition: at32f435_437_can.c:964
can_flag_clear
void can_flag_clear(can_type *can_x, uint32_t can_flag)
clear flag of the specified can peripheral.
Definition: at32f435_437_can.c:1087
can_baudrate_set
error_status can_baudrate_set(can_type *can_x, can_baudrate_type *can_baudrate_struct)
set the baudrate of the can peripheral
Definition: at32f435_437_can.c:99
can_filter_init
void can_filter_init(can_type *can_x, can_filter_init_type *can_filter_init_struct)
initialize the can peripheral according to the specified parameters in the can_filter_init_struct.
Definition: at32f435_437_can.c:304
can_default_para_init
void can_default_para_init(can_base_type *can_base_struct)
fill each can_init_struct member with its default value.
Definition: at32f435_437_can.c:157
can_tx_mailbox_num_type
can_tx_mailbox_num_type
can tx mailboxes
Definition: at32f435_437_can.h:252
CAN_FILTER_FIFO0
@ CAN_FILTER_FIFO0
Definition: at32f435_437_can.h:138
CAN_TX_STATUS_SUCCESSFUL
@ CAN_TX_STATUS_SUCCESSFUL
Definition: at32f435_437_can.h:273
CAN_DISCARDING_FIRST_RECEIVED
@ CAN_DISCARDING_FIRST_RECEIVED
Definition: at32f435_437_can.h:301
CAN_BTS2_3TQ
@ CAN_BTS2_3TQ
Definition: at32f435_437_can.h:222
CAN_TFT_DATA
@ CAN_TFT_DATA
Definition: at32f435_437_can.h:244
CAN_BTS1_8TQ
@ CAN_BTS1_8TQ
Definition: at32f435_437_can.h:204
CAN_FILTER_MODE_ID_MASK
@ CAN_FILTER_MODE_ID_MASK
Definition: at32f435_437_can.h:147
CAN_SENDING_BY_ID
@ CAN_SENDING_BY_ID
Definition: at32f435_437_can.h:310
CAN_FILTER_32BIT
@ CAN_FILTER_32BIT
Definition: at32f435_437_can.h:157
CAN_RX_FIFO0
@ CAN_RX_FIFO0
Definition: at32f435_437_can.h:263
CAN_ID_STANDARD
@ CAN_ID_STANDARD
Definition: at32f435_437_can.h:235
CAN_MODE_COMMUNICATE
@ CAN_MODE_COMMUNICATE
Definition: at32f435_437_can.h:165
CAN_RSAW_3TQ
@ CAN_RSAW_3TQ
Definition: at32f435_437_can.h:188
CAN_RF0MN_FLAG
#define CAN_RF0MN_FLAG
Definition: at32f435_437_can.h:72
CAN_ETR_FLAG
#define CAN_ETR_FLAG
Definition: at32f435_437_can.h:67
CAN_RF0MIEN_INT
#define CAN_RF0MIEN_INT
Definition: at32f435_437_can.h:92
CAN_EOIEN_INT
#define CAN_EOIEN_INT
Definition: at32f435_437_can.h:102
CAN_ETRIEN_INT
#define CAN_ETRIEN_INT
Definition: at32f435_437_can.h:101
CAN1
#define CAN1
Definition: at32f435_437_can.h:994
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_CAN1_PERIPH_CLOCK
@ CRM_CAN1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:147
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_9
@ GPIO_MUX_9
Definition: at32f435_437_gpio.h:165
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
CAN1_RX0_IRQn
@ CAN1_RX0_IRQn
Definition: at32f435_437.h:168
CAN1_SE_IRQn
@ CAN1_SE_IRQn
Definition: at32f435_437.h:170
can_transmit_data
static void can_transmit_data(void)
can transmit data
Definition: project/at_start_f437/examples/can/communication_mode/src/main.c:121
can_gpio_config
static void can_gpio_config(void)
can gpio config
Definition: project/at_start_f437/examples/can/communication_mode/src/main.c:43
can_configuration
static void can_configuration(void)
can configiguration.
Definition: project/at_start_f437/examples/can/communication_mode/src/main.c:68
can_base_type
can init structure definition
Definition: at32f435_437_can.h:333
can_base_type::prsf_enable
confirm_state prsf_enable
Definition: at32f435_437_can.h:342
can_base_type::mdrsel_selection
can_msg_discarding_rule_type mdrsel_selection
Definition: at32f435_437_can.h:344
can_base_type::aed_enable
confirm_state aed_enable
Definition: at32f435_437_can.h:340
can_base_type::mmssr_selection
can_msg_sending_rule_type mmssr_selection
Definition: at32f435_437_can.h:346
can_base_type::ttc_enable
confirm_state ttc_enable
Definition: at32f435_437_can.h:336
can_base_type::mode_selection
can_mode_type mode_selection
Definition: at32f435_437_can.h:334
can_base_type::aebo_enable
confirm_state aebo_enable
Definition: at32f435_437_can.h:338
can_baudrate_type
can baudrate structure definition
Definition: at32f435_437_can.h:354
can_baudrate_type::baudrate_div
uint16_t baudrate_div
Definition: at32f435_437_can.h:355
can_baudrate_type::rsaw_size
can_rsaw_type rsaw_size
Definition: at32f435_437_can.h:357
can_baudrate_type::bts2_size
can_bts2_type bts2_size
Definition: at32f435_437_can.h:361
can_baudrate_type::bts1_size
can_bts1_type bts1_size
Definition: at32f435_437_can.h:359
can_filter_init_type
can filter init structure definition
Definition: at32f435_437_can.h:369
can_filter_init_type::filter_mask_low
uint16_t filter_mask_low
Definition: at32f435_437_can.h:389
can_filter_init_type::filter_number
uint8_t filter_number
Definition: at32f435_437_can.h:376
can_filter_init_type::filter_fifo
can_filter_fifo_type filter_fifo
Definition: at32f435_437_can.h:374
can_filter_init_type::filter_bit
can_filter_bit_width_type filter_bit
Definition: at32f435_437_can.h:378
can_filter_init_type::filter_mode
can_filter_mode_type filter_mode
Definition: at32f435_437_can.h:372
can_filter_init_type::filter_activate_enable
confirm_state filter_activate_enable
Definition: at32f435_437_can.h:370
can_filter_init_type::filter_mask_high
uint16_t filter_mask_high
Definition: at32f435_437_can.h:386
can_filter_init_type::filter_id_high
uint16_t filter_id_high
Definition: at32f435_437_can.h:380
can_filter_init_type::filter_id_low
uint16_t filter_id_low
Definition: at32f435_437_can.h:383
can_rx_message_type
can rx message structure definition
Definition: at32f435_437_can.h:419
can_rx_message_type::standard_id
uint32_t standard_id
Definition: at32f435_437_can.h:420
can_tx_message_type
can tx message structure definition
Definition: at32f435_437_can.h:397
can_tx_message_type::extended_id
uint32_t extended_id
Definition: at32f435_437_can.h:401
can_tx_message_type::frame_type
can_trans_frame_type frame_type
Definition: at32f435_437_can.h:406
can_tx_message_type::data
uint8_t data[8]
Definition: at32f435_437_can.h:411
can_tx_message_type::dlc
uint8_t dlc
Definition: at32f435_437_can.h:408
can_tx_message_type::id_type
can_identifier_type id_type
Definition: at32f435_437_can.h:404
can_tx_message_type::standard_id
uint32_t standard_id
Definition: at32f435_437_can.h:398
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • can
  • filter
  • inc
project/at_start_f437/examples/can/filter/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • can
  • filter
  • inc
project/at_start_f437/examples/can/filter/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • can
  • filter
  • inc
project/at_start_f437/examples/can/filter/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • can
  • filter
  • src
Functions
project/at_start_f437/examples/can/filter/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/can/filter/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • can
  • filter
  • src
project/at_start_f437/examples/can/filter/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/can/filter/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • can
  • filter
  • src
Functions
project/at_start_f437/examples/can/filter/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/can/filter/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • can
  • filter
  • src
project/at_start_f437/examples/can/filter/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • can
  • filter
  • src
Macros | Functions | Variables
project/at_start_f437/examples/can/filter/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | FILTER_EXT_ID1 ((uint32_t)0x18F5F100)
#define | FILTER_EXT_ID2 ((uint32_t)0x18F5F200)
#define | FILTER_EXT_ID3 ((uint32_t)0x18F5F300)
#define | FILTER_STD_ID1 ((uint16_t)0x04F6)
#define | FILTER_STD_ID2 ((uint16_t)0x04F7)
#define | FILTER_STD_ID3 ((uint16_t)0x04F8)

Functions

static void | can_gpio_config (void)
can gpio config More...
static void | can_configuration (void)
can configiguration. More...
static void | can_transmit_data (void)
can transmit data More...
void | CAN1_RX0_IRQHandler (void)
can1 interrupt function rx0 More...
void | CAN1_SE_IRQHandler (void)
can1 interrupt function se More...
int | main (void)
main function. More...

Variables

uint8_t test_result = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/can/filter/src/main.c.

Function Documentation

◆ can_configuration()

static void can_configuration ( void )
static

can configiguration.

Parameters
none
Return values
none

< receive fifo 0 message interrupt

< error type record interrupt

< error occur interrupt

Definition at line 79 of file project/at_start_f437/examples/can/filter/src/main.c.

◆ can_gpio_config()

static void can_gpio_config ( void )
static

can gpio config

Parameters
none
Return values
none

< gpio pins number 9

< gpio pins number 8

Definition at line 54 of file project/at_start_f437/examples/can/filter/src/main.c.

◆ can_transmit_data()

static void can_transmit_data ( void )
static

can transmit data

Parameters
none
Return values
none

Definition at line 144 of file project/at_start_f437/examples/can/filter/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • can
  • filter
  • src
project/at_start_f437/examples/can/filter/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38/* extended identifier */
39#define FILTER_EXT_ID1 ((uint32_t)0x18F5F100)
40#define FILTER_EXT_ID2 ((uint32_t)0x18F5F200)
41#define FILTER_EXT_ID3 ((uint32_t)0x18F5F300)
42
43/* standard identifier */
44#define FILTER_STD_ID1 ((uint16_t)0x04F6)
45#define FILTER_STD_ID2 ((uint16_t)0x04F7)
46#define FILTER_STD_ID3 ((uint16_t)0x04F8)
47
48uint8_t test_result = 0;
54static void can_gpio_config(void)
55{
56 gpio_init_type gpio_init_struct;
57 /* enable the gpio clock */
58 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
59
60 gpio_default_para_init(&gpio_init_struct);
61
62 /* configure the can tx, rx pin */
63 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
64 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
65 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
66 gpio_init_struct.gpio_pins = GPIO_PINS_9 | GPIO_PINS_8;
67 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
68 gpio_init(GPIOB, &gpio_init_struct);
69
70 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE9, GPIO_MUX_9);
71 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_9);
72}
73
79static void can_configuration(void)
80{
81 can_base_type can_base_struct;
82 can_baudrate_type can_baudrate_struct;
83 can_filter_init_type can_filter_init_struct;
84 /* enable the can clock */
85 crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
86
87 /* can base init */
88 can_default_para_init(&can_base_struct);
89 can_base_struct.mode_selection = CAN_MODE_COMMUNICATE;
90 can_base_struct.ttc_enable = FALSE;
91 can_base_struct.aebo_enable = TRUE;
92 can_base_struct.aed_enable = TRUE;
93 can_base_struct.prsf_enable = FALSE;
94 can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED;
95 can_base_struct.mmssr_selection = CAN_SENDING_BY_ID;
96 can_base_init(CAN1, &can_base_struct);
97
98 /* can baudrate, set boudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size)) */
99 can_baudrate_struct.baudrate_div = 12;
100 can_baudrate_struct.rsaw_size = CAN_RSAW_3TQ;
101 can_baudrate_struct.bts1_size = CAN_BTS1_8TQ;
102 can_baudrate_struct.bts2_size = CAN_BTS2_3TQ;
103 can_baudrate_set(CAN1, &can_baudrate_struct);
104
105 /* can filter 0 config */
106 can_filter_init_struct.filter_activate_enable = TRUE;
107 can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_LIST;
108 can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
109 can_filter_init_struct.filter_number = 0;
110 can_filter_init_struct.filter_bit = CAN_FILTER_32BIT;
111 can_filter_init_struct.filter_id_high = (((FILTER_EXT_ID1 << 3) >> 16) & 0xFFFF); /* extended identifier is 29 bit */
112 can_filter_init_struct.filter_id_low = ((FILTER_EXT_ID1 << 3) & 0xFFFF) | 0x04;
113 can_filter_init_struct.filter_mask_high = ((FILTER_EXT_ID2 << 3) >> 16) & 0xFFFF; /* extended identifier is 29 bit */
114 can_filter_init_struct.filter_mask_low = ((FILTER_EXT_ID2 << 3) & 0xFFFF) | 0x04;
115 can_filter_init(CAN1, &can_filter_init_struct);
116
117 /* can filter 1 config */
118 can_filter_init_struct.filter_activate_enable = TRUE;
119 can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_LIST;
120 can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
121 can_filter_init_struct.filter_number = 1;
122 can_filter_init_struct.filter_bit = CAN_FILTER_32BIT;
123 can_filter_init_struct.filter_id_high = FILTER_STD_ID1 << 5; /* standard identifier is 11 bit */
124 can_filter_init_struct.filter_id_low = 0;
125 can_filter_init_struct.filter_mask_high = FILTER_STD_ID2 << 5;/* standard identifier is 11 bit */
126 can_filter_init_struct.filter_mask_low = 0;
127 can_filter_init(CAN1, &can_filter_init_struct);
128
129 /* can interrupt config */
130 nvic_irq_enable(CAN1_SE_IRQn, 0x00, 0x00);
131 nvic_irq_enable(CAN1_RX0_IRQn, 0x00, 0x00);
132 can_interrupt_enable(CAN1, CAN_RF0MIEN_INT, TRUE);
133
134 /* error interrupt enable */
135 can_interrupt_enable(CAN1, CAN_ETRIEN_INT, TRUE);
136 can_interrupt_enable(CAN1, CAN_EOIEN_INT, TRUE);
137}
138
144static void can_transmit_data(void)
145{
146 uint8_t transmit_mailbox;
147 can_tx_message_type tx_message_struct;
148
149 /* transmit FILTER_STD_ID1 */
150 tx_message_struct.standard_id = FILTER_STD_ID1;
151 tx_message_struct.extended_id = 0;
152 tx_message_struct.id_type = CAN_ID_STANDARD;
153 tx_message_struct.frame_type = CAN_TFT_DATA;
154 tx_message_struct.dlc = 8;
155 tx_message_struct.data[0] = 0x11;
156 tx_message_struct.data[1] = 0x22;
157 tx_message_struct.data[2] = 0x33;
158 tx_message_struct.data[3] = 0x44;
159 tx_message_struct.data[4] = 0x55;
160 tx_message_struct.data[5] = 0x66;
161 tx_message_struct.data[6] = 0x77;
162 tx_message_struct.data[7] = 0x88;
163 transmit_mailbox = can_message_transmit(CAN1, &tx_message_struct);
164 while(can_transmit_status_get(CAN1, (can_tx_mailbox_num_type)transmit_mailbox) != CAN_TX_STATUS_SUCCESSFUL);
165
166 /* transmit FILTER_STD_ID2 */
167 tx_message_struct.standard_id = FILTER_STD_ID2;
168 tx_message_struct.extended_id = 0;
169 tx_message_struct.id_type = CAN_ID_STANDARD;
170 tx_message_struct.frame_type = CAN_TFT_DATA;
171 tx_message_struct.dlc = 8;
172 tx_message_struct.data[0] = 0x11;
173 tx_message_struct.data[1] = 0x22;
174 tx_message_struct.data[2] = 0x33;
175 tx_message_struct.data[3] = 0x44;
176 tx_message_struct.data[4] = 0x55;
177 tx_message_struct.data[5] = 0x66;
178 tx_message_struct.data[6] = 0x77;
179 tx_message_struct.data[7] = 0x88;
180 transmit_mailbox = can_message_transmit(CAN1, &tx_message_struct);
181 while(can_transmit_status_get(CAN1, (can_tx_mailbox_num_type)transmit_mailbox) != CAN_TX_STATUS_SUCCESSFUL);
182
183 /* transmit FILTER_STD_ID3 */
184 tx_message_struct.standard_id = FILTER_STD_ID3;
185 tx_message_struct.extended_id = 0;
186 tx_message_struct.id_type = CAN_ID_STANDARD;
187 tx_message_struct.frame_type = CAN_TFT_DATA;
188 tx_message_struct.dlc = 8;
189 tx_message_struct.data[0] = 0x11;
190 tx_message_struct.data[1] = 0x22;
191 tx_message_struct.data[2] = 0x33;
192 tx_message_struct.data[3] = 0x44;
193 tx_message_struct.data[4] = 0x55;
194 tx_message_struct.data[5] = 0x66;
195 tx_message_struct.data[6] = 0x77;
196 tx_message_struct.data[7] = 0x88;
197 transmit_mailbox = can_message_transmit(CAN1, &tx_message_struct);
198 while(can_transmit_status_get(CAN1, (can_tx_mailbox_num_type)transmit_mailbox) != CAN_TX_STATUS_SUCCESSFUL);
199
200 /* transmit FILTER_EXT_ID1 */
201 tx_message_struct.standard_id = 0;
202 tx_message_struct.extended_id = FILTER_EXT_ID1;
203 tx_message_struct.id_type = CAN_ID_EXTENDED;
204 tx_message_struct.frame_type = CAN_TFT_DATA;
205 tx_message_struct.dlc = 8;
206 tx_message_struct.data[0] = 0x11;
207 tx_message_struct.data[1] = 0x22;
208 tx_message_struct.data[2] = 0x33;
209 tx_message_struct.data[3] = 0x44;
210 tx_message_struct.data[4] = 0x55;
211 tx_message_struct.data[5] = 0x66;
212 tx_message_struct.data[6] = 0x77;
213 tx_message_struct.data[7] = 0x88;
214 transmit_mailbox = can_message_transmit(CAN1, &tx_message_struct);
215 while(can_transmit_status_get(CAN1, (can_tx_mailbox_num_type)transmit_mailbox) != CAN_TX_STATUS_SUCCESSFUL);
216
217 /* transmit FILTER_EXT_ID2 */
218 tx_message_struct.standard_id = 0;
219 tx_message_struct.extended_id = FILTER_EXT_ID2;
220 tx_message_struct.id_type = CAN_ID_EXTENDED;
221 tx_message_struct.frame_type = CAN_TFT_DATA;
222 tx_message_struct.dlc = 8;
223 tx_message_struct.data[0] = 0x11;
224 tx_message_struct.data[1] = 0x22;
225 tx_message_struct.data[2] = 0x33;
226 tx_message_struct.data[3] = 0x44;
227 tx_message_struct.data[4] = 0x55;
228 tx_message_struct.data[5] = 0x66;
229 tx_message_struct.data[6] = 0x77;
230 tx_message_struct.data[7] = 0x88;
231 transmit_mailbox = can_message_transmit(CAN1, &tx_message_struct);
232 while(can_transmit_status_get(CAN1, (can_tx_mailbox_num_type)transmit_mailbox) != CAN_TX_STATUS_SUCCESSFUL);
233
234 /* transmit FILTER_EXT_ID3 */
235 tx_message_struct.standard_id = 0;
236 tx_message_struct.extended_id = FILTER_EXT_ID3;
237 tx_message_struct.id_type = CAN_ID_EXTENDED;
238 tx_message_struct.frame_type = CAN_TFT_DATA;
239 tx_message_struct.dlc = 8;
240 tx_message_struct.data[0] = 0x11;
241 tx_message_struct.data[1] = 0x22;
242 tx_message_struct.data[2] = 0x33;
243 tx_message_struct.data[3] = 0x44;
244 tx_message_struct.data[4] = 0x55;
245 tx_message_struct.data[5] = 0x66;
246 tx_message_struct.data[6] = 0x77;
247 tx_message_struct.data[7] = 0x88;
248 transmit_mailbox = can_message_transmit(CAN1, &tx_message_struct);
249 while(can_transmit_status_get(CAN1, (can_tx_mailbox_num_type)transmit_mailbox) != CAN_TX_STATUS_SUCCESSFUL);
250}
251
257void CAN1_RX0_IRQHandler(void)
258{
259 can_rx_message_type rx_message_struct;
260 if(can_flag_get(CAN1,CAN_RF0MN_FLAG) != RESET)
261 {
262 if(test_result == 4)
263 {
264 test_result = 0;
265 }
266
267 can_message_receive(CAN1, CAN_RX_FIFO0, &rx_message_struct);
268
269 if((rx_message_struct.id_type == CAN_ID_STANDARD) && (rx_message_struct.standard_id == FILTER_STD_ID1))
270 test_result++;
271 else if((rx_message_struct.id_type == CAN_ID_STANDARD) && (rx_message_struct.standard_id == FILTER_STD_ID2))
272 test_result++;
273 else if((rx_message_struct.id_type == CAN_ID_EXTENDED) && (rx_message_struct.extended_id == FILTER_EXT_ID1))
274 test_result++;
275 else if((rx_message_struct.id_type == CAN_ID_EXTENDED) && (rx_message_struct.extended_id == FILTER_EXT_ID2))
276 test_result++;
277 }
278}
279
285void CAN1_SE_IRQHandler(void)
286{
287 __IO uint32_t err_index = 0;
288 if(can_flag_get(CAN1,CAN_ETR_FLAG) != RESET)
289 {
290 err_index = CAN1->ests & 0x70;
291 can_flag_clear(CAN1, CAN_ETR_FLAG);
292 /* error type is stuff error */
293 if(err_index == 0x00000010)
294 {
295 /* when stuff error occur: in order to ensure communication normally,
296 user must restart can or send a frame of highest priority message here */
297 }
298 }
299}
300
306int main(void)
307{
308 system_clock_config();
309 at32_board_init();
310 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
311 can_gpio_config();
312 can_configuration();
313 can_transmit_data();
314 while(1)
315 {
316 if(test_result == 4)
317 {
318 at32_led_toggle(LED2);
319 at32_led_toggle(LED3);
320 at32_led_toggle(LED4);
321 delay_sec(1);
322 }
323 }
324}
325
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
CAN1_SE_IRQHandler
void CAN1_SE_IRQHandler(void)
can1 interrupt function se
Definition: project/at_start_f435/examples/can/communication_mode/src/main.c:165
CAN1_RX0_IRQHandler
void CAN1_RX0_IRQHandler(void)
can1 interrupt function rx0
Definition: project/at_start_f435/examples/can/communication_mode/src/main.c:147
FILTER_EXT_ID3
#define FILTER_EXT_ID3
Definition: project/at_start_f437/examples/can/filter/src/main.c:41
FILTER_EXT_ID1
#define FILTER_EXT_ID1
Definition: project/at_start_f437/examples/can/filter/src/main.c:39
FILTER_STD_ID2
#define FILTER_STD_ID2
Definition: project/at_start_f437/examples/can/filter/src/main.c:45
FILTER_EXT_ID2
#define FILTER_EXT_ID2
Definition: project/at_start_f437/examples/can/filter/src/main.c:40
FILTER_STD_ID3
#define FILTER_STD_ID3
Definition: project/at_start_f437/examples/can/filter/src/main.c:46
FILTER_STD_ID1
#define FILTER_STD_ID1
Definition: project/at_start_f437/examples/can/filter/src/main.c:44
test_result
uint8_t test_result
Definition: project/at_start_f437/examples/can/filter/src/main.c:48
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
can_base_init
error_status can_base_init(can_type *can_x, can_base_type *can_base_struct)
initialize the can peripheral according to the specified parameters in the can_init_struct.
Definition: at32f435_437_can.c:194
can_transmit_status_get
can_transmit_status_type can_transmit_status_get(can_type *can_x, can_tx_mailbox_num_type transmit_mailbox)
check the transmission state of the specified can peripheral.
Definition: at32f435_437_can.c:514
can_message_transmit
uint8_t can_message_transmit(can_type *can_x, can_tx_message_type *tx_message_struct)
fill the transmission message and transmit of the specified can peripheral.
Definition: at32f435_437_can.c:440
can_message_receive
void can_message_receive(can_type *can_x, can_rx_fifo_num_type fifo_number, can_rx_message_type *rx_message_struct)
receive message of the specified can peripheral.
Definition: at32f435_437_can.c:619
can_interrupt_enable
void can_interrupt_enable(can_type *can_x, uint32_t can_int, confirm_state new_state)
enable or disable the interrupt of the specified can peripheral.
Definition: at32f435_437_can.c:924
can_flag_get
flag_status can_flag_get(can_type *can_x, uint32_t can_flag)
get flag of the specified can peripheral.
Definition: at32f435_437_can.c:964
can_flag_clear
void can_flag_clear(can_type *can_x, uint32_t can_flag)
clear flag of the specified can peripheral.
Definition: at32f435_437_can.c:1087
can_baudrate_set
error_status can_baudrate_set(can_type *can_x, can_baudrate_type *can_baudrate_struct)
set the baudrate of the can peripheral
Definition: at32f435_437_can.c:99
can_filter_init
void can_filter_init(can_type *can_x, can_filter_init_type *can_filter_init_struct)
initialize the can peripheral according to the specified parameters in the can_filter_init_struct.
Definition: at32f435_437_can.c:304
can_default_para_init
void can_default_para_init(can_base_type *can_base_struct)
fill each can_init_struct member with its default value.
Definition: at32f435_437_can.c:157
can_tx_mailbox_num_type
can_tx_mailbox_num_type
can tx mailboxes
Definition: at32f435_437_can.h:252
CAN_FILTER_FIFO0
@ CAN_FILTER_FIFO0
Definition: at32f435_437_can.h:138
CAN_TX_STATUS_SUCCESSFUL
@ CAN_TX_STATUS_SUCCESSFUL
Definition: at32f435_437_can.h:273
CAN_DISCARDING_FIRST_RECEIVED
@ CAN_DISCARDING_FIRST_RECEIVED
Definition: at32f435_437_can.h:301
CAN_BTS2_3TQ
@ CAN_BTS2_3TQ
Definition: at32f435_437_can.h:222
CAN_TFT_DATA
@ CAN_TFT_DATA
Definition: at32f435_437_can.h:244
CAN_BTS1_8TQ
@ CAN_BTS1_8TQ
Definition: at32f435_437_can.h:204
CAN_FILTER_MODE_ID_LIST
@ CAN_FILTER_MODE_ID_LIST
Definition: at32f435_437_can.h:148
CAN_SENDING_BY_ID
@ CAN_SENDING_BY_ID
Definition: at32f435_437_can.h:310
CAN_FILTER_32BIT
@ CAN_FILTER_32BIT
Definition: at32f435_437_can.h:157
CAN_RX_FIFO0
@ CAN_RX_FIFO0
Definition: at32f435_437_can.h:263
CAN_ID_STANDARD
@ CAN_ID_STANDARD
Definition: at32f435_437_can.h:235
CAN_ID_EXTENDED
@ CAN_ID_EXTENDED
Definition: at32f435_437_can.h:236
CAN_MODE_COMMUNICATE
@ CAN_MODE_COMMUNICATE
Definition: at32f435_437_can.h:165
CAN_RSAW_3TQ
@ CAN_RSAW_3TQ
Definition: at32f435_437_can.h:188
CAN_RF0MN_FLAG
#define CAN_RF0MN_FLAG
Definition: at32f435_437_can.h:72
CAN_ETR_FLAG
#define CAN_ETR_FLAG
Definition: at32f435_437_can.h:67
CAN_RF0MIEN_INT
#define CAN_RF0MIEN_INT
Definition: at32f435_437_can.h:92
CAN_EOIEN_INT
#define CAN_EOIEN_INT
Definition: at32f435_437_can.h:102
CAN_ETRIEN_INT
#define CAN_ETRIEN_INT
Definition: at32f435_437_can.h:101
CAN1
#define CAN1
Definition: at32f435_437_can.h:994
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_CAN1_PERIPH_CLOCK
@ CRM_CAN1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:147
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_9
@ GPIO_MUX_9
Definition: at32f435_437_gpio.h:165
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
CAN1_RX0_IRQn
@ CAN1_RX0_IRQn
Definition: at32f435_437.h:168
CAN1_SE_IRQn
@ CAN1_SE_IRQn
Definition: at32f435_437.h:170
can_transmit_data
static void can_transmit_data(void)
can transmit data
Definition: project/at_start_f437/examples/can/filter/src/main.c:144
can_gpio_config
static void can_gpio_config(void)
can gpio config
Definition: project/at_start_f437/examples/can/filter/src/main.c:54
can_configuration
static void can_configuration(void)
can configiguration.
Definition: project/at_start_f437/examples/can/filter/src/main.c:79
can_base_type
can init structure definition
Definition: at32f435_437_can.h:333
can_base_type::prsf_enable
confirm_state prsf_enable
Definition: at32f435_437_can.h:342
can_base_type::mdrsel_selection
can_msg_discarding_rule_type mdrsel_selection
Definition: at32f435_437_can.h:344
can_base_type::aed_enable
confirm_state aed_enable
Definition: at32f435_437_can.h:340
can_base_type::mmssr_selection
can_msg_sending_rule_type mmssr_selection
Definition: at32f435_437_can.h:346
can_base_type::ttc_enable
confirm_state ttc_enable
Definition: at32f435_437_can.h:336
can_base_type::mode_selection
can_mode_type mode_selection
Definition: at32f435_437_can.h:334
can_base_type::aebo_enable
confirm_state aebo_enable
Definition: at32f435_437_can.h:338
can_baudrate_type
can baudrate structure definition
Definition: at32f435_437_can.h:354
can_baudrate_type::baudrate_div
uint16_t baudrate_div
Definition: at32f435_437_can.h:355
can_baudrate_type::rsaw_size
can_rsaw_type rsaw_size
Definition: at32f435_437_can.h:357
can_baudrate_type::bts2_size
can_bts2_type bts2_size
Definition: at32f435_437_can.h:361
can_baudrate_type::bts1_size
can_bts1_type bts1_size
Definition: at32f435_437_can.h:359
can_filter_init_type
can filter init structure definition
Definition: at32f435_437_can.h:369
can_filter_init_type::filter_mask_low
uint16_t filter_mask_low
Definition: at32f435_437_can.h:389
can_filter_init_type::filter_number
uint8_t filter_number
Definition: at32f435_437_can.h:376
can_filter_init_type::filter_fifo
can_filter_fifo_type filter_fifo
Definition: at32f435_437_can.h:374
can_filter_init_type::filter_bit
can_filter_bit_width_type filter_bit
Definition: at32f435_437_can.h:378
can_filter_init_type::filter_mode
can_filter_mode_type filter_mode
Definition: at32f435_437_can.h:372
can_filter_init_type::filter_activate_enable
confirm_state filter_activate_enable
Definition: at32f435_437_can.h:370
can_filter_init_type::filter_mask_high
uint16_t filter_mask_high
Definition: at32f435_437_can.h:386
can_filter_init_type::filter_id_high
uint16_t filter_id_high
Definition: at32f435_437_can.h:380
can_filter_init_type::filter_id_low
uint16_t filter_id_low
Definition: at32f435_437_can.h:383
can_rx_message_type
can rx message structure definition
Definition: at32f435_437_can.h:419
can_rx_message_type::standard_id
uint32_t standard_id
Definition: at32f435_437_can.h:420
can_rx_message_type::id_type
can_identifier_type id_type
Definition: at32f435_437_can.h:426
can_rx_message_type::extended_id
uint32_t extended_id
Definition: at32f435_437_can.h:423
can_tx_message_type
can tx message structure definition
Definition: at32f435_437_can.h:397
can_tx_message_type::extended_id
uint32_t extended_id
Definition: at32f435_437_can.h:401
can_tx_message_type::frame_type
can_trans_frame_type frame_type
Definition: at32f435_437_can.h:406
can_tx_message_type::data
uint8_t data[8]
Definition: at32f435_437_can.h:411
can_tx_message_type::dlc
uint8_t dlc
Definition: at32f435_437_can.h:408
can_tx_message_type::id_type
can_identifier_type id_type
Definition: at32f435_437_can.h:404
can_tx_message_type::standard_id
uint32_t standard_id
Definition: at32f435_437_can.h:398
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • can
  • loopback_mode
  • inc
project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • can
  • loopback_mode
  • inc
project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • can
  • loopback_mode
  • inc
project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • can
  • loopback_mode
  • src
Functions
project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • can
  • loopback_mode
  • src
project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • can
  • loopback_mode
  • src
Functions
project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • can
  • loopback_mode
  • src
project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • can
  • loopback_mode
  • src
Functions
project/at_start_f437/examples/can/loopback_mode/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | can_gpio_config (void)
can gpio config More...
static void | can_configuration (void)
can configiguration. More...
static void | can_transmit_data (void)
can transmit data More...
void | CAN1_RX0_IRQHandler (void)
can1 interrupt function rx0 More...
void | CAN1_SE_IRQHandler (void)
can1 interrupt function se More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/can/loopback_mode/src/main.c.

Function Documentation

◆ can_configuration()

static void can_configuration ( void )
static

can configiguration.

Parameters
none
Return values
none

< receive fifo 0 message interrupt

< error type record interrupt

< error occur interrupt

Definition at line 68 of file project/at_start_f437/examples/can/loopback_mode/src/main.c.

◆ can_gpio_config()

static void can_gpio_config ( void )
static

can gpio config

Parameters
none
Return values
none

< gpio pins number 9

< gpio pins number 8

Definition at line 43 of file project/at_start_f437/examples/can/loopback_mode/src/main.c.

◆ can_transmit_data()

static void can_transmit_data ( void )
static

can transmit data

Parameters
none
Return values
none

Definition at line 121 of file project/at_start_f437/examples/can/loopback_mode/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • can
  • loopback_mode
  • src
project/at_start_f437/examples/can/loopback_mode/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43static void can_gpio_config(void)
44{
45 gpio_init_type gpio_init_struct;
46 /* enable the gpio clock */
47 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
48
49 gpio_default_para_init(&gpio_init_struct);
50
51 /* configure the can tx, rx pin */
52 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
53 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
54 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
55 gpio_init_struct.gpio_pins = GPIO_PINS_9 | GPIO_PINS_8;
56 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
57 gpio_init(GPIOB, &gpio_init_struct);
58
59 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE9, GPIO_MUX_9);
60 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_9);
61}
62
68static void can_configuration(void)
69{
70 can_base_type can_base_struct;
71 can_baudrate_type can_baudrate_struct;
72 can_filter_init_type can_filter_init_struct;
73 /* enable the can clock */
74 crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
75
76 /* can base init */
77 can_default_para_init(&can_base_struct);
78 can_base_struct.mode_selection = CAN_MODE_LOOPBACK;
79 can_base_struct.ttc_enable = FALSE;
80 can_base_struct.aebo_enable = TRUE;
81 can_base_struct.aed_enable = TRUE;
82 can_base_struct.prsf_enable = FALSE;
83 can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED;
84 can_base_struct.mmssr_selection = CAN_SENDING_BY_ID;
85 can_base_init(CAN1, &can_base_struct);
86
87 /* can baudrate, set boudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size)) */
88 can_baudrate_struct.baudrate_div = 12;
89 can_baudrate_struct.rsaw_size = CAN_RSAW_3TQ;
90 can_baudrate_struct.bts1_size = CAN_BTS1_8TQ;
91 can_baudrate_struct.bts2_size = CAN_BTS2_3TQ;
92 can_baudrate_set(CAN1, &can_baudrate_struct);
93
94 /* can filter init */
95 can_filter_init_struct.filter_activate_enable = TRUE;
96 can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK;
97 can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
98 can_filter_init_struct.filter_number = 0;
99 can_filter_init_struct.filter_bit = CAN_FILTER_32BIT;
100 can_filter_init_struct.filter_id_high = 0;
101 can_filter_init_struct.filter_id_low = 0;
102 can_filter_init_struct.filter_mask_high = 0;
103 can_filter_init_struct.filter_mask_low = 0;
104 can_filter_init(CAN1, &can_filter_init_struct);
105
106 /* can interrupt config */
107 nvic_irq_enable(CAN1_SE_IRQn, 0x00, 0x00);
108 nvic_irq_enable(CAN1_RX0_IRQn, 0x00, 0x00);
109 can_interrupt_enable(CAN1, CAN_RF0MIEN_INT, TRUE);
110
111 /* error interrupt enable */
112 can_interrupt_enable(CAN1, CAN_ETRIEN_INT, TRUE);
113 can_interrupt_enable(CAN1, CAN_EOIEN_INT, TRUE);
114}
115
121static void can_transmit_data(void)
122{
123 uint8_t transmit_mailbox;
124 can_tx_message_type tx_message_struct;
125 tx_message_struct.standard_id = 0x400;
126 tx_message_struct.extended_id = 0;
127 tx_message_struct.id_type = CAN_ID_STANDARD;
128 tx_message_struct.frame_type = CAN_TFT_DATA;
129 tx_message_struct.dlc = 8;
130 tx_message_struct.data[0] = 0x11;
131 tx_message_struct.data[1] = 0x22;
132 tx_message_struct.data[2] = 0x33;
133 tx_message_struct.data[3] = 0x44;
134 tx_message_struct.data[4] = 0x55;
135 tx_message_struct.data[5] = 0x66;
136 tx_message_struct.data[6] = 0x77;
137 tx_message_struct.data[7] = 0x88;
138 transmit_mailbox = can_message_transmit(CAN1, &tx_message_struct);
139 while(can_transmit_status_get(CAN1, (can_tx_mailbox_num_type)transmit_mailbox) != CAN_TX_STATUS_SUCCESSFUL);
140}
141
147void CAN1_RX0_IRQHandler(void)
148{
149 can_rx_message_type rx_message_struct;
150 if(can_flag_get(CAN1,CAN_RF0MN_FLAG) != RESET)
151 {
152 can_message_receive(CAN1, CAN_RX_FIFO0, &rx_message_struct);
153 if(rx_message_struct.standard_id == 0x400)
154 at32_led_toggle(LED2);
155 }
156}
157
163void CAN1_SE_IRQHandler(void)
164{
165 __IO uint32_t err_index = 0;
166 if(can_flag_get(CAN1,CAN_ETR_FLAG) != RESET)
167 {
168 err_index = CAN1->ests & 0x70;
169 can_flag_clear(CAN1, CAN_ETR_FLAG);
170 /* error type is stuff error */
171 if(err_index == 0x00000010)
172 {
173 /* when stuff error occur: in order to ensure communication normally,
174 user must restart can or send a frame of highest priority message here */
175 }
176 }
177}
178
179
185int main(void)
186{
187 system_clock_config();
188 at32_board_init();
189 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
190 can_gpio_config();
191 can_configuration();
192 while(1)
193 {
194 can_transmit_data();
195
196 at32_led_toggle(LED4);
197
198 delay_sec(1);
199 }
200}
201
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
CAN1_SE_IRQHandler
void CAN1_SE_IRQHandler(void)
can1 interrupt function se
Definition: project/at_start_f435/examples/can/communication_mode/src/main.c:165
CAN1_RX0_IRQHandler
void CAN1_RX0_IRQHandler(void)
can1 interrupt function rx0
Definition: project/at_start_f435/examples/can/communication_mode/src/main.c:147
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
can_base_init
error_status can_base_init(can_type *can_x, can_base_type *can_base_struct)
initialize the can peripheral according to the specified parameters in the can_init_struct.
Definition: at32f435_437_can.c:194
can_transmit_status_get
can_transmit_status_type can_transmit_status_get(can_type *can_x, can_tx_mailbox_num_type transmit_mailbox)
check the transmission state of the specified can peripheral.
Definition: at32f435_437_can.c:514
can_message_transmit
uint8_t can_message_transmit(can_type *can_x, can_tx_message_type *tx_message_struct)
fill the transmission message and transmit of the specified can peripheral.
Definition: at32f435_437_can.c:440
can_message_receive
void can_message_receive(can_type *can_x, can_rx_fifo_num_type fifo_number, can_rx_message_type *rx_message_struct)
receive message of the specified can peripheral.
Definition: at32f435_437_can.c:619
can_interrupt_enable
void can_interrupt_enable(can_type *can_x, uint32_t can_int, confirm_state new_state)
enable or disable the interrupt of the specified can peripheral.
Definition: at32f435_437_can.c:924
can_flag_get
flag_status can_flag_get(can_type *can_x, uint32_t can_flag)
get flag of the specified can peripheral.
Definition: at32f435_437_can.c:964
can_flag_clear
void can_flag_clear(can_type *can_x, uint32_t can_flag)
clear flag of the specified can peripheral.
Definition: at32f435_437_can.c:1087
can_baudrate_set
error_status can_baudrate_set(can_type *can_x, can_baudrate_type *can_baudrate_struct)
set the baudrate of the can peripheral
Definition: at32f435_437_can.c:99
can_filter_init
void can_filter_init(can_type *can_x, can_filter_init_type *can_filter_init_struct)
initialize the can peripheral according to the specified parameters in the can_filter_init_struct.
Definition: at32f435_437_can.c:304
can_default_para_init
void can_default_para_init(can_base_type *can_base_struct)
fill each can_init_struct member with its default value.
Definition: at32f435_437_can.c:157
can_tx_mailbox_num_type
can_tx_mailbox_num_type
can tx mailboxes
Definition: at32f435_437_can.h:252
CAN_FILTER_FIFO0
@ CAN_FILTER_FIFO0
Definition: at32f435_437_can.h:138
CAN_TX_STATUS_SUCCESSFUL
@ CAN_TX_STATUS_SUCCESSFUL
Definition: at32f435_437_can.h:273
CAN_DISCARDING_FIRST_RECEIVED
@ CAN_DISCARDING_FIRST_RECEIVED
Definition: at32f435_437_can.h:301
CAN_BTS2_3TQ
@ CAN_BTS2_3TQ
Definition: at32f435_437_can.h:222
CAN_TFT_DATA
@ CAN_TFT_DATA
Definition: at32f435_437_can.h:244
CAN_BTS1_8TQ
@ CAN_BTS1_8TQ
Definition: at32f435_437_can.h:204
CAN_FILTER_MODE_ID_MASK
@ CAN_FILTER_MODE_ID_MASK
Definition: at32f435_437_can.h:147
CAN_SENDING_BY_ID
@ CAN_SENDING_BY_ID
Definition: at32f435_437_can.h:310
CAN_FILTER_32BIT
@ CAN_FILTER_32BIT
Definition: at32f435_437_can.h:157
CAN_RX_FIFO0
@ CAN_RX_FIFO0
Definition: at32f435_437_can.h:263
CAN_ID_STANDARD
@ CAN_ID_STANDARD
Definition: at32f435_437_can.h:235
CAN_MODE_LOOPBACK
@ CAN_MODE_LOOPBACK
Definition: at32f435_437_can.h:166
CAN_RSAW_3TQ
@ CAN_RSAW_3TQ
Definition: at32f435_437_can.h:188
CAN_RF0MN_FLAG
#define CAN_RF0MN_FLAG
Definition: at32f435_437_can.h:72
CAN_ETR_FLAG
#define CAN_ETR_FLAG
Definition: at32f435_437_can.h:67
CAN_RF0MIEN_INT
#define CAN_RF0MIEN_INT
Definition: at32f435_437_can.h:92
CAN_EOIEN_INT
#define CAN_EOIEN_INT
Definition: at32f435_437_can.h:102
CAN_ETRIEN_INT
#define CAN_ETRIEN_INT
Definition: at32f435_437_can.h:101
CAN1
#define CAN1
Definition: at32f435_437_can.h:994
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_CAN1_PERIPH_CLOCK
@ CRM_CAN1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:147
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_9
@ GPIO_MUX_9
Definition: at32f435_437_gpio.h:165
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
CAN1_RX0_IRQn
@ CAN1_RX0_IRQn
Definition: at32f435_437.h:168
CAN1_SE_IRQn
@ CAN1_SE_IRQn
Definition: at32f435_437.h:170
can_transmit_data
static void can_transmit_data(void)
can transmit data
Definition: project/at_start_f437/examples/can/loopback_mode/src/main.c:121
can_gpio_config
static void can_gpio_config(void)
can gpio config
Definition: project/at_start_f437/examples/can/loopback_mode/src/main.c:43
can_configuration
static void can_configuration(void)
can configiguration.
Definition: project/at_start_f437/examples/can/loopback_mode/src/main.c:68
can_base_type
can init structure definition
Definition: at32f435_437_can.h:333
can_base_type::prsf_enable
confirm_state prsf_enable
Definition: at32f435_437_can.h:342
can_base_type::mdrsel_selection
can_msg_discarding_rule_type mdrsel_selection
Definition: at32f435_437_can.h:344
can_base_type::aed_enable
confirm_state aed_enable
Definition: at32f435_437_can.h:340
can_base_type::mmssr_selection
can_msg_sending_rule_type mmssr_selection
Definition: at32f435_437_can.h:346
can_base_type::ttc_enable
confirm_state ttc_enable
Definition: at32f435_437_can.h:336
can_base_type::mode_selection
can_mode_type mode_selection
Definition: at32f435_437_can.h:334
can_base_type::aebo_enable
confirm_state aebo_enable
Definition: at32f435_437_can.h:338
can_baudrate_type
can baudrate structure definition
Definition: at32f435_437_can.h:354
can_baudrate_type::baudrate_div
uint16_t baudrate_div
Definition: at32f435_437_can.h:355
can_baudrate_type::rsaw_size
can_rsaw_type rsaw_size
Definition: at32f435_437_can.h:357
can_baudrate_type::bts2_size
can_bts2_type bts2_size
Definition: at32f435_437_can.h:361
can_baudrate_type::bts1_size
can_bts1_type bts1_size
Definition: at32f435_437_can.h:359
can_filter_init_type
can filter init structure definition
Definition: at32f435_437_can.h:369
can_filter_init_type::filter_mask_low
uint16_t filter_mask_low
Definition: at32f435_437_can.h:389
can_filter_init_type::filter_number
uint8_t filter_number
Definition: at32f435_437_can.h:376
can_filter_init_type::filter_fifo
can_filter_fifo_type filter_fifo
Definition: at32f435_437_can.h:374
can_filter_init_type::filter_bit
can_filter_bit_width_type filter_bit
Definition: at32f435_437_can.h:378
can_filter_init_type::filter_mode
can_filter_mode_type filter_mode
Definition: at32f435_437_can.h:372
can_filter_init_type::filter_activate_enable
confirm_state filter_activate_enable
Definition: at32f435_437_can.h:370
can_filter_init_type::filter_mask_high
uint16_t filter_mask_high
Definition: at32f435_437_can.h:386
can_filter_init_type::filter_id_high
uint16_t filter_id_high
Definition: at32f435_437_can.h:380
can_filter_init_type::filter_id_low
uint16_t filter_id_low
Definition: at32f435_437_can.h:383
can_rx_message_type
can rx message structure definition
Definition: at32f435_437_can.h:419
can_rx_message_type::standard_id
uint32_t standard_id
Definition: at32f435_437_can.h:420
can_tx_message_type
can tx message structure definition
Definition: at32f435_437_can.h:397
can_tx_message_type::extended_id
uint32_t extended_id
Definition: at32f435_437_can.h:401
can_tx_message_type::frame_type
can_trans_frame_type frame_type
Definition: at32f435_437_can.h:406
can_tx_message_type::data
uint8_t data[8]
Definition: at32f435_437_can.h:411
can_tx_message_type::dlc
uint8_t dlc
Definition: at32f435_437_can.h:408
can_tx_message_type::id_type
can_identifier_type id_type
Definition: at32f435_437_can.h:404
can_tx_message_type::standard_id
uint32_t standard_id
Definition: at32f435_437_can.h:398
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • cortex_m4
  • bit_band
  • inc
project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • cortex_m4
  • bit_band
  • inc
project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • cortex_m4
  • bit_band
  • inc
project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • cortex_m4
  • bit_band
  • src
Functions
project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • cortex_m4
  • bit_band
  • src
project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • cortex_m4
  • bit_band
  • src
Functions
project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • cortex_m4
  • bit_band
  • src
project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • cortex_m4
  • bit_band
  • src
Macros | Functions | Variables
project/at_start_f437/examples/cortex_m4/bit_band/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | RAM_BASE 0x20000000
#define | RAM_BITBAND_BASE 0x22000000
#define | VARIABLES_RESET_BIT(variables_addr, bit_number) (*(uint32_t *)(RAM_BITBAND_BASE + ((variables_addr - RAM_BASE) * 32) + ((bit_number) * 4)) = 0)
#define | VARIABLES_SET_BIT(variables_addr, bit_number) (*(uint32_t *)(RAM_BITBAND_BASE + ((variables_addr - RAM_BASE) * 32) + ((bit_number) * 4)) = 1)
#define | VARIABLES_GET_BIT(variables_addr, bit_number) (*(uint32_t *)(RAM_BITBAND_BASE + ((variables_addr - RAM_BASE) * 32) + ((bit_number) * 4)))
#define | PERIPHERAL_BASE 0x40000000
#define | PERIPHERAL_BITBAND_BASE 0x42000000
#define | PERIPHERAL_RESET_BIT(peripheral_addr, bit_number) (*(uint32_t *)(PERIPHERAL_BITBAND_BASE + ((peripheral_addr - PERIPHERAL_BASE) * 32) + ((bit_number) * 4)) = 0)
#define | PERIPHERAL_SET_BIT(peripheral_addr, bit_number) (*(uint32_t *)(PERIPHERAL_BITBAND_BASE + ((peripheral_addr - PERIPHERAL_BASE) * 32) + ((bit_number) * 4)) = 1)

Functions

void | result_error (void)
led4 flick for error. More...
int | main (void)
main function. More...

Variables

__IO uint32_t | variables
__IO uint32_t | variables_addr = 0
__IO uint32_t | variables_bit_val = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/cortex_m4/bit_band/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • cortex_m4
  • bit_band
  • src
project/at_start_f437/examples/cortex_m4/bit_band/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
39/* bit band for sram */
40#define RAM_BASE 0x20000000
41#define RAM_BITBAND_BASE 0x22000000
42
43#define VARIABLES_RESET_BIT(variables_addr, bit_number) \
44 (*(uint32_t *)(RAM_BITBAND_BASE + ((variables_addr - RAM_BASE) * 32) + ((bit_number) * 4)) = 0)
45
46#define VARIABLES_SET_BIT(variables_addr, bit_number) \
47 (*(uint32_t *)(RAM_BITBAND_BASE + ((variables_addr - RAM_BASE) * 32) + ((bit_number) * 4)) = 1)
48
49#define VARIABLES_GET_BIT(variables_addr, bit_number) \
50 (*(uint32_t *)(RAM_BITBAND_BASE + ((variables_addr - RAM_BASE) * 32) + ((bit_number) * 4)))
51
52/* bit band for peripheral */
53#define PERIPHERAL_BASE 0x40000000
54#define PERIPHERAL_BITBAND_BASE 0x42000000
55
56#define PERIPHERAL_RESET_BIT(peripheral_addr, bit_number) \
57 (*(uint32_t *)(PERIPHERAL_BITBAND_BASE + ((peripheral_addr - PERIPHERAL_BASE) * 32) + ((bit_number) * 4)) = 0)
58
59#define PERIPHERAL_SET_BIT(peripheral_addr, bit_number) \
60 (*(uint32_t *)(PERIPHERAL_BITBAND_BASE + ((peripheral_addr - PERIPHERAL_BASE) * 32) + ((bit_number) * 4)) = 1)
61
62__IO uint32_t variables, variables_addr = 0, variables_bit_val = 0;
63
69void result_error(void)
70{
71 while(1)
72 {
73 at32_led_toggle(LED4);
74 delay_sec(1);
75 }
76}
77
83int main(void)
84{
85 system_clock_config();
86 at32_board_init();
87 variables = 0xA5A5A5A5;
88
89 /* get the variables address */
90 variables_addr = (uint32_t)&variables;
91
92 /* modify variables bit0 and check result */
93 VARIABLES_RESET_BIT(variables_addr, 0);
94 if((variables != 0xA5A5A5A4) || (VARIABLES_GET_BIT(variables_addr, 0) != 0))
95 {
96 result_error();
97 }
98
99 /* modify variables bit0 and check result */
100 VARIABLES_SET_BIT(variables_addr, 0);
101 if((variables != 0xA5A5A5A5) || (VARIABLES_GET_BIT(variables_addr, 0) != 1))
102 {
103 result_error();
104 }
105
106 /* modify variables bit16 and check result */
107 VARIABLES_RESET_BIT(variables_addr, 16);
108 if((variables != 0xA5A4A5A5) || (VARIABLES_GET_BIT(variables_addr, 16) != 0))
109 {
110 result_error();
111 }
112
113 /* modify variables bit16 and check result */
114 VARIABLES_SET_BIT(variables_addr, 16);
115 if((variables != 0xA5A5A5A5) || (VARIABLES_GET_BIT(variables_addr, 16) != 1))
116 {
117 result_error();
118 }
119
120 /* modify variables bit31 and check result */
121 VARIABLES_RESET_BIT(variables_addr, 31);
122 if((variables != 0x25A5A5A5) || (VARIABLES_GET_BIT(variables_addr, 31) != 0))
123 {
124 result_error();
125 }
126
127 /* modify variables bit31 and check result */
128 VARIABLES_SET_BIT(variables_addr, 31);
129 if((variables != 0xA5A5A5A5) || (VARIABLES_GET_BIT(variables_addr, 31) != 1))
130 {
131 result_error();
132 }
133
134 while(1)
135 {
136 /* led2 toggle */
137 PERIPHERAL_RESET_BIT((uint32_t)&LED2_GPIO->odt, 13);
138 delay_ms(500);
139 PERIPHERAL_SET_BIT((uint32_t)&LED2_GPIO->odt, 13);
140 delay_ms(500);
141 }
142}
143
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
variables
__IO uint32_t variables
Definition: project/at_start_f437/examples/cortex_m4/bit_band/src/main.c:62
variables_addr
__IO uint32_t variables_addr
Definition: project/at_start_f437/examples/cortex_m4/bit_band/src/main.c:62
variables_bit_val
__IO uint32_t variables_bit_val
Definition: project/at_start_f437/examples/cortex_m4/bit_band/src/main.c:62
PERIPHERAL_SET_BIT
#define PERIPHERAL_SET_BIT(peripheral_addr, bit_number)
Definition: project/at_start_f437/examples/cortex_m4/bit_band/src/main.c:59
result_error
void result_error(void)
led4 flick for error.
Definition: project/at_start_f435/examples/cortex_m4/bit_band/src/main.c:69
VARIABLES_SET_BIT
#define VARIABLES_SET_BIT(variables_addr, bit_number)
Definition: project/at_start_f437/examples/cortex_m4/bit_band/src/main.c:46
PERIPHERAL_RESET_BIT
#define PERIPHERAL_RESET_BIT(peripheral_addr, bit_number)
Definition: project/at_start_f437/examples/cortex_m4/bit_band/src/main.c:56
VARIABLES_RESET_BIT
#define VARIABLES_RESET_BIT(variables_addr, bit_number)
Definition: project/at_start_f437/examples/cortex_m4/bit_band/src/main.c:43
VARIABLES_GET_BIT
#define VARIABLES_GET_BIT(variables_addr, bit_number)
Definition: project/at_start_f437/examples/cortex_m4/bit_band/src/main.c:49
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED4
@ LED4
Definition: at32f435_437_board.h:67
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • cortex_m4
  • cmsis_dsp
  • inc
project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • cortex_m4
  • cmsis_dsp
  • inc
project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
52#if !defined HEXT_VALUE
53#define HEXT_VALUE ((uint32_t)8000000)
54#endif
55
60#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
61#define HICK_VALUE ((uint32_t)8000000)
63/* module define -------------------------------------------------------------*/
64#define CRM_MODULE_ENABLED
65#define TMR_MODULE_ENABLED
66#define ERTC_MODULE_ENABLED
67#define GPIO_MODULE_ENABLED
68#define I2C_MODULE_ENABLED
69#define USART_MODULE_ENABLED
70#define PWC_MODULE_ENABLED
71#define CAN_MODULE_ENABLED
72#define ADC_MODULE_ENABLED
73#define DAC_MODULE_ENABLED
74#define SPI_MODULE_ENABLED
75#define EDMA_MODULE_ENABLED
76#define DMA_MODULE_ENABLED
77#define DEBUG_MODULE_ENABLED
78#define FLASH_MODULE_ENABLED
79#define CRC_MODULE_ENABLED
80#define WWDT_MODULE_ENABLED
81#define WDT_MODULE_ENABLED
82#define EXINT_MODULE_ENABLED
83#define SDIO_MODULE_ENABLED
84#define XMC_MODULE_ENABLED
85#define USB_MODULE_ENABLED
86#define ACC_MODULE_ENABLED
87#define MISC_MODULE_ENABLED
88#define QSPI_MODULE_ENABLED
89#define DVP_MODULE_ENABLED
90#define SCFG_MODULE_ENABLED
91#define EMAC_MODULE_ENABLED
92
93/* includes ------------------------------------------------------------------*/
94#ifdef CRM_MODULE_ENABLED
95#include "at32f435_437_crm.h"
96#endif
97#ifdef TMR_MODULE_ENABLED
98#include "at32f435_437_tmr.h"
99#endif
100#ifdef ERTC_MODULE_ENABLED
101#include "at32f435_437_ertc.h"
102#endif
103#ifdef GPIO_MODULE_ENABLED
104#include "at32f435_437_gpio.h"
105#endif
106#ifdef I2C_MODULE_ENABLED
107#include "at32f435_437_i2c.h"
108#endif
109#ifdef USART_MODULE_ENABLED
110#include "at32f435_437_usart.h"
111#endif
112#ifdef PWC_MODULE_ENABLED
113#include "at32f435_437_pwc.h"
114#endif
115#ifdef CAN_MODULE_ENABLED
116#include "at32f435_437_can.h"
117#endif
118#ifdef ADC_MODULE_ENABLED
119#include "at32f435_437_adc.h"
120#endif
121#ifdef DAC_MODULE_ENABLED
122#include "at32f435_437_dac.h"
123#endif
124#ifdef SPI_MODULE_ENABLED
125#include "at32f435_437_spi.h"
126#endif
127#ifdef DMA_MODULE_ENABLED
128#include "at32f435_437_dma.h"
129#endif
130#ifdef DEBUG_MODULE_ENABLED
131#include "at32f435_437_debug.h"
132#endif
133#ifdef FLASH_MODULE_ENABLED
134#include "at32f435_437_flash.h"
135#endif
136#ifdef CRC_MODULE_ENABLED
137#include "at32f435_437_crc.h"
138#endif
139#ifdef WWDT_MODULE_ENABLED
140#include "at32f435_437_wwdt.h"
141#endif
142#ifdef WDT_MODULE_ENABLED
143#include "at32f435_437_wdt.h"
144#endif
145#ifdef EXINT_MODULE_ENABLED
146#include "at32f435_437_exint.h"
147#endif
148#ifdef SDIO_MODULE_ENABLED
149#include "at32f435_437_sdio.h"
150#endif
151#ifdef XMC_MODULE_ENABLED
152#include "at32f435_437_xmc.h"
153#endif
154#ifdef ACC_MODULE_ENABLED
155#include "at32f435_437_acc.h"
156#endif
157#ifdef MISC_MODULE_ENABLED
158#include "at32f435_437_misc.h"
159#endif
160#ifdef EDMA_MODULE_ENABLED
161#include "at32f435_437_edma.h"
162#endif
163#ifdef QSPI_MODULE_ENABLED
164#include "at32f435_437_qspi.h"
165#endif
166#ifdef SCFG_MODULE_ENABLED
167#include "at32f435_437_scfg.h"
168#endif
169#ifdef EMAC_MODULE_ENABLED
170#include "at32f435_437_emac.h"
171#endif
172#ifdef DVP_MODULE_ENABLED
173#include "at32f435_437_dvp.h"
174#endif
175#ifdef USB_MODULE_ENABLED
176#include "at32f435_437_usb.h"
177#endif
178
187#ifdef __cplusplus
188}
189#endif
190
191#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • cortex_m4
  • cmsis_dsp
  • inc
project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • cortex_m4
  • cmsis_dsp
  • src
Functions
project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • cortex_m4
  • cmsis_dsp
  • src
project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
57void system_clock_config(void)
58{
59 /* enable pwc periph clock */
60 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
61
62 /* config ldo voltage */
63 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
64
65 /* set the flash clock divider */
66 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
67
68 /* reset crm */
69 crm_reset();
70
71 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
72
73 /* wait till hext is ready */
74 while(crm_hext_stable_wait() == ERROR)
75 {
76 }
77
78 /* config pll clock resource
79 common frequency config list: pll source selected hick or hext(8mhz)
80 _______________________________________________________________________________________
81 | | | | | | | | | |
82 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
83 |________|_________|_________|_________|_________|_________|_________|_________________|
84 | | | | | | | | | |
85 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
86 | | | | | | | | | |
87 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
88 | | | | | | | | | |
89 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
90 |________|_________|_________|_________|_________|_________|_________|________|________|
91
92 if pll clock source selects hext with other frequency values, or configure pll to other
93 frequency values, please use the at32 new clock configuration tool for configuration. */
94 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
95
96 /* enable pll */
97 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
98
99 /* wait till pll is ready */
100 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
101 {
102 }
103
104 /* config ahbclk */
105 crm_ahb_div_set(CRM_AHB_DIV_1);
106
107 /* config apb2clk */
108 crm_apb2_div_set(CRM_APB2_DIV_2);
109
110 /* config apb1clk */
111 crm_apb1_div_set(CRM_APB1_DIV_2);
112
113 /* enable auto step mode */
114 crm_auto_step_mode_enable(TRUE);
115
116 /* select pll as system clock source */
117 crm_sysclk_switch(CRM_SCLK_PLL);
118
119 /* wait till pll is used as system clock source */
120 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
121 {
122 }
123
124 /* disable auto step mode */
125 crm_auto_step_mode_enable(FALSE);
126
127 /* update system_core_clock global variable */
128 system_core_clock_update();
129}
130
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • cortex_m4
  • cmsis_dsp
  • src
Functions
project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • cortex_m4
  • cmsis_dsp
  • src
project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • cortex_m4
  • cmsis_dsp
  • src
Macros | Functions | Variables
project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "arm_math.h"

Go to the source code of this file.

Macros

#define | USE_STATIC_INIT
#define | TEST_LENGTH_SAMPLES (20*4)
#define | NUMSTUDENTS 20
#define | NUMSUBJECTS 4

Functions

int32_t main ()
main function. More...

Variables

const float32_t | testMarks_f32 [(20 *4)]
const float32_t | testUnity_f32 [4]
static float32_t | testOutput [(20 *4)]
uint32_t | numStudents = 20
uint32_t | numSubjects = 4
float32_t | max_marks
float32_t | min_marks
float32_t | mean
float32_t | std
float32_t | var
uint32_t | student_num

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • cortex_m4
  • cmsis_dsp
  • src
project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "arm_math.h"
30
39#define USE_STATIC_INIT
40
41 /* Global defines */
42
43#define TEST_LENGTH_SAMPLES (20*4)
44
45/* List of Marks scored by 20 students for 4 subjects */
46const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] =
47{
48 42.000000, 37.000000, 81.000000, 28.000000,
49 83.000000, 72.000000, 36.000000, 38.000000,
50 32.000000, 51.000000, 63.000000, 64.000000,
51 97.000000, 82.000000, 95.000000, 90.000000,
52 66.000000, 51.000000, 54.000000, 42.000000,
53 67.000000, 56.000000, 45.000000, 57.000000,
54 67.000000, 69.000000, 35.000000, 52.000000,
55 29.000000, 81.000000, 58.000000, 47.000000,
56 38.000000, 76.000000, 100.000000, 29.000000,
57 33.000000, 47.000000, 29.000000, 50.000000,
58 34.000000, 41.000000, 61.000000, 46.000000,
59 52.000000, 50.000000, 48.000000, 36.000000,
60 47.000000, 55.000000, 44.000000, 40.000000,
61 100.000000, 94.000000, 84.000000, 37.000000,
62 32.000000, 71.000000, 47.000000, 77.000000,
63 31.000000, 50.000000, 49.000000, 35.000000,
64 63.000000, 67.000000, 40.000000, 31.000000,
65 29.000000, 68.000000, 61.000000, 38.000000,
66 31.000000, 28.000000, 28.000000, 76.000000,
67 55.000000, 33.000000, 29.000000, 39.000000
68};
69
70
71/* Number of subjects X 1 */
72const float32_t testUnity_f32[4] =
73{
74 1.000, 1.000, 1.000, 1.000
75};
76
77
78/* f32 Output buffer */
79static float32_t testOutput[TEST_LENGTH_SAMPLES];
80
81
82/* Global defines */
83#define NUMSTUDENTS 20
84#define NUMSUBJECTS 4
85
86/* Global variables */
87
88uint32_t numStudents = 20;
89uint32_t numSubjects = 4;
90float32_t max_marks, min_marks, mean, std, var;
91uint32_t student_num;
92
98int32_t main()
99{
100 system_clock_config();
101
102 uart_print_init(115200);
103
104#ifndef USE_STATIC_INIT
105
106 arm_matrix_instance_f32 srcA;
107 arm_matrix_instance_f32 srcB;
108 arm_matrix_instance_f32 dstC;
109
110 /* Input and output matrices initializations */
111 arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32);
112 arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32);
113 arm_mat_init_f32(&dstC, numStudents, 1, testOutput);
114
115#else
116
117 /* Static Initializations of Input and output matrix sizes and array */
118 arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32};
119 arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32};
120 arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput};
121
122#endif
123
124 /* Call the Matrix multiplication process function */
125 arm_mat_mult_f32(&srcA, &srcB, &dstC);
126
127 /* Call the Max function to calculate max marks among numStudents */
128 arm_max_f32(testOutput, numStudents, &max_marks, &student_num);
129
130 /* Call the Min function to calculate min marks among numStudents */
131 arm_min_f32(testOutput, numStudents, &min_marks, &student_num);
132
133 /* Call the Mean function to calculate mean */
134 arm_mean_f32(testOutput, numStudents, &mean);
135
136 /* Call the std function to calculate standard deviation */
137 arm_std_f32(testOutput, numStudents, &std);
138
139 /* Call the var function to calculate variance */
140 arm_var_f32(testOutput, numStudents, &var);
141
142 printf("max_marks = %f, min_marks = %f, mean = %f, std = %f, var = %f\n", max_marks, min_marks, mean, std, var);
143
144 while (1);
145}
146
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
testMarks_f32
const float32_t testMarks_f32[(20 *4)]
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:46
std
float32_t std
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:90
var
float32_t var
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:90
numSubjects
uint32_t numSubjects
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:89
student_num
uint32_t student_num
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:91
NUMSUBJECTS
#define NUMSUBJECTS
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:84
testUnity_f32
const float32_t testUnity_f32[4]
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:72
NUMSTUDENTS
#define NUMSTUDENTS
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:83
max_marks
float32_t max_marks
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:90
numStudents
uint32_t numStudents
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:88
min_marks
float32_t min_marks
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:90
TEST_LENGTH_SAMPLES
#define TEST_LENGTH_SAMPLES
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:43
mean
float32_t mean
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:90
testOutput
static float32_t testOutput[(20 *4)]
Definition: project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c:79
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • cortex_m4
  • fpu
  • inc
project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • cortex_m4
  • fpu
  • inc
project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • cortex_m4
  • fpu
  • inc
project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • cortex_m4
  • fpu
  • src
Functions
project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • cortex_m4
  • fpu
  • src
project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • cortex_m4
  • fpu
  • src
Functions
project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • cortex_m4
  • fpu
  • src
project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • cortex_m4
  • fpu
  • src
Macros | Functions | Variables
project/at_start_f437/examples/cortex_m4/fpu/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "julia_fpu.h"

Go to the source code of this file.

Macros

#define | SCREEN_X_SIZE ((uint16_t)320)
#define | SCREEN_Y_SIZE ((uint16_t)240)
#define | ZOOM ((uint16_t)100)

Functions

int main (void)
main function. More...

Variables

uint8_t buffer [((uint16_t) 320) *((uint16_t) 240)]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/cortex_m4/fpu/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • cortex_m4
  • fpu
  • src
project/at_start_f437/examples/cortex_m4/fpu/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "julia_fpu.h"
30
39#define SCREEN_X_SIZE ((uint16_t)320)
40#define SCREEN_Y_SIZE ((uint16_t)240)
41#define ZOOM ((uint16_t)100)
42
43uint8_t buffer[SCREEN_X_SIZE * SCREEN_Y_SIZE];
44
50int main(void)
51{
52 system_clock_config();
53
54 at32_board_init();
55
56 while(1)
57 {
58 at32_led_toggle(LED4);
59
60 generate_julia_fpu(SCREEN_X_SIZE, SCREEN_Y_SIZE, SCREEN_X_SIZE / 2, SCREEN_Y_SIZE / 2, ZOOM, buffer);
61 }
62}
63
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
SCREEN_X_SIZE
#define SCREEN_X_SIZE
Definition: project/at_start_f437/examples/cortex_m4/fpu/src/main.c:39
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f437/examples/cortex_m4/fpu/src/main.c:43
ZOOM
#define ZOOM
Definition: project/at_start_f437/examples/cortex_m4/fpu/src/main.c:41
SCREEN_Y_SIZE
#define SCREEN_Y_SIZE
Definition: project/at_start_f437/examples/cortex_m4/fpu/src/main.c:40
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
generate_julia_fpu
void generate_julia_fpu(uint16_t size_x, uint16_t size_y, uint16_t offset_x, uint16_t offset_y, uint16_t zoom, uint8_t *buffer)
julia calculation test with fpu option enable or disable
Definition: at_start_f437/examples/cortex_m4/fpu/src/julia_fpu.c:48
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • cortex_m4
  • systick_interrupt
  • inc
project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • cortex_m4
  • systick_interrupt
  • inc
project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • cortex_m4
  • systick_interrupt
  • inc
project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • cortex_m4
  • systick_interrupt
  • src
Functions
project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • cortex_m4
  • systick_interrupt
  • src
project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • cortex_m4
  • systick_interrupt
  • src
Functions
project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | systick_handler (void)
systick interrupt handler. More...
void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • cortex_m4
  • systick_interrupt
  • src
project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
30extern void systick_handler(void);
31
45void NMI_Handler(void)
46{
47}
48
54void HardFault_Handler(void)
55{
56 /* go to infinite loop when hard fault exception occurs */
57 while(1)
58 {
59 }
60}
61
67void MemManage_Handler(void)
68{
69 /* go to infinite loop when memory manage exception occurs */
70 while(1)
71 {
72 }
73}
74
80void BusFault_Handler(void)
81{
82 /* go to infinite loop when bus fault exception occurs */
83 while(1)
84 {
85 }
86}
87
93void UsageFault_Handler(void)
94{
95 /* go to infinite loop when usage fault exception occurs */
96 while(1)
97 {
98 }
99}
100
106void SVC_Handler(void)
107{
108}
109
115void DebugMon_Handler(void)
116{
117}
118
124void PendSV_Handler(void)
125{
126}
127
133void SysTick_Handler(void)
134{
135 systick_handler();
136}
137
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
systick_handler
void systick_handler(void)
systick interrupt handler.
Definition: project/at_start_f435/examples/cortex_m4/systick_interrupt/src/main.c:45
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • cortex_m4
  • systick_interrupt
  • src
Macros | Functions
project/at_start_f437/examples/cortex_m4/systick_interrupt/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | MS_TICK (system_core_clock / 1000U)
#define | DELAY 200 /* 200 ms ticks */

Functions

void | systick_handler (void)
systick interrupt handler. More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/cortex_m4/systick_interrupt/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • cortex_m4
  • systick_interrupt
  • src
project/at_start_f437/examples/cortex_m4/systick_interrupt/src/main.c
Go to the documentation of this file.
1
26#include "at32f435_437_board.h"
27#include "at32f435_437_clock.h"
28
37#define MS_TICK (system_core_clock / 1000U)
38#define DELAY 200 /* 200 ms ticks */
39
45void systick_handler(void)
46{
47 static uint32_t ticks = 0;
48
49 ticks ++;
50
51 /* toggle led */
52 if(ticks > DELAY)
53 {
54 at32_led_toggle(LED2);
55 ticks = 0;
56 }
57}
58
64int main(void)
65{
66 system_clock_config();
67
68 /* config systick clock source */
69 systick_clock_source_config(SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV);
70
71 /* config systick reload value and enable interrupt */
72 SysTick_Config(MS_TICK);
73
74 /* configure led */
75 at32_led_init(LED2);
76
77 while(1)
78 {
79 }
80}
81
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
MS_TICK
#define MS_TICK
Definition: project/at_start_f437/examples/cortex_m4/systick_interrupt/src/main.c:37
DELAY
#define DELAY
Definition: project/at_start_f437/examples/cortex_m4/systick_interrupt/src/main.c:38
systick_handler
void systick_handler(void)
systick interrupt handler.
Definition: project/at_start_f437/examples/cortex_m4/systick_interrupt/src/main.c:45
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_init
void at32_led_init(led_type led)
configure led gpio
Definition: at32f435_437_board.c:218
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
systick_clock_source_config
void systick_clock_source_config(systick_clock_source_type source)
config systick clock source
Definition: at32f435_437_misc.c:147
SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV
@ SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV
Definition: at32f435_437_misc.h:90
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • crc
  • calculation
  • inc
project/at_start_f437/examples/crc/calculation/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • crc
  • calculation
  • inc
project/at_start_f437/examples/crc/calculation/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • crc
  • calculation
  • inc
project/at_start_f437/examples/crc/calculation/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • crc
  • calculation
  • src
Functions
project/at_start_f437/examples/crc/calculation/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/crc/calculation/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • crc
  • calculation
  • src
project/at_start_f437/examples/crc/calculation/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/crc/calculation/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • crc
  • calculation
  • src
Functions
project/at_start_f437/examples/crc/calculation/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/crc/calculation/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • crc
  • calculation
  • src
project/at_start_f437/examples/crc/calculation/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • crc
  • calculation
  • src
Macros | Functions | Variables
project/at_start_f437/examples/crc/calculation/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 120

Functions

int main (void)
main function. More...

Variables

static const uint32_t | data_buffer [120]
__IO uint32_t | crc_value = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/crc/calculation/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • crc
  • calculation
  • src
project/at_start_f437/examples/crc/calculation/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 120
39
40static const uint32_t data_buffer[BUFFER_SIZE] =
41{
42 0xc33dd31c, 0xe37ff35e, 0x129022f3, 0x32d24235, 0x52146277, 0x7256b5ea,
43 0x4a755a54, 0x6a377a16, 0x0af11ad0, 0x2ab33a92, 0xed0fdd6c, 0xcd4dbdaa,
44 0xbb3bab1a, 0x6ca67c87, 0x5cc52c22, 0x3c030c60, 0x1c41edae, 0xfd8fcdec,
45 0xad8b9de8, 0x8dc97c26, 0x5c644c45, 0x3ca22c83, 0x1ce00cc1, 0xef1fff3e,
46 0x95a88589, 0xf56ee54f, 0xd52cc50d, 0x34e224c3, 0x04817466, 0x64475424,
47 0x78066827, 0x18c008e1, 0x28a3cb7d, 0xdb5ceb3f, 0xfb1e8bf9, 0x9bd8abbb,
48 0xdf7caf9b, 0xbfba8fd9, 0x9ff86e17, 0x7e364e55, 0x2e933eb2, 0x0ed11ef0,
49 0xa35ad3bd, 0xc39cf3ff, 0xe3de2462, 0x34430420, 0x64e674c7, 0x44a45485,
50 0xad2abd0b, 0x8d689d49, 0x7e976eb6, 0x5ed54ef4, 0x2e321e51, 0x0e70ff9f,
51 0xefbedfdd, 0xcffcbf1b, 0x9f598f78, 0x918881a9, 0xb1caa1eb, 0xd10cc12d,
52 0xe16f1080, 0x00a130c2, 0x20e35004, 0x40257046, 0x83b99398, 0xa3fbb3da,
53 0x00001021, 0x20423063, 0x408450a5, 0x60c670e7, 0x9129a14a, 0xb16bc18c,
54 0x569546b4, 0xb75ba77a, 0x97198738, 0xf7dfe7fe, 0xc7bc48c4, 0x58e56886,
55 0x4405a7db, 0xb7fa8799, 0xe75ff77e, 0xc71dd73c, 0x26d336f2, 0x069116b0,
56 0x76764615, 0x5634d94c, 0xc96df90e, 0xe92f99c8, 0xb98aa9ab, 0x58444865,
57 0x78a70840, 0x18612802, 0xc9ccd9ed, 0xe98ef9af, 0x89489969, 0xa90ab92b,
58 0xd1ade1ce, 0xf1ef1231, 0x32732252, 0x52b54294, 0x72f762d6, 0x93398318,
59 0xa56ab54b, 0x85289509, 0xf5cfc5ac, 0xd58d3653, 0x26721611, 0x063076d7,
60 0x8d689d49, 0xf7dfe7fe, 0xe98ef9af, 0x063076d7, 0x93398318, 0xb98aa9ab,
61 0x4ad47ab7, 0x6a961a71, 0x0a503a33, 0x2a12dbfd, 0xfbbfeb9e, 0x9b798b58
62};
63
64__IO uint32_t crc_value = 0;
65
71int main(void)
72{
73 system_clock_config();
74
75 at32_board_init();
76
77 /* enable crc clock */
78 crm_periph_clock_enable(CRM_CRC_PERIPH_CLOCK, TRUE);
79
80 crc_data_reset();
81
82 /* compute the crc of "data_buffer" */
83 crc_value = crc_block_calculate((uint32_t *)data_buffer, BUFFER_SIZE);
84
85 if(crc_value == 0xE5DFCF6D)
86 {
87 /* turn on led3 */
88 at32_led_on(LED3);
89 }
90 else
91 {
92 /* turn on led4 */
93 at32_led_on(LED4);
94 }
95
96 while(1)
97 {
98 }
99}
100
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/crc/calculation/src/main.c:38
data_buffer
static const uint32_t data_buffer[120]
Definition: project/at_start_f437/examples/crc/calculation/src/main.c:40
crc_value
__IO uint32_t crc_value
Definition: project/at_start_f437/examples/crc/calculation/src/main.c:64
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crc_block_calculate
uint32_t crc_block_calculate(uint32_t *pbuffer, uint32_t length)
compute the 32-bit crc of a given buffer of data word(32-bit).
Definition: at32f435_437_crc.c:72
crc_data_reset
void crc_data_reset(void)
reset the crc data register.
Definition: at32f435_437_crc.c:49
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_CRC_PERIPH_CLOCK
@ CRM_CRC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:113
TRUE
@ TRUE
Definition: at32f435_437.h:379
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • crm
  • clock_failure_detection
  • inc
project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • crm
  • clock_failure_detection
  • inc
project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • crm
  • clock_failure_detection
  • inc
project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • crm
  • clock_failure_detection
  • src
Functions
project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • crm
  • clock_failure_detection
  • src
project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • crm
  • clock_failure_detection
  • src
Functions
project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | clock_failure_detection_handler (void)
clock failure detection handler. More...
void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • crm
  • clock_failure_detection
  • src
project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
30extern void clock_failure_detection_handler(void);
31
45void NMI_Handler(void)
46{
47 clock_failure_detection_handler();
48}
49
55void HardFault_Handler(void)
56{
57 /* go to infinite loop when hard fault exception occurs */
58 while(1)
59 {
60 }
61}
62
68void MemManage_Handler(void)
69{
70 /* go to infinite loop when memory manage exception occurs */
71 while(1)
72 {
73 }
74}
75
81void BusFault_Handler(void)
82{
83 /* go to infinite loop when bus fault exception occurs */
84 while(1)
85 {
86 }
87}
88
94void UsageFault_Handler(void)
95{
96 /* go to infinite loop when usage fault exception occurs */
97 while(1)
98 {
99 }
100}
101
107void SVC_Handler(void)
108{
109}
110
116void DebugMon_Handler(void)
117{
118}
119
125void PendSV_Handler(void)
126{
127}
128
134void SysTick_Handler(void)
135{
136}
137
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
clock_failure_detection_handler
void clock_failure_detection_handler(void)
clock failure detection handler.
Definition: project/at_start_f435/examples/crm/clock_failure_detection/src/main.c:76
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • crm
  • clock_failure_detection
  • src
Functions
project/at_start_f437/examples/crm/clock_failure_detection/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | clkout_config (void)
clkout configuration. More...
static void | sclk_288m_hick_config (void)
system clock config program More...
void | clock_failure_detection_handler (void)
clock failure detection handler. More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/crm/clock_failure_detection/src/main.c.

Function Documentation

◆ clkout_config()

static void clkout_config ( void )
static

clkout configuration.

Parameters
none
Return values
none

< gpio pins number 8

Definition at line 47 of file project/at_start_f437/examples/crm/clock_failure_detection/src/main.c.

Referenced by sclk_288m_hick_config().

◆ sclk_288m_hick_config()

static void sclk_288m_hick_config ( void )
static

system clock config program

Note
the system clock is configured as follow:
  • system clock = (hick * pll_ns)/(pll_ms * pll_fr)
  • system clock source = pll (hick)
  • hext = 8000000
  • sclk = 288000000
  • ahbdiv = 1
  • ahbclk = 288000000
  • apb2div = 2
  • apb2clk = 144000000
  • apb1div = 2
  • apb1clk = 144000000
  • pll_ns = 72
  • pll_ms = 1
  • pll_fr = 2
Parameters
none
Return values
none

< high speed internal clock stable flag

< phase locking loop stable flag

Definition at line 111 of file project/at_start_f437/examples/crm/clock_failure_detection/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • crm
  • clock_failure_detection
  • src
project/at_start_f437/examples/crm/clock_failure_detection/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38static void clkout_config(void);
39static void sclk_288m_hick_config(void);
40void clock_failure_detection_handler(void);
41
47static void clkout_config(void)
48{
49 gpio_init_type gpio_init_struct;
50
51 /* enable gpio port clock */
52 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
53
54 /* set default parameter */
55 gpio_default_para_init(&gpio_init_struct);
56
57 /* clkout gpio init */
58 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
59 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
60 gpio_init_struct.gpio_pins = GPIO_PINS_8;
61 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
62 gpio_init(GPIOA, &gpio_init_struct);
63
64 /* config clkout division */
65 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_4, CRM_CLKOUT_DIV2_1);
66
67 /* config clkout1 clock */
68 crm_clock_out1_set(CRM_CLKOUT1_PLL);
69}
70
76void clock_failure_detection_handler(void)
77{
78 /* check clock failure detection flag */
79 if(crm_flag_get(CRM_CLOCK_FAILURE_INT_FLAG) != RESET)
80 {
81 /* disable clock failure detection */
82 crm_clock_failure_detection_enable(FALSE);
83
84 /* config system clock */
85 sclk_288m_hick_config();
86
87 /* clear clock failure detection flag */
88 crm_flag_clear(CRM_CLOCK_FAILURE_INT_FLAG);
89 }
90}
91
111static void sclk_288m_hick_config(void)
112{
113 /* enable pwc periph clock */
114 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
115
116 /* config ldo voltage */
117 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
118
119 /* set the flash clock divider */
120 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
121
122 /* reset crm */
123 crm_reset();
124
125 crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE);
126
127 /* wait till hick is ready */
128 while(crm_flag_get(CRM_HICK_STABLE_FLAG) != SET)
129 {
130 }
131
132 /* config pll clock resource */
133 crm_pll_config(CRM_PLL_SOURCE_HICK, 72, 1, CRM_PLL_FR_2);
134
135 /* enable pll */
136 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
137
138 /* wait till pll is ready */
139 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
140 {
141 }
142
143 /* config ahbclk */
144 crm_ahb_div_set(CRM_AHB_DIV_1);
145
146 /* config apb2clk */
147 crm_apb2_div_set(CRM_APB2_DIV_2);
148
149 /* config apb1clk */
150 crm_apb1_div_set(CRM_APB1_DIV_2);
151
152 /* enable auto step mode */
153 crm_auto_step_mode_enable(TRUE);
154
155 /* select pll as system clock source */
156 crm_sysclk_switch(CRM_SCLK_PLL);
157
158 /* wait till pll is used as system clock source */
159 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
160 {
161 }
162
163 /* disable auto step mode */
164 crm_auto_step_mode_enable(FALSE);
165
166 /* update system_core_clock global variable */
167 system_core_clock_update();
168
169 /* config systick delay */
170 delay_init();
171
172 /* config clkout */
173 clkout_config();
174}
175
181int main(void)
182{
183 system_clock_config();
184
185 at32_board_init();
186
187 /* clkout config */
188 clkout_config();
189
190 /* enable clock failure detection */
191 crm_clock_failure_detection_enable(TRUE);
192
193 while(1)
194 {
195 at32_led_toggle(LED2);
196 delay_ms(200);
197 }
198}
199
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
clock_failure_detection_handler
void clock_failure_detection_handler(void)
clock failure detection handler.
Definition: project/at_start_f435/examples/crm/clock_failure_detection/src/main.c:76
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
LED2
@ LED2
Definition: at32f435_437_board.h:65
delay_init
void delay_init()
initialize delay function
Definition: at32f435_437_board.c:293
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_flag_clear
void crm_flag_clear(uint32_t flag)
clear the crm reset flags
Definition: at32f435_437_crm.c:358
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_clock_failure_detection_enable
void crm_clock_failure_detection_enable(confirm_state new_state)
enable or disable clock failure detection
Definition: at32f435_437_crm.c:531
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_HICK
@ CRM_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:559
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLKOUT_DIV1_4
@ CRM_CLKOUT_DIV1_4
Definition: at32f435_437_crm.h:728
CRM_PLL_SOURCE_HICK
@ CRM_PLL_SOURCE_HICK
Definition: at32f435_437_crm.h:537
CRM_CLKOUT_DIV2_1
@ CRM_CLKOUT_DIV2_1
Definition: at32f435_437_crm.h:737
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
CRM_CLOCK_FAILURE_INT_FLAG
#define CRM_CLOCK_FAILURE_INT_FLAG
Definition: at32f435_437_crm.h:72
CRM_HICK_STABLE_FLAG
#define CRM_HICK_STABLE_FLAG
Definition: at32f435_437_crm.h:55
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
clkout_config
static void clkout_config(void)
clkout configuration.
Definition: project/at_start_f437/examples/crm/clock_failure_detection/src/main.c:47
sclk_288m_hick_config
static void sclk_288m_hick_config(void)
system clock config program
Definition: project/at_start_f437/examples/crm/clock_failure_detection/src/main.c:111
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • crm
  • pll_parameter_calculate
  • inc
project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • crm
  • pll_parameter_calculate
  • inc
project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • crm
  • pll_parameter_calculate
  • inc
project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • crm
  • pll_parameter_calculate
  • src
Functions
project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • crm
  • pll_parameter_calculate
  • src
project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • crm
  • pll_parameter_calculate
  • src
Functions
project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • crm
  • pll_parameter_calculate
  • src
project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • crm
  • pll_parameter_calculate
  • src
Functions | Variables
project/at_start_f437/examples/crm/pll_parameter_calculate/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | clkout_config (void)
clkout configuration. More...
void | system_clock_config_200mhz (void)
system clock config 200mhz More...
int | main (void)
main function. More...

Variables

error_status calculate_status = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/crm/pll_parameter_calculate/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • crm
  • pll_parameter_calculate
  • src
project/at_start_f437/examples/crm/pll_parameter_calculate/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 error_status calculate_status = ERROR;
39
45void clkout_config(void)
46{
47 gpio_init_type gpio_init_struct;
48
49 /* enable gpio port clock */
50 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
51
52 /* set default parameter */
53 gpio_default_para_init(&gpio_init_struct);
54
55 /* clkout gpio init */
56 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
57 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
58 gpio_init_struct.gpio_pins = GPIO_PINS_8;
59 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
60 gpio_init(GPIOA, &gpio_init_struct);
61
62 /* config clkout division */
63 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_4, CRM_CLKOUT_DIV2_1);
64
65 /* config clkout1 clock */
66 crm_clock_out1_set(CRM_CLKOUT1_PLL);
67}
68
86void system_clock_config_200mhz(void)
87{
88 uint16_t pll_ns, pll_ms, pll_fr;
89
90 /* enable pwc periph clock */
91 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
92
93 /* config ldo voltage */
94 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
95
96 /* set the flash clock divider */
97 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
98
99 /* reset crm */
100 crm_reset();
101
102 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
103
104 /* wait till hext is ready */
105 while(crm_hext_stable_wait() == ERROR)
106 {
107 }
108
109 /* calculate pll parameter according to the function */
110 calculate_status = crm_pll_parameter_calculate(CRM_PLL_SOURCE_HEXT, 200000000, &pll_ms, &pll_ns, &pll_fr);
111
112 /* config pll clock resource */
113 crm_pll_config(CRM_PLL_SOURCE_HEXT, pll_ns, pll_ms, (crm_pll_fr_type)pll_fr);
114
115 /* enable pll */
116 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
117
118 /* wait till pll is ready */
119 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
120 {
121 }
122
123 /* config ahbclk */
124 crm_ahb_div_set(CRM_AHB_DIV_1);
125
126 /* config apb2clk */
127 crm_apb2_div_set(CRM_APB2_DIV_2);
128
129 /* config apb1clk */
130 crm_apb1_div_set(CRM_APB1_DIV_2);
131
132 /* enable auto step mode */
133 crm_auto_step_mode_enable(TRUE);
134
135 /* select pll as system clock source */
136 crm_sysclk_switch(CRM_SCLK_PLL);
137
138 /* wait till pll is used as system clock source */
139 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
140 {
141 }
142
143 /* disable auto step mode */
144 crm_auto_step_mode_enable(FALSE);
145
146 /* update system_core_clock global variable */
147 system_core_clock_update();
148}
149
155int main(void)
156{
157 system_clock_config_200mhz();
158
159 at32_board_init();
160
161 clkout_config();
162
163 while(1)
164 {
165 if(calculate_status == ERROR)
166 {
167 at32_led_toggle(LED2);
168 }
169 else
170 {
171 at32_led_toggle(LED4);
172 }
173 delay_ms(500);
174 }
175}
176
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
clkout_config
void clkout_config(void)
clkout configuration.
Definition: project/at_start_f435/examples/crm/pll_parameter_calculate/src/main.c:45
calculate_status
error_status calculate_status
Definition: project/at_start_f437/examples/crm/pll_parameter_calculate/src/main.c:38
system_clock_config_200mhz
void system_clock_config_200mhz(void)
system clock config 200mhz
Definition: project/at_start_f435/examples/crm/pll_parameter_calculate/src/main.c:86
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_pll_parameter_calculate
error_status crm_pll_parameter_calculate(crm_pll_clock_source_type pll_rcs, uint32_t target_sclk_freq, uint16_t *ret_ms, uint16_t *ret_ns, uint16_t *ret_fr)
calculate the pll parameters with pll reference clock and target pll output frequency....
Definition: at32f435_437_crm.c:904
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
crm_pll_fr_type
crm_pll_fr_type
crm pll fr
Definition: at32f435_437_crm.h:545
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_CLKOUT_DIV1_4
@ CRM_CLKOUT_DIV1_4
Definition: at32f435_437_crm.h:728
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_CLKOUT_DIV2_1
@ CRM_CLKOUT_DIV2_1
Definition: at32f435_437_crm.h:737
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • crm
  • sysclk_switch
  • inc
project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • crm
  • sysclk_switch
  • inc
project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • crm
  • sysclk_switch
  • inc
project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • crm
  • sysclk_switch
  • src
Functions
project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • crm
  • sysclk_switch
  • src
project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • crm
  • sysclk_switch
  • src
Functions
project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • crm
  • sysclk_switch
  • src
project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • crm
  • sysclk_switch
  • src
Functions
project/at_start_f437/examples/crm/sysclk_switch/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | clkout_config (void)
clkout configuration. More...
static void | sclk_64m_hick_config (void)
config sclk 64 mhz with hick clock source. More...
static void | sclk_96m_hext_config (void)
config sclk 96 mhz with hext clock source. More...
static void | switch_system_clock (void)
sclk switch function. More...
static void | clkout_config (void)
clkout configuration. More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/crm/sysclk_switch/src/main.c.

Function Documentation

◆ sclk_64m_hick_config()

static void sclk_64m_hick_config ( void )
static

config sclk 64 mhz with hick clock source.

Note
the system clock is configured as follow:
  • system clock = (hick * pll_ns)/(pll_ms * pll_fr)
  • system clock source = pll (hick)
  • hext = 8000000
  • sclk = 64000000
  • ahbdiv = 1
  • ahbclk = 64000000
  • apb2div = 2
  • apb2clk = 32000000
  • apb1div = 2
  • apb1clk = 32000000
  • pll_ns = 64
  • pll_ms = 1
  • pll_fr = 8
Parameters
none
Return values
none

< high speed internal clock stable flag

< phase locking loop stable flag

Definition at line 108 of file project/at_start_f437/examples/crm/sysclk_switch/src/main.c.

Referenced by switch_system_clock().

◆ sclk_96m_hext_config()

static void sclk_96m_hext_config ( void )
static

config sclk 96 mhz with hext clock source.

Note
the system clock is configured as follow:
  • system clock = (hext * pll_ns)/(pll_ms * pll_fr)
  • system clock source = pll (hext)
  • hext = 8000000
  • sclk = 96000000
  • ahbdiv = 1
  • ahbclk = 96000000
  • apb2div = 2
  • apb2clk = 48000000
  • apb1div = 2
  • apb1clk = 48000000
  • pll_ns = 96
  • pll_ms = 1
  • pll_fr = 8
Parameters
none
Return values
none

< phase locking loop stable flag

Definition at line 195 of file project/at_start_f437/examples/crm/sysclk_switch/src/main.c.

Referenced by switch_system_clock().

◆ switch_system_clock()

static void switch_system_clock ( void )
static

sclk switch function.

Parameters
none
Return values
none

Definition at line 77 of file project/at_start_f437/examples/crm/sysclk_switch/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • crm
  • sysclk_switch
  • src
project/at_start_f437/examples/crm/sysclk_switch/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38static void clkout_config(void);
39static void sclk_64m_hick_config(void);
40static void sclk_96m_hext_config(void);
41static void switch_system_clock(void);
42
48void clkout_config(void)
49{
50 gpio_init_type gpio_init_struct;
51
52 /* enable gpio port clock */
53 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
54
55 /* set default parameter */
56 gpio_default_para_init(&gpio_init_struct);
57
58 /* clkout gpio init */
59 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
60 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
61 gpio_init_struct.gpio_pins = GPIO_PINS_8;
62 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
63 gpio_init(GPIOA, &gpio_init_struct);
64
65 /* config clkout division */
66 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_4, CRM_CLKOUT_DIV2_1);
67
68 /* config clkout1 clock */
69 crm_clock_out1_set(CRM_CLKOUT1_PLL);
70}
71
77static void switch_system_clock(void)
78{
79 if(CRM->pllcfg_bit.pllrcs == RESET)
80 {
81 sclk_96m_hext_config();
82 }
83 else
84 {
85 sclk_64m_hick_config();
86 }
87}
88
108static void sclk_64m_hick_config(void)
109{
110 /* enable pwc periph clock */
111 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
112
113 /* config ldo voltage */
114 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
115
116 /* set the flash clock divider */
117 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
118
119 /* reset crm */
120 crm_reset();
121
122 crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE);
123
124 /* wait till hick is ready */
125 while(crm_flag_get(CRM_HICK_STABLE_FLAG) != SET)
126 {
127 }
128
129 /* config pll clock resource */
130 crm_pll_config(CRM_PLL_SOURCE_HICK, 64, 1, CRM_PLL_FR_8);
131
132 /* enable pll */
133 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
134
135 /* wait till pll is ready */
136 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
137 {
138 }
139
140 /* config ahbclk */
141 crm_ahb_div_set(CRM_AHB_DIV_1);
142
143 /* config apb2clk */
144 crm_apb2_div_set(CRM_APB2_DIV_2);
145
146 /* config apb1clk */
147 crm_apb1_div_set(CRM_APB1_DIV_2);
148
149 /* enable auto step mode */
150 crm_auto_step_mode_enable(TRUE);
151
152 /* select pll as system clock source */
153 crm_sysclk_switch(CRM_SCLK_PLL);
154
155 /* wait till pll is used as system clock source */
156 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
157 {
158 }
159
160 /* disable auto step mode */
161 crm_auto_step_mode_enable(FALSE);
162
163 /* update system_core_clock global variable */
164 system_core_clock_update();
165
166 /* set the flash clock divider */
167 flash_clock_divider_set(FLASH_CLOCK_DIV_2);
168
169 /* config systick delay */
170 delay_init();
171
172 /* config clkout */
173 clkout_config();
174}
175
195static void sclk_96m_hext_config(void)
196{
197 /* enable pwc periph clock */
198 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
199
200 /* config ldo voltage */
201 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
202
203 /* set the flash clock divider */
204 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
205
206 /* reset crm */
207 crm_reset();
208
209 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
210
211 /* wait till hext is ready */
212 while(crm_hext_stable_wait() == ERROR)
213 {
214 }
215
216 /* config pll clock resource */
217 crm_pll_config(CRM_PLL_SOURCE_HEXT, 96, 1, CRM_PLL_FR_8);
218
219 /* enable pll */
220 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
221
222 /* wait till pll is ready */
223 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
224 {
225 }
226
227 /* config ahbclk */
228 crm_ahb_div_set(CRM_AHB_DIV_1);
229
230 /* config apb2clk */
231 crm_apb2_div_set(CRM_APB2_DIV_2);
232
233 /* config apb1clk */
234 crm_apb1_div_set(CRM_APB1_DIV_2);
235
236 /* enable auto step mode */
237 crm_auto_step_mode_enable(TRUE);
238
239 /* select pll as system clock source */
240 crm_sysclk_switch(CRM_SCLK_PLL);
241
242 /* wait till pll is used as system clock source */
243 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
244 {
245 }
246
247 /* disable auto step mode */
248 crm_auto_step_mode_enable(FALSE);
249
250 /* update system_core_clock global variable */
251 system_core_clock_update();
252
253 /* set the flash clock divider */
254 flash_clock_divider_set(FLASH_CLOCK_DIV_2);
255
256 /* config systick delay */
257 delay_init();
258
259 /* config clkout */
260 clkout_config();
261}
262
268int main(void)
269{
270 system_clock_config();
271
272 at32_board_init();
273
274 clkout_config();
275
276 while(1)
277 {
278 if(at32_button_press() == USER_BUTTON)
279 {
280 switch_system_clock();
281 at32_led_toggle(LED4);
282 }
283 at32_led_toggle(LED2);
284 delay_ms(100);
285 }
286}
287
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
clkout_config
static void clkout_config(void)
clkout configuration.
Definition: project/at_start_f435/examples/crm/pll_parameter_calculate/src/main.c:45
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
delay_init
void delay_init()
initialize delay function
Definition: at32f435_437_board.c:293
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_HICK
@ CRM_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:559
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_CLKOUT_DIV1_4
@ CRM_CLKOUT_DIV1_4
Definition: at32f435_437_crm.h:728
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_PLL_SOURCE_HICK
@ CRM_PLL_SOURCE_HICK
Definition: at32f435_437_crm.h:537
CRM_CLKOUT_DIV2_1
@ CRM_CLKOUT_DIV2_1
Definition: at32f435_437_crm.h:737
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_8
@ CRM_PLL_FR_8
Definition: at32f435_437_crm.h:549
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
CRM_HICK_STABLE_FLAG
#define CRM_HICK_STABLE_FLAG
Definition: at32f435_437_crm.h:55
CRM
#define CRM
Definition: at32f435_437_crm.h:1506
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_2
@ FLASH_CLOCK_DIV_2
Definition: at32f435_437_flash.h:190
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
sclk_96m_hext_config
static void sclk_96m_hext_config(void)
config sclk 96 mhz with hext clock source.
Definition: project/at_start_f437/examples/crm/sysclk_switch/src/main.c:195
sclk_64m_hick_config
static void sclk_64m_hick_config(void)
config sclk 64 mhz with hick clock source.
Definition: project/at_start_f437/examples/crm/sysclk_switch/src/main.c:108
switch_system_clock
static void switch_system_clock(void)
sclk switch function.
Definition: project/at_start_f437/examples/crm/sysclk_switch/src/main.c:77
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • dac
  • double_mode_dma_sinewave
  • inc
project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • dac
  • double_mode_dma_sinewave
  • inc
project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • dac
  • double_mode_dma_sinewave
  • inc
project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • dac
  • double_mode_dma_sinewave
  • src
Functions
project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • dac
  • double_mode_dma_sinewave
  • src
project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • dac
  • double_mode_dma_sinewave
  • src
Functions
project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • dac
  • double_mode_dma_sinewave
  • src
project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • dac
  • double_mode_dma_sinewave
  • src
Functions | Variables
project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
dma_init_type dma_init_struct
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
const uint16_t | sine12bit [32]
uint32_t | dualsine12bit [32]
uint32_t | idx = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • dac
  • double_mode_dma_sinewave
  • src
project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 dma_init_type dma_init_struct;
40 crm_clocks_freq_type crm_clocks_freq_struct = {0};
41const uint16_t sine12bit[32] = {2047, 2447, 2831, 3185, 3498, 3750, 3939, 4056,
42 4095, 4056, 3939, 3750, 3495, 3185, 2831, 2447,
43 2047, 1647, 1263, 909, 599, 344, 155, 38,
44 0, 38, 155, 344, 599, 909, 1263, 1647};
45uint32_t dualsine12bit[32];
46uint32_t idx = 0;
47
53int main(void)
54{
55 system_clock_config();
56
57 at32_board_init();
58
59 /* turn led2/led3/led4 on */
60 at32_led_on(LED2);
61 at32_led_on(LED3);
62 at32_led_on(LED4);
63
64 /* enable dac/tmr2/gpioa clock */
65 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
66 crm_periph_clock_enable(CRM_DAC_PERIPH_CLOCK, TRUE);
67 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
68 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
69
70 /* once the dac is enabled, the corresponding gpio pin is automatically
71 connected to the dac converter. in order to avoid parasitic consumption,
72 the gpio pin should be configured in analog */
73 gpio_init_struct.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5;
74 gpio_init_struct.gpio_mode = GPIO_MODE_ANALOG;
75 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
76 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
77 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
78 gpio_init(GPIOA, &gpio_init_struct);
79
80 /* get system clock */
81 crm_clocks_freq_get(&crm_clocks_freq_struct);
82
83 /* (systemclock/(systemclock/1000000))/100 = 10KHz */
84 tmr_base_init(TMR2, 99, (crm_clocks_freq_struct.sclk_freq/1000000 - 1));
85 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
86
87 /* primary tmr2 output selection */
88 tmr_primary_mode_select(TMR2, TMR_PRIMARY_SEL_OVERFLOW);
89
90 /* dac1 and dac2 configuration */
91 dac_trigger_select(DAC1_SELECT, DAC_TMR2_TRGOUT_EVENT);
92 dac_trigger_select(DAC2_SELECT, DAC_TMR2_TRGOUT_EVENT);
93
94 dac_trigger_enable(DAC1_SELECT, TRUE);
95 dac_trigger_enable(DAC2_SELECT, TRUE);
96
97 dac_wave_generate(DAC1_SELECT, DAC_WAVE_GENERATE_NONE);
98 dac_wave_generate(DAC2_SELECT, DAC_WAVE_GENERATE_NONE);
99
100 dac_output_buffer_enable(DAC1_SELECT, FALSE);
101 dac_output_buffer_enable(DAC2_SELECT, FALSE);
102
103 dac_dma_enable(DAC1_SELECT, TRUE);
104 dac_dma_enable(DAC2_SELECT, TRUE);
105
106 /* fill sine32bit table */
107 for(idx = 0; idx < 32; idx++)
108 {
109 dualsine12bit[idx] = (sine12bit[idx] << 16) + (sine12bit[idx]);
110 }
111
112 /* dma1 channel1 configuration */
113 dma_reset(DMA1_CHANNEL1);
114 dma_init_struct.buffer_size = 32;
115 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
116 dma_init_struct.memory_base_addr = (uint32_t)dualsine12bit;
117 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_WORD;
118 dma_init_struct.memory_inc_enable = TRUE;
119 dma_init_struct.peripheral_base_addr = (uint32_t)0x40007420;
120 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_WORD;
121 dma_init_struct.peripheral_inc_enable = FALSE;
122 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
123 dma_init_struct.loop_mode_enable = TRUE;
124 dma_init(DMA1_CHANNEL1, &dma_init_struct);
125
126 /* enable dmamux function */
127 dmamux_enable(DMA1, TRUE);
128 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_DAC2);
129
130 dma_channel_enable(DMA1_CHANNEL1, TRUE);
131
132 /* enable dac1: once the dac1 is enabled, pa.04 is
133 automatically connected to the dac converter. */
134 dac_enable(DAC1_SELECT, TRUE);
135
136 /* enable dac2: once the dac2 is enabled, pa.05 is
137 automatically connected to the dac converter. */
138 dac_enable(DAC2_SELECT, TRUE);
139
140 /* enable tmr2 */
141 tmr_counter_enable(TMR2, TRUE);
142
143 while(1)
144 {
145 }
146}
147
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c:39
idx
uint32_t idx
Definition: project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c:46
sine12bit
const uint16_t sine12bit[32]
Definition: project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c:41
dualsine12bit
uint32_t dualsine12bit[32]
Definition: project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c:45
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c:40
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_DAC_PERIPH_CLOCK
@ CRM_DAC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:150
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dac_output_buffer_enable
void dac_output_buffer_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac output buffer
Definition: at32f435_437_dac.c:88
dac_dma_enable
void dac_dma_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac dma
Definition: at32f435_437_dac.c:268
dac_wave_generate
void dac_wave_generate(dac_select_type dac_select, dac_wave_type dac_wave)
generate dac wave
Definition: at32f435_437_dac.c:207
dac_trigger_select
void dac_trigger_select(dac_select_type dac_select, dac_trigger_type dac_trigger_source)
select dac trigger
Definition: at32f435_437_dac.c:146
dac_enable
void dac_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac
Definition: at32f435_437_dac.c:64
dac_trigger_enable
void dac_trigger_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac trigger
Definition: at32f435_437_dac.c:113
DAC2_SELECT
@ DAC2_SELECT
Definition: at32f435_437_dac.h:60
DAC1_SELECT
@ DAC1_SELECT
Definition: at32f435_437_dac.h:59
DAC_WAVE_GENERATE_NONE
@ DAC_WAVE_GENERATE_NONE
Definition: at32f435_437_dac.h:83
DAC_TMR2_TRGOUT_EVENT
@ DAC_TMR2_TRGOUT_EVENT
Definition: at32f435_437_dac.h:72
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_WORD
@ DMA_PERIPHERAL_DATA_WIDTH_WORD
Definition: at32f435_437_dma.h:164
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_MEMORY_DATA_WIDTH_WORD
@ DMA_MEMORY_DATA_WIDTH_WORD
Definition: at32f435_437_dma.h:174
DMA_PRIORITY_MEDIUM
@ DMA_PRIORITY_MEDIUM
Definition: at32f435_437_dma.h:183
DMAMUX_DMAREQ_ID_DAC2
@ DMAMUX_DMAREQ_ID_DAC2
Definition: at32f435_437_dma.h:201
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_primary_mode_select
void tmr_primary_mode_select(tmr_type *tmr_x, tmr_primary_select_type primary_mode)
select tmr primary mode
Definition: at32f435_437_tmr.c:1222
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_PRIMARY_SEL_OVERFLOW
@ TMR_PRIMARY_SEL_OVERFLOW
Definition: at32f435_437_tmr.h:121
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::sclk_freq
uint32_t sclk_freq
Definition: at32f435_437_crm.h:789
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • dac
  • double_mode_dma_squarewave
  • inc
project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • dac
  • double_mode_dma_squarewave
  • inc
project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • dac
  • double_mode_dma_squarewave
  • inc
project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • dac
  • double_mode_dma_squarewave
  • src
Functions
project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • dac
  • double_mode_dma_squarewave
  • src
project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • dac
  • double_mode_dma_squarewave
  • src
Functions
project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • dac
  • double_mode_dma_squarewave
  • src
project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • dac
  • double_mode_dma_squarewave
  • src
Functions | Variables
project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
dma_init_type dma_init_struct
uint32_t | dualsquare12bit [2] = {(0xfff | (0xfff << 16)), 0}

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • dac
  • double_mode_dma_squarewave
  • src
project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 dma_init_type dma_init_struct;
40
41uint32_t dualsquare12bit[2] = {(0xfff | (0xfff << 16)), 0};
42
48int main(void)
49{
50 system_clock_config();
51
52 at32_board_init();
53
54 /* turn led2/led3/led4 on */
55 at32_led_on(LED2);
56 at32_led_on(LED3);
57 at32_led_on(LED4);
58
59 /* enable dac/dma1/gpioa clock */
60 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
61 crm_periph_clock_enable(CRM_DAC_PERIPH_CLOCK, TRUE);
62 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
63
64 /* once the dac is enabled, the corresponding gpio pin is automatically
65 connected to the dac converter. in order to avoid parasitic consumption,
66 the gpio pin should be configured in analog */
67 gpio_init_struct.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5;
68 gpio_init_struct.gpio_mode = GPIO_MODE_ANALOG;
69 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
70 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
71 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
72 gpio_init(GPIOA, &gpio_init_struct);
73
74 /* dac1 and dac2 configuration */
75 dac_trigger_select(DAC1_SELECT, DAC_SOFTWARE_TRIGGER);
76 dac_trigger_select(DAC2_SELECT, DAC_SOFTWARE_TRIGGER);
77
78 dac_trigger_enable(DAC1_SELECT, TRUE);
79 dac_trigger_enable(DAC2_SELECT, TRUE);
80
81 dac_wave_generate(DAC1_SELECT, DAC_WAVE_GENERATE_NONE);
82 dac_wave_generate(DAC2_SELECT, DAC_WAVE_GENERATE_NONE);
83
84 dac_output_buffer_enable(DAC1_SELECT, TRUE);
85 dac_output_buffer_enable(DAC2_SELECT, TRUE);
86
87 dac_dma_enable(DAC1_SELECT, TRUE);
88 dac_dma_enable(DAC2_SELECT, TRUE);
89
90 /* dma1 channel1 configuration */
91 dma_reset(DMA1_CHANNEL1);
92 dma_init_struct.buffer_size = 2;
93 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
94 dma_init_struct.memory_base_addr = (uint32_t)dualsquare12bit;
95 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_WORD;
96 dma_init_struct.memory_inc_enable = TRUE;
97 dma_init_struct.peripheral_base_addr = (uint32_t)0x40007420;
98 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_WORD;
99 dma_init_struct.peripheral_inc_enable = FALSE;
100 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
101 dma_init_struct.loop_mode_enable = TRUE;
102 dma_init(DMA1_CHANNEL1, &dma_init_struct);
103
104 /* enable dmamux function */
105 dmamux_enable(DMA1, TRUE);
106 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_DAC2);
107
108 dma_channel_enable(DMA1_CHANNEL1, TRUE);
109
110 /* enable dac1: once the dac1 is enabled, pa.04 is
111 automatically connected to the dac converter. */
112 dac_enable(DAC1_SELECT, TRUE);
113
114 /* enable dac2: once the dac2 is enabled, pa.05 is
115 automatically connected to the dac converter. */
116 dac_enable(DAC2_SELECT, TRUE);
117
118 while(1)
119 {
120 delay_us(100);
121 dac_software_trigger_generate(DAC1_SELECT);
122 dac_software_trigger_generate(DAC2_SELECT);
123 }
124}
125
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/main.c:39
dualsquare12bit
uint32_t dualsquare12bit[2]
Definition: project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_DAC_PERIPH_CLOCK
@ CRM_DAC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:150
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dac_output_buffer_enable
void dac_output_buffer_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac output buffer
Definition: at32f435_437_dac.c:88
dac_dma_enable
void dac_dma_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac dma
Definition: at32f435_437_dac.c:268
dac_wave_generate
void dac_wave_generate(dac_select_type dac_select, dac_wave_type dac_wave)
generate dac wave
Definition: at32f435_437_dac.c:207
dac_software_trigger_generate
void dac_software_trigger_generate(dac_select_type dac_select)
generate dac software trigger
Definition: at32f435_437_dac.c:169
dac_trigger_select
void dac_trigger_select(dac_select_type dac_select, dac_trigger_type dac_trigger_source)
select dac trigger
Definition: at32f435_437_dac.c:146
dac_enable
void dac_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac
Definition: at32f435_437_dac.c:64
dac_trigger_enable
void dac_trigger_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac trigger
Definition: at32f435_437_dac.c:113
DAC2_SELECT
@ DAC2_SELECT
Definition: at32f435_437_dac.h:60
DAC1_SELECT
@ DAC1_SELECT
Definition: at32f435_437_dac.h:59
DAC_WAVE_GENERATE_NONE
@ DAC_WAVE_GENERATE_NONE
Definition: at32f435_437_dac.h:83
DAC_SOFTWARE_TRIGGER
@ DAC_SOFTWARE_TRIGGER
Definition: at32f435_437_dac.h:75
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_WORD
@ DMA_PERIPHERAL_DATA_WIDTH_WORD
Definition: at32f435_437_dma.h:164
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_MEMORY_DATA_WIDTH_WORD
@ DMA_MEMORY_DATA_WIDTH_WORD
Definition: at32f435_437_dma.h:174
DMA_PRIORITY_MEDIUM
@ DMA_PRIORITY_MEDIUM
Definition: at32f435_437_dma.h:183
DMAMUX_DMAREQ_ID_DAC2
@ DMAMUX_DMAREQ_ID_DAC2
Definition: at32f435_437_dma.h:201
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • dac
  • one_dac_dma_escalator
  • inc
project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • dac
  • one_dac_dma_escalator
  • inc
project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • dac
  • one_dac_dma_escalator
  • inc
project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • dac
  • one_dac_dma_escalator
  • src
Functions
project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • dac
  • one_dac_dma_escalator
  • src
project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • dac
  • one_dac_dma_escalator
  • src
Functions
project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • dac
  • one_dac_dma_escalator
  • src
project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • dac
  • one_dac_dma_escalator
  • src
Functions | Variables
project/at_start_f437/examples/dac/one_dac_dma_escalator/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
dma_init_type dma_init_struct
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
const uint8_t | escalator8bit [6] = {0x0, 0x33, 0x66, 0x99, 0xCC, 0xFF}

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/one_dac_dma_escalator/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • dac
  • one_dac_dma_escalator
  • src
project/at_start_f437/examples/dac/one_dac_dma_escalator/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 dma_init_type dma_init_struct;
40 crm_clocks_freq_type crm_clocks_freq_struct = {0};
41const uint8_t escalator8bit[6] = {0x0, 0x33, 0x66, 0x99, 0xCC, 0xFF};
42
48int main(void)
49{
50 system_clock_config();
51
52 at32_board_init();
53
54 /* turn led2/led3/led4 on */
55 at32_led_on(LED2);
56 at32_led_on(LED3);
57 at32_led_on(LED4);
58
59 /* enable dac/dma1/gpioa/tmr2 clock */
60 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
61 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
62 crm_periph_clock_enable(CRM_DAC_PERIPH_CLOCK, TRUE);
63 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
64
65 /* once the dac is enabled, the corresponding gpio pin is automatically
66 connected to the dac converter. in order to avoid parasitic consumption,
67 the gpio pin should be configured in analog */
68 gpio_init_struct.gpio_pins = GPIO_PINS_4;
69 gpio_init_struct.gpio_mode = GPIO_MODE_ANALOG;
70 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
71 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
72 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
73 gpio_init(GPIOA, &gpio_init_struct);
74
75 /* get system clock */
76 crm_clocks_freq_get(&crm_clocks_freq_struct);
77
78 /* (systemclock/(systemclock/1000000))/1000 = 1KHz */
79 tmr_base_init(TMR2, 999, (crm_clocks_freq_struct.sclk_freq/1000000 - 1));
80 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
81
82 /* primary tmr2 output selection */
83 tmr_primary_mode_select(TMR2, TMR_PRIMARY_SEL_OVERFLOW);
84
85 /* dac1 configuration */
86 dac_trigger_select(DAC1_SELECT, DAC_TMR2_TRGOUT_EVENT);
87
88 dac_trigger_enable(DAC1_SELECT, TRUE);
89
90 dac_wave_generate(DAC1_SELECT, DAC_WAVE_GENERATE_NONE);
91
92 dac_output_buffer_enable(DAC1_SELECT, FALSE);
93
94 dac_dma_enable(DAC1_SELECT, TRUE);
95
96 /* dma1 channel2 configuration */
97 dma_reset(DMA1_CHANNEL2);
98 dma_init_struct.buffer_size = 6;
99 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
100 dma_init_struct.memory_base_addr = (uint32_t)escalator8bit;
101 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
102 dma_init_struct.memory_inc_enable = TRUE;
103 dma_init_struct.peripheral_base_addr = (uint32_t)0x40007410;
104 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
105 dma_init_struct.peripheral_inc_enable = FALSE;
106 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
107 dma_init_struct.loop_mode_enable = TRUE;
108 dma_init(DMA1_CHANNEL2, &dma_init_struct);
109
110 /* enable dmamux function */
111 dmamux_enable(DMA1, TRUE);
112 dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_DAC1);
113
114 dma_channel_enable(DMA1_CHANNEL2, TRUE);
115
116 /* enable dac1: once the dac1 is enabled, pa.04 is
117 automatically connected to the dac converter. */
118 dac_enable(DAC1_SELECT, TRUE);
119
120 /* enable tmr2 */
121 tmr_counter_enable(TMR2, TRUE);
122 while(1)
123 {
124 }
125}
126
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/dac/one_dac_dma_escalator/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f437/examples/dac/one_dac_dma_escalator/src/main.c:39
escalator8bit
const uint8_t escalator8bit[6]
Definition: project/at_start_f437/examples/dac/one_dac_dma_escalator/src/main.c:41
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/dac/one_dac_dma_escalator/src/main.c:40
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_DAC_PERIPH_CLOCK
@ CRM_DAC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:150
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dac_output_buffer_enable
void dac_output_buffer_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac output buffer
Definition: at32f435_437_dac.c:88
dac_dma_enable
void dac_dma_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac dma
Definition: at32f435_437_dac.c:268
dac_wave_generate
void dac_wave_generate(dac_select_type dac_select, dac_wave_type dac_wave)
generate dac wave
Definition: at32f435_437_dac.c:207
dac_trigger_select
void dac_trigger_select(dac_select_type dac_select, dac_trigger_type dac_trigger_source)
select dac trigger
Definition: at32f435_437_dac.c:146
dac_enable
void dac_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac
Definition: at32f435_437_dac.c:64
dac_trigger_enable
void dac_trigger_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac trigger
Definition: at32f435_437_dac.c:113
DAC1_SELECT
@ DAC1_SELECT
Definition: at32f435_437_dac.h:59
DAC_WAVE_GENERATE_NONE
@ DAC_WAVE_GENERATE_NONE
Definition: at32f435_437_dac.h:83
DAC_TMR2_TRGOUT_EVENT
@ DAC_TMR2_TRGOUT_EVENT
Definition: at32f435_437_dac.h:72
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_BYTE
@ DMA_PERIPHERAL_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:162
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_MEMORY_DATA_WIDTH_BYTE
@ DMA_MEMORY_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:172
DMA_PRIORITY_MEDIUM
@ DMA_PRIORITY_MEDIUM
Definition: at32f435_437_dma.h:183
DMAMUX_DMAREQ_ID_DAC1
@ DMAMUX_DMAREQ_ID_DAC1
Definition: at32f435_437_dma.h:200
DMA1MUX_CHANNEL2
#define DMA1MUX_CHANNEL2
Definition: at32f435_437_dma.h:705
DMA1_CHANNEL2
#define DMA1_CHANNEL2
Definition: at32f435_437_dma.h:697
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_primary_mode_select
void tmr_primary_mode_select(tmr_type *tmr_x, tmr_primary_select_type primary_mode)
select tmr primary mode
Definition: at32f435_437_tmr.c:1222
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_PRIMARY_SEL_OVERFLOW
@ TMR_PRIMARY_SEL_OVERFLOW
Definition: at32f435_437_tmr.h:121
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::sclk_freq
uint32_t sclk_freq
Definition: at32f435_437_crm.h:789
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • dac
  • one_dac_noisewave
  • inc
project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • dac
  • one_dac_noisewave
  • inc
project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • dac
  • one_dac_noisewave
  • inc
project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • dac
  • one_dac_noisewave
  • src
Functions
project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • dac
  • one_dac_noisewave
  • src
project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • dac
  • one_dac_noisewave
  • src
Functions
project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • dac
  • one_dac_noisewave
  • src
project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • dac
  • one_dac_noisewave
  • src
Functions | Variables
project/at_start_f437/examples/dac/one_dac_noisewave/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

gpio_init_type gpio_init_struct = {0}

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/one_dac_noisewave/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • dac
  • one_dac_noisewave
  • src
project/at_start_f437/examples/dac/one_dac_noisewave/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39
45int main(void)
46{
47 system_clock_config();
48
49 at32_board_init();
50
51 /* turn led2/led3/led4 on */
52 at32_led_on(LED2);
53 at32_led_on(LED3);
54 at32_led_on(LED4);
55
56 /* enable dac/gpioa clock */
57 crm_periph_clock_enable(CRM_DAC_PERIPH_CLOCK, TRUE);
58 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
59
60 /* once the dac is enabled, the corresponding gpio pin is automatically
61 connected to the dac converter. in order to avoid parasitic consumption,
62 the gpio pin should be configured in analog */
63 gpio_init_struct.gpio_pins = GPIO_PINS_4;
64 gpio_init_struct.gpio_mode = GPIO_MODE_ANALOG;
65 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
66 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
67 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
68 gpio_init(GPIOA, &gpio_init_struct);
69
70 /* dac1 configuration */
71 dac_trigger_select(DAC1_SELECT, DAC_SOFTWARE_TRIGGER);
72
73 dac_trigger_enable(DAC1_SELECT, TRUE);
74
75 dac_wave_generate(DAC1_SELECT, DAC_WAVE_GENERATE_NOISE);
76
77 dac_mask_amplitude_select(DAC1_SELECT, DAC_LSFR_BITB0_AMPLITUDE_4095);
78
79 dac_output_buffer_enable(DAC1_SELECT, TRUE);
80
81 /* enable dac1: once the dac1 is enabled, pa.04 is
82 automatically connected to the dac converter. */
83 dac_enable(DAC1_SELECT, TRUE);
84
85 while(1)
86 {
87 dac_software_trigger_generate(DAC1_SELECT);
88 delay_us(1);
89 }
90}
91
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/dac/one_dac_noisewave/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_DAC_PERIPH_CLOCK
@ CRM_DAC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:150
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
dac_output_buffer_enable
void dac_output_buffer_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac output buffer
Definition: at32f435_437_dac.c:88
dac_wave_generate
void dac_wave_generate(dac_select_type dac_select, dac_wave_type dac_wave)
generate dac wave
Definition: at32f435_437_dac.c:207
dac_software_trigger_generate
void dac_software_trigger_generate(dac_select_type dac_select)
generate dac software trigger
Definition: at32f435_437_dac.c:169
dac_mask_amplitude_select
void dac_mask_amplitude_select(dac_select_type dac_select, dac_mask_amplitude_type dac_mask_amplitude)
select dac mask amplitude
Definition: at32f435_437_dac.c:244
dac_trigger_select
void dac_trigger_select(dac_select_type dac_select, dac_trigger_type dac_trigger_source)
select dac trigger
Definition: at32f435_437_dac.c:146
dac_enable
void dac_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac
Definition: at32f435_437_dac.c:64
dac_trigger_enable
void dac_trigger_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac trigger
Definition: at32f435_437_dac.c:113
DAC1_SELECT
@ DAC1_SELECT
Definition: at32f435_437_dac.h:59
DAC_WAVE_GENERATE_NOISE
@ DAC_WAVE_GENERATE_NOISE
Definition: at32f435_437_dac.h:84
DAC_LSFR_BITB0_AMPLITUDE_4095
@ DAC_LSFR_BITB0_AMPLITUDE_4095
Definition: at32f435_437_dac.h:104
DAC_SOFTWARE_TRIGGER
@ DAC_SOFTWARE_TRIGGER
Definition: at32f435_437_dac.h:75
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • dac
  • two_dac_trianglewave
  • inc
project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • dac
  • two_dac_trianglewave
  • inc
project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • dac
  • two_dac_trianglewave
  • inc
project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • dac
  • two_dac_trianglewave
  • src
Functions
project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • dac
  • two_dac_trianglewave
  • src
project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • dac
  • two_dac_trianglewave
  • src
Functions
project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • dac
  • two_dac_trianglewave
  • src
project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • dac
  • two_dac_trianglewave
  • src
Functions | Variables
project/at_start_f437/examples/dac/two_dac_trianglewave/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
crm_clocks_freq_type | crm_clocks_freq_struct = {0}

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dac/two_dac_trianglewave/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • dac
  • two_dac_trianglewave
  • src
project/at_start_f437/examples/dac/two_dac_trianglewave/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
45int main(void)
46{
47 system_clock_config();
48
49 at32_board_init();
50
51 /* turn led2/led3/led4 on */
52 at32_led_on(LED2);
53 at32_led_on(LED3);
54 at32_led_on(LED4);
55
56 /* enable dac/tmr2/gpioa clock */
57 crm_periph_clock_enable(CRM_DAC_PERIPH_CLOCK, TRUE);
58 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
59 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
60
61 /* once the dac is enabled, the corresponding gpio pin is automatically
62 connected to the dac converter. in order to avoid parasitic consumption,
63 the gpio pin should be configured in analog */
64 gpio_init_struct.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5;
65 gpio_init_struct.gpio_mode = GPIO_MODE_ANALOG;
66 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
67 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
68 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
69 gpio_init(GPIOA, &gpio_init_struct);
70
71 /* get system clock */
72 crm_clocks_freq_get(&crm_clocks_freq_struct);
73
74 /* (systemclock/(systemclock/1000000))/100 = 10KHz */
75 tmr_base_init(TMR2, 99, (crm_clocks_freq_struct.sclk_freq/1000000 - 1));
76 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
77
78 /* primary tmr2 output selection */
79 tmr_primary_mode_select(TMR2, TMR_PRIMARY_SEL_OVERFLOW);
80
81 /* dac1 and dac2 configuration */
82 dac_trigger_select(DAC1_SELECT, DAC_TMR2_TRGOUT_EVENT);
83 dac_trigger_select(DAC2_SELECT, DAC_TMR2_TRGOUT_EVENT);
84
85 dac_trigger_enable(DAC1_SELECT, TRUE);
86 dac_trigger_enable(DAC2_SELECT, TRUE);
87
88 dac_wave_generate(DAC1_SELECT, DAC_WAVE_GENERATE_TRIANGLE);
89 dac_wave_generate(DAC2_SELECT, DAC_WAVE_GENERATE_TRIANGLE);
90
91 dac_mask_amplitude_select(DAC1_SELECT, DAC_LSFR_BIT90_AMPLITUDE_1023);
92 dac_mask_amplitude_select(DAC2_SELECT, DAC_LSFR_BITA0_AMPLITUDE_2047);
93
94 dac_output_buffer_enable(DAC1_SELECT, FALSE);
95 dac_output_buffer_enable(DAC2_SELECT, FALSE);
96
97 dac_dma_enable(DAC1_SELECT, TRUE);
98 dac_dma_enable(DAC2_SELECT, TRUE);
99
100 /* enable dac1: once the dac1 is enabled, pa.04 is
101 automatically connected to the dac converter. */
102 dac_enable(DAC1_SELECT, TRUE);
103
104 /* enable dac2: once the dac2 is enabled, pa.05 is
105 automatically connected to the dac converter. */
106 dac_enable(DAC2_SELECT, TRUE);
107
108 dac_dual_data_set(DAC_DUAL_12BIT_RIGHT, 0x100, 0x100);
109
110 /* enable tmr2 */
111 tmr_counter_enable(TMR2, TRUE);
112
113 while(1)
114 {
115 }
116}
117
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/dac/two_dac_trianglewave/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/dac/two_dac_trianglewave/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_DAC_PERIPH_CLOCK
@ CRM_DAC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:150
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
dac_output_buffer_enable
void dac_output_buffer_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac output buffer
Definition: at32f435_437_dac.c:88
dac_dma_enable
void dac_dma_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac dma
Definition: at32f435_437_dac.c:268
dac_wave_generate
void dac_wave_generate(dac_select_type dac_select, dac_wave_type dac_wave)
generate dac wave
Definition: at32f435_437_dac.c:207
dac_mask_amplitude_select
void dac_mask_amplitude_select(dac_select_type dac_select, dac_mask_amplitude_type dac_mask_amplitude)
select dac mask amplitude
Definition: at32f435_437_dac.c:244
dac_trigger_select
void dac_trigger_select(dac_select_type dac_select, dac_trigger_type dac_trigger_source)
select dac trigger
Definition: at32f435_437_dac.c:146
dac_enable
void dac_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac
Definition: at32f435_437_dac.c:64
dac_dual_data_set
void dac_dual_data_set(dac_dual_data_type dac_dual, uint16_t data1, uint16_t data2)
set dac dual data
Definition: at32f435_437_dac.c:349
dac_trigger_enable
void dac_trigger_enable(dac_select_type dac_select, confirm_state new_state)
enable or disable dac trigger
Definition: at32f435_437_dac.c:113
DAC2_SELECT
@ DAC2_SELECT
Definition: at32f435_437_dac.h:60
DAC1_SELECT
@ DAC1_SELECT
Definition: at32f435_437_dac.h:59
DAC_WAVE_GENERATE_TRIANGLE
@ DAC_WAVE_GENERATE_TRIANGLE
Definition: at32f435_437_dac.h:85
DAC_LSFR_BIT90_AMPLITUDE_1023
@ DAC_LSFR_BIT90_AMPLITUDE_1023
Definition: at32f435_437_dac.h:102
DAC_LSFR_BITA0_AMPLITUDE_2047
@ DAC_LSFR_BITA0_AMPLITUDE_2047
Definition: at32f435_437_dac.h:103
DAC_TMR2_TRGOUT_EVENT
@ DAC_TMR2_TRGOUT_EVENT
Definition: at32f435_437_dac.h:72
DAC_DUAL_12BIT_RIGHT
@ DAC_DUAL_12BIT_RIGHT
Definition: at32f435_437_dac.h:132
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_primary_mode_select
void tmr_primary_mode_select(tmr_type *tmr_x, tmr_primary_select_type primary_mode)
select tmr primary mode
Definition: at32f435_437_tmr.c:1222
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_PRIMARY_SEL_OVERFLOW
@ TMR_PRIMARY_SEL_OVERFLOW
Definition: at32f435_437_tmr.h:121
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::sclk_freq
uint32_t sclk_freq
Definition: at32f435_437_crm.h:789
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • debug
  • tmr1
  • inc
project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • debug
  • tmr1
  • inc
project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • debug
  • tmr1
  • inc
project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • debug
  • tmr1
  • src
Functions
project/at_start_f437/examples/debug/tmr1/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/debug/tmr1/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • debug
  • tmr1
  • src
project/at_start_f437/examples/debug/tmr1/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/debug/tmr1/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • debug
  • tmr1
  • src
Functions
project/at_start_f437/examples/debug/tmr1/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/debug/tmr1/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • debug
  • tmr1
  • src
project/at_start_f437/examples/debug/tmr1/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • debug
  • tmr1
  • src
Functions | Variables
project/at_start_f437/examples/debug/tmr1/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | TMR1_OVF_TMR10_IRQHandler (void)
this function handles tmr1 overflow handler. More...
int | main (void)
main function. More...

Variables

crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | counter = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/debug/tmr1/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • debug
  • tmr1
  • src
project/at_start_f437/examples/debug/tmr1/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 crm_clocks_freq_type crm_clocks_freq_struct = {0};
39uint16_t counter = 0;
40
46void TMR1_OVF_TMR10_IRQHandler(void)
47{
48 if(tmr_flag_get(TMR1, TMR_OVF_FLAG) != RESET)
49 {
50 /* add user code... */
51 at32_led_toggle(LED3);
52 tmr_flag_clear(TMR1, TMR_OVF_FLAG);
53 }
54}
55
61int main(void)
62{
63 system_clock_config();
64
65 at32_board_init();
66
67 /* get system clock */
68 crm_clocks_freq_get(&crm_clocks_freq_struct);
69
70 /* turn led2/led3/led4 on */
71 at32_led_on(LED2);
72 at32_led_on(LED3);
73 at32_led_on(LED4);
74
75 /* enable tmr1 clock */
76 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
77
78 /* enable tmr1 debug mode */
79 debug_apb2_periph_mode_set(DEBUG_TMR1_PAUSE, TRUE);
80
81 /* tmr1 configuration */
82 tmr_base_init(TMR1, 10000, 0);
83 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
84
85 /* overflow interrupt enable */
86 tmr_interrupt_enable(TMR1, TMR_OVF_INT, TRUE);
87
88 /* tmr1 interrupt nvic init */
89 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
90 nvic_irq_enable(TMR1_OVF_TMR10_IRQn, 1, 0);
91
92 /* enable tmr1 */
93 tmr_counter_enable(TMR1, TRUE);
94
95 while(1)
96 {
97 /* in debug mode,tmr1 counter will pause */
98 counter = tmr_counter_value_get(TMR1);
99 counter = tmr_counter_value_get(TMR1);
100 counter = tmr_counter_value_get(TMR1);
101 counter = tmr_counter_value_get(TMR1);
102 counter = tmr_counter_value_get(TMR1);
103 }
104}
105
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/debug/tmr1/src/main.c:38
TMR1_OVF_TMR10_IRQHandler
void TMR1_OVF_TMR10_IRQHandler(void)
this function handles tmr1 overflow handler.
Definition: project/at_start_f435/examples/debug/tmr1/src/main.c:46
counter
uint16_t counter
Definition: project/at_start_f437/examples/debug/tmr1/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
debug_apb2_periph_mode_set
void debug_apb2_periph_mode_set(uint32_t apb2_periph, confirm_state new_state)
set apb2 periph debug mode
Definition: at32f435_437_debug.c:111
DEBUG_TMR1_PAUSE
#define DEBUG_TMR1_PAUSE
Definition: at32f435_437_debug.h:77
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_counter_value_get
uint32_t tmr_counter_value_get(tmr_type *tmr_x)
get tmr counter value
Definition: at32f435_437_tmr.c:299
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
TMR1_OVF_TMR10_IRQn
@ TMR1_OVF_TMR10_IRQn
Definition: at32f435_437.h:173
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • dma
  • dmamux_data_to_gpio
  • inc
project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • dma
  • dmamux_data_to_gpio
  • inc
project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • dma
  • dmamux_data_to_gpio
  • inc
project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • dma
  • dmamux_data_to_gpio
  • src
Functions
project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • dma
  • dmamux_data_to_gpio
  • src
project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • dma
  • dmamux_data_to_gpio
  • src
Functions
project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA2_Channel1_IRQHandler (void)
this function handles dma2 channel1 handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • dma
  • dmamux_data_to_gpio
  • src
project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while (1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while (1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while (1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while (1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void DMA2_Channel1_IRQHandler(void)
142{
143 if(dma_flag_get(DMA2_FDT1_FLAG) != RESET)
144 {
145 /* turn led2/led3/led4 on */
146 at32_led_on(LED2);
147 at32_led_on(LED3);
148 at32_led_on(LED4);
149 dma_flag_clear(DMA2_FDT1_FLAG);
150 }
151}
152
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
DMA2_Channel1_IRQHandler
void DMA2_Channel1_IRQHandler(void)
this function handles dma2 channel1 handler.
Definition: project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/at32f435_437_int.c:141
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA2_FDT1_FLAG
#define DMA2_FDT1_FLAG
Definition: at32f435_437_dma.h:95
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • dma
  • dmamux_data_to_gpio
  • src
Macros | Functions | Variables
project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 16

Functions

int main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
dma_init_type dma_init_struct
uint16_t | src_buffer [16]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • dma
  • dmamux_data_to_gpio
  • src
project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 dma_init_type dma_init_struct;
40
41#define BUFFER_SIZE 16
42uint16_t src_buffer[BUFFER_SIZE] = {0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008,
43 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, 0x0010};
44
50int main(void)
51{
52 /* initial system clock */
53 system_clock_config();
54
55 /* at board initial */
56 at32_board_init();
57
58 /* enable dma2/gpioc/tmr2 clock */
59 crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE);
60 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
61 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
62
63 /* config gpioc pin for output mode */
64 gpio_init_struct.gpio_pins = GPIO_PINS_ALL;
65 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
66 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
67 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
68 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
69 gpio_init(GPIOC, &gpio_init_struct);
70
71 tmr_base_init(TMR2, 0xFF, 0);
72 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
73
74 /* enable tmr2 overflow dma request */
75 tmr_dma_request_enable(TMR2, TMR_OVERFLOW_DMA_REQUEST, TRUE);
76
77 /* dma2 channel1 configuration */
78 dma_reset(DMA2_CHANNEL1);
79 dma_init_struct.buffer_size = BUFFER_SIZE;
80 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
81 dma_init_struct.memory_base_addr = (uint32_t)src_buffer;
82 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
83 dma_init_struct.memory_inc_enable = TRUE;
84 dma_init_struct.peripheral_base_addr = (uint32_t)&GPIOC->odt;
85 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
86 dma_init_struct.peripheral_inc_enable = FALSE;
87 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
88 dma_init_struct.loop_mode_enable = FALSE;
89 dma_init(DMA2_CHANNEL1, &dma_init_struct);
90
91 /* enable transfer full data intterrupt */
92 dma_interrupt_enable(DMA2_CHANNEL1, DMA_FDT_INT, TRUE);
93
94 /* dma2 channel1 interrupt nvic init */
95 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
96 nvic_irq_enable(DMA2_Channel1_IRQn, 1, 0);
97
98 /* tmr2 dmamux function enable */
99 dmamux_enable(DMA2, TRUE);
100 dmamux_init(DMA2MUX_CHANNEL1, DMAMUX_DMAREQ_ID_TMR2_OVERFLOW);
101
102 /* enable dma channel */
103 dma_channel_enable(DMA2_CHANNEL1, TRUE);
104
105 /* enable tmr2 */
106 tmr_counter_enable(TMR2, TRUE);
107
108 while(1)
109 {
110 }
111}
112
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/main.c:39
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/main.c:41
src_buffer
uint16_t src_buffer[16]
Definition: project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/main.c:42
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
CRM_DMA2_PERIPH_CLOCK
@ CRM_DMA2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:116
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_MEDIUM
@ DMA_PRIORITY_MEDIUM
Definition: at32f435_437_dma.h:183
DMAMUX_DMAREQ_ID_TMR2_OVERFLOW
@ DMAMUX_DMAREQ_ID_TMR2_OVERFLOW
Definition: at32f435_437_dma.h:260
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA2MUX_CHANNEL1
#define DMA2MUX_CHANNEL1
Definition: at32f435_437_dma.h:726
DMA2
#define DMA2
Definition: at32f435_437_dma.h:717
DMA2_CHANNEL1
#define DMA2_CHANNEL1
Definition: at32f435_437_dma.h:718
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_ALL
#define GPIO_PINS_ALL
Definition: at32f435_437_gpio.h:67
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_dma_request_enable
void tmr_dma_request_enable(tmr_type *tmr_x, tmr_dma_request_type dma_request, confirm_state new_state)
enable or disable tmr dma request
Definition: at32f435_437_tmr.c:1358
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_OVERFLOW_DMA_REQUEST
@ TMR_OVERFLOW_DMA_REQUEST
Definition: at32f435_437_tmr.h:271
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
DMA2_Channel1_IRQn
@ DMA2_Channel1_IRQn
Definition: at32f435_437.h:235
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • dma
  • dmamux_genertor_exint
  • inc
project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • dma
  • dmamux_genertor_exint
  • inc
project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • dma
  • dmamux_genertor_exint
  • inc
project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • dma
  • dmamux_genertor_exint
  • src
Functions
project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • dma
  • dmamux_genertor_exint
  • src
project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • dma
  • dmamux_genertor_exint
  • src
Functions
project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA2_Channel4_IRQHandler (void)
this function handles DMA2 channel1 handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • dma
  • dmamux_genertor_exint
  • src
project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while (1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while (1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while (1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while (1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void DMA2_Channel4_IRQHandler(void)
142{
143 if(dma_flag_get(DMA2_FDT4_FLAG) != RESET)
144 {
145 /* turn led2/led3/led4 on */
146 at32_led_on(LED2);
147 at32_led_on(LED3);
148 at32_led_on(LED4);
149 dma_flag_clear(DMA2_FDT4_FLAG);
150 }
151}
152
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
DMA2_Channel4_IRQHandler
void DMA2_Channel4_IRQHandler(void)
this function handles DMA2 channel1 handler.
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c:141
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA2_FDT4_FLAG
#define DMA2_FDT4_FLAG
Definition: at32f435_437_dma.h:107
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • dma
  • dmamux_genertor_exint
  • src
Macros | Functions | Variables
project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 16

Functions

void | EXINT1_IRQHandler (void)
exint1 interrupt handler More...
int | main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
dma_init_type dma_init_struct
dmamux_gen_init_type dmamux_gen_init_struct
exint_init_type exint_init_struct
uint16_t | src_buffer [16]
uint16_t | dst_buffer [16]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • dma
  • dmamux_genertor_exint
  • src
project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 dma_init_type dma_init_struct;
40 dmamux_gen_init_type dmamux_gen_init_struct;
41 exint_init_type exint_init_struct;
42#define BUFFER_SIZE 16
43uint16_t src_buffer[BUFFER_SIZE] = {0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008,
44 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, 0x0010};
45
46uint16_t dst_buffer[BUFFER_SIZE];
47
53void EXINT1_IRQHandler(void)
54{
55 if(exint_flag_get(EXINT_LINE_1) != RESET)
56 {
57 at32_led_toggle(LED2);
58 exint_flag_clear(EXINT_LINE_1);
59 }
60}
66int main(void)
67{
68 /* initial system clock */
69 system_clock_config();
70
71 /* at board initial */
72 at32_board_init();
73
74 /* enable dma2/gpioa clock */
75 crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE);
76 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
77
78 /* config pa1 for input mode */
79 gpio_init_struct.gpio_pins = GPIO_PINS_1;
80 gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
81 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
82 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
83 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
84 gpio_init(GPIOA, &gpio_init_struct);
85
86 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE1);
87
88 exint_default_para_init(&exint_init_struct);
89 exint_init_struct.line_enable = TRUE;
90 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
91 exint_init_struct.line_select = EXINT_LINE_1;
92 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
93 exint_init(&exint_init_struct);
94
95 /* exint line1 interrupt nvic init */
96 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
97 nvic_irq_enable(EXINT1_IRQn, 1, 0);
98
99 /* dma2 channel4 configuration */
100 dma_reset(DMA2_CHANNEL4);
101 dma_init_struct.buffer_size = BUFFER_SIZE;
102 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
103 dma_init_struct.memory_base_addr = (uint32_t)dst_buffer;
104 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
105 dma_init_struct.memory_inc_enable = TRUE;
106 dma_init_struct.peripheral_base_addr = (uint32_t)src_buffer;
107 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
108 dma_init_struct.peripheral_inc_enable = TRUE;
109 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
110 dma_init_struct.loop_mode_enable = FALSE;
111 dma_init(DMA2_CHANNEL4, &dma_init_struct);
112
113 /* genertor1 configuration */
114 dmamux_generator_default_para_init(&dmamux_gen_init_struct);
115 dmamux_gen_init_struct.gen_polarity = DMAMUX_GEN_POLARITY_RISING;
116 dmamux_gen_init_struct.gen_request_number = 4;
117 dmamux_gen_init_struct.gen_signal_sel = DMAMUX_GEN_ID_EXINT1;
118 dmamux_gen_init_struct.gen_enable = TRUE;
119 dmamux_generator_config(DMA2MUX_GENERATOR1, &dmamux_gen_init_struct);
120
121 /* enable transfer full data intterrupt */
122 dma_interrupt_enable(DMA2_CHANNEL4, DMA_FDT_INT, TRUE);
123
124 /* dma2 channel4 interrupt nvic init */
125 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
126 nvic_irq_enable(DMA2_Channel4_IRQn, 1, 0);
127
128 /* dmamux function enable */
129 dmamux_enable(DMA2, TRUE);
130 dmamux_init(DMA2MUX_CHANNEL4, DMAMUX_DMAREQ_ID_REQ_G1);
131
132 /* enable dma channe4 */
133 dma_channel_enable(DMA2_CHANNEL4, TRUE);
134
135 while(1)
136 {
137 }
138}
139
140
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c:39
EXINT1_IRQHandler
void EXINT1_IRQHandler(void)
exint1 interrupt handler
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:53
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c:42
dst_buffer
uint16_t dst_buffer[16]
Definition: project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c:46
dmamux_gen_init_struct
dmamux_gen_init_type dmamux_gen_init_struct
Definition: project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c:40
src_buffer
uint16_t src_buffer[16]
Definition: project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c:43
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_DMA2_PERIPH_CLOCK
@ CRM_DMA2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:116
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dmamux_generator_config
void dmamux_generator_config(dmamux_generator_type *dmamux_gen_x, dmamux_gen_init_type *dmamux_gen_init_struct)
dmamux request generator init.
Definition: at32f435_437_dma.c:519
dmamux_generator_default_para_init
void dmamux_generator_default_para_init(dmamux_gen_init_type *dmamux_gen_init_struct)
dmamux request generator init struct config with its default value.
Definition: at32f435_437_dma.c:496
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMAMUX_GEN_POLARITY_RISING
@ DMAMUX_GEN_POLARITY_RISING
Definition: at32f435_437_dma.h:367
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMAMUX_GEN_ID_EXINT1
@ DMAMUX_GEN_ID_EXINT1
Definition: at32f435_437_dma.h:337
DMA_PRIORITY_MEDIUM
@ DMA_PRIORITY_MEDIUM
Definition: at32f435_437_dma.h:183
DMAMUX_DMAREQ_ID_REQ_G1
@ DMAMUX_DMAREQ_ID_REQ_G1
Definition: at32f435_437_dma.h:193
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA2MUX_CHANNEL4
#define DMA2MUX_CHANNEL4
Definition: at32f435_437_dma.h:729
DMA2
#define DMA2
Definition: at32f435_437_dma.h:717
DMA2MUX_GENERATOR1
#define DMA2MUX_GENERATOR1
Definition: at32f435_437_dma.h:734
DMA2_CHANNEL4
#define DMA2_CHANNEL4
Definition: at32f435_437_dma.h:721
exint_flag_get
flag_status exint_flag_get(uint32_t exint_line)
get exint flag
Definition: at32f435_437_exint.c:142
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_1
#define EXINT_LINE_1
Definition: at32f435_437_exint.h:53
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_INPUT
@ GPIO_MODE_INPUT
Definition: at32f435_437_gpio.h:82
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE1
@ SCFG_PINS_SOURCE1
Definition: at32f435_437_scfg.h:102
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
DMA2_Channel4_IRQn
@ DMA2_Channel4_IRQn
Definition: at32f435_437.h:238
EXINT1_IRQn
@ EXINT1_IRQn
Definition: at32f435_437.h:153
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
dmamux_gen_init_type
dmamux generator init type
Definition: at32f435_437_dma.h:405
dmamux_gen_init_type::gen_enable
confirm_state gen_enable
Definition: at32f435_437_dma.h:409
dmamux_gen_init_type::gen_request_number
uint32_t gen_request_number
Definition: at32f435_437_dma.h:408
dmamux_gen_init_type::gen_signal_sel
dmamux_gen_id_sel_type gen_signal_sel
Definition: at32f435_437_dma.h:406
dmamux_gen_init_type::gen_polarity
dmamux_gen_pol_type gen_polarity
Definition: at32f435_437_dma.h:407
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • dma
  • dmamux_synchronization_exint
  • inc
project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • dma
  • dmamux_synchronization_exint
  • inc
project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • dma
  • dmamux_synchronization_exint
  • inc
project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • dma
  • dmamux_synchronization_exint
  • src
Functions
project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • dma
  • dmamux_synchronization_exint
  • src
project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • dma
  • dmamux_synchronization_exint
  • src
Functions
project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA2_Channel4_IRQHandler (void)
this function handles dma2 channel4 handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • dma
  • dmamux_synchronization_exint
  • src
project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while (1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while (1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while (1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while (1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void DMA2_Channel4_IRQHandler(void)
142{
143 if(dma_flag_get(DMA2_FDT4_FLAG) != RESET)
144 {
145 /* turn led2/led3/led4 on */
146 at32_led_on(LED2);
147 at32_led_on(LED3);
148 at32_led_on(LED4);
149 dma_flag_clear(DMA2_FDT4_FLAG);
150 }
151}
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
DMA2_Channel4_IRQHandler
void DMA2_Channel4_IRQHandler(void)
this function handles DMA2 channel1 handler.
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c:141
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA2_FDT4_FLAG
#define DMA2_FDT4_FLAG
Definition: at32f435_437_dma.h:107
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • dma
  • dmamux_synchronization_exint
  • src
Macros | Functions | Variables
project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 16

Functions

void | EXINT1_IRQHandler (void)
exint1 interrupt handler More...
int | main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
dma_init_type dma_init_struct
dmamux_sync_init_type dmamux_sync_init_struct
exint_init_type exint_init_struct
uint16_t | src_buffer [16]
uint16_t | dst_buffer [16]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • dma
  • dmamux_synchronization_exint
  • src
project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 dma_init_type dma_init_struct;
40 dmamux_sync_init_type dmamux_sync_init_struct;
41 exint_init_type exint_init_struct;
42#define BUFFER_SIZE 16
43uint16_t src_buffer[BUFFER_SIZE] = {0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008,
44 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, 0x0010};
45
46uint16_t dst_buffer[BUFFER_SIZE];
47
48
54void EXINT1_IRQHandler(void)
55{
56 if(exint_flag_get(EXINT_LINE_1) != RESET)
57 {
58 at32_led_toggle(LED2);
59 exint_flag_clear(EXINT_LINE_1);
60 }
61}
67int main(void)
68{
69 /* initial system clock */
70 system_clock_config();
71
72 /* at board initial */
73 at32_board_init();
74
75 /* enable dma2/gpioa clock */
76 crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE);
77 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
78 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
79
80 /* config pa1 for input mode */
81 gpio_init_struct.gpio_pins = GPIO_PINS_1;
82 gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
83 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
84 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
85 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
86 gpio_init(GPIOA, &gpio_init_struct);
87
88 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE1);
89
90 exint_default_para_init(&exint_init_struct);
91 exint_init_struct.line_enable = TRUE;
92 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
93 exint_init_struct.line_select = EXINT_LINE_1;
94 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
95 exint_init(&exint_init_struct);
96
97 /* exint line1 interrupt nvic init */
98 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
99 nvic_irq_enable(EXINT1_IRQn, 1, 0);
100
101 /* dma2 channel4 configuration */
102 dma_reset(DMA2_CHANNEL4);
103 dma_init_struct.buffer_size = BUFFER_SIZE;
104 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
105 dma_init_struct.memory_base_addr = (uint32_t)dst_buffer;
106 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
107 dma_init_struct.memory_inc_enable = TRUE;
108 dma_init_struct.peripheral_base_addr = (uint32_t)src_buffer;
109 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
110 dma_init_struct.peripheral_inc_enable = TRUE;
111 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
112 dma_init_struct.loop_mode_enable = FALSE;
113 dma_init(DMA2_CHANNEL4, &dma_init_struct);
114
115 dmamux_sync_default_para_init(&dmamux_sync_init_struct);
116 dmamux_sync_init_struct.sync_request_number = 4;
117 dmamux_sync_init_struct.sync_signal_sel = DMAMUX_SYNC_ID_EXINT1;
118 dmamux_sync_init_struct.sync_polarity = DMAMUX_SYNC_POLARITY_RISING;
119 dmamux_sync_init_struct.sync_event_enable = TRUE;
120 dmamux_sync_init_struct.sync_enable = TRUE;
121 dmamux_sync_config(DMA2MUX_CHANNEL4, &dmamux_sync_init_struct);
122
123 /* enable transfer full data intterrupt */
124 dma_interrupt_enable(DMA2_CHANNEL4, DMA_FDT_INT, TRUE);
125
126 /* dma2 channel4 interrupt nvic init */
127 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
128 nvic_irq_enable(DMA2_Channel4_IRQn, 1, 0);
129
130 /* dmamux function enable */
131 dmamux_enable(DMA2, TRUE);
132 dmamux_init(DMA2MUX_CHANNEL4, DMAMUX_DMAREQ_ID_TMR1_OVERFLOW);
133
134 /* enable dma channe4 */
135 dma_channel_enable(DMA2_CHANNEL4, TRUE);
136
137 /* tmr1 configuration */
138 tmr_base_init(TMR1, 5000, 0);
139 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
140
141 /* enable tmr1 overflow edam request */
142 tmr_dma_request_enable(TMR1, TMR_OVERFLOW_DMA_REQUEST, TRUE);
143
144 /* enable tmr1 */
145 tmr_counter_enable(TMR1, TRUE);
146 while(1)
147 {
148 }
149}
150
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
EXINT1_IRQHandler
void EXINT1_IRQHandler(void)
exint1 interrupt handler
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:53
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c:39
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c:42
dst_buffer
uint16_t dst_buffer[16]
Definition: project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c:46
dmamux_sync_init_struct
dmamux_sync_init_type dmamux_sync_init_struct
Definition: project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c:40
src_buffer
uint16_t src_buffer[16]
Definition: project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c:43
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_DMA2_PERIPH_CLOCK
@ CRM_DMA2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:116
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dmamux_sync_config
void dmamux_sync_config(dmamux_channel_type *dmamux_channelx, dmamux_sync_init_type *dmamux_sync_init_struct)
dmamux synchronization config.
Definition: at32f435_437_dma.c:482
dmamux_sync_default_para_init
void dmamux_sync_default_para_init(dmamux_sync_init_type *dmamux_sync_init_struct)
dmamux sync init struct config with its default value.
Definition: at32f435_437_dma.c:452
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMAMUX_SYNC_POLARITY_RISING
@ DMAMUX_SYNC_POLARITY_RISING
Definition: at32f435_437_dma.h:326
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_MEDIUM
@ DMA_PRIORITY_MEDIUM
Definition: at32f435_437_dma.h:183
DMAMUX_SYNC_ID_EXINT1
@ DMAMUX_SYNC_ID_EXINT1
Definition: at32f435_437_dma.h:296
DMAMUX_DMAREQ_ID_TMR1_OVERFLOW
@ DMAMUX_DMAREQ_ID_TMR1_OVERFLOW
Definition: at32f435_437_dma.h:246
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA2MUX_CHANNEL4
#define DMA2MUX_CHANNEL4
Definition: at32f435_437_dma.h:729
DMA2
#define DMA2
Definition: at32f435_437_dma.h:717
DMA2_CHANNEL4
#define DMA2_CHANNEL4
Definition: at32f435_437_dma.h:721
exint_flag_get
flag_status exint_flag_get(uint32_t exint_line)
get exint flag
Definition: at32f435_437_exint.c:142
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_1
#define EXINT_LINE_1
Definition: at32f435_437_exint.h:53
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_INPUT
@ GPIO_MODE_INPUT
Definition: at32f435_437_gpio.h:82
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE1
@ SCFG_PINS_SOURCE1
Definition: at32f435_437_scfg.h:102
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
tmr_dma_request_enable
void tmr_dma_request_enable(tmr_type *tmr_x, tmr_dma_request_type dma_request, confirm_state new_state)
enable or disable tmr dma request
Definition: at32f435_437_tmr.c:1358
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_OVERFLOW_DMA_REQUEST
@ TMR_OVERFLOW_DMA_REQUEST
Definition: at32f435_437_tmr.h:271
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
DMA2_Channel4_IRQn
@ DMA2_Channel4_IRQn
Definition: at32f435_437.h:238
EXINT1_IRQn
@ EXINT1_IRQn
Definition: at32f435_437.h:153
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
dmamux_sync_init_type
dmamux sync init type
Definition: at32f435_437_dma.h:393
dmamux_sync_init_type::sync_enable
confirm_state sync_enable
Definition: at32f435_437_dma.h:398
dmamux_sync_init_type::sync_request_number
uint32_t sync_request_number
Definition: at32f435_437_dma.h:396
dmamux_sync_init_type::sync_event_enable
confirm_state sync_event_enable
Definition: at32f435_437_dma.h:397
dmamux_sync_init_type::sync_polarity
uint32_t sync_polarity
Definition: at32f435_437_dma.h:395
dmamux_sync_init_type::sync_signal_sel
dmamux_sync_id_sel_type sync_signal_sel
Definition: at32f435_437_dma.h:394
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • dma
  • flash_to_sram
  • inc
project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • dma
  • flash_to_sram
  • inc
project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • dma
  • flash_to_sram
  • inc
project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • dma
  • flash_to_sram
  • src
Functions
project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • dma
  • flash_to_sram
  • src
project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • dma
  • flash_to_sram
  • src
Functions | Variables
project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1 channel1 handler. More...

Variables

__IO uint32_t data_counter_end

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • dma
  • flash_to_sram
  • src
project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
31extern __IO uint32_t data_counter_end;
32
46void NMI_Handler(void)
47{
48}
49
55void HardFault_Handler(void)
56{
57 /* go to infinite loop when hard fault exception occurs */
58 while (1)
59 {
60 }
61}
62
68void MemManage_Handler(void)
69{
70 /* go to infinite loop when memory manage exception occurs */
71 while (1)
72 {
73 }
74}
75
81void BusFault_Handler(void)
82{
83 /* go to infinite loop when bus fault exception occurs */
84 while (1)
85 {
86 }
87}
88
94void UsageFault_Handler(void)
95{
96 /* go to infinite loop when usage fault exception occurs */
97 while (1)
98 {
99 }
100}
101
107void SVC_Handler(void)
108{
109}
110
116void DebugMon_Handler(void)
117{
118}
119
125void PendSV_Handler(void)
126{
127}
128
134void SysTick_Handler(void)
135{
136}
137
143void DMA1_Channel1_IRQHandler(void)
144{
145 if(dma_flag_get(DMA1_FDT1_FLAG) != RESET)
146 {
147 data_counter_end = 0;
148 dma_flag_clear(DMA1_FDT1_FLAG);
149 }
150}
151
152
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
data_counter_end
__IO uint32_t data_counter_end
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:51
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • dma
  • flash_to_sram
  • src
Macros | Functions | Variables
project/at_start_f437/examples/dma/flash_to_sram/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 32

Functions

error_status | buffer_compare (const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers. More...
int | main (void)
main function. More...

Variables

const uint32_t | src_const_buffer [32]
uint32_t | dst_buffer [32]
gpio_init_type | gpio_init_struct = {0}
dma_init_type dma_init_struct
__IO uint32_t | data_counter_end = 0x01
error_status transfer_status = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dma/flash_to_sram/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • dma
  • flash_to_sram
  • src
project/at_start_f437/examples/dma/flash_to_sram/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 32
39
40const uint32_t src_const_buffer[BUFFER_SIZE]= {0x01020304, 0x05060708, 0x090A0B0C, 0x0D0E0F10,
41 0x11121314, 0x15161718, 0x191A1B1C, 0x1D1E1F20,
42 0x21222324, 0x25262728, 0x292A2B2C, 0x2D2E2F30,
43 0x31323334, 0x35363738, 0x393A3B3C, 0x3D3E3F40,
44 0x41424344, 0x45464748, 0x494A4B4C, 0x4D4E4F50,
45 0x51525354, 0x55565758, 0x595A5B5C, 0x5D5E5F60,
46 0x61626364, 0x65666768, 0x696A6B6C, 0x6D6E6F70,
47 0x71727374, 0x75767778, 0x797A7B7C, 0x7D7E7F80};
48uint32_t dst_buffer[BUFFER_SIZE];
49 gpio_init_type gpio_init_struct = {0};
50 dma_init_type dma_init_struct;
51__IO uint32_t data_counter_end = 0x01; /* this variable should not be initialized to 0 */
52 error_status transfer_status = ERROR;
53
61 error_status buffer_compare(const uint32_t* pbuffer, uint32_t* pbuffer1, uint16_t buffer_length)
62{
63 while(buffer_length--)
64 {
65 if(*pbuffer != *pbuffer1)
66 {
67 return ERROR;
68 }
69
70 pbuffer++;
71 pbuffer1++;
72 }
73
74 return SUCCESS;
75}
76
82int main(void)
83{
84 /* initial system clock */
85 system_clock_config();
86
87 /* at board initial */
88 at32_board_init();
89
90 /* enable dma1 clock */
91 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
92
93 /* dma1 channel1 configuration */
94 dma_reset(DMA1_CHANNEL1);
95 dma_init_struct.buffer_size = BUFFER_SIZE;
96 dma_init_struct.direction = DMA_DIR_MEMORY_TO_MEMORY;
97 dma_init_struct.memory_base_addr = (uint32_t)dst_buffer;
98 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_WORD;
99 dma_init_struct.memory_inc_enable = TRUE;
100 dma_init_struct.peripheral_base_addr = (uint32_t)src_const_buffer;
101 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_WORD;
102 dma_init_struct.peripheral_inc_enable = TRUE;
103 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
104 dma_init_struct.loop_mode_enable = FALSE;
105 dma_init(DMA1_CHANNEL1, &dma_init_struct);
106
107 /* enable transfer full data intterrupt */
108 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
109
110 /* dma1 channel1 interrupt nvic init */
111 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
112 nvic_irq_enable(DMA1_Channel1_IRQn, 1, 0);
113
114 dma_channel_enable(DMA1_CHANNEL1, TRUE);
115
116 /* wait the end of transmission */
117 while(data_counter_end != 0)
118 {
119 }
120
121 /* check if the transmitted and received data are equal */
122 transfer_status = buffer_compare(src_const_buffer, dst_buffer, BUFFER_SIZE);
123
124 /* transfer_status = success, if the transmitted and received data are the same
125 transfer_status = error, if the transmitted and received data are different */
126 if(transfer_status == SUCCESS)
127 {
128 /* turn led2/led3/led4 on */
129 at32_led_on(LED2);
130 at32_led_on(LED3);
131 at32_led_on(LED4);
132 }
133
134 while(1)
135 {
136 }
137}
138
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/dma/flash_to_sram/src/main.c:49
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f437/examples/dma/flash_to_sram/src/main.c:50
src_const_buffer
const uint32_t src_const_buffer[32]
Definition: project/at_start_f437/examples/dma/flash_to_sram/src/main.c:40
data_counter_end
__IO uint32_t data_counter_end
Definition: project/at_start_f437/examples/dma/flash_to_sram/src/main.c:51
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/dma/flash_to_sram/src/main.c:38
dst_buffer
uint32_t dst_buffer[32]
Definition: project/at_start_f437/examples/dma/flash_to_sram/src/main.c:48
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
transfer_status
error_status transfer_status
Definition: project/at_start_f437/examples/dma/flash_to_sram/src/main.c:52
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_WORD
@ DMA_PERIPHERAL_DATA_WIDTH_WORD
Definition: at32f435_437_dma.h:164
DMA_DIR_MEMORY_TO_MEMORY
@ DMA_DIR_MEMORY_TO_MEMORY
Definition: at32f435_437_dma.h:154
DMA_MEMORY_DATA_WIDTH_WORD
@ DMA_MEMORY_DATA_WIDTH_WORD
Definition: at32f435_437_dma.h:174
DMA_PRIORITY_MEDIUM
@ DMA_PRIORITY_MEDIUM
Definition: at32f435_437_dma.h:183
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • dvp
  • ov2640_capture
  • inc
project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • dvp
  • ov2640_capture
  • inc
project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • dvp
  • ov2640_capture
  • inc
project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • dvp
  • ov2640_capture
  • src
Functions
project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • dvp
  • ov2640_capture
  • src
project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 *(__IO uint32_t*)0x40023C60 &= 0xFFFFFFFC;
120 *(__IO uint32_t*)0x40023C60 |= 0x00000001;
121 while ((*(__IO uint32_t*)0x40023C60 & 0x30) != 0x10)
122 {
123 }
124
125 /* update system_core_clock global variable */
126 system_core_clock_update();
127}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • dvp
  • ov2640_capture
  • src
Functions
project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • dvp
  • ov2640_capture
  • src
project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • dvp
  • ov2640_capture
  • src
Functions | Variables
project/at_start_f437/examples/dvp/ov2640_capture/src/main.c File Reference

main program More...

#include "at32f435_437.h"
#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_lcd.h"
#include "ov2640.h"
#include "dvp.h"

Go to the source code of this file.

Functions

void | ov2640_capture (void)
int | main (void)
main function. More...

Variables

uint16_t point_color

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dvp/ov2640_capture/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • dvp
  • ov2640_capture
  • src
project/at_start_f437/examples/dvp/ov2640_capture/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437.h"
28#include "at32f435_437_board.h"
29#include "at32f435_437_clock.h"
30#include "xmc_lcd.h"
31#include "ov2640.h"
32#include "dvp.h"
33
42uint16_t point_color;
43void ov2640_capture(void);
44
50int main(void)
51{
52 lcd_struct = &lcd_dev_struct;
53 system_clock_config();
54
55 at32_board_init();
56 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
57 lcd_struct->lcd_init();
58 point_color = WHITE;
59 lcd_struct->lcd_clear(point_color);
60
61 lcd_string_show(30, 50, 200, 16, 16, (uint8_t *)"Artery AT32F435/F437");
62 lcd_string_show(30, 70, 200, 16, 16, (uint8_t *)"OV2640 TEST");
63 lcd_string_show(30, 90, 200, 16, 16, (uint8_t *)"2021/6/21");
64
65 delay_ms(500);
66 while(ov2640_init() != SUCCESS)
67 {
68 lcd_string_show(30, 130, 240, 16, 16, (uint8_t *)"OV2640 ERR");
69 delay_ms(200);
70 lcd_fill(30, 130, 239, 170, WHITE);
71 delay_ms(200);
72 at32_led_toggle(LED2);
73 }
74
75 lcd_string_show(30, 130, 200, 16, 16, (uint8_t *)"OV2640 OK");
76
77 delay_ms(500);
78 ov2640_capture();
79 while(1)
80 {
81
82 }
83}
84
85void ov2640_capture(void)
86{
87 lcd_clear(WHITE);
88
89 lcd_string_show(30, 50, 200, 16, 16, (uint8_t *)"Artery AT32F435/F437");
90 lcd_string_show(30, 70, 200, 16, 16, (uint8_t *)"OV2640 RGB565 Mode");
91 lcd_string_show(30, 90, 200, 16, 16, (uint8_t *)"DVP Initializing...");
92
93 ov2640_rgb565_mode();
94 ov2640_light_mode(3);
95 ov2640_color_saturation(2);
96 ov2640_brightness(4);
97 ov2640_contrast(2);
98
99 dvp_config();
100
101 dvp_dma_init((uint32_t)XMC_LCD_DATA, 0, 38400);
102
103 delay_ms(100);
104 lcd_clear(BLACK);
105 ov2640_outsize_set(LCD_W, LCD_H);
106 dvp_start();
107}
108
at32f435_437.h
at32f435_437 header file
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
ov2640_init
error_status ov2640_init(void)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c:84
LCD_H
#define LCD_H
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:79
ov2640_capture
void ov2640_capture(void)
Definition: project/at_start_f435/examples/dvp/ov2640_capture/src/main.c:85
lcd_dev_struct
lcd_dev_type lcd_dev_struct
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:38
dvp_start
void dvp_start(void)
start dvp transmission
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c:169
ov2640_light_mode
void ov2640_light_mode(u8 mode)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c:210
lcd_string_show
void lcd_string_show(uint16_t x, uint16_t y, uint16_t width, uint16_t height, uint8_t size, uint8_t *p)
this function is show string to lcd
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:474
lcd_fill
void lcd_fill(uint16_t sx, uint16_t sy, uint16_t ex, uint16_t ey, uint16_t color)
this function is fill in lcd with concolorous
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:508
BLACK
#define BLACK
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:85
ov2640_brightness
void ov2640_brightness(u8 bright)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c:265
WHITE
#define WHITE
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:84
ov2640_outsize_set
u8 ov2640_outsize_set(u16 width, u16 height)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c:389
LCD_W
#define LCD_W
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:78
point_color
uint16_t point_color
Definition: project/at_start_f437/examples/dvp/ov2640_capture/src/main.c:42
ov2640_rgb565_mode
void ov2640_rgb565_mode(void)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c:151
lcd_clear
void lcd_clear(uint16_t color)
this function is clear the lcd.
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:379
dvp_dma_init
void dvp_dma_init(uint32_t mem0addr, uint32_t mem1addr, uint16_t memsize)
initialize dma for dvp
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c:129
ov2640_contrast
void ov2640_contrast(u8 contrast)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c:280
lcd_struct
lcd_dev_type * lcd_struct
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:48
dvp_config
void dvp_config(void)
configure dvp
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c:60
ov2640_color_saturation
void ov2640_color_saturation(u8 sat)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c:249
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
XMC_LCD_DATA
#define XMC_LCD_DATA
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
lcd_dev_type::lcd_clear
void(* lcd_clear)(uint16_t color)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:50
lcd_dev_type::lcd_init
void(* lcd_init)(void)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:47
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • dvp
  • ov5640_capture
  • inc
project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • dvp
  • ov5640_capture
  • inc
project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • dvp
  • ov5640_capture
  • inc
project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • dvp
  • ov5640_capture
  • src
Functions
project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • dvp
  • ov5640_capture
  • src
project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 *(__IO uint32_t*)0x40023C60 &= 0xFFFFFFFC;
120 *(__IO uint32_t*)0x40023C60 |= 0x00000001;
121 while ((*(__IO uint32_t*)0x40023C60 & 0x30) != 0x10)
122 {
123 }
124
125 /* update system_core_clock global variable */
126 system_core_clock_update();
127}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • dvp
  • ov5640_capture
  • src
Functions
project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • dvp
  • ov5640_capture
  • src
project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • dvp
  • ov5640_capture
  • src
Functions | Variables
project/at_start_f437/examples/dvp/ov5640_capture/src/main.c File Reference

main program More...

#include "at32f435_437.h"
#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_lcd.h"
#include "ov5640.h"
#include "dvp.h"

Go to the source code of this file.

Functions

void | ov5640_capture (void)
int | main (void)
main function. More...

Variables

uint16_t point_color

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/dvp/ov5640_capture/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • dvp
  • ov5640_capture
  • src
project/at_start_f437/examples/dvp/ov5640_capture/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437.h"
28#include "at32f435_437_board.h"
29#include "at32f435_437_clock.h"
30#include "xmc_lcd.h"
31#include "ov5640.h"
32#include "dvp.h"
33
42uint16_t point_color;
43void ov5640_capture(void);
44
50int main(void)
51{
52 lcd_struct = &lcd_dev_struct;
53 system_clock_config();
54
55 at32_board_init();
56 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
57 lcd_struct->lcd_init();
58 point_color = WHITE;
59 lcd_struct->lcd_clear(point_color);
60
61 lcd_string_show(30, 50, 200, 16, 16, (uint8_t *)"Artery AT32F435/F437");
62 lcd_string_show(30, 70, 200, 16, 16, (uint8_t *)"OV5640 TEST");
63 lcd_string_show(30, 90, 200, 16, 16, (uint8_t *)"2021/6/21");
64
65 delay_ms(500);
66 while(ov5640_init() != SUCCESS)
67 {
68 lcd_string_show(30, 130, 240, 16, 16, (uint8_t *)"OV5640 ERR");
69 delay_ms(200);
70 lcd_fill(30, 130, 239, 170, WHITE);
71 delay_ms(200);
72 at32_led_toggle(LED2);
73 }
74
75 lcd_string_show(30, 130, 200, 16, 16, (uint8_t *)"OV5640 OK");
76
77 delay_ms(500);
78 ov5640_capture();
79 while(1)
80 {
81
82 }
83}
84
85void ov5640_capture(void)
86{
87 uint8_t reg_val = 0;
88 lcd_clear(WHITE);
89
90 lcd_string_show(30, 50, 200, 16, 16, (uint8_t *)"Artery AT32F435/F437");
91 lcd_string_show(30, 70, 200, 16, 16, (uint8_t *)"OV5640 RGB565 Mode");
92 lcd_string_show(30, 90, 200, 16, 16, (uint8_t *)"DVP Initializing...");
93
94 ov5640_rgb565_mode();
95 ov5640_focus_init();
96 ov5640_light_mode(0);
97 ov5640_color_saturation(3);
98 ov5640_brightness(4);
99 ov5640_contrast(3);
100 ov5640_sharpness(33);
101 ov5640_focus_constant();
102
103 dvp_config();
104
105 dvp_dma_init((uint32_t)XMC_LCD_DATA, 0, 38400);
106
107 delay_ms(100);
108 ov5640_outsize_set(0, 0, LCD_W, LCD_H);
109 ov5640_reg_read(0x4730, &reg_val);
110 dvp_start();
111}
112
at32f435_437.h
at32f435_437 header file
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
LCD_H
#define LCD_H
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:79
lcd_dev_struct
lcd_dev_type lcd_dev_struct
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:38
dvp_start
void dvp_start(void)
start dvp transmission
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c:169
lcd_string_show
void lcd_string_show(uint16_t x, uint16_t y, uint16_t width, uint16_t height, uint8_t size, uint8_t *p)
this function is show string to lcd
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:474
lcd_fill
void lcd_fill(uint16_t sx, uint16_t sy, uint16_t ex, uint16_t ey, uint16_t color)
this function is fill in lcd with concolorous
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:508
WHITE
#define WHITE
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:84
LCD_W
#define LCD_W
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:78
lcd_clear
void lcd_clear(uint16_t color)
this function is clear the lcd.
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:379
dvp_dma_init
void dvp_dma_init(uint32_t mem0addr, uint32_t mem1addr, uint16_t memsize)
initialize dma for dvp
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c:129
lcd_struct
lcd_dev_type * lcd_struct
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:48
dvp_config
void dvp_config(void)
configure dvp
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c:60
ov5640_init
error_status ov5640_init(void)
initialize ov5640
Definition: at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c:160
ov5640_outsize_set
void ov5640_outsize_set(uint16_t offx, uint16_t offy, uint16_t width, uint16_t height)
ov5640 output size set
Definition: at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c:459
ov5640_light_mode
void ov5640_light_mode(uint8_t mode)
this function is draw point to lcd
Definition: at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c:269
ov5640_focus_constant
error_status ov5640_focus_constant(void)
ov5640 focus constant
Definition: at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c:587
ov5640_brightness
void ov5640_brightness(uint8_t bright)
ov5640 brightness configure
Definition: at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c:312
ov5640_reg_read
error_status ov5640_reg_read(uint16_t reg, uint8_t *data)
read register from ov5640
Definition: at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c:136
ov5640_color_saturation
void ov5640_color_saturation(uint8_t sat)
ov5640 color saturation configure
Definition: at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c:288
ov5640_rgb565_mode
void ov5640_rgb565_mode(void)
ov5640 rgb565 mode configure
Definition: at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c:231
ov5640_sharpness
void ov5640_sharpness(uint8_t sharp)
ov5640 sharpness configure
Definition: at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c:393
point_color
uint16_t point_color
Definition: project/at_start_f437/examples/dvp/ov5640_capture/src/main.c:42
ov5640_focus_init
error_status ov5640_focus_init(void)
initialize ov5640 focus function
Definition: at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c:510
ov5640_capture
void ov5640_capture(void)
Definition: project/at_start_f435/examples/dvp/ov5640_capture/src/main.c:85
ov5640_contrast
void ov5640_contrast(uint8_t contrast)
ov5640 contrast configure
Definition: at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c:346
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
XMC_LCD_DATA
#define XMC_LCD_DATA
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
lcd_dev_type::lcd_clear
void(* lcd_clear)(uint16_t color)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:50
lcd_dev_type::lcd_init
void(* lcd_init)(void)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:47
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • edma
  • burst_mode
  • inc
project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • edma
  • burst_mode
  • inc
project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • edma
  • burst_mode
  • inc
project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • edma
  • burst_mode
  • src
Functions
project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • edma
  • burst_mode
  • src
project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • edma
  • burst_mode
  • src
Functions
project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • edma
  • burst_mode
  • src
project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
135
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • edma
  • burst_mode
  • src
Functions | Variables
project/at_start_f437/examples/edma/burst_mode/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int | main (void)
main function. More...
void | TMR1_OVF_TMR10_IRQHandler (void)
this function handles timer1 overflow handler. More...

Variables

gpio_init_type | gpio_init_struct = {0}
tmr_output_config_type tmr_output_struct
edma_init_type edma_init_struct
uint32_t | duty_buffer [4] = {10,10,10,10}

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/burst_mode/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • edma
  • burst_mode
  • src
project/at_start_f437/examples/edma/burst_mode/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 tmr_output_config_type tmr_output_struct;
40 edma_init_type edma_init_struct;
41
42uint32_t duty_buffer[4] = {10,10,10,10};
43
49int main(void)
50{
51 system_clock_config();
52
53 at32_board_init();
54
55 /* turn led2/led3/led4 on */
56 at32_led_on(LED2);
57 at32_led_on(LED3);
58 at32_led_on(LED4);
59
60 /* enable tmr1/gpioa clock */
61 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
62 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
63
64 /* enable dma1 clock */
65 crm_periph_clock_enable(CRM_EDMA_PERIPH_CLOCK, TRUE);
66
67 /* timer1 output pin Configuration */
68 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11;
69 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
70 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
71 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
72 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
73 gpio_init(GPIOA, &gpio_init_struct);
74
75 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_1);
76 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE9, GPIO_MUX_1);
77 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE10, GPIO_MUX_1);
78 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE11, GPIO_MUX_1);
79
80 /* i2s2_rx:edma stream1 configuration */
81 edma_default_para_init(&edma_init_struct);
82 edma_init_struct.direction = EDMA_DIR_MEMORY_TO_PERIPHERAL;
83 edma_init_struct.buffer_size = (uint32_t)4;
84 edma_init_struct.peripheral_data_width = EDMA_PERIPHERAL_DATA_WIDTH_WORD;
85 edma_init_struct.peripheral_base_addr = (uint32_t)&(TMR1->c1dt);
86 edma_init_struct.peripheral_inc_enable = TRUE;
87 edma_init_struct.memory_data_width = EDMA_MEMORY_DATA_WIDTH_WORD;
88 edma_init_struct.memory0_base_addr = (uint32_t)duty_buffer;
89 edma_init_struct.memory_inc_enable = TRUE;
90 edma_init_struct.peripheral_burst_mode = EDMA_PERIPHERAL_BURST_4;
91 edma_init_struct.memory_burst_mode = EDMA_MEMORY_BURST_4;
92 edma_init_struct.fifo_mode_enable = TRUE;
93 edma_init_struct.fifo_threshold = EDMA_FIFO_THRESHOLD_FULL;
94 edma_init_struct.priority = EDMA_PRIORITY_HIGH;
95 edma_init_struct.loop_mode_enable = TRUE;
96 edma_init(EDMA_STREAM1, &edma_init_struct);
97
98 /* edmamux init */
99 edmamux_enable(TRUE);
100 edmamux_init(EDMAMUX_CHANNEL1, EDMAMUX_DMAREQ_ID_TMR1_OVERFLOW);
101
102 /* enable stream */
103 edma_stream_enable(EDMA_STREAM1, TRUE);
104
105 /* tmr1 configuration */
106 tmr_base_init(TMR1, 500, 0);
107 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
108
109 /* channel 1, 2, 3 and 4 configuration in output mode */
110 tmr_output_default_para_init(&tmr_output_struct);
111 tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
112 tmr_output_struct.oc_output_state = TRUE;
113 tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;
114 tmr_output_struct.oc_idle_state = TRUE;
115 tmr_output_struct.occ_output_state = FALSE;
116 tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
117 tmr_output_struct.occ_idle_state = FALSE;
118
119 /* channel 1 */
120 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
121 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, duty_buffer[0]);
122
123 /* channel 2 */
124 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
125 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_2, duty_buffer[1]);
126
127 /* channel 3 */
128 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
129 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_3, duty_buffer[2]);
130
131 /* channel 4 */
132 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_4, &tmr_output_struct);
133 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_4, duty_buffer[3]);
134
135 /* tmr1 output enable */
136 tmr_output_enable(TMR1, TRUE);
137
138 /* enable tmr1 overflow edam request */
139 tmr_dma_request_enable(TMR1, TMR_OVERFLOW_DMA_REQUEST, TRUE);
140
141 /* overflow interrupt enable */
142 tmr_interrupt_enable(TMR1, TMR_OVF_INT, TRUE);
143
144 /* tmr1 overflow interrupt nvic init */
145 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
146 nvic_irq_enable(TMR1_OVF_TMR10_IRQn, 1, 0);
147
148 /* enable tmr1 */
149 tmr_counter_enable(TMR1, TRUE);
150
151 while(1)
152 {
153 }
154}
155
161void TMR1_OVF_TMR10_IRQHandler(void)
162{
163 if(tmr_flag_get(TMR1, TMR_OVF_FLAG) == SET)
164 {
165 /* change duty_buffer data value */
166 duty_buffer[0] += 10;
167 duty_buffer[1] += 10;
168 duty_buffer[2] += 10;
169 duty_buffer[3] += 10;
170
171 if(duty_buffer[0] >= 500)
172 {
173 duty_buffer[0] = 10;
174 duty_buffer[1] = 10;
175 duty_buffer[2] = 10;
176 duty_buffer[3] = 10;
177 }
178
179 /* clear tmr1 overflow flag */
180 tmr_flag_clear(TMR1, TMR_OVF_FLAG);
181 }
182}
183
184
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
TMR1_OVF_TMR10_IRQHandler
void TMR1_OVF_TMR10_IRQHandler(void)
this function handles tmr1 overflow handler.
Definition: project/at_start_f435/examples/debug/tmr1/src/main.c:46
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/edma/burst_mode/src/main.c:38
tmr_output_struct
tmr_output_config_type tmr_output_struct
Definition: project/at_start_f437/examples/edma/burst_mode/src/main.c:39
edma_init_struct
edma_init_type edma_init_struct
Definition: project/at_start_f437/examples/edma/burst_mode/src/main.c:40
duty_buffer
uint32_t duty_buffer[4]
Definition: project/at_start_f437/examples/edma/burst_mode/src/main.c:42
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_EDMA_PERIPH_CLOCK
@ CRM_EDMA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:114
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
edmamux_init
void edmamux_init(edmamux_channel_type *edmamux_channelx, edmamux_requst_id_sel_type edmamux_req_id)
edmamux init.
Definition: at32f435_437_edma.c:718
edma_init
void edma_init(edma_stream_type *edma_streamx, edma_init_type *edma_init_struct)
edma init.
Definition: at32f435_437_edma.c:115
edma_stream_enable
void edma_stream_enable(edma_stream_type *edma_streamx, confirm_state new_state)
enable or disable the edma streamx.
Definition: at32f435_437_edma.c:198
edmamux_enable
void edmamux_enable(confirm_state new_state)
enable or disable the edma edmamux.
Definition: at32f435_437_edma.c:673
edma_default_para_init
void edma_default_para_init(edma_init_type *edma_init_struct)
edma init struct config with its default value.
Definition: at32f435_437_edma.c:165
EDMA_PRIORITY_HIGH
@ EDMA_PRIORITY_HIGH
Definition: at32f435_437_edma.h:191
EDMA_PERIPHERAL_DATA_WIDTH_WORD
@ EDMA_PERIPHERAL_DATA_WIDTH_WORD
Definition: at32f435_437_edma.h:171
EDMA_MEMORY_DATA_WIDTH_WORD
@ EDMA_MEMORY_DATA_WIDTH_WORD
Definition: at32f435_437_edma.h:181
EDMA_MEMORY_BURST_4
@ EDMA_MEMORY_BURST_4
Definition: at32f435_437_edma.h:225
EDMA_PERIPHERAL_BURST_4
@ EDMA_PERIPHERAL_BURST_4
Definition: at32f435_437_edma.h:236
EDMA_FIFO_THRESHOLD_FULL
@ EDMA_FIFO_THRESHOLD_FULL
Definition: at32f435_437_edma.h:203
EDMA_DIR_MEMORY_TO_PERIPHERAL
@ EDMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_edma.h:160
EDMAMUX_DMAREQ_ID_TMR1_OVERFLOW
@ EDMAMUX_DMAREQ_ID_TMR1_OVERFLOW
Definition: at32f435_437_edma.h:308
EDMA_STREAM1
#define EDMA_STREAM1
Definition: at32f435_437_edma.h:962
EDMAMUX_CHANNEL1
#define EDMAMUX_CHANNEL1
Definition: at32f435_437_edma.h:989
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_dma_request_enable
void tmr_dma_request_enable(tmr_type *tmr_x, tmr_dma_request_type dma_request, confirm_state new_state)
enable or disable tmr dma request
Definition: at32f435_437_tmr.c:1358
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_output_enable
void tmr_output_enable(tmr_type *tmr_x, confirm_state new_state)
tmr output enable(oen),this function is important for advtm output enable
Definition: at32f435_437_tmr.c:1499
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_OVERFLOW_DMA_REQUEST
@ TMR_OVERFLOW_DMA_REQUEST
Definition: at32f435_437_tmr.h:271
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_OUTPUT_CONTROL_PWM_MODE_B
@ TMR_OUTPUT_CONTROL_PWM_MODE_B
Definition: at32f435_437_tmr.h:181
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR_OUTPUT_ACTIVE_LOW
@ TMR_OUTPUT_ACTIVE_LOW
Definition: at32f435_437_tmr.h:199
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
TMR1_OVF_TMR10_IRQn
@ TMR1_OVF_TMR10_IRQn
Definition: at32f435_437.h:173
edma_init_type
edma init type
Definition: at32f435_437_edma.h:440
edma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_edma.h:441
edma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_edma.h:444
edma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_edma.h:446
edma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_edma.h:445
edma_init_type::direction
edma_dir_type direction
Definition: at32f435_437_edma.h:443
edma_init_type::fifo_mode_enable
confirm_state fifo_mode_enable
Definition: at32f435_437_edma.h:451
edma_init_type::peripheral_data_width
edma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_edma.h:447
edma_init_type::fifo_threshold
edma_fifo_threshold_type fifo_threshold
Definition: at32f435_437_edma.h:452
edma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_edma.h:449
edma_init_type::priority
edma_priority_level_type priority
Definition: at32f435_437_edma.h:450
edma_init_type::memory0_base_addr
uint32_t memory0_base_addr
Definition: at32f435_437_edma.h:442
edma_init_type::peripheral_burst_mode
edma_peripheral_burst_type peripheral_burst_mode
Definition: at32f435_437_edma.h:454
edma_init_type::memory_data_width
edma_memory_data_size_type memory_data_width
Definition: at32f435_437_edma.h:448
edma_init_type::memory_burst_mode
edma_memory_burst_type memory_burst_mode
Definition: at32f435_437_edma.h:453
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::occ_output_state
confirm_state occ_output_state
Definition: at32f435_437_tmr.h:418
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::occ_polarity
tmr_output_polarity_type occ_polarity
Definition: at32f435_437_tmr.h:416
tmr_output_config_type::occ_idle_state
confirm_state occ_idle_state
Definition: at32f435_437_tmr.h:414
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • edma
  • dmamux_genertor_exint
  • inc
project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • edma
  • dmamux_genertor_exint
  • inc
project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • edma
  • dmamux_genertor_exint
  • inc
project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • edma
  • dmamux_genertor_exint
  • src
Functions
project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • edma
  • dmamux_genertor_exint
  • src
project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • edma
  • dmamux_genertor_exint
  • src
Functions
project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • edma
  • dmamux_genertor_exint
  • src
project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • edma
  • dmamux_genertor_exint
  • src
Macros | Functions | Variables
project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 16

Functions

void | EDMA_Stream4_IRQHandler (void)
this function handles edma stream4 handler. More...
void | EXINT1_IRQHandler (void)
exint1 interrupt handler More...
int | main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
edma_init_type edma_init_struct
edmamux_gen_init_type dmamux_gen_init_struct
exint_init_type exint_init_struct
uint16_t | src_buffer [16]
uint16_t | dst_buffer [16]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • edma
  • dmamux_genertor_exint
  • src
project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 edma_init_type edma_init_struct;
40 edmamux_gen_init_type dmamux_gen_init_struct;
41 exint_init_type exint_init_struct;
42
43#define BUFFER_SIZE 16
44uint16_t src_buffer[BUFFER_SIZE] = {0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008,
45 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, 0x0010};
46
47uint16_t dst_buffer[BUFFER_SIZE];
48
54void EDMA_Stream4_IRQHandler(void)
55{
56 if(edma_flag_get(EDMA_FDT4_FLAG) != RESET)
57 {
58 /* turn led2/led3/led4 on */
59 at32_led_on(LED2);
60 at32_led_on(LED3);
61 at32_led_on(LED4);
62 edma_flag_clear(EDMA_FDT4_FLAG);
63 }
64}
65
71void EXINT1_IRQHandler(void)
72{
73 if(exint_flag_get(EXINT_LINE_1) != RESET)
74 {
75 at32_led_toggle(LED2);
76 exint_flag_clear(EXINT_LINE_1);
77 }
78}
84int main(void)
85{
86 system_clock_config();
87
88 at32_board_init();
89
90 /* enable edma/gpioa clock */
91 crm_periph_clock_enable(CRM_EDMA_PERIPH_CLOCK, TRUE);
92 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
93
94 /* config pa1 for input mode */
95 gpio_init_struct.gpio_pins = GPIO_PINS_1;
96 gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
97 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
98 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
99 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
100 gpio_init(GPIOA, &gpio_init_struct);
101
102 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE1);
103
104 exint_default_para_init(&exint_init_struct);
105 exint_init_struct.line_enable = TRUE;
106 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
107 exint_init_struct.line_select = EXINT_LINE_1;
108 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
109 exint_init(&exint_init_struct);
110
111 /* exint line1 interrupt nvic init */
112 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
113 nvic_irq_enable(EXINT1_IRQn, 1, 0);
114
115 /* edma stream4 configuration */
116 edma_default_para_init(&edma_init_struct);
117 edma_init_struct.direction = EDMA_DIR_PERIPHERAL_TO_MEMORY;
118 edma_init_struct.buffer_size = (uint32_t)16;
119 edma_init_struct.peripheral_data_width = EDMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
120 edma_init_struct.peripheral_base_addr = (uint32_t)src_buffer;
121 edma_init_struct.peripheral_inc_enable = TRUE;
122 edma_init_struct.memory_data_width = EDMA_MEMORY_DATA_WIDTH_HALFWORD;
123 edma_init_struct.memory0_base_addr = (uint32_t)dst_buffer;
124 edma_init_struct.memory_inc_enable = TRUE;
125 edma_init_struct.peripheral_burst_mode = EDMA_PERIPHERAL_SINGLE;
126 edma_init_struct.memory_burst_mode = EDMA_MEMORY_SINGLE;
127 edma_init_struct.fifo_mode_enable = FALSE;
128 edma_init_struct.fifo_threshold = EDMA_FIFO_THRESHOLD_1QUARTER;
129 edma_init_struct.priority = EDMA_PRIORITY_HIGH;
130 edma_init_struct.loop_mode_enable = FALSE;
131 edma_init(EDMA_STREAM4, &edma_init_struct);
132
133 /* genertor1 configuration */
134 edmamux_generator_default_para_init(&dmamux_gen_init_struct);
135 dmamux_gen_init_struct.gen_polarity = EDMAMUX_GEN_POLARITY_RISING;
136 dmamux_gen_init_struct.gen_request_number = 4;
137 dmamux_gen_init_struct.gen_signal_sel = EDMAMUX_GEN_ID_EXINT1;
138 dmamux_gen_init_struct.gen_enable = TRUE;
139 edmamux_generator_config(EDMAMUX_GENERATOR1, &dmamux_gen_init_struct);
140
141 /* enable transfer full data intterrupt */
142 edma_interrupt_enable(EDMA_STREAM4, EDMA_FDT_INT, TRUE);
143
144 /* edma stream4 interrupt nvic init */
145 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
146 nvic_irq_enable(EDMA_Stream4_IRQn, 1, 0);
147
148 /* dmamux function enable */
149 edmamux_enable(TRUE);
150 edmamux_init(EDMAMUX_CHANNEL4, EDMAMUX_DMAREQ_ID_REQ_G1);
151
152 /* enable edma stream4 */
153 edma_stream_enable(EDMA_STREAM4, TRUE);
154
155 while(1)
156 {
157 }
158}
159
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
EXINT1_IRQHandler
void EXINT1_IRQHandler(void)
exint1 interrupt handler
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:53
EDMA_Stream4_IRQHandler
void EDMA_Stream4_IRQHandler(void)
edma stream4 irq handler
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c:216
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c:38
edma_init_struct
edma_init_type edma_init_struct
Definition: project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c:39
dmamux_gen_init_struct
edmamux_gen_init_type dmamux_gen_init_struct
Definition: project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c:40
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c:43
dst_buffer
uint16_t dst_buffer[16]
Definition: project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c:47
src_buffer
uint16_t src_buffer[16]
Definition: project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c:44
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_EDMA_PERIPH_CLOCK
@ CRM_EDMA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:114
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
edma_flag_get
flag_status edma_flag_get(uint32_t edma_flag)
get the edma flag.
Definition: at32f435_437_edma.c:512
edma_flag_clear
void edma_flag_clear(uint32_t edma_flag)
clear the edma flag.
Definition: at32f435_437_edma.c:549
edmamux_init
void edmamux_init(edmamux_channel_type *edmamux_channelx, edmamux_requst_id_sel_type edmamux_req_id)
edmamux init.
Definition: at32f435_437_edma.c:718
edmamux_generator_default_para_init
void edmamux_generator_default_para_init(edmamux_gen_init_type *edmamux_gen_init_struct)
edmamux request generator init struct config with its default value.
Definition: at32f435_437_edma.c:766
edma_init
void edma_init(edma_stream_type *edma_streamx, edma_init_type *edma_init_struct)
edma init.
Definition: at32f435_437_edma.c:115
edmamux_generator_config
void edmamux_generator_config(edmamux_generator_type *edmamux_gen_x, edmamux_gen_init_type *edmamux_gen_init_struct)
edmamux request generator init.
Definition: at32f435_437_edma.c:779
edma_stream_enable
void edma_stream_enable(edma_stream_type *edma_streamx, confirm_state new_state)
enable or disable the edma streamx.
Definition: at32f435_437_edma.c:198
edmamux_enable
void edmamux_enable(confirm_state new_state)
enable or disable the edma edmamux.
Definition: at32f435_437_edma.c:673
edma_interrupt_enable
void edma_interrupt_enable(edma_stream_type *edma_streamx, uint32_t edma_int, confirm_state new_state)
enable or disable the edma streamx interrupts.
Definition: at32f435_437_edma.c:225
edma_default_para_init
void edma_default_para_init(edma_init_type *edma_init_struct)
edma init struct config with its default value.
Definition: at32f435_437_edma.c:165
EDMA_PRIORITY_HIGH
@ EDMA_PRIORITY_HIGH
Definition: at32f435_437_edma.h:191
EDMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ EDMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_edma.h:170
EDMA_MEMORY_DATA_WIDTH_HALFWORD
@ EDMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_edma.h:180
EDMA_MEMORY_SINGLE
@ EDMA_MEMORY_SINGLE
Definition: at32f435_437_edma.h:224
EDMAMUX_GEN_ID_EXINT1
@ EDMAMUX_GEN_ID_EXINT1
Definition: at32f435_437_edma.h:400
EDMA_PERIPHERAL_SINGLE
@ EDMA_PERIPHERAL_SINGLE
Definition: at32f435_437_edma.h:235
EDMA_FIFO_THRESHOLD_1QUARTER
@ EDMA_FIFO_THRESHOLD_1QUARTER
Definition: at32f435_437_edma.h:200
EDMAMUX_GEN_POLARITY_RISING
@ EDMAMUX_GEN_POLARITY_RISING
Definition: at32f435_437_edma.h:431
EDMA_DIR_PERIPHERAL_TO_MEMORY
@ EDMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_edma.h:159
EDMAMUX_DMAREQ_ID_REQ_G1
@ EDMAMUX_DMAREQ_ID_REQ_G1
Definition: at32f435_437_edma.h:255
EDMA_FDT4_FLAG
#define EDMA_FDT4_FLAG
Definition: at32f435_437_edma.h:86
EDMA_FDT_INT
#define EDMA_FDT_INT
Definition: at32f435_437_edma.h:55
EDMA_STREAM4
#define EDMA_STREAM4
Definition: at32f435_437_edma.h:965
EDMAMUX_GENERATOR1
#define EDMAMUX_GENERATOR1
Definition: at32f435_437_edma.h:998
EDMAMUX_CHANNEL4
#define EDMAMUX_CHANNEL4
Definition: at32f435_437_edma.h:992
exint_flag_get
flag_status exint_flag_get(uint32_t exint_line)
get exint flag
Definition: at32f435_437_exint.c:142
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_1
#define EXINT_LINE_1
Definition: at32f435_437_exint.h:53
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_INPUT
@ GPIO_MODE_INPUT
Definition: at32f435_437_gpio.h:82
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE1
@ SCFG_PINS_SOURCE1
Definition: at32f435_437_scfg.h:102
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
EXINT1_IRQn
@ EXINT1_IRQn
Definition: at32f435_437.h:153
EDMA_Stream4_IRQn
@ EDMA_Stream4_IRQn
Definition: at32f435_437.h:160
edma_init_type
edma init type
Definition: at32f435_437_edma.h:440
edma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_edma.h:441
edma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_edma.h:444
edma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_edma.h:446
edma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_edma.h:445
edma_init_type::direction
edma_dir_type direction
Definition: at32f435_437_edma.h:443
edma_init_type::fifo_mode_enable
confirm_state fifo_mode_enable
Definition: at32f435_437_edma.h:451
edma_init_type::peripheral_data_width
edma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_edma.h:447
edma_init_type::fifo_threshold
edma_fifo_threshold_type fifo_threshold
Definition: at32f435_437_edma.h:452
edma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_edma.h:449
edma_init_type::priority
edma_priority_level_type priority
Definition: at32f435_437_edma.h:450
edma_init_type::memory0_base_addr
uint32_t memory0_base_addr
Definition: at32f435_437_edma.h:442
edma_init_type::peripheral_burst_mode
edma_peripheral_burst_type peripheral_burst_mode
Definition: at32f435_437_edma.h:454
edma_init_type::memory_data_width
edma_memory_data_size_type memory_data_width
Definition: at32f435_437_edma.h:448
edma_init_type::memory_burst_mode
edma_memory_burst_type memory_burst_mode
Definition: at32f435_437_edma.h:453
edmamux_gen_init_type
edmamux generator init type
Definition: at32f435_437_edma.h:473
edmamux_gen_init_type::gen_enable
confirm_state gen_enable
Definition: at32f435_437_edma.h:477
edmamux_gen_init_type::gen_request_number
uint32_t gen_request_number
Definition: at32f435_437_edma.h:476
edmamux_gen_init_type::gen_signal_sel
edmamux_gen_id_sel_type gen_signal_sel
Definition: at32f435_437_edma.h:474
edmamux_gen_init_type::gen_polarity
edmamux_gen_pol_type gen_polarity
Definition: at32f435_437_edma.h:475
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • edma
  • dmamux_synchronization_exint
  • inc
project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • edma
  • dmamux_synchronization_exint
  • inc
project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • edma
  • dmamux_synchronization_exint
  • inc
project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • edma
  • dmamux_synchronization_exint
  • src
Functions
project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • edma
  • dmamux_synchronization_exint
  • src
project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • edma
  • dmamux_synchronization_exint
  • src
Functions
project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • edma
  • dmamux_synchronization_exint
  • src
project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • edma
  • dmamux_synchronization_exint
  • src
Macros | Functions | Variables
project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 16

Functions

void | EDMA_Stream4_IRQHandler (void)
this function handles edma stream4 handler. More...
void | EXINT1_IRQHandler (void)
exint1 interrupt handler More...
int | main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
edma_init_type edma_init_struct
edmamux_sync_init_type edmamux_sync_init_struct
exint_init_type exint_init_struct
uint16_t | src_buffer [16]
uint16_t | dst_buffer [16]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • edma
  • dmamux_synchronization_exint
  • src
project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 edma_init_type edma_init_struct;
40 edmamux_sync_init_type edmamux_sync_init_struct;
41 exint_init_type exint_init_struct;
42#define BUFFER_SIZE 16
43uint16_t src_buffer[BUFFER_SIZE] = {0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008,
44 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, 0x0010};
45
46uint16_t dst_buffer[BUFFER_SIZE];
47
53void EDMA_Stream4_IRQHandler(void)
54{
55 if(edma_flag_get(EDMA_FDT4_FLAG) != RESET)
56 {
57 /* turn led2/led3/led4 on */
58 at32_led_on(LED2);
59 at32_led_on(LED3);
60 at32_led_on(LED4);
61 edma_flag_clear(EDMA_FDT4_FLAG);
62 }
63}
64
70void EXINT1_IRQHandler(void)
71{
72 if(exint_flag_get(EXINT_LINE_1) != RESET)
73 {
74 at32_led_toggle(LED2);
75 exint_flag_clear(EXINT_LINE_1);
76 }
77}
78
84int main(void)
85{
86 system_clock_config();
87
88 at32_board_init();
89
90 /* enable edma/gpioa/tmr1 clock */
91 crm_periph_clock_enable(CRM_EDMA_PERIPH_CLOCK, TRUE);
92 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
93 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
94
95 /* config pa1 for input mode */
96 gpio_init_struct.gpio_pins = GPIO_PINS_1;
97 gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
98 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
99 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
100 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
101 gpio_init(GPIOA, &gpio_init_struct);
102
103 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE1);
104
105 exint_default_para_init(&exint_init_struct);
106 exint_init_struct.line_enable = TRUE;
107 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
108 exint_init_struct.line_select = EXINT_LINE_1;
109 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
110 exint_init(&exint_init_struct);
111
112 /* exint line1 interrupt nvic init */
113 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
114 nvic_irq_enable(EXINT1_IRQn, 1, 0);
115
116 /* edma stream4 configuration */
117 edma_default_para_init(&edma_init_struct);
118 edma_init_struct.direction = EDMA_DIR_PERIPHERAL_TO_MEMORY;
119 edma_init_struct.buffer_size = (uint32_t)16;
120 edma_init_struct.peripheral_data_width = EDMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
121 edma_init_struct.peripheral_base_addr = (uint32_t)src_buffer;
122 edma_init_struct.peripheral_inc_enable = TRUE;
123 edma_init_struct.memory_data_width = EDMA_MEMORY_DATA_WIDTH_HALFWORD;
124 edma_init_struct.memory0_base_addr = (uint32_t)dst_buffer;
125 edma_init_struct.memory_inc_enable = TRUE;
126 edma_init_struct.peripheral_burst_mode = EDMA_PERIPHERAL_SINGLE;
127 edma_init_struct.memory_burst_mode = EDMA_MEMORY_SINGLE;
128 edma_init_struct.fifo_mode_enable = FALSE;
129 edma_init_struct.fifo_threshold = EDMA_FIFO_THRESHOLD_1QUARTER;
130 edma_init_struct.priority = EDMA_PRIORITY_HIGH;
131 edma_init_struct.loop_mode_enable = FALSE;
132 edma_init(EDMA_STREAM4, &edma_init_struct);
133
134 /* edmamux synchronization configuration */
135 edmamux_sync_default_para_init(&edmamux_sync_init_struct);
136 edmamux_sync_init_struct.sync_enable = TRUE;
137 edmamux_sync_init_struct.sync_event_enable = TRUE;
138 edmamux_sync_init_struct.sync_polarity = EDMAMUX_SYNC_POLARITY_RISING;
139 edmamux_sync_init_struct.sync_request_number = 4;
140 edmamux_sync_init_struct.sync_signal_sel = EDMAMUX_SYNC_ID_EXINT1;
141 edmamux_sync_config(EDMAMUX_CHANNEL4, &edmamux_sync_init_struct);
142
143 /* enable transfer full data intterrupt */
144 edma_interrupt_enable(EDMA_STREAM4, EDMA_FDT_INT, TRUE);
145
146 /* edma stream4 interrupt nvic init */
147 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
148 nvic_irq_enable(EDMA_Stream4_IRQn, 1, 0);
149
150 /* dmamux function enable */
151 edmamux_enable(TRUE);
152 edmamux_init(EDMAMUX_CHANNEL4, EDMAMUX_DMAREQ_ID_TMR1_OVERFLOW);
153
154 /* enable edma stream4 */
155 edma_stream_enable(EDMA_STREAM4, TRUE);
156
157 /* tmr1 configuration */
158 tmr_base_init(TMR1, 5000, 0);
159 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
160
161 /* enable tmr1 overflow edam request */
162 tmr_dma_request_enable(TMR1, TMR_OVERFLOW_DMA_REQUEST, TRUE);
163
164 /* enable tmr1 */
165 tmr_counter_enable(TMR1, TRUE);
166
167 while(1)
168 {
169 }
170}
171
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
EXINT1_IRQHandler
void EXINT1_IRQHandler(void)
exint1 interrupt handler
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:53
EDMA_Stream4_IRQHandler
void EDMA_Stream4_IRQHandler(void)
edma stream4 irq handler
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c:216
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c:38
edma_init_struct
edma_init_type edma_init_struct
Definition: project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c:39
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c:42
dst_buffer
uint16_t dst_buffer[16]
Definition: project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c:46
src_buffer
uint16_t src_buffer[16]
Definition: project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c:43
edmamux_sync_init_struct
edmamux_sync_init_type edmamux_sync_init_struct
Definition: project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c:40
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_EDMA_PERIPH_CLOCK
@ CRM_EDMA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:114
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
edma_flag_get
flag_status edma_flag_get(uint32_t edma_flag)
get the edma flag.
Definition: at32f435_437_edma.c:512
edma_flag_clear
void edma_flag_clear(uint32_t edma_flag)
clear the edma flag.
Definition: at32f435_437_edma.c:549
edmamux_init
void edmamux_init(edmamux_channel_type *edmamux_channelx, edmamux_requst_id_sel_type edmamux_req_id)
edmamux init.
Definition: at32f435_437_edma.c:718
edma_init
void edma_init(edma_stream_type *edma_streamx, edma_init_type *edma_init_struct)
edma init.
Definition: at32f435_437_edma.c:115
edmamux_sync_default_para_init
void edmamux_sync_default_para_init(edmamux_sync_init_type *edmamux_sync_init_struct)
edmamux sync init struct config with its default value.
Definition: at32f435_437_edma.c:728
edma_stream_enable
void edma_stream_enable(edma_stream_type *edma_streamx, confirm_state new_state)
enable or disable the edma streamx.
Definition: at32f435_437_edma.c:198
edmamux_sync_config
void edmamux_sync_config(edmamux_channel_type *edmamux_channelx, edmamux_sync_init_type *edmamux_sync_init_struct)
edmamux synchronization config.
Definition: at32f435_437_edma.c:752
edmamux_enable
void edmamux_enable(confirm_state new_state)
enable or disable the edma edmamux.
Definition: at32f435_437_edma.c:673
edma_interrupt_enable
void edma_interrupt_enable(edma_stream_type *edma_streamx, uint32_t edma_int, confirm_state new_state)
enable or disable the edma streamx interrupts.
Definition: at32f435_437_edma.c:225
edma_default_para_init
void edma_default_para_init(edma_init_type *edma_init_struct)
edma init struct config with its default value.
Definition: at32f435_437_edma.c:165
EDMA_PRIORITY_HIGH
@ EDMA_PRIORITY_HIGH
Definition: at32f435_437_edma.h:191
EDMAMUX_SYNC_ID_EXINT1
@ EDMAMUX_SYNC_ID_EXINT1
Definition: at32f435_437_edma.h:358
EDMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ EDMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_edma.h:170
EDMA_MEMORY_DATA_WIDTH_HALFWORD
@ EDMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_edma.h:180
EDMA_MEMORY_SINGLE
@ EDMA_MEMORY_SINGLE
Definition: at32f435_437_edma.h:224
EDMA_PERIPHERAL_SINGLE
@ EDMA_PERIPHERAL_SINGLE
Definition: at32f435_437_edma.h:235
EDMA_FIFO_THRESHOLD_1QUARTER
@ EDMA_FIFO_THRESHOLD_1QUARTER
Definition: at32f435_437_edma.h:200
EDMA_DIR_PERIPHERAL_TO_MEMORY
@ EDMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_edma.h:159
EDMAMUX_SYNC_POLARITY_RISING
@ EDMAMUX_SYNC_POLARITY_RISING
Definition: at32f435_437_edma.h:389
EDMAMUX_DMAREQ_ID_TMR1_OVERFLOW
@ EDMAMUX_DMAREQ_ID_TMR1_OVERFLOW
Definition: at32f435_437_edma.h:308
EDMA_FDT4_FLAG
#define EDMA_FDT4_FLAG
Definition: at32f435_437_edma.h:86
EDMA_FDT_INT
#define EDMA_FDT_INT
Definition: at32f435_437_edma.h:55
EDMA_STREAM4
#define EDMA_STREAM4
Definition: at32f435_437_edma.h:965
EDMAMUX_CHANNEL4
#define EDMAMUX_CHANNEL4
Definition: at32f435_437_edma.h:992
exint_flag_get
flag_status exint_flag_get(uint32_t exint_line)
get exint flag
Definition: at32f435_437_exint.c:142
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_1
#define EXINT_LINE_1
Definition: at32f435_437_exint.h:53
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_INPUT
@ GPIO_MODE_INPUT
Definition: at32f435_437_gpio.h:82
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE1
@ SCFG_PINS_SOURCE1
Definition: at32f435_437_scfg.h:102
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
tmr_dma_request_enable
void tmr_dma_request_enable(tmr_type *tmr_x, tmr_dma_request_type dma_request, confirm_state new_state)
enable or disable tmr dma request
Definition: at32f435_437_tmr.c:1358
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_OVERFLOW_DMA_REQUEST
@ TMR_OVERFLOW_DMA_REQUEST
Definition: at32f435_437_tmr.h:271
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
EXINT1_IRQn
@ EXINT1_IRQn
Definition: at32f435_437.h:153
EDMA_Stream4_IRQn
@ EDMA_Stream4_IRQn
Definition: at32f435_437.h:160
edma_init_type
edma init type
Definition: at32f435_437_edma.h:440
edma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_edma.h:441
edma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_edma.h:444
edma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_edma.h:446
edma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_edma.h:445
edma_init_type::direction
edma_dir_type direction
Definition: at32f435_437_edma.h:443
edma_init_type::fifo_mode_enable
confirm_state fifo_mode_enable
Definition: at32f435_437_edma.h:451
edma_init_type::peripheral_data_width
edma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_edma.h:447
edma_init_type::fifo_threshold
edma_fifo_threshold_type fifo_threshold
Definition: at32f435_437_edma.h:452
edma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_edma.h:449
edma_init_type::priority
edma_priority_level_type priority
Definition: at32f435_437_edma.h:450
edma_init_type::memory0_base_addr
uint32_t memory0_base_addr
Definition: at32f435_437_edma.h:442
edma_init_type::peripheral_burst_mode
edma_peripheral_burst_type peripheral_burst_mode
Definition: at32f435_437_edma.h:454
edma_init_type::memory_data_width
edma_memory_data_size_type memory_data_width
Definition: at32f435_437_edma.h:448
edma_init_type::memory_burst_mode
edma_memory_burst_type memory_burst_mode
Definition: at32f435_437_edma.h:453
edmamux_sync_init_type
edmamux sync init type
Definition: at32f435_437_edma.h:461
edmamux_sync_init_type::sync_signal_sel
edmamux_sync_id_sel_type sync_signal_sel
Definition: at32f435_437_edma.h:462
edmamux_sync_init_type::sync_polarity
edmamux_sync_pol_type sync_polarity
Definition: at32f435_437_edma.h:463
edmamux_sync_init_type::sync_event_enable
confirm_state sync_event_enable
Definition: at32f435_437_edma.h:465
edmamux_sync_init_type::sync_enable
confirm_state sync_enable
Definition: at32f435_437_edma.h:466
edmamux_sync_init_type::sync_request_number
uint32_t sync_request_number
Definition: at32f435_437_edma.h:464
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • edma
  • flash_to_sram
  • inc
project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • edma
  • flash_to_sram
  • inc
project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • edma
  • flash_to_sram
  • inc
project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • edma
  • flash_to_sram
  • src
Functions
project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • edma
  • flash_to_sram
  • src
project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • edma
  • flash_to_sram
  • src
Functions
project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • edma
  • flash_to_sram
  • src
project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • edma
  • flash_to_sram
  • src
Macros | Functions | Variables
project/at_start_f437/examples/edma/flash_to_sram/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 32

Functions

error_status | buffer_compare (const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers. More...
void | EDMA_Stream1_IRQHandler (void)
this function handles edma stream1 handler. More...
int | main (void)
main function. More...

Variables

const uint32_t | src_const_buffer [32]
uint32_t | dst_buffer [32]
edma_init_type edma_init_struct
__IO uint32_t | data_counter_end = 0x01
error_status transfer_status = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/flash_to_sram/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • edma
  • flash_to_sram
  • src
project/at_start_f437/examples/edma/flash_to_sram/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 32
39
40const uint32_t src_const_buffer[BUFFER_SIZE]= {0x01020304, 0x05060708, 0x090A0B0C, 0x0D0E0F10,
41 0x11121314, 0x15161718, 0x191A1B1C, 0x1D1E1F20,
42 0x21222324, 0x25262728, 0x292A2B2C, 0x2D2E2F30,
43 0x31323334, 0x35363738, 0x393A3B3C, 0x3D3E3F40,
44 0x41424344, 0x45464748, 0x494A4B4C, 0x4D4E4F50,
45 0x51525354, 0x55565758, 0x595A5B5C, 0x5D5E5F60,
46 0x61626364, 0x65666768, 0x696A6B6C, 0x6D6E6F70,
47 0x71727374, 0x75767778, 0x797A7B7C, 0x7D7E7F80};
48uint32_t dst_buffer[BUFFER_SIZE];
49 edma_init_type edma_init_struct;
50__IO uint32_t data_counter_end = 0x01; /* this variable should not be initialized to 0 */
51 error_status transfer_status = ERROR;
52
53 error_status buffer_compare(const uint32_t* pbuffer, uint32_t* pbuffer1, uint16_t buffer_length);
54
60void EDMA_Stream1_IRQHandler(void)
61{
62 if(edma_flag_get(EDMA_FDT1_FLAG) != RESET)
63 {
64 data_counter_end = 0;
65 edma_flag_clear(EDMA_FDT1_FLAG);
66 }
67}
68
76 error_status buffer_compare(const uint32_t* pbuffer, uint32_t* pbuffer1, uint16_t buffer_length)
77{
78 while(buffer_length--)
79 {
80 if(*pbuffer != *pbuffer1)
81 {
82 return ERROR;
83 }
84
85 pbuffer++;
86 pbuffer1++;
87 }
88
89 return SUCCESS;
90}
91
97int main(void)
98{
99 system_clock_config();
100
101 at32_board_init();
102
103 /* enable dma1 clock */
104 crm_periph_clock_enable(CRM_EDMA_PERIPH_CLOCK, TRUE);
105
106 /* edma stream1 configuration */
107 edma_default_para_init(&edma_init_struct);
108 edma_init_struct.direction = EDMA_DIR_MEMORY_TO_MEMORY;
109 edma_init_struct.buffer_size = (uint32_t)BUFFER_SIZE;
110 edma_init_struct.peripheral_data_width = EDMA_PERIPHERAL_DATA_WIDTH_WORD;
111 edma_init_struct.peripheral_base_addr = (uint32_t)src_const_buffer;
112 edma_init_struct.peripheral_inc_enable = TRUE;
113 edma_init_struct.memory_data_width = EDMA_MEMORY_DATA_WIDTH_WORD;
114 edma_init_struct.memory0_base_addr = (uint32_t)dst_buffer;
115 edma_init_struct.memory_inc_enable = TRUE;
116 edma_init_struct.peripheral_burst_mode = EDMA_PERIPHERAL_SINGLE;
117 edma_init_struct.memory_burst_mode = EDMA_MEMORY_SINGLE;
118 edma_init_struct.fifo_mode_enable = FALSE;
119 edma_init_struct.fifo_threshold = EDMA_FIFO_THRESHOLD_1QUARTER;
120 edma_init_struct.priority = EDMA_PRIORITY_HIGH;
121 edma_init_struct.loop_mode_enable = FALSE;
122 edma_init(EDMA_STREAM1, &edma_init_struct);
123
124 /* enable transfer full data intterrupt */
125 edma_interrupt_enable(EDMA_STREAM1, EDMA_FDT_INT, TRUE);
126
127 /* edma stream1 interrupt nvic init */
128 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
129 nvic_irq_enable(EDMA_Stream1_IRQn, 1, 0);
130
131 edma_stream_enable(EDMA_STREAM1, TRUE);
132
133 /* wait the end of transmission */
134 while(data_counter_end != 0)
135 {
136 }
137
138 /* check if the transmitted and received data are equal */
139 transfer_status = buffer_compare(src_const_buffer, dst_buffer, BUFFER_SIZE);
140
141 /* transfer_status = success, if the transmitted and received data are the same
142 transfer_status = error, if the transmitted and received data are different */
143 if(transfer_status == SUCCESS)
144 {
145 /* turn led2/led3/led4 on */
146 at32_led_on(LED2);
147 at32_led_on(LED3);
148 at32_led_on(LED4);
149 }
150
151 while(1)
152 {
153 }
154}
155
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
EDMA_Stream1_IRQHandler
void EDMA_Stream1_IRQHandler(void)
this function handles edma_stream1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c:144
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
edma_init_struct
edma_init_type edma_init_struct
Definition: project/at_start_f437/examples/edma/flash_to_sram/src/main.c:49
src_const_buffer
const uint32_t src_const_buffer[32]
Definition: project/at_start_f437/examples/edma/flash_to_sram/src/main.c:40
data_counter_end
__IO uint32_t data_counter_end
Definition: project/at_start_f437/examples/edma/flash_to_sram/src/main.c:50
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/edma/flash_to_sram/src/main.c:38
dst_buffer
uint32_t dst_buffer[32]
Definition: project/at_start_f437/examples/edma/flash_to_sram/src/main.c:48
transfer_status
error_status transfer_status
Definition: project/at_start_f437/examples/edma/flash_to_sram/src/main.c:51
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_EDMA_PERIPH_CLOCK
@ CRM_EDMA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:114
edma_flag_get
flag_status edma_flag_get(uint32_t edma_flag)
get the edma flag.
Definition: at32f435_437_edma.c:512
edma_flag_clear
void edma_flag_clear(uint32_t edma_flag)
clear the edma flag.
Definition: at32f435_437_edma.c:549
edma_init
void edma_init(edma_stream_type *edma_streamx, edma_init_type *edma_init_struct)
edma init.
Definition: at32f435_437_edma.c:115
edma_stream_enable
void edma_stream_enable(edma_stream_type *edma_streamx, confirm_state new_state)
enable or disable the edma streamx.
Definition: at32f435_437_edma.c:198
edma_interrupt_enable
void edma_interrupt_enable(edma_stream_type *edma_streamx, uint32_t edma_int, confirm_state new_state)
enable or disable the edma streamx interrupts.
Definition: at32f435_437_edma.c:225
edma_default_para_init
void edma_default_para_init(edma_init_type *edma_init_struct)
edma init struct config with its default value.
Definition: at32f435_437_edma.c:165
EDMA_PRIORITY_HIGH
@ EDMA_PRIORITY_HIGH
Definition: at32f435_437_edma.h:191
EDMA_PERIPHERAL_DATA_WIDTH_WORD
@ EDMA_PERIPHERAL_DATA_WIDTH_WORD
Definition: at32f435_437_edma.h:171
EDMA_MEMORY_DATA_WIDTH_WORD
@ EDMA_MEMORY_DATA_WIDTH_WORD
Definition: at32f435_437_edma.h:181
EDMA_MEMORY_SINGLE
@ EDMA_MEMORY_SINGLE
Definition: at32f435_437_edma.h:224
EDMA_PERIPHERAL_SINGLE
@ EDMA_PERIPHERAL_SINGLE
Definition: at32f435_437_edma.h:235
EDMA_FIFO_THRESHOLD_1QUARTER
@ EDMA_FIFO_THRESHOLD_1QUARTER
Definition: at32f435_437_edma.h:200
EDMA_DIR_MEMORY_TO_MEMORY
@ EDMA_DIR_MEMORY_TO_MEMORY
Definition: at32f435_437_edma.h:161
EDMA_FDT1_FLAG
#define EDMA_FDT1_FLAG
Definition: at32f435_437_edma.h:71
EDMA_FDT_INT
#define EDMA_FDT_INT
Definition: at32f435_437_edma.h:55
EDMA_STREAM1
#define EDMA_STREAM1
Definition: at32f435_437_edma.h:962
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
EDMA_Stream1_IRQn
@ EDMA_Stream1_IRQn
Definition: at32f435_437.h:157
edma_init_type
edma init type
Definition: at32f435_437_edma.h:440
edma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_edma.h:441
edma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_edma.h:444
edma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_edma.h:446
edma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_edma.h:445
edma_init_type::direction
edma_dir_type direction
Definition: at32f435_437_edma.h:443
edma_init_type::fifo_mode_enable
confirm_state fifo_mode_enable
Definition: at32f435_437_edma.h:451
edma_init_type::peripheral_data_width
edma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_edma.h:447
edma_init_type::fifo_threshold
edma_fifo_threshold_type fifo_threshold
Definition: at32f435_437_edma.h:452
edma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_edma.h:449
edma_init_type::priority
edma_priority_level_type priority
Definition: at32f435_437_edma.h:450
edma_init_type::memory0_base_addr
uint32_t memory0_base_addr
Definition: at32f435_437_edma.h:442
edma_init_type::peripheral_burst_mode
edma_peripheral_burst_type peripheral_burst_mode
Definition: at32f435_437_edma.h:454
edma_init_type::memory_data_width
edma_memory_data_size_type memory_data_width
Definition: at32f435_437_edma.h:448
edma_init_type::memory_burst_mode
edma_memory_burst_type memory_burst_mode
Definition: at32f435_437_edma.h:453
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • edma
  • i2s_halfduplex_edma_doublebuffer
  • inc
project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • edma
  • i2s_halfduplex_edma_doublebuffer
  • inc
project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • edma
  • i2s_halfduplex_edma_doublebuffer
  • inc
project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • edma
  • i2s_halfduplex_edma_doublebuffer
  • src
Functions
project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • edma
  • i2s_halfduplex_edma_doublebuffer
  • src
project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • edma
  • i2s_halfduplex_edma_doublebuffer
  • src
Functions
project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • edma
  • i2s_halfduplex_edma_doublebuffer
  • src
project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • edma
  • i2s_halfduplex_edma_doublebuffer
  • src
Functions | Variables
project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | i2s_config (void)
i2s configuration. More...
error_status | buffer_compare (uint16_t *pbuffer1, uint16_t *pbuffer2, uint16_t buffer_length)
buffer_compare function. More...
void | EDMA_Stream1_IRQHandler (void)
this function handles edma stream1 handler. More...
int | main (void)
main function. More...

Variables

uint16_t | i2s3_buffer1_tx [32]
uint16_t | i2s3_buffer2_tx [32]
uint16_t | i2s2_buffer1_rx [32]
uint16_t | i2s2_buffer2_rx [32]
volatile int | transfer_count = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c.

Function Documentation

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 10

< gpio pins number 12

< gpio pins number 7

< gpio pins number 0

< gpio pins number 1

< gpio pins number 4

Definition at line 211 of file project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c.

◆ i2s_config()

static void i2s_config ( void )
static

i2s configuration.

Parameters
none
Return values
none

Definition at line 130 of file project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • edma
  • i2s_halfduplex_edma_doublebuffer
  • src
project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38uint16_t i2s3_buffer1_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C,
39 0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718,
40 0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324,
41 0x2526, 0x2728, 0x292A, 0x2B2C, 0x2D2E, 0x2F30,
42 0x3132, 0x3334, 0x3536, 0x3738, 0x393A, 0x3B3C,
43 0x3D3E, 0x3F40};
44uint16_t i2s3_buffer2_tx[32] = {0x4142, 0x4344, 0x4546, 0x4748, 0x494A, 0x4B4C,
45 0x4D4E, 0x4F50, 0x5152, 0x5354, 0x5556, 0x5758,
46 0x595A, 0x5B5C, 0x5D5E, 0x5F60, 0x6162, 0x6364,
47 0x6566, 0x6768, 0x696A, 0x6B6C, 0x6D6E, 0x6F70,
48 0x7172, 0x7374, 0x7576, 0x7778, 0x797A, 0x7B7C,
49 0x7D7E, 0x7F80};
50uint16_t i2s2_buffer1_rx[32];
51uint16_t i2s2_buffer2_rx[32];
52volatile int transfer_count = 0;
53
54static void gpio_config(void);
55static void i2s_config(void);
56 error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
57
63 error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length)
64{
65 while(buffer_length--)
66 {
67 if(*pbuffer1 != *pbuffer2)
68 {
69 return ERROR;
70 }
71
72 pbuffer1++;
73 pbuffer2++;
74 }
75 return SUCCESS;
76}
77
83void EDMA_Stream1_IRQHandler(void)
84{
85 if(edma_flag_get(EDMA_FDT1_FLAG) != RESET)
86 {
87 if(transfer_count == 0)
88 {
89 if(buffer_compare(i2s3_buffer1_tx, i2s2_buffer1_rx, 32) == SUCCESS)
90 {
91 transfer_count = 1;
92 }
93 else
94 {
95 /* some error */
96 at32_led_off(LED2);
97 at32_led_off(LED3);
98 at32_led_off(LED4);
99 }
100 }
101 if(transfer_count == 1)
102 {
103 if(buffer_compare(i2s3_buffer2_tx, i2s2_buffer2_rx, 32) == SUCCESS)
104 {
105 /* edma double buffer mode transfer data pass */
106 at32_led_on(LED2);
107 at32_led_on(LED3);
108 at32_led_on(LED4);
109 /* end of transfer,close edma stream */
110 edma_stream_enable(EDMA_STREAM1, FALSE);
111 edma_stream_enable(EDMA_STREAM2, FALSE);
112 }
113 else
114 {
115 /* some error */
116 at32_led_off(LED2);
117 at32_led_off(LED3);
118 at32_led_off(LED4);
119 }
120 }
121 edma_flag_clear(EDMA_FDT1_FLAG);
122 }
123}
124
130static void i2s_config(void)
131{
132 edma_init_type edma_init_struct;
133 i2s_init_type i2s_init_struct;
134
135 /* enable dma1 clock */
136 crm_periph_clock_enable(CRM_EDMA_PERIPH_CLOCK, TRUE);
137
138 /* i2s2_rx:edma stream1 configuration */
139 edma_default_para_init(&edma_init_struct);
140 edma_init_struct.direction = EDMA_DIR_PERIPHERAL_TO_MEMORY;
141 edma_init_struct.buffer_size = (uint32_t)32;
142 edma_init_struct.peripheral_data_width = EDMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
143 edma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
144 edma_init_struct.peripheral_inc_enable = FALSE;
145 edma_init_struct.memory_data_width = EDMA_MEMORY_DATA_WIDTH_HALFWORD;
146 edma_init_struct.memory0_base_addr = (uint32_t)i2s2_buffer1_rx;
147 edma_init_struct.memory_inc_enable = TRUE;
148 edma_init_struct.peripheral_burst_mode = EDMA_PERIPHERAL_SINGLE;
149 edma_init_struct.memory_burst_mode = EDMA_MEMORY_SINGLE;
150 edma_init_struct.fifo_mode_enable = FALSE;
151 edma_init_struct.fifo_threshold = EDMA_FIFO_THRESHOLD_1QUARTER;
152 edma_init_struct.priority = EDMA_PRIORITY_HIGH;
153 edma_init_struct.loop_mode_enable = TRUE;
154 edma_init(EDMA_STREAM1, &edma_init_struct);
155
156 /* edma stream1 double buffer mode init */
157 edma_double_buffer_mode_init(EDMA_STREAM1, (uint32_t)i2s2_buffer2_rx, EDMA_MEMORY_0);
158 edma_double_buffer_mode_enable(EDMA_STREAM1, TRUE);
159
160 /* i2s3_tx:edma stream2 configuration */
161 edma_init_struct.direction = EDMA_DIR_MEMORY_TO_PERIPHERAL;
162 edma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt);
163 edma_init_struct.memory0_base_addr = (uint32_t)i2s3_buffer1_tx;
164 edma_init(EDMA_STREAM2, &edma_init_struct);
165
166 /* edma stream2 double buffer mode init */
167 edma_double_buffer_mode_init(EDMA_STREAM2, (uint32_t)i2s3_buffer2_tx, EDMA_MEMORY_0);
168 edma_double_buffer_mode_enable(EDMA_STREAM2, TRUE);
169
170 /* enable transfer full data intterrupt */
171 edma_interrupt_enable(EDMA_STREAM1, EDMA_FDT_INT, TRUE);
172
173 /* edma stream1 interrupt nvic init */
174 nvic_irq_enable(EDMA_Stream1_IRQn, 1, 0);
175
176 /* edmamux init */
177 edmamux_enable(TRUE);
178 edmamux_init(EDMAMUX_CHANNEL1, EDMAMUX_DMAREQ_ID_SPI2_RX);
179 edmamux_init(EDMAMUX_CHANNEL2, EDMAMUX_DMAREQ_ID_SPI3_TX);
180
181 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
182 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
183 i2s_default_para_init(&i2s_init_struct);
184 i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
185 i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT;
186 i2s_init_struct.mclk_output_enable = TRUE;
187 i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K;
188 i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
189 i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX;
190 i2s_init(SPI3, &i2s_init_struct);
191
192 i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX;
193 i2s_init(SPI2, &i2s_init_struct);
194
195 edma_stream_enable(EDMA_STREAM1, TRUE);
196 edma_stream_enable(EDMA_STREAM2, TRUE);
197 spi_i2s_dma_receiver_enable(SPI2, TRUE);
198
199 spi_i2s_dma_transmitter_enable(SPI3, TRUE);
200
201 i2s_enable(SPI2, TRUE);
202
203 i2s_enable(SPI3, TRUE);
204}
205
211static void gpio_config(void)
212{
213 gpio_init_type gpio_initstructure;
214 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
215 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
216 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
217
218 /* master ws pin */
219 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
220 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
221 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
222 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
223 gpio_initstructure.gpio_pins = GPIO_PINS_4;
224 gpio_init(GPIOA, &gpio_initstructure);
225 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE4, GPIO_MUX_6);
226
227 /* master ck pin */
228 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
229 gpio_initstructure.gpio_pins = GPIO_PINS_10;
230 gpio_init(GPIOC, &gpio_initstructure);
231 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE10, GPIO_MUX_6);
232
233 /* master sd pin */
234 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
235 gpio_initstructure.gpio_pins = GPIO_PINS_12;
236 gpio_init(GPIOC, &gpio_initstructure);
237 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_6);
238
239 /* master mck pin */
240 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
241 gpio_initstructure.gpio_pins = GPIO_PINS_7;
242 gpio_init(GPIOC, &gpio_initstructure);
243 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE7, GPIO_MUX_6);
244
245 /* slave ws pin */
246 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
247 gpio_initstructure.gpio_pins = GPIO_PINS_0;
248 gpio_init(GPIOD, &gpio_initstructure);
249 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE0, GPIO_MUX_7);
250
251 /* slave ck pin */
252 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
253 gpio_initstructure.gpio_pins = GPIO_PINS_1;
254 gpio_init(GPIOD, &gpio_initstructure);
255 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6);
256
257 /* slave sd pin */
258 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
259 gpio_initstructure.gpio_pins = GPIO_PINS_4;
260 gpio_init(GPIOD, &gpio_initstructure);
261 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_6);
262}
263
269int main(void)
270{
271 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
272 system_clock_config();
273 at32_board_init();
274
275 gpio_config();
276 i2s_config();
277
278
279 while(1)
280 {
281 }
282}
283
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
EDMA_Stream1_IRQHandler
void EDMA_Stream1_IRQHandler(void)
this function handles edma_stream1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c:144
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
edma_init_struct
edma_init_type edma_init_struct
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c:40
i2s3_buffer1_tx
uint16_t i2s3_buffer1_tx[32]
Definition: project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c:38
i2s3_buffer2_tx
uint16_t i2s3_buffer2_tx[32]
Definition: project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c:44
i2s2_buffer2_rx
uint16_t i2s2_buffer2_rx[32]
Definition: project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c:51
transfer_count
volatile int transfer_count
Definition: project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c:52
i2s2_buffer1_rx
uint16_t i2s2_buffer1_rx[32]
Definition: project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c:50
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SPI3_PERIPH_CLOCK
@ CRM_SPI3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:139
CRM_EDMA_PERIPH_CLOCK
@ CRM_EDMA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:114
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_SPI2_PERIPH_CLOCK
@ CRM_SPI2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:138
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
edma_flag_get
flag_status edma_flag_get(uint32_t edma_flag)
get the edma flag.
Definition: at32f435_437_edma.c:512
edma_flag_clear
void edma_flag_clear(uint32_t edma_flag)
clear the edma flag.
Definition: at32f435_437_edma.c:549
edma_double_buffer_mode_init
void edma_double_buffer_mode_init(edma_stream_type *edma_streamx, uint32_t memory1_addr, edma_memory_type current_memory)
config the the double buffer mode.
Definition: at32f435_437_edma.c:354
edmamux_init
void edmamux_init(edmamux_channel_type *edmamux_channelx, edmamux_requst_id_sel_type edmamux_req_id)
edmamux init.
Definition: at32f435_437_edma.c:718
edma_init
void edma_init(edma_stream_type *edma_streamx, edma_init_type *edma_init_struct)
edma init.
Definition: at32f435_437_edma.c:115
edma_double_buffer_mode_enable
void edma_double_buffer_mode_enable(edma_stream_type *edma_streamx, confirm_state new_state)
enable or disable the double memory mode.
Definition: at32f435_437_edma.c:383
edma_stream_enable
void edma_stream_enable(edma_stream_type *edma_streamx, confirm_state new_state)
enable or disable the edma streamx.
Definition: at32f435_437_edma.c:198
edmamux_enable
void edmamux_enable(confirm_state new_state)
enable or disable the edma edmamux.
Definition: at32f435_437_edma.c:673
edma_interrupt_enable
void edma_interrupt_enable(edma_stream_type *edma_streamx, uint32_t edma_int, confirm_state new_state)
enable or disable the edma streamx interrupts.
Definition: at32f435_437_edma.c:225
edma_default_para_init
void edma_default_para_init(edma_init_type *edma_init_struct)
edma init struct config with its default value.
Definition: at32f435_437_edma.c:165
EDMA_PRIORITY_HIGH
@ EDMA_PRIORITY_HIGH
Definition: at32f435_437_edma.h:191
EDMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ EDMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_edma.h:170
EDMA_MEMORY_DATA_WIDTH_HALFWORD
@ EDMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_edma.h:180
EDMA_MEMORY_SINGLE
@ EDMA_MEMORY_SINGLE
Definition: at32f435_437_edma.h:224
EDMA_PERIPHERAL_SINGLE
@ EDMA_PERIPHERAL_SINGLE
Definition: at32f435_437_edma.h:235
EDMA_FIFO_THRESHOLD_1QUARTER
@ EDMA_FIFO_THRESHOLD_1QUARTER
Definition: at32f435_437_edma.h:200
EDMA_MEMORY_0
@ EDMA_MEMORY_0
Definition: at32f435_437_edma.h:150
EDMA_DIR_MEMORY_TO_PERIPHERAL
@ EDMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_edma.h:160
EDMA_DIR_PERIPHERAL_TO_MEMORY
@ EDMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_edma.h:159
EDMAMUX_DMAREQ_ID_SPI2_RX
@ EDMAMUX_DMAREQ_ID_SPI2_RX
Definition: at32f435_437_edma.h:268
EDMAMUX_DMAREQ_ID_SPI3_TX
@ EDMAMUX_DMAREQ_ID_SPI3_TX
Definition: at32f435_437_edma.h:271
EDMA_FDT1_FLAG
#define EDMA_FDT1_FLAG
Definition: at32f435_437_edma.h:71
EDMA_FDT_INT
#define EDMA_FDT_INT
Definition: at32f435_437_edma.h:55
EDMAMUX_CHANNEL2
#define EDMAMUX_CHANNEL2
Definition: at32f435_437_edma.h:990
EDMA_STREAM1
#define EDMA_STREAM1
Definition: at32f435_437_edma.h:962
EDMA_STREAM2
#define EDMA_STREAM2
Definition: at32f435_437_edma.h:963
EDMAMUX_CHANNEL1
#define EDMAMUX_CHANNEL1
Definition: at32f435_437_edma.h:989
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_6
@ GPIO_MUX_6
Definition: at32f435_437_gpio.h:162
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
i2s_init
void i2s_init(spi_type *spi_x, i2s_init_type *i2s_init_struct)
i2s init config with its setting value.
Definition: at32f435_437_spi.c:350
spi_i2s_dma_receiver_enable
void spi_i2s_dma_receiver_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the spi/i2s dma receiver mode.
Definition: at32f435_437_spi.c:533
i2s_enable
void i2s_enable(spi_type *spi_x, confirm_state new_state)
enable or disable i2s.
Definition: at32f435_437_spi.c:479
i2s_default_para_init
void i2s_default_para_init(i2s_init_type *i2s_init_struct)
i2s init config with its default value.
Definition: at32f435_437_spi.c:332
spi_i2s_dma_transmitter_enable
void spi_i2s_dma_transmitter_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the spi/i2s dma transmitter mode.
Definition: at32f435_437_spi.c:519
I2S_CLOCK_POLARITY_LOW
@ I2S_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:251
I2S_DATA_16BIT_CHANNEL_32BIT
@ I2S_DATA_16BIT_CHANNEL_32BIT
Definition: at32f435_437_spi.h:230
I2S_AUDIO_FREQUENCY_48K
@ I2S_AUDIO_FREQUENCY_48K
Definition: at32f435_437_spi.h:219
I2S_AUDIO_PROTOCOL_PHILLIPS
@ I2S_AUDIO_PROTOCOL_PHILLIPS
Definition: at32f435_437_spi.h:200
I2S_MODE_MASTER_TX
@ I2S_MODE_MASTER_TX
Definition: at32f435_437_spi.h:242
I2S_MODE_SLAVE_RX
@ I2S_MODE_SLAVE_RX
Definition: at32f435_437_spi.h:241
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
EDMA_Stream1_IRQn
@ EDMA_Stream1_IRQn
Definition: at32f435_437.h:157
i2s_config
static void i2s_config(void)
i2s configuration.
Definition: project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c:130
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c:211
edma_init_type
edma init type
Definition: at32f435_437_edma.h:440
edma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_edma.h:441
edma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_edma.h:444
edma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_edma.h:446
edma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_edma.h:445
edma_init_type::direction
edma_dir_type direction
Definition: at32f435_437_edma.h:443
edma_init_type::fifo_mode_enable
confirm_state fifo_mode_enable
Definition: at32f435_437_edma.h:451
edma_init_type::peripheral_data_width
edma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_edma.h:447
edma_init_type::fifo_threshold
edma_fifo_threshold_type fifo_threshold
Definition: at32f435_437_edma.h:452
edma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_edma.h:449
edma_init_type::priority
edma_priority_level_type priority
Definition: at32f435_437_edma.h:450
edma_init_type::memory0_base_addr
uint32_t memory0_base_addr
Definition: at32f435_437_edma.h:442
edma_init_type::peripheral_burst_mode
edma_peripheral_burst_type peripheral_burst_mode
Definition: at32f435_437_edma.h:454
edma_init_type::memory_data_width
edma_memory_data_size_type memory_data_width
Definition: at32f435_437_edma.h:448
edma_init_type::memory_burst_mode
edma_memory_burst_type memory_burst_mode
Definition: at32f435_437_edma.h:453
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
i2s_init_type
i2s init type
Definition: at32f435_437_spi.h:274
i2s_init_type::audio_sampling_freq
i2s_audio_sampling_freq_type audio_sampling_freq
Definition: at32f435_437_spi.h:277
i2s_init_type::data_channel_format
i2s_data_channel_format_type data_channel_format
Definition: at32f435_437_spi.h:278
i2s_init_type::mclk_output_enable
confirm_state mclk_output_enable
Definition: at32f435_437_spi.h:280
i2s_init_type::audio_protocol
i2s_audio_protocol_type audio_protocol
Definition: at32f435_437_spi.h:276
i2s_init_type::operation_mode
i2s_operation_mode_type operation_mode
Definition: at32f435_437_spi.h:275
i2s_init_type::clock_polarity
i2s_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:279
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • edma
  • link_list_mode
  • inc
project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • edma
  • link_list_mode
  • inc
project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • edma
  • link_list_mode
  • inc
project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • edma
  • link_list_mode
  • src
Functions
project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • edma
  • link_list_mode
  • src
project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • edma
  • link_list_mode
  • src
Functions
project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • edma
  • link_list_mode
  • src
project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • edma
  • link_list_mode
  • src
Data Structures | Macros | Functions | Variables
project/at_start_f437/examples/edma/link_list_mode/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Data Structures

struct ll_descriptors_type

Macros

#define | LIST_COUNT 3
#define | BUFFER_SIZE 35

Functions

__ALIGNED (16)
edma link list descriptor init function. More...
int | main (void)
main function. More...
void | uart_init (uint32_t bound)
initialize print usart More...
void | EDMA_Stream1_IRQHandler (void)
this function handles edma stream1 handler. More...

Variables

const int8_t tx_buffer [3][35]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/link_list_mode/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • edma
  • link_list_mode
  • src
project/at_start_f437/examples/edma/link_list_mode/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define LIST_COUNT 3
39#define BUFFER_SIZE 35
40
41/* link list descriptors struct type */
42typedef struct
43{
44 uint32_t ctrl_dtcnt;
45 uint32_t paddr;
46 uint32_t m0addr;
47 uint32_t llp;
48} ll_descriptors_type;
49
50/* tx data buffer */
51const int8_t tx_buffer[LIST_COUNT][BUFFER_SIZE] ={
52 {'T','h','i','s',' ','i','s',' ','E','D','M','A',' '},
53 {'L','i','n','k',' ','L','i','s','t',' ','M','o','d','e',' ','t','e','s','t','!'},
54 {'\r','\n','T','h','i','s',' ','t','e','s','t',' ','c','a','s','e',' ','u','s','e',' ','U','s','a','r','t','1','_','T','X','!','\r','\n'}
55};
56
57/* link list descriptor array, start address must be aligned by 16 bytes */
58 __ALIGNED(16) ll_descriptors_type edma_ll_descriptors_tx[LIST_COUNT];
59
60/* declared private functions */
61void uart_init(uint32_t bound);
62void edma_ll_descriptors_init(void);
63
69void edma_ll_descriptors_init(void)
70{
71 uint32_t index = 0;
72
73 for(index = 0; index < LIST_COUNT; index ++)
74 {
75 edma_ll_descriptors_tx[index].ctrl_dtcnt = 0x20090000 | sizeof(tx_buffer[index]);
76 edma_ll_descriptors_tx[index].paddr = (uint32_t)(&USART1->dt);
77 edma_ll_descriptors_tx[index].m0addr = (uint32_t)(&tx_buffer[index][0]);
78 if(index == (LIST_COUNT - 1))
79 {
80 edma_ll_descriptors_tx[index].llp = 0;
81 }
82 else
83 {
84 edma_ll_descriptors_tx[index].llp = (uint32_t)(&edma_ll_descriptors_tx[index + 1]);
85 }
86 }
87}
88
94int main(void)
95{
96 system_clock_config();
97
98 at32_board_init();
99
100 /* usart1 configuration */
101 uart_init(115200);
102
103 /* enable dma1 clock */
104 crm_periph_clock_enable(CRM_EDMA_PERIPH_CLOCK, TRUE);
105
106 /* edma link list descriptor init */
107 edma_ll_descriptors_init();
108
109 /* edma stream1 link list mode configuration */
110 edma_link_list_enable(EDMA_STREAM1_LL, TRUE);
111 edma_link_list_init(EDMA_STREAM1_LL, (uint32_t)edma_ll_descriptors_tx);
112
113 /* edmamux configuration */
114 edmamux_enable(TRUE);
115 edmamux_init(EDMAMUX_CHANNEL1, EDMAMUX_DMAREQ_ID_USART1_TX);
116
117 /* enable transfer full data intterrupt */
118 edma_interrupt_enable(EDMA_STREAM1, EDMA_FDT_INT, TRUE);
119
120 /* edma stream1 interrupt nvic init */
121 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
122 nvic_irq_enable(EDMA_Stream1_IRQn, 1, 0);
123
124 /* enable edma stream1 */
125 edma_stream_enable(EDMA_STREAM1, TRUE);
126
127 while(1)
128 {
129 }
130}
131
137void uart_init(uint32_t bound)
138{
139 gpio_init_type gpio_init_struct;
140
141 /* enable the uart clock */
142 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
143 crm_periph_clock_enable(CRM_USART1_PERIPH_CLOCK, TRUE);
144
145 /* set default parameter */
146 gpio_default_para_init(&gpio_init_struct);
147
148 /* configure uart tx gpio */
149 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
150 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
151 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
152 gpio_init_struct.gpio_pins = GPIO_PINS_9;
153 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
154 gpio_init(GPIOA, &gpio_init_struct);
155 /* configure uart rx gpio */
156 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
157 gpio_init_struct.gpio_pins = GPIO_PINS_10;
158 gpio_init(GPIOA, &gpio_init_struct);
159
160 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE9, GPIO_MUX_7);
161 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE10, GPIO_MUX_7);
162
163 /* configure usart */
164 usart_init(USART1, bound, USART_DATA_8BITS, USART_STOP_1_BIT);
165 usart_parity_selection_config(USART1, USART_PARITY_NONE);
166 usart_transmitter_enable(USART1, TRUE);
167 usart_receiver_enable(USART1, TRUE);
168 usart_dma_transmitter_enable(USART1, TRUE);
169 usart_enable(USART1, TRUE);
170}
171
177void EDMA_Stream1_IRQHandler(void)
178{
179 if(edma_flag_get(EDMA_FDT1_FLAG) != RESET)
180 {
181 /* led2/3/4 on */
182 at32_led_on(LED2);
183 at32_led_on(LED3);
184 at32_led_on(LED4);
185 edma_flag_clear(EDMA_FDT1_FLAG);
186 }
187}
188
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
EDMA_Stream1_IRQHandler
void EDMA_Stream1_IRQHandler(void)
this function handles edma_stream1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c:144
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
LIST_COUNT
#define LIST_COUNT
Definition: project/at_start_f437/examples/edma/link_list_mode/src/main.c:38
__ALIGNED
__ALIGNED(16)
edma link list descriptor init function.
Definition: project/at_start_f435/examples/edma/link_list_mode/src/main.c:58
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/edma/link_list_mode/src/main.c:39
tx_buffer
const int8_t tx_buffer[3][35]
Definition: project/at_start_f437/examples/edma/link_list_mode/src/main.c:51
uart_init
void uart_init(uint32_t bound)
initialize print usart
Definition: project/at_start_f435/examples/edma/link_list_mode/src/main.c:137
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_EDMA_PERIPH_CLOCK
@ CRM_EDMA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:114
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART1_PERIPH_CLOCK
@ CRM_USART1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:156
edma_flag_get
flag_status edma_flag_get(uint32_t edma_flag)
get the edma flag.
Definition: at32f435_437_edma.c:512
edma_flag_clear
void edma_flag_clear(uint32_t edma_flag)
clear the edma flag.
Definition: at32f435_437_edma.c:549
edmamux_init
void edmamux_init(edmamux_channel_type *edmamux_channelx, edmamux_requst_id_sel_type edmamux_req_id)
edmamux init.
Definition: at32f435_437_edma.c:718
edma_link_list_init
void edma_link_list_init(edma_stream_link_list_type *edma_streamx_ll, uint32_t pointer)
initialize the edma link list.
Definition: at32f435_437_edma.c:632
edma_stream_enable
void edma_stream_enable(edma_stream_type *edma_streamx, confirm_state new_state)
enable or disable the edma streamx.
Definition: at32f435_437_edma.c:198
edmamux_enable
void edmamux_enable(confirm_state new_state)
enable or disable the edma edmamux.
Definition: at32f435_437_edma.c:673
edma_link_list_enable
void edma_link_list_enable(edma_stream_link_list_type *edma_streamx_ll, confirm_state new_state)
enable or disable the edma stream link list mode.
Definition: at32f435_437_edma.c:652
edma_interrupt_enable
void edma_interrupt_enable(edma_stream_type *edma_streamx, uint32_t edma_int, confirm_state new_state)
enable or disable the edma streamx interrupts.
Definition: at32f435_437_edma.c:225
EDMAMUX_DMAREQ_ID_USART1_TX
@ EDMAMUX_DMAREQ_ID_USART1_TX
Definition: at32f435_437_edma.h:285
EDMA_FDT1_FLAG
#define EDMA_FDT1_FLAG
Definition: at32f435_437_edma.h:71
EDMA_FDT_INT
#define EDMA_FDT_INT
Definition: at32f435_437_edma.h:55
EDMA_STREAM1_LL
#define EDMA_STREAM1_LL
Definition: at32f435_437_edma.h:980
EDMA_STREAM1
#define EDMA_STREAM1
Definition: at32f435_437_edma.h:962
EDMAMUX_CHANNEL1
#define EDMAMUX_CHANNEL1
Definition: at32f435_437_edma.h:989
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
usart_parity_selection_config
void usart_parity_selection_config(usart_type *usart_x, usart_parity_selection_type parity)
usart parity selection config.
Definition: at32f435_437_usart.c:168
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_dma_transmitter_enable
void usart_dma_transmitter_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the usart's dma transmitter interface.
Definition: at32f435_437_usart.c:304
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_PARITY_NONE
@ USART_PARITY_NONE
Definition: at32f435_437_usart.h:94
USART1
#define USART1
Definition: at32f435_437_usart.h:348
EDMA_Stream1_IRQn
@ EDMA_Stream1_IRQn
Definition: at32f435_437.h:157
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
ll_descriptors_type
Definition: project/at_start_f435/examples/edma/link_list_mode/src/main.c:43
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • edma
  • two_dimension_mode
  • inc
project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • edma
  • two_dimension_mode
  • inc
project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • edma
  • two_dimension_mode
  • inc
project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • edma
  • two_dimension_mode
  • src
Functions
project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • edma
  • two_dimension_mode
  • src
project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • edma
  • two_dimension_mode
  • src
Functions
project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • edma
  • two_dimension_mode
  • src
project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • edma
  • two_dimension_mode
  • src
Macros | Functions | Variables
project/at_start_f437/examples/edma/two_dimension_mode/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 32

Functions

void | EDMA_Stream1_IRQHandler (void)
this function handles edma stream1 handler. More...
int | main (void)
main function. More...

Variables

const uint32_t | src_const_buffer [32]
uint32_t | dst_buffer [32]
edma_init_type edma_init_struct
__IO uint32_t | data_counter_end = 0x01
error_status transfer_status = ERROR
uint16_t | counter = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/edma/two_dimension_mode/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • edma
  • two_dimension_mode
  • src
project/at_start_f437/examples/edma/two_dimension_mode/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 32
39
40const uint32_t src_const_buffer[BUFFER_SIZE]= {0x01020304, 0x05060708, 0x090A0B0C, 0x0D0E0F10,
41 0x11121314, 0x15161718, 0x191A1B1C, 0x1D1E1F20,
42 0x21222324, 0x25262728, 0x292A2B2C, 0x2D2E2F30,
43 0x31323334, 0x35363738, 0x393A3B3C, 0x3D3E3F40,
44 0x41424344, 0x45464748, 0x494A4B4C, 0x4D4E4F50,
45 0x51525354, 0x55565758, 0x595A5B5C, 0x5D5E5F60,
46 0x61626364, 0x65666768, 0x696A6B6C, 0x6D6E6F70,
47 0x71727374, 0x75767778, 0x797A7B7C, 0x7D7E7F80};
48uint32_t dst_buffer[BUFFER_SIZE];
49 edma_init_type edma_init_struct;
50__IO uint32_t data_counter_end = 0x01; /* this variable should not be initialized to 0 */
51 error_status transfer_status = ERROR;
52uint16_t counter = 0;
53
54
60void EDMA_Stream1_IRQHandler(void)
61{
62 if(edma_flag_get(EDMA_FDT1_FLAG) != RESET)
63 {
64 data_counter_end = 0;
65 edma_flag_clear(EDMA_FDT1_FLAG);
66 }
67}
68
74int main(void)
75{
76 int index;
77 system_clock_config();
78
79 at32_board_init();
80
81 uart_print_init(115200);
82
83 /* enable dma1 clock */
84 crm_periph_clock_enable(CRM_EDMA_PERIPH_CLOCK, TRUE);
85
86 /* edma stream1 configuration */
87 edma_default_para_init(&edma_init_struct);
88 edma_init_struct.direction = EDMA_DIR_MEMORY_TO_MEMORY;
89 edma_init_struct.buffer_size = (uint32_t)BUFFER_SIZE;
90 edma_init_struct.peripheral_data_width = EDMA_PERIPHERAL_DATA_WIDTH_WORD;
91 edma_init_struct.peripheral_base_addr = (uint32_t)src_const_buffer;
92 edma_init_struct.peripheral_inc_enable = TRUE;
93 edma_init_struct.memory_data_width = EDMA_MEMORY_DATA_WIDTH_WORD;
94 edma_init_struct.memory0_base_addr = (uint32_t)dst_buffer;
95 edma_init_struct.memory_inc_enable = TRUE;
96 edma_init_struct.peripheral_burst_mode = EDMA_PERIPHERAL_SINGLE;
97 edma_init_struct.memory_burst_mode = EDMA_MEMORY_SINGLE;
98 edma_init_struct.fifo_mode_enable = TRUE;
99 edma_init_struct.fifo_threshold = EDMA_FIFO_THRESHOLD_FULL;
100 edma_init_struct.priority = EDMA_PRIORITY_HIGH;
101 edma_init_struct.loop_mode_enable = FALSE;
102 edma_init(EDMA_STREAM1, &edma_init_struct);
103
104 /* enable transfer full data intterrupt */
105 edma_interrupt_enable(EDMA_STREAM1, EDMA_FDT_INT, TRUE);
106
107 /* edma stream1 interrupt nvic init */
108 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
109 nvic_irq_enable(EDMA_Stream1_IRQn, 1, 0);
110
111 /* two dimension mode init */
112 /* source stride = 0x10, destination stride = 0x8, xcnt = 0x2, ycnt = 0x8 */
113 edma_2d_init(EDMA_STREAM1_2D, 0x10, 0x8, 0x2, 0x8);
114 edma_2d_enable(EDMA_STREAM1_2D, TRUE);
115
116 edma_stream_enable(EDMA_STREAM1, TRUE);
117
118 /* wait the end of transmission */
119 while(data_counter_end != 0)
120 {
121 }
122
123 printf("source buffer:\r\n");
124 for(counter = 0; counter < BUFFER_SIZE; counter ++)
125 {
126 printf("%x ",src_const_buffer[counter]);
127 index ++;
128 if(index == 4)
129 {
130 printf("\r\n");
131 index = 0;
132 }
133 }
134
135 printf("destination buffer:\r\n");
136 for(counter = 0; counter < BUFFER_SIZE/2; counter ++)
137 {
138 printf("%x ",dst_buffer[counter]);
139 index ++;
140 if(index == 2)
141 {
142 printf("\r\n");
143 index = 0;
144 }
145 }
146
147 while(1)
148 {
149 }
150}
151
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
EDMA_Stream1_IRQHandler
void EDMA_Stream1_IRQHandler(void)
this function handles edma_stream1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c:144
edma_init_struct
edma_init_type edma_init_struct
Definition: project/at_start_f437/examples/edma/two_dimension_mode/src/main.c:49
src_const_buffer
const uint32_t src_const_buffer[32]
Definition: project/at_start_f437/examples/edma/two_dimension_mode/src/main.c:40
data_counter_end
__IO uint32_t data_counter_end
Definition: project/at_start_f437/examples/edma/two_dimension_mode/src/main.c:50
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/edma/two_dimension_mode/src/main.c:38
dst_buffer
uint32_t dst_buffer[32]
Definition: project/at_start_f437/examples/edma/two_dimension_mode/src/main.c:48
transfer_status
error_status transfer_status
Definition: project/at_start_f437/examples/edma/two_dimension_mode/src/main.c:51
counter
uint16_t counter
Definition: project/at_start_f437/examples/edma/two_dimension_mode/src/main.c:52
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_EDMA_PERIPH_CLOCK
@ CRM_EDMA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:114
edma_flag_get
flag_status edma_flag_get(uint32_t edma_flag)
get the edma flag.
Definition: at32f435_437_edma.c:512
edma_flag_clear
void edma_flag_clear(uint32_t edma_flag)
clear the edma flag.
Definition: at32f435_437_edma.c:549
edma_init
void edma_init(edma_stream_type *edma_streamx, edma_init_type *edma_init_struct)
edma init.
Definition: at32f435_437_edma.c:115
edma_2d_init
void edma_2d_init(edma_stream_2d_type *edma_streamx_2d, int16_t src_stride, int16_t dst_stride, uint16_t xcnt, uint16_t ycnt)
initialize the edma 2d mode.
Definition: at32f435_437_edma.c:579
edma_2d_enable
void edma_2d_enable(edma_stream_2d_type *edma_streamx_2d, confirm_state new_state)
enable or disable the edma 2d mode.
Definition: at32f435_437_edma.c:601
edma_stream_enable
void edma_stream_enable(edma_stream_type *edma_streamx, confirm_state new_state)
enable or disable the edma streamx.
Definition: at32f435_437_edma.c:198
edma_interrupt_enable
void edma_interrupt_enable(edma_stream_type *edma_streamx, uint32_t edma_int, confirm_state new_state)
enable or disable the edma streamx interrupts.
Definition: at32f435_437_edma.c:225
edma_default_para_init
void edma_default_para_init(edma_init_type *edma_init_struct)
edma init struct config with its default value.
Definition: at32f435_437_edma.c:165
EDMA_PRIORITY_HIGH
@ EDMA_PRIORITY_HIGH
Definition: at32f435_437_edma.h:191
EDMA_PERIPHERAL_DATA_WIDTH_WORD
@ EDMA_PERIPHERAL_DATA_WIDTH_WORD
Definition: at32f435_437_edma.h:171
EDMA_MEMORY_DATA_WIDTH_WORD
@ EDMA_MEMORY_DATA_WIDTH_WORD
Definition: at32f435_437_edma.h:181
EDMA_MEMORY_SINGLE
@ EDMA_MEMORY_SINGLE
Definition: at32f435_437_edma.h:224
EDMA_PERIPHERAL_SINGLE
@ EDMA_PERIPHERAL_SINGLE
Definition: at32f435_437_edma.h:235
EDMA_FIFO_THRESHOLD_FULL
@ EDMA_FIFO_THRESHOLD_FULL
Definition: at32f435_437_edma.h:203
EDMA_DIR_MEMORY_TO_MEMORY
@ EDMA_DIR_MEMORY_TO_MEMORY
Definition: at32f435_437_edma.h:161
EDMA_FDT1_FLAG
#define EDMA_FDT1_FLAG
Definition: at32f435_437_edma.h:71
EDMA_FDT_INT
#define EDMA_FDT_INT
Definition: at32f435_437_edma.h:55
EDMA_STREAM1
#define EDMA_STREAM1
Definition: at32f435_437_edma.h:962
EDMA_STREAM1_2D
#define EDMA_STREAM1_2D
Definition: at32f435_437_edma.h:971
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
EDMA_Stream1_IRQn
@ EDMA_Stream1_IRQn
Definition: at32f435_437.h:157
edma_init_type
edma init type
Definition: at32f435_437_edma.h:440
edma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_edma.h:441
edma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_edma.h:444
edma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_edma.h:446
edma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_edma.h:445
edma_init_type::direction
edma_dir_type direction
Definition: at32f435_437_edma.h:443
edma_init_type::fifo_mode_enable
confirm_state fifo_mode_enable
Definition: at32f435_437_edma.h:451
edma_init_type::peripheral_data_width
edma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_edma.h:447
edma_init_type::fifo_threshold
edma_fifo_threshold_type fifo_threshold
Definition: at32f435_437_edma.h:452
edma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_edma.h:449
edma_init_type::priority
edma_priority_level_type priority
Definition: at32f435_437_edma.h:450
edma_init_type::memory0_base_addr
uint32_t memory0_base_addr
Definition: at32f435_437_edma.h:442
edma_init_type::peripheral_burst_mode
edma_peripheral_burst_type peripheral_burst_mode
Definition: at32f435_437_edma.h:454
edma_init_type::memory_data_width
edma_memory_data_size_type memory_data_width
Definition: at32f435_437_edma.h:448
edma_init_type::memory_burst_mode
edma_memory_burst_type memory_burst_mode
Definition: at32f435_437_edma.h:453
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32_emac.h File Reference

  • emac
  • dns_client
  • inc
Macros | Functions
project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h File Reference

header file of emac config program. More...

#include "at32f435_437.h"
#include "netif.h"

Go to the source code of this file.

Macros

#define | RX_REMAP (1)
#define | CRYSTAL_ON_PHY (0)
#define | RMII_MODE
#define | DM9162
#define | LINK_DETECTION (1)
#define | PHY_ADDRESS (0x03)
#define | PHY_CONTROL_REG (0x00)
#define | PHY_STATUS_REG (0x01)
#define | PHY_SPECIFIED_CS_REG (0x11)
#define | PHY_AUTO_NEGOTIATION_BIT (0x1000)
#define | PHY_LOOPBACK_BIT (0x4000)
#define | PHY_RESET_BIT (0x8000)
#define | PHY_LINKED_STATUS_BIT (0x0004)
#define | PHY_NEGO_COMPLETE_BIT (0x0020)
#define | PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
#define | PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
#define | PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
#define | PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Detailed Description

header file of emac config program.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h.


AT32F435/437 Firmwary Library: at32_emac.h Source File

  • emac
  • dns_client
  • inc
project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32_EMAC_H
29#define __AT32_EMAC_H
30
31#ifdef __cplusplus
32 extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37#include "netif.h"
38
47#define RX_REMAP (1)
48#define CRYSTAL_ON_PHY (0)
49
50//#define MII_MODE
51#define RMII_MODE
52
53#define DM9162
54//#define DP83848
55
56#define LINK_DETECTION (1)
58#if defined (DM9162)
59 #define PHY_ADDRESS (0x03)
60 #define PHY_CONTROL_REG (0x00)
61 #define PHY_STATUS_REG (0x01)
62 #define PHY_SPECIFIED_CS_REG (0x11)
63 /* phy control register */
64 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
65 #define PHY_LOOPBACK_BIT (0x4000)
66 #define PHY_RESET_BIT (0x8000)
67 /* phy status register */
68 #define PHY_LINKED_STATUS_BIT (0x0004)
69 #define PHY_NEGO_COMPLETE_BIT (0x0020)
70 /* phy specified control/status register */
71 #define PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
72 #define PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
73 #define PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
74 #define PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)
75#elif defined (DP83848)
76 #define PHY_ADDRESS (0x01)
77 #define PHY_CONTROL_REG (0x00)
78 #define PHY_STATUS_REG (0x01)
79 #define PHY_SPECIFIED_CS_REG (0x10)
80 /* phy control register */
81 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
82 #define PHY_LOOPBACK_BIT (0x4000)
83 #define PHY_RESET_BIT (0x8000)
84 /* phy status register */
85 #define PHY_LINKED_STATUS_BIT (0x0004)
86 #define PHY_NEGO_COMPLETE_BIT (0x0020)
88 #define PHY_DUPLEX_MODE (0x0004)
89 #define PHY_SPEED_MODE (0x0002)
90#endif
91
92 error_status emac_system_init(void);
93void emac_nvic_configuration(void);
94void emac_pins_configuration(void);
95 error_status emac_layer2_configuration(void);
96void static reset_phy(void);
97 error_status emac_phy_register_reset(void);
98 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed);
99 error_status emac_phy_init(emac_control_config_type *control_para);
100
101uint16_t link_update(void);
102void ethernetif_set_link(void const *argument);
103void ethernetif_notify_conn_changed(struct netif *netif);
104void ethernetif_update_config(struct netif *netif);
105void emac_tmr_init(void);
106
115#ifdef __cplusplus
116}
117#endif
118
119#endif
at32f435_437.h
at32f435_437 header file
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:80
reset_phy
static void reset_phy(void)
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:205
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:574
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:70
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:335
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
error_status
error_status
Definition: at32f435_437.h:380
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • emac
  • dns_client
  • inc
project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • emac
  • dns_client
  • inc
project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • emac
  • dns_client
  • inc
project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: lwipopts.h File Reference

  • emac
  • dns_client
  • inc
Macros
project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h File Reference

Go to the source code of this file.

Macros

#define | LWIP_IPV4 1
#define | NO_SYS 1
#define | SYS_LIGHTWEIGHT_PROT 0
#define | LWIP_NETCONN !NO_SYS
#define | LWIP_SOCKET !NO_SYS
#define | LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
#define | LWIP_NETBUF_RECVINFO 1
#define | LWIP_HAVE_LOOPIF 1
#define | LWIP_NETIF_LINK_CALLBACK 1
#define | LWIP_DNS 1
#define | DNS_DOES_NAME_CHECK 1
#define | LWIP_DHCP 0
#define | TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
#define | MEM_ALIGNMENT 4
#define | MEM_SIZE (20*1024)
#define | TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
#define | MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
#define | TCP_SND_BUF (2 * TCP_MSS)
#define | TCP_WND (2 * TCP_MSS)
#define | LWIP_WND_SCALE 0
#define | TCP_RCV_SCALE 0
#define | PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
#define | PBUF_POOL_BUFSIZE 1500
#define | LWIP_TCP 1
#define | TCP_TTL 255
#define | LWIP_IGMP 1
#define | LWIP_MDNS_RESPONDER 1
#define | LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
#define | ETHARP_SUPPORT_STATIC_ENTRIES 1
#define | MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
#define | MIB2_STATS 1
#define | LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */

Macro Definition Documentation

◆ DNS_DOES_NAME_CHECK

#define DNS_DOES_NAME_CHECK 1

Definition at line 54 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ ETHARP_SUPPORT_STATIC_ENTRIES

#define ETHARP_SUPPORT_STATIC_ENTRIES 1

Definition at line 90 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_DHCP

#define LWIP_DHCP 0

Definition at line 58 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_DNS

#define LWIP_DNS 1

Definition at line 53 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_HAVE_LOOPIF

#define LWIP_HAVE_LOOPIF 1

Definition at line 51 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_IGMP

#define LWIP_IGMP 1

Definition at line 85 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_IPV4

#define LWIP_IPV4 1

Definition at line 37 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_MDNS_RESPONDER

#define LWIP_MDNS_RESPONDER 1

Definition at line 86 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_MEM_ILLEGAL_FREE

#define LWIP_MEM_ILLEGAL_FREE ( msg ) /* to nothing */

Definition at line 101 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_NETBUF_RECVINFO

#define LWIP_NETBUF_RECVINFO 1

Definition at line 50 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_NETCONN

#define LWIP_NETCONN !NO_SYS

Definition at line 47 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_NETCONN_FULLDUPLEX

#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET

Definition at line 49 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_NETIF_LINK_CALLBACK

#define LWIP_NETIF_LINK_CALLBACK 1

Definition at line 52 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_NUM_NETIF_CLIENT_DATA

#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)

Definition at line 87 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_SOCKET

#define LWIP_SOCKET !NO_SYS

Definition at line 48 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_TCP

#define LWIP_TCP 1

Definition at line 81 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ LWIP_WND_SCALE

#define LWIP_WND_SCALE 0

Definition at line 73 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ MEM_ALIGNMENT

#define MEM_ALIGNMENT 4

Definition at line 67 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ MEM_SIZE

#define MEM_SIZE (20*1024)

Definition at line 68 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ MEMP_NUM_SYS_TIMEOUT

#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)

Definition at line 92 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ MEMP_NUM_TCP_SEG

#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN

Definition at line 70 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ MIB2_STATS

#define MIB2_STATS 1

Definition at line 95 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ NO_SYS

#define NO_SYS 1

Definition at line 45 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ PBUF_POOL_BUFSIZE

#define PBUF_POOL_BUFSIZE 1500

Definition at line 77 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ PBUF_POOL_SIZE

#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */

Definition at line 75 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ SYS_LIGHTWEIGHT_PROT

#define SYS_LIGHTWEIGHT_PROT 0

Definition at line 46 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ TCP_MSS

#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */

Definition at line 63 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ TCP_RCV_SCALE

#define TCP_RCV_SCALE 0

Definition at line 74 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ TCP_SND_BUF

#define TCP_SND_BUF (2 * TCP_MSS)

Definition at line 71 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ TCP_SND_QUEUELEN

#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS

Definition at line 69 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ TCP_TTL

#define TCP_TTL 255

Definition at line 82 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.

◆ TCP_WND

#define TCP_WND (2 * TCP_MSS)

Definition at line 72 of file project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h.


AT32F435/437 Firmwary Library: lwipopts.h Source File

  • emac
  • dns_client
  • inc
project/at_start_f437/examples/emac/dns_client/inc/lwipopts.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
21 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
25 * OF SUCH DAMAGE.
26 *
27 * This file is part of the lwIP TCP/IP stack.
28 *
29 * Author: Simon Goldschmidt
30 *
31 */
32#ifndef LWIP_HDR_LWIPOPTS_H
33#define LWIP_HDR_LWIPOPTS_H
34
35//#define LWIP_TESTMODE 0
36
37#define LWIP_IPV4 1
38//#define LWIP_TIMERS 0
39
40//#define LWIP_CHECKSUM_ON_COPY 1
41//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK 1
42//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL(printfmsg) LWIP_ASSERT("TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL", 0)
43
44/* We link to special sys_arch.c (for basic non-waiting API layers unit tests) */
45#define NO_SYS 1
46#define SYS_LIGHTWEIGHT_PROT 0
47#define LWIP_NETCONN !NO_SYS
48#define LWIP_SOCKET !NO_SYS
49#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
50#define LWIP_NETBUF_RECVINFO 1
51#define LWIP_HAVE_LOOPIF 1
52#define LWIP_NETIF_LINK_CALLBACK 1
53#define LWIP_DNS 1
54#define DNS_DOES_NAME_CHECK 1
55//#define TCPIP_THREAD_TEST
56
57/* Enable DHCP to test it, disable UDP checksum to easier inject packets */
58#define LWIP_DHCP 0
59
60/* Minimal changes to opt.h required for tcp unit tests: */
61/* TCP Maximum segment size. */
62
63#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
64/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
65 lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
66 byte alignment -> define MEM_ALIGNMENT to 2. */
67#define MEM_ALIGNMENT 4
68#define MEM_SIZE (20*1024)
69#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
70#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
71#define TCP_SND_BUF (2 * TCP_MSS)
72#define TCP_WND (2 * TCP_MSS)
73#define LWIP_WND_SCALE 0
74#define TCP_RCV_SCALE 0
75#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
76/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
77#define PBUF_POOL_BUFSIZE 1500
78//#define TCP_QUEUE_OOSEQ 0
79
80/* ---------- TCP options ---------- */
81#define LWIP_TCP 1
82#define TCP_TTL 255
83
84/* Enable IGMP and MDNS for MDNS tests */
85#define LWIP_IGMP 1
86#define LWIP_MDNS_RESPONDER 1
87#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
88
89/* Minimal changes to opt.h required for etharp unit tests: */
90#define ETHARP_SUPPORT_STATIC_ENTRIES 1
91
92#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
93
94/* MIB2 stats are required to check IPv4 reassembly results */
95#define MIB2_STATS 1
96
97/* netif tests want to test this, so enable: */
98//#define LWIP_NETIF_EXT_STATUS_CALLBACK 1
99
100/* Check lwip_stats.mem.illegal instead of asserting */
101#define LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */
102
103#endif /* LWIP_HDR_LWIPOPTS_H */


AT32F435/437 Firmwary Library: netconf.h File Reference

  • emac
  • dns_client
  • inc
Functions
project/at_start_f437/examples/emac/dns_client/inc/netconf.h File Reference

This file contains all the functions prototypes for the netconf.c file. More...

Go to the source code of this file.

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Detailed Description

This file contains all the functions prototypes for the netconf.c file.

Version
v2.0.9
Date
2022-06-28
        Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/dns_client/inc/netconf.h.


AT32F435/437 Firmwary Library: netconf.h Source File

  • emac
  • dns_client
  • inc
project/at_start_f437/examples/emac/dns_client/inc/netconf.h
Go to the documentation of this file.
1
28/* Define to prevent recursive inclusion -------------------------------------*/
29#ifndef __NETCONF_H
30#define __NETCONF_H
31
32#ifdef __cplusplus
33 extern "C" {
34#endif
35
47/* Includes ------------------------------------------------------------------*/
48void tcpip_stack_init(void);
49void lwip_pkt_handle(void);
50void time_update(void);
51void lwip_periodic_handle(volatile uint32_t localtime);
52
53
54#ifdef __cplusplus
55}
56#endif
57
65#endif /* __NETCONF_H */
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164


AT32F435/437 Firmwary Library: at32_emac.c File Reference

  • emac
  • dns_client
  • src
Functions | Variables
project/at_start_f437/examples/emac/dns_client/src/at32_emac.c File Reference

emac config program More...

#include "at32f435_437_board.h"
#include "lwip/dhcp.h"
#include "at32_emac.h"

Go to the source code of this file.

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
reset layer 1 More...
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Variables

emac_control_config_type mac_control_para

Detailed Description

emac config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/dns_client/src/at32_emac.c.

Function Documentation

◆ reset_phy()

static void reset_phy ( void )
static

reset layer 1

Parameters
none
Return values
none

Definition at line 261 of file project/at_start_f437/examples/emac/dns_client/src/at32_emac.c.

Referenced by emac_layer2_configuration().


AT32F435/437 Firmwary Library: at32_emac.c Source File

  • emac
  • dns_client
  • src
project/at_start_f437/examples/emac/dns_client/src/at32_emac.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_board.h"
29#include "lwip/dhcp.h"
30#include "at32_emac.h"
31
40 emac_control_config_type mac_control_para;
41
47 error_status emac_system_init(void)
48{
49 error_status status;
50
51 emac_nvic_configuration();
52
53 /* emac periph clock enable */
54 crm_periph_clock_enable(CRM_EMAC_PERIPH_CLOCK, TRUE);
55 crm_periph_clock_enable(CRM_EMACTX_PERIPH_CLOCK, TRUE);
56 crm_periph_clock_enable(CRM_EMACRX_PERIPH_CLOCK, TRUE);
57
58 emac_pins_configuration();
59 status = emac_layer2_configuration();
60 emac_tmr_init();
61
62 return status;
63}
64
70void emac_nvic_configuration(void)
71{
72 nvic_irq_enable(EMAC_IRQn, 1, 0);
73}
74
80void emac_pins_configuration(void)
81{
82 gpio_init_type gpio_init_struct = {0};
83
84 /* emac pins clock enable */
85 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
87 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
88 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
89 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
90 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
91
92 /* pa2 -> mdio */
93 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_11);
94 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
95 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
96 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
97 gpio_init_struct.gpio_pins = GPIO_PINS_2;
98 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
99 gpio_init(GPIOA, &gpio_init_struct);
100
101 /* pc1 -> mdc */
102 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE1, GPIO_MUX_11);
103 gpio_init_struct.gpio_pins = GPIO_PINS_1;
104 gpio_init(GPIOC, &gpio_init_struct);
105
106 #ifdef MII_MODE
107 /*
108 pb12 -> tx_d0
109 pb13 -> tx_d1
110 pc2 -> tx_d2
111 pb8 -> tx_d3
112 pb11 -> tx_en
113 pc3 -> tx_clk
114 */
115 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_11);
116 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_11);
117 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_11);
118 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_11);
119 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_11 | GPIO_PINS_12 | GPIO_PINS_13;
120 gpio_init(GPIOB, &gpio_init_struct);
121
122 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_11);
123 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE3, GPIO_MUX_11);
124 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
125 gpio_init(GPIOC, &gpio_init_struct);
126
127 /*
128 pd8 -> rx_dv
129 pd9 -> rx_d0
130 pd10 -> rx_d1
131 pd11 -> rx_d2
132 pd12 -> rx_d3
133 */
134 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
135 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
136 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
137 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE11, GPIO_MUX_11);
138 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE12, GPIO_MUX_11);
139 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12;
140 gpio_init(GPIOD, &gpio_init_struct);
141
142 /*
143 pa1 -> rx_clk
144 pa0 -> crs
145 pa3 -> col
146 pb10 -> rx_er
147 */
148 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_11);
149 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
150 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_11);
151 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_3;
152 gpio_init(GPIOA, &gpio_init_struct);
153
154 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_11);
155 gpio_init_struct.gpio_pins = GPIO_PINS_10;
156 gpio_init(GPIOB, &gpio_init_struct);
157 #endif /* MII_MODE */
158
159 #ifdef RMII_MODE
160 /*
161 pb12 -> tx_d0
162 pb13 -> tx_d1
163 pb11 -> tx_en
164 */
165 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE11, GPIO_MUX_11);
166 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE13, GPIO_MUX_11);
167 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE14, GPIO_MUX_11);
168 gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_13 | GPIO_PINS_14;
169 gpio_init(GPIOG, &gpio_init_struct);
170
171 /*
172 pd8 -> rx_dv
173 pd9 -> rx_d0
174 pd10 -> rx_d1
175 */
176 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
177 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
178 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
179 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10;
180 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
181 gpio_init(GPIOD, &gpio_init_struct);
182
183
184 #endif /* RMII_MODE */
185 /*
186 pa1 -> ref_clk
187 */
188 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
189 gpio_init_struct.gpio_pins = GPIO_PINS_1;
190 gpio_init(GPIOA, &gpio_init_struct);
191
192 #if !CRYSTAL_ON_PHY
193 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_0);
194 gpio_init_struct.gpio_pins = GPIO_PINS_8;
195 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
196 gpio_init(GPIOA, &gpio_init_struct);
197 #endif
198}
199
205 error_status emac_layer2_configuration(void)
206{
207 emac_dma_config_type dma_control_para;
208 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
209 #ifdef MII_MODE
210 scfg_emac_interface_set(SCFG_EMAC_SELECT_MII);
211 #elif defined RMII_MODE
212 scfg_emac_interface_set(SCFG_EMAC_SELECT_RMII);
213 #endif
214 crm_clock_out1_set(CRM_CLKOUT1_PLL);
215 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_5, CRM_CLKOUT_DIV2_2);
216
217 /* reset phy */
218 reset_phy();
219 /* reset emac ahb bus */
220 emac_reset();
221
222 /* software reset emac dma */
223 emac_dma_software_reset_set();
224
225 while(emac_dma_software_reset_get() == SET);
226
227 emac_control_para_init(&mac_control_para);
228
229 mac_control_para.auto_nego = EMAC_AUTO_NEGOTIATION_ON;
230
231 if(emac_phy_init(&mac_control_para) == ERROR)
232 {
233 return ERROR;
234 }
235
236 emac_dma_para_init(&dma_control_para);
237
238 dma_control_para.rsf_enable = TRUE;
239 dma_control_para.tsf_enable = TRUE;
240 dma_control_para.osf_enable = TRUE;
241 dma_control_para.aab_enable = TRUE;
242 dma_control_para.usp_enable = TRUE;
243 dma_control_para.fb_enable = TRUE;
244 dma_control_para.flush_rx_disable = TRUE;
245 dma_control_para.rx_dma_pal = EMAC_DMA_PBL_32;
246 dma_control_para.tx_dma_pal = EMAC_DMA_PBL_32;
247 dma_control_para.priority_ratio = EMAC_DMA_2_RX_1_TX;
248
249 emac_dma_config(&dma_control_para);
250 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_NORMAL_SUMMARY, TRUE);
251 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_RX, TRUE);
252
253 return SUCCESS;
254}
255
261void static reset_phy(void)
262{
263 gpio_init_type gpio_init_struct = {0};
264 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
265 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
266 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE8, GPIO_MUX_0);
267 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
268 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
269 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
270 gpio_init_struct.gpio_pins = GPIO_PINS_15;
271 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
272 gpio_init(GPIOE, &gpio_init_struct);
273
274 gpio_init_struct.gpio_pins = GPIO_PINS_15;
275 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
276 gpio_init(GPIOG, &gpio_init_struct);
277 gpio_bits_reset(GPIOG, GPIO_PINS_15);
278 gpio_bits_reset(GPIOE, GPIO_PINS_15);
279 delay_ms(2);
280 gpio_bits_set(GPIOE, GPIO_PINS_15);
281 delay_ms(2);
282}
283
289 error_status emac_phy_register_reset(void)
290{
291 uint16_t data = 0;
292 uint32_t timeout = 0;
293 uint32_t i = 0;
294
295 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_RESET_BIT) == ERROR)
296 {
297 return ERROR;
298 }
299
300 for(i = 0; i < 0x000FFFFF; i++);
301
302 do
303 {
304 timeout++;
305 if(emac_phy_register_read(PHY_ADDRESS, PHY_CONTROL_REG, &data) == ERROR)
306 {
307 return ERROR;
308 }
309 } while((data & PHY_RESET_BIT) && (timeout < PHY_TIMEOUT));
310
311 for(i = 0; i < 0x00FFFFF; i++);
312 if(timeout == PHY_TIMEOUT)
313 {
314 return ERROR;
315 }
316 return SUCCESS;
317}
318
335 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
336{
337 uint16_t data = 0;
338 uint32_t timeout = 0;
339 if(nego == EMAC_AUTO_NEGOTIATION_ON)
340 {
341 do
342 {
343 timeout++;
344 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
345 {
346 return ERROR;
347 }
348 } while(!(data & PHY_LINKED_STATUS_BIT) && (timeout < PHY_TIMEOUT));
349
350 if(timeout == PHY_TIMEOUT)
351 {
352 return ERROR;
353 }
354
355 timeout = 0;
356
357 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_AUTO_NEGOTIATION_BIT) == ERROR)
358 {
359 return ERROR;
360 }
361
362
363 do
364 {
365 timeout++;
366 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
367 {
368 return ERROR;
369 }
370 } while(!(data & PHY_NEGO_COMPLETE_BIT) && (timeout < PHY_TIMEOUT));
371
372 if(timeout == PHY_TIMEOUT)
373 {
374 return ERROR;
375 }
376
377 if(emac_phy_register_read(PHY_ADDRESS, PHY_SPECIFIED_CS_REG, &data) == ERROR)
378 {
379 return ERROR;
380 }
381 #ifdef DM9162
382 if(data & PHY_FULL_DUPLEX_100MBPS_BIT)
383 {
384 emac_fast_speed_set(EMAC_SPEED_100MBPS);
385 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
386 }
387 else if(data & PHY_HALF_DUPLEX_100MBPS_BIT)
388 {
389 emac_fast_speed_set(EMAC_SPEED_100MBPS);
390 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
391 }
392 else if(data & PHY_FULL_DUPLEX_10MBPS_BIT)
393 {
394 emac_fast_speed_set(EMAC_SPEED_10MBPS);
395 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
396 }
397 else if(data & PHY_HALF_DUPLEX_10MBPS_BIT)
398 {
399 emac_fast_speed_set(EMAC_SPEED_10MBPS);
400 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
401 }
402 #else
403 if(data & PHY_DUPLEX_MODE)
404 {
405 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
406 }
407 else
408 {
409 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
410 }
411 if(data & PHY_SPEED_MODE)
412 {
413 emac_fast_speed_set(EMAC_SPEED_10MBPS);
414 }
415 else
416 {
417 emac_fast_speed_set(EMAC_SPEED_100MBPS);
418 }
419 #endif
420 }
421 else
422 {
423 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, (uint16_t)((mode << 8) | (speed << 13))) == ERROR)
424 {
425 return ERROR;
426 }
427 if(speed == EMAC_SPEED_100MBPS)
428 {
429 emac_fast_speed_set(EMAC_SPEED_100MBPS);
430 }
431 else
432 {
433 emac_fast_speed_set(EMAC_SPEED_10MBPS);
434 }
435 if(mode == EMAC_FULL_DUPLEX)
436 {
437 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
438 }
439 else
440 {
441 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
442 }
443 }
444
445 return SUCCESS;
446}
447
453 error_status emac_phy_init(emac_control_config_type *control_para)
454{
455 emac_clock_range_set();
456 if(emac_phy_register_reset() == ERROR)
457 {
458 return ERROR;
459 }
460
461 emac_control_config(control_para);
462 return SUCCESS;
463}
464
470uint16_t link_update(void)
471{
472 uint16_t link_data, link_state;
473 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &link_data) == ERROR)
474 {
475 return ERROR;
476 }
477
478 link_state = (link_data & PHY_LINKED_STATUS_BIT)>>2;
479 return link_state;
480}
481
487void ethernetif_set_link(void const *argument)
488{
489 uint16_t regvalue = 0;
490 struct netif *netif = (struct netif *)argument;
491
492 /* read phy_bsr*/
493 regvalue = link_update();
494
495 if(regvalue > 0)
496 {
497 at32_led_on(LED4);
498 at32_led_off(LED2);
499 }
500 else
501 {
502 at32_led_on(LED2);
503 at32_led_off(LED4);
504 }
505 /* check whether the netif link down and the phy link is up */
506 if(!netif_is_link_up(netif) && (regvalue))
507 {
508 /* network cable is connected */
509 netif_set_link_up(netif);
510 }
511 else if(netif_is_link_up(netif) && (!regvalue))
512 {
513 /* network cable is dis-connected */
514 netif_set_link_down(netif);
515 }
516}
517
523void ethernetif_notify_conn_changed(struct netif *netif)
524{
525 /* note : this is function could be implemented in user file
526 when the callback is needed,
527 */
528
529 if (netif_is_link_up(netif)) {
530 netif_set_up(netif);
531
532#if LWIP_DHCP
533 /* creates a new dhcp client for this interface on the first call.
534 note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
535 the predefined regular intervals after starting the client.
536 you can peek in the netif->dhcp struct for the actual dhcp status.*/
537 dhcp_start(netif);
538#endif
539 }
540 else
541 netif_set_down(netif);
542}
543
550void ethernetif_update_config(struct netif *netif)
551{
552 if(netif_is_link_up(netif))
553 {
554 emac_speed_config(mac_control_para.auto_nego, mac_control_para.duplex_mode, mac_control_para.fast_ethernet_speed);
555
556 delay_ms(300);
557 /* enable mac and dma transmission and reception */
558 emac_start();
559 }
560 else
561 {
562 /* disable mac and dma transmission and reception */
563 emac_stop();
564 }
565
566 ethernetif_notify_conn_changed(netif);
567}
568
574void emac_tmr_init(void)
575{
576 crm_clocks_freq_type crm_clocks_freq_struct = {0};
577 crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
578
579 crm_clocks_freq_get(&crm_clocks_freq_struct);
580 /* tmr1 configuration */
581 /* time base configuration */
582 /* systemclock/24000/100 = 100hz */
583 tmr_base_init(TMR6, 99, (crm_clocks_freq_struct.ahb_freq / 10000) - 1);
584 tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
585
586 /* overflow interrupt enable */
587 tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
588
589 /* tmr1 overflow interrupt nvic init */
590 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
591 nvic_irq_enable(TMR6_DAC_GLOBAL_IRQn, 0, 0);
592 tmr_counter_enable(TMR6, TRUE);
593}
594
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:80
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:205
PHY_AUTO_NEGOTIATION_BIT
#define PHY_AUTO_NEGOTIATION_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:64
PHY_RESET_BIT
#define PHY_RESET_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:66
mac_control_para
emac_control_config_type mac_control_para
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:40
PHY_ADDRESS
#define PHY_ADDRESS
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:59
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
PHY_FULL_DUPLEX_10MBPS_BIT
#define PHY_FULL_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:73
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:574
PHY_FULL_DUPLEX_100MBPS_BIT
#define PHY_FULL_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:71
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:70
PHY_SPECIFIED_CS_REG
#define PHY_SPECIFIED_CS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:62
PHY_CONTROL_REG
#define PHY_CONTROL_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:60
PHY_NEGO_COMPLETE_BIT
#define PHY_NEGO_COMPLETE_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:69
PHY_HALF_DUPLEX_100MBPS_BIT
#define PHY_HALF_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:72
PHY_STATUS_REG
#define PHY_STATUS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:61
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:335
PHY_LINKED_STATUS_BIT
#define PHY_LINKED_STATUS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:68
PHY_HALF_DUPLEX_10MBPS_BIT
#define PHY_HALF_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:74
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR6_PERIPH_CLOCK
@ CRM_TMR6_PERIPH_CLOCK
Definition: at32f435_437_crm.h:132
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_GPIOE_PERIPH_CLOCK
@ CRM_GPIOE_PERIPH_CLOCK
Definition: at32f435_437_crm.h:109
CRM_CLKOUT_DIV1_5
@ CRM_CLKOUT_DIV1_5
Definition: at32f435_437_crm.h:729
CRM_CLKOUT_DIV2_2
@ CRM_CLKOUT_DIV2_2
Definition: at32f435_437_crm.h:738
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
emac_dma_software_reset_set
void emac_dma_software_reset_set(void)
reset emac dma
Definition: at32f435_437_emac.c:156
emac_control_para_init
void emac_control_para_init(emac_control_config_type *control_para)
initialize emac control structure
Definition: at32f435_437_emac.c:70
emac_dma_software_reset_get
flag_status emac_dma_software_reset_get(void)
get emac dma reset status
Definition: at32f435_437_emac.c:166
emac_control_config
void emac_control_config(emac_control_config_type *control_struct)
configure emac control setting.
Definition: at32f435_437_emac.c:136
emac_phy_register_read
error_status emac_phy_register_read(uint8_t address, uint8_t reg, uint16_t *data)
read phy data
Definition: at32f435_437_emac.c:262
emac_reset
void emac_reset(void)
deinitialize the emac peripheral registers to their default reset values.
Definition: at32f435_437_emac.c:59
emac_start
void emac_start(void)
enable emac and dma reception/transmission
Definition: at32f435_437_emac.c:183
emac_duplex_mode_set
void emac_duplex_mode_set(emac_duplex_type duplex_mode)
set duplex mode.
Definition: at32f435_437_emac.c:463
emac_fast_speed_set
void emac_fast_speed_set(emac_speed_type speed)
set mac fast emac speed.
Definition: at32f435_437_emac.c:450
emac_clock_range_set
void emac_clock_range_set(void)
according to hclk to set mdc clock frequency.
Definition: at32f435_437_emac.c:93
emac_dma_interrupt_enable
void emac_dma_interrupt_enable(emac_dma_interrupt_type it, confirm_state new_state)
enable dma interrupt
Definition: at32f435_437_emac.c:1497
emac_dma_para_init
void emac_dma_para_init(emac_dma_config_type *control_para)
init emac dma parameters
Definition: at32f435_437_emac.c:1073
emac_phy_register_write
error_status emac_phy_register_write(uint8_t address, uint8_t reg, uint16_t data)
write phy data.
Definition: at32f435_437_emac.c:232
emac_dma_config
void emac_dma_config(emac_dma_config_type *control_para)
configure emac dma
Definition: at32f435_437_emac.c:1099
emac_stop
void emac_stop(void)
stop emac and dma reception/transmission
Definition: at32f435_437_emac.c:206
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
EMAC_HALF_DUPLEX
@ EMAC_HALF_DUPLEX
Definition: at32f435_437_emac.h:303
EMAC_FULL_DUPLEX
@ EMAC_FULL_DUPLEX
Definition: at32f435_437_emac.h:304
EMAC_DMA_PBL_32
@ EMAC_DMA_PBL_32
Definition: at32f435_437_emac.h:427
EMAC_SPEED_10MBPS
@ EMAC_SPEED_10MBPS
Definition: at32f435_437_emac.h:312
EMAC_SPEED_100MBPS
@ EMAC_SPEED_100MBPS
Definition: at32f435_437_emac.h:313
EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
@ EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
Definition: at32f435_437_emac.h:527
EMAC_DMA_INTERRUPT_RX
@ EMAC_DMA_INTERRUPT_RX
Definition: at32f435_437_emac.h:519
EMAC_AUTO_NEGOTIATION_ON
@ EMAC_AUTO_NEGOTIATION_ON
Definition: at32f435_437_emac.h:284
EMAC_DMA_2_RX_1_TX
@ EMAC_DMA_2_RX_1_TX
Definition: at32f435_437_emac.h:412
PHY_TIMEOUT
#define PHY_TIMEOUT
Definition: at32f435_437_emac.h:47
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_0
@ GPIO_MUX_0
Definition: at32f435_437_gpio.h:156
GPIO_MUX_11
@ GPIO_MUX_11
Definition: at32f435_437_gpio.h:167
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
GPIOE
#define GPIOE
Definition: at32f435_437_gpio.h:525
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_emac_interface_set
void scfg_emac_interface_set(scfg_emac_interface_type mode)
scfg emac interface set
Definition: at32f435_437_scfg.c:113
SCFG_EMAC_SELECT_MII
@ SCFG_EMAC_SELECT_MII
Definition: at32f435_437_scfg.h:139
SCFG_EMAC_SELECT_RMII
@ SCFG_EMAC_SELECT_RMII
Definition: at32f435_437_scfg.h:140
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
TMR6_DAC_GLOBAL_IRQn
@ TMR6_DAC_GLOBAL_IRQn
Definition: at32f435_437.h:202
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
reset_phy
static void reset_phy(void)
reset layer 1
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:261
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::ahb_freq
uint32_t ahb_freq
Definition: at32f435_437_crm.h:790
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588
emac_control_config_type::auto_nego
emac_auto_negotiation_type auto_nego
Definition: at32f435_437_emac.h:589
emac_control_config_type::fast_ethernet_speed
emac_speed_type fast_ethernet_speed
Definition: at32f435_437_emac.h:598
emac_control_config_type::duplex_mode
emac_duplex_type duplex_mode
Definition: at32f435_437_emac.h:595
emac_dma_config_type
ethernet mac dma config type
Definition: at32f435_437_emac.h:609
emac_dma_config_type::tx_dma_pal
emac_dma_pbl_type tx_dma_pal
Definition: at32f435_437_emac.h:614
emac_dma_config_type::aab_enable
confirm_state aab_enable
Definition: at32f435_437_emac.h:610
emac_dma_config_type::rx_dma_pal
emac_dma_pbl_type rx_dma_pal
Definition: at32f435_437_emac.h:612
emac_dma_config_type::flush_rx_disable
confirm_state flush_rx_disable
Definition: at32f435_437_emac.h:620
emac_dma_config_type::priority_ratio
emac_dma_rx_tx_ratio_type priority_ratio
Definition: at32f435_437_emac.h:617
emac_dma_config_type::osf_enable
confirm_state osf_enable
Definition: at32f435_437_emac.h:626
emac_dma_config_type::usp_enable
confirm_state usp_enable
Definition: at32f435_437_emac.h:611
emac_dma_config_type::rsf_enable
confirm_state rsf_enable
Definition: at32f435_437_emac.h:619
emac_dma_config_type::tsf_enable
confirm_state tsf_enable
Definition: at32f435_437_emac.h:621
emac_dma_config_type::fb_enable
confirm_state fb_enable
Definition: at32f435_437_emac.h:613
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • emac
  • dns_client
  • src
Functions
project/at_start_f437/examples/emac/dns_client/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/dns_client/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • emac
  • dns_client
  • src
project/at_start_f437/examples/emac/dns_client/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 125, 1, CRM_PLL_FR_4);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/emac/dns_client/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_4
@ CRM_PLL_FR_4
Definition: at32f435_437_crm.h:548
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • emac
  • dns_client
  • src
Functions
project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "netconf.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR6_DAC_GLOBAL_IRQHandler (void)
this function handles timer6 overflow handler. More...
void | EMAC_IRQHandler (void)
this function handles emac handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • emac
  • dns_client
  • src
project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "netconf.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void TMR6_DAC_GLOBAL_IRQHandler(void)
142{
143 if(tmr_flag_get(TMR6, TMR_OVF_FLAG) != RESET)
144 {
145 /* Update the local_time by adding SYSTEMTICK_PERIOD_MS each SysTick interrupt */
146 time_update();
147 tmr_flag_clear(TMR6, TMR_OVF_FLAG);
148 }
149}
150
156void EMAC_IRQHandler(void)
157{
158 /* handles all the received frames */
159 while(emac_received_packet_size_get() != 0)
160 {
161 lwip_pkt_handle();
162 }
163
164 /* clear the emac dma rx it pending bits */
165 emac_dma_flag_clear(EMAC_DMA_RI_FLAG);
166 emac_dma_flag_clear(EMAC_DMA_NIS_FLAG);
167}
168
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c:92
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c:53
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c:66
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c:105
EMAC_IRQHandler
void EMAC_IRQHandler(void)
this function handles emac handler.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c:156
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c:123
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c:44
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c:79
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c:132
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c:114
TMR6_DAC_GLOBAL_IRQHandler
void TMR6_DAC_GLOBAL_IRQHandler(void)
this function handles timer6 overflow handler.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c:141
emac_dma_flag_clear
void emac_dma_flag_clear(uint32_t dma_flag)
clear the emac dma flag.
Definition: at32f435_437_emac.c:2290
emac_received_packet_size_get
uint32_t emac_received_packet_size_get(void)
get the size of received the received packet.
Definition: at32f435_437_emac.c:1044
EMAC_DMA_RI_FLAG
#define EMAC_DMA_RI_FLAG
Definition: at32f435_437_emac.h:264
EMAC_DMA_NIS_FLAG
#define EMAC_DMA_NIS_FLAG
Definition: at32f435_437_emac.h:272
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • emac
  • dns_client
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/dns_client/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "at32_emac.h"
#include "netconf.h"
#include "ip_addr.h"
#include "dns.h"

Go to the source code of this file.

Macros

#define | DELAY 100
#define | FAST 1
#define | SLOW 4
#define | DOMAIN_NAME "www.arterytek.com"

Functions

void | dns_test (void)
void | parsing_result (const char *name, ip_addr_t *ipaddr, void *arg)
int | main (void)
main function. More...

Variables

uint8_t | g_speed = 1
volatile uint32_t | local_time = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/dns_client/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • emac
  • dns_client
  • src
project/at_start_f437/examples/emac/dns_client/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "at32_emac.h"
30#include "netconf.h"
31#include "ip_addr.h"
32#include "dns.h"
33
42#define DELAY 100
43#define FAST 1
44#define SLOW 4
45
46#define DOMAIN_NAME "www.arterytek.com"
47
48uint8_t g_speed = FAST;
49volatile uint32_t local_time = 0;
50
51void dns_test(void);
52void parsing_result(const char *name, ip_addr_t *ipaddr, void *arg);
53
59int main(void)
60{
61 error_status status;
62
63 system_clock_config();
64
65 at32_board_init();
66
67 uart_print_init(115200);
68
69 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
70
71 delay_init();
72
73 status = emac_system_init();
74
75 while(status == ERROR);
76
77 tcpip_stack_init();
78
79 #if LWIP_DNS
80 dns_init();
81 dns_test();
82 #endif
83
84 while(1)
85 {
86 lwip_periodic_handle(local_time);
87 }
88}
89
90#if LWIP_DNS
91void dns_test(void)
92{
93 ip_addr_t cipaddr_dns;
94
95 dns_gethostbyname(DOMAIN_NAME, &cipaddr_dns, (dns_found_callback)parsing_result, NULL);
96}
97
98void parsing_result(const char *name, ip_addr_t *ipaddr, void *arg)
99{
100 uint8_t server_ip[4];
101
102 server_ip[0] = ipaddr->addr>>24;
103 server_ip[1] = ipaddr->addr>>16;
104 server_ip[2] = ipaddr->addr>>8;
105 server_ip[3] = ipaddr->addr;
106
107 printf("%d.%d.%d.%d\n",server_ip[3], server_ip[2], server_ip[1], server_ip[0]);
108}
109#endif
110
at32f435_437_board.h
dns_test
void dns_test(void)
FAST
#define FAST
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:43
main
int main(void)
main function.
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:59
DOMAIN_NAME
#define DOMAIN_NAME
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:46
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:49
parsing_result
void parsing_result(const char *name, ip_addr_t *ipaddr, void *arg)
g_speed
uint8_t g_speed
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:48
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
delay_init
void delay_init()
initialize delay function
Definition: at32f435_437_board.c:293
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
name
Definition: telnet.c:50
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: netconf.c File Reference

  • emac
  • dns_client
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/dns_client/src/netconf.c File Reference

network connection configuration More...

#include "lwip/memp.h"
#include "lwip/tcp.h"
#include "lwip/priv/tcp_priv.h"
#include "lwip/udp.h"
#include "netif/etharp.h"
#include "lwip/dhcp.h"
#include "ethernetif.h"
#include "netconf.h"
#include "dns.h"
#include "stdio.h"
#include "at32_emac.h"

Go to the source code of this file.

Macros

#define | MAC_ADDR_LENGTH (6)
#define | ADDR_LENGTH (4)
#define | SYSTEMTICK_PERIOD_MS 10

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Variables

volatile uint32_t | local_time
struct netif | netif
volatile uint32_t | tcp_timer = 0
volatile uint32_t | arp_timer = 0
volatile uint32_t | link_timer = 0
static uint8_t | mac_address [(6)] = {0, 0, 0x44, 0x45, 0x56, 1}
static uint8_t | local_ip [(4)] = {192, 168, 81, 37}
static uint8_t | local_gw [(4)] = {192, 168, 81, 187}
static uint8_t | local_mask [(4)] = {255, 255, 255, 0}

Detailed Description

network connection configuration

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/dns_client/src/netconf.c.


AT32F435/437 Firmwary Library: netconf.c Source File

  • emac
  • dns_client
  • src
project/at_start_f437/examples/emac/dns_client/src/netconf.c
Go to the documentation of this file.
1
27/* Includes ------------------------------------------------------------------*/
28#include "lwip/memp.h"
29#include "lwip/tcp.h"
30#include "lwip/priv/tcp_priv.h"
31#include "lwip/udp.h"
32#include "netif/etharp.h"
33#include "lwip/dhcp.h"
34#include "ethernetif.h"
35#include "netconf.h"
36#include "dns.h"
37#include "stdio.h"
38#include "at32_emac.h"
39
52/* Private define ------------------------------------------------------------*/
53/* Private macro -------------------------------------------------------------*/
54#define MAC_ADDR_LENGTH (6)
55#define ADDR_LENGTH (4)
56#define SYSTEMTICK_PERIOD_MS 10
57/* Private variables ---------------------------------------------------------*/
58extern volatile uint32_t local_time;
59struct netif netif;
60volatile uint32_t tcp_timer = 0;
61volatile uint32_t arp_timer = 0;
62volatile uint32_t link_timer = 0;
63#if LWIP_DNS
64volatile uint32_t dns_timer = 0;
65#endif
66
67static uint8_t mac_address[MAC_ADDR_LENGTH] = {0, 0, 0x44, 0x45, 0x56, 1};;
68#if LWIP_DHCP
69volatile uint32_t dhcp_fine_timer = 0;
70volatile uint32_t dhcp_coarse_timer = 0;
71#else
72static uint8_t local_ip[ADDR_LENGTH] = {192, 168, 81, 37};
73static uint8_t local_gw[ADDR_LENGTH] = {192, 168, 81, 187};
74static uint8_t local_mask[ADDR_LENGTH] = {255, 255, 255, 0};
75#endif
76
77/* Private function prototypes -----------------------------------------------*/
78/* Private functions ---------------------------------------------------------*/
79
85void tcpip_stack_init(void)
86{
87 ip_addr_t ipaddr;
88 ip_addr_t netmask;
89 ip_addr_t gw;
90
91 /* Initializes the dynamic memory heap defined by MEM_SIZE.*/
92 mem_init();
93
94 /* Initializes the memory pools defined by MEMP_NUM_x.*/
95 memp_init();
96
97
98#if LWIP_DHCP //need DHCP server
99 ipaddr.addr = 0;
100 netmask.addr = 0;
101 gw.addr = 0;
102
103#else
104 IP4_ADDR(&ipaddr, local_ip[0], local_ip[1], local_ip[2], local_ip[3]);
105 IP4_ADDR(&netmask, local_mask[0], local_mask[1], local_mask[2], local_mask[3]);
106 IP4_ADDR(&gw, local_gw[0], local_gw[1], local_gw[2], local_gw[3]);
107#endif
108
109 lwip_set_mac_address(mac_address);
110
111 /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
112 struct ip_addr *netmask, struct ip_addr *gw,
113 void *state, err_t (* init)(struct netif *netif),
114 err_t (* input)(struct pbuf *p, struct netif *netif))
115
116 Adds your network interface to the netif_list. Allocate a struct
117 netif and pass a pointer to this structure as the first argument.
118 Give pointers to cleared ip_addr structures when using DHCP,
119 or fill them with sane numbers otherwise. The state pointer may be NULL.
120
121 The init function pointer must point to a initialization function for
122 your ethernet netif interface. The following code illustrates it's use.*/
123
124 if(netif_add(&netif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &netif_input) == NULL)
125 {
126 while(1);
127 }
128
129 /* Registers the default network interface.*/
130 netif_set_default(&netif);
131
132 /* When the netif is fully configured this function must be called.*/
133 netif_set_up(&netif);
134
135 /* Set the link callback function, this function is called on change of link status*/
136 netif_set_link_callback(&netif, ethernetif_update_config);
137}
138
144void lwip_pkt_handle(void)
145{
146 /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */
147 if(ethernetif_input(&netif) != ERR_OK)
148 {
149 while(1);
150 }
151}
152
158void time_update(void)
159{
160 local_time += SYSTEMTICK_PERIOD_MS;
161}
162
168void lwip_periodic_handle(volatile uint32_t localtime)
169{
170
171 /* TCP periodic process every 250 ms */
172 if (localtime - tcp_timer >= TCP_TMR_INTERVAL)
173 {
174 tcp_timer = localtime;
175 tcp_tmr();
176 }
177 /* ARP periodic process every 5s */
178 if (localtime - arp_timer >= ARP_TMR_INTERVAL)
179 {
180 arp_timer = localtime;
181 etharp_tmr();
182 }
183
184#if LWIP_DHCP
185 /* Fine DHCP periodic process every 500ms */
186 if (localtime - dhcp_fine_timer >= DHCP_FINE_TIMER_MSECS)
187 {
188 dhcp_fine_timer = localtime;
189 dhcp_fine_tmr();
190 }
191 /* DHCP Coarse periodic process every 60s */
192 if (localtime - dhcp_coarse_timer >= DHCP_COARSE_TIMER_MSECS)
193 {
194 dhcp_coarse_timer = localtime;
195 dhcp_coarse_tmr();
196 }
197#endif
198
199#if LWIP_DNS
200
201 if ((localtime - dns_timer) >= DNS_TMR_INTERVAL)
202 {
203 dns_timer = localtime;
204 dns_tmr();
205 }
206#endif
207
208#if (LINK_DETECTION > 0)
209 /* link detection process every 500 ms */
210 if (localtime - link_timer >= 500)
211 {
212 link_timer = localtime;
213 ethernetif_set_link(&netif);
214 }
215#endif
216}
217
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
local_mask
static uint8_t local_mask[(4)]
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:74
link_timer
volatile uint32_t link_timer
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:62
local_gw
static uint8_t local_gw[(4)]
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:73
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:144
ADDR_LENGTH
#define ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:55
arp_timer
volatile uint32_t arp_timer
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:61
MAC_ADDR_LENGTH
#define MAC_ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:54
SYSTEMTICK_PERIOD_MS
#define SYSTEMTICK_PERIOD_MS
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:56
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:49
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
tcp_timer
volatile uint32_t tcp_timer
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:60
local_ip
static uint8_t local_ip[(4)]
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:72
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:85
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:158
mac_address
static uint8_t mac_address[(6)]
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:67
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:168


AT32F435/437 Firmwary Library: at32_emac.h File Reference

  • emac
  • http_server
  • inc
Macros | Functions
project/at_start_f437/examples/emac/http_server/inc/at32_emac.h File Reference

header file of emac config program. More...

#include "at32f435_437.h"
#include "netif.h"

Go to the source code of this file.

Macros

#define | RX_REMAP (1)
#define | CRYSTAL_ON_PHY (0)
#define | RMII_MODE
#define | DM9162
#define | LINK_DETECTION (1)
#define | PHY_ADDRESS (0x03)
#define | PHY_CONTROL_REG (0x00)
#define | PHY_STATUS_REG (0x01)
#define | PHY_SPECIFIED_CS_REG (0x11)
#define | PHY_AUTO_NEGOTIATION_BIT (0x1000)
#define | PHY_LOOPBACK_BIT (0x4000)
#define | PHY_RESET_BIT (0x8000)
#define | PHY_LINKED_STATUS_BIT (0x0004)
#define | PHY_NEGO_COMPLETE_BIT (0x0020)
#define | PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
#define | PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
#define | PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
#define | PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Detailed Description

header file of emac config program.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/http_server/inc/at32_emac.h.


AT32F435/437 Firmwary Library: at32_emac.h Source File

  • emac
  • http_server
  • inc
project/at_start_f437/examples/emac/http_server/inc/at32_emac.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32_EMAC_H
29#define __AT32_EMAC_H
30
31#ifdef __cplusplus
32 extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37#include "netif.h"
38
47#define RX_REMAP (1)
48#define CRYSTAL_ON_PHY (0)
49
50//#define MII_MODE
51#define RMII_MODE
52
53#define DM9162
54//#define DP83848
55
56#define LINK_DETECTION (1)
58#if defined (DM9162)
59 #define PHY_ADDRESS (0x03)
60 #define PHY_CONTROL_REG (0x00)
61 #define PHY_STATUS_REG (0x01)
62 #define PHY_SPECIFIED_CS_REG (0x11)
63 /* phy control register */
64 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
65 #define PHY_LOOPBACK_BIT (0x4000)
66 #define PHY_RESET_BIT (0x8000)
67 /* phy status register */
68 #define PHY_LINKED_STATUS_BIT (0x0004)
69 #define PHY_NEGO_COMPLETE_BIT (0x0020)
70 /* phy specified control/status register */
71 #define PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
72 #define PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
73 #define PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
74 #define PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)
75#elif defined (DP83848)
76 #define PHY_ADDRESS (0x01)
77 #define PHY_CONTROL_REG (0x00)
78 #define PHY_STATUS_REG (0x01)
79 #define PHY_SPECIFIED_CS_REG (0x10)
80 /* phy control register */
81 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
82 #define PHY_LOOPBACK_BIT (0x4000)
83 #define PHY_RESET_BIT (0x8000)
84 /* phy status register */
85 #define PHY_LINKED_STATUS_BIT (0x0004)
86 #define PHY_NEGO_COMPLETE_BIT (0x0020)
88 #define PHY_DUPLEX_MODE (0x0004)
89 #define PHY_SPEED_MODE (0x0002)
90#endif
91
92 error_status emac_system_init(void);
93void emac_nvic_configuration(void);
94void emac_pins_configuration(void);
95 error_status emac_layer2_configuration(void);
96void static reset_phy(void);
97 error_status emac_phy_register_reset(void);
98 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed);
99 error_status emac_phy_init(emac_control_config_type *control_para);
100
101uint16_t link_update(void);
102void ethernetif_set_link(void const *argument);
103void ethernetif_notify_conn_changed(struct netif *netif);
104void ethernetif_update_config(struct netif *netif);
105void emac_tmr_init(void);
106
115#ifdef __cplusplus
116}
117#endif
118
119#endif
at32f435_437.h
at32f435_437 header file
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:455
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:80
reset_phy
static void reset_phy(void)
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:525
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:291
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:472
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:205
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:489
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:552
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:576
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:70
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:337
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
error_status
error_status
Definition: at32f435_437.h:380
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • emac
  • http_server
  • inc
project/at_start_f437/examples/emac/http_server/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • emac
  • http_server
  • inc
project/at_start_f437/examples/emac/http_server/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • emac
  • http_server
  • inc
project/at_start_f437/examples/emac/http_server/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: fsdata.h File Reference

  • emac
  • http_server
  • inc
project/at_start_f437/examples/emac/http_server/inc/fsdata.h File Reference
#include "lwip/apps/httpd_opts.h"
#include "lwip/apps/fs.h"

Go to the source code of this file.


AT32F435/437 Firmwary Library: fsdata.h Source File

  • emac
  • http_server
  • inc
project/at_start_f437/examples/emac/http_server/inc/fsdata.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
21 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
25 * OF SUCH DAMAGE.
26 *
27 * This file is part of the lwIP TCP/IP stack.
28 *
29 * Author: Adam Dunkels <adam@sics.se>
30 *
31 */
32#ifndef LWIP_FSDATA_H
33#define LWIP_FSDATA_H
34
35#include "lwip/apps/httpd_opts.h"
36#include "lwip/apps/fs.h"
37
38#ifdef __cplusplus
39 extern "C" {
40#endif
41
42/* THIS FILE IS DEPRECATED AND WILL BE REMOVED IN THE FUTURE */
43/* content was moved to fs.h to simplify #include structure */
44
45#ifdef __cplusplus
46}
47#endif
48
49#endif /* LWIP_FSDATA_H */


AT32F435/437 Firmwary Library: lwipopts.h File Reference

  • emac
  • http_server
  • inc
Macros
project/at_start_f437/examples/emac/http_server/inc/lwipopts.h File Reference

Go to the source code of this file.

Macros

#define | LWIP_IPV4 1
#define | NO_SYS 1
#define | SYS_LIGHTWEIGHT_PROT 0
#define | LWIP_NETCONN !NO_SYS
#define | LWIP_SOCKET !NO_SYS
#define | LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
#define | LWIP_NETBUF_RECVINFO 1
#define | LWIP_HAVE_LOOPIF 1
#define | LWIP_NETIF_LINK_CALLBACK 1
#define | LWIP_DNS 1
#define | DNS_DOES_NAME_CHECK 1
#define | LWIP_DHCP 0
#define | TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
#define | MEM_ALIGNMENT 4
#define | MEM_SIZE (20*1024)
#define | TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
#define | MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
#define | TCP_SND_BUF (2 * TCP_MSS)
#define | TCP_WND (2 * TCP_MSS)
#define | LWIP_WND_SCALE 0
#define | TCP_RCV_SCALE 0
#define | PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
#define | PBUF_POOL_BUFSIZE 1500
#define | LWIP_TCP 1
#define | TCP_TTL 255
#define | LWIP_IGMP 1
#define | LWIP_MDNS_RESPONDER 1
#define | LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
#define | ETHARP_SUPPORT_STATIC_ENTRIES 1
#define | MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
#define | MIB2_STATS 1
#define | LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */

Macro Definition Documentation

◆ DNS_DOES_NAME_CHECK

#define DNS_DOES_NAME_CHECK 1

Definition at line 54 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ ETHARP_SUPPORT_STATIC_ENTRIES

#define ETHARP_SUPPORT_STATIC_ENTRIES 1

Definition at line 90 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_DHCP

#define LWIP_DHCP 0

Definition at line 58 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_DNS

#define LWIP_DNS 1

Definition at line 53 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_HAVE_LOOPIF

#define LWIP_HAVE_LOOPIF 1

Definition at line 51 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_IGMP

#define LWIP_IGMP 1

Definition at line 85 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_IPV4

#define LWIP_IPV4 1

Definition at line 37 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_MDNS_RESPONDER

#define LWIP_MDNS_RESPONDER 1

Definition at line 86 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_MEM_ILLEGAL_FREE

#define LWIP_MEM_ILLEGAL_FREE ( msg ) /* to nothing */

Definition at line 101 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_NETBUF_RECVINFO

#define LWIP_NETBUF_RECVINFO 1

Definition at line 50 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_NETCONN

#define LWIP_NETCONN !NO_SYS

Definition at line 47 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_NETCONN_FULLDUPLEX

#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET

Definition at line 49 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_NETIF_LINK_CALLBACK

#define LWIP_NETIF_LINK_CALLBACK 1

Definition at line 52 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_NUM_NETIF_CLIENT_DATA

#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)

Definition at line 87 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_SOCKET

#define LWIP_SOCKET !NO_SYS

Definition at line 48 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_TCP

#define LWIP_TCP 1

Definition at line 81 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ LWIP_WND_SCALE

#define LWIP_WND_SCALE 0

Definition at line 73 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ MEM_ALIGNMENT

#define MEM_ALIGNMENT 4

Definition at line 67 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ MEM_SIZE

#define MEM_SIZE (20*1024)

Definition at line 68 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ MEMP_NUM_SYS_TIMEOUT

#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)

Definition at line 92 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ MEMP_NUM_TCP_SEG

#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN

Definition at line 70 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ MIB2_STATS

#define MIB2_STATS 1

Definition at line 95 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ NO_SYS

#define NO_SYS 1

Definition at line 45 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ PBUF_POOL_BUFSIZE

#define PBUF_POOL_BUFSIZE 1500

Definition at line 77 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ PBUF_POOL_SIZE

#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */

Definition at line 75 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ SYS_LIGHTWEIGHT_PROT

#define SYS_LIGHTWEIGHT_PROT 0

Definition at line 46 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ TCP_MSS

#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */

Definition at line 63 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ TCP_RCV_SCALE

#define TCP_RCV_SCALE 0

Definition at line 74 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ TCP_SND_BUF

#define TCP_SND_BUF (2 * TCP_MSS)

Definition at line 71 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ TCP_SND_QUEUELEN

#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS

Definition at line 69 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ TCP_TTL

#define TCP_TTL 255

Definition at line 82 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.

◆ TCP_WND

#define TCP_WND (2 * TCP_MSS)

Definition at line 72 of file project/at_start_f437/examples/emac/http_server/inc/lwipopts.h.


AT32F435/437 Firmwary Library: lwipopts.h Source File

  • emac
  • http_server
  • inc
project/at_start_f437/examples/emac/http_server/inc/lwipopts.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
21 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
25 * OF SUCH DAMAGE.
26 *
27 * This file is part of the lwIP TCP/IP stack.
28 *
29 * Author: Simon Goldschmidt
30 *
31 */
32#ifndef LWIP_HDR_LWIPOPTS_H
33#define LWIP_HDR_LWIPOPTS_H
34
35//#define LWIP_TESTMODE 0
36
37#define LWIP_IPV4 1
38//#define LWIP_TIMERS 0
39
40//#define LWIP_CHECKSUM_ON_COPY 1
41//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK 1
42//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL(printfmsg) LWIP_ASSERT("TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL", 0)
43
44/* We link to special sys_arch.c (for basic non-waiting API layers unit tests) */
45#define NO_SYS 1
46#define SYS_LIGHTWEIGHT_PROT 0
47#define LWIP_NETCONN !NO_SYS
48#define LWIP_SOCKET !NO_SYS
49#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
50#define LWIP_NETBUF_RECVINFO 1
51#define LWIP_HAVE_LOOPIF 1
52#define LWIP_NETIF_LINK_CALLBACK 1
53#define LWIP_DNS 1
54#define DNS_DOES_NAME_CHECK 1
55//#define TCPIP_THREAD_TEST
56
57/* Enable DHCP to test it, disable UDP checksum to easier inject packets */
58#define LWIP_DHCP 0
59
60/* Minimal changes to opt.h required for tcp unit tests: */
61/* TCP Maximum segment size. */
62
63#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
64/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
65 lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
66 byte alignment -> define MEM_ALIGNMENT to 2. */
67#define MEM_ALIGNMENT 4
68#define MEM_SIZE (20*1024)
69#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
70#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
71#define TCP_SND_BUF (2 * TCP_MSS)
72#define TCP_WND (2 * TCP_MSS)
73#define LWIP_WND_SCALE 0
74#define TCP_RCV_SCALE 0
75#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
76/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
77#define PBUF_POOL_BUFSIZE 1500
78//#define TCP_QUEUE_OOSEQ 0
79
80/* ---------- TCP options ---------- */
81#define LWIP_TCP 1
82#define TCP_TTL 255
83
84/* Enable IGMP and MDNS for MDNS tests */
85#define LWIP_IGMP 1
86#define LWIP_MDNS_RESPONDER 1
87#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
88
89/* Minimal changes to opt.h required for etharp unit tests: */
90#define ETHARP_SUPPORT_STATIC_ENTRIES 1
91
92#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
93
94/* MIB2 stats are required to check IPv4 reassembly results */
95#define MIB2_STATS 1
96
97/* netif tests want to test this, so enable: */
98//#define LWIP_NETIF_EXT_STATUS_CALLBACK 1
99
100/* Check lwip_stats.mem.illegal instead of asserting */
101#define LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */
102
103#endif /* LWIP_HDR_LWIPOPTS_H */


AT32F435/437 Firmwary Library: netconf.h File Reference

  • emac
  • http_server
  • inc
Functions
project/at_start_f437/examples/emac/http_server/inc/netconf.h File Reference

This file contains all the functions prototypes for the netconf.c file. More...

Go to the source code of this file.

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Detailed Description

This file contains all the functions prototypes for the netconf.c file.

Version
v2.0.9
Date
2022-06-28
        Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/http_server/inc/netconf.h.


AT32F435/437 Firmwary Library: netconf.h Source File

  • emac
  • http_server
  • inc
project/at_start_f437/examples/emac/http_server/inc/netconf.h
Go to the documentation of this file.
1
28/* Define to prevent recursive inclusion -------------------------------------*/
29#ifndef __NETCONF_H
30#define __NETCONF_H
31
32#ifdef __cplusplus
33 extern "C" {
34#endif
35
47/* Includes ------------------------------------------------------------------*/
48void tcpip_stack_init(void);
49void lwip_pkt_handle(void);
50void time_update(void);
51void lwip_periodic_handle(volatile uint32_t localtime);
52
53
54#ifdef __cplusplus
55}
56#endif
57
65#endif /* __NETCONF_H */
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164


AT32F435/437 Firmwary Library: at32_emac.c File Reference

  • emac
  • http_server
  • src
Functions | Variables
project/at_start_f437/examples/emac/http_server/src/at32_emac.c File Reference

emac config program More...

#include "at32f435_437_board.h"
#include "lwip/dhcp.h"
#include "at32_emac.h"

Go to the source code of this file.

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
reset layer 1 More...
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Variables

emac_control_config_type mac_control_para

Detailed Description

emac config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/http_server/src/at32_emac.c.

Function Documentation

◆ reset_phy()

static void reset_phy ( void )
static

reset layer 1

Parameters
none
Return values
none

Definition at line 262 of file project/at_start_f437/examples/emac/http_server/src/at32_emac.c.

Referenced by emac_layer2_configuration().


AT32F435/437 Firmwary Library: at32_emac.c Source File

  • emac
  • http_server
  • src
project/at_start_f437/examples/emac/http_server/src/at32_emac.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_board.h"
29#include "lwip/dhcp.h"
30#include "at32_emac.h"
31
40 emac_control_config_type mac_control_para;
41
47 error_status emac_system_init(void)
48{
49 error_status status;
50
51 emac_nvic_configuration();
52
53 /* emac periph clock enable */
54 crm_periph_clock_enable(CRM_EMAC_PERIPH_CLOCK, TRUE);
55 crm_periph_clock_enable(CRM_EMACTX_PERIPH_CLOCK, TRUE);
56 crm_periph_clock_enable(CRM_EMACRX_PERIPH_CLOCK, TRUE);
57
58 emac_pins_configuration();
59 status = emac_layer2_configuration();
60 emac_tmr_init();
61
62 return status;
63}
64
70void emac_nvic_configuration(void)
71{
72 nvic_irq_enable(EMAC_IRQn, 1, 0);
73}
74
80void emac_pins_configuration(void)
81{
82 gpio_init_type gpio_init_struct = {0};
83
84 /* emac pins clock enable */
85 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
87 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
88 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
89 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
90 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
91
92 /* pa2 -> mdio */
93 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_11);
94 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
95 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
96 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
97 gpio_init_struct.gpio_pins = GPIO_PINS_2;
98 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
99 gpio_init(GPIOA, &gpio_init_struct);
100
101 /* pc1 -> mdc */
102 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE1, GPIO_MUX_11);
103 gpio_init_struct.gpio_pins = GPIO_PINS_1;
104 gpio_init(GPIOC, &gpio_init_struct);
105
106 #ifdef MII_MODE
107 /*
108 pb12 -> tx_d0
109 pb13 -> tx_d1
110 pc2 -> tx_d2
111 pb8 -> tx_d3
112 pb11 -> tx_en
113 pc3 -> tx_clk
114 */
115 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_11);
116 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_11);
117 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_11);
118 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_11);
119 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_11 | GPIO_PINS_12 | GPIO_PINS_13;
120 gpio_init(GPIOB, &gpio_init_struct);
121
122 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_11);
123 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE3, GPIO_MUX_11);
124 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
125 gpio_init(GPIOC, &gpio_init_struct);
126
127 /*
128 pd8 -> rx_dv
129 pd9 -> rx_d0
130 pd10 -> rx_d1
131 pd11 -> rx_d2
132 pd12 -> rx_d3
133 */
134 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
135 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
136 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
137 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE11, GPIO_MUX_11);
138 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE12, GPIO_MUX_11);
139 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12;
140 gpio_init(GPIOD, &gpio_init_struct);
141
142 /*
143 pa1 -> rx_clk
144 pa0 -> crs
145 pa3 -> col
146 pb10 -> rx_er
147 */
148 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_11);
149 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
150 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_11);
151 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_3;
152 gpio_init(GPIOA, &gpio_init_struct);
153
154 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_11);
155 gpio_init_struct.gpio_pins = GPIO_PINS_10;
156 gpio_init(GPIOB, &gpio_init_struct);
157 #endif /* MII_MODE */
158
159 #ifdef RMII_MODE
160 /*
161 pb12 -> tx_d0
162 pb13 -> tx_d1
163 pb11 -> tx_en
164 */
165 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE11, GPIO_MUX_11);
166 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE13, GPIO_MUX_11);
167 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE14, GPIO_MUX_11);
168 gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_13 | GPIO_PINS_14;
169 gpio_init(GPIOG, &gpio_init_struct);
170
171 /*
172 pd8 -> rx_dv
173 pd9 -> rx_d0
174 pd10 -> rx_d1
175 */
176 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
177 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
178 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
179 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10;
180 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
181 gpio_init(GPIOD, &gpio_init_struct);
182
183
184 #endif /* RMII_MODE */
185 /*
186 pa1 -> ref_clk
187 */
188 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
189 gpio_init_struct.gpio_pins = GPIO_PINS_1;
190 gpio_init(GPIOA, &gpio_init_struct);
191
192 #if !CRYSTAL_ON_PHY
193 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_0);
194 gpio_init_struct.gpio_pins = GPIO_PINS_8;
195 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
196 gpio_init(GPIOA, &gpio_init_struct);
197 #endif
198}
199
205 error_status emac_layer2_configuration(void)
206{
207 emac_dma_config_type dma_control_para;
208 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
209 #ifdef MII_MODE
210 scfg_emac_interface_set(SCFG_EMAC_SELECT_MII);
211 #elif defined RMII_MODE
212 scfg_emac_interface_set(SCFG_EMAC_SELECT_RMII);
213 #endif
214 crm_clock_out1_set(CRM_CLKOUT1_PLL);
215 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_5, CRM_CLKOUT_DIV2_2);
216
217 /* reset phy */
218 reset_phy();
219 /* reset emac ahb bus */
220 emac_reset();
221
222 /* software reset emac dma */
223 emac_dma_software_reset_set();
224
225 while(emac_dma_software_reset_get() == SET);
226
227 emac_control_para_init(&mac_control_para);
228
229 mac_control_para.auto_nego = EMAC_AUTO_NEGOTIATION_ON;
230
231 if(emac_phy_init(&mac_control_para) == ERROR)
232 {
233 return ERROR;
234 }
235
236
237 emac_dma_para_init(&dma_control_para);
238
239 dma_control_para.rsf_enable = TRUE;
240 dma_control_para.tsf_enable = TRUE;
241 dma_control_para.osf_enable = TRUE;
242 dma_control_para.aab_enable = TRUE;
243 dma_control_para.usp_enable = TRUE;
244 dma_control_para.fb_enable = TRUE;
245 dma_control_para.flush_rx_disable = TRUE;
246 dma_control_para.rx_dma_pal = EMAC_DMA_PBL_32;
247 dma_control_para.tx_dma_pal = EMAC_DMA_PBL_32;
248 dma_control_para.priority_ratio = EMAC_DMA_2_RX_1_TX;
249
250 emac_dma_config(&dma_control_para);
251 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_NORMAL_SUMMARY, TRUE);
252 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_RX, TRUE);
253
254 return SUCCESS;
255}
256
262void static reset_phy(void)
263{
264 gpio_init_type gpio_init_struct = {0};
265 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
266 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
267 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE8, GPIO_MUX_0);
268 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
269 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
270 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
271 gpio_init_struct.gpio_pins = GPIO_PINS_15;
272 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
273 gpio_init(GPIOE, &gpio_init_struct);
274
275 gpio_init_struct.gpio_pins = GPIO_PINS_15;
276 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
277 gpio_init(GPIOG, &gpio_init_struct);
278 gpio_bits_reset(GPIOG, GPIO_PINS_15);
279
280 gpio_bits_reset(GPIOE, GPIO_PINS_15);
281 delay_ms(2);
282 gpio_bits_set(GPIOE, GPIO_PINS_15);
283 delay_ms(2);
284}
285
291 error_status emac_phy_register_reset(void)
292{
293 uint16_t data = 0;
294 uint32_t timeout = 0;
295 uint32_t i = 0;
296
297 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_RESET_BIT) == ERROR)
298 {
299 return ERROR;
300 }
301
302 for(i = 0; i < 0x000FFFFF; i++);
303
304 do
305 {
306 timeout++;
307 if(emac_phy_register_read(PHY_ADDRESS, PHY_CONTROL_REG, &data) == ERROR)
308 {
309 return ERROR;
310 }
311 } while((data & PHY_RESET_BIT) && (timeout < PHY_TIMEOUT));
312
313 for(i = 0; i < 0x00FFFFF; i++);
314 if(timeout == PHY_TIMEOUT)
315 {
316 return ERROR;
317 }
318 return SUCCESS;
319}
320
337 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
338{
339 uint16_t data = 0;
340 uint32_t timeout = 0;
341 if(nego == EMAC_AUTO_NEGOTIATION_ON)
342 {
343 do
344 {
345 timeout++;
346 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
347 {
348 return ERROR;
349 }
350 } while(!(data & PHY_LINKED_STATUS_BIT) && (timeout < PHY_TIMEOUT));
351
352 if(timeout == PHY_TIMEOUT)
353 {
354 return ERROR;
355 }
356
357 timeout = 0;
358
359 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_AUTO_NEGOTIATION_BIT) == ERROR)
360 {
361 return ERROR;
362 }
363
364
365 do
366 {
367 timeout++;
368 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
369 {
370 return ERROR;
371 }
372 } while(!(data & PHY_NEGO_COMPLETE_BIT) && (timeout < PHY_TIMEOUT));
373
374 if(timeout == PHY_TIMEOUT)
375 {
376 return ERROR;
377 }
378
379 if(emac_phy_register_read(PHY_ADDRESS, PHY_SPECIFIED_CS_REG, &data) == ERROR)
380 {
381 return ERROR;
382 }
383 #ifdef DM9162
384 if(data & PHY_FULL_DUPLEX_100MBPS_BIT)
385 {
386 emac_fast_speed_set(EMAC_SPEED_100MBPS);
387 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
388 }
389 else if(data & PHY_HALF_DUPLEX_100MBPS_BIT)
390 {
391 emac_fast_speed_set(EMAC_SPEED_100MBPS);
392 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
393 }
394 else if(data & PHY_FULL_DUPLEX_10MBPS_BIT)
395 {
396 emac_fast_speed_set(EMAC_SPEED_10MBPS);
397 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
398 }
399 else if(data & PHY_HALF_DUPLEX_10MBPS_BIT)
400 {
401 emac_fast_speed_set(EMAC_SPEED_10MBPS);
402 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
403 }
404 #else
405 if(data & PHY_DUPLEX_MODE)
406 {
407 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
408 }
409 else
410 {
411 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
412 }
413 if(data & PHY_SPEED_MODE)
414 {
415 emac_fast_speed_set(EMAC_SPEED_10MBPS);
416 }
417 else
418 {
419 emac_fast_speed_set(EMAC_SPEED_100MBPS);
420 }
421 #endif
422 }
423 else
424 {
425 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, (uint16_t)((mode << 8) | (speed << 13))) == ERROR)
426 {
427 return ERROR;
428 }
429 if(speed == EMAC_SPEED_100MBPS)
430 {
431 emac_fast_speed_set(EMAC_SPEED_100MBPS);
432 }
433 else
434 {
435 emac_fast_speed_set(EMAC_SPEED_10MBPS);
436 }
437 if(mode == EMAC_FULL_DUPLEX)
438 {
439 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
440 }
441 else
442 {
443 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
444 }
445 }
446
447 return SUCCESS;
448}
449
455 error_status emac_phy_init(emac_control_config_type *control_para)
456{
457 emac_clock_range_set();
458 if(emac_phy_register_reset() == ERROR)
459 {
460 return ERROR;
461 }
462
463 emac_control_config(control_para);
464 return SUCCESS;
465}
466
472uint16_t link_update(void)
473{
474 uint16_t link_data, link_state;
475 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &link_data) == ERROR)
476 {
477 return ERROR;
478 }
479
480 link_state = (link_data & PHY_LINKED_STATUS_BIT)>>2;
481 return link_state;
482}
483
489void ethernetif_set_link(void const *argument)
490{
491 uint16_t regvalue = 0;
492 struct netif *netif = (struct netif *)argument;
493
494 /* read phy_bsr*/
495 regvalue = link_update();
496
497 if(regvalue > 0)
498 {
499 at32_led_on(LED4);
500 at32_led_off(LED2);
501 }
502 else
503 {
504 at32_led_on(LED2);
505 at32_led_off(LED4);
506 }
507 /* check whether the netif link down and the phy link is up */
508 if(!netif_is_link_up(netif) && (regvalue))
509 {
510 /* network cable is connected */
511 netif_set_link_up(netif);
512 }
513 else if(netif_is_link_up(netif) && (!regvalue))
514 {
515 /* network cable is dis-connected */
516 netif_set_link_down(netif);
517 }
518}
519
525void ethernetif_notify_conn_changed(struct netif *netif)
526{
527 /* note : this is function could be implemented in user file
528 when the callback is needed,
529 */
530
531 if (netif_is_link_up(netif)) {
532 netif_set_up(netif);
533
534#if LWIP_DHCP
535 /* creates a new dhcp client for this interface on the first call.
536 note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
537 the predefined regular intervals after starting the client.
538 you can peek in the netif->dhcp struct for the actual dhcp status.*/
539 dhcp_start(netif);
540#endif
541 }
542 else
543 netif_set_down(netif);
544}
545
552void ethernetif_update_config(struct netif *netif)
553{
554 if(netif_is_link_up(netif))
555 {
556 emac_speed_config(mac_control_para.auto_nego, mac_control_para.duplex_mode, mac_control_para.fast_ethernet_speed);
557
558 delay_ms(300);
559 /* enable mac and dma transmission and reception */
560 emac_start();
561 }
562 else
563 {
564 /* disable mac and dma transmission and reception */
565 emac_stop();
566 }
567
568 ethernetif_notify_conn_changed(netif);
569}
570
576void emac_tmr_init(void)
577{
578 crm_clocks_freq_type crm_clocks_freq_struct = {0};
579 crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
580
581 crm_clocks_freq_get(&crm_clocks_freq_struct);
582 /* tmr1 configuration */
583 /* time base configuration */
584 /* systemclock/24000/100 = 100hz */
585 tmr_base_init(TMR6, 99, (crm_clocks_freq_struct.ahb_freq / 10000) - 1);
586 tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
587
588 /* overflow interrupt enable */
589 tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
590
591 /* tmr1 overflow interrupt nvic init */
592 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
593 nvic_irq_enable(TMR6_DAC_GLOBAL_IRQn, 0, 0);
594 tmr_counter_enable(TMR6, TRUE);
595}
596
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:80
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:205
PHY_AUTO_NEGOTIATION_BIT
#define PHY_AUTO_NEGOTIATION_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:64
PHY_RESET_BIT
#define PHY_RESET_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:66
PHY_ADDRESS
#define PHY_ADDRESS
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:59
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
PHY_FULL_DUPLEX_10MBPS_BIT
#define PHY_FULL_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:73
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:574
PHY_FULL_DUPLEX_100MBPS_BIT
#define PHY_FULL_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:71
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:70
PHY_SPECIFIED_CS_REG
#define PHY_SPECIFIED_CS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:62
PHY_CONTROL_REG
#define PHY_CONTROL_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:60
PHY_NEGO_COMPLETE_BIT
#define PHY_NEGO_COMPLETE_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:69
PHY_HALF_DUPLEX_100MBPS_BIT
#define PHY_HALF_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:72
PHY_STATUS_REG
#define PHY_STATUS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:61
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:335
PHY_LINKED_STATUS_BIT
#define PHY_LINKED_STATUS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:68
PHY_HALF_DUPLEX_10MBPS_BIT
#define PHY_HALF_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:74
mac_control_para
emac_control_config_type mac_control_para
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:40
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR6_PERIPH_CLOCK
@ CRM_TMR6_PERIPH_CLOCK
Definition: at32f435_437_crm.h:132
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_GPIOE_PERIPH_CLOCK
@ CRM_GPIOE_PERIPH_CLOCK
Definition: at32f435_437_crm.h:109
CRM_CLKOUT_DIV1_5
@ CRM_CLKOUT_DIV1_5
Definition: at32f435_437_crm.h:729
CRM_CLKOUT_DIV2_2
@ CRM_CLKOUT_DIV2_2
Definition: at32f435_437_crm.h:738
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
emac_dma_software_reset_set
void emac_dma_software_reset_set(void)
reset emac dma
Definition: at32f435_437_emac.c:156
emac_control_para_init
void emac_control_para_init(emac_control_config_type *control_para)
initialize emac control structure
Definition: at32f435_437_emac.c:70
emac_dma_software_reset_get
flag_status emac_dma_software_reset_get(void)
get emac dma reset status
Definition: at32f435_437_emac.c:166
emac_control_config
void emac_control_config(emac_control_config_type *control_struct)
configure emac control setting.
Definition: at32f435_437_emac.c:136
emac_phy_register_read
error_status emac_phy_register_read(uint8_t address, uint8_t reg, uint16_t *data)
read phy data
Definition: at32f435_437_emac.c:262
emac_reset
void emac_reset(void)
deinitialize the emac peripheral registers to their default reset values.
Definition: at32f435_437_emac.c:59
emac_start
void emac_start(void)
enable emac and dma reception/transmission
Definition: at32f435_437_emac.c:183
emac_duplex_mode_set
void emac_duplex_mode_set(emac_duplex_type duplex_mode)
set duplex mode.
Definition: at32f435_437_emac.c:463
emac_fast_speed_set
void emac_fast_speed_set(emac_speed_type speed)
set mac fast emac speed.
Definition: at32f435_437_emac.c:450
emac_clock_range_set
void emac_clock_range_set(void)
according to hclk to set mdc clock frequency.
Definition: at32f435_437_emac.c:93
emac_dma_interrupt_enable
void emac_dma_interrupt_enable(emac_dma_interrupt_type it, confirm_state new_state)
enable dma interrupt
Definition: at32f435_437_emac.c:1497
emac_dma_para_init
void emac_dma_para_init(emac_dma_config_type *control_para)
init emac dma parameters
Definition: at32f435_437_emac.c:1073
emac_phy_register_write
error_status emac_phy_register_write(uint8_t address, uint8_t reg, uint16_t data)
write phy data.
Definition: at32f435_437_emac.c:232
emac_dma_config
void emac_dma_config(emac_dma_config_type *control_para)
configure emac dma
Definition: at32f435_437_emac.c:1099
emac_stop
void emac_stop(void)
stop emac and dma reception/transmission
Definition: at32f435_437_emac.c:206
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
EMAC_HALF_DUPLEX
@ EMAC_HALF_DUPLEX
Definition: at32f435_437_emac.h:303
EMAC_FULL_DUPLEX
@ EMAC_FULL_DUPLEX
Definition: at32f435_437_emac.h:304
EMAC_DMA_PBL_32
@ EMAC_DMA_PBL_32
Definition: at32f435_437_emac.h:427
EMAC_SPEED_10MBPS
@ EMAC_SPEED_10MBPS
Definition: at32f435_437_emac.h:312
EMAC_SPEED_100MBPS
@ EMAC_SPEED_100MBPS
Definition: at32f435_437_emac.h:313
EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
@ EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
Definition: at32f435_437_emac.h:527
EMAC_DMA_INTERRUPT_RX
@ EMAC_DMA_INTERRUPT_RX
Definition: at32f435_437_emac.h:519
EMAC_AUTO_NEGOTIATION_ON
@ EMAC_AUTO_NEGOTIATION_ON
Definition: at32f435_437_emac.h:284
EMAC_DMA_2_RX_1_TX
@ EMAC_DMA_2_RX_1_TX
Definition: at32f435_437_emac.h:412
PHY_TIMEOUT
#define PHY_TIMEOUT
Definition: at32f435_437_emac.h:47
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_0
@ GPIO_MUX_0
Definition: at32f435_437_gpio.h:156
GPIO_MUX_11
@ GPIO_MUX_11
Definition: at32f435_437_gpio.h:167
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
GPIOE
#define GPIOE
Definition: at32f435_437_gpio.h:525
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_emac_interface_set
void scfg_emac_interface_set(scfg_emac_interface_type mode)
scfg emac interface set
Definition: at32f435_437_scfg.c:113
SCFG_EMAC_SELECT_MII
@ SCFG_EMAC_SELECT_MII
Definition: at32f435_437_scfg.h:139
SCFG_EMAC_SELECT_RMII
@ SCFG_EMAC_SELECT_RMII
Definition: at32f435_437_scfg.h:140
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
TMR6_DAC_GLOBAL_IRQn
@ TMR6_DAC_GLOBAL_IRQn
Definition: at32f435_437.h:202
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
reset_phy
static void reset_phy(void)
reset layer 1
Definition: project/at_start_f437/examples/emac/http_server/src/at32_emac.c:262
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::ahb_freq
uint32_t ahb_freq
Definition: at32f435_437_crm.h:790
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588
emac_control_config_type::auto_nego
emac_auto_negotiation_type auto_nego
Definition: at32f435_437_emac.h:589
emac_control_config_type::fast_ethernet_speed
emac_speed_type fast_ethernet_speed
Definition: at32f435_437_emac.h:598
emac_control_config_type::duplex_mode
emac_duplex_type duplex_mode
Definition: at32f435_437_emac.h:595
emac_dma_config_type
ethernet mac dma config type
Definition: at32f435_437_emac.h:609
emac_dma_config_type::tx_dma_pal
emac_dma_pbl_type tx_dma_pal
Definition: at32f435_437_emac.h:614
emac_dma_config_type::aab_enable
confirm_state aab_enable
Definition: at32f435_437_emac.h:610
emac_dma_config_type::rx_dma_pal
emac_dma_pbl_type rx_dma_pal
Definition: at32f435_437_emac.h:612
emac_dma_config_type::flush_rx_disable
confirm_state flush_rx_disable
Definition: at32f435_437_emac.h:620
emac_dma_config_type::priority_ratio
emac_dma_rx_tx_ratio_type priority_ratio
Definition: at32f435_437_emac.h:617
emac_dma_config_type::osf_enable
confirm_state osf_enable
Definition: at32f435_437_emac.h:626
emac_dma_config_type::usp_enable
confirm_state usp_enable
Definition: at32f435_437_emac.h:611
emac_dma_config_type::rsf_enable
confirm_state rsf_enable
Definition: at32f435_437_emac.h:619
emac_dma_config_type::tsf_enable
confirm_state tsf_enable
Definition: at32f435_437_emac.h:621
emac_dma_config_type::fb_enable
confirm_state fb_enable
Definition: at32f435_437_emac.h:613
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • emac
  • http_server
  • src
Functions
project/at_start_f437/examples/emac/http_server/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/http_server/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • emac
  • http_server
  • src
project/at_start_f437/examples/emac/http_server/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 125, 1, CRM_PLL_FR_4);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/emac/http_server/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_4
@ CRM_PLL_FR_4
Definition: at32f435_437_crm.h:548
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • emac
  • http_server
  • src
Functions
project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "netconf.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR6_DAC_GLOBAL_IRQHandler (void)
this function handles timer6 overflow handler. More...
void | EMAC_IRQHandler (void)
this function handles emac handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • emac
  • http_server
  • src
project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "netconf.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void TMR6_DAC_GLOBAL_IRQHandler(void)
142{
143 if(tmr_flag_get(TMR6, TMR_OVF_FLAG) != RESET)
144 {
145 /* Update the local_time by adding SYSTEMTICK_PERIOD_MS each SysTick interrupt */
146 time_update();
147 tmr_flag_clear(TMR6, TMR_OVF_FLAG);
148 }
149}
150
156void EMAC_IRQHandler(void)
157{
158 /* handles all the received frames */
159 while(emac_received_packet_size_get() != 0)
160 {
161 lwip_pkt_handle();
162 }
163
164 /* clear the emac dma rx it pending bits */
165 emac_dma_flag_clear(EMAC_DMA_RI_FLAG);
166 emac_dma_flag_clear(EMAC_DMA_NIS_FLAG);
167}
168
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c:92
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c:53
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c:66
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c:105
EMAC_IRQHandler
void EMAC_IRQHandler(void)
this function handles emac handler.
Definition: project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c:156
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c:123
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c:44
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c:79
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c:132
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c:114
TMR6_DAC_GLOBAL_IRQHandler
void TMR6_DAC_GLOBAL_IRQHandler(void)
this function handles timer6 overflow handler.
Definition: project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c:141
emac_dma_flag_clear
void emac_dma_flag_clear(uint32_t dma_flag)
clear the emac dma flag.
Definition: at32f435_437_emac.c:2290
emac_received_packet_size_get
uint32_t emac_received_packet_size_get(void)
get the size of received the received packet.
Definition: at32f435_437_emac.c:1044
EMAC_DMA_RI_FLAG
#define EMAC_DMA_RI_FLAG
Definition: at32f435_437_emac.h:264
EMAC_DMA_NIS_FLAG
#define EMAC_DMA_NIS_FLAG
Definition: at32f435_437_emac.h:272
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: fsdata.c File Reference

  • emac
  • http_server
  • src
Macros | Variables
project/at_start_f437/examples/emac/http_server/src/fsdata.c File Reference
#include "lwip/apps/fs.h"
#include "lwip/def.h"

Go to the source code of this file.

Macros

#define | file_NULL (struct fsdata_file *) NULL
#define | FS_FILE_FLAGS_HEADER_INCLUDED 1
#define | FS_FILE_FLAGS_HEADER_PERSISTENT 0
#define | FSDATA_FILE_ALIGNMENT 0
#define | FSDATA_ALIGN_PRE
#define | FSDATA_ALIGN_POST
#define | FS_ROOT file_AT32F437LED_html
#define | FS_NUMFILES 3

Variables

const unsigned char | main_page_name [] = "/AT32F437.html"
const unsigned char | led_page_name [] = "/AT32F437LED.html"
const unsigned char | adc_page_name [] = "/AT32F437ADC.html"
static const unsigned char | data__img_sics_gif []
static const unsigned char | data__404_html []
static const unsigned char | data_AT32F437_html []
static const unsigned char | data_AT32F437LED_html []
static const unsigned char | data_AT32F437ADC_html []
const struct fsdata_file | file__img_sics_gif []
const struct fsdata_file | file__404_html []
const struct fsdata_file | file_AT32F437_html []
const struct fsdata_file | file_AT32F437ADC_html []
const struct fsdata_file | file_AT32F437LED_html []

Macro Definition Documentation

◆ file_NULL

#define file_NULL (struct fsdata_file *) NULL

Definition at line 4 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ FS_FILE_FLAGS_HEADER_INCLUDED

#define FS_FILE_FLAGS_HEADER_INCLUDED 1

Definition at line 7 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ FS_FILE_FLAGS_HEADER_PERSISTENT

#define FS_FILE_FLAGS_HEADER_PERSISTENT 0

Definition at line 10 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ FS_NUMFILES

#define FS_NUMFILES 3

Definition at line 515 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ FS_ROOT

#define FS_ROOT file_AT32F437LED_html

Definition at line 514 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ FSDATA_ALIGN_POST

#define FSDATA_ALIGN_POST

Definition at line 21 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ FSDATA_ALIGN_PRE

#define FSDATA_ALIGN_PRE

Definition at line 18 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ FSDATA_FILE_ALIGNMENT

#define FSDATA_FILE_ALIGNMENT 0

Definition at line 15 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

Variable Documentation

◆ adc_page_name

const unsigned char adc_page_name[] = "/AT32F437ADC.html"

Definition at line 32 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ data__404_html

const unsigned char data__404_html[]
static

Definition at line 110 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ data__img_sics_gif

const unsigned char data__img_sics_gif[]
static

Definition at line 34 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ data_AT32F437_html

const unsigned char data_AT32F437_html[]
static

Definition at line 177 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ data_AT32F437ADC_html

const unsigned char data_AT32F437ADC_html[]
static

Definition at line 400 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ data_AT32F437LED_html

const unsigned char data_AT32F437LED_html[]
static

Definition at line 347 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ file__404_html

const struct fsdata_file file__404_html[]
Initial value:
= { {
file__img_sics_gif,
data__404_html,
data__404_html + 12,
sizeof(data__404_html) - 12,
1 | 0 ,
}}
data__404_html
static const unsigned char data__404_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:110
file__img_sics_gif
const struct fsdata_file file__img_sics_gif[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:474

Definition at line 482 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ file__img_sics_gif

const struct fsdata_file file__img_sics_gif[]
Initial value:
= { {
(struct fsdata_file *) NULL ,
data__img_sics_gif,
data__img_sics_gif + 16,
sizeof(data__img_sics_gif) - 16,
1 | 0 ,
}}
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
data__img_sics_gif
static const unsigned char data__img_sics_gif[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:34
fsdata_file
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:37

Definition at line 474 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ file_AT32F437_html

const struct fsdata_file file_AT32F437_html[]
Initial value:
= { {
(struct fsdata_file *) NULL ,
main_page_name,
data_AT32F437_html,
sizeof(data_AT32F437_html),
1 | 0 ,
}}
data_AT32F437_html
static const unsigned char data_AT32F437_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:177
main_page_name
const unsigned char main_page_name[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:30

Definition at line 490 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ file_AT32F437ADC_html

const struct fsdata_file file_AT32F437ADC_html[]
Initial value:
= { {
file_AT32F437_html,
adc_page_name,
data_AT32F437ADC_html,
sizeof(data_AT32F437ADC_html),
1 | 0 ,
}}
data_AT32F437ADC_html
static const unsigned char data_AT32F437ADC_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:400
file_AT32F437_html
const struct fsdata_file file_AT32F437_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:490
adc_page_name
const unsigned char adc_page_name[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:32

Definition at line 498 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ file_AT32F437LED_html

const struct fsdata_file file_AT32F437LED_html[]
Initial value:
= { {
file_AT32F437ADC_html,
led_page_name,
data_AT32F437LED_html,
sizeof(data_AT32F437LED_html),
1 | 0 ,
}}
data_AT32F437LED_html
static const unsigned char data_AT32F437LED_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:347
file_AT32F437ADC_html
const struct fsdata_file file_AT32F437ADC_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:498
led_page_name
const unsigned char led_page_name[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:31

Definition at line 506 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ led_page_name

const unsigned char led_page_name[] = "/AT32F437LED.html"

Definition at line 31 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.

◆ main_page_name

const unsigned char main_page_name[] = "/AT32F437.html"

Definition at line 30 of file project/at_start_f437/examples/emac/http_server/src/fsdata.c.


AT32F435/437 Firmwary Library: fsdata.c Source File

  • emac
  • http_server
  • src
project/at_start_f437/examples/emac/http_server/src/fsdata.c
Go to the documentation of this file.
1#include "lwip/apps/fs.h"
2#include "lwip/def.h"
3
4#define file_NULL (struct fsdata_file *) NULL
5
6#ifndef FS_FILE_FLAGS_HEADER_INCLUDED
7#define FS_FILE_FLAGS_HEADER_INCLUDED 1
8#endif
9#ifndef FS_FILE_FLAGS_HEADER_PERSISTENT
10#define FS_FILE_FLAGS_HEADER_PERSISTENT 0
11#endif
12
13/* FSDATA_FILE_ALIGNMENT: 0=off, 1=by variable, 2=by include */
14#ifndef FSDATA_FILE_ALIGNMENT
15#define FSDATA_FILE_ALIGNMENT 0
16#endif
17#ifndef FSDATA_ALIGN_PRE
18#define FSDATA_ALIGN_PRE
19#endif
20#ifndef FSDATA_ALIGN_POST
21#define FSDATA_ALIGN_POST
22#endif
23#if FSDATA_FILE_ALIGNMENT==2
24#include "fsdata_alignment.h"
25#endif
26#if FSDATA_FILE_ALIGNMENT==1
27static const unsigned int dummy_align__img_sics_gif = 0;
28#endif
29
30const unsigned char main_page_name[] = "/AT32F437.html";
31const unsigned char led_page_name[] = "/AT32F437LED.html";
32const unsigned char adc_page_name[] = "/AT32F437ADC.html";
33
34static const unsigned char FSDATA_ALIGN_PRE data__img_sics_gif[] FSDATA_ALIGN_POST = {
35/* /img/sics.gif (14 chars) */
360x2f,0x69,0x6d,0x67,0x2f,0x73,0x69,0x63,0x73,0x2e,0x67,0x69,0x66,0x00,0x00,0x00,
37
38/* HTTP header */
39/* "HTTP/1.0 200 OK
40" (17 bytes) */
410x48,0x54,0x54,0x50,0x2f,0x31,0x2e,0x30,0x20,0x32,0x30,0x30,0x20,0x4f,0x4b,0x0d,
420x0a,
43/* "Server: lwIP/2.0.3d (http://savannah.nongnu.org/projects/lwip)
44" (64 bytes) */
450x53,0x65,0x72,0x76,0x65,0x72,0x3a,0x20,0x6c,0x77,0x49,0x50,0x2f,0x32,0x2e,0x30,
460x2e,0x33,0x64,0x20,0x28,0x68,0x74,0x74,0x70,0x3a,0x2f,0x2f,0x73,0x61,0x76,0x61,
470x6e,0x6e,0x61,0x68,0x2e,0x6e,0x6f,0x6e,0x67,0x6e,0x75,0x2e,0x6f,0x72,0x67,0x2f,
480x70,0x72,0x6f,0x6a,0x65,0x63,0x74,0x73,0x2f,0x6c,0x77,0x69,0x70,0x29,0x0d,0x0a,
49
50/* "Content-Length: 724
51" (18+ bytes) */
520x43,0x6f,0x6e,0x74,0x65,0x6e,0x74,0x2d,0x4c,0x65,0x6e,0x67,0x74,0x68,0x3a,0x20,
530x37,0x32,0x34,0x0d,0x0a,
54/* "Content-Type: image/gif
55
56" (27 bytes) */
570x43,0x6f,0x6e,0x74,0x65,0x6e,0x74,0x2d,0x54,0x79,0x70,0x65,0x3a,0x20,0x69,0x6d,
580x61,0x67,0x65,0x2f,0x67,0x69,0x66,0x0d,0x0a,0x0d,0x0a,
59/* raw file data (724 bytes) */
600x47,0x49,0x46,0x38,0x39,0x61,0x46,0x00,0x22,0x00,0xa5,0x00,0x00,0xd9,0x2b,0x39,
610x6a,0x6a,0x6a,0xbf,0xbf,0xbf,0x93,0x93,0x93,0x0f,0x0f,0x0f,0xb0,0xb0,0xb0,0xa6,
620xa6,0xa6,0x80,0x80,0x80,0x76,0x76,0x76,0x1e,0x1e,0x1e,0x9d,0x9d,0x9d,0x2e,0x2e,
630x2e,0x49,0x49,0x49,0x54,0x54,0x54,0x8a,0x8a,0x8a,0x60,0x60,0x60,0xc6,0xa6,0x99,
640xbd,0xb5,0xb2,0xc2,0xab,0xa1,0xd9,0x41,0x40,0xd5,0x67,0x55,0xc0,0xb0,0xaa,0xd5,
650x5e,0x4e,0xd6,0x50,0x45,0xcc,0x93,0x7d,0xc8,0xa1,0x90,0xce,0x8b,0x76,0xd2,0x7b,
660x65,0xd1,0x84,0x6d,0xc9,0x99,0x86,0x3a,0x3a,0x3a,0x00,0x00,0x00,0xb8,0xb8,0xb8,
670xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
680xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
690xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
700xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
710xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
720xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x2c,0x00,0x00,
730x00,0x00,0x46,0x00,0x22,0x00,0x00,0x06,0xfe,0x40,0x90,0x70,0x48,0x2c,0x1a,0x8f,
740xc8,0xa4,0x72,0xc9,0x6c,0x3a,0x9f,0xd0,0xa8,0x74,0x4a,0xad,0x5a,0xaf,0xd8,0xac,
750x76,0xa9,0x40,0x04,0xbe,0x83,0xe2,0x60,0x3c,0x50,0x20,0x0d,0x8e,0x6f,0x00,0x31,
760x28,0x1c,0x0d,0x07,0xb5,0xc3,0x60,0x75,0x24,0x3e,0xf8,0xfc,0x87,0x11,0x06,0xe9,
770x3d,0x46,0x07,0x0b,0x7a,0x7a,0x7c,0x43,0x06,0x1e,0x84,0x78,0x0b,0x07,0x6e,0x51,
780x01,0x8a,0x84,0x08,0x7e,0x79,0x80,0x87,0x89,0x91,0x7a,0x93,0x0a,0x04,0x99,0x78,
790x96,0x4f,0x03,0x9e,0x79,0x01,0x94,0x9f,0x43,0x9c,0xa3,0xa4,0x05,0x77,0xa3,0xa0,
800x4e,0x98,0x79,0x0b,0x1e,0x83,0xa4,0xa6,0x1f,0x96,0x05,0x9d,0xaa,0x78,0x01,0x07,
810x84,0x04,0x1e,0x1e,0xbb,0xb8,0x51,0x84,0x0e,0x43,0x05,0x07,0x77,0xa5,0x7f,0x42,
820xb1,0xb2,0x01,0x63,0x08,0x0d,0xbb,0x01,0x0c,0x7a,0x0d,0x44,0x0e,0xd8,0xaf,0x4c,
830x05,0x7a,0x04,0x47,0x07,0x07,0xb7,0x80,0xa2,0xe1,0x7d,0x44,0x05,0x01,0x04,0x01,
840xd0,0xea,0x87,0x93,0x4f,0xe0,0x9a,0x49,0xce,0xd8,0x79,0x04,0x66,0x20,0x15,0x10,
850x10,0x11,0x92,0x29,0x80,0xb6,0xc0,0x91,0x15,0x45,0x1e,0x90,0x19,0x71,0x46,0xa8,
860x5c,0x04,0x0e,0x00,0x22,0x4e,0xe8,0x40,0x24,0x9f,0x3e,0x04,0x06,0xa7,0x58,0xd4,
870x93,0xa0,0x1c,0x91,0x3f,0xe8,0xf0,0x88,0x03,0xb1,0x21,0xa2,0x49,0x00,0x19,0x86,
880xfc,0x52,0x44,0xe0,0x01,0x9d,0x29,0x21,0x15,0x25,0x50,0xf7,0x67,0x25,0x1e,0x06,
890xfd,0x4e,0x9a,0xb4,0x90,0xac,0x15,0xfa,0xcb,0x52,0x53,0x1e,0x8c,0xf2,0xf8,0x07,
900x92,0x2d,0x08,0x3a,0x4d,0x12,0x49,0x95,0x49,0xdb,0x14,0x04,0xc4,0x14,0x85,0x29,
910xaa,0xe7,0x01,0x08,0xa4,0x49,0x01,0x14,0x51,0xe0,0x53,0x91,0xd5,0x29,0x06,0x1a,
920x64,0x02,0xf4,0xc7,0x81,0x9e,0x05,0x20,0x22,0x64,0xa5,0x30,0xae,0xab,0x9e,0x97,
930x53,0xd8,0xb9,0xfd,0x50,0xef,0x93,0x02,0x42,0x74,0x34,0xe8,0x9c,0x20,0x21,0xc9,
940x01,0x68,0x78,0xe6,0x55,0x29,0x20,0x56,0x4f,0x4c,0x40,0x51,0x71,0x82,0xc0,0x70,
950x21,0x22,0x85,0xbe,0x4b,0x1c,0x44,0x05,0xea,0xa4,0x01,0xbf,0x22,0xb5,0xf0,0x1c,
960x06,0x51,0x38,0x8f,0xe0,0x22,0xec,0x18,0xac,0x39,0x22,0xd4,0xd6,0x93,0x44,0x01,
970x32,0x82,0xc8,0xfc,0x61,0xb3,0x01,0x45,0x0c,0x2e,0x83,0x30,0xd0,0x0e,0x17,0x24,
980x0f,0x70,0x85,0x94,0xee,0x05,0x05,0x53,0x4b,0x32,0x1b,0x3f,0x98,0xd3,0x1d,0x29,
990x81,0xb0,0xae,0x1e,0x8c,0x7e,0x68,0xe0,0x60,0x5a,0x54,0x8f,0xb0,0x78,0x69,0x73,
1000x06,0xa2,0x00,0x6b,0x57,0xca,0x3d,0x11,0x50,0xbd,0x04,0x30,0x4b,0x3a,0xd4,0xab,
1010x5f,0x1f,0x9b,0x3d,0x13,0x74,0x27,0x88,0x3c,0x25,0xe0,0x17,0xbe,0x7a,0x79,0x45,
1020x0d,0x0c,0xb0,0x8b,0xda,0x90,0xca,0x80,0x06,0x5d,0x17,0x60,0x1c,0x22,0x4c,0xd8,
1030x57,0x22,0x06,0x20,0x00,0x98,0x07,0x08,0xe4,0x56,0x80,0x80,0x1c,0xc5,0xb7,0xc5,
1040x82,0x0c,0x36,0xe8,0xe0,0x83,0x10,0x46,0x28,0xe1,0x84,0x14,0x56,0x68,0xa1,0x10,
1050x41,0x00,0x00,0x3b,};
106
107#if FSDATA_FILE_ALIGNMENT==1
108static const unsigned int dummy_align__404_html = 1;
109#endif
110static const unsigned char FSDATA_ALIGN_PRE data__404_html[] FSDATA_ALIGN_POST = {
111/* /404.html (10 chars) */
1120x2f,0x34,0x30,0x34,0x2e,0x68,0x74,0x6d,0x6c,0x00,0x00,0x00,
113
114/* HTTP header */
115/* "HTTP/1.0 404 File not found
116" (29 bytes) */
1170x48,0x54,0x54,0x50,0x2f,0x31,0x2e,0x30,0x20,0x34,0x30,0x34,0x20,0x46,0x69,0x6c,
1180x65,0x20,0x6e,0x6f,0x74,0x20,0x66,0x6f,0x75,0x6e,0x64,0x0d,0x0a,
119/* "Server: lwIP/2.0.3d (http://savannah.nongnu.org/projects/lwip)
120" (64 bytes) */
1210x53,0x65,0x72,0x76,0x65,0x72,0x3a,0x20,0x6c,0x77,0x49,0x50,0x2f,0x32,0x2e,0x30,
1220x2e,0x33,0x64,0x20,0x28,0x68,0x74,0x74,0x70,0x3a,0x2f,0x2f,0x73,0x61,0x76,0x61,
1230x6e,0x6e,0x61,0x68,0x2e,0x6e,0x6f,0x6e,0x67,0x6e,0x75,0x2e,0x6f,0x72,0x67,0x2f,
1240x70,0x72,0x6f,0x6a,0x65,0x63,0x74,0x73,0x2f,0x6c,0x77,0x69,0x70,0x29,0x0d,0x0a,
125
126/* "Content-Length: 565
127" (18+ bytes) */
1280x43,0x6f,0x6e,0x74,0x65,0x6e,0x74,0x2d,0x4c,0x65,0x6e,0x67,0x74,0x68,0x3a,0x20,
1290x35,0x36,0x35,0x0d,0x0a,
130/* "Content-Type: text/html
131
132" (27 bytes) */
1330x43,0x6f,0x6e,0x74,0x65,0x6e,0x74,0x2d,0x54,0x79,0x70,0x65,0x3a,0x20,0x74,0x65,
1340x78,0x74,0x2f,0x68,0x74,0x6d,0x6c,0x0d,0x0a,0x0d,0x0a,
135/* raw file data (565 bytes) */
1360x3c,0x68,0x74,0x6d,0x6c,0x3e,0x0d,0x0a,0x3c,0x68,0x65,0x61,0x64,0x3e,0x3c,0x74,
1370x69,0x74,0x6c,0x65,0x3e,0x6c,0x77,0x49,0x50,0x20,0x2d,0x20,0x41,0x20,0x4c,0x69,
1380x67,0x68,0x74,0x77,0x65,0x69,0x67,0x68,0x74,0x20,0x54,0x43,0x50,0x2f,0x49,0x50,
1390x20,0x53,0x74,0x61,0x63,0x6b,0x3c,0x2f,0x74,0x69,0x74,0x6c,0x65,0x3e,0x3c,0x2f,
1400x68,0x65,0x61,0x64,0x3e,0x0d,0x0a,0x3c,0x62,0x6f,0x64,0x79,0x20,0x62,0x67,0x63,
1410x6f,0x6c,0x6f,0x72,0x3d,0x22,0x77,0x68,0x69,0x74,0x65,0x22,0x20,0x74,0x65,0x78,
1420x74,0x3d,0x22,0x62,0x6c,0x61,0x63,0x6b,0x22,0x3e,0x0d,0x0a,0x0d,0x0a,0x20,0x20,
1430x20,0x20,0x3c,0x74,0x61,0x62,0x6c,0x65,0x20,0x77,0x69,0x64,0x74,0x68,0x3d,0x22,
1440x31,0x30,0x30,0x25,0x22,0x3e,0x0d,0x0a,0x20,0x20,0x20,0x20,0x20,0x20,0x3c,0x74,
1450x72,0x20,0x76,0x61,0x6c,0x69,0x67,0x6e,0x3d,0x22,0x74,0x6f,0x70,0x22,0x3e,0x3c,
1460x74,0x64,0x20,0x77,0x69,0x64,0x74,0x68,0x3d,0x22,0x38,0x30,0x22,0x3e,0x09,0x20,
1470x20,0x0d,0x0a,0x09,0x20,0x20,0x3c,0x61,0x20,0x68,0x72,0x65,0x66,0x3d,0x22,0x68,
1480x74,0x74,0x70,0x3a,0x2f,0x2f,0x77,0x77,0x77,0x2e,0x73,0x69,0x63,0x73,0x2e,0x73,
1490x65,0x2f,0x22,0x3e,0x3c,0x69,0x6d,0x67,0x20,0x73,0x72,0x63,0x3d,0x22,0x2f,0x69,
1500x6d,0x67,0x2f,0x73,0x69,0x63,0x73,0x2e,0x67,0x69,0x66,0x22,0x0d,0x0a,0x09,0x20,
1510x20,0x62,0x6f,0x72,0x64,0x65,0x72,0x3d,0x22,0x30,0x22,0x20,0x61,0x6c,0x74,0x3d,
1520x22,0x53,0x49,0x43,0x53,0x20,0x6c,0x6f,0x67,0x6f,0x22,0x20,0x74,0x69,0x74,0x6c,
1530x65,0x3d,0x22,0x53,0x49,0x43,0x53,0x20,0x6c,0x6f,0x67,0x6f,0x22,0x3e,0x3c,0x2f,
1540x61,0x3e,0x0d,0x0a,0x09,0x3c,0x2f,0x74,0x64,0x3e,0x3c,0x74,0x64,0x20,0x77,0x69,
1550x64,0x74,0x68,0x3d,0x22,0x35,0x30,0x30,0x22,0x3e,0x09,0x20,0x20,0x0d,0x0a,0x09,
1560x20,0x20,0x3c,0x68,0x31,0x3e,0x6c,0x77,0x49,0x50,0x20,0x2d,0x20,0x41,0x20,0x4c,
1570x69,0x67,0x68,0x74,0x77,0x65,0x69,0x67,0x68,0x74,0x20,0x54,0x43,0x50,0x2f,0x49,
1580x50,0x20,0x53,0x74,0x61,0x63,0x6b,0x3c,0x2f,0x68,0x31,0x3e,0x0d,0x0a,0x09,0x20,
1590x20,0x3c,0x68,0x32,0x3e,0x34,0x30,0x34,0x20,0x2d,0x20,0x50,0x61,0x67,0x65,0x20,
1600x6e,0x6f,0x74,0x20,0x66,0x6f,0x75,0x6e,0x64,0x3c,0x2f,0x68,0x32,0x3e,0x0d,0x0a,
1610x09,0x20,0x20,0x3c,0x70,0x3e,0x0d,0x0a,0x09,0x20,0x20,0x20,0x20,0x53,0x6f,0x72,
1620x72,0x79,0x2c,0x20,0x74,0x68,0x65,0x20,0x70,0x61,0x67,0x65,0x20,0x79,0x6f,0x75,
1630x20,0x61,0x72,0x65,0x20,0x72,0x65,0x71,0x75,0x65,0x73,0x74,0x69,0x6e,0x67,0x20,
1640x77,0x61,0x73,0x20,0x6e,0x6f,0x74,0x20,0x66,0x6f,0x75,0x6e,0x64,0x20,0x6f,0x6e,
1650x20,0x74,0x68,0x69,0x73,0x0d,0x0a,0x09,0x20,0x20,0x20,0x20,0x73,0x65,0x72,0x76,
1660x65,0x72,0x2e,0x20,0x0d,0x0a,0x09,0x20,0x20,0x3c,0x2f,0x70,0x3e,0x0d,0x0a,0x09,
1670x3c,0x2f,0x74,0x64,0x3e,0x3c,0x74,0x64,0x3e,0x0d,0x0a,0x09,0x20,0x20,0x26,0x6e,
1680x62,0x73,0x70,0x3b,0x0d,0x0a,0x09,0x3c,0x2f,0x74,0x64,0x3e,0x3c,0x2f,0x74,0x72,
1690x3e,0x0d,0x0a,0x20,0x20,0x20,0x20,0x20,0x20,0x3c,0x2f,0x74,0x61,0x62,0x6c,0x65,
1700x3e,0x0d,0x0a,0x3c,0x2f,0x62,0x6f,0x64,0x79,0x3e,0x0d,0x0a,0x3c,0x2f,0x68,0x74,
1710x6d,0x6c,0x3e,0x0d,0x0a,};
172
173#if FSDATA_FILE_ALIGNMENT==1
174static const unsigned int dummy_align__index_html = 2;
175#endif
176
177static const unsigned char FSDATA_ALIGN_PRE data_AT32F437_html[] FSDATA_ALIGN_POST = " \
178HTTP/1.0 200 OK\r\n\
179Content-Length: 9811\r\n\
180Content-Type: text/html\r\n\r\n\
181<html>\
182 <head>\
183 <title>Technology Corp. Demo Web Page</title>\
184 </head>\
185 <body>\
186 <div style=\"text-align: center; margin-left: 40px; width: 977px;\">\
187 <span>\
188 <br />\
189 <big>\
190 <big>\
191 <big style=\"font-weight: bold;\"><big>AT32F437 web server demo </big></big>\
192 </big>\
193 </big>\
194 </span>\
195 <small>\
196 <small>\
197 <big>\
198 <big>\
199 <big style=\"font-weight: bold;\">\
200 <big>\
201 <font size=\"6\">\
202 <big>\
203 <big>\
204 <big>\
205 <big>\
206 <big><strong></strong></big>\
207 </big>\
208 </big>\
209 </big>\
210 </big>\
211 </font>\
212 </big>\
213 </big>\
214 </big>\
215 </big>\
216 <font size=\"6\">\
217 <big>&nbsp;</big>\
218 <small style=\"font-family: Verdana;\">\
219 <small>\
220 <big>\
221 <big>\
222 <big>\
223 <big style=\"font-weight: bold; color: rgb(51, 51, 255);\">\
224 <big>\
225 <strong><span style=\"font-style: italic;\"></span></strong>\
226 </big>\
227 <span style=\"color: rgb(51, 51, 255);\">\
228 <font size=\"8\">\
229 <br />\
230 ****************************<br />\
231 ****************************\
232 </font>\
233 </span>\
234 </big>\
235 </big>\
236 </big>\
237 </big>\
238 </small>\
239 </small>\
240 </font>\
241 </small>\
242 </small>\
243 <hr style=\"width: 100%; height: 2px;\" />\
244 <table style=\"width: 976px; height: 60px;\" border=\"1\" cellpadding=\"2\" cellspacing=\"2\">\
245 <tbody>\
246 <tr>\
247 <td style=\"font-family: Verdana; font-weight: bold; font-style: italic; background-color: rgb(51, 51, 255); width: 317px;\">\
248 <big>\
249 <big>\
250 <a href=\"AT32F437.html\"><span style=\"color: red;\">Main Page</span></a>\
251 </big>\
252 </big>\
253 </td>\
254 <td style=\"font-family: Verdana; font-weight: bold; background-color: rgb(51, 51, 255); width: 317px;\">\
255 &nbsp;\
256 <big>\
257 <big>\
258 <a href=\"AT32F437LED.html\"><span style=\"color: white;\">LED Control</span></a>\
259 </big>\
260 </big>\
261 </td>\
262 <td style=\"font-family: Verdana; font-weight: bold; background-color: rgb(51, 51, 255); width: 317px;\">\
263 <big>\
264 <big>\
265 <a href=\"AT32F437ADC.html\"><span style=\"color: white;\">ADC Sampling</span></a>\
266 </big>\
267 </big>\
268 </td>\
269 </tr>\
270 </tbody>\
271 </table>\
272 <table style=\"background-color: rgb(255, 255, 255); width: 766px; text-align: left; margin-left: auto; margin-right: auto;\" border=\"0\" cellpadding=\"0\" cellspacing=\"0\">\
273 <tbody>\
274 <tr valign=\"top\">\
275 <td class=\"text\">\
276 <table border=\"0\" cellpadding=\"3\" cellspacing=\"0\" width=\"100%\">\
277 <tbody>\
278 <tr>\
279 <td>\
280 <table border=\"0\" cellpadding=\"3\" cellspacing=\"0\" width=\"100%\">\
281 <tbody>\
282 <tr>\
283 <td valign=\"top\" width=\"72%\">\
284 <font size=\"6\"> </font>\
285 <p align=\"center\">\
286 <font size=\"6\">Board Resource: <br /> </font>\
287 </p>\
288 <li style=\"text-align: left; margin-left: 80px; font-family: Times New Roman;\">\
289 <big><big>Main Chip: AT32F437ZMT7 (RAM:384KB; FLASH:4032KB)</big></big>\
290 </li>\
291 <li style=\"text-align: left; margin-left: 80px; font-family: Times New Roman;\">\
292 <big>\
293 <big>Communication I/O: <br /></big>\
294 </big>\
295 </li>\
296 <li style=\"text-align: left; margin-left: 120px; font-family: Times New Roman;\">\
297 <big><big> I2C</big></big>\
298 </li>\
299 <li style=\"text-align: left; margin-left: 120px; font-family: Times New Roman;\">\
300 <big><big> USART</big></big>\
301 </li>\
302 <li style=\"text-align: left; margin-left: 120px; font-family: Times New Roman;\">\
303 <big><big> SPI</big></big>\
304 </li>\
305 <li style=\"text-align: left; margin-left: 120px; font-family: Times New Roman;\">\
306 <big><big> CAN</big></big>\
307 </li>\
308 <li style=\"text-align: left; margin-left: 120px; font-family: Times New Roman;\">\
309 <big><big>Crystal-less USB 2.0</big></big>\
310 </li>\
311 <li style=\"text-align: left; margin-left: 120px;\">\
312 <big>\
313 <big><span style=\"font-family: Times New Roman;\"> SDIO</span><br /> </big>\
314 </big>\
315 </li>\
316 <font size=\"6\">\
317 <font size=\"5\">\
318 <font size=\"6\">\
319 <font color=\"red\">\
320 <font color=\"black\">\
321 <font size=\"5\">\
322 <font color=\"red\"><font color=\"black\"> </font> </font>\
323 </font>\
324 </font>\
325 </font>\
326 </font>\
327 </font>\
328 </font>\
329 </td>\
330 </tr>\
331 </tbody>\
332 </table>\
333 </td>\
334 </tr>\
335 </tbody>\
336 </table>\
337 </td>\
338 </tr>\
339 </tbody>\
340 </table>\
341 </div>\
342 </body>\
343</html>\
344"
345;
346
347static const unsigned char FSDATA_ALIGN_PRE data_AT32F437LED_html[] FSDATA_ALIGN_POST = " \
348HTTP/1.0 200 OK\r\n\
349Content-Length: 4575\r\n\
350Content-Type: text/html\r\n\r\n\
351<html>\
352<head>\
353 <title>Technology Corp. Demo Web Page</title>\
354</head>\
355<body>\
356 <div style=\"text-align: center; margin-left: 40px; width: 977px;\">\
357 <span><br>\
358 <big><big><big style=\"font-weight: bold;\"><big>AT32F437 web server demo</big></big></big></big></span> <small><small><big><big><big style=\"font-weight: bold;\"><big><font size=\"6\"><big><big><big><big><big><strong></strong></big></big></big></big></big></font></big></big></big></big><font size=\"6\"><big>&nbsp;</big><small style=\"font-family: Verdana;\"><small><big><big><big><big style=\"font-weight: bold; color: rgb(51, 51, 255);\"><big><strong><span style=\"font-style: italic;\"></span></strong></big><span style=\"color: rgb(51, 51, 255);\"><font size=\"8\"><br>\
359 ****************************<br>\
360 ****************************</font></span></big></big></big></big></small></small></font></small></small>\
361 <hr style=\"width: 100%; height: 2px;\">\
362 <table border=\"1\" cellpadding=\"2\" cellspacing=\"2\" style=\"width: 976px; height: 60px;\">\
363 <tbody>\
364 <tr>\
365 <td style=\"font-family: Verdana; font-weight: bold; background-color: rgb(51, 51, 255); width: 316px;\"><big><big><a href=\"AT32F437.html\"><span style=\"color: white;\">Main Page</span></a></big></big></td>\
366 <td style=\"font-family: Verdana; font-weight: bold; font-style: italic; background-color: rgb(51, 51, 255); width: 317px;\">\
367 <a href=\"AT32F437LED.html\"><span style=\"color: red;\">&nbsp;<big><big>LED Control</big></big></span></a>\
368 </td>\
369 <td style=\"font-family: Verdana; font-weight: bold; background-color: rgb(51, 51, 255); width: 317px;\"><big><big><a href=\"AT32F437ADC.html\"><span style=\"color: white;\">ADC Sampling</span></a></big></big></td>\
370 </tr>\
371 </tbody>\
372 </table>\
373 <table border=\"0\" cellpadding=\"0\" cellspacing=\"0\" style=\"background-color: rgb(255, 255, 255); width: 766px; text-align: left; margin-left: auto; margin-right: auto;\">\
374 <tbody></tbody>\
375 </table><br>\
376 <span style=\"font-family: Consolas;\"><big><big>On this page, you can control 4 LEDs on developing board:</big></big></span> <span style=\"font-family: Verdana;\"></span>\
377 <form action=\"method=get\">\
378 <span style=\"font-family: Verdana;\"></span>\
379 <div style=\"text-align: center;\">\
380 <span style=\"font-family: Verdana;\"><font size=\"5\" style=\"font-family: Consolas;\"></font></span>\
381 <div style=\"text-align: center; font-family: Consolas;\">\
382 <span style=\"font-family: Verdana;\"><font size=\"5\"><input name=\"led\" type=\"checkbox\" value=\"2\"> LED2</font><br></span>\
383 </div><span style=\"font-family: Verdana;\"><font size=\"5\" style=\"font-family: Consolas;\"></font></span>\
384 <div style=\"text-align: center; font-family: Consolas;\">\
385 <span style=\"font-family: Verdana;\"><font size=\"5\"><input name=\"led\" type=\"checkbox\" value=\"3\"> LED3</font><br></span>\
386 </div><span style=\"font-family: Verdana;\"><font size=\"5\" style=\"font-family: Consolas;\"></font></span>\
387 <div style=\"text-align: center; font-family: Consolas;\">\
388 <span style=\"font-family: Verdana;\"><font size=\"5\"><input name=\"led\" type=\"checkbox\" value=\"4\"> LED4</font><br></span>\
389 </div><span style=\"font-family: Verdana;\"><font size=\"5\" style=\"font-family: Consolas;\"></font></span>\
390 </div><span style=\"font-family: Verdana;\"><font size=\"5\" style=\"font-family: Arial Unicode MS;\"><font size=\"5\"><input type=\"submit\" value=\"Send Command\"></font></font></span>\
391 </form><span style=\"font-family: Verdana;\"></span>\
392 <h3><span style=\"font-family: Verdana;\"><font size=\"5\"><font size=\"5\"><font size=\"-1\"><span style=\"color: black;\"></span></font></font></font></span></h3>\
393 <h3 style=\"font-family: Verdana;\"><font size=\"5\"><font size=\"5\"><font size=\"-1\"><br></font></font></font></h3><font size=\"5\"><font size=\"5\"><span style=\"font-family: SimSun;\"></span><a href=\"/AT32F437.html\" style=\"font-family: SimSun;\"><font size=\"-1\"><big><span style=\"font-weight: bold;\"></span></big></font></a> <font size=\"-1\"><span style=\"color: blue;\"><font size=\"5\"><span style=\"font-family: SimSun;\"><a href=\"http://item.taobao.com/item.htm?spm=0.0.0.0.nObYQP&amp;id=17524242055\" style=\"font-weight: bold;\"><font size=\"5\"><span style=\"font-family: SimSun;\"></span></font></a> <font size=\"5\"></font></span></font></span></font></font></font>\
394 </div>\
395</body>\
396</html>\
397"
398;
399
400static const unsigned char FSDATA_ALIGN_PRE data_AT32F437ADC_html[] FSDATA_ALIGN_POST = " \
401HTTP/1.0 200 OK\r\n\
402Content-Length: 4614\r\n\
403Content-Type: text/html\r\n\r\n\
404<html>\
405<head>\
406 <title>Technology Corp. Demo Web Page</title>\
407 <meta content=\"1\" http-equiv=\"refresh\">\
408</head>\
409<body>\
410 <div style=\"text-align: center; margin-left: 40px; width: 977px;\">\
411 <span><br>\
412 <big><big><big style=\"font-weight: bold;\"><big>AT32F437 web server demo</big></big></big></big></span> <small><small><big><big><big style=\"font-weight: bold;\"><big><font size=\"6\"><big><big><big><big><big><strong></strong></big></big></big></big></big></font></big></big></big></big><font size=\"6\"><big>&nbsp;</big><small style=\"font-family: Verdana;\"><small><big><big><big><big style=\"font-weight: bold; color: rgb(51, 51, 255);\"><big><strong><span style=\"font-style: italic;\"></span></strong></big><span style=\"color: rgb(51, 51, 255);\"><font size=\"8\"><br>\
413 ****************************<br>\
414 ****************************</font></span></big></big></big></big></small></small></font></small></small>\
415 <hr style=\"height: 2px;\">\
416 <table border=\"1\" cellpadding=\"2\" cellspacing=\"2\" style=\"width: 976px; height: 60px;\">\
417 <tbody>\
418 <tr>\
419 <td style=\"font-family: Verdana; font-weight: bold; background-color: rgb(51, 51, 255); width: 316px;\"><big><big><a href=\"AT32F437.html\"><span style=\"color: white;\">Main Page</span></a></big></big></td>\
420 <td style=\"font-family: Verdana; font-weight: bold; background-color: rgb(51, 51, 255); width: 316px;\">\
421 <a href=\"AT32F437LED.html\"><span style=\"color: white;\">&nbsp;<big><big>LED Control</big></big></span></a>\
422 </td>\
423 <td style=\"font-family: Verdana; font-weight: bold; font-style: italic; background-color: rgb(51, 51, 255); width: 316px;\"><big><big><a href=\"AT32F437ADC.html\"><span style=\"color: red;\">ADC Sampling</span></a></big></big></td>\
424 </tr>\
425 </tbody>\
426 </table>\
427 <table border=\"0\" cellpadding=\"0\" cellspacing=\"0\" style=\"background-color: rgb(255, 255, 255); width: 766px; text-align: left; margin-left: auto; margin-right: auto;\">\
428 <tbody></tbody>\
429 </table>\
430 <table border=\"0\" cellpadding=\"0\" cellspacing=\"0\" style=\"background-color: rgb(255, 255, 255); width: 766px; text-align: left; margin-left: auto; margin-right: auto;\">\
431 <tbody></tbody>\
432 </table>\
433 <p align=\"center\"><font size=\"6\">This page implement real-time sampling of voltage, ADC channel is 4<br></font> <font size=\"6\"><br></font></p>\
434 <div style=\"text-align: center;\">\
435 <big><span><big>Voltage:</big> <span style=\"color: red;\"><big>%.2fV</big></span></span></big>\
436 </div>\
437 <table border=\"3\" cellpadding=\"0\" cellspacing=\"0\" style=\"background-color: rgb(204, 204, 204); width: 520px; text-align: left; margin-left: auto; margin-right: auto;\">\
438 <tbody>\
439 <tr>\
440 <td>\
441 <div>\
442 <table border=\"0\" cellpadding=\"0\" cellspacing=\"0\" width=\"%d\">\
443 <tbody>\
444 <tr>\
445 <td bgcolor=\"#33FF00\" style=\"text-align: right;\">&nbsp;</td>\
446 </tr>\
447 </tbody>\
448 </table>\
449 </div>\
450 </td>\
451 </tr>\
452 </tbody>\
453 </table>\
454 <table border=\"0\" style=\"width: 520px; text-align: left; margin-left: auto; margin-right: auto;\">\
455 <tbody>\
456 <tr>\
457 <td style=\"color: rgb(51, 51, 153); font-family: Times New Roman;\" width=\"14\">0V</td>\
458 <td style=\"font-family: Times New Roman;\" width=\"14\">0.5V</td>\
459 <td style=\"font-family: Times New Roman;\" width=\"14\">1V</td>\
460 <td style=\"font-family: Times New Roman;\" width=\"14\">1.5V</td>\
461 <td style=\"font-family: Times New Roman;\" width=\"14\">2V</td>\
462 <td style=\"font-family: Times New Roman;\" width=\"14\">2.5V</td>\
463 <td style=\"width: 14px; font-family: Times New Roman;\">3V</td>\
464 </tr>\
465 </tbody>\
466 </table><font size=\"6\"><font size=\"-1\"><span style=\"color: black;\"></span></font><font size=\"-1\"><span style=\"color: black;\"></span></font><font size=\"-1\"><span style=\"color: black;\"></span></font></font><a href=\"/AT32F437.html\" style=\"font-family: Verdana;\"><big><span style=\"font-weight: bold;\"></span></big></a><span style=\"color: blue;\"><br>\
467 <font size=\"5\"><span style=""></span></font></span>\
468 </div>\
469</body>\
470</html>\
471"
472;
473
474const struct fsdata_file file__img_sics_gif[] = { {
475 file_NULL,
476 data__img_sics_gif,
477 data__img_sics_gif + 16,
478sizeof(data__img_sics_gif) - 16,
479 FS_FILE_FLAGS_HEADER_INCLUDED | FS_FILE_FLAGS_HEADER_PERSISTENT,
480}};
481
482const struct fsdata_file file__404_html[] = { {
483 file__img_sics_gif,
484 data__404_html,
485 data__404_html + 12,
486sizeof(data__404_html) - 12,
487 FS_FILE_FLAGS_HEADER_INCLUDED | FS_FILE_FLAGS_HEADER_PERSISTENT,
488}};
489
490const struct fsdata_file file_AT32F437_html[] = { {
491 file_NULL,
492 main_page_name,
493 data_AT32F437_html,
494sizeof(data_AT32F437_html),
495 FS_FILE_FLAGS_HEADER_INCLUDED | FS_FILE_FLAGS_HEADER_PERSISTENT,
496}};
497
498const struct fsdata_file file_AT32F437ADC_html[] = { {
499 file_AT32F437_html,
500 adc_page_name,
501 data_AT32F437ADC_html,
502sizeof(data_AT32F437ADC_html),
503 FS_FILE_FLAGS_HEADER_INCLUDED | FS_FILE_FLAGS_HEADER_PERSISTENT,
504}};
505
506const struct fsdata_file file_AT32F437LED_html[] = { {
507 file_AT32F437ADC_html,
508 led_page_name,
509 data_AT32F437LED_html,
510sizeof(data_AT32F437LED_html),
511 FS_FILE_FLAGS_HEADER_INCLUDED | FS_FILE_FLAGS_HEADER_PERSISTENT,
512}};
513
514#define FS_ROOT file_AT32F437LED_html
515#define FS_NUMFILES 3
516
file_AT32F437LED_html
const struct fsdata_file file_AT32F437LED_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:506
data_AT32F437LED_html
static const unsigned char data_AT32F437LED_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:347
data_AT32F437_html
static const unsigned char data_AT32F437_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:177
file_NULL
#define file_NULL
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:4
FSDATA_ALIGN_POST
#define FSDATA_ALIGN_POST
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:21
data_AT32F437ADC_html
static const unsigned char data_AT32F437ADC_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:400
FS_FILE_FLAGS_HEADER_INCLUDED
#define FS_FILE_FLAGS_HEADER_INCLUDED
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:7
main_page_name
const unsigned char main_page_name[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:30
file_AT32F437ADC_html
const struct fsdata_file file_AT32F437ADC_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:498
FS_FILE_FLAGS_HEADER_PERSISTENT
#define FS_FILE_FLAGS_HEADER_PERSISTENT
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:10
data__404_html
static const unsigned char data__404_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:110
led_page_name
const unsigned char led_page_name[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:31
data__img_sics_gif
static const unsigned char data__img_sics_gif[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:34
file_AT32F437_html
const struct fsdata_file file_AT32F437_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:490
adc_page_name
const unsigned char adc_page_name[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:32
FSDATA_ALIGN_PRE
#define FSDATA_ALIGN_PRE
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:18
file__img_sics_gif
const struct fsdata_file file__img_sics_gif[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:474
file__404_html
const struct fsdata_file file__404_html[]
Definition: project/at_start_f437/examples/emac/http_server/src/fsdata.c:482
fsdata_file
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:37


AT32F435/437 Firmwary Library: main.c File Reference

  • emac
  • http_server
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/http_server/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "at32_emac.h"
#include "netconf.h"
#include "lwip/apps/httpd.h"

Go to the source code of this file.

Macros

#define | DELAY 100
#define | FAST 1
#define | SLOW 4

Functions

void | adc_configuration (void)
int | main (void)
main function. More...

Variables

uint8_t | g_speed = 1
volatile uint32_t | local_time = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/http_server/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • emac
  • http_server
  • src
project/at_start_f437/examples/emac/http_server/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "at32_emac.h"
30#include "netconf.h"
31#include "lwip/apps/httpd.h"
32
41#define DELAY 100
42#define FAST 1
43#define SLOW 4
44
45uint8_t g_speed = FAST;
46volatile uint32_t local_time = 0;
47
48void adc_configuration(void);
49
55int main(void)
56{
57 error_status status;
58
59 system_clock_config();
60
61 at32_board_init();
62
63 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
64
65 delay_init();
66
67 status = emac_system_init();
68
69 while(status == ERROR);
70
71 tcpip_stack_init();
72
73 adc_configuration();
74 httpd_init();
75
76 while(1)
77 {
78 lwip_periodic_handle(local_time);
79 }
80}
81
82void adc_configuration(void)
83{
84 gpio_init_type gpio_init_struct;
85 adc_common_config_type adc_common_struct;
86 adc_base_config_type adc_base_struct;
87
88 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
89 crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
90
91 gpio_default_para_init(&gpio_init_struct);
92 gpio_init_struct.gpio_mode = GPIO_MODE_ANALOG;
93 gpio_init_struct.gpio_pins = GPIO_PINS_4;
94 gpio_init(GPIOA, &gpio_init_struct);
95
96 adc_common_default_para_init(&adc_common_struct);
97
98 /* config combine mode */
99 adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
100
101 /* config division,adcclk is division by hclk */
102 adc_common_struct.div = ADC_HCLK_DIV_2;
103
104 /* config common dma mode,it's not useful in independent mode */
105 adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
106
107 /* config common dma request repeat */
108 adc_common_struct.common_dma_request_repeat_state = FALSE;
109
110 /* config adjacent adc sampling interval,it's useful for ordinary shifting mode */
111 adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
112
113 /* config inner temperature sensor and vintrv */
114 adc_common_struct.tempervintrv_state = FALSE;
115
116 /* config voltage battery */
117 adc_common_struct.vbat_state = FALSE;
118 adc_common_config(&adc_common_struct);
119
120 adc_base_default_para_init(&adc_base_struct);
121
122 adc_base_struct.sequence_mode = FALSE;
123 adc_base_struct.repeat_mode = TRUE;
124 adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
125 adc_base_struct.ordinary_channel_length = 1;
126 adc_base_config(ADC1, &adc_base_struct);
127
128 /* config adc conversion resolution */
129 adc_resolution_set(ADC1, ADC_RESOLUTION_12B);
130
131 /* config ordinary channel */
132 adc_ordinary_channel_set(ADC1, ADC_CHANNEL_4, 1, ADC_SAMPLETIME_247_5);
133
134 /* config ordinary trigger source and trigger edge */
135 adc_ordinary_conversion_trigger_set(ADC1, ADC_ORDINARY_TRIG_TMR1CH1, ADC_ORDINARY_TRIG_EDGE_NONE);
136
137 adc_enable(ADC1, TRUE);
138 while(adc_flag_get(ADC1, ADC_RDY_FLAG) == RESET);
139 adc_calibration_init(ADC1);
140 while(adc_calibration_init_status_get(ADC1));
141 adc_calibration_start(ADC1);
142 while(adc_calibration_status_get(ADC1));
143
144 adc_ordinary_software_trigger_enable(ADC1, TRUE);
145}
146
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
FAST
#define FAST
Definition: project/at_start_f437/examples/emac/http_server/src/main.c:42
main
int main(void)
main function.
Definition: project/at_start_f437/examples/emac/http_server/src/main.c:55
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/http_server/src/main.c:46
g_speed
uint8_t g_speed
Definition: project/at_start_f437/examples/emac/http_server/src/main.c:45
httpd_init
void httpd_init(void)
Definition: httpd.c:2244
adc_configuration
void adc_configuration(void)
Definition: project/at_start_f437/examples/emac/http_server/src/main.c:82
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
adc_ordinary_software_trigger_enable
void adc_ordinary_software_trigger_enable(adc_type *adc_x, confirm_state new_state)
enable or disable ordinary software start conversion of the specified adc peripheral.
Definition: at32f435_437_adc.c:945
adc_ordinary_conversion_trigger_set
void adc_ordinary_conversion_trigger_set(adc_type *adc_x, adc_ordinary_trig_select_type adc_ordinary_trig, adc_ordinary_trig_edge_type adc_ordinary_trig_edge)
set the ordinary channel's external trigger edge and set external trigger event of the specified adc ...
Definition: at32f435_437_adc.c:742
adc_base_config
void adc_base_config(adc_type *adc_x, adc_base_config_type *adc_base_struct)
initialize the adc peripheral according to the specified parameters.
Definition: at32f435_437_adc.c:110
adc_enable
void adc_enable(adc_type *adc_x, confirm_state new_state)
enable or disable the specified adc peripheral.
Definition: at32f435_437_adc.c:64
adc_common_config
void adc_common_config(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:203
adc_resolution_set
void adc_resolution_set(adc_type *adc_x, adc_resolution_type resolution)
set resolution of the specified adc peripheral.
Definition: at32f435_437_adc.c:235
adc_base_default_para_init
void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
adc base default para init.
Definition: at32f435_437_adc.c:84
adc_calibration_start
void adc_calibration_start(adc_type *adc_x)
start calibration process of the specified adc peripheral.
Definition: at32f435_437_adc.c:359
adc_calibration_status_get
flag_status adc_calibration_status_get(adc_type *adc_x)
get calibration status of the specified adc peripheral.
Definition: at32f435_437_adc.c:371
adc_flag_get
flag_status adc_flag_get(adc_type *adc_x, uint8_t adc_flag)
get flag of the specified adc peripheral.
Definition: at32f435_437_adc.c:1075
adc_calibration_init
void adc_calibration_init(adc_type *adc_x)
initialize calibration register of the specified adc peripheral.
Definition: at32f435_437_adc.c:328
adc_calibration_init_status_get
flag_status adc_calibration_init_status_get(adc_type *adc_x)
get calibration register's initialize status of the specified adc peripheral.
Definition: at32f435_437_adc.c:340
adc_common_default_para_init
void adc_common_default_para_init(adc_common_config_type *adc_common_struct)
adc common default para init.
Definition: at32f435_437_adc.c:155
adc_ordinary_channel_set
void adc_ordinary_channel_set(adc_type *adc_x, adc_channel_select_type adc_channel, uint8_t adc_sequence, adc_sampletime_select_type adc_sampletime)
set ordinary channel's corresponding rank in the sequencer and sample time of the specified adc perip...
Definition: at32f435_437_adc.c:472
ADC_RIGHT_ALIGNMENT
@ ADC_RIGHT_ALIGNMENT
Definition: at32f435_437_adc.h:178
ADC_CHANNEL_4
@ ADC_CHANNEL_4
Definition: at32f435_437_adc.h:191
ADC_SAMPLETIME_247_5
@ ADC_SAMPLETIME_247_5
Definition: at32f435_437_adc.h:219
ADC_SAMPLING_INTERVAL_5CYCLES
@ ADC_SAMPLING_INTERVAL_5CYCLES
Definition: at32f435_437_adc.h:144
ADC_COMMON_DMAMODE_DISABLE
@ ADC_COMMON_DMAMODE_DISABLE
Definition: at32f435_437_adc.h:131
ADC_INDEPENDENT_MODE
@ ADC_INDEPENDENT_MODE
Definition: at32f435_437_adc.h:111
ADC_ORDINARY_TRIG_TMR1CH1
@ ADC_ORDINARY_TRIG_TMR1CH1
Definition: at32f435_437_adc.h:228
ADC_ORDINARY_TRIG_EDGE_NONE
@ ADC_ORDINARY_TRIG_EDGE_NONE
Definition: at32f435_437_adc.h:265
ADC_RESOLUTION_12B
@ ADC_RESOLUTION_12B
Definition: at32f435_437_adc.h:167
ADC_HCLK_DIV_2
@ ADC_HCLK_DIV_2
Definition: at32f435_437_adc.h:88
ADC_RDY_FLAG
#define ADC_RDY_FLAG
Definition: at32f435_437_adc.h:73
ADC1
#define ADC1
Definition: at32f435_437_adc.h:866
delay_init
void delay_init()
initialize delay function
Definition: at32f435_437_board.c:293
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ADC1_PERIPH_CLOCK
@ CRM_ADC1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:158
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_ANALOG
@ GPIO_MODE_ANALOG
Definition: at32f435_437_gpio.h:85
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
adc_base_config_type
adc base config type
Definition: at32f435_437_adc.h:402
adc_base_config_type::data_align
adc_data_align_type data_align
Definition: at32f435_437_adc.h:405
adc_base_config_type::repeat_mode
confirm_state repeat_mode
Definition: at32f435_437_adc.h:404
adc_base_config_type::sequence_mode
confirm_state sequence_mode
Definition: at32f435_437_adc.h:403
adc_base_config_type::ordinary_channel_length
uint8_t ordinary_channel_length
Definition: at32f435_437_adc.h:406
adc_common_config_type
adc common config type
Definition: at32f435_437_adc.h:388
adc_common_config_type::sampling_interval
adc_sampling_interval_type sampling_interval
Definition: at32f435_437_adc.h:393
adc_common_config_type::tempervintrv_state
confirm_state tempervintrv_state
Definition: at32f435_437_adc.h:394
adc_common_config_type::div
adc_div_type div
Definition: at32f435_437_adc.h:390
adc_common_config_type::common_dma_mode
adc_common_dma_mode_type common_dma_mode
Definition: at32f435_437_adc.h:391
adc_common_config_type::common_dma_request_repeat_state
confirm_state common_dma_request_repeat_state
Definition: at32f435_437_adc.h:392
adc_common_config_type::combine_mode
adc_combine_mode_type combine_mode
Definition: at32f435_437_adc.h:389
adc_common_config_type::vbat_state
confirm_state vbat_state
Definition: at32f435_437_adc.h:395
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: netconf.c File Reference

  • emac
  • http_server
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/http_server/src/netconf.c File Reference

network connection configuration More...

#include "lwip/memp.h"
#include "lwip/tcp.h"
#include "lwip/priv/tcp_priv.h"
#include "lwip/udp.h"
#include "netif/etharp.h"
#include "lwip/dhcp.h"
#include "ethernetif.h"
#include "netconf.h"
#include "stdio.h"
#include "at32_emac.h"

Go to the source code of this file.

Macros

#define | MAC_ADDR_LENGTH (6)
#define | ADDR_LENGTH (4)
#define | SYSTEMTICK_PERIOD_MS 10

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Variables

volatile uint32_t | local_time
struct netif | netif
volatile uint32_t | tcp_timer = 0
volatile uint32_t | arp_timer = 0
volatile uint32_t | link_timer = 0
static uint8_t | mac_address [(6)] = {0, 0, 0x44, 0x45, 0x56, 1}
static uint8_t | local_ip [(4)] = {192, 168, 81, 37}
static uint8_t | local_gw [(4)] = {192, 168, 81, 187}
static uint8_t | local_mask [(4)] = {255, 255, 255, 0}

Detailed Description

network connection configuration

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/http_server/src/netconf.c.


AT32F435/437 Firmwary Library: netconf.c Source File

  • emac
  • http_server
  • src
project/at_start_f437/examples/emac/http_server/src/netconf.c
Go to the documentation of this file.
1
27/* Includes ------------------------------------------------------------------*/
28#include "lwip/memp.h"
29#include "lwip/tcp.h"
30#include "lwip/priv/tcp_priv.h"
31#include "lwip/udp.h"
32#include "netif/etharp.h"
33#include "lwip/dhcp.h"
34#include "ethernetif.h"
35#include "netconf.h"
36#include "stdio.h"
37#include "at32_emac.h"
38
51/* Private define ------------------------------------------------------------*/
52/* Private macro -------------------------------------------------------------*/
53#define MAC_ADDR_LENGTH (6)
54#define ADDR_LENGTH (4)
55#define SYSTEMTICK_PERIOD_MS 10
56/* Private variables ---------------------------------------------------------*/
57extern volatile uint32_t local_time;
58struct netif netif;
59volatile uint32_t tcp_timer = 0;
60volatile uint32_t arp_timer = 0;
61volatile uint32_t link_timer = 0;
62
63static uint8_t mac_address[MAC_ADDR_LENGTH] = {0, 0, 0x44, 0x45, 0x56, 1};;
64#if LWIP_DHCP
65volatile uint32_t dhcp_fine_timer = 0;
66volatile uint32_t dhcp_coarse_timer = 0;
67#else
68static uint8_t local_ip[ADDR_LENGTH] = {192, 168, 81, 37};
69static uint8_t local_gw[ADDR_LENGTH] = {192, 168, 81, 187};
70static uint8_t local_mask[ADDR_LENGTH] = {255, 255, 255, 0};
71#endif
72
73/* Private function prototypes -----------------------------------------------*/
74/* Private functions ---------------------------------------------------------*/
75
81void tcpip_stack_init(void)
82{
83 ip_addr_t ipaddr;
84 ip_addr_t netmask;
85 ip_addr_t gw;
86
87 /* Initializes the dynamic memory heap defined by MEM_SIZE.*/
88 mem_init();
89
90 /* Initializes the memory pools defined by MEMP_NUM_x.*/
91 memp_init();
92
93
94#if LWIP_DHCP //need DHCP server
95 ipaddr.addr = 0;
96 netmask.addr = 0;
97 gw.addr = 0;
98
99#else
100 IP4_ADDR(&ipaddr, local_ip[0], local_ip[1], local_ip[2], local_ip[3]);
101 IP4_ADDR(&netmask, local_mask[0], local_mask[1], local_mask[2], local_mask[3]);
102 IP4_ADDR(&gw, local_gw[0], local_gw[1], local_gw[2], local_gw[3]);
103#endif
104
105 lwip_set_mac_address(mac_address);
106
107 /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
108 struct ip_addr *netmask, struct ip_addr *gw,
109 void *state, err_t (* init)(struct netif *netif),
110 err_t (* input)(struct pbuf *p, struct netif *netif))
111
112 Adds your network interface to the netif_list. Allocate a struct
113 netif and pass a pointer to this structure as the first argument.
114 Give pointers to cleared ip_addr structures when using DHCP,
115 or fill them with sane numbers otherwise. The state pointer may be NULL.
116
117 The init function pointer must point to a initialization function for
118 your ethernet netif interface. The following code illustrates it's use.*/
119
120 if(netif_add(&netif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &netif_input) == NULL)
121 {
122 while(1);
123 }
124
125 /* Registers the default network interface.*/
126 netif_set_default(&netif);
127
128 /* When the netif is fully configured this function must be called.*/
129 netif_set_up(&netif);
130
131 /* Set the link callback function, this function is called on change of link status*/
132 netif_set_link_callback(&netif, ethernetif_update_config);
133}
134
140void lwip_pkt_handle(void)
141{
142 /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */
143 if(ethernetif_input(&netif) != ERR_OK)
144 {
145 while(1);
146 }
147}
148
154void time_update(void)
155{
156 local_time += SYSTEMTICK_PERIOD_MS;
157}
158
164void lwip_periodic_handle(volatile uint32_t localtime)
165{
166
167 /* TCP periodic process every 250 ms */
168 if (localtime - tcp_timer >= TCP_TMR_INTERVAL)
169 {
170 tcp_timer = localtime;
171 tcp_tmr();
172 }
173 /* ARP periodic process every 5s */
174 if (localtime - arp_timer >= ARP_TMR_INTERVAL)
175 {
176 arp_timer = localtime;
177 etharp_tmr();
178 }
179
180#if LWIP_DHCP
181 /* Fine DHCP periodic process every 500ms */
182 if (localtime - dhcp_fine_timer >= DHCP_FINE_TIMER_MSECS)
183 {
184 dhcp_fine_timer = localtime;
185 dhcp_fine_tmr();
186 }
187 /* DHCP Coarse periodic process every 60s */
188 if (localtime - dhcp_coarse_timer >= DHCP_COARSE_TIMER_MSECS)
189 {
190 dhcp_coarse_timer = localtime;
191 dhcp_coarse_tmr();
192 }
193#endif
194
195#if (LINK_DETECTION > 0)
196 /* link detection process every 500 ms */
197 if (localtime - link_timer >= 500)
198 {
199 link_timer = localtime;
200 ethernetif_set_link(&netif);
201 }
202#endif
203}
204
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
local_mask
static uint8_t local_mask[(4)]
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:70
link_timer
volatile uint32_t link_timer
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:61
local_gw
static uint8_t local_gw[(4)]
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:69
ADDR_LENGTH
#define ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:54
arp_timer
volatile uint32_t arp_timer
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:60
MAC_ADDR_LENGTH
#define MAC_ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:53
SYSTEMTICK_PERIOD_MS
#define SYSTEMTICK_PERIOD_MS
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:55
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:49
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:58
tcp_timer
volatile uint32_t tcp_timer
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:59
local_ip
static uint8_t local_ip[(4)]
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:68
mac_address
static uint8_t mac_address[(6)]
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:63


AT32F435/437 Firmwary Library: at32_emac.h File Reference

  • emac
  • iperf
  • inc
Macros | Functions
project/at_start_f437/examples/emac/iperf/inc/at32_emac.h File Reference

header file of emac config program. More...

#include "at32f435_437.h"
#include "netif.h"

Go to the source code of this file.

Macros

#define | RX_REMAP (1)
#define | CRYSTAL_ON_PHY (0)
#define | RMII_MODE
#define | DM9162
#define | LINK_DETECTION (1)
#define | PHY_ADDRESS (0x03)
#define | PHY_CONTROL_REG (0x00)
#define | PHY_STATUS_REG (0x01)
#define | PHY_SPECIFIED_CS_REG (0x11)
#define | PHY_AUTO_NEGOTIATION_BIT (0x1000)
#define | PHY_LOOPBACK_BIT (0x4000)
#define | PHY_RESET_BIT (0x8000)
#define | PHY_LINKED_STATUS_BIT (0x0004)
#define | PHY_NEGO_COMPLETE_BIT (0x0020)
#define | PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
#define | PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
#define | PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
#define | PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Detailed Description

header file of emac config program.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/iperf/inc/at32_emac.h.


AT32F435/437 Firmwary Library: at32_emac.h Source File

  • emac
  • iperf
  • inc
project/at_start_f437/examples/emac/iperf/inc/at32_emac.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32_EMAC_H
29#define __AT32_EMAC_H
30
31#ifdef __cplusplus
32 extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37#include "netif.h"
38
47#define RX_REMAP (1)
48#define CRYSTAL_ON_PHY (0)
49
50//#define MII_MODE
51#define RMII_MODE
52
53#define DM9162
54//#define DP83848
55
56#define LINK_DETECTION (1)
58#if defined (DM9162)
59 #define PHY_ADDRESS (0x03)
60 #define PHY_CONTROL_REG (0x00)
61 #define PHY_STATUS_REG (0x01)
62 #define PHY_SPECIFIED_CS_REG (0x11)
63 /* phy control register */
64 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
65 #define PHY_LOOPBACK_BIT (0x4000)
66 #define PHY_RESET_BIT (0x8000)
67 /* phy status register */
68 #define PHY_LINKED_STATUS_BIT (0x0004)
69 #define PHY_NEGO_COMPLETE_BIT (0x0020)
70 /* phy specified control/status register */
71 #define PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
72 #define PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
73 #define PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
74 #define PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)
75#elif defined (DP83848)
76 #define PHY_ADDRESS (0x01)
77 #define PHY_CONTROL_REG (0x00)
78 #define PHY_STATUS_REG (0x01)
79 #define PHY_SPECIFIED_CS_REG (0x10)
80 /* phy control register */
81 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
82 #define PHY_LOOPBACK_BIT (0x4000)
83 #define PHY_RESET_BIT (0x8000)
84 /* phy status register */
85 #define PHY_LINKED_STATUS_BIT (0x0004)
86 #define PHY_NEGO_COMPLETE_BIT (0x0020)
88 #define PHY_DUPLEX_MODE (0x0004)
89 #define PHY_SPEED_MODE (0x0002)
90#endif
91
92 error_status emac_system_init(void);
93void emac_nvic_configuration(void);
94void emac_pins_configuration(void);
95 error_status emac_layer2_configuration(void);
96void static reset_phy(void);
97 error_status emac_phy_register_reset(void);
98 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed);
99 error_status emac_phy_init(emac_control_config_type *control_para);
100
101uint16_t link_update(void);
102void ethernetif_set_link(void const *argument);
103void ethernetif_notify_conn_changed(struct netif *netif);
104void ethernetif_update_config(struct netif *netif);
105void emac_tmr_init(void);
106
115#ifdef __cplusplus
116}
117#endif
118
119#endif
at32f435_437.h
at32f435_437 header file
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:80
reset_phy
static void reset_phy(void)
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:205
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:550
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:574
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:70
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:335
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
error_status
error_status
Definition: at32f435_437.h:380
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • emac
  • iperf
  • inc
project/at_start_f437/examples/emac/iperf/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • emac
  • iperf
  • inc
project/at_start_f437/examples/emac/iperf/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • emac
  • iperf
  • inc
project/at_start_f437/examples/emac/iperf/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: lwipopts.h File Reference

  • emac
  • iperf
  • inc
Macros
project/at_start_f437/examples/emac/iperf/inc/lwipopts.h File Reference

Go to the source code of this file.

Macros

#define | LWIP_IPV4 1
#define | NO_SYS 1
#define | SYS_LIGHTWEIGHT_PROT 0
#define | LWIP_NETCONN !NO_SYS
#define | LWIP_SOCKET !NO_SYS
#define | LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
#define | LWIP_NETBUF_RECVINFO 1
#define | LWIP_HAVE_LOOPIF 1
#define | LWIP_NETIF_LINK_CALLBACK 1
#define | LWIP_DNS 1
#define | DNS_DOES_NAME_CHECK 1
#define | LWIP_DHCP 0
#define | TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
#define | MEM_ALIGNMENT 4
#define | MEM_SIZE (20*1024)
#define | TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
#define | MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
#define | TCP_SND_BUF (2 * TCP_MSS)
#define | TCP_WND (2 * TCP_MSS)
#define | LWIP_WND_SCALE 0
#define | TCP_RCV_SCALE 0
#define | PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
#define | PBUF_POOL_BUFSIZE 1500
#define | LWIP_TCP 1
#define | TCP_TTL 255
#define | LWIP_IGMP 1
#define | LWIP_MDNS_RESPONDER 1
#define | LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
#define | ETHARP_SUPPORT_STATIC_ENTRIES 1
#define | MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
#define | MIB2_STATS 1
#define | LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */

Macro Definition Documentation

◆ DNS_DOES_NAME_CHECK

#define DNS_DOES_NAME_CHECK 1

Definition at line 54 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ ETHARP_SUPPORT_STATIC_ENTRIES

#define ETHARP_SUPPORT_STATIC_ENTRIES 1

Definition at line 90 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_DHCP

#define LWIP_DHCP 0

Definition at line 58 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_DNS

#define LWIP_DNS 1

Definition at line 53 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_HAVE_LOOPIF

#define LWIP_HAVE_LOOPIF 1

Definition at line 51 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_IGMP

#define LWIP_IGMP 1

Definition at line 85 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_IPV4

#define LWIP_IPV4 1

Definition at line 37 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_MDNS_RESPONDER

#define LWIP_MDNS_RESPONDER 1

Definition at line 86 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_MEM_ILLEGAL_FREE

#define LWIP_MEM_ILLEGAL_FREE ( msg ) /* to nothing */

Definition at line 101 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_NETBUF_RECVINFO

#define LWIP_NETBUF_RECVINFO 1

Definition at line 50 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_NETCONN

#define LWIP_NETCONN !NO_SYS

Definition at line 47 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_NETCONN_FULLDUPLEX

#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET

Definition at line 49 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_NETIF_LINK_CALLBACK

#define LWIP_NETIF_LINK_CALLBACK 1

Definition at line 52 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_NUM_NETIF_CLIENT_DATA

#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)

Definition at line 87 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_SOCKET

#define LWIP_SOCKET !NO_SYS

Definition at line 48 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_TCP

#define LWIP_TCP 1

Definition at line 81 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ LWIP_WND_SCALE

#define LWIP_WND_SCALE 0

Definition at line 73 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ MEM_ALIGNMENT

#define MEM_ALIGNMENT 4

Definition at line 67 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ MEM_SIZE

#define MEM_SIZE (20*1024)

Definition at line 68 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ MEMP_NUM_SYS_TIMEOUT

#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)

Definition at line 92 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ MEMP_NUM_TCP_SEG

#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN

Definition at line 70 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ MIB2_STATS

#define MIB2_STATS 1

Definition at line 95 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ NO_SYS

#define NO_SYS 1

Definition at line 45 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ PBUF_POOL_BUFSIZE

#define PBUF_POOL_BUFSIZE 1500

Definition at line 77 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ PBUF_POOL_SIZE

#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */

Definition at line 75 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ SYS_LIGHTWEIGHT_PROT

#define SYS_LIGHTWEIGHT_PROT 0

Definition at line 46 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ TCP_MSS

#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */

Definition at line 63 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ TCP_RCV_SCALE

#define TCP_RCV_SCALE 0

Definition at line 74 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ TCP_SND_BUF

#define TCP_SND_BUF (2 * TCP_MSS)

Definition at line 71 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ TCP_SND_QUEUELEN

#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS

Definition at line 69 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ TCP_TTL

#define TCP_TTL 255

Definition at line 82 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.

◆ TCP_WND

#define TCP_WND (2 * TCP_MSS)

Definition at line 72 of file project/at_start_f437/examples/emac/iperf/inc/lwipopts.h.


AT32F435/437 Firmwary Library: lwipopts.h Source File

  • emac
  • iperf
  • inc
project/at_start_f437/examples/emac/iperf/inc/lwipopts.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
21 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
25 * OF SUCH DAMAGE.
26 *
27 * This file is part of the lwIP TCP/IP stack.
28 *
29 * Author: Simon Goldschmidt
30 *
31 */
32#ifndef LWIP_HDR_LWIPOPTS_H
33#define LWIP_HDR_LWIPOPTS_H
34
35//#define LWIP_TESTMODE 0
36
37#define LWIP_IPV4 1
38//#define LWIP_TIMERS 0
39
40//#define LWIP_CHECKSUM_ON_COPY 1
41//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK 1
42//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL(printfmsg) LWIP_ASSERT("TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL", 0)
43
44/* We link to special sys_arch.c (for basic non-waiting API layers unit tests) */
45#define NO_SYS 1
46#define SYS_LIGHTWEIGHT_PROT 0
47#define LWIP_NETCONN !NO_SYS
48#define LWIP_SOCKET !NO_SYS
49#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
50#define LWIP_NETBUF_RECVINFO 1
51#define LWIP_HAVE_LOOPIF 1
52#define LWIP_NETIF_LINK_CALLBACK 1
53#define LWIP_DNS 1
54#define DNS_DOES_NAME_CHECK 1
55//#define TCPIP_THREAD_TEST
56
57/* Enable DHCP to test it, disable UDP checksum to easier inject packets */
58#define LWIP_DHCP 0
59
60/* Minimal changes to opt.h required for tcp unit tests: */
61/* TCP Maximum segment size. */
62
63#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
64/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
65 lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
66 byte alignment -> define MEM_ALIGNMENT to 2. */
67#define MEM_ALIGNMENT 4
68#define MEM_SIZE (20*1024)
69#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
70#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
71#define TCP_SND_BUF (2 * TCP_MSS)
72#define TCP_WND (2 * TCP_MSS)
73#define LWIP_WND_SCALE 0
74#define TCP_RCV_SCALE 0
75#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
76/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
77#define PBUF_POOL_BUFSIZE 1500
78//#define TCP_QUEUE_OOSEQ 0
79
80/* ---------- TCP options ---------- */
81#define LWIP_TCP 1
82#define TCP_TTL 255
83
84/* Enable IGMP and MDNS for MDNS tests */
85#define LWIP_IGMP 1
86#define LWIP_MDNS_RESPONDER 1
87#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
88
89/* Minimal changes to opt.h required for etharp unit tests: */
90#define ETHARP_SUPPORT_STATIC_ENTRIES 1
91
92#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
93
94/* MIB2 stats are required to check IPv4 reassembly results */
95#define MIB2_STATS 1
96
97/* netif tests want to test this, so enable: */
98//#define LWIP_NETIF_EXT_STATUS_CALLBACK 1
99
100/* Check lwip_stats.mem.illegal instead of asserting */
101#define LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */
102
103#endif /* LWIP_HDR_LWIPOPTS_H */


AT32F435/437 Firmwary Library: netconf.h File Reference

  • emac
  • iperf
  • inc
Functions
project/at_start_f437/examples/emac/iperf/inc/netconf.h File Reference

This file contains all the functions prototypes for the netconf.c file. More...

Go to the source code of this file.

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Detailed Description

This file contains all the functions prototypes for the netconf.c file.

Version
v2.0.9
Date
2022-06-28
        Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/iperf/inc/netconf.h.


AT32F435/437 Firmwary Library: netconf.h Source File

  • emac
  • iperf
  • inc
project/at_start_f437/examples/emac/iperf/inc/netconf.h
Go to the documentation of this file.
1
28/* Define to prevent recursive inclusion -------------------------------------*/
29#ifndef __NETCONF_H
30#define __NETCONF_H
31
32#ifdef __cplusplus
33 extern "C" {
34#endif
35
47/* Includes ------------------------------------------------------------------*/
48void tcpip_stack_init(void);
49void lwip_pkt_handle(void);
50void time_update(void);
51void lwip_periodic_handle(volatile uint32_t localtime);
52
53
54#ifdef __cplusplus
55}
56#endif
57
65#endif /* __NETCONF_H */
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164


AT32F435/437 Firmwary Library: at32_emac.c File Reference

  • emac
  • iperf
  • src
Functions | Variables
project/at_start_f437/examples/emac/iperf/src/at32_emac.c File Reference

emac config program More...

#include "at32f435_437_board.h"
#include "lwip/dhcp.h"
#include "at32_emac.h"

Go to the source code of this file.

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
reset layer 1 More...
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Variables

emac_control_config_type mac_control_para

Detailed Description

emac config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/iperf/src/at32_emac.c.

Function Documentation

◆ reset_phy()

static void reset_phy ( void )
static

reset layer 1

Parameters
none
Return values
none

Definition at line 261 of file project/at_start_f437/examples/emac/iperf/src/at32_emac.c.

Referenced by emac_layer2_configuration().


AT32F435/437 Firmwary Library: at32_emac.c Source File

  • emac
  • iperf
  • src
project/at_start_f437/examples/emac/iperf/src/at32_emac.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_board.h"
29#include "lwip/dhcp.h"
30#include "at32_emac.h"
31
40 emac_control_config_type mac_control_para;
41
47 error_status emac_system_init(void)
48{
49 error_status status;
50
51 emac_nvic_configuration();
52
53 /* emac periph clock enable */
54 crm_periph_clock_enable(CRM_EMAC_PERIPH_CLOCK, TRUE);
55 crm_periph_clock_enable(CRM_EMACTX_PERIPH_CLOCK, TRUE);
56 crm_periph_clock_enable(CRM_EMACRX_PERIPH_CLOCK, TRUE);
57
58 emac_pins_configuration();
59 status = emac_layer2_configuration();
60 emac_tmr_init();
61
62 return status;
63}
64
70void emac_nvic_configuration(void)
71{
72 nvic_irq_enable(EMAC_IRQn, 1, 0);
73}
74
80void emac_pins_configuration(void)
81{
82 gpio_init_type gpio_init_struct = {0};
83
84 /* emac pins clock enable */
85 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
87 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
88 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
89 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
90 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
91
92 /* pa2 -> mdio */
93 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_11);
94 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
95 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
96 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
97 gpio_init_struct.gpio_pins = GPIO_PINS_2;
98 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
99 gpio_init(GPIOA, &gpio_init_struct);
100
101 /* pc1 -> mdc */
102 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE1, GPIO_MUX_11);
103 gpio_init_struct.gpio_pins = GPIO_PINS_1;
104 gpio_init(GPIOC, &gpio_init_struct);
105
106 #ifdef MII_MODE
107 /*
108 pb12 -> tx_d0
109 pb13 -> tx_d1
110 pc2 -> tx_d2
111 pb8 -> tx_d3
112 pb11 -> tx_en
113 pc3 -> tx_clk
114 */
115 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_11);
116 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_11);
117 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_11);
118 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_11);
119 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_11 | GPIO_PINS_12 | GPIO_PINS_13;
120 gpio_init(GPIOB, &gpio_init_struct);
121
122 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_11);
123 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE3, GPIO_MUX_11);
124 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
125 gpio_init(GPIOC, &gpio_init_struct);
126
127 /*
128 pd8 -> rx_dv
129 pd9 -> rx_d0
130 pd10 -> rx_d1
131 pd11 -> rx_d2
132 pd12 -> rx_d3
133 */
134 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
135 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
136 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
137 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE11, GPIO_MUX_11);
138 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE12, GPIO_MUX_11);
139 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12;
140 gpio_init(GPIOD, &gpio_init_struct);
141
142 /*
143 pa1 -> rx_clk
144 pa0 -> crs
145 pa3 -> col
146 pb10 -> rx_er
147 */
148 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_11);
149 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
150 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_11);
151 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_3;
152 gpio_init(GPIOA, &gpio_init_struct);
153
154 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_11);
155 gpio_init_struct.gpio_pins = GPIO_PINS_10;
156 gpio_init(GPIOB, &gpio_init_struct);
157 #endif /* MII_MODE */
158
159 #ifdef RMII_MODE
160 /*
161 pb12 -> tx_d0
162 pb13 -> tx_d1
163 pb11 -> tx_en
164 */
165 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE11, GPIO_MUX_11);
166 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE13, GPIO_MUX_11);
167 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE14, GPIO_MUX_11);
168 gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_13 | GPIO_PINS_14;
169 gpio_init(GPIOG, &gpio_init_struct);
170
171 /*
172 pd8 -> rx_dv
173 pd9 -> rx_d0
174 pd10 -> rx_d1
175 */
176 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
177 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
178 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
179 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10;
180 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
181 gpio_init(GPIOD, &gpio_init_struct);
182
183
184 #endif /* RMII_MODE */
185 /*
186 pa1 -> ref_clk
187 */
188 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
189 gpio_init_struct.gpio_pins = GPIO_PINS_1;
190 gpio_init(GPIOA, &gpio_init_struct);
191
192 #if !CRYSTAL_ON_PHY
193 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_0);
194 gpio_init_struct.gpio_pins = GPIO_PINS_8;
195 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
196 gpio_init(GPIOA, &gpio_init_struct);
197 #endif
198}
199
205 error_status emac_layer2_configuration(void)
206{
207 emac_dma_config_type dma_control_para;
208 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
209 #ifdef MII_MODE
210 scfg_emac_interface_set(SCFG_EMAC_SELECT_MII);
211 #elif defined RMII_MODE
212 scfg_emac_interface_set(SCFG_EMAC_SELECT_RMII);
213 #endif
214 crm_clock_out1_set(CRM_CLKOUT1_PLL);
215 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_5, CRM_CLKOUT_DIV2_2);
216
217 /* reset phy */
218 reset_phy();
219 /* reset emac ahb bus */
220 emac_reset();
221
222 /* software reset emac dma */
223 emac_dma_software_reset_set();
224
225 while(emac_dma_software_reset_get() == SET);
226
227 emac_control_para_init(&mac_control_para);
228
229 mac_control_para.auto_nego = EMAC_AUTO_NEGOTIATION_ON;
230
231 if(emac_phy_init(&mac_control_para) == ERROR)
232 {
233 return ERROR;
234 }
235
236 emac_dma_para_init(&dma_control_para);
237
238 dma_control_para.rsf_enable = TRUE;
239 dma_control_para.tsf_enable = TRUE;
240 dma_control_para.osf_enable = TRUE;
241 dma_control_para.aab_enable = TRUE;
242 dma_control_para.usp_enable = TRUE;
243 dma_control_para.fb_enable = TRUE;
244 dma_control_para.flush_rx_disable = TRUE;
245 dma_control_para.rx_dma_pal = EMAC_DMA_PBL_32;
246 dma_control_para.tx_dma_pal = EMAC_DMA_PBL_32;
247 dma_control_para.priority_ratio = EMAC_DMA_2_RX_1_TX;
248
249 emac_dma_config(&dma_control_para);
250 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_NORMAL_SUMMARY, TRUE);
251 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_RX, TRUE);
252
253 return SUCCESS;
254}
255
261void static reset_phy(void)
262{
263 gpio_init_type gpio_init_struct = {0};
264 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
265 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
266 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE8, GPIO_MUX_0);
267 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
268 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
269 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
270 gpio_init_struct.gpio_pins = GPIO_PINS_15;
271 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
272 gpio_init(GPIOE, &gpio_init_struct);
273
274 gpio_init_struct.gpio_pins = GPIO_PINS_15;
275 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
276 gpio_init(GPIOG, &gpio_init_struct);
277 gpio_bits_reset(GPIOG, GPIO_PINS_15);
278 gpio_bits_reset(GPIOE, GPIO_PINS_15);
279 delay_ms(2);
280 gpio_bits_set(GPIOE, GPIO_PINS_15);
281 delay_ms(2);
282}
283
289 error_status emac_phy_register_reset(void)
290{
291 uint16_t data = 0;
292 uint32_t timeout = 0;
293 uint32_t i = 0;
294
295 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_RESET_BIT) == ERROR)
296 {
297 return ERROR;
298 }
299
300 for(i = 0; i < 0x000FFFFF; i++);
301
302 do
303 {
304 timeout++;
305 if(emac_phy_register_read(PHY_ADDRESS, PHY_CONTROL_REG, &data) == ERROR)
306 {
307 return ERROR;
308 }
309 } while((data & PHY_RESET_BIT) && (timeout < PHY_TIMEOUT));
310
311 for(i = 0; i < 0x00FFFFF; i++);
312 if(timeout == PHY_TIMEOUT)
313 {
314 return ERROR;
315 }
316 return SUCCESS;
317}
318
335 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
336{
337 uint16_t data = 0;
338 uint32_t timeout = 0;
339 if(nego == EMAC_AUTO_NEGOTIATION_ON)
340 {
341 do
342 {
343 timeout++;
344 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
345 {
346 return ERROR;
347 }
348 } while(!(data & PHY_LINKED_STATUS_BIT) && (timeout < PHY_TIMEOUT));
349
350 if(timeout == PHY_TIMEOUT)
351 {
352 return ERROR;
353 }
354
355 timeout = 0;
356
357 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_AUTO_NEGOTIATION_BIT) == ERROR)
358 {
359 return ERROR;
360 }
361
362
363 do
364 {
365 timeout++;
366 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
367 {
368 return ERROR;
369 }
370 } while(!(data & PHY_NEGO_COMPLETE_BIT) && (timeout < PHY_TIMEOUT));
371
372 if(timeout == PHY_TIMEOUT)
373 {
374 return ERROR;
375 }
376
377 if(emac_phy_register_read(PHY_ADDRESS, PHY_SPECIFIED_CS_REG, &data) == ERROR)
378 {
379 return ERROR;
380 }
381 #ifdef DM9162
382 if(data & PHY_FULL_DUPLEX_100MBPS_BIT)
383 {
384 emac_fast_speed_set(EMAC_SPEED_100MBPS);
385 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
386 }
387 else if(data & PHY_HALF_DUPLEX_100MBPS_BIT)
388 {
389 emac_fast_speed_set(EMAC_SPEED_100MBPS);
390 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
391 }
392 else if(data & PHY_FULL_DUPLEX_10MBPS_BIT)
393 {
394 emac_fast_speed_set(EMAC_SPEED_10MBPS);
395 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
396 }
397 else if(data & PHY_HALF_DUPLEX_10MBPS_BIT)
398 {
399 emac_fast_speed_set(EMAC_SPEED_10MBPS);
400 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
401 }
402 #else
403 if(data & PHY_DUPLEX_MODE)
404 {
405 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
406 }
407 else
408 {
409 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
410 }
411 if(data & PHY_SPEED_MODE)
412 {
413 emac_fast_speed_set(EMAC_SPEED_10MBPS);
414 }
415 else
416 {
417 emac_fast_speed_set(EMAC_SPEED_100MBPS);
418 }
419 #endif
420 }
421 else
422 {
423 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, (uint16_t)((mode << 8) | (speed << 13))) == ERROR)
424 {
425 return ERROR;
426 }
427 if(speed == EMAC_SPEED_100MBPS)
428 {
429 emac_fast_speed_set(EMAC_SPEED_100MBPS);
430 }
431 else
432 {
433 emac_fast_speed_set(EMAC_SPEED_10MBPS);
434 }
435 if(mode == EMAC_FULL_DUPLEX)
436 {
437 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
438 }
439 else
440 {
441 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
442 }
443 }
444
445 return SUCCESS;
446}
447
453 error_status emac_phy_init(emac_control_config_type *control_para)
454{
455 emac_clock_range_set();
456 if(emac_phy_register_reset() == ERROR)
457 {
458 return ERROR;
459 }
460
461 emac_control_config(control_para);
462 return SUCCESS;
463}
464
470uint16_t link_update(void)
471{
472 uint16_t link_data, link_state;
473 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &link_data) == ERROR)
474 {
475 return ERROR;
476 }
477
478 link_state = (link_data & PHY_LINKED_STATUS_BIT)>>2;
479 return link_state;
480}
481
487void ethernetif_set_link(void const *argument)
488{
489 uint16_t regvalue = 0;
490 struct netif *netif = (struct netif *)argument;
491
492 /* read phy_bsr*/
493 regvalue = link_update();
494
495 if(regvalue > 0)
496 {
497 at32_led_on(LED4);
498 at32_led_off(LED2);
499 }
500 else
501 {
502 at32_led_on(LED2);
503 at32_led_off(LED4);
504 }
505 /* check whether the netif link down and the phy link is up */
506 if(!netif_is_link_up(netif) && (regvalue))
507 {
508 /* network cable is connected */
509 netif_set_link_up(netif);
510 }
511 else if(netif_is_link_up(netif) && (!regvalue))
512 {
513 /* network cable is dis-connected */
514 netif_set_link_down(netif);
515 }
516}
517
523void ethernetif_notify_conn_changed(struct netif *netif)
524{
525 /* note : this is function could be implemented in user file
526 when the callback is needed,
527 */
528
529 if (netif_is_link_up(netif)) {
530 netif_set_up(netif);
531
532#if LWIP_DHCP
533 /* creates a new dhcp client for this interface on the first call.
534 note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
535 the predefined regular intervals after starting the client.
536 you can peek in the netif->dhcp struct for the actual dhcp status.*/
537 dhcp_start(netif);
538#endif
539 }
540 else
541 netif_set_down(netif);
542}
543
550void ethernetif_update_config(struct netif *netif)
551{
552 if(netif_is_link_up(netif))
553 {
554 emac_speed_config(mac_control_para.auto_nego, mac_control_para.duplex_mode, mac_control_para.fast_ethernet_speed);
555
556 delay_ms(300);
557 /* enable mac and dma transmission and reception */
558 emac_start();
559 }
560 else
561 {
562 /* disable mac and dma transmission and reception */
563 emac_stop();
564 }
565
566 ethernetif_notify_conn_changed(netif);
567}
568
574void emac_tmr_init(void)
575{
576 crm_clocks_freq_type crm_clocks_freq_struct = {0};
577 crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
578
579 crm_clocks_freq_get(&crm_clocks_freq_struct);
580 /* tmr1 configuration */
581 /* time base configuration */
582 /* systemclock/24000/100 = 100hz */
583 tmr_base_init(TMR6, 99, (crm_clocks_freq_struct.ahb_freq / 10000) - 1);
584 tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
585
586 /* overflow interrupt enable */
587 tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
588
589 /* tmr1 overflow interrupt nvic init */
590 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
591 nvic_irq_enable(TMR6_DAC_GLOBAL_IRQn, 0, 0);
592 tmr_counter_enable(TMR6, TRUE);
593}
594
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:80
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:205
PHY_AUTO_NEGOTIATION_BIT
#define PHY_AUTO_NEGOTIATION_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:64
PHY_RESET_BIT
#define PHY_RESET_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:66
PHY_ADDRESS
#define PHY_ADDRESS
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:59
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
PHY_FULL_DUPLEX_10MBPS_BIT
#define PHY_FULL_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:73
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:574
PHY_FULL_DUPLEX_100MBPS_BIT
#define PHY_FULL_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:71
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:70
PHY_SPECIFIED_CS_REG
#define PHY_SPECIFIED_CS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:62
PHY_CONTROL_REG
#define PHY_CONTROL_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:60
PHY_NEGO_COMPLETE_BIT
#define PHY_NEGO_COMPLETE_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:69
PHY_HALF_DUPLEX_100MBPS_BIT
#define PHY_HALF_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:72
PHY_STATUS_REG
#define PHY_STATUS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:61
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:335
PHY_LINKED_STATUS_BIT
#define PHY_LINKED_STATUS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:68
PHY_HALF_DUPLEX_10MBPS_BIT
#define PHY_HALF_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:74
mac_control_para
emac_control_config_type mac_control_para
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:40
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR6_PERIPH_CLOCK
@ CRM_TMR6_PERIPH_CLOCK
Definition: at32f435_437_crm.h:132
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_GPIOE_PERIPH_CLOCK
@ CRM_GPIOE_PERIPH_CLOCK
Definition: at32f435_437_crm.h:109
CRM_CLKOUT_DIV1_5
@ CRM_CLKOUT_DIV1_5
Definition: at32f435_437_crm.h:729
CRM_CLKOUT_DIV2_2
@ CRM_CLKOUT_DIV2_2
Definition: at32f435_437_crm.h:738
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
emac_dma_software_reset_set
void emac_dma_software_reset_set(void)
reset emac dma
Definition: at32f435_437_emac.c:156
emac_control_para_init
void emac_control_para_init(emac_control_config_type *control_para)
initialize emac control structure
Definition: at32f435_437_emac.c:70
emac_dma_software_reset_get
flag_status emac_dma_software_reset_get(void)
get emac dma reset status
Definition: at32f435_437_emac.c:166
emac_control_config
void emac_control_config(emac_control_config_type *control_struct)
configure emac control setting.
Definition: at32f435_437_emac.c:136
emac_phy_register_read
error_status emac_phy_register_read(uint8_t address, uint8_t reg, uint16_t *data)
read phy data
Definition: at32f435_437_emac.c:262
emac_reset
void emac_reset(void)
deinitialize the emac peripheral registers to their default reset values.
Definition: at32f435_437_emac.c:59
emac_start
void emac_start(void)
enable emac and dma reception/transmission
Definition: at32f435_437_emac.c:183
emac_duplex_mode_set
void emac_duplex_mode_set(emac_duplex_type duplex_mode)
set duplex mode.
Definition: at32f435_437_emac.c:463
emac_fast_speed_set
void emac_fast_speed_set(emac_speed_type speed)
set mac fast emac speed.
Definition: at32f435_437_emac.c:450
emac_clock_range_set
void emac_clock_range_set(void)
according to hclk to set mdc clock frequency.
Definition: at32f435_437_emac.c:93
emac_dma_interrupt_enable
void emac_dma_interrupt_enable(emac_dma_interrupt_type it, confirm_state new_state)
enable dma interrupt
Definition: at32f435_437_emac.c:1497
emac_dma_para_init
void emac_dma_para_init(emac_dma_config_type *control_para)
init emac dma parameters
Definition: at32f435_437_emac.c:1073
emac_phy_register_write
error_status emac_phy_register_write(uint8_t address, uint8_t reg, uint16_t data)
write phy data.
Definition: at32f435_437_emac.c:232
emac_dma_config
void emac_dma_config(emac_dma_config_type *control_para)
configure emac dma
Definition: at32f435_437_emac.c:1099
emac_stop
void emac_stop(void)
stop emac and dma reception/transmission
Definition: at32f435_437_emac.c:206
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
EMAC_HALF_DUPLEX
@ EMAC_HALF_DUPLEX
Definition: at32f435_437_emac.h:303
EMAC_FULL_DUPLEX
@ EMAC_FULL_DUPLEX
Definition: at32f435_437_emac.h:304
EMAC_DMA_PBL_32
@ EMAC_DMA_PBL_32
Definition: at32f435_437_emac.h:427
EMAC_SPEED_10MBPS
@ EMAC_SPEED_10MBPS
Definition: at32f435_437_emac.h:312
EMAC_SPEED_100MBPS
@ EMAC_SPEED_100MBPS
Definition: at32f435_437_emac.h:313
EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
@ EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
Definition: at32f435_437_emac.h:527
EMAC_DMA_INTERRUPT_RX
@ EMAC_DMA_INTERRUPT_RX
Definition: at32f435_437_emac.h:519
EMAC_AUTO_NEGOTIATION_ON
@ EMAC_AUTO_NEGOTIATION_ON
Definition: at32f435_437_emac.h:284
EMAC_DMA_2_RX_1_TX
@ EMAC_DMA_2_RX_1_TX
Definition: at32f435_437_emac.h:412
PHY_TIMEOUT
#define PHY_TIMEOUT
Definition: at32f435_437_emac.h:47
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_0
@ GPIO_MUX_0
Definition: at32f435_437_gpio.h:156
GPIO_MUX_11
@ GPIO_MUX_11
Definition: at32f435_437_gpio.h:167
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
GPIOE
#define GPIOE
Definition: at32f435_437_gpio.h:525
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_emac_interface_set
void scfg_emac_interface_set(scfg_emac_interface_type mode)
scfg emac interface set
Definition: at32f435_437_scfg.c:113
SCFG_EMAC_SELECT_MII
@ SCFG_EMAC_SELECT_MII
Definition: at32f435_437_scfg.h:139
SCFG_EMAC_SELECT_RMII
@ SCFG_EMAC_SELECT_RMII
Definition: at32f435_437_scfg.h:140
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
TMR6_DAC_GLOBAL_IRQn
@ TMR6_DAC_GLOBAL_IRQn
Definition: at32f435_437.h:202
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
reset_phy
static void reset_phy(void)
reset layer 1
Definition: project/at_start_f437/examples/emac/iperf/src/at32_emac.c:261
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::ahb_freq
uint32_t ahb_freq
Definition: at32f435_437_crm.h:790
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588
emac_control_config_type::auto_nego
emac_auto_negotiation_type auto_nego
Definition: at32f435_437_emac.h:589
emac_control_config_type::fast_ethernet_speed
emac_speed_type fast_ethernet_speed
Definition: at32f435_437_emac.h:598
emac_control_config_type::duplex_mode
emac_duplex_type duplex_mode
Definition: at32f435_437_emac.h:595
emac_dma_config_type
ethernet mac dma config type
Definition: at32f435_437_emac.h:609
emac_dma_config_type::tx_dma_pal
emac_dma_pbl_type tx_dma_pal
Definition: at32f435_437_emac.h:614
emac_dma_config_type::aab_enable
confirm_state aab_enable
Definition: at32f435_437_emac.h:610
emac_dma_config_type::rx_dma_pal
emac_dma_pbl_type rx_dma_pal
Definition: at32f435_437_emac.h:612
emac_dma_config_type::flush_rx_disable
confirm_state flush_rx_disable
Definition: at32f435_437_emac.h:620
emac_dma_config_type::priority_ratio
emac_dma_rx_tx_ratio_type priority_ratio
Definition: at32f435_437_emac.h:617
emac_dma_config_type::osf_enable
confirm_state osf_enable
Definition: at32f435_437_emac.h:626
emac_dma_config_type::usp_enable
confirm_state usp_enable
Definition: at32f435_437_emac.h:611
emac_dma_config_type::rsf_enable
confirm_state rsf_enable
Definition: at32f435_437_emac.h:619
emac_dma_config_type::tsf_enable
confirm_state tsf_enable
Definition: at32f435_437_emac.h:621
emac_dma_config_type::fb_enable
confirm_state fb_enable
Definition: at32f435_437_emac.h:613
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • emac
  • iperf
  • src
Functions
project/at_start_f437/examples/emac/iperf/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/iperf/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • emac
  • iperf
  • src
project/at_start_f437/examples/emac/iperf/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 125, 1, CRM_PLL_FR_4);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/emac/iperf/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_4
@ CRM_PLL_FR_4
Definition: at32f435_437_crm.h:548
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • emac
  • iperf
  • src
Functions
project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "netconf.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR6_DAC_GLOBAL_IRQHandler (void)
this function handles timer6 overflow handler. More...
void | EMAC_IRQHandler (void)
this function handles emac handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • emac
  • iperf
  • src
project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "netconf.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void TMR6_DAC_GLOBAL_IRQHandler(void)
142{
143 if(tmr_flag_get(TMR6, TMR_OVF_FLAG) != RESET)
144 {
145 /* Update the local_time by adding SYSTEMTICK_PERIOD_MS each SysTick interrupt */
146 time_update();
147 tmr_flag_clear(TMR6, TMR_OVF_FLAG);
148 }
149}
150
156void EMAC_IRQHandler(void)
157{
158 /* handles all the received frames */
159 while(emac_received_packet_size_get() != 0)
160 {
161 lwip_pkt_handle();
162 }
163
164 /* clear the emac dma rx it pending bits */
165 emac_dma_flag_clear(EMAC_DMA_RI_FLAG);
166 emac_dma_flag_clear(EMAC_DMA_NIS_FLAG);
167}
168
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c:92
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c:53
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c:66
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c:105
EMAC_IRQHandler
void EMAC_IRQHandler(void)
this function handles emac handler.
Definition: project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c:156
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c:123
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c:44
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c:79
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c:132
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c:114
TMR6_DAC_GLOBAL_IRQHandler
void TMR6_DAC_GLOBAL_IRQHandler(void)
this function handles timer6 overflow handler.
Definition: project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c:141
emac_dma_flag_clear
void emac_dma_flag_clear(uint32_t dma_flag)
clear the emac dma flag.
Definition: at32f435_437_emac.c:2290
emac_received_packet_size_get
uint32_t emac_received_packet_size_get(void)
get the size of received the received packet.
Definition: at32f435_437_emac.c:1044
EMAC_DMA_RI_FLAG
#define EMAC_DMA_RI_FLAG
Definition: at32f435_437_emac.h:264
EMAC_DMA_NIS_FLAG
#define EMAC_DMA_NIS_FLAG
Definition: at32f435_437_emac.h:272
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • emac
  • iperf
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/iperf/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "at32_emac.h"
#include "netconf.h"
#include "iperf.h"

Go to the source code of this file.

Macros

#define | DELAY 100
#define | FAST 1
#define | SLOW 4

Functions

int main (void)
main function. More...

Variables

uint8_t | g_speed = 1
volatile uint32_t | local_time = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/iperf/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • emac
  • iperf
  • src
project/at_start_f437/examples/emac/iperf/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "at32_emac.h"
30#include "netconf.h"
31#include "iperf.h"
32
41#define DELAY 100
42#define FAST 1
43#define SLOW 4
44
45uint8_t g_speed = FAST;
46volatile uint32_t local_time = 0;
47
53int main(void)
54{
55 error_status status;
56 system_clock_config();
57
58 at32_board_init();
59
60 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
61
62 delay_init();
63
64 status = emac_system_init();
65
66 while(status == ERROR);
67
68 tcpip_stack_init();
69
70 iperf_init();
71
72 while(1)
73 {
74 lwip_periodic_handle(local_time);
75 }
76}
77
at32f435_437_board.h
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
FAST
#define FAST
Definition: project/at_start_f437/examples/emac/iperf/src/main.c:42
main
int main(void)
main function.
Definition: project/at_start_f437/examples/emac/iperf/src/main.c:53
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/iperf/src/main.c:46
g_speed
uint8_t g_speed
Definition: project/at_start_f437/examples/emac/iperf/src/main.c:45
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
delay_init
void delay_init()
initialize delay function
Definition: at32f435_437_board.c:293
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
iperf_init
void iperf_init(void)
initialize iperf server
Definition: iperf.c:92
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
iperf.h
iperf tool header
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: netconf.c File Reference

  • emac
  • iperf
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/iperf/src/netconf.c File Reference

network connection configuration More...

#include "lwip/memp.h"
#include "lwip/tcp.h"
#include "lwip/priv/tcp_priv.h"
#include "lwip/udp.h"
#include "netif/etharp.h"
#include "lwip/dhcp.h"
#include "ethernetif.h"
#include "netconf.h"
#include "stdio.h"
#include "at32_emac.h"

Go to the source code of this file.

Macros

#define | MAC_ADDR_LENGTH (6)
#define | ADDR_LENGTH (4)
#define | SYSTEMTICK_PERIOD_MS 10

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Variables

volatile uint32_t | local_time
struct netif | netif
volatile uint32_t | tcp_timer = 0
volatile uint32_t | arp_timer = 0
volatile uint32_t | link_timer = 0
static uint8_t | mac_address [(6)] = {0, 0, 0x44, 0x45, 0x56, 1}
static uint8_t | local_ip [(4)] = {192, 168, 81, 37}
static uint8_t | local_gw [(4)] = {192, 168, 81, 187}
static uint8_t | local_mask [(4)] = {255, 255, 255, 0}

Detailed Description

network connection configuration

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/iperf/src/netconf.c.


AT32F435/437 Firmwary Library: netconf.c Source File

  • emac
  • iperf
  • src
project/at_start_f437/examples/emac/iperf/src/netconf.c
Go to the documentation of this file.
1
27/* Includes ------------------------------------------------------------------*/
28#include "lwip/memp.h"
29#include "lwip/tcp.h"
30#include "lwip/priv/tcp_priv.h"
31#include "lwip/udp.h"
32#include "netif/etharp.h"
33#include "lwip/dhcp.h"
34#include "ethernetif.h"
35#include "netconf.h"
36#include "stdio.h"
37#include "at32_emac.h"
38
51/* Private define ------------------------------------------------------------*/
52/* Private macro -------------------------------------------------------------*/
53#define MAC_ADDR_LENGTH (6)
54#define ADDR_LENGTH (4)
55#define SYSTEMTICK_PERIOD_MS 10
56/* Private variables ---------------------------------------------------------*/
57extern volatile uint32_t local_time;
58struct netif netif;
59volatile uint32_t tcp_timer = 0;
60volatile uint32_t arp_timer = 0;
61volatile uint32_t link_timer = 0;
62
63static uint8_t mac_address[MAC_ADDR_LENGTH] = {0, 0, 0x44, 0x45, 0x56, 1};;
64#if LWIP_DHCP
65volatile uint32_t dhcp_fine_timer = 0;
66volatile uint32_t dhcp_coarse_timer = 0;
67#else
68static uint8_t local_ip[ADDR_LENGTH] = {192, 168, 81, 37};
69static uint8_t local_gw[ADDR_LENGTH] = {192, 168, 81, 187};
70static uint8_t local_mask[ADDR_LENGTH] = {255, 255, 255, 0};
71#endif
72
73/* Private function prototypes -----------------------------------------------*/
74/* Private functions ---------------------------------------------------------*/
75
81void tcpip_stack_init(void)
82{
83 ip_addr_t ipaddr;
84 ip_addr_t netmask;
85 ip_addr_t gw;
86
87 /* Initializes the dynamic memory heap defined by MEM_SIZE.*/
88 mem_init();
89
90 /* Initializes the memory pools defined by MEMP_NUM_x.*/
91 memp_init();
92
93
94#if LWIP_DHCP //need DHCP server
95 ipaddr.addr = 0;
96 netmask.addr = 0;
97 gw.addr = 0;
98
99#else
100 IP4_ADDR(&ipaddr, local_ip[0], local_ip[1], local_ip[2], local_ip[3]);
101 IP4_ADDR(&netmask, local_mask[0], local_mask[1], local_mask[2], local_mask[3]);
102 IP4_ADDR(&gw, local_gw[0], local_gw[1], local_gw[2], local_gw[3]);
103#endif
104
105 lwip_set_mac_address(mac_address);
106
107 /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
108 struct ip_addr *netmask, struct ip_addr *gw,
109 void *state, err_t (* init)(struct netif *netif),
110 err_t (* input)(struct pbuf *p, struct netif *netif))
111
112 Adds your network interface to the netif_list. Allocate a struct
113 netif and pass a pointer to this structure as the first argument.
114 Give pointers to cleared ip_addr structures when using DHCP,
115 or fill them with sane numbers otherwise. The state pointer may be NULL.
116
117 The init function pointer must point to a initialization function for
118 your ethernet netif interface. The following code illustrates it's use.*/
119
120 if(netif_add(&netif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &netif_input) == NULL)
121 {
122 while(1);
123 }
124
125 /* Registers the default network interface.*/
126 netif_set_default(&netif);
127
128 /* When the netif is fully configured this function must be called.*/
129 netif_set_up(&netif);
130
131 /* Set the link callback function, this function is called on change of link status*/
132 netif_set_link_callback(&netif, ethernetif_update_config);
133}
134
140void lwip_pkt_handle(void)
141{
142 /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */
143 if(ethernetif_input(&netif) != ERR_OK)
144 {
145 while(1);
146 }
147}
148
154void time_update(void)
155{
156 local_time += SYSTEMTICK_PERIOD_MS;
157}
158
164void lwip_periodic_handle(volatile uint32_t localtime)
165{
166
167 /* TCP periodic process every 250 ms */
168 if (localtime - tcp_timer >= TCP_TMR_INTERVAL)
169 {
170 tcp_timer = localtime;
171 tcp_tmr();
172 }
173 /* ARP periodic process every 5s */
174 if (localtime - arp_timer >= ARP_TMR_INTERVAL)
175 {
176 arp_timer = localtime;
177 etharp_tmr();
178 }
179
180#if LWIP_DHCP
181 /* Fine DHCP periodic process every 500ms */
182 if (localtime - dhcp_fine_timer >= DHCP_FINE_TIMER_MSECS)
183 {
184 dhcp_fine_timer = localtime;
185 dhcp_fine_tmr();
186 }
187 /* DHCP Coarse periodic process every 60s */
188 if (localtime - dhcp_coarse_timer >= DHCP_COARSE_TIMER_MSECS)
189 {
190 dhcp_coarse_timer = localtime;
191 dhcp_coarse_tmr();
192 }
193#endif
194
195#if (LINK_DETECTION > 0)
196 /* link detection process every 500 ms */
197 if (localtime - link_timer >= 500)
198 {
199 link_timer = localtime;
200 ethernetif_set_link(&netif);
201 }
202#endif
203}
204
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
local_mask
static uint8_t local_mask[(4)]
Definition: project/at_start_f437/examples/emac/iperf/src/netconf.c:70
link_timer
volatile uint32_t link_timer
Definition: project/at_start_f437/examples/emac/iperf/src/netconf.c:61
local_gw
static uint8_t local_gw[(4)]
Definition: project/at_start_f437/examples/emac/iperf/src/netconf.c:69
ADDR_LENGTH
#define ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/iperf/src/netconf.c:54
arp_timer
volatile uint32_t arp_timer
Definition: project/at_start_f437/examples/emac/iperf/src/netconf.c:60
MAC_ADDR_LENGTH
#define MAC_ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/iperf/src/netconf.c:53
SYSTEMTICK_PERIOD_MS
#define SYSTEMTICK_PERIOD_MS
Definition: project/at_start_f437/examples/emac/iperf/src/netconf.c:55
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:49
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/iperf/src/netconf.c:58
tcp_timer
volatile uint32_t tcp_timer
Definition: project/at_start_f437/examples/emac/iperf/src/netconf.c:59
local_ip
static uint8_t local_ip[(4)]
Definition: project/at_start_f437/examples/emac/iperf/src/netconf.c:68
mac_address
static uint8_t mac_address[(6)]
Definition: project/at_start_f437/examples/emac/iperf/src/netconf.c:63


AT32F435/437 Firmwary Library: at32_emac.h File Reference

  • emac
  • mqtt_client
  • inc
Macros | Functions
project/at_start_f437/examples/emac/mqtt_client/inc/at32_emac.h File Reference

header file of emac config program. More...

#include "at32f435_437.h"
#include "netif.h"

Go to the source code of this file.

Macros

#define | RX_REMAP (1)
#define | CRYSTAL_ON_PHY (0)
#define | RMII_MODE
#define | DM9162
#define | LINK_DETECTION (1)
#define | PHY_ADDRESS (0x03)
#define | PHY_CONTROL_REG (0x00)
#define | PHY_STATUS_REG (0x01)
#define | PHY_SPECIFIED_CS_REG (0x11)
#define | PHY_AUTO_NEGOTIATION_BIT (0x1000)
#define | PHY_LOOPBACK_BIT (0x4000)
#define | PHY_RESET_BIT (0x8000)
#define | PHY_LINKED_STATUS_BIT (0x0004)
#define | PHY_NEGO_COMPLETE_BIT (0x0020)
#define | PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
#define | PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
#define | PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
#define | PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Detailed Description

header file of emac config program.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/mqtt_client/inc/at32_emac.h.


AT32F435/437 Firmwary Library: at32_emac.h Source File

  • emac
  • mqtt_client
  • inc
project/at_start_f437/examples/emac/mqtt_client/inc/at32_emac.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32_EMAC_H
29#define __AT32_EMAC_H
30
31#ifdef __cplusplus
32 extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37#include "netif.h"
38
47#define RX_REMAP (1)
48#define CRYSTAL_ON_PHY (0)
49
50//#define MII_MODE
51#define RMII_MODE
52
53#define DM9162
54//#define DP83848
55
56#define LINK_DETECTION (1)
58#if defined (DM9162)
59 #define PHY_ADDRESS (0x03)
60 #define PHY_CONTROL_REG (0x00)
61 #define PHY_STATUS_REG (0x01)
62 #define PHY_SPECIFIED_CS_REG (0x11)
63 /* phy control register */
64 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
65 #define PHY_LOOPBACK_BIT (0x4000)
66 #define PHY_RESET_BIT (0x8000)
67 /* phy status register */
68 #define PHY_LINKED_STATUS_BIT (0x0004)
69 #define PHY_NEGO_COMPLETE_BIT (0x0020)
70 /* phy specified control/status register */
71 #define PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
72 #define PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
73 #define PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
74 #define PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)
75#elif defined (DP83848)
76 #define PHY_ADDRESS (0x01)
77 #define PHY_CONTROL_REG (0x00)
78 #define PHY_STATUS_REG (0x01)
79 #define PHY_SPECIFIED_CS_REG (0x10)
80 /* phy control register */
81 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
82 #define PHY_LOOPBACK_BIT (0x4000)
83 #define PHY_RESET_BIT (0x8000)
84 /* phy status register */
85 #define PHY_LINKED_STATUS_BIT (0x0004)
86 #define PHY_NEGO_COMPLETE_BIT (0x0020)
88 #define PHY_DUPLEX_MODE (0x0004)
89 #define PHY_SPEED_MODE (0x0002)
90#endif
91
92 error_status emac_system_init(void);
93void emac_nvic_configuration(void);
94void emac_pins_configuration(void);
95 error_status emac_layer2_configuration(void);
96void static reset_phy(void);
97 error_status emac_phy_register_reset(void);
98 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed);
99 error_status emac_phy_init(emac_control_config_type *control_para);
100
101uint16_t link_update(void);
102void ethernetif_set_link(void const *argument);
103void ethernetif_notify_conn_changed(struct netif *netif);
104void ethernetif_update_config(struct netif *netif);
105void emac_tmr_init(void);
106
115#ifdef __cplusplus
116}
117#endif
118
119#endif
at32f435_437.h
at32f435_437 header file
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:80
reset_phy
static void reset_phy(void)
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:205
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:550
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:574
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:70
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:335
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
error_status
error_status
Definition: at32f435_437.h:380
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • emac
  • mqtt_client
  • inc
project/at_start_f437/examples/emac/mqtt_client/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • emac
  • mqtt_client
  • inc
project/at_start_f437/examples/emac/mqtt_client/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • emac
  • mqtt_client
  • inc
project/at_start_f437/examples/emac/mqtt_client/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: lwipopts.h File Reference

  • emac
  • mqtt_client
  • inc
Macros
project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h File Reference

Go to the source code of this file.

Macros

#define | LWIP_IPV4 1
#define | NO_SYS 1
#define | SYS_LIGHTWEIGHT_PROT 0
#define | LWIP_NETCONN !NO_SYS
#define | LWIP_SOCKET !NO_SYS
#define | LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
#define | LWIP_NETBUF_RECVINFO 1
#define | LWIP_HAVE_LOOPIF 1
#define | LWIP_NETIF_LINK_CALLBACK 1
#define | LWIP_DNS 1
#define | DNS_DOES_NAME_CHECK 1
#define | LWIP_DHCP 0
#define | TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
#define | MEM_ALIGNMENT 4
#define | MEM_SIZE (20*1024)
#define | TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
#define | MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
#define | TCP_SND_BUF (2 * TCP_MSS)
#define | TCP_WND (2 * TCP_MSS)
#define | LWIP_WND_SCALE 0
#define | TCP_RCV_SCALE 0
#define | PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
#define | PBUF_POOL_BUFSIZE 1500
#define | LWIP_TCP 1
#define | TCP_TTL 255
#define | LWIP_IGMP 1
#define | LWIP_MDNS_RESPONDER 1
#define | LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
#define | ETHARP_SUPPORT_STATIC_ENTRIES 1
#define | MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
#define | MIB2_STATS 1
#define | LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */

Macro Definition Documentation

◆ DNS_DOES_NAME_CHECK

#define DNS_DOES_NAME_CHECK 1

Definition at line 54 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ ETHARP_SUPPORT_STATIC_ENTRIES

#define ETHARP_SUPPORT_STATIC_ENTRIES 1

Definition at line 90 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_DHCP

#define LWIP_DHCP 0

Definition at line 58 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_DNS

#define LWIP_DNS 1

Definition at line 53 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_HAVE_LOOPIF

#define LWIP_HAVE_LOOPIF 1

Definition at line 51 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_IGMP

#define LWIP_IGMP 1

Definition at line 85 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_IPV4

#define LWIP_IPV4 1

Definition at line 37 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_MDNS_RESPONDER

#define LWIP_MDNS_RESPONDER 1

Definition at line 86 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_MEM_ILLEGAL_FREE

#define LWIP_MEM_ILLEGAL_FREE ( msg ) /* to nothing */

Definition at line 101 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_NETBUF_RECVINFO

#define LWIP_NETBUF_RECVINFO 1

Definition at line 50 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_NETCONN

#define LWIP_NETCONN !NO_SYS

Definition at line 47 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_NETCONN_FULLDUPLEX

#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET

Definition at line 49 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_NETIF_LINK_CALLBACK

#define LWIP_NETIF_LINK_CALLBACK 1

Definition at line 52 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_NUM_NETIF_CLIENT_DATA

#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)

Definition at line 87 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_SOCKET

#define LWIP_SOCKET !NO_SYS

Definition at line 48 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_TCP

#define LWIP_TCP 1

Definition at line 81 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ LWIP_WND_SCALE

#define LWIP_WND_SCALE 0

Definition at line 73 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ MEM_ALIGNMENT

#define MEM_ALIGNMENT 4

Definition at line 67 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ MEM_SIZE

#define MEM_SIZE (20*1024)

Definition at line 68 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ MEMP_NUM_SYS_TIMEOUT

#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)

Definition at line 92 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ MEMP_NUM_TCP_SEG

#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN

Definition at line 70 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ MIB2_STATS

#define MIB2_STATS 1

Definition at line 95 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ NO_SYS

#define NO_SYS 1

Definition at line 45 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ PBUF_POOL_BUFSIZE

#define PBUF_POOL_BUFSIZE 1500

Definition at line 77 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ PBUF_POOL_SIZE

#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */

Definition at line 75 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ SYS_LIGHTWEIGHT_PROT

#define SYS_LIGHTWEIGHT_PROT 0

Definition at line 46 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ TCP_MSS

#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */

Definition at line 63 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ TCP_RCV_SCALE

#define TCP_RCV_SCALE 0

Definition at line 74 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ TCP_SND_BUF

#define TCP_SND_BUF (2 * TCP_MSS)

Definition at line 71 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ TCP_SND_QUEUELEN

#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS

Definition at line 69 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ TCP_TTL

#define TCP_TTL 255

Definition at line 82 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.

◆ TCP_WND

#define TCP_WND (2 * TCP_MSS)

Definition at line 72 of file project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h.


AT32F435/437 Firmwary Library: lwipopts.h Source File

  • emac
  • mqtt_client
  • inc
project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
21 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
25 * OF SUCH DAMAGE.
26 *
27 * This file is part of the lwIP TCP/IP stack.
28 *
29 * Author: Simon Goldschmidt
30 *
31 */
32#ifndef LWIP_HDR_LWIPOPTS_H
33#define LWIP_HDR_LWIPOPTS_H
34
35//#define LWIP_TESTMODE 0
36
37#define LWIP_IPV4 1
38//#define LWIP_TIMERS 0
39
40//#define LWIP_CHECKSUM_ON_COPY 1
41//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK 1
42//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL(printfmsg) LWIP_ASSERT("TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL", 0)
43
44/* We link to special sys_arch.c (for basic non-waiting API layers unit tests) */
45#define NO_SYS 1
46#define SYS_LIGHTWEIGHT_PROT 0
47#define LWIP_NETCONN !NO_SYS
48#define LWIP_SOCKET !NO_SYS
49#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
50#define LWIP_NETBUF_RECVINFO 1
51#define LWIP_HAVE_LOOPIF 1
52#define LWIP_NETIF_LINK_CALLBACK 1
53#define LWIP_DNS 1
54#define DNS_DOES_NAME_CHECK 1
55//#define TCPIP_THREAD_TEST
56
57/* Enable DHCP to test it, disable UDP checksum to easier inject packets */
58#define LWIP_DHCP 0
59
60/* Minimal changes to opt.h required for tcp unit tests: */
61/* TCP Maximum segment size. */
62
63#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
64/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
65 lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
66 byte alignment -> define MEM_ALIGNMENT to 2. */
67#define MEM_ALIGNMENT 4
68#define MEM_SIZE (20*1024)
69#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
70#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
71#define TCP_SND_BUF (2 * TCP_MSS)
72#define TCP_WND (2 * TCP_MSS)
73#define LWIP_WND_SCALE 0
74#define TCP_RCV_SCALE 0
75#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
76/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
77#define PBUF_POOL_BUFSIZE 1500
78//#define TCP_QUEUE_OOSEQ 0
79
80/* ---------- TCP options ---------- */
81#define LWIP_TCP 1
82#define TCP_TTL 255
83
84/* Enable IGMP and MDNS for MDNS tests */
85#define LWIP_IGMP 1
86#define LWIP_MDNS_RESPONDER 1
87#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
88
89/* Minimal changes to opt.h required for etharp unit tests: */
90#define ETHARP_SUPPORT_STATIC_ENTRIES 1
91
92#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
93
94/* MIB2 stats are required to check IPv4 reassembly results */
95#define MIB2_STATS 1
96
97/* netif tests want to test this, so enable: */
98//#define LWIP_NETIF_EXT_STATUS_CALLBACK 1
99
100/* Check lwip_stats.mem.illegal instead of asserting */
101#define LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */
102
103#endif /* LWIP_HDR_LWIPOPTS_H */


AT32F435/437 Firmwary Library: netconf.h File Reference

  • emac
  • mqtt_client
  • inc
Functions
project/at_start_f437/examples/emac/mqtt_client/inc/netconf.h File Reference

This file contains all the functions prototypes for the netconf.c file. More...

Go to the source code of this file.

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Detailed Description

This file contains all the functions prototypes for the netconf.c file.

Version
v2.0.9
Date
2022-06-28
        Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/mqtt_client/inc/netconf.h.


AT32F435/437 Firmwary Library: netconf.h Source File

  • emac
  • mqtt_client
  • inc
project/at_start_f437/examples/emac/mqtt_client/inc/netconf.h
Go to the documentation of this file.
1
28/* Define to prevent recursive inclusion -------------------------------------*/
29#ifndef __NETCONF_H
30#define __NETCONF_H
31
32#ifdef __cplusplus
33 extern "C" {
34#endif
35
47/* Includes ------------------------------------------------------------------*/
48void tcpip_stack_init(void);
49void lwip_pkt_handle(void);
50void time_update(void);
51void lwip_periodic_handle(volatile uint32_t localtime);
52
53
54#ifdef __cplusplus
55}
56#endif
57
65#endif /* __NETCONF_H */
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164


AT32F435/437 Firmwary Library: at32_emac.c File Reference

  • emac
  • mqtt_client
  • src
Functions | Variables
project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c File Reference

emac config program More...

#include "at32f435_437_board.h"
#include "lwip/dhcp.h"
#include "at32_emac.h"

Go to the source code of this file.

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
reset layer 1 More...
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Variables

emac_control_config_type mac_control_para

Detailed Description

emac config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c.

Function Documentation

◆ reset_phy()

static void reset_phy ( void )
static

reset layer 1

Parameters
none
Return values
none

Definition at line 261 of file project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c.

Referenced by emac_layer2_configuration().


AT32F435/437 Firmwary Library: at32_emac.c Source File

  • emac
  • mqtt_client
  • src
project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_board.h"
29#include "lwip/dhcp.h"
30#include "at32_emac.h"
31
40 emac_control_config_type mac_control_para;
41
47 error_status emac_system_init(void)
48{
49 error_status status;
50
51 emac_nvic_configuration();
52
53 /* emac periph clock enable */
54 crm_periph_clock_enable(CRM_EMAC_PERIPH_CLOCK, TRUE);
55 crm_periph_clock_enable(CRM_EMACTX_PERIPH_CLOCK, TRUE);
56 crm_periph_clock_enable(CRM_EMACRX_PERIPH_CLOCK, TRUE);
57
58 emac_pins_configuration();
59 status = emac_layer2_configuration();
60 emac_tmr_init();
61
62 return status;
63}
64
70void emac_nvic_configuration(void)
71{
72 nvic_irq_enable(EMAC_IRQn, 1, 0);
73}
74
80void emac_pins_configuration(void)
81{
82 gpio_init_type gpio_init_struct = {0};
83
84 /* emac pins clock enable */
85 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
87 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
88 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
89 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
90 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
91
92 /* pa2 -> mdio */
93 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_11);
94 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
95 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
96 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
97 gpio_init_struct.gpio_pins = GPIO_PINS_2;
98 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
99 gpio_init(GPIOA, &gpio_init_struct);
100
101 /* pc1 -> mdc */
102 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE1, GPIO_MUX_11);
103 gpio_init_struct.gpio_pins = GPIO_PINS_1;
104 gpio_init(GPIOC, &gpio_init_struct);
105
106 #ifdef MII_MODE
107 /*
108 pb12 -> tx_d0
109 pb13 -> tx_d1
110 pc2 -> tx_d2
111 pb8 -> tx_d3
112 pb11 -> tx_en
113 pc3 -> tx_clk
114 */
115 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_11);
116 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_11);
117 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_11);
118 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_11);
119 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_11 | GPIO_PINS_12 | GPIO_PINS_13;
120 gpio_init(GPIOB, &gpio_init_struct);
121
122 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_11);
123 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE3, GPIO_MUX_11);
124 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
125 gpio_init(GPIOC, &gpio_init_struct);
126
127 /*
128 pd8 -> rx_dv
129 pd9 -> rx_d0
130 pd10 -> rx_d1
131 pd11 -> rx_d2
132 pd12 -> rx_d3
133 */
134 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
135 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
136 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
137 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE11, GPIO_MUX_11);
138 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE12, GPIO_MUX_11);
139 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12;
140 gpio_init(GPIOD, &gpio_init_struct);
141
142 /*
143 pa1 -> rx_clk
144 pa0 -> crs
145 pa3 -> col
146 pb10 -> rx_er
147 */
148 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_11);
149 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
150 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_11);
151 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_3;
152 gpio_init(GPIOA, &gpio_init_struct);
153
154 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_11);
155 gpio_init_struct.gpio_pins = GPIO_PINS_10;
156 gpio_init(GPIOB, &gpio_init_struct);
157 #endif /* MII_MODE */
158
159 #ifdef RMII_MODE
160 /*
161 pb12 -> tx_d0
162 pb13 -> tx_d1
163 pb11 -> tx_en
164 */
165 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE11, GPIO_MUX_11);
166 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE13, GPIO_MUX_11);
167 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE14, GPIO_MUX_11);
168 gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_13 | GPIO_PINS_14;
169 gpio_init(GPIOG, &gpio_init_struct);
170
171 /*
172 pd8 -> rx_dv
173 pd9 -> rx_d0
174 pd10 -> rx_d1
175 */
176 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
177 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
178 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
179 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10;
180 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
181 gpio_init(GPIOD, &gpio_init_struct);
182
183
184 #endif /* RMII_MODE */
185 /*
186 pa1 -> ref_clk
187 */
188 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
189 gpio_init_struct.gpio_pins = GPIO_PINS_1;
190 gpio_init(GPIOA, &gpio_init_struct);
191
192 #if !CRYSTAL_ON_PHY
193 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_0);
194 gpio_init_struct.gpio_pins = GPIO_PINS_8;
195 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
196 gpio_init(GPIOA, &gpio_init_struct);
197 #endif
198}
199
205 error_status emac_layer2_configuration(void)
206{
207 emac_dma_config_type dma_control_para;
208 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
209 #ifdef MII_MODE
210 scfg_emac_interface_set(SCFG_EMAC_SELECT_MII);
211 #elif defined RMII_MODE
212 scfg_emac_interface_set(SCFG_EMAC_SELECT_RMII);
213 #endif
214 crm_clock_out1_set(CRM_CLKOUT1_PLL);
215 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_5, CRM_CLKOUT_DIV2_2);
216
217 /* reset phy */
218 reset_phy();
219 /* reset emac ahb bus */
220 emac_reset();
221
222 /* software reset emac dma */
223 emac_dma_software_reset_set();
224
225 while(emac_dma_software_reset_get() == SET);
226
227 emac_control_para_init(&mac_control_para);
228
229 mac_control_para.auto_nego = EMAC_AUTO_NEGOTIATION_ON;
230
231 if(emac_phy_init(&mac_control_para) == ERROR)
232 {
233 return ERROR;
234 }
235
236 emac_dma_para_init(&dma_control_para);
237
238 dma_control_para.rsf_enable = TRUE;
239 dma_control_para.tsf_enable = TRUE;
240 dma_control_para.osf_enable = TRUE;
241 dma_control_para.aab_enable = TRUE;
242 dma_control_para.usp_enable = TRUE;
243 dma_control_para.fb_enable = TRUE;
244 dma_control_para.flush_rx_disable = TRUE;
245 dma_control_para.rx_dma_pal = EMAC_DMA_PBL_32;
246 dma_control_para.tx_dma_pal = EMAC_DMA_PBL_32;
247 dma_control_para.priority_ratio = EMAC_DMA_2_RX_1_TX;
248
249 emac_dma_config(&dma_control_para);
250 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_NORMAL_SUMMARY, TRUE);
251 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_RX, TRUE);
252
253 return SUCCESS;
254}
255
261void static reset_phy(void)
262{
263 gpio_init_type gpio_init_struct = {0};
264 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
265 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
266 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE8, GPIO_MUX_0);
267 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
268 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
269 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
270 gpio_init_struct.gpio_pins = GPIO_PINS_15;
271 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
272 gpio_init(GPIOE, &gpio_init_struct);
273
274 gpio_init_struct.gpio_pins = GPIO_PINS_15;
275 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
276 gpio_init(GPIOG, &gpio_init_struct);
277 gpio_bits_reset(GPIOG, GPIO_PINS_15);
278 gpio_bits_reset(GPIOE, GPIO_PINS_15);
279 delay_ms(2);
280 gpio_bits_set(GPIOE, GPIO_PINS_15);
281 delay_ms(2);
282}
283
289 error_status emac_phy_register_reset(void)
290{
291 uint16_t data = 0;
292 uint32_t timeout = 0;
293 uint32_t i = 0;
294
295 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_RESET_BIT) == ERROR)
296 {
297 return ERROR;
298 }
299
300 for(i = 0; i < 0x000FFFFF; i++);
301
302 do
303 {
304 timeout++;
305 if(emac_phy_register_read(PHY_ADDRESS, PHY_CONTROL_REG, &data) == ERROR)
306 {
307 return ERROR;
308 }
309 } while((data & PHY_RESET_BIT) && (timeout < PHY_TIMEOUT));
310
311 for(i = 0; i < 0x00FFFFF; i++);
312 if(timeout == PHY_TIMEOUT)
313 {
314 return ERROR;
315 }
316 return SUCCESS;
317}
318
335 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
336{
337 uint16_t data = 0;
338 uint32_t timeout = 0;
339 if(nego == EMAC_AUTO_NEGOTIATION_ON)
340 {
341 do
342 {
343 timeout++;
344 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
345 {
346 return ERROR;
347 }
348 } while(!(data & PHY_LINKED_STATUS_BIT) && (timeout < PHY_TIMEOUT));
349
350 if(timeout == PHY_TIMEOUT)
351 {
352 return ERROR;
353 }
354
355 timeout = 0;
356
357 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_AUTO_NEGOTIATION_BIT) == ERROR)
358 {
359 return ERROR;
360 }
361
362
363 do
364 {
365 timeout++;
366 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
367 {
368 return ERROR;
369 }
370 } while(!(data & PHY_NEGO_COMPLETE_BIT) && (timeout < PHY_TIMEOUT));
371
372 if(timeout == PHY_TIMEOUT)
373 {
374 return ERROR;
375 }
376
377 if(emac_phy_register_read(PHY_ADDRESS, PHY_SPECIFIED_CS_REG, &data) == ERROR)
378 {
379 return ERROR;
380 }
381 #ifdef DM9162
382 if(data & PHY_FULL_DUPLEX_100MBPS_BIT)
383 {
384 emac_fast_speed_set(EMAC_SPEED_100MBPS);
385 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
386 }
387 else if(data & PHY_HALF_DUPLEX_100MBPS_BIT)
388 {
389 emac_fast_speed_set(EMAC_SPEED_100MBPS);
390 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
391 }
392 else if(data & PHY_FULL_DUPLEX_10MBPS_BIT)
393 {
394 emac_fast_speed_set(EMAC_SPEED_10MBPS);
395 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
396 }
397 else if(data & PHY_HALF_DUPLEX_10MBPS_BIT)
398 {
399 emac_fast_speed_set(EMAC_SPEED_10MBPS);
400 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
401 }
402 #else
403 if(data & PHY_DUPLEX_MODE)
404 {
405 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
406 }
407 else
408 {
409 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
410 }
411 if(data & PHY_SPEED_MODE)
412 {
413 emac_fast_speed_set(EMAC_SPEED_10MBPS);
414 }
415 else
416 {
417 emac_fast_speed_set(EMAC_SPEED_100MBPS);
418 }
419 #endif
420 }
421 else
422 {
423 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, (uint16_t)((mode << 8) | (speed << 13))) == ERROR)
424 {
425 return ERROR;
426 }
427 if(speed == EMAC_SPEED_100MBPS)
428 {
429 emac_fast_speed_set(EMAC_SPEED_100MBPS);
430 }
431 else
432 {
433 emac_fast_speed_set(EMAC_SPEED_10MBPS);
434 }
435 if(mode == EMAC_FULL_DUPLEX)
436 {
437 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
438 }
439 else
440 {
441 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
442 }
443 }
444
445 return SUCCESS;
446}
447
453 error_status emac_phy_init(emac_control_config_type *control_para)
454{
455 emac_clock_range_set();
456 if(emac_phy_register_reset() == ERROR)
457 {
458 return ERROR;
459 }
460
461 emac_control_config(control_para);
462 return SUCCESS;
463}
464
470uint16_t link_update(void)
471{
472 uint16_t link_data, link_state;
473 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &link_data) == ERROR)
474 {
475 return ERROR;
476 }
477
478 link_state = (link_data & PHY_LINKED_STATUS_BIT)>>2;
479 return link_state;
480}
481
487void ethernetif_set_link(void const *argument)
488{
489 uint16_t regvalue = 0;
490 struct netif *netif = (struct netif *)argument;
491
492 /* read phy_bsr*/
493 regvalue = link_update();
494
495 if(regvalue > 0)
496 {
497 at32_led_on(LED4);
498 at32_led_off(LED2);
499 }
500 else
501 {
502 at32_led_on(LED2);
503 at32_led_off(LED4);
504 }
505 /* check whether the netif link down and the phy link is up */
506 if(!netif_is_link_up(netif) && (regvalue))
507 {
508 /* network cable is connected */
509 netif_set_link_up(netif);
510 }
511 else if(netif_is_link_up(netif) && (!regvalue))
512 {
513 /* network cable is dis-connected */
514 netif_set_link_down(netif);
515 }
516}
517
523void ethernetif_notify_conn_changed(struct netif *netif)
524{
525 /* note : this is function could be implemented in user file
526 when the callback is needed,
527 */
528
529 if (netif_is_link_up(netif)) {
530 netif_set_up(netif);
531
532#if LWIP_DHCP
533 /* creates a new dhcp client for this interface on the first call.
534 note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
535 the predefined regular intervals after starting the client.
536 you can peek in the netif->dhcp struct for the actual dhcp status.*/
537 dhcp_start(netif);
538#endif
539 }
540 else
541 netif_set_down(netif);
542}
543
550void ethernetif_update_config(struct netif *netif)
551{
552 if(netif_is_link_up(netif))
553 {
554 emac_speed_config(mac_control_para.auto_nego, mac_control_para.duplex_mode, mac_control_para.fast_ethernet_speed);
555
556 delay_ms(300);
557 /* enable mac and dma transmission and reception */
558 emac_start();
559 }
560 else
561 {
562 /* disable mac and dma transmission and reception */
563 emac_stop();
564 }
565
566 ethernetif_notify_conn_changed(netif);
567}
568
574void emac_tmr_init(void)
575{
576 crm_clocks_freq_type crm_clocks_freq_struct = {0};
577 crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
578
579 crm_clocks_freq_get(&crm_clocks_freq_struct);
580 /* tmr1 configuration */
581 /* time base configuration */
582 /* systemclock/24000/100 = 100hz */
583 tmr_base_init(TMR6, 99, (crm_clocks_freq_struct.ahb_freq / 10000) - 1);
584 tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
585
586 /* overflow interrupt enable */
587 tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
588
589 /* tmr1 overflow interrupt nvic init */
590 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
591 nvic_irq_enable(TMR6_DAC_GLOBAL_IRQn, 0, 0);
592 tmr_counter_enable(TMR6, TRUE);
593}
594
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:80
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:205
PHY_AUTO_NEGOTIATION_BIT
#define PHY_AUTO_NEGOTIATION_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:64
PHY_RESET_BIT
#define PHY_RESET_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:66
PHY_ADDRESS
#define PHY_ADDRESS
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:59
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
PHY_FULL_DUPLEX_10MBPS_BIT
#define PHY_FULL_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:73
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:574
PHY_FULL_DUPLEX_100MBPS_BIT
#define PHY_FULL_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:71
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:70
PHY_SPECIFIED_CS_REG
#define PHY_SPECIFIED_CS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:62
PHY_CONTROL_REG
#define PHY_CONTROL_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:60
PHY_NEGO_COMPLETE_BIT
#define PHY_NEGO_COMPLETE_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:69
PHY_HALF_DUPLEX_100MBPS_BIT
#define PHY_HALF_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:72
PHY_STATUS_REG
#define PHY_STATUS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:61
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:335
PHY_LINKED_STATUS_BIT
#define PHY_LINKED_STATUS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:68
PHY_HALF_DUPLEX_10MBPS_BIT
#define PHY_HALF_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:74
mac_control_para
emac_control_config_type mac_control_para
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:40
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR6_PERIPH_CLOCK
@ CRM_TMR6_PERIPH_CLOCK
Definition: at32f435_437_crm.h:132
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_GPIOE_PERIPH_CLOCK
@ CRM_GPIOE_PERIPH_CLOCK
Definition: at32f435_437_crm.h:109
CRM_CLKOUT_DIV1_5
@ CRM_CLKOUT_DIV1_5
Definition: at32f435_437_crm.h:729
CRM_CLKOUT_DIV2_2
@ CRM_CLKOUT_DIV2_2
Definition: at32f435_437_crm.h:738
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
emac_dma_software_reset_set
void emac_dma_software_reset_set(void)
reset emac dma
Definition: at32f435_437_emac.c:156
emac_control_para_init
void emac_control_para_init(emac_control_config_type *control_para)
initialize emac control structure
Definition: at32f435_437_emac.c:70
emac_dma_software_reset_get
flag_status emac_dma_software_reset_get(void)
get emac dma reset status
Definition: at32f435_437_emac.c:166
emac_control_config
void emac_control_config(emac_control_config_type *control_struct)
configure emac control setting.
Definition: at32f435_437_emac.c:136
emac_phy_register_read
error_status emac_phy_register_read(uint8_t address, uint8_t reg, uint16_t *data)
read phy data
Definition: at32f435_437_emac.c:262
emac_reset
void emac_reset(void)
deinitialize the emac peripheral registers to their default reset values.
Definition: at32f435_437_emac.c:59
emac_start
void emac_start(void)
enable emac and dma reception/transmission
Definition: at32f435_437_emac.c:183
emac_duplex_mode_set
void emac_duplex_mode_set(emac_duplex_type duplex_mode)
set duplex mode.
Definition: at32f435_437_emac.c:463
emac_fast_speed_set
void emac_fast_speed_set(emac_speed_type speed)
set mac fast emac speed.
Definition: at32f435_437_emac.c:450
emac_clock_range_set
void emac_clock_range_set(void)
according to hclk to set mdc clock frequency.
Definition: at32f435_437_emac.c:93
emac_dma_interrupt_enable
void emac_dma_interrupt_enable(emac_dma_interrupt_type it, confirm_state new_state)
enable dma interrupt
Definition: at32f435_437_emac.c:1497
emac_dma_para_init
void emac_dma_para_init(emac_dma_config_type *control_para)
init emac dma parameters
Definition: at32f435_437_emac.c:1073
emac_phy_register_write
error_status emac_phy_register_write(uint8_t address, uint8_t reg, uint16_t data)
write phy data.
Definition: at32f435_437_emac.c:232
emac_dma_config
void emac_dma_config(emac_dma_config_type *control_para)
configure emac dma
Definition: at32f435_437_emac.c:1099
emac_stop
void emac_stop(void)
stop emac and dma reception/transmission
Definition: at32f435_437_emac.c:206
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
EMAC_HALF_DUPLEX
@ EMAC_HALF_DUPLEX
Definition: at32f435_437_emac.h:303
EMAC_FULL_DUPLEX
@ EMAC_FULL_DUPLEX
Definition: at32f435_437_emac.h:304
EMAC_DMA_PBL_32
@ EMAC_DMA_PBL_32
Definition: at32f435_437_emac.h:427
EMAC_SPEED_10MBPS
@ EMAC_SPEED_10MBPS
Definition: at32f435_437_emac.h:312
EMAC_SPEED_100MBPS
@ EMAC_SPEED_100MBPS
Definition: at32f435_437_emac.h:313
EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
@ EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
Definition: at32f435_437_emac.h:527
EMAC_DMA_INTERRUPT_RX
@ EMAC_DMA_INTERRUPT_RX
Definition: at32f435_437_emac.h:519
EMAC_AUTO_NEGOTIATION_ON
@ EMAC_AUTO_NEGOTIATION_ON
Definition: at32f435_437_emac.h:284
EMAC_DMA_2_RX_1_TX
@ EMAC_DMA_2_RX_1_TX
Definition: at32f435_437_emac.h:412
PHY_TIMEOUT
#define PHY_TIMEOUT
Definition: at32f435_437_emac.h:47
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_0
@ GPIO_MUX_0
Definition: at32f435_437_gpio.h:156
GPIO_MUX_11
@ GPIO_MUX_11
Definition: at32f435_437_gpio.h:167
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
GPIOE
#define GPIOE
Definition: at32f435_437_gpio.h:525
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_emac_interface_set
void scfg_emac_interface_set(scfg_emac_interface_type mode)
scfg emac interface set
Definition: at32f435_437_scfg.c:113
SCFG_EMAC_SELECT_MII
@ SCFG_EMAC_SELECT_MII
Definition: at32f435_437_scfg.h:139
SCFG_EMAC_SELECT_RMII
@ SCFG_EMAC_SELECT_RMII
Definition: at32f435_437_scfg.h:140
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
TMR6_DAC_GLOBAL_IRQn
@ TMR6_DAC_GLOBAL_IRQn
Definition: at32f435_437.h:202
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
reset_phy
static void reset_phy(void)
reset layer 1
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c:261
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::ahb_freq
uint32_t ahb_freq
Definition: at32f435_437_crm.h:790
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588
emac_control_config_type::auto_nego
emac_auto_negotiation_type auto_nego
Definition: at32f435_437_emac.h:589
emac_control_config_type::fast_ethernet_speed
emac_speed_type fast_ethernet_speed
Definition: at32f435_437_emac.h:598
emac_control_config_type::duplex_mode
emac_duplex_type duplex_mode
Definition: at32f435_437_emac.h:595
emac_dma_config_type
ethernet mac dma config type
Definition: at32f435_437_emac.h:609
emac_dma_config_type::tx_dma_pal
emac_dma_pbl_type tx_dma_pal
Definition: at32f435_437_emac.h:614
emac_dma_config_type::aab_enable
confirm_state aab_enable
Definition: at32f435_437_emac.h:610
emac_dma_config_type::rx_dma_pal
emac_dma_pbl_type rx_dma_pal
Definition: at32f435_437_emac.h:612
emac_dma_config_type::flush_rx_disable
confirm_state flush_rx_disable
Definition: at32f435_437_emac.h:620
emac_dma_config_type::priority_ratio
emac_dma_rx_tx_ratio_type priority_ratio
Definition: at32f435_437_emac.h:617
emac_dma_config_type::osf_enable
confirm_state osf_enable
Definition: at32f435_437_emac.h:626
emac_dma_config_type::usp_enable
confirm_state usp_enable
Definition: at32f435_437_emac.h:611
emac_dma_config_type::rsf_enable
confirm_state rsf_enable
Definition: at32f435_437_emac.h:619
emac_dma_config_type::tsf_enable
confirm_state tsf_enable
Definition: at32f435_437_emac.h:621
emac_dma_config_type::fb_enable
confirm_state fb_enable
Definition: at32f435_437_emac.h:613
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • emac
  • mqtt_client
  • src
Functions
project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • emac
  • mqtt_client
  • src
project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 125, 1, CRM_PLL_FR_4);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_4
@ CRM_PLL_FR_4
Definition: at32f435_437_crm.h:548
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • emac
  • mqtt_client
  • src
Functions
project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "netconf.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR6_DAC_GLOBAL_IRQHandler (void)
this function handles timer6 overflow handler. More...
void | EMAC_IRQHandler (void)
this function handles emac handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • emac
  • mqtt_client
  • src
project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "netconf.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void TMR6_DAC_GLOBAL_IRQHandler(void)
142{
143 if(tmr_flag_get(TMR6, TMR_OVF_FLAG) != RESET)
144 {
145 /* Update the local_time by adding SYSTEMTICK_PERIOD_MS each SysTick interrupt */
146 time_update();
147 tmr_flag_clear(TMR6, TMR_OVF_FLAG);
148 }
149}
150
156void EMAC_IRQHandler(void)
157{
158 /* handles all the received frames */
159 while(emac_received_packet_size_get() != 0)
160 {
161 lwip_pkt_handle();
162 }
163
164 /* clear the emac dma rx it pending bits */
165 emac_dma_flag_clear(EMAC_DMA_RI_FLAG);
166 emac_dma_flag_clear(EMAC_DMA_NIS_FLAG);
167}
168
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c:92
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c:53
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c:66
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c:105
EMAC_IRQHandler
void EMAC_IRQHandler(void)
this function handles emac handler.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c:156
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c:123
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c:44
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c:79
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c:132
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c:114
TMR6_DAC_GLOBAL_IRQHandler
void TMR6_DAC_GLOBAL_IRQHandler(void)
this function handles timer6 overflow handler.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c:141
emac_dma_flag_clear
void emac_dma_flag_clear(uint32_t dma_flag)
clear the emac dma flag.
Definition: at32f435_437_emac.c:2290
emac_received_packet_size_get
uint32_t emac_received_packet_size_get(void)
get the size of received the received packet.
Definition: at32f435_437_emac.c:1044
EMAC_DMA_RI_FLAG
#define EMAC_DMA_RI_FLAG
Definition: at32f435_437_emac.h:264
EMAC_DMA_NIS_FLAG
#define EMAC_DMA_NIS_FLAG
Definition: at32f435_437_emac.h:272
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • emac
  • mqtt_client
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/mqtt_client/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "at32_emac.h"
#include "netconf.h"
#include "mqtt_client.h"

Go to the source code of this file.

Macros

#define | DELAY 100
#define | FAST 1
#define | SLOW 4

Functions

int main (void)
main function. More...

Variables

uint8_t | g_speed = 1
volatile uint32_t | local_time = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/mqtt_client/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • emac
  • mqtt_client
  • src
project/at_start_f437/examples/emac/mqtt_client/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "at32_emac.h"
30#include "netconf.h"
31#include "mqtt_client.h"
32
41#define DELAY 100
42#define FAST 1
43#define SLOW 4
44uint8_t g_speed = FAST;
45volatile uint32_t local_time = 0;
46
52int main(void)
53{
54 error_status status;
55
56 system_clock_config();
57
58 uart_print_init(115200);
59
60 at32_board_init();
61
62 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
63
64 delay_init();
65
66 status = emac_system_init();
67
68 while(status == ERROR);
69
70 tcpip_stack_init();
71
72 mqtt_client_init();
73
74 while(1)
75 {
76 lwip_periodic_handle(local_time);
77 }
78}
79
at32f435_437_board.h
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
FAST
#define FAST
Definition: project/at_start_f437/examples/emac/mqtt_client/src/main.c:42
main
int main(void)
main function.
Definition: project/at_start_f437/examples/emac/mqtt_client/src/main.c:52
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/mqtt_client/src/main.c:45
g_speed
uint8_t g_speed
Definition: project/at_start_f437/examples/emac/mqtt_client/src/main.c:44
mqtt_client_init
err_t mqtt_client_init(void)
connect to mqtt server
Definition: mqtt_client.c:106
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
delay_init
void delay_init()
initialize delay function
Definition: at32f435_437_board.c:293
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
mqtt_client.h
mqtt client header
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: netconf.c File Reference

  • emac
  • mqtt_client
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/mqtt_client/src/netconf.c File Reference

network connection configuration More...

#include "lwip/memp.h"
#include "lwip/tcp.h"
#include "lwip/priv/tcp_priv.h"
#include "lwip/udp.h"
#include "netif/etharp.h"
#include "lwip/dhcp.h"
#include "ethernetif.h"
#include "netconf.h"
#include "stdio.h"
#include "at32_emac.h"
#include "mqtt_client.h"

Go to the source code of this file.

Macros

#define | MAC_ADDR_LENGTH (6)
#define | ADDR_LENGTH (4)
#define | SYSTEMTICK_PERIOD_MS 10

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Variables

uint8_t | message_cnt = 0
char | message_test [] = "Hello mqtt server, 000"
mqtt_client_t * | s__mqtt_client_instance
volatile uint32_t | local_time
struct netif | netif
struct tcp_pcb * | pcb
volatile uint32_t | tcp_timer = 0
volatile uint32_t | arp_timer = 0
volatile uint32_t | link_timer = 0
volatile uint32_t | mqtt_send_timer = 0
static uint8_t | mac_address [(6)] = {0, 0, 0x44, 0x45, 0x56, 1}
static uint8_t | local_ip [(4)] = {192, 168, 81, 37}
static uint8_t | local_gw [(4)] = {192, 168, 81, 187}
static uint8_t | local_mask [(4)] = {255, 255, 255, 0}

Detailed Description

network connection configuration

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/mqtt_client/src/netconf.c.


AT32F435/437 Firmwary Library: netconf.c Source File

  • emac
  • mqtt_client
  • src
project/at_start_f437/examples/emac/mqtt_client/src/netconf.c
Go to the documentation of this file.
1
27/* Includes ------------------------------------------------------------------*/
28#include "lwip/memp.h"
29#include "lwip/tcp.h"
30#include "lwip/priv/tcp_priv.h"
31#include "lwip/udp.h"
32#include "netif/etharp.h"
33#include "lwip/dhcp.h"
34#include "ethernetif.h"
35#include "netconf.h"
36#include "stdio.h"
37#include "at32_emac.h"
38#include "mqtt_client.h"
39
52/* Private define ------------------------------------------------------------*/
53/* Private macro -------------------------------------------------------------*/
54#define MAC_ADDR_LENGTH (6)
55#define ADDR_LENGTH (4)
56#define SYSTEMTICK_PERIOD_MS 10
57/* Private variables ---------------------------------------------------------*/
58uint8_t message_cnt = 0;
59char message_test[] = "Hello mqtt server, 000";
60extern mqtt_client_t *s__mqtt_client_instance;
61extern volatile uint32_t local_time;
62struct netif netif;
63struct tcp_pcb *pcb;
64volatile uint32_t tcp_timer = 0;
65volatile uint32_t arp_timer = 0;
66volatile uint32_t link_timer = 0;
67volatile uint32_t mqtt_send_timer = 0;
68
69static uint8_t mac_address[MAC_ADDR_LENGTH] = {0, 0, 0x44, 0x45, 0x56, 1};;
70#if LWIP_DHCP
71volatile uint32_t dhcp_fine_timer = 0;
72volatile uint32_t dhcp_coarse_timer = 0;
73#else
74static uint8_t local_ip[ADDR_LENGTH] = {192, 168, 81, 37};
75static uint8_t local_gw[ADDR_LENGTH] = {192, 168, 81, 187};
76static uint8_t local_mask[ADDR_LENGTH] = {255, 255, 255, 0};
77#endif
78
79/* Private function prototypes -----------------------------------------------*/
80/* Private functions ---------------------------------------------------------*/
81
87void tcpip_stack_init(void)
88{
89 ip_addr_t ipaddr;
90 ip_addr_t netmask;
91 ip_addr_t gw;
92
93 /* Initializes the dynamic memory heap defined by MEM_SIZE.*/
94 mem_init();
95
96 /* Initializes the memory pools defined by MEMP_NUM_x.*/
97 memp_init();
98
99
100#if LWIP_DHCP //need DHCP server
101 ipaddr.addr = 0;
102 netmask.addr = 0;
103 gw.addr = 0;
104
105#else
106 IP4_ADDR(&ipaddr, local_ip[0], local_ip[1], local_ip[2], local_ip[3]);
107 IP4_ADDR(&netmask, local_mask[0], local_mask[1], local_mask[2], local_mask[3]);
108 IP4_ADDR(&gw, local_gw[0], local_gw[1], local_gw[2], local_gw[3]);
109#endif
110
111 lwip_set_mac_address(mac_address);
112
113 /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
114 struct ip_addr *netmask, struct ip_addr *gw,
115 void *state, err_t (* init)(struct netif *netif),
116 err_t (* input)(struct pbuf *p, struct netif *netif))
117
118 Adds your network interface to the netif_list. Allocate a struct
119 netif and pass a pointer to this structure as the first argument.
120 Give pointers to cleared ip_addr structures when using DHCP,
121 or fill them with sane numbers otherwise. The state pointer may be NULL.
122
123 The init function pointer must point to a initialization function for
124 your ethernet netif interface. The following code illustrates it's use.*/
125
126 if(netif_add(&netif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &netif_input) == NULL)
127 {
128 while(1);
129 }
130
131 /* Registers the default network interface.*/
132 netif_set_default(&netif);
133
134 /* When the netif is fully configured this function must be called.*/
135 netif_set_up(&netif);
136
137 /* Set the link callback function, this function is called on change of link status*/
138 netif_set_link_callback(&netif, ethernetif_update_config);
139}
140
146void lwip_pkt_handle(void)
147{
148 /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */
149 if(ethernetif_input(&netif) != ERR_OK)
150 {
151 while(1);
152 }
153}
154
160void time_update(void)
161{
162 local_time += SYSTEMTICK_PERIOD_MS;
163}
164
170void lwip_periodic_handle(volatile uint32_t localtime)
171{
172
173 /* TCP periodic process every 250 ms */
174 if (localtime - tcp_timer >= TCP_TMR_INTERVAL)
175 {
176 tcp_timer = localtime;
177 tcp_tmr();
178 }
179 /* ARP periodic process every 5s */
180 if (localtime - arp_timer >= ARP_TMR_INTERVAL)
181 {
182 arp_timer = localtime;
183 etharp_tmr();
184 }
185
186#if LWIP_DHCP
187 /* Fine DHCP periodic process every 500ms */
188 if (localtime - dhcp_fine_timer >= DHCP_FINE_TIMER_MSECS)
189 {
190 dhcp_fine_timer = localtime;
191 dhcp_fine_tmr();
192 }
193 /* DHCP Coarse periodic process every 60s */
194 if (localtime - dhcp_coarse_timer >= DHCP_COARSE_TIMER_MSECS)
195 {
196 dhcp_coarse_timer = localtime;
197 dhcp_coarse_tmr();
198 }
199#endif
200
201#if (LINK_DETECTION > 0)
202 /* link detection process every 500 ms */
203 if (localtime - link_timer >= 500)
204 {
205 link_timer = localtime;
206 ethernetif_set_link(&netif);
207 }
208#endif
209
210 if (localtime - mqtt_send_timer >= 1000)
211 {
212 mqtt_send_timer = localtime;
213 message_test[19] = 0x30 + (message_cnt/100);
214 message_test[20] = 0x30 + (message_cnt/10%10);
215 message_test[21] = 0x30 + (message_cnt%10);
216 message_cnt++;
217 at32_mqtt_publish(s__mqtt_client_instance, "at_pub_topic",\
218 message_test, sizeof(message_test), 1, 0);
219 }
220}
221
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
at32_mqtt_publish
err_t at32_mqtt_publish(mqtt_client_t *client, char *pub_topic, char *pub_buf, uint16_t data_len, uint8_t qos, uint8_t retain)
mqtt send data to server
Definition: mqtt_client.c:221
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
local_mask
static uint8_t local_mask[(4)]
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:76
link_timer
volatile uint32_t link_timer
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:66
mqtt_send_timer
volatile uint32_t mqtt_send_timer
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:67
s__mqtt_client_instance
mqtt_client_t * s__mqtt_client_instance
Definition: mqtt_client.c:44
local_gw
static uint8_t local_gw[(4)]
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:75
message_test
char message_test[]
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:59
message_cnt
uint8_t message_cnt
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:58
ADDR_LENGTH
#define ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:55
arp_timer
volatile uint32_t arp_timer
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:65
MAC_ADDR_LENGTH
#define MAC_ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:54
pcb
struct tcp_pcb * pcb
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:63
SYSTEMTICK_PERIOD_MS
#define SYSTEMTICK_PERIOD_MS
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:56
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:49
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:62
tcp_timer
volatile uint32_t tcp_timer
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:64
local_ip
static uint8_t local_ip[(4)]
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:74
mac_address
static uint8_t mac_address[(6)]
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:69
mqtt_client.h
mqtt client header


AT32F435/437 Firmwary Library: at32_emac.h File Reference

  • emac
  • tcp_client
  • inc
Macros | Functions
project/at_start_f437/examples/emac/tcp_client/inc/at32_emac.h File Reference

header file of emac config program. More...

#include "at32f435_437.h"
#include "netif.h"

Go to the source code of this file.

Macros

#define | RX_REMAP (1)
#define | CRYSTAL_ON_PHY (0)
#define | RMII_MODE
#define | DM9162
#define | LINK_DETECTION (1)
#define | TCP_CLIENT_TEST_DATA "tcp client experiment!\n"
#define | PHY_ADDRESS (0x03)
#define | PHY_CONTROL_REG (0x00)
#define | PHY_STATUS_REG (0x01)
#define | PHY_SPECIFIED_CS_REG (0x11)
#define | PHY_AUTO_NEGOTIATION_BIT (0x1000)
#define | PHY_LOOPBACK_BIT (0x4000)
#define | PHY_RESET_BIT (0x8000)
#define | PHY_LINKED_STATUS_BIT (0x0004)
#define | PHY_NEGO_COMPLETE_BIT (0x0020)
#define | PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
#define | PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
#define | PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
#define | PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Detailed Description

header file of emac config program.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_client/inc/at32_emac.h.


AT32F435/437 Firmwary Library: at32_emac.h Source File

  • emac
  • tcp_client
  • inc
project/at_start_f437/examples/emac/tcp_client/inc/at32_emac.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32_EMAC_H
29#define __AT32_EMAC_H
30
31#ifdef __cplusplus
32 extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37#include "netif.h"
38
47#define RX_REMAP (1)
48#define CRYSTAL_ON_PHY (0)
49
50//#define MII_MODE
51#define RMII_MODE
52
53#define DM9162
54//#define DP83848
55
56#define LINK_DETECTION (1)
58#define TCP_CLIENT_TEST_DATA "tcp client experiment!\n"
59
60#if defined (DM9162)
61 #define PHY_ADDRESS (0x03)
62 #define PHY_CONTROL_REG (0x00)
63 #define PHY_STATUS_REG (0x01)
64 #define PHY_SPECIFIED_CS_REG (0x11)
65 /* phy control register */
66 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
67 #define PHY_LOOPBACK_BIT (0x4000)
68 #define PHY_RESET_BIT (0x8000)
69 /* phy status register */
70 #define PHY_LINKED_STATUS_BIT (0x0004)
71 #define PHY_NEGO_COMPLETE_BIT (0x0020)
72 /* phy specified control/status register */
73 #define PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
74 #define PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
75 #define PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
76 #define PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)
77#elif defined (DP83848)
78 #define PHY_ADDRESS (0x01)
79 #define PHY_CONTROL_REG (0x00)
80 #define PHY_STATUS_REG (0x01)
81 #define PHY_SPECIFIED_CS_REG (0x10)
82 /* phy control register */
83 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
84 #define PHY_LOOPBACK_BIT (0x4000)
85 #define PHY_RESET_BIT (0x8000)
86 /* phy status register */
87 #define PHY_LINKED_STATUS_BIT (0x0004)
88 #define PHY_NEGO_COMPLETE_BIT (0x0020)
90 #define PHY_DUPLEX_MODE (0x0004)
91 #define PHY_SPEED_MODE (0x0002)
92#endif
93
94 error_status emac_system_init(void);
95void emac_nvic_configuration(void);
96void emac_pins_configuration(void);
97 error_status emac_layer2_configuration(void);
98void static reset_phy(void);
99 error_status emac_phy_register_reset(void);
100 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed);
101 error_status emac_phy_init(emac_control_config_type *control_para);
102
103uint16_t link_update(void);
104void ethernetif_set_link(void const *argument);
105void ethernetif_notify_conn_changed(struct netif *netif);
106void ethernetif_update_config(struct netif *netif);
107void emac_tmr_init(void);
108
117#ifdef __cplusplus
118}
119#endif
120
121#endif
at32f435_437.h
at32f435_437 header file
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:80
reset_phy
static void reset_phy(void)
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:205
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:550
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:574
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:70
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:335
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
error_status
error_status
Definition: at32f435_437.h:380
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • emac
  • tcp_client
  • inc
project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • emac
  • tcp_client
  • inc
project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • emac
  • tcp_client
  • inc
project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: lwipopts.h File Reference

  • emac
  • tcp_client
  • inc
Macros
project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h File Reference

Go to the source code of this file.

Macros

#define | LWIP_IPV4 1
#define | NO_SYS 1
#define | SYS_LIGHTWEIGHT_PROT 0
#define | LWIP_NETCONN !NO_SYS
#define | LWIP_SOCKET !NO_SYS
#define | LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
#define | LWIP_NETBUF_RECVINFO 1
#define | LWIP_HAVE_LOOPIF 1
#define | LWIP_NETIF_LINK_CALLBACK 1
#define | LWIP_DNS 1
#define | DNS_DOES_NAME_CHECK 1
#define | LWIP_DHCP 0
#define | TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
#define | MEM_ALIGNMENT 4
#define | MEM_SIZE (20*1024)
#define | TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
#define | MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
#define | TCP_SND_BUF (2 * TCP_MSS)
#define | TCP_WND (2 * TCP_MSS)
#define | LWIP_WND_SCALE 0
#define | TCP_RCV_SCALE 0
#define | PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
#define | PBUF_POOL_BUFSIZE 1500
#define | LWIP_TCP 1
#define | TCP_TTL 255
#define | LWIP_IGMP 1
#define | LWIP_MDNS_RESPONDER 1
#define | LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
#define | ETHARP_SUPPORT_STATIC_ENTRIES 1
#define | MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
#define | MIB2_STATS 1
#define | LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */

Macro Definition Documentation

◆ DNS_DOES_NAME_CHECK

#define DNS_DOES_NAME_CHECK 1

Definition at line 54 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ ETHARP_SUPPORT_STATIC_ENTRIES

#define ETHARP_SUPPORT_STATIC_ENTRIES 1

Definition at line 90 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_DHCP

#define LWIP_DHCP 0

Definition at line 58 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_DNS

#define LWIP_DNS 1

Definition at line 53 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_HAVE_LOOPIF

#define LWIP_HAVE_LOOPIF 1

Definition at line 51 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_IGMP

#define LWIP_IGMP 1

Definition at line 85 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_IPV4

#define LWIP_IPV4 1

Definition at line 37 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_MDNS_RESPONDER

#define LWIP_MDNS_RESPONDER 1

Definition at line 86 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_MEM_ILLEGAL_FREE

#define LWIP_MEM_ILLEGAL_FREE ( msg ) /* to nothing */

Definition at line 101 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_NETBUF_RECVINFO

#define LWIP_NETBUF_RECVINFO 1

Definition at line 50 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_NETCONN

#define LWIP_NETCONN !NO_SYS

Definition at line 47 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_NETCONN_FULLDUPLEX

#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET

Definition at line 49 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_NETIF_LINK_CALLBACK

#define LWIP_NETIF_LINK_CALLBACK 1

Definition at line 52 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_NUM_NETIF_CLIENT_DATA

#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)

Definition at line 87 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_SOCKET

#define LWIP_SOCKET !NO_SYS

Definition at line 48 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_TCP

#define LWIP_TCP 1

Definition at line 81 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ LWIP_WND_SCALE

#define LWIP_WND_SCALE 0

Definition at line 73 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ MEM_ALIGNMENT

#define MEM_ALIGNMENT 4

Definition at line 67 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ MEM_SIZE

#define MEM_SIZE (20*1024)

Definition at line 68 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ MEMP_NUM_SYS_TIMEOUT

#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)

Definition at line 92 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ MEMP_NUM_TCP_SEG

#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN

Definition at line 70 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ MIB2_STATS

#define MIB2_STATS 1

Definition at line 95 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ NO_SYS

#define NO_SYS 1

Definition at line 45 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ PBUF_POOL_BUFSIZE

#define PBUF_POOL_BUFSIZE 1500

Definition at line 77 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ PBUF_POOL_SIZE

#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */

Definition at line 75 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ SYS_LIGHTWEIGHT_PROT

#define SYS_LIGHTWEIGHT_PROT 0

Definition at line 46 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ TCP_MSS

#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */

Definition at line 63 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ TCP_RCV_SCALE

#define TCP_RCV_SCALE 0

Definition at line 74 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ TCP_SND_BUF

#define TCP_SND_BUF (2 * TCP_MSS)

Definition at line 71 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ TCP_SND_QUEUELEN

#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS

Definition at line 69 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ TCP_TTL

#define TCP_TTL 255

Definition at line 82 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.

◆ TCP_WND

#define TCP_WND (2 * TCP_MSS)

Definition at line 72 of file project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h.


AT32F435/437 Firmwary Library: lwipopts.h Source File

  • emac
  • tcp_client
  • inc
project/at_start_f437/examples/emac/tcp_client/inc/lwipopts.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
21 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
25 * OF SUCH DAMAGE.
26 *
27 * This file is part of the lwIP TCP/IP stack.
28 *
29 * Author: Simon Goldschmidt
30 *
31 */
32#ifndef LWIP_HDR_LWIPOPTS_H
33#define LWIP_HDR_LWIPOPTS_H
34
35//#define LWIP_TESTMODE 0
36
37#define LWIP_IPV4 1
38//#define LWIP_TIMERS 0
39
40//#define LWIP_CHECKSUM_ON_COPY 1
41//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK 1
42//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL(printfmsg) LWIP_ASSERT("TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL", 0)
43
44/* We link to special sys_arch.c (for basic non-waiting API layers unit tests) */
45#define NO_SYS 1
46#define SYS_LIGHTWEIGHT_PROT 0
47#define LWIP_NETCONN !NO_SYS
48#define LWIP_SOCKET !NO_SYS
49#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
50#define LWIP_NETBUF_RECVINFO 1
51#define LWIP_HAVE_LOOPIF 1
52#define LWIP_NETIF_LINK_CALLBACK 1
53#define LWIP_DNS 1
54#define DNS_DOES_NAME_CHECK 1
55//#define TCPIP_THREAD_TEST
56
57/* Enable DHCP to test it, disable UDP checksum to easier inject packets */
58#define LWIP_DHCP 0
59
60/* Minimal changes to opt.h required for tcp unit tests: */
61/* TCP Maximum segment size. */
62
63#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
64/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
65 lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
66 byte alignment -> define MEM_ALIGNMENT to 2. */
67#define MEM_ALIGNMENT 4
68#define MEM_SIZE (20*1024)
69#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
70#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
71#define TCP_SND_BUF (2 * TCP_MSS)
72#define TCP_WND (2 * TCP_MSS)
73#define LWIP_WND_SCALE 0
74#define TCP_RCV_SCALE 0
75#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
76/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
77#define PBUF_POOL_BUFSIZE 1500
78//#define TCP_QUEUE_OOSEQ 0
79
80/* ---------- TCP options ---------- */
81#define LWIP_TCP 1
82#define TCP_TTL 255
83
84/* Enable IGMP and MDNS for MDNS tests */
85#define LWIP_IGMP 1
86#define LWIP_MDNS_RESPONDER 1
87#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
88
89/* Minimal changes to opt.h required for etharp unit tests: */
90#define ETHARP_SUPPORT_STATIC_ENTRIES 1
91
92#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
93
94/* MIB2 stats are required to check IPv4 reassembly results */
95#define MIB2_STATS 1
96
97/* netif tests want to test this, so enable: */
98//#define LWIP_NETIF_EXT_STATUS_CALLBACK 1
99
100/* Check lwip_stats.mem.illegal instead of asserting */
101#define LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */
102
103#endif /* LWIP_HDR_LWIPOPTS_H */


AT32F435/437 Firmwary Library: netconf.h File Reference

  • emac
  • tcp_client
  • inc
Functions
project/at_start_f437/examples/emac/tcp_client/inc/netconf.h File Reference

This file contains all the functions prototypes for the netconf.c file. More...

Go to the source code of this file.

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Detailed Description

This file contains all the functions prototypes for the netconf.c file.

Version
v2.0.9
Date
2022-06-28
        Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_client/inc/netconf.h.


AT32F435/437 Firmwary Library: netconf.h Source File

  • emac
  • tcp_client
  • inc
project/at_start_f437/examples/emac/tcp_client/inc/netconf.h
Go to the documentation of this file.
1
28/* Define to prevent recursive inclusion -------------------------------------*/
29#ifndef __NETCONF_H
30#define __NETCONF_H
31
32#ifdef __cplusplus
33 extern "C" {
34#endif
35
47/* Includes ------------------------------------------------------------------*/
48void tcpip_stack_init(void);
49void lwip_pkt_handle(void);
50void time_update(void);
51void lwip_periodic_handle(volatile uint32_t localtime);
52
53
54#ifdef __cplusplus
55}
56#endif
57
65#endif /* __NETCONF_H */
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164


AT32F435/437 Firmwary Library: at32_emac.c File Reference

  • emac
  • tcp_client
  • src
Functions | Variables
project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c File Reference

emac config program More...

#include "at32f435_437_board.h"
#include "lwip/dhcp.h"
#include "at32_emac.h"

Go to the source code of this file.

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
reset layer 1 More...
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Variables

emac_control_config_type mac_control_para

Detailed Description

emac config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c.

Function Documentation

◆ reset_phy()

static void reset_phy ( void )
static

reset layer 1

Parameters
none
Return values
none

Definition at line 261 of file project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c.

Referenced by emac_layer2_configuration().


AT32F435/437 Firmwary Library: at32_emac.c Source File

  • emac
  • tcp_client
  • src
project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_board.h"
29#include "lwip/dhcp.h"
30#include "at32_emac.h"
31
40 emac_control_config_type mac_control_para;
41
47 error_status emac_system_init(void)
48{
49 error_status status;
50
51 emac_nvic_configuration();
52
53 /* emac periph clock enable */
54 crm_periph_clock_enable(CRM_EMAC_PERIPH_CLOCK, TRUE);
55 crm_periph_clock_enable(CRM_EMACTX_PERIPH_CLOCK, TRUE);
56 crm_periph_clock_enable(CRM_EMACRX_PERIPH_CLOCK, TRUE);
57
58 emac_pins_configuration();
59 status = emac_layer2_configuration();
60 emac_tmr_init();
61
62 return status;
63}
64
70void emac_nvic_configuration(void)
71{
72 nvic_irq_enable(EMAC_IRQn, 1, 0);
73}
74
80void emac_pins_configuration(void)
81{
82 gpio_init_type gpio_init_struct = {0};
83
84 /* emac pins clock enable */
85 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
87 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
88 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
89 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
90 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
91
92 /* pa2 -> mdio */
93 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_11);
94 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
95 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
96 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
97 gpio_init_struct.gpio_pins = GPIO_PINS_2;
98 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
99 gpio_init(GPIOA, &gpio_init_struct);
100
101 /* pc1 -> mdc */
102 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE1, GPIO_MUX_11);
103 gpio_init_struct.gpio_pins = GPIO_PINS_1;
104 gpio_init(GPIOC, &gpio_init_struct);
105
106 #ifdef MII_MODE
107 /*
108 pb12 -> tx_d0
109 pb13 -> tx_d1
110 pc2 -> tx_d2
111 pb8 -> tx_d3
112 pb11 -> tx_en
113 pc3 -> tx_clk
114 */
115 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_11);
116 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_11);
117 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_11);
118 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_11);
119 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_11 | GPIO_PINS_12 | GPIO_PINS_13;
120 gpio_init(GPIOB, &gpio_init_struct);
121
122 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_11);
123 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE3, GPIO_MUX_11);
124 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
125 gpio_init(GPIOC, &gpio_init_struct);
126
127 /*
128 pd8 -> rx_dv
129 pd9 -> rx_d0
130 pd10 -> rx_d1
131 pd11 -> rx_d2
132 pd12 -> rx_d3
133 */
134 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
135 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
136 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
137 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE11, GPIO_MUX_11);
138 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE12, GPIO_MUX_11);
139 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12;
140 gpio_init(GPIOD, &gpio_init_struct);
141
142 /*
143 pa1 -> rx_clk
144 pa0 -> crs
145 pa3 -> col
146 pb10 -> rx_er
147 */
148 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_11);
149 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
150 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_11);
151 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_3;
152 gpio_init(GPIOA, &gpio_init_struct);
153
154 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_11);
155 gpio_init_struct.gpio_pins = GPIO_PINS_10;
156 gpio_init(GPIOB, &gpio_init_struct);
157 #endif /* MII_MODE */
158
159 #ifdef RMII_MODE
160 /*
161 pb12 -> tx_d0
162 pb13 -> tx_d1
163 pb11 -> tx_en
164 */
165 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE11, GPIO_MUX_11);
166 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE13, GPIO_MUX_11);
167 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE14, GPIO_MUX_11);
168 gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_13 | GPIO_PINS_14;
169 gpio_init(GPIOG, &gpio_init_struct);
170
171 /*
172 pd8 -> rx_dv
173 pd9 -> rx_d0
174 pd10 -> rx_d1
175 */
176 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
177 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
178 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
179 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10;
180 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
181 gpio_init(GPIOD, &gpio_init_struct);
182
183
184 #endif /* RMII_MODE */
185 /*
186 pa1 -> ref_clk
187 */
188 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
189 gpio_init_struct.gpio_pins = GPIO_PINS_1;
190 gpio_init(GPIOA, &gpio_init_struct);
191
192 #if !CRYSTAL_ON_PHY
193 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_0);
194 gpio_init_struct.gpio_pins = GPIO_PINS_8;
195 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
196 gpio_init(GPIOA, &gpio_init_struct);
197 #endif
198}
199
205 error_status emac_layer2_configuration(void)
206{
207 emac_dma_config_type dma_control_para;
208 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
209 #ifdef MII_MODE
210 scfg_emac_interface_set(SCFG_EMAC_SELECT_MII);
211 #elif defined RMII_MODE
212 scfg_emac_interface_set(SCFG_EMAC_SELECT_RMII);
213 #endif
214 crm_clock_out1_set(CRM_CLKOUT1_PLL);
215 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_5, CRM_CLKOUT_DIV2_2);
216
217 /* reset phy */
218 reset_phy();
219 /* reset emac ahb bus */
220 emac_reset();
221
222 /* software reset emac dma */
223 emac_dma_software_reset_set();
224
225 while(emac_dma_software_reset_get() == SET);
226
227 emac_control_para_init(&mac_control_para);
228
229 mac_control_para.auto_nego = EMAC_AUTO_NEGOTIATION_ON;
230
231 if(emac_phy_init(&mac_control_para) == ERROR)
232 {
233 return ERROR;
234 }
235
236 emac_dma_para_init(&dma_control_para);
237
238 dma_control_para.rsf_enable = TRUE;
239 dma_control_para.tsf_enable = TRUE;
240 dma_control_para.osf_enable = TRUE;
241 dma_control_para.aab_enable = TRUE;
242 dma_control_para.usp_enable = TRUE;
243 dma_control_para.fb_enable = TRUE;
244 dma_control_para.flush_rx_disable = TRUE;
245 dma_control_para.rx_dma_pal = EMAC_DMA_PBL_32;
246 dma_control_para.tx_dma_pal = EMAC_DMA_PBL_32;
247 dma_control_para.priority_ratio = EMAC_DMA_2_RX_1_TX;
248
249 emac_dma_config(&dma_control_para);
250 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_NORMAL_SUMMARY, TRUE);
251 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_RX, TRUE);
252
253 return SUCCESS;
254}
255
261void static reset_phy(void)
262{
263 gpio_init_type gpio_init_struct = {0};
264 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
265 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
266 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE8, GPIO_MUX_0);
267 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
268 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
269 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
270 gpio_init_struct.gpio_pins = GPIO_PINS_15;
271 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
272 gpio_init(GPIOE, &gpio_init_struct);
273
274 gpio_init_struct.gpio_pins = GPIO_PINS_15;
275 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
276 gpio_init(GPIOG, &gpio_init_struct);
277 gpio_bits_reset(GPIOG, GPIO_PINS_15);
278 gpio_bits_reset(GPIOE, GPIO_PINS_15);
279 delay_ms(2);
280 gpio_bits_set(GPIOE, GPIO_PINS_15);
281 delay_ms(2);
282}
283
289 error_status emac_phy_register_reset(void)
290{
291 uint16_t data = 0;
292 uint32_t timeout = 0;
293 uint32_t i = 0;
294
295 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_RESET_BIT) == ERROR)
296 {
297 return ERROR;
298 }
299
300 for(i = 0; i < 0x000FFFFF; i++);
301
302 do
303 {
304 timeout++;
305 if(emac_phy_register_read(PHY_ADDRESS, PHY_CONTROL_REG, &data) == ERROR)
306 {
307 return ERROR;
308 }
309 } while((data & PHY_RESET_BIT) && (timeout < PHY_TIMEOUT));
310
311 for(i = 0; i < 0x00FFFFF; i++);
312 if(timeout == PHY_TIMEOUT)
313 {
314 return ERROR;
315 }
316 return SUCCESS;
317}
318
335 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
336{
337 uint16_t data = 0;
338 uint32_t timeout = 0;
339 if(nego == EMAC_AUTO_NEGOTIATION_ON)
340 {
341 do
342 {
343 timeout++;
344 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
345 {
346 return ERROR;
347 }
348 } while(!(data & PHY_LINKED_STATUS_BIT) && (timeout < PHY_TIMEOUT));
349
350 if(timeout == PHY_TIMEOUT)
351 {
352 return ERROR;
353 }
354
355 timeout = 0;
356
357 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_AUTO_NEGOTIATION_BIT) == ERROR)
358 {
359 return ERROR;
360 }
361
362
363 do
364 {
365 timeout++;
366 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
367 {
368 return ERROR;
369 }
370 } while(!(data & PHY_NEGO_COMPLETE_BIT) && (timeout < PHY_TIMEOUT));
371
372 if(timeout == PHY_TIMEOUT)
373 {
374 return ERROR;
375 }
376
377 if(emac_phy_register_read(PHY_ADDRESS, PHY_SPECIFIED_CS_REG, &data) == ERROR)
378 {
379 return ERROR;
380 }
381 #ifdef DM9162
382 if(data & PHY_FULL_DUPLEX_100MBPS_BIT)
383 {
384 emac_fast_speed_set(EMAC_SPEED_100MBPS);
385 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
386 }
387 else if(data & PHY_HALF_DUPLEX_100MBPS_BIT)
388 {
389 emac_fast_speed_set(EMAC_SPEED_100MBPS);
390 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
391 }
392 else if(data & PHY_FULL_DUPLEX_10MBPS_BIT)
393 {
394 emac_fast_speed_set(EMAC_SPEED_10MBPS);
395 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
396 }
397 else if(data & PHY_HALF_DUPLEX_10MBPS_BIT)
398 {
399 emac_fast_speed_set(EMAC_SPEED_10MBPS);
400 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
401 }
402 #else
403 if(data & PHY_DUPLEX_MODE)
404 {
405 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
406 }
407 else
408 {
409 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
410 }
411 if(data & PHY_SPEED_MODE)
412 {
413 emac_fast_speed_set(EMAC_SPEED_10MBPS);
414 }
415 else
416 {
417 emac_fast_speed_set(EMAC_SPEED_100MBPS);
418 }
419 #endif
420 }
421 else
422 {
423 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, (uint16_t)((mode << 8) | (speed << 13))) == ERROR)
424 {
425 return ERROR;
426 }
427 if(speed == EMAC_SPEED_100MBPS)
428 {
429 emac_fast_speed_set(EMAC_SPEED_100MBPS);
430 }
431 else
432 {
433 emac_fast_speed_set(EMAC_SPEED_10MBPS);
434 }
435 if(mode == EMAC_FULL_DUPLEX)
436 {
437 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
438 }
439 else
440 {
441 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
442 }
443 }
444
445 return SUCCESS;
446}
447
453 error_status emac_phy_init(emac_control_config_type *control_para)
454{
455 emac_clock_range_set();
456 if(emac_phy_register_reset() == ERROR)
457 {
458 return ERROR;
459 }
460
461 emac_control_config(control_para);
462 return SUCCESS;
463}
464
470uint16_t link_update(void)
471{
472 uint16_t link_data, link_state;
473 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &link_data) == ERROR)
474 {
475 return ERROR;
476 }
477
478 link_state = (link_data & PHY_LINKED_STATUS_BIT)>>2;
479 return link_state;
480}
481
487void ethernetif_set_link(void const *argument)
488{
489 uint16_t regvalue = 0;
490 struct netif *netif = (struct netif *)argument;
491
492 /* read phy_bsr*/
493 regvalue = link_update();
494
495 if(regvalue > 0)
496 {
497 at32_led_on(LED4);
498 at32_led_off(LED2);
499 }
500 else
501 {
502 at32_led_on(LED2);
503 at32_led_off(LED4);
504 }
505 /* check whether the netif link down and the phy link is up */
506 if(!netif_is_link_up(netif) && (regvalue))
507 {
508 /* network cable is connected */
509 netif_set_link_up(netif);
510 }
511 else if(netif_is_link_up(netif) && (!regvalue))
512 {
513 /* network cable is dis-connected */
514 netif_set_link_down(netif);
515 }
516}
517
523void ethernetif_notify_conn_changed(struct netif *netif)
524{
525 /* note : this is function could be implemented in user file
526 when the callback is needed,
527 */
528
529 if (netif_is_link_up(netif)) {
530 netif_set_up(netif);
531
532#if LWIP_DHCP
533 /* creates a new dhcp client for this interface on the first call.
534 note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
535 the predefined regular intervals after starting the client.
536 you can peek in the netif->dhcp struct for the actual dhcp status.*/
537 dhcp_start(netif);
538#endif
539 }
540 else
541 netif_set_down(netif);
542}
543
550void ethernetif_update_config(struct netif *netif)
551{
552 if(netif_is_link_up(netif))
553 {
554 emac_speed_config(mac_control_para.auto_nego, mac_control_para.duplex_mode, mac_control_para.fast_ethernet_speed);
555
556 delay_ms(300);
557 /* enable mac and dma transmission and reception */
558 emac_start();
559 }
560 else
561 {
562 /* disable mac and dma transmission and reception */
563 emac_stop();
564 }
565
566 ethernetif_notify_conn_changed(netif);
567}
568
574void emac_tmr_init(void)
575{
576 crm_clocks_freq_type crm_clocks_freq_struct = {0};
577 crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
578
579 crm_clocks_freq_get(&crm_clocks_freq_struct);
580 /* tmr1 configuration */
581 /* time base configuration */
582 /* systemclock/24000/100 = 100hz */
583 tmr_base_init(TMR6, 99, (crm_clocks_freq_struct.ahb_freq / 10000) - 1);
584 tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
585
586 /* overflow interrupt enable */
587 tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
588
589 /* tmr1 overflow interrupt nvic init */
590 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
591 nvic_irq_enable(TMR6_DAC_GLOBAL_IRQn, 0, 0);
592 tmr_counter_enable(TMR6, TRUE);
593}
594
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:80
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:205
PHY_AUTO_NEGOTIATION_BIT
#define PHY_AUTO_NEGOTIATION_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:64
PHY_RESET_BIT
#define PHY_RESET_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:66
PHY_ADDRESS
#define PHY_ADDRESS
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:59
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
PHY_FULL_DUPLEX_10MBPS_BIT
#define PHY_FULL_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:73
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:574
PHY_FULL_DUPLEX_100MBPS_BIT
#define PHY_FULL_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:71
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:70
PHY_SPECIFIED_CS_REG
#define PHY_SPECIFIED_CS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:62
PHY_CONTROL_REG
#define PHY_CONTROL_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:60
PHY_NEGO_COMPLETE_BIT
#define PHY_NEGO_COMPLETE_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:69
PHY_HALF_DUPLEX_100MBPS_BIT
#define PHY_HALF_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:72
PHY_STATUS_REG
#define PHY_STATUS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:61
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:335
PHY_LINKED_STATUS_BIT
#define PHY_LINKED_STATUS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:68
PHY_HALF_DUPLEX_10MBPS_BIT
#define PHY_HALF_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:74
mac_control_para
emac_control_config_type mac_control_para
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:40
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR6_PERIPH_CLOCK
@ CRM_TMR6_PERIPH_CLOCK
Definition: at32f435_437_crm.h:132
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_GPIOE_PERIPH_CLOCK
@ CRM_GPIOE_PERIPH_CLOCK
Definition: at32f435_437_crm.h:109
CRM_CLKOUT_DIV1_5
@ CRM_CLKOUT_DIV1_5
Definition: at32f435_437_crm.h:729
CRM_CLKOUT_DIV2_2
@ CRM_CLKOUT_DIV2_2
Definition: at32f435_437_crm.h:738
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
emac_dma_software_reset_set
void emac_dma_software_reset_set(void)
reset emac dma
Definition: at32f435_437_emac.c:156
emac_control_para_init
void emac_control_para_init(emac_control_config_type *control_para)
initialize emac control structure
Definition: at32f435_437_emac.c:70
emac_dma_software_reset_get
flag_status emac_dma_software_reset_get(void)
get emac dma reset status
Definition: at32f435_437_emac.c:166
emac_control_config
void emac_control_config(emac_control_config_type *control_struct)
configure emac control setting.
Definition: at32f435_437_emac.c:136
emac_phy_register_read
error_status emac_phy_register_read(uint8_t address, uint8_t reg, uint16_t *data)
read phy data
Definition: at32f435_437_emac.c:262
emac_reset
void emac_reset(void)
deinitialize the emac peripheral registers to their default reset values.
Definition: at32f435_437_emac.c:59
emac_start
void emac_start(void)
enable emac and dma reception/transmission
Definition: at32f435_437_emac.c:183
emac_duplex_mode_set
void emac_duplex_mode_set(emac_duplex_type duplex_mode)
set duplex mode.
Definition: at32f435_437_emac.c:463
emac_fast_speed_set
void emac_fast_speed_set(emac_speed_type speed)
set mac fast emac speed.
Definition: at32f435_437_emac.c:450
emac_clock_range_set
void emac_clock_range_set(void)
according to hclk to set mdc clock frequency.
Definition: at32f435_437_emac.c:93
emac_dma_interrupt_enable
void emac_dma_interrupt_enable(emac_dma_interrupt_type it, confirm_state new_state)
enable dma interrupt
Definition: at32f435_437_emac.c:1497
emac_dma_para_init
void emac_dma_para_init(emac_dma_config_type *control_para)
init emac dma parameters
Definition: at32f435_437_emac.c:1073
emac_phy_register_write
error_status emac_phy_register_write(uint8_t address, uint8_t reg, uint16_t data)
write phy data.
Definition: at32f435_437_emac.c:232
emac_dma_config
void emac_dma_config(emac_dma_config_type *control_para)
configure emac dma
Definition: at32f435_437_emac.c:1099
emac_stop
void emac_stop(void)
stop emac and dma reception/transmission
Definition: at32f435_437_emac.c:206
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
EMAC_HALF_DUPLEX
@ EMAC_HALF_DUPLEX
Definition: at32f435_437_emac.h:303
EMAC_FULL_DUPLEX
@ EMAC_FULL_DUPLEX
Definition: at32f435_437_emac.h:304
EMAC_DMA_PBL_32
@ EMAC_DMA_PBL_32
Definition: at32f435_437_emac.h:427
EMAC_SPEED_10MBPS
@ EMAC_SPEED_10MBPS
Definition: at32f435_437_emac.h:312
EMAC_SPEED_100MBPS
@ EMAC_SPEED_100MBPS
Definition: at32f435_437_emac.h:313
EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
@ EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
Definition: at32f435_437_emac.h:527
EMAC_DMA_INTERRUPT_RX
@ EMAC_DMA_INTERRUPT_RX
Definition: at32f435_437_emac.h:519
EMAC_AUTO_NEGOTIATION_ON
@ EMAC_AUTO_NEGOTIATION_ON
Definition: at32f435_437_emac.h:284
EMAC_DMA_2_RX_1_TX
@ EMAC_DMA_2_RX_1_TX
Definition: at32f435_437_emac.h:412
PHY_TIMEOUT
#define PHY_TIMEOUT
Definition: at32f435_437_emac.h:47
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_0
@ GPIO_MUX_0
Definition: at32f435_437_gpio.h:156
GPIO_MUX_11
@ GPIO_MUX_11
Definition: at32f435_437_gpio.h:167
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
GPIOE
#define GPIOE
Definition: at32f435_437_gpio.h:525
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_emac_interface_set
void scfg_emac_interface_set(scfg_emac_interface_type mode)
scfg emac interface set
Definition: at32f435_437_scfg.c:113
SCFG_EMAC_SELECT_MII
@ SCFG_EMAC_SELECT_MII
Definition: at32f435_437_scfg.h:139
SCFG_EMAC_SELECT_RMII
@ SCFG_EMAC_SELECT_RMII
Definition: at32f435_437_scfg.h:140
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
TMR6_DAC_GLOBAL_IRQn
@ TMR6_DAC_GLOBAL_IRQn
Definition: at32f435_437.h:202
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
reset_phy
static void reset_phy(void)
reset layer 1
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c:261
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::ahb_freq
uint32_t ahb_freq
Definition: at32f435_437_crm.h:790
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588
emac_control_config_type::auto_nego
emac_auto_negotiation_type auto_nego
Definition: at32f435_437_emac.h:589
emac_control_config_type::fast_ethernet_speed
emac_speed_type fast_ethernet_speed
Definition: at32f435_437_emac.h:598
emac_control_config_type::duplex_mode
emac_duplex_type duplex_mode
Definition: at32f435_437_emac.h:595
emac_dma_config_type
ethernet mac dma config type
Definition: at32f435_437_emac.h:609
emac_dma_config_type::tx_dma_pal
emac_dma_pbl_type tx_dma_pal
Definition: at32f435_437_emac.h:614
emac_dma_config_type::aab_enable
confirm_state aab_enable
Definition: at32f435_437_emac.h:610
emac_dma_config_type::rx_dma_pal
emac_dma_pbl_type rx_dma_pal
Definition: at32f435_437_emac.h:612
emac_dma_config_type::flush_rx_disable
confirm_state flush_rx_disable
Definition: at32f435_437_emac.h:620
emac_dma_config_type::priority_ratio
emac_dma_rx_tx_ratio_type priority_ratio
Definition: at32f435_437_emac.h:617
emac_dma_config_type::osf_enable
confirm_state osf_enable
Definition: at32f435_437_emac.h:626
emac_dma_config_type::usp_enable
confirm_state usp_enable
Definition: at32f435_437_emac.h:611
emac_dma_config_type::rsf_enable
confirm_state rsf_enable
Definition: at32f435_437_emac.h:619
emac_dma_config_type::tsf_enable
confirm_state tsf_enable
Definition: at32f435_437_emac.h:621
emac_dma_config_type::fb_enable
confirm_state fb_enable
Definition: at32f435_437_emac.h:613
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • emac
  • tcp_client
  • src
Functions
project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • emac
  • tcp_client
  • src
project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 125, 1, CRM_PLL_FR_4);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_4
@ CRM_PLL_FR_4
Definition: at32f435_437_crm.h:548
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • emac
  • tcp_client
  • src
Functions
project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "netconf.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR6_DAC_GLOBAL_IRQHandler (void)
this function handles timer6 overflow handler. More...
void | EMAC_IRQHandler (void)
this function handles emac handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • emac
  • tcp_client
  • src
project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "netconf.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void TMR6_DAC_GLOBAL_IRQHandler(void)
142{
143 if(tmr_flag_get(TMR6, TMR_OVF_FLAG) != RESET)
144 {
145 /* Update the local_time by adding SYSTEMTICK_PERIOD_MS each SysTick interrupt */
146 time_update();
147 tmr_flag_clear(TMR6, TMR_OVF_FLAG);
148 }
149}
150
156void EMAC_IRQHandler(void)
157{
158 /* handles all the received frames */
159 while(emac_received_packet_size_get() != 0)
160 {
161 lwip_pkt_handle();
162 }
163
164 /* clear the emac dma rx it pending bits */
165 emac_dma_flag_clear(EMAC_DMA_RI_FLAG);
166 emac_dma_flag_clear(EMAC_DMA_NIS_FLAG);
167}
168
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c:92
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c:53
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c:66
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c:105
EMAC_IRQHandler
void EMAC_IRQHandler(void)
this function handles emac handler.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c:156
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c:123
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c:44
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c:79
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c:132
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c:114
TMR6_DAC_GLOBAL_IRQHandler
void TMR6_DAC_GLOBAL_IRQHandler(void)
this function handles timer6 overflow handler.
Definition: project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c:141
emac_dma_flag_clear
void emac_dma_flag_clear(uint32_t dma_flag)
clear the emac dma flag.
Definition: at32f435_437_emac.c:2290
emac_received_packet_size_get
uint32_t emac_received_packet_size_get(void)
get the size of received the received packet.
Definition: at32f435_437_emac.c:1044
EMAC_DMA_RI_FLAG
#define EMAC_DMA_RI_FLAG
Definition: at32f435_437_emac.h:264
EMAC_DMA_NIS_FLAG
#define EMAC_DMA_NIS_FLAG
Definition: at32f435_437_emac.h:272
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • emac
  • tcp_client
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/tcp_client/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "at32_emac.h"
#include "netconf.h"
#include "tcp_client.h"

Go to the source code of this file.

Macros

#define | DELAY 100
#define | FAST 1
#define | SLOW 4

Functions

int main (void)
main function. More...

Variables

uint8_t | g_speed = 1
volatile uint32_t | local_time = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_client/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • emac
  • tcp_client
  • src
project/at_start_f437/examples/emac/tcp_client/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "at32_emac.h"
30#include "netconf.h"
31#include "tcp_client.h"
32
41#define DELAY 100
42#define FAST 1
43#define SLOW 4
44uint8_t g_speed = FAST;
45volatile uint32_t local_time = 0;
46
52int main(void)
53{
54 error_status status;
55
56 system_clock_config();
57
58 at32_board_init();
59
60 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
61
62 delay_init();
63
64 status = emac_system_init();
65
66 while(status == ERROR);
67
68 tcpip_stack_init();
69
70 tcp_client_init(TCP_LOCAL_PORT,TCP_SERVER_PORT,TCP_SERVER_IP);
71
72 while(1)
73 {
74 lwip_periodic_handle(local_time);
75 }
76}
77
at32f435_437_board.h
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
FAST
#define FAST
Definition: project/at_start_f437/examples/emac/tcp_client/src/main.c:42
main
int main(void)
main function.
Definition: project/at_start_f437/examples/emac/tcp_client/src/main.c:52
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/tcp_client/src/main.c:45
g_speed
uint8_t g_speed
Definition: project/at_start_f437/examples/emac/tcp_client/src/main.c:44
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
delay_init
void delay_init()
initialize delay function
Definition: at32f435_437_board.c:293
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tcp_client_init
void tcp_client_init(uint16_t local_port, uint16_t remote_port, unsigned char a, unsigned char b, unsigned char c, unsigned char d)
initialize tcp client
Definition: tcp_client.c:144
TCP_LOCAL_PORT
#define TCP_LOCAL_PORT
Definition: tcp_client.h:50
TCP_SERVER_PORT
#define TCP_SERVER_PORT
Definition: tcp_client.h:51
TCP_SERVER_IP
#define TCP_SERVER_IP
Definition: tcp_client.h:53
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
tcp_client.h
tcp client header
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: netconf.c File Reference

  • emac
  • tcp_client
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/tcp_client/src/netconf.c File Reference

network connection configuration More...

#include "lwip/memp.h"
#include "lwip/tcp.h"
#include "lwip/priv/tcp_priv.h"
#include "lwip/udp.h"
#include "netif/etharp.h"
#include "lwip/dhcp.h"
#include "ethernetif.h"
#include "netconf.h"
#include "stdio.h"
#include "at32_emac.h"
#include "tcp_client.h"

Go to the source code of this file.

Macros

#define | MAC_ADDR_LENGTH (6)
#define | ADDR_LENGTH (4)
#define | SYSTEMTICK_PERIOD_MS 10

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Variables

volatile uint32_t | local_time
struct netif | netif
struct tcp_pcb * | pcb
volatile uint32_t | tcp_timer = 0
volatile uint32_t | arp_timer = 0
volatile uint32_t | link_timer = 0
volatile uint32_t | tcp_send_timer = 0
static uint8_t | mac_address [(6)] = {0, 0, 0x44, 0x45, 0x56, 1}
static uint8_t | local_ip [(4)] = {192, 168, 81, 37}
static uint8_t | local_gw [(4)] = {192, 168, 81, 187}
static uint8_t | local_mask [(4)] = {255, 255, 255, 0}

Detailed Description

network connection configuration

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_client/src/netconf.c.


AT32F435/437 Firmwary Library: netconf.c Source File

  • emac
  • tcp_client
  • src
project/at_start_f437/examples/emac/tcp_client/src/netconf.c
Go to the documentation of this file.
1
27/* Includes ------------------------------------------------------------------*/
28#include "lwip/memp.h"
29#include "lwip/tcp.h"
30#include "lwip/priv/tcp_priv.h"
31#include "lwip/udp.h"
32#include "netif/etharp.h"
33#include "lwip/dhcp.h"
34#include "ethernetif.h"
35#include "netconf.h"
36#include "stdio.h"
37#include "at32_emac.h"
38#include "tcp_client.h"
39
52/* Private define ------------------------------------------------------------*/
53/* Private macro -------------------------------------------------------------*/
54#define MAC_ADDR_LENGTH (6)
55#define ADDR_LENGTH (4)
56#define SYSTEMTICK_PERIOD_MS 10
57/* Private variables ---------------------------------------------------------*/
58extern volatile uint32_t local_time;
59struct netif netif;
60struct tcp_pcb *pcb;
61volatile uint32_t tcp_timer = 0;
62volatile uint32_t arp_timer = 0;
63volatile uint32_t link_timer = 0;
64volatile uint32_t tcp_send_timer = 0;
65
66static uint8_t mac_address[MAC_ADDR_LENGTH] = {0, 0, 0x44, 0x45, 0x56, 1};;
67#if LWIP_DHCP
68volatile uint32_t dhcp_fine_timer = 0;
69volatile uint32_t dhcp_coarse_timer = 0;
70#else
71static uint8_t local_ip[ADDR_LENGTH] = {192, 168, 81, 37};
72static uint8_t local_gw[ADDR_LENGTH] = {192, 168, 81, 187};
73static uint8_t local_mask[ADDR_LENGTH] = {255, 255, 255, 0};
74#endif
75
76/* Private function prototypes -----------------------------------------------*/
77/* Private functions ---------------------------------------------------------*/
78
84void tcpip_stack_init(void)
85{
86 ip_addr_t ipaddr;
87 ip_addr_t netmask;
88 ip_addr_t gw;
89
90 /* Initializes the dynamic memory heap defined by MEM_SIZE.*/
91 mem_init();
92
93 /* Initializes the memory pools defined by MEMP_NUM_x.*/
94 memp_init();
95
96
97#if LWIP_DHCP //need DHCP server
98 ipaddr.addr = 0;
99 netmask.addr = 0;
100 gw.addr = 0;
101
102#else
103 IP4_ADDR(&ipaddr, local_ip[0], local_ip[1], local_ip[2], local_ip[3]);
104 IP4_ADDR(&netmask, local_mask[0], local_mask[1], local_mask[2], local_mask[3]);
105 IP4_ADDR(&gw, local_gw[0], local_gw[1], local_gw[2], local_gw[3]);
106#endif
107
108 lwip_set_mac_address(mac_address);
109
110 /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
111 struct ip_addr *netmask, struct ip_addr *gw,
112 void *state, err_t (* init)(struct netif *netif),
113 err_t (* input)(struct pbuf *p, struct netif *netif))
114
115 Adds your network interface to the netif_list. Allocate a struct
116 netif and pass a pointer to this structure as the first argument.
117 Give pointers to cleared ip_addr structures when using DHCP,
118 or fill them with sane numbers otherwise. The state pointer may be NULL.
119
120 The init function pointer must point to a initialization function for
121 your ethernet netif interface. The following code illustrates it's use.*/
122
123 if(netif_add(&netif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &netif_input) == NULL)
124 {
125 while(1);
126 }
127
128 /* Registers the default network interface.*/
129 netif_set_default(&netif);
130
131 /* When the netif is fully configured this function must be called.*/
132 netif_set_up(&netif);
133
134 /* Set the link callback function, this function is called on change of link status*/
135 netif_set_link_callback(&netif, ethernetif_update_config);
136}
137
143void lwip_pkt_handle(void)
144{
145 /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */
146 if(ethernetif_input(&netif) != ERR_OK)
147 {
148 while(1);
149 }
150}
151
157void time_update(void)
158{
159 local_time += SYSTEMTICK_PERIOD_MS;
160}
161
167void lwip_periodic_handle(volatile uint32_t localtime)
168{
169
170 /* TCP periodic process every 250 ms */
171 if (localtime - tcp_timer >= TCP_TMR_INTERVAL)
172 {
173 tcp_timer = localtime;
174 tcp_tmr();
175 }
176 /* ARP periodic process every 5s */
177 if (localtime - arp_timer >= ARP_TMR_INTERVAL)
178 {
179 arp_timer = localtime;
180 etharp_tmr();
181 }
182
183#if LWIP_DHCP
184 /* Fine DHCP periodic process every 500ms */
185 if (localtime - dhcp_fine_timer >= DHCP_FINE_TIMER_MSECS)
186 {
187 dhcp_fine_timer = localtime;
188 dhcp_fine_tmr();
189 }
190 /* DHCP Coarse periodic process every 60s */
191 if (localtime - dhcp_coarse_timer >= DHCP_COARSE_TIMER_MSECS)
192 {
193 dhcp_coarse_timer = localtime;
194 dhcp_coarse_tmr();
195 }
196#endif
197
198#if (LINK_DETECTION > 0)
199 /* link detection process every 500 ms */
200 if (localtime - link_timer >= 500)
201 {
202 link_timer = localtime;
203 ethernetif_set_link(&netif);
204 }
205#endif
206
207 if (localtime - tcp_send_timer >= 1000)
208 {
209 tcp_send_timer = localtime;
210 pcb = check_tcp_connect();
211
212 if(pcb != NULL)
213 {
214 tcp_client_send_data(pcb, (unsigned char *)TCP_CLIENT_TEST_DATA, sizeof(TCP_CLIENT_TEST_DATA)); //Send data to TCP server actively
215 }
216 }
217}
218
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
TCP_CLIENT_TEST_DATA
#define TCP_CLIENT_TEST_DATA
Definition: project/at_start_f437/examples/emac/tcp_client/inc/at32_emac.h:58
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
check_tcp_connect
struct tcp_pcb * check_tcp_connect(void)
check connection
Definition: tcp_client.c:74
tcp_client_send_data
err_t tcp_client_send_data(struct tcp_pcb *cpcb, unsigned char *buff, unsigned int length)
tcp client send data
Definition: tcp_client.c:59
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
local_mask
static uint8_t local_mask[(4)]
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:73
link_timer
volatile uint32_t link_timer
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:63
local_gw
static uint8_t local_gw[(4)]
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:72
ADDR_LENGTH
#define ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:55
arp_timer
volatile uint32_t arp_timer
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:62
MAC_ADDR_LENGTH
#define MAC_ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:54
tcp_send_timer
volatile uint32_t tcp_send_timer
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:64
pcb
struct tcp_pcb * pcb
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:60
SYSTEMTICK_PERIOD_MS
#define SYSTEMTICK_PERIOD_MS
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:56
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:49
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:59
tcp_timer
volatile uint32_t tcp_timer
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:61
local_ip
static uint8_t local_ip[(4)]
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:71
mac_address
static uint8_t mac_address[(6)]
Definition: project/at_start_f437/examples/emac/tcp_client/src/netconf.c:66
tcp_client.h
tcp client header


AT32F435/437 Firmwary Library: at32_emac.h File Reference

  • emac
  • tcp_server
  • inc
Macros | Functions
project/at_start_f437/examples/emac/tcp_server/inc/at32_emac.h File Reference

header file of emac config program. More...

#include "at32f435_437.h"
#include "netif.h"

Go to the source code of this file.

Macros

#define | RX_REMAP (1)
#define | CRYSTAL_ON_PHY (0)
#define | RMII_MODE
#define | DM9162
#define | LINK_DETECTION (1)
#define | PHY_ADDRESS (0x03)
#define | PHY_CONTROL_REG (0x00)
#define | PHY_STATUS_REG (0x01)
#define | PHY_SPECIFIED_CS_REG (0x11)
#define | PHY_AUTO_NEGOTIATION_BIT (0x1000)
#define | PHY_LOOPBACK_BIT (0x4000)
#define | PHY_RESET_BIT (0x8000)
#define | PHY_LINKED_STATUS_BIT (0x0004)
#define | PHY_NEGO_COMPLETE_BIT (0x0020)
#define | PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
#define | PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
#define | PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
#define | PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Detailed Description

header file of emac config program.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_server/inc/at32_emac.h.


AT32F435/437 Firmwary Library: at32_emac.h Source File

  • emac
  • tcp_server
  • inc
project/at_start_f437/examples/emac/tcp_server/inc/at32_emac.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32_EMAC_H
29#define __AT32_EMAC_H
30
31#ifdef __cplusplus
32 extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37#include "netif.h"
38
47#define RX_REMAP (1)
48#define CRYSTAL_ON_PHY (0)
49
50//#define MII_MODE
51#define RMII_MODE
52
53#define DM9162
54//#define DP83848
55
56#define LINK_DETECTION (1)
58#if defined (DM9162)
59 #define PHY_ADDRESS (0x03)
60 #define PHY_CONTROL_REG (0x00)
61 #define PHY_STATUS_REG (0x01)
62 #define PHY_SPECIFIED_CS_REG (0x11)
63 /* phy control register */
64 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
65 #define PHY_LOOPBACK_BIT (0x4000)
66 #define PHY_RESET_BIT (0x8000)
67 /* phy status register */
68 #define PHY_LINKED_STATUS_BIT (0x0004)
69 #define PHY_NEGO_COMPLETE_BIT (0x0020)
70 /* phy specified control/status register */
71 #define PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
72 #define PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
73 #define PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
74 #define PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)
75#elif defined (DP83848)
76 #define PHY_ADDRESS (0x01)
77 #define PHY_CONTROL_REG (0x00)
78 #define PHY_STATUS_REG (0x01)
79 #define PHY_SPECIFIED_CS_REG (0x10)
80 /* phy control register */
81 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
82 #define PHY_LOOPBACK_BIT (0x4000)
83 #define PHY_RESET_BIT (0x8000)
84 /* phy status register */
85 #define PHY_LINKED_STATUS_BIT (0x0004)
86 #define PHY_NEGO_COMPLETE_BIT (0x0020)
88 #define PHY_DUPLEX_MODE (0x0004)
89 #define PHY_SPEED_MODE (0x0002)
90#endif
91
92 error_status emac_system_init(void);
93void emac_nvic_configuration(void);
94void emac_pins_configuration(void);
95 error_status emac_layer2_configuration(void);
96void static reset_phy(void);
97 error_status emac_phy_register_reset(void);
98 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed);
99 error_status emac_phy_init(emac_control_config_type *control_para);
100
101uint16_t link_update(void);
102void ethernetif_set_link(void const *argument);
103void ethernetif_notify_conn_changed(struct netif *netif);
104void ethernetif_update_config(struct netif *netif);
105void emac_tmr_init(void);
106
115#ifdef __cplusplus
116}
117#endif
118
119#endif
at32f435_437.h
at32f435_437 header file
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:80
reset_phy
static void reset_phy(void)
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:205
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:550
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:574
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:70
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:335
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
error_status
error_status
Definition: at32f435_437.h:380
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • emac
  • tcp_server
  • inc
project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • emac
  • tcp_server
  • inc
project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • emac
  • tcp_server
  • inc
project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: lwipopts.h File Reference

  • emac
  • tcp_server
  • inc
Macros
project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h File Reference

Go to the source code of this file.

Macros

#define | LWIP_IPV4 1
#define | NO_SYS 1
#define | SYS_LIGHTWEIGHT_PROT 0
#define | LWIP_NETCONN !NO_SYS
#define | LWIP_SOCKET !NO_SYS
#define | LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
#define | LWIP_NETBUF_RECVINFO 1
#define | LWIP_HAVE_LOOPIF 1
#define | LWIP_NETIF_LINK_CALLBACK 1
#define | LWIP_DNS 1
#define | DNS_DOES_NAME_CHECK 1
#define | LWIP_DHCP 0
#define | TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
#define | MEM_ALIGNMENT 4
#define | MEM_SIZE (20*1024)
#define | TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
#define | MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
#define | TCP_SND_BUF (2 * TCP_MSS)
#define | TCP_WND (2 * TCP_MSS)
#define | LWIP_WND_SCALE 0
#define | TCP_RCV_SCALE 0
#define | PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
#define | PBUF_POOL_BUFSIZE 1500
#define | LWIP_TCP 1
#define | TCP_TTL 255
#define | LWIP_IGMP 1
#define | LWIP_MDNS_RESPONDER 1
#define | LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
#define | ETHARP_SUPPORT_STATIC_ENTRIES 1
#define | MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
#define | MIB2_STATS 1
#define | LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */

Macro Definition Documentation

◆ DNS_DOES_NAME_CHECK

#define DNS_DOES_NAME_CHECK 1

Definition at line 54 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ ETHARP_SUPPORT_STATIC_ENTRIES

#define ETHARP_SUPPORT_STATIC_ENTRIES 1

Definition at line 90 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_DHCP

#define LWIP_DHCP 0

Definition at line 58 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_DNS

#define LWIP_DNS 1

Definition at line 53 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_HAVE_LOOPIF

#define LWIP_HAVE_LOOPIF 1

Definition at line 51 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_IGMP

#define LWIP_IGMP 1

Definition at line 85 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_IPV4

#define LWIP_IPV4 1

Definition at line 37 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_MDNS_RESPONDER

#define LWIP_MDNS_RESPONDER 1

Definition at line 86 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_MEM_ILLEGAL_FREE

#define LWIP_MEM_ILLEGAL_FREE ( msg ) /* to nothing */

Definition at line 101 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_NETBUF_RECVINFO

#define LWIP_NETBUF_RECVINFO 1

Definition at line 50 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_NETCONN

#define LWIP_NETCONN !NO_SYS

Definition at line 47 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_NETCONN_FULLDUPLEX

#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET

Definition at line 49 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_NETIF_LINK_CALLBACK

#define LWIP_NETIF_LINK_CALLBACK 1

Definition at line 52 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_NUM_NETIF_CLIENT_DATA

#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)

Definition at line 87 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_SOCKET

#define LWIP_SOCKET !NO_SYS

Definition at line 48 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_TCP

#define LWIP_TCP 1

Definition at line 81 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ LWIP_WND_SCALE

#define LWIP_WND_SCALE 0

Definition at line 73 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ MEM_ALIGNMENT

#define MEM_ALIGNMENT 4

Definition at line 67 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ MEM_SIZE

#define MEM_SIZE (20*1024)

Definition at line 68 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ MEMP_NUM_SYS_TIMEOUT

#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)

Definition at line 92 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ MEMP_NUM_TCP_SEG

#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN

Definition at line 70 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ MIB2_STATS

#define MIB2_STATS 1

Definition at line 95 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ NO_SYS

#define NO_SYS 1

Definition at line 45 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ PBUF_POOL_BUFSIZE

#define PBUF_POOL_BUFSIZE 1500

Definition at line 77 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ PBUF_POOL_SIZE

#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */

Definition at line 75 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ SYS_LIGHTWEIGHT_PROT

#define SYS_LIGHTWEIGHT_PROT 0

Definition at line 46 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ TCP_MSS

#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */

Definition at line 63 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ TCP_RCV_SCALE

#define TCP_RCV_SCALE 0

Definition at line 74 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ TCP_SND_BUF

#define TCP_SND_BUF (2 * TCP_MSS)

Definition at line 71 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ TCP_SND_QUEUELEN

#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS

Definition at line 69 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ TCP_TTL

#define TCP_TTL 255

Definition at line 82 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.

◆ TCP_WND

#define TCP_WND (2 * TCP_MSS)

Definition at line 72 of file project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h.


AT32F435/437 Firmwary Library: lwipopts.h Source File

  • emac
  • tcp_server
  • inc
project/at_start_f437/examples/emac/tcp_server/inc/lwipopts.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
21 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
25 * OF SUCH DAMAGE.
26 *
27 * This file is part of the lwIP TCP/IP stack.
28 *
29 * Author: Simon Goldschmidt
30 *
31 */
32#ifndef LWIP_HDR_LWIPOPTS_H
33#define LWIP_HDR_LWIPOPTS_H
34
35//#define LWIP_TESTMODE 0
36
37#define LWIP_IPV4 1
38//#define LWIP_TIMERS 0
39
40//#define LWIP_CHECKSUM_ON_COPY 1
41//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK 1
42//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL(printfmsg) LWIP_ASSERT("TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL", 0)
43
44/* We link to special sys_arch.c (for basic non-waiting API layers unit tests) */
45#define NO_SYS 1
46#define SYS_LIGHTWEIGHT_PROT 0
47#define LWIP_NETCONN !NO_SYS
48#define LWIP_SOCKET !NO_SYS
49#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
50#define LWIP_NETBUF_RECVINFO 1
51#define LWIP_HAVE_LOOPIF 1
52#define LWIP_NETIF_LINK_CALLBACK 1
53#define LWIP_DNS 1
54#define DNS_DOES_NAME_CHECK 1
55//#define TCPIP_THREAD_TEST
56
57/* Enable DHCP to test it, disable UDP checksum to easier inject packets */
58#define LWIP_DHCP 0
59
60/* Minimal changes to opt.h required for tcp unit tests: */
61/* TCP Maximum segment size. */
62
63#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
64/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
65 lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
66 byte alignment -> define MEM_ALIGNMENT to 2. */
67#define MEM_ALIGNMENT 4
68#define MEM_SIZE (20*1024)
69#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
70#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
71#define TCP_SND_BUF (2 * TCP_MSS)
72#define TCP_WND (2 * TCP_MSS)
73#define LWIP_WND_SCALE 0
74#define TCP_RCV_SCALE 0
75#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
76/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
77#define PBUF_POOL_BUFSIZE 1500
78//#define TCP_QUEUE_OOSEQ 0
79
80/* ---------- TCP options ---------- */
81#define LWIP_TCP 1
82#define TCP_TTL 255
83
84/* Enable IGMP and MDNS for MDNS tests */
85#define LWIP_IGMP 1
86#define LWIP_MDNS_RESPONDER 1
87#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
88
89/* Minimal changes to opt.h required for etharp unit tests: */
90#define ETHARP_SUPPORT_STATIC_ENTRIES 1
91
92#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
93
94/* MIB2 stats are required to check IPv4 reassembly results */
95#define MIB2_STATS 1
96
97/* netif tests want to test this, so enable: */
98//#define LWIP_NETIF_EXT_STATUS_CALLBACK 1
99
100/* Check lwip_stats.mem.illegal instead of asserting */
101#define LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */
102
103#endif /* LWIP_HDR_LWIPOPTS_H */


AT32F435/437 Firmwary Library: netconf.h File Reference

  • emac
  • tcp_server
  • inc
Functions
project/at_start_f437/examples/emac/tcp_server/inc/netconf.h File Reference

This file contains all the functions prototypes for the netconf.c file. More...

Go to the source code of this file.

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Detailed Description

This file contains all the functions prototypes for the netconf.c file.

Version
v2.0.9
Date
2022-06-28
        Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_server/inc/netconf.h.


AT32F435/437 Firmwary Library: netconf.h Source File

  • emac
  • tcp_server
  • inc
project/at_start_f437/examples/emac/tcp_server/inc/netconf.h
Go to the documentation of this file.
1
28/* Define to prevent recursive inclusion -------------------------------------*/
29#ifndef __NETCONF_H
30#define __NETCONF_H
31
32#ifdef __cplusplus
33 extern "C" {
34#endif
35
47/* Includes ------------------------------------------------------------------*/
48void tcpip_stack_init(void);
49void lwip_pkt_handle(void);
50void time_update(void);
51void lwip_periodic_handle(volatile uint32_t localtime);
52
53
54#ifdef __cplusplus
55}
56#endif
57
65#endif /* __NETCONF_H */
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164


AT32F435/437 Firmwary Library: at32_emac.c File Reference

  • emac
  • tcp_server
  • src
Functions | Variables
project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c File Reference

emac config program More...

#include "at32f435_437_board.h"
#include "lwip/dhcp.h"
#include "at32_emac.h"

Go to the source code of this file.

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
reset layer 1 More...
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Variables

emac_control_config_type mac_control_para

Detailed Description

emac config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c.

Function Documentation

◆ reset_phy()

static void reset_phy ( void )
static

reset layer 1

Parameters
none
Return values
none

Definition at line 261 of file project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c.

Referenced by emac_layer2_configuration().


AT32F435/437 Firmwary Library: at32_emac.c Source File

  • emac
  • tcp_server
  • src
project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_board.h"
29#include "lwip/dhcp.h"
30#include "at32_emac.h"
31
40 emac_control_config_type mac_control_para;
41
47 error_status emac_system_init(void)
48{
49 error_status status;
50
51 emac_nvic_configuration();
52
53 /* emac periph clock enable */
54 crm_periph_clock_enable(CRM_EMAC_PERIPH_CLOCK, TRUE);
55 crm_periph_clock_enable(CRM_EMACTX_PERIPH_CLOCK, TRUE);
56 crm_periph_clock_enable(CRM_EMACRX_PERIPH_CLOCK, TRUE);
57
58 emac_pins_configuration();
59 status = emac_layer2_configuration();
60 emac_tmr_init();
61
62 return status;
63}
64
70void emac_nvic_configuration(void)
71{
72 nvic_irq_enable(EMAC_IRQn, 1, 0);
73}
74
80void emac_pins_configuration(void)
81{
82 gpio_init_type gpio_init_struct = {0};
83
84 /* emac pins clock enable */
85 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
87 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
88 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
89 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
90 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
91
92 /* pa2 -> mdio */
93 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_11);
94 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
95 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
96 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
97 gpio_init_struct.gpio_pins = GPIO_PINS_2;
98 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
99 gpio_init(GPIOA, &gpio_init_struct);
100
101 /* pc1 -> mdc */
102 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE1, GPIO_MUX_11);
103 gpio_init_struct.gpio_pins = GPIO_PINS_1;
104 gpio_init(GPIOC, &gpio_init_struct);
105
106 #ifdef MII_MODE
107 /*
108 pb12 -> tx_d0
109 pb13 -> tx_d1
110 pc2 -> tx_d2
111 pb8 -> tx_d3
112 pb11 -> tx_en
113 pc3 -> tx_clk
114 */
115 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_11);
116 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_11);
117 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_11);
118 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_11);
119 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_11 | GPIO_PINS_12 | GPIO_PINS_13;
120 gpio_init(GPIOB, &gpio_init_struct);
121
122 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_11);
123 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE3, GPIO_MUX_11);
124 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
125 gpio_init(GPIOC, &gpio_init_struct);
126
127 /*
128 pd8 -> rx_dv
129 pd9 -> rx_d0
130 pd10 -> rx_d1
131 pd11 -> rx_d2
132 pd12 -> rx_d3
133 */
134 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
135 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
136 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
137 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE11, GPIO_MUX_11);
138 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE12, GPIO_MUX_11);
139 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12;
140 gpio_init(GPIOD, &gpio_init_struct);
141
142 /*
143 pa1 -> rx_clk
144 pa0 -> crs
145 pa3 -> col
146 pb10 -> rx_er
147 */
148 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_11);
149 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
150 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_11);
151 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_3;
152 gpio_init(GPIOA, &gpio_init_struct);
153
154 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_11);
155 gpio_init_struct.gpio_pins = GPIO_PINS_10;
156 gpio_init(GPIOB, &gpio_init_struct);
157 #endif /* MII_MODE */
158
159 #ifdef RMII_MODE
160 /*
161 pb12 -> tx_d0
162 pb13 -> tx_d1
163 pb11 -> tx_en
164 */
165 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE11, GPIO_MUX_11);
166 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE13, GPIO_MUX_11);
167 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE14, GPIO_MUX_11);
168 gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_13 | GPIO_PINS_14;
169 gpio_init(GPIOG, &gpio_init_struct);
170
171 /*
172 pd8 -> rx_dv
173 pd9 -> rx_d0
174 pd10 -> rx_d1
175 */
176 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
177 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
178 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
179 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10;
180 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
181 gpio_init(GPIOD, &gpio_init_struct);
182
183
184 #endif /* RMII_MODE */
185 /*
186 pa1 -> ref_clk
187 */
188 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
189 gpio_init_struct.gpio_pins = GPIO_PINS_1;
190 gpio_init(GPIOA, &gpio_init_struct);
191
192 #if !CRYSTAL_ON_PHY
193 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_0);
194 gpio_init_struct.gpio_pins = GPIO_PINS_8;
195 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
196 gpio_init(GPIOA, &gpio_init_struct);
197 #endif
198}
199
205 error_status emac_layer2_configuration(void)
206{
207 emac_dma_config_type dma_control_para;
208 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
209 #ifdef MII_MODE
210 scfg_emac_interface_set(SCFG_EMAC_SELECT_MII);
211 #elif defined RMII_MODE
212 scfg_emac_interface_set(SCFG_EMAC_SELECT_RMII);
213 #endif
214 crm_clock_out1_set(CRM_CLKOUT1_PLL);
215 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_5, CRM_CLKOUT_DIV2_2);
216
217 /* reset phy */
218 reset_phy();
219 /* reset emac ahb bus */
220 emac_reset();
221
222 /* software reset emac dma */
223 emac_dma_software_reset_set();
224
225 while(emac_dma_software_reset_get() == SET);
226
227 emac_control_para_init(&mac_control_para);
228
229 mac_control_para.auto_nego = EMAC_AUTO_NEGOTIATION_ON;
230
231 if(emac_phy_init(&mac_control_para) == ERROR)
232 {
233 return ERROR;
234 }
235
236 emac_dma_para_init(&dma_control_para);
237
238 dma_control_para.rsf_enable = TRUE;
239 dma_control_para.tsf_enable = TRUE;
240 dma_control_para.osf_enable = TRUE;
241 dma_control_para.aab_enable = TRUE;
242 dma_control_para.usp_enable = TRUE;
243 dma_control_para.fb_enable = TRUE;
244 dma_control_para.flush_rx_disable = TRUE;
245 dma_control_para.rx_dma_pal = EMAC_DMA_PBL_32;
246 dma_control_para.tx_dma_pal = EMAC_DMA_PBL_32;
247 dma_control_para.priority_ratio = EMAC_DMA_2_RX_1_TX;
248
249 emac_dma_config(&dma_control_para);
250 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_NORMAL_SUMMARY, TRUE);
251 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_RX, TRUE);
252
253 return SUCCESS;
254}
255
261void static reset_phy(void)
262{
263 gpio_init_type gpio_init_struct = {0};
264 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
265 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
266 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE8, GPIO_MUX_0);
267 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
268 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
269 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
270 gpio_init_struct.gpio_pins = GPIO_PINS_15;
271 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
272 gpio_init(GPIOE, &gpio_init_struct);
273
274 gpio_init_struct.gpio_pins = GPIO_PINS_15;
275 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
276 gpio_init(GPIOG, &gpio_init_struct);
277 gpio_bits_reset(GPIOG, GPIO_PINS_15);
278 gpio_bits_reset(GPIOE, GPIO_PINS_15);
279 delay_ms(2);
280 gpio_bits_set(GPIOE, GPIO_PINS_15);
281 delay_ms(2);
282}
283
289 error_status emac_phy_register_reset(void)
290{
291 uint16_t data = 0;
292 uint32_t timeout = 0;
293 uint32_t i = 0;
294
295 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_RESET_BIT) == ERROR)
296 {
297 return ERROR;
298 }
299
300 for(i = 0; i < 0x000FFFFF; i++);
301
302 do
303 {
304 timeout++;
305 if(emac_phy_register_read(PHY_ADDRESS, PHY_CONTROL_REG, &data) == ERROR)
306 {
307 return ERROR;
308 }
309 } while((data & PHY_RESET_BIT) && (timeout < PHY_TIMEOUT));
310
311 for(i = 0; i < 0x00FFFFF; i++);
312 if(timeout == PHY_TIMEOUT)
313 {
314 return ERROR;
315 }
316 return SUCCESS;
317}
318
335 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
336{
337 uint16_t data = 0;
338 uint32_t timeout = 0;
339 if(nego == EMAC_AUTO_NEGOTIATION_ON)
340 {
341 do
342 {
343 timeout++;
344 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
345 {
346 return ERROR;
347 }
348 } while(!(data & PHY_LINKED_STATUS_BIT) && (timeout < PHY_TIMEOUT));
349
350 if(timeout == PHY_TIMEOUT)
351 {
352 return ERROR;
353 }
354
355 timeout = 0;
356
357 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_AUTO_NEGOTIATION_BIT) == ERROR)
358 {
359 return ERROR;
360 }
361
362
363 do
364 {
365 timeout++;
366 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
367 {
368 return ERROR;
369 }
370 } while(!(data & PHY_NEGO_COMPLETE_BIT) && (timeout < PHY_TIMEOUT));
371
372 if(timeout == PHY_TIMEOUT)
373 {
374 return ERROR;
375 }
376
377 if(emac_phy_register_read(PHY_ADDRESS, PHY_SPECIFIED_CS_REG, &data) == ERROR)
378 {
379 return ERROR;
380 }
381 #ifdef DM9162
382 if(data & PHY_FULL_DUPLEX_100MBPS_BIT)
383 {
384 emac_fast_speed_set(EMAC_SPEED_100MBPS);
385 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
386 }
387 else if(data & PHY_HALF_DUPLEX_100MBPS_BIT)
388 {
389 emac_fast_speed_set(EMAC_SPEED_100MBPS);
390 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
391 }
392 else if(data & PHY_FULL_DUPLEX_10MBPS_BIT)
393 {
394 emac_fast_speed_set(EMAC_SPEED_10MBPS);
395 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
396 }
397 else if(data & PHY_HALF_DUPLEX_10MBPS_BIT)
398 {
399 emac_fast_speed_set(EMAC_SPEED_10MBPS);
400 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
401 }
402 #else
403 if(data & PHY_DUPLEX_MODE)
404 {
405 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
406 }
407 else
408 {
409 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
410 }
411 if(data & PHY_SPEED_MODE)
412 {
413 emac_fast_speed_set(EMAC_SPEED_10MBPS);
414 }
415 else
416 {
417 emac_fast_speed_set(EMAC_SPEED_100MBPS);
418 }
419 #endif
420 }
421 else
422 {
423 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, (uint16_t)((mode << 8) | (speed << 13))) == ERROR)
424 {
425 return ERROR;
426 }
427 if(speed == EMAC_SPEED_100MBPS)
428 {
429 emac_fast_speed_set(EMAC_SPEED_100MBPS);
430 }
431 else
432 {
433 emac_fast_speed_set(EMAC_SPEED_10MBPS);
434 }
435 if(mode == EMAC_FULL_DUPLEX)
436 {
437 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
438 }
439 else
440 {
441 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
442 }
443 }
444
445 return SUCCESS;
446}
447
453 error_status emac_phy_init(emac_control_config_type *control_para)
454{
455 emac_clock_range_set();
456 if(emac_phy_register_reset() == ERROR)
457 {
458 return ERROR;
459 }
460
461 emac_control_config(control_para);
462 return SUCCESS;
463}
464
470uint16_t link_update(void)
471{
472 uint16_t link_data, link_state;
473 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &link_data) == ERROR)
474 {
475 return ERROR;
476 }
477
478 link_state = (link_data & PHY_LINKED_STATUS_BIT)>>2;
479 return link_state;
480}
481
487void ethernetif_set_link(void const *argument)
488{
489 uint16_t regvalue = 0;
490 struct netif *netif = (struct netif *)argument;
491
492 /* read phy_bsr*/
493 regvalue = link_update();
494
495 if(regvalue > 0)
496 {
497 at32_led_on(LED4);
498 at32_led_off(LED2);
499 }
500 else
501 {
502 at32_led_on(LED2);
503 at32_led_off(LED4);
504 }
505 /* check whether the netif link down and the phy link is up */
506 if(!netif_is_link_up(netif) && (regvalue))
507 {
508 /* network cable is connected */
509 netif_set_link_up(netif);
510 }
511 else if(netif_is_link_up(netif) && (!regvalue))
512 {
513 /* network cable is dis-connected */
514 netif_set_link_down(netif);
515 }
516}
517
523void ethernetif_notify_conn_changed(struct netif *netif)
524{
525 /* note : this is function could be implemented in user file
526 when the callback is needed,
527 */
528
529 if (netif_is_link_up(netif)) {
530 netif_set_up(netif);
531
532#if LWIP_DHCP
533 /* creates a new dhcp client for this interface on the first call.
534 note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
535 the predefined regular intervals after starting the client.
536 you can peek in the netif->dhcp struct for the actual dhcp status.*/
537 dhcp_start(netif);
538#endif
539 }
540 else
541 netif_set_down(netif);
542}
543
550void ethernetif_update_config(struct netif *netif)
551{
552 if(netif_is_link_up(netif))
553 {
554 emac_speed_config(mac_control_para.auto_nego, mac_control_para.duplex_mode, mac_control_para.fast_ethernet_speed);
555
556 delay_ms(300);
557 /* enable mac and dma transmission and reception */
558 emac_start();
559 }
560 else
561 {
562 /* disable mac and dma transmission and reception */
563 emac_stop();
564 }
565
566 ethernetif_notify_conn_changed(netif);
567}
568
574void emac_tmr_init(void)
575{
576 crm_clocks_freq_type crm_clocks_freq_struct = {0};
577 crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
578
579 crm_clocks_freq_get(&crm_clocks_freq_struct);
580 /* tmr1 configuration */
581 /* time base configuration */
582 /* systemclock/24000/100 = 100hz */
583 tmr_base_init(TMR6, 99, (crm_clocks_freq_struct.ahb_freq / 10000) - 1);
584 tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
585
586 /* overflow interrupt enable */
587 tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
588
589 /* tmr1 overflow interrupt nvic init */
590 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
591 nvic_irq_enable(TMR6_DAC_GLOBAL_IRQn, 0, 0);
592 tmr_counter_enable(TMR6, TRUE);
593}
594
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:80
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:205
PHY_AUTO_NEGOTIATION_BIT
#define PHY_AUTO_NEGOTIATION_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:64
PHY_RESET_BIT
#define PHY_RESET_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:66
PHY_ADDRESS
#define PHY_ADDRESS
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:59
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
PHY_FULL_DUPLEX_10MBPS_BIT
#define PHY_FULL_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:73
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:574
PHY_FULL_DUPLEX_100MBPS_BIT
#define PHY_FULL_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:71
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:70
PHY_SPECIFIED_CS_REG
#define PHY_SPECIFIED_CS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:62
PHY_CONTROL_REG
#define PHY_CONTROL_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:60
PHY_NEGO_COMPLETE_BIT
#define PHY_NEGO_COMPLETE_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:69
PHY_HALF_DUPLEX_100MBPS_BIT
#define PHY_HALF_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:72
PHY_STATUS_REG
#define PHY_STATUS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:61
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:335
PHY_LINKED_STATUS_BIT
#define PHY_LINKED_STATUS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:68
PHY_HALF_DUPLEX_10MBPS_BIT
#define PHY_HALF_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:74
mac_control_para
emac_control_config_type mac_control_para
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:40
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR6_PERIPH_CLOCK
@ CRM_TMR6_PERIPH_CLOCK
Definition: at32f435_437_crm.h:132
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_GPIOE_PERIPH_CLOCK
@ CRM_GPIOE_PERIPH_CLOCK
Definition: at32f435_437_crm.h:109
CRM_CLKOUT_DIV1_5
@ CRM_CLKOUT_DIV1_5
Definition: at32f435_437_crm.h:729
CRM_CLKOUT_DIV2_2
@ CRM_CLKOUT_DIV2_2
Definition: at32f435_437_crm.h:738
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
emac_dma_software_reset_set
void emac_dma_software_reset_set(void)
reset emac dma
Definition: at32f435_437_emac.c:156
emac_control_para_init
void emac_control_para_init(emac_control_config_type *control_para)
initialize emac control structure
Definition: at32f435_437_emac.c:70
emac_dma_software_reset_get
flag_status emac_dma_software_reset_get(void)
get emac dma reset status
Definition: at32f435_437_emac.c:166
emac_control_config
void emac_control_config(emac_control_config_type *control_struct)
configure emac control setting.
Definition: at32f435_437_emac.c:136
emac_phy_register_read
error_status emac_phy_register_read(uint8_t address, uint8_t reg, uint16_t *data)
read phy data
Definition: at32f435_437_emac.c:262
emac_reset
void emac_reset(void)
deinitialize the emac peripheral registers to their default reset values.
Definition: at32f435_437_emac.c:59
emac_start
void emac_start(void)
enable emac and dma reception/transmission
Definition: at32f435_437_emac.c:183
emac_duplex_mode_set
void emac_duplex_mode_set(emac_duplex_type duplex_mode)
set duplex mode.
Definition: at32f435_437_emac.c:463
emac_fast_speed_set
void emac_fast_speed_set(emac_speed_type speed)
set mac fast emac speed.
Definition: at32f435_437_emac.c:450
emac_clock_range_set
void emac_clock_range_set(void)
according to hclk to set mdc clock frequency.
Definition: at32f435_437_emac.c:93
emac_dma_interrupt_enable
void emac_dma_interrupt_enable(emac_dma_interrupt_type it, confirm_state new_state)
enable dma interrupt
Definition: at32f435_437_emac.c:1497
emac_dma_para_init
void emac_dma_para_init(emac_dma_config_type *control_para)
init emac dma parameters
Definition: at32f435_437_emac.c:1073
emac_phy_register_write
error_status emac_phy_register_write(uint8_t address, uint8_t reg, uint16_t data)
write phy data.
Definition: at32f435_437_emac.c:232
emac_dma_config
void emac_dma_config(emac_dma_config_type *control_para)
configure emac dma
Definition: at32f435_437_emac.c:1099
emac_stop
void emac_stop(void)
stop emac and dma reception/transmission
Definition: at32f435_437_emac.c:206
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
EMAC_HALF_DUPLEX
@ EMAC_HALF_DUPLEX
Definition: at32f435_437_emac.h:303
EMAC_FULL_DUPLEX
@ EMAC_FULL_DUPLEX
Definition: at32f435_437_emac.h:304
EMAC_DMA_PBL_32
@ EMAC_DMA_PBL_32
Definition: at32f435_437_emac.h:427
EMAC_SPEED_10MBPS
@ EMAC_SPEED_10MBPS
Definition: at32f435_437_emac.h:312
EMAC_SPEED_100MBPS
@ EMAC_SPEED_100MBPS
Definition: at32f435_437_emac.h:313
EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
@ EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
Definition: at32f435_437_emac.h:527
EMAC_DMA_INTERRUPT_RX
@ EMAC_DMA_INTERRUPT_RX
Definition: at32f435_437_emac.h:519
EMAC_AUTO_NEGOTIATION_ON
@ EMAC_AUTO_NEGOTIATION_ON
Definition: at32f435_437_emac.h:284
EMAC_DMA_2_RX_1_TX
@ EMAC_DMA_2_RX_1_TX
Definition: at32f435_437_emac.h:412
PHY_TIMEOUT
#define PHY_TIMEOUT
Definition: at32f435_437_emac.h:47
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_0
@ GPIO_MUX_0
Definition: at32f435_437_gpio.h:156
GPIO_MUX_11
@ GPIO_MUX_11
Definition: at32f435_437_gpio.h:167
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
GPIOE
#define GPIOE
Definition: at32f435_437_gpio.h:525
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_emac_interface_set
void scfg_emac_interface_set(scfg_emac_interface_type mode)
scfg emac interface set
Definition: at32f435_437_scfg.c:113
SCFG_EMAC_SELECT_MII
@ SCFG_EMAC_SELECT_MII
Definition: at32f435_437_scfg.h:139
SCFG_EMAC_SELECT_RMII
@ SCFG_EMAC_SELECT_RMII
Definition: at32f435_437_scfg.h:140
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
TMR6_DAC_GLOBAL_IRQn
@ TMR6_DAC_GLOBAL_IRQn
Definition: at32f435_437.h:202
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
reset_phy
static void reset_phy(void)
reset layer 1
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c:261
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::ahb_freq
uint32_t ahb_freq
Definition: at32f435_437_crm.h:790
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588
emac_control_config_type::auto_nego
emac_auto_negotiation_type auto_nego
Definition: at32f435_437_emac.h:589
emac_control_config_type::fast_ethernet_speed
emac_speed_type fast_ethernet_speed
Definition: at32f435_437_emac.h:598
emac_control_config_type::duplex_mode
emac_duplex_type duplex_mode
Definition: at32f435_437_emac.h:595
emac_dma_config_type
ethernet mac dma config type
Definition: at32f435_437_emac.h:609
emac_dma_config_type::tx_dma_pal
emac_dma_pbl_type tx_dma_pal
Definition: at32f435_437_emac.h:614
emac_dma_config_type::aab_enable
confirm_state aab_enable
Definition: at32f435_437_emac.h:610
emac_dma_config_type::rx_dma_pal
emac_dma_pbl_type rx_dma_pal
Definition: at32f435_437_emac.h:612
emac_dma_config_type::flush_rx_disable
confirm_state flush_rx_disable
Definition: at32f435_437_emac.h:620
emac_dma_config_type::priority_ratio
emac_dma_rx_tx_ratio_type priority_ratio
Definition: at32f435_437_emac.h:617
emac_dma_config_type::osf_enable
confirm_state osf_enable
Definition: at32f435_437_emac.h:626
emac_dma_config_type::usp_enable
confirm_state usp_enable
Definition: at32f435_437_emac.h:611
emac_dma_config_type::rsf_enable
confirm_state rsf_enable
Definition: at32f435_437_emac.h:619
emac_dma_config_type::tsf_enable
confirm_state tsf_enable
Definition: at32f435_437_emac.h:621
emac_dma_config_type::fb_enable
confirm_state fb_enable
Definition: at32f435_437_emac.h:613
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • emac
  • tcp_server
  • src
Functions
project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • emac
  • tcp_server
  • src
project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 125, 1, CRM_PLL_FR_4);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_4
@ CRM_PLL_FR_4
Definition: at32f435_437_crm.h:548
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • emac
  • tcp_server
  • src
Functions
project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "netconf.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR6_DAC_GLOBAL_IRQHandler (void)
this function handles timer6 overflow handler. More...
void | EMAC_IRQHandler (void)
this function handles emac handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • emac
  • tcp_server
  • src
project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "netconf.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void TMR6_DAC_GLOBAL_IRQHandler(void)
142{
143 if(tmr_flag_get(TMR6, TMR_OVF_FLAG) != RESET)
144 {
145 /* Update the local_time by adding SYSTEMTICK_PERIOD_MS each SysTick interrupt */
146 time_update();
147 tmr_flag_clear(TMR6, TMR_OVF_FLAG);
148 }
149}
150
156void EMAC_IRQHandler(void)
157{
158 /* handles all the received frames */
159 while(emac_received_packet_size_get() != 0)
160 {
161 lwip_pkt_handle();
162 }
163
164 /* clear the emac dma rx it pending bits */
165 emac_dma_flag_clear(EMAC_DMA_RI_FLAG);
166 emac_dma_flag_clear(EMAC_DMA_NIS_FLAG);
167}
168
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c:92
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c:53
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c:66
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c:105
EMAC_IRQHandler
void EMAC_IRQHandler(void)
this function handles emac handler.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c:156
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c:123
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c:44
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c:79
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c:132
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c:114
TMR6_DAC_GLOBAL_IRQHandler
void TMR6_DAC_GLOBAL_IRQHandler(void)
this function handles timer6 overflow handler.
Definition: project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c:141
emac_dma_flag_clear
void emac_dma_flag_clear(uint32_t dma_flag)
clear the emac dma flag.
Definition: at32f435_437_emac.c:2290
emac_received_packet_size_get
uint32_t emac_received_packet_size_get(void)
get the size of received the received packet.
Definition: at32f435_437_emac.c:1044
EMAC_DMA_RI_FLAG
#define EMAC_DMA_RI_FLAG
Definition: at32f435_437_emac.h:264
EMAC_DMA_NIS_FLAG
#define EMAC_DMA_NIS_FLAG
Definition: at32f435_437_emac.h:272
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • emac
  • tcp_server
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/tcp_server/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "at32_emac.h"
#include "netconf.h"
#include "tcp_server.h"

Go to the source code of this file.

Macros

#define | DELAY 100
#define | FAST 1
#define | SLOW 4

Functions

int main (void)
main function. More...

Variables

uint8_t | g_speed = 1
volatile uint32_t | local_time = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_server/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • emac
  • tcp_server
  • src
project/at_start_f437/examples/emac/tcp_server/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "at32_emac.h"
30#include "netconf.h"
31#include "tcp_server.h"
32
41#define DELAY 100
42#define FAST 1
43#define SLOW 4
44
45uint8_t g_speed = FAST;
46volatile uint32_t local_time = 0;
47
53int main(void)
54{
55 error_status status;
56 system_clock_config();
57
58 at32_board_init();
59
60 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
61
62 delay_init();
63
64 status = emac_system_init();
65
66 while(status == ERROR);
67
68 tcpip_stack_init();
69
70 tcp_server_init();
71
72 while(1)
73 {
74 lwip_periodic_handle(local_time);
75 }
76}
77
at32f435_437_board.h
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
FAST
#define FAST
Definition: project/at_start_f437/examples/emac/tcp_server/src/main.c:42
main
int main(void)
main function.
Definition: project/at_start_f437/examples/emac/tcp_server/src/main.c:53
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/tcp_server/src/main.c:46
g_speed
uint8_t g_speed
Definition: project/at_start_f437/examples/emac/tcp_server/src/main.c:45
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
delay_init
void delay_init()
initialize delay function
Definition: at32f435_437_board.c:293
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tcp_server_init
void tcp_server_init(void)
initialize tcp server
Definition: tcp_server.c:93
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
tcp_server.h
tcp server header
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: netconf.c File Reference

  • emac
  • tcp_server
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/tcp_server/src/netconf.c File Reference

network connection configuration More...

#include "lwip/memp.h"
#include "lwip/tcp.h"
#include "lwip/priv/tcp_priv.h"
#include "lwip/udp.h"
#include "netif/etharp.h"
#include "lwip/dhcp.h"
#include "ethernetif.h"
#include "netconf.h"
#include "stdio.h"
#include "at32_emac.h"

Go to the source code of this file.

Macros

#define | MAC_ADDR_LENGTH (6)
#define | ADDR_LENGTH (4)
#define | SYSTEMTICK_PERIOD_MS 10

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Variables

volatile uint32_t | local_time
struct netif | netif
volatile uint32_t | tcp_timer = 0
volatile uint32_t | arp_timer = 0
volatile uint32_t | link_timer = 0
static uint8_t | mac_address [(6)] = {0, 0, 0x44, 0x45, 0x56, 1}
static uint8_t | local_ip [(4)] = {192, 168, 81, 37}
static uint8_t | local_gw [(4)] = {192, 168, 81, 187}
static uint8_t | local_mask [(4)] = {255, 255, 255, 0}

Detailed Description

network connection configuration

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/tcp_server/src/netconf.c.


AT32F435/437 Firmwary Library: netconf.c Source File

  • emac
  • tcp_server
  • src
project/at_start_f437/examples/emac/tcp_server/src/netconf.c
Go to the documentation of this file.
1
27/* Includes ------------------------------------------------------------------*/
28#include "lwip/memp.h"
29#include "lwip/tcp.h"
30#include "lwip/priv/tcp_priv.h"
31#include "lwip/udp.h"
32#include "netif/etharp.h"
33#include "lwip/dhcp.h"
34#include "ethernetif.h"
35#include "netconf.h"
36#include "stdio.h"
37#include "at32_emac.h"
38
51/* Private define ------------------------------------------------------------*/
52/* Private macro -------------------------------------------------------------*/
53#define MAC_ADDR_LENGTH (6)
54#define ADDR_LENGTH (4)
55#define SYSTEMTICK_PERIOD_MS 10
56/* Private variables ---------------------------------------------------------*/
57extern volatile uint32_t local_time;
58struct netif netif;
59volatile uint32_t tcp_timer = 0;
60volatile uint32_t arp_timer = 0;
61volatile uint32_t link_timer = 0;
62
63static uint8_t mac_address[MAC_ADDR_LENGTH] = {0, 0, 0x44, 0x45, 0x56, 1};;
64#if LWIP_DHCP
65volatile uint32_t dhcp_fine_timer = 0;
66volatile uint32_t dhcp_coarse_timer = 0;
67#else
68static uint8_t local_ip[ADDR_LENGTH] = {192, 168, 81, 37};
69static uint8_t local_gw[ADDR_LENGTH] = {192, 168, 81, 187};
70static uint8_t local_mask[ADDR_LENGTH] = {255, 255, 255, 0};
71#endif
72
73/* Private function prototypes -----------------------------------------------*/
74/* Private functions ---------------------------------------------------------*/
75
81void tcpip_stack_init(void)
82{
83 ip_addr_t ipaddr;
84 ip_addr_t netmask;
85 ip_addr_t gw;
86
87 /* Initializes the dynamic memory heap defined by MEM_SIZE.*/
88 mem_init();
89
90 /* Initializes the memory pools defined by MEMP_NUM_x.*/
91 memp_init();
92
93
94#if LWIP_DHCP //need DHCP server
95 ipaddr.addr = 0;
96 netmask.addr = 0;
97 gw.addr = 0;
98
99#else
100 IP4_ADDR(&ipaddr, local_ip[0], local_ip[1], local_ip[2], local_ip[3]);
101 IP4_ADDR(&netmask, local_mask[0], local_mask[1], local_mask[2], local_mask[3]);
102 IP4_ADDR(&gw, local_gw[0], local_gw[1], local_gw[2], local_gw[3]);
103#endif
104
105 lwip_set_mac_address(mac_address);
106
107 /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
108 struct ip_addr *netmask, struct ip_addr *gw,
109 void *state, err_t (* init)(struct netif *netif),
110 err_t (* input)(struct pbuf *p, struct netif *netif))
111
112 Adds your network interface to the netif_list. Allocate a struct
113 netif and pass a pointer to this structure as the first argument.
114 Give pointers to cleared ip_addr structures when using DHCP,
115 or fill them with sane numbers otherwise. The state pointer may be NULL.
116
117 The init function pointer must point to a initialization function for
118 your ethernet netif interface. The following code illustrates it's use.*/
119
120 if(netif_add(&netif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &netif_input) == NULL)
121 {
122 while(1);
123 }
124
125 /* Registers the default network interface.*/
126 netif_set_default(&netif);
127
128 /* When the netif is fully configured this function must be called.*/
129 netif_set_up(&netif);
130
131 /* Set the link callback function, this function is called on change of link status*/
132 netif_set_link_callback(&netif, ethernetif_update_config);
133}
134
140void lwip_pkt_handle(void)
141{
142 /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */
143 if(ethernetif_input(&netif) != ERR_OK)
144 {
145 while(1);
146 }
147}
148
154void time_update(void)
155{
156 local_time += SYSTEMTICK_PERIOD_MS;
157}
158
164void lwip_periodic_handle(volatile uint32_t localtime)
165{
166
167 /* TCP periodic process every 250 ms */
168 if (localtime - tcp_timer >= TCP_TMR_INTERVAL)
169 {
170 tcp_timer = localtime;
171 tcp_tmr();
172 }
173 /* ARP periodic process every 5s */
174 if (localtime - arp_timer >= ARP_TMR_INTERVAL)
175 {
176 arp_timer = localtime;
177 etharp_tmr();
178 }
179
180#if LWIP_DHCP
181 /* Fine DHCP periodic process every 500ms */
182 if (localtime - dhcp_fine_timer >= DHCP_FINE_TIMER_MSECS)
183 {
184 dhcp_fine_timer = localtime;
185 dhcp_fine_tmr();
186 }
187 /* DHCP Coarse periodic process every 60s */
188 if (localtime - dhcp_coarse_timer >= DHCP_COARSE_TIMER_MSECS)
189 {
190 dhcp_coarse_timer = localtime;
191 dhcp_coarse_tmr();
192 }
193#endif
194
195#if (LINK_DETECTION > 0)
196 /* link detection process every 500 ms */
197 if (localtime - link_timer >= 500)
198 {
199 link_timer = localtime;
200 ethernetif_set_link(&netif);
201 }
202#endif
203}
204
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
local_mask
static uint8_t local_mask[(4)]
Definition: project/at_start_f437/examples/emac/tcp_server/src/netconf.c:70
link_timer
volatile uint32_t link_timer
Definition: project/at_start_f437/examples/emac/tcp_server/src/netconf.c:61
local_gw
static uint8_t local_gw[(4)]
Definition: project/at_start_f437/examples/emac/tcp_server/src/netconf.c:69
ADDR_LENGTH
#define ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/tcp_server/src/netconf.c:54
arp_timer
volatile uint32_t arp_timer
Definition: project/at_start_f437/examples/emac/tcp_server/src/netconf.c:60
MAC_ADDR_LENGTH
#define MAC_ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/tcp_server/src/netconf.c:53
SYSTEMTICK_PERIOD_MS
#define SYSTEMTICK_PERIOD_MS
Definition: project/at_start_f437/examples/emac/tcp_server/src/netconf.c:55
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:49
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/tcp_server/src/netconf.c:58
tcp_timer
volatile uint32_t tcp_timer
Definition: project/at_start_f437/examples/emac/tcp_server/src/netconf.c:59
local_ip
static uint8_t local_ip[(4)]
Definition: project/at_start_f437/examples/emac/tcp_server/src/netconf.c:68
mac_address
static uint8_t mac_address[(6)]
Definition: project/at_start_f437/examples/emac/tcp_server/src/netconf.c:63


AT32F435/437 Firmwary Library: at32_emac.h File Reference

  • emac
  • telnet
  • inc
Macros | Functions
project/at_start_f437/examples/emac/telnet/inc/at32_emac.h File Reference

header file of emac config program. More...

#include "at32f435_437.h"
#include "netif.h"

Go to the source code of this file.

Macros

#define | RX_REMAP (1)
#define | CRYSTAL_ON_PHY (0)
#define | RMII_MODE
#define | DM9162
#define | LINK_DETECTION (1)
#define | PHY_ADDRESS (0x03)
#define | PHY_CONTROL_REG (0x00)
#define | PHY_STATUS_REG (0x01)
#define | PHY_SPECIFIED_CS_REG (0x11)
#define | PHY_AUTO_NEGOTIATION_BIT (0x1000)
#define | PHY_LOOPBACK_BIT (0x4000)
#define | PHY_RESET_BIT (0x8000)
#define | PHY_LINKED_STATUS_BIT (0x0004)
#define | PHY_NEGO_COMPLETE_BIT (0x0020)
#define | PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
#define | PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
#define | PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
#define | PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Detailed Description

header file of emac config program.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/telnet/inc/at32_emac.h.


AT32F435/437 Firmwary Library: at32_emac.h Source File

  • emac
  • telnet
  • inc
project/at_start_f437/examples/emac/telnet/inc/at32_emac.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32_EMAC_H
29#define __AT32_EMAC_H
30
31#ifdef __cplusplus
32 extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37#include "netif.h"
38
47#define RX_REMAP (1)
48#define CRYSTAL_ON_PHY (0)
49
50//#define MII_MODE
51#define RMII_MODE
52
53#define DM9162
54//#define DP83848
55
56#define LINK_DETECTION (1)
58#if defined (DM9162)
59 #define PHY_ADDRESS (0x03)
60 #define PHY_CONTROL_REG (0x00)
61 #define PHY_STATUS_REG (0x01)
62 #define PHY_SPECIFIED_CS_REG (0x11)
63 /* phy control register */
64 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
65 #define PHY_LOOPBACK_BIT (0x4000)
66 #define PHY_RESET_BIT (0x8000)
67 /* phy status register */
68 #define PHY_LINKED_STATUS_BIT (0x0004)
69 #define PHY_NEGO_COMPLETE_BIT (0x0020)
70 /* phy specified control/status register */
71 #define PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
72 #define PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
73 #define PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
74 #define PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)
75#elif defined (DP83848)
76 #define PHY_ADDRESS (0x01)
77 #define PHY_CONTROL_REG (0x00)
78 #define PHY_STATUS_REG (0x01)
79 #define PHY_SPECIFIED_CS_REG (0x10)
80 /* phy control register */
81 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
82 #define PHY_LOOPBACK_BIT (0x4000)
83 #define PHY_RESET_BIT (0x8000)
84 /* phy status register */
85 #define PHY_LINKED_STATUS_BIT (0x0004)
86 #define PHY_NEGO_COMPLETE_BIT (0x0020)
88 #define PHY_DUPLEX_MODE (0x0004)
89 #define PHY_SPEED_MODE (0x0002)
90#endif
91
92 error_status emac_system_init(void);
93void emac_nvic_configuration(void);
94void emac_pins_configuration(void);
95 error_status emac_layer2_configuration(void);
96void static reset_phy(void);
97 error_status emac_phy_register_reset(void);
98 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed);
99 error_status emac_phy_init(emac_control_config_type *control_para);
100
101uint16_t link_update(void);
102void ethernetif_set_link(void const *argument);
103void ethernetif_notify_conn_changed(struct netif *netif);
104void ethernetif_update_config(struct netif *netif);
105void emac_tmr_init(void);
106
115#ifdef __cplusplus
116}
117#endif
118
119#endif
at32f435_437.h
at32f435_437 header file
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:80
reset_phy
static void reset_phy(void)
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:205
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:550
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:574
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:70
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:335
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
error_status
error_status
Definition: at32f435_437.h:380
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • emac
  • telnet
  • inc
project/at_start_f437/examples/emac/telnet/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • emac
  • telnet
  • inc
project/at_start_f437/examples/emac/telnet/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • emac
  • telnet
  • inc
project/at_start_f437/examples/emac/telnet/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: lwipopts.h File Reference

  • emac
  • telnet
  • inc
Macros
project/at_start_f437/examples/emac/telnet/inc/lwipopts.h File Reference

Go to the source code of this file.

Macros

#define | LWIP_IPV4 1
#define | NO_SYS 1
#define | SYS_LIGHTWEIGHT_PROT 0
#define | LWIP_NETCONN !NO_SYS
#define | LWIP_SOCKET !NO_SYS
#define | LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
#define | LWIP_NETBUF_RECVINFO 1
#define | LWIP_HAVE_LOOPIF 1
#define | LWIP_NETIF_LINK_CALLBACK 1
#define | LWIP_DNS 1
#define | DNS_DOES_NAME_CHECK 1
#define | LWIP_DHCP 0
#define | TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
#define | MEM_ALIGNMENT 4
#define | MEM_SIZE (20*1024)
#define | TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
#define | MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
#define | TCP_SND_BUF (2 * TCP_MSS)
#define | TCP_WND (2 * TCP_MSS)
#define | LWIP_WND_SCALE 0
#define | TCP_RCV_SCALE 0
#define | PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
#define | PBUF_POOL_BUFSIZE 1500
#define | LWIP_TCP 1
#define | TCP_TTL 255
#define | LWIP_IGMP 1
#define | LWIP_MDNS_RESPONDER 1
#define | LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
#define | ETHARP_SUPPORT_STATIC_ENTRIES 1
#define | MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
#define | MIB2_STATS 1
#define | LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */

Macro Definition Documentation

◆ DNS_DOES_NAME_CHECK

#define DNS_DOES_NAME_CHECK 1

Definition at line 54 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ ETHARP_SUPPORT_STATIC_ENTRIES

#define ETHARP_SUPPORT_STATIC_ENTRIES 1

Definition at line 90 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_DHCP

#define LWIP_DHCP 0

Definition at line 58 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_DNS

#define LWIP_DNS 1

Definition at line 53 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_HAVE_LOOPIF

#define LWIP_HAVE_LOOPIF 1

Definition at line 51 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_IGMP

#define LWIP_IGMP 1

Definition at line 85 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_IPV4

#define LWIP_IPV4 1

Definition at line 37 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_MDNS_RESPONDER

#define LWIP_MDNS_RESPONDER 1

Definition at line 86 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_MEM_ILLEGAL_FREE

#define LWIP_MEM_ILLEGAL_FREE ( msg ) /* to nothing */

Definition at line 101 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_NETBUF_RECVINFO

#define LWIP_NETBUF_RECVINFO 1

Definition at line 50 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_NETCONN

#define LWIP_NETCONN !NO_SYS

Definition at line 47 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_NETCONN_FULLDUPLEX

#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET

Definition at line 49 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_NETIF_LINK_CALLBACK

#define LWIP_NETIF_LINK_CALLBACK 1

Definition at line 52 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_NUM_NETIF_CLIENT_DATA

#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)

Definition at line 87 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_SOCKET

#define LWIP_SOCKET !NO_SYS

Definition at line 48 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_TCP

#define LWIP_TCP 1

Definition at line 81 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ LWIP_WND_SCALE

#define LWIP_WND_SCALE 0

Definition at line 73 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ MEM_ALIGNMENT

#define MEM_ALIGNMENT 4

Definition at line 67 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ MEM_SIZE

#define MEM_SIZE (20*1024)

Definition at line 68 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ MEMP_NUM_SYS_TIMEOUT

#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)

Definition at line 92 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ MEMP_NUM_TCP_SEG

#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN

Definition at line 70 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ MIB2_STATS

#define MIB2_STATS 1

Definition at line 95 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ NO_SYS

#define NO_SYS 1

Definition at line 45 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ PBUF_POOL_BUFSIZE

#define PBUF_POOL_BUFSIZE 1500

Definition at line 77 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ PBUF_POOL_SIZE

#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */

Definition at line 75 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ SYS_LIGHTWEIGHT_PROT

#define SYS_LIGHTWEIGHT_PROT 0

Definition at line 46 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ TCP_MSS

#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */

Definition at line 63 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ TCP_RCV_SCALE

#define TCP_RCV_SCALE 0

Definition at line 74 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ TCP_SND_BUF

#define TCP_SND_BUF (2 * TCP_MSS)

Definition at line 71 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ TCP_SND_QUEUELEN

#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS

Definition at line 69 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ TCP_TTL

#define TCP_TTL 255

Definition at line 82 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.

◆ TCP_WND

#define TCP_WND (2 * TCP_MSS)

Definition at line 72 of file project/at_start_f437/examples/emac/telnet/inc/lwipopts.h.


AT32F435/437 Firmwary Library: lwipopts.h Source File

  • emac
  • telnet
  • inc
project/at_start_f437/examples/emac/telnet/inc/lwipopts.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
21 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
25 * OF SUCH DAMAGE.
26 *
27 * This file is part of the lwIP TCP/IP stack.
28 *
29 * Author: Simon Goldschmidt
30 *
31 */
32#ifndef LWIP_HDR_LWIPOPTS_H
33#define LWIP_HDR_LWIPOPTS_H
34
35//#define LWIP_TESTMODE 0
36
37#define LWIP_IPV4 1
38//#define LWIP_TIMERS 0
39
40//#define LWIP_CHECKSUM_ON_COPY 1
41//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK 1
42//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL(printfmsg) LWIP_ASSERT("TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL", 0)
43
44/* We link to special sys_arch.c (for basic non-waiting API layers unit tests) */
45#define NO_SYS 1
46#define SYS_LIGHTWEIGHT_PROT 0
47#define LWIP_NETCONN !NO_SYS
48#define LWIP_SOCKET !NO_SYS
49#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
50#define LWIP_NETBUF_RECVINFO 1
51#define LWIP_HAVE_LOOPIF 1
52#define LWIP_NETIF_LINK_CALLBACK 1
53#define LWIP_DNS 1
54#define DNS_DOES_NAME_CHECK 1
55//#define TCPIP_THREAD_TEST
56
57/* Enable DHCP to test it, disable UDP checksum to easier inject packets */
58#define LWIP_DHCP 0
59
60/* Minimal changes to opt.h required for tcp unit tests: */
61/* TCP Maximum segment size. */
62
63#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
64/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
65 lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
66 byte alignment -> define MEM_ALIGNMENT to 2. */
67#define MEM_ALIGNMENT 4
68#define MEM_SIZE (20*1024)
69#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
70#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
71#define TCP_SND_BUF (2 * TCP_MSS)
72#define TCP_WND (2 * TCP_MSS)
73#define LWIP_WND_SCALE 0
74#define TCP_RCV_SCALE 0
75#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
76/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
77#define PBUF_POOL_BUFSIZE 1500
78//#define TCP_QUEUE_OOSEQ 0
79
80/* ---------- TCP options ---------- */
81#define LWIP_TCP 1
82#define TCP_TTL 255
83
84/* Enable IGMP and MDNS for MDNS tests */
85#define LWIP_IGMP 1
86#define LWIP_MDNS_RESPONDER 1
87#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
88
89/* Minimal changes to opt.h required for etharp unit tests: */
90#define ETHARP_SUPPORT_STATIC_ENTRIES 1
91
92#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
93
94/* MIB2 stats are required to check IPv4 reassembly results */
95#define MIB2_STATS 1
96
97/* netif tests want to test this, so enable: */
98//#define LWIP_NETIF_EXT_STATUS_CALLBACK 1
99
100/* Check lwip_stats.mem.illegal instead of asserting */
101#define LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */
102
103#endif /* LWIP_HDR_LWIPOPTS_H */


AT32F435/437 Firmwary Library: netconf.h File Reference

  • emac
  • telnet
  • inc
Functions
project/at_start_f437/examples/emac/telnet/inc/netconf.h File Reference

This file contains all the functions prototypes for the netconf.c file. More...

Go to the source code of this file.

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Detailed Description

This file contains all the functions prototypes for the netconf.c file.

Version
v2.0.9
Date
2022-06-28
        Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/telnet/inc/netconf.h.


AT32F435/437 Firmwary Library: netconf.h Source File

  • emac
  • telnet
  • inc
project/at_start_f437/examples/emac/telnet/inc/netconf.h
Go to the documentation of this file.
1
28/* Define to prevent recursive inclusion -------------------------------------*/
29#ifndef __NETCONF_H
30#define __NETCONF_H
31
32#ifdef __cplusplus
33 extern "C" {
34#endif
35
47/* Includes ------------------------------------------------------------------*/
48void tcpip_stack_init(void);
49void lwip_pkt_handle(void);
50void time_update(void);
51void lwip_periodic_handle(volatile uint32_t localtime);
52
53
54#ifdef __cplusplus
55}
56#endif
57
65#endif /* __NETCONF_H */
66
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164


AT32F435/437 Firmwary Library: at32_emac.c File Reference

  • emac
  • telnet
  • src
Functions | Variables
project/at_start_f437/examples/emac/telnet/src/at32_emac.c File Reference

emac config program More...

#include "at32f435_437_board.h"
#include "lwip/dhcp.h"
#include "at32_emac.h"

Go to the source code of this file.

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
reset layer 1 More...
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Variables

emac_control_config_type mac_control_para

Detailed Description

emac config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/telnet/src/at32_emac.c.

Function Documentation

◆ reset_phy()

static void reset_phy ( void )
static

reset layer 1

Parameters
none
Return values
none

Definition at line 261 of file project/at_start_f437/examples/emac/telnet/src/at32_emac.c.

Referenced by emac_layer2_configuration().


AT32F435/437 Firmwary Library: at32_emac.c Source File

  • emac
  • telnet
  • src
project/at_start_f437/examples/emac/telnet/src/at32_emac.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_board.h"
29#include "lwip/dhcp.h"
30#include "at32_emac.h"
31
40 emac_control_config_type mac_control_para;
41
47 error_status emac_system_init(void)
48{
49 error_status status;
50
51 emac_nvic_configuration();
52
53 /* emac periph clock enable */
54 crm_periph_clock_enable(CRM_EMAC_PERIPH_CLOCK, TRUE);
55 crm_periph_clock_enable(CRM_EMACTX_PERIPH_CLOCK, TRUE);
56 crm_periph_clock_enable(CRM_EMACRX_PERIPH_CLOCK, TRUE);
57
58 emac_pins_configuration();
59 status = emac_layer2_configuration();
60 emac_tmr_init();
61
62 return status;
63}
64
70void emac_nvic_configuration(void)
71{
72 nvic_irq_enable(EMAC_IRQn, 1, 0);
73}
74
80void emac_pins_configuration(void)
81{
82 gpio_init_type gpio_init_struct = {0};
83
84 /* emac pins clock enable */
85 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
87 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
88 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
89 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
90 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
91
92 /* pa2 -> mdio */
93 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_11);
94 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
95 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
96 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
97 gpio_init_struct.gpio_pins = GPIO_PINS_2;
98 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
99 gpio_init(GPIOA, &gpio_init_struct);
100
101 /* pc1 -> mdc */
102 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE1, GPIO_MUX_11);
103 gpio_init_struct.gpio_pins = GPIO_PINS_1;
104 gpio_init(GPIOC, &gpio_init_struct);
105
106 #ifdef MII_MODE
107 /*
108 pb12 -> tx_d0
109 pb13 -> tx_d1
110 pc2 -> tx_d2
111 pb8 -> tx_d3
112 pb11 -> tx_en
113 pc3 -> tx_clk
114 */
115 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_11);
116 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_11);
117 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_11);
118 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_11);
119 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_11 | GPIO_PINS_12 | GPIO_PINS_13;
120 gpio_init(GPIOB, &gpio_init_struct);
121
122 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_11);
123 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE3, GPIO_MUX_11);
124 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
125 gpio_init(GPIOC, &gpio_init_struct);
126
127 /*
128 pd8 -> rx_dv
129 pd9 -> rx_d0
130 pd10 -> rx_d1
131 pd11 -> rx_d2
132 pd12 -> rx_d3
133 */
134 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
135 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
136 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
137 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE11, GPIO_MUX_11);
138 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE12, GPIO_MUX_11);
139 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12;
140 gpio_init(GPIOD, &gpio_init_struct);
141
142 /*
143 pa1 -> rx_clk
144 pa0 -> crs
145 pa3 -> col
146 pb10 -> rx_er
147 */
148 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_11);
149 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
150 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_11);
151 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_3;
152 gpio_init(GPIOA, &gpio_init_struct);
153
154 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_11);
155 gpio_init_struct.gpio_pins = GPIO_PINS_10;
156 gpio_init(GPIOB, &gpio_init_struct);
157 #endif /* MII_MODE */
158
159 #ifdef RMII_MODE
160 /*
161 pb12 -> tx_d0
162 pb13 -> tx_d1
163 pb11 -> tx_en
164 */
165 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE11, GPIO_MUX_11);
166 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE13, GPIO_MUX_11);
167 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE14, GPIO_MUX_11);
168 gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_13 | GPIO_PINS_14;
169 gpio_init(GPIOG, &gpio_init_struct);
170
171 /*
172 pd8 -> rx_dv
173 pd9 -> rx_d0
174 pd10 -> rx_d1
175 */
176 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
177 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
178 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
179 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10;
180 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
181 gpio_init(GPIOD, &gpio_init_struct);
182
183
184 #endif /* RMII_MODE */
185 /*
186 pa1 -> ref_clk
187 */
188 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
189 gpio_init_struct.gpio_pins = GPIO_PINS_1;
190 gpio_init(GPIOA, &gpio_init_struct);
191
192 #if !CRYSTAL_ON_PHY
193 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_0);
194 gpio_init_struct.gpio_pins = GPIO_PINS_8;
195 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
196 gpio_init(GPIOA, &gpio_init_struct);
197 #endif
198}
199
205 error_status emac_layer2_configuration(void)
206{
207 emac_dma_config_type dma_control_para;
208 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
209 #ifdef MII_MODE
210 scfg_emac_interface_set(SCFG_EMAC_SELECT_MII);
211 #elif defined RMII_MODE
212 scfg_emac_interface_set(SCFG_EMAC_SELECT_RMII);
213 #endif
214 crm_clock_out1_set(CRM_CLKOUT1_PLL);
215 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_5, CRM_CLKOUT_DIV2_2);
216
217 /* reset phy */
218 reset_phy();
219 /* reset emac ahb bus */
220 emac_reset();
221
222 /* software reset emac dma */
223 emac_dma_software_reset_set();
224
225 while(emac_dma_software_reset_get() == SET);
226
227 emac_control_para_init(&mac_control_para);
228
229 mac_control_para.auto_nego = EMAC_AUTO_NEGOTIATION_ON;
230
231 if(emac_phy_init(&mac_control_para) == ERROR)
232 {
233 return ERROR;
234 }
235
236 emac_dma_para_init(&dma_control_para);
237
238 dma_control_para.rsf_enable = TRUE;
239 dma_control_para.tsf_enable = TRUE;
240 dma_control_para.osf_enable = TRUE;
241 dma_control_para.aab_enable = TRUE;
242 dma_control_para.usp_enable = TRUE;
243 dma_control_para.fb_enable = TRUE;
244 dma_control_para.flush_rx_disable = TRUE;
245 dma_control_para.rx_dma_pal = EMAC_DMA_PBL_32;
246 dma_control_para.tx_dma_pal = EMAC_DMA_PBL_32;
247 dma_control_para.priority_ratio = EMAC_DMA_2_RX_1_TX;
248
249 emac_dma_config(&dma_control_para);
250 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_NORMAL_SUMMARY, TRUE);
251 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_RX, TRUE);
252
253 return SUCCESS;
254}
255
261void static reset_phy(void)
262{
263 gpio_init_type gpio_init_struct = {0};
264 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
265 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
266 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE8, GPIO_MUX_0);
267 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
268 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
269 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
270 gpio_init_struct.gpio_pins = GPIO_PINS_15;
271 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
272 gpio_init(GPIOE, &gpio_init_struct);
273
274 gpio_init_struct.gpio_pins = GPIO_PINS_15;
275 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
276 gpio_init(GPIOG, &gpio_init_struct);
277 gpio_bits_reset(GPIOG, GPIO_PINS_15);
278 gpio_bits_reset(GPIOE, GPIO_PINS_15);
279 delay_ms(2);
280 gpio_bits_set(GPIOE, GPIO_PINS_15);
281 delay_ms(2);
282}
283
289 error_status emac_phy_register_reset(void)
290{
291 uint16_t data = 0;
292 uint32_t timeout = 0;
293 uint32_t i = 0;
294
295 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_RESET_BIT) == ERROR)
296 {
297 return ERROR;
298 }
299
300 for(i = 0; i < 0x000FFFFF; i++);
301
302 do
303 {
304 timeout++;
305 if(emac_phy_register_read(PHY_ADDRESS, PHY_CONTROL_REG, &data) == ERROR)
306 {
307 return ERROR;
308 }
309 } while((data & PHY_RESET_BIT) && (timeout < PHY_TIMEOUT));
310
311 for(i = 0; i < 0x00FFFFF; i++);
312 if(timeout == PHY_TIMEOUT)
313 {
314 return ERROR;
315 }
316 return SUCCESS;
317}
318
335 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
336{
337 uint16_t data = 0;
338 uint32_t timeout = 0;
339 if(nego == EMAC_AUTO_NEGOTIATION_ON)
340 {
341 do
342 {
343 timeout++;
344 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
345 {
346 return ERROR;
347 }
348 } while(!(data & PHY_LINKED_STATUS_BIT) && (timeout < PHY_TIMEOUT));
349
350 if(timeout == PHY_TIMEOUT)
351 {
352 return ERROR;
353 }
354
355 timeout = 0;
356
357 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_AUTO_NEGOTIATION_BIT) == ERROR)
358 {
359 return ERROR;
360 }
361
362
363 do
364 {
365 timeout++;
366 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
367 {
368 return ERROR;
369 }
370 } while(!(data & PHY_NEGO_COMPLETE_BIT) && (timeout < PHY_TIMEOUT));
371
372 if(timeout == PHY_TIMEOUT)
373 {
374 return ERROR;
375 }
376
377 if(emac_phy_register_read(PHY_ADDRESS, PHY_SPECIFIED_CS_REG, &data) == ERROR)
378 {
379 return ERROR;
380 }
381 #ifdef DM9162
382 if(data & PHY_FULL_DUPLEX_100MBPS_BIT)
383 {
384 emac_fast_speed_set(EMAC_SPEED_100MBPS);
385 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
386 }
387 else if(data & PHY_HALF_DUPLEX_100MBPS_BIT)
388 {
389 emac_fast_speed_set(EMAC_SPEED_100MBPS);
390 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
391 }
392 else if(data & PHY_FULL_DUPLEX_10MBPS_BIT)
393 {
394 emac_fast_speed_set(EMAC_SPEED_10MBPS);
395 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
396 }
397 else if(data & PHY_HALF_DUPLEX_10MBPS_BIT)
398 {
399 emac_fast_speed_set(EMAC_SPEED_10MBPS);
400 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
401 }
402 #else
403 if(data & PHY_DUPLEX_MODE)
404 {
405 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
406 }
407 else
408 {
409 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
410 }
411 if(data & PHY_SPEED_MODE)
412 {
413 emac_fast_speed_set(EMAC_SPEED_10MBPS);
414 }
415 else
416 {
417 emac_fast_speed_set(EMAC_SPEED_100MBPS);
418 }
419 #endif
420 }
421 else
422 {
423 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, (uint16_t)((mode << 8) | (speed << 13))) == ERROR)
424 {
425 return ERROR;
426 }
427 if(speed == EMAC_SPEED_100MBPS)
428 {
429 emac_fast_speed_set(EMAC_SPEED_100MBPS);
430 }
431 else
432 {
433 emac_fast_speed_set(EMAC_SPEED_10MBPS);
434 }
435 if(mode == EMAC_FULL_DUPLEX)
436 {
437 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
438 }
439 else
440 {
441 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
442 }
443 }
444
445 return SUCCESS;
446}
447
453 error_status emac_phy_init(emac_control_config_type *control_para)
454{
455 emac_clock_range_set();
456 if(emac_phy_register_reset() == ERROR)
457 {
458 return ERROR;
459 }
460
461 emac_control_config(control_para);
462 return SUCCESS;
463}
464
470uint16_t link_update(void)
471{
472 uint16_t link_data, link_state;
473 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &link_data) == ERROR)
474 {
475 return ERROR;
476 }
477
478 link_state = (link_data & PHY_LINKED_STATUS_BIT)>>2;
479 return link_state;
480}
481
487void ethernetif_set_link(void const *argument)
488{
489 uint16_t regvalue = 0;
490 struct netif *netif = (struct netif *)argument;
491
492 /* read phy_bsr*/
493 regvalue = link_update();
494
495 if(regvalue > 0)
496 {
497 at32_led_on(LED4);
498 at32_led_off(LED2);
499 }
500 else
501 {
502 at32_led_on(LED2);
503 at32_led_off(LED4);
504 }
505 /* check whether the netif link down and the phy link is up */
506 if(!netif_is_link_up(netif) && (regvalue))
507 {
508 /* network cable is connected */
509 netif_set_link_up(netif);
510 }
511 else if(netif_is_link_up(netif) && (!regvalue))
512 {
513 /* network cable is dis-connected */
514 netif_set_link_down(netif);
515 }
516}
517
523void ethernetif_notify_conn_changed(struct netif *netif)
524{
525 /* note : this is function could be implemented in user file
526 when the callback is needed,
527 */
528
529 if (netif_is_link_up(netif)) {
530 netif_set_up(netif);
531
532#if LWIP_DHCP
533 /* creates a new dhcp client for this interface on the first call.
534 note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
535 the predefined regular intervals after starting the client.
536 you can peek in the netif->dhcp struct for the actual dhcp status.*/
537 dhcp_start(netif);
538#endif
539 }
540 else
541 netif_set_down(netif);
542}
543
550void ethernetif_update_config(struct netif *netif)
551{
552 if(netif_is_link_up(netif))
553 {
554 emac_speed_config(mac_control_para.auto_nego, mac_control_para.duplex_mode, mac_control_para.fast_ethernet_speed);
555
556 delay_ms(300);
557 /* enable mac and dma transmission and reception */
558 emac_start();
559 }
560 else
561 {
562 /* disable mac and dma transmission and reception */
563 emac_stop();
564 }
565
566 ethernetif_notify_conn_changed(netif);
567}
568
574void emac_tmr_init(void)
575{
576 crm_clocks_freq_type crm_clocks_freq_struct = {0};
577 crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
578
579 crm_clocks_freq_get(&crm_clocks_freq_struct);
580 /* tmr1 configuration */
581 /* time base configuration */
582 /* systemclock/24000/100 = 100hz */
583 tmr_base_init(TMR6, 99, (crm_clocks_freq_struct.ahb_freq / 10000) - 1);
584 tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
585
586 /* overflow interrupt enable */
587 tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
588
589 /* tmr1 overflow interrupt nvic init */
590 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
591 nvic_irq_enable(TMR6_DAC_GLOBAL_IRQn, 0, 0);
592 tmr_counter_enable(TMR6, TRUE);
593}
594
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:80
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:205
PHY_AUTO_NEGOTIATION_BIT
#define PHY_AUTO_NEGOTIATION_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:64
PHY_RESET_BIT
#define PHY_RESET_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:66
PHY_ADDRESS
#define PHY_ADDRESS
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:59
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
PHY_FULL_DUPLEX_10MBPS_BIT
#define PHY_FULL_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:73
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:574
PHY_FULL_DUPLEX_100MBPS_BIT
#define PHY_FULL_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:71
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:70
PHY_SPECIFIED_CS_REG
#define PHY_SPECIFIED_CS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:62
PHY_CONTROL_REG
#define PHY_CONTROL_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:60
PHY_NEGO_COMPLETE_BIT
#define PHY_NEGO_COMPLETE_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:69
PHY_HALF_DUPLEX_100MBPS_BIT
#define PHY_HALF_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:72
PHY_STATUS_REG
#define PHY_STATUS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:61
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:335
PHY_LINKED_STATUS_BIT
#define PHY_LINKED_STATUS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:68
PHY_HALF_DUPLEX_10MBPS_BIT
#define PHY_HALF_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:74
mac_control_para
emac_control_config_type mac_control_para
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:40
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR6_PERIPH_CLOCK
@ CRM_TMR6_PERIPH_CLOCK
Definition: at32f435_437_crm.h:132
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_GPIOE_PERIPH_CLOCK
@ CRM_GPIOE_PERIPH_CLOCK
Definition: at32f435_437_crm.h:109
CRM_CLKOUT_DIV1_5
@ CRM_CLKOUT_DIV1_5
Definition: at32f435_437_crm.h:729
CRM_CLKOUT_DIV2_2
@ CRM_CLKOUT_DIV2_2
Definition: at32f435_437_crm.h:738
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
emac_dma_software_reset_set
void emac_dma_software_reset_set(void)
reset emac dma
Definition: at32f435_437_emac.c:156
emac_control_para_init
void emac_control_para_init(emac_control_config_type *control_para)
initialize emac control structure
Definition: at32f435_437_emac.c:70
emac_dma_software_reset_get
flag_status emac_dma_software_reset_get(void)
get emac dma reset status
Definition: at32f435_437_emac.c:166
emac_control_config
void emac_control_config(emac_control_config_type *control_struct)
configure emac control setting.
Definition: at32f435_437_emac.c:136
emac_phy_register_read
error_status emac_phy_register_read(uint8_t address, uint8_t reg, uint16_t *data)
read phy data
Definition: at32f435_437_emac.c:262
emac_reset
void emac_reset(void)
deinitialize the emac peripheral registers to their default reset values.
Definition: at32f435_437_emac.c:59
emac_start
void emac_start(void)
enable emac and dma reception/transmission
Definition: at32f435_437_emac.c:183
emac_duplex_mode_set
void emac_duplex_mode_set(emac_duplex_type duplex_mode)
set duplex mode.
Definition: at32f435_437_emac.c:463
emac_fast_speed_set
void emac_fast_speed_set(emac_speed_type speed)
set mac fast emac speed.
Definition: at32f435_437_emac.c:450
emac_clock_range_set
void emac_clock_range_set(void)
according to hclk to set mdc clock frequency.
Definition: at32f435_437_emac.c:93
emac_dma_interrupt_enable
void emac_dma_interrupt_enable(emac_dma_interrupt_type it, confirm_state new_state)
enable dma interrupt
Definition: at32f435_437_emac.c:1497
emac_dma_para_init
void emac_dma_para_init(emac_dma_config_type *control_para)
init emac dma parameters
Definition: at32f435_437_emac.c:1073
emac_phy_register_write
error_status emac_phy_register_write(uint8_t address, uint8_t reg, uint16_t data)
write phy data.
Definition: at32f435_437_emac.c:232
emac_dma_config
void emac_dma_config(emac_dma_config_type *control_para)
configure emac dma
Definition: at32f435_437_emac.c:1099
emac_stop
void emac_stop(void)
stop emac and dma reception/transmission
Definition: at32f435_437_emac.c:206
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
EMAC_HALF_DUPLEX
@ EMAC_HALF_DUPLEX
Definition: at32f435_437_emac.h:303
EMAC_FULL_DUPLEX
@ EMAC_FULL_DUPLEX
Definition: at32f435_437_emac.h:304
EMAC_DMA_PBL_32
@ EMAC_DMA_PBL_32
Definition: at32f435_437_emac.h:427
EMAC_SPEED_10MBPS
@ EMAC_SPEED_10MBPS
Definition: at32f435_437_emac.h:312
EMAC_SPEED_100MBPS
@ EMAC_SPEED_100MBPS
Definition: at32f435_437_emac.h:313
EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
@ EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
Definition: at32f435_437_emac.h:527
EMAC_DMA_INTERRUPT_RX
@ EMAC_DMA_INTERRUPT_RX
Definition: at32f435_437_emac.h:519
EMAC_AUTO_NEGOTIATION_ON
@ EMAC_AUTO_NEGOTIATION_ON
Definition: at32f435_437_emac.h:284
EMAC_DMA_2_RX_1_TX
@ EMAC_DMA_2_RX_1_TX
Definition: at32f435_437_emac.h:412
PHY_TIMEOUT
#define PHY_TIMEOUT
Definition: at32f435_437_emac.h:47
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_0
@ GPIO_MUX_0
Definition: at32f435_437_gpio.h:156
GPIO_MUX_11
@ GPIO_MUX_11
Definition: at32f435_437_gpio.h:167
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
GPIOE
#define GPIOE
Definition: at32f435_437_gpio.h:525
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_emac_interface_set
void scfg_emac_interface_set(scfg_emac_interface_type mode)
scfg emac interface set
Definition: at32f435_437_scfg.c:113
SCFG_EMAC_SELECT_MII
@ SCFG_EMAC_SELECT_MII
Definition: at32f435_437_scfg.h:139
SCFG_EMAC_SELECT_RMII
@ SCFG_EMAC_SELECT_RMII
Definition: at32f435_437_scfg.h:140
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
TMR6_DAC_GLOBAL_IRQn
@ TMR6_DAC_GLOBAL_IRQn
Definition: at32f435_437.h:202
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
reset_phy
static void reset_phy(void)
reset layer 1
Definition: project/at_start_f437/examples/emac/telnet/src/at32_emac.c:261
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::ahb_freq
uint32_t ahb_freq
Definition: at32f435_437_crm.h:790
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588
emac_control_config_type::auto_nego
emac_auto_negotiation_type auto_nego
Definition: at32f435_437_emac.h:589
emac_control_config_type::fast_ethernet_speed
emac_speed_type fast_ethernet_speed
Definition: at32f435_437_emac.h:598
emac_control_config_type::duplex_mode
emac_duplex_type duplex_mode
Definition: at32f435_437_emac.h:595
emac_dma_config_type
ethernet mac dma config type
Definition: at32f435_437_emac.h:609
emac_dma_config_type::tx_dma_pal
emac_dma_pbl_type tx_dma_pal
Definition: at32f435_437_emac.h:614
emac_dma_config_type::aab_enable
confirm_state aab_enable
Definition: at32f435_437_emac.h:610
emac_dma_config_type::rx_dma_pal
emac_dma_pbl_type rx_dma_pal
Definition: at32f435_437_emac.h:612
emac_dma_config_type::flush_rx_disable
confirm_state flush_rx_disable
Definition: at32f435_437_emac.h:620
emac_dma_config_type::priority_ratio
emac_dma_rx_tx_ratio_type priority_ratio
Definition: at32f435_437_emac.h:617
emac_dma_config_type::osf_enable
confirm_state osf_enable
Definition: at32f435_437_emac.h:626
emac_dma_config_type::usp_enable
confirm_state usp_enable
Definition: at32f435_437_emac.h:611
emac_dma_config_type::rsf_enable
confirm_state rsf_enable
Definition: at32f435_437_emac.h:619
emac_dma_config_type::tsf_enable
confirm_state tsf_enable
Definition: at32f435_437_emac.h:621
emac_dma_config_type::fb_enable
confirm_state fb_enable
Definition: at32f435_437_emac.h:613
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • emac
  • telnet
  • src
Functions
project/at_start_f437/examples/emac/telnet/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/telnet/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • emac
  • telnet
  • src
project/at_start_f437/examples/emac/telnet/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 125, 1, CRM_PLL_FR_4);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/emac/telnet/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_4
@ CRM_PLL_FR_4
Definition: at32f435_437_crm.h:548
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • emac
  • telnet
  • src
Functions
project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "netconf.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR6_DAC_GLOBAL_IRQHandler (void)
this function handles timer6 overflow handler. More...
void | EMAC_IRQHandler (void)
this function handles emac handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • emac
  • telnet
  • src
project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "netconf.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void TMR6_DAC_GLOBAL_IRQHandler(void)
142{
143 if(tmr_flag_get(TMR6, TMR_OVF_FLAG) != RESET)
144 {
145 /* Update the local_time by adding SYSTEMTICK_PERIOD_MS each SysTick interrupt */
146 time_update();
147 tmr_flag_clear(TMR6, TMR_OVF_FLAG);
148 }
149}
150
156void EMAC_IRQHandler(void)
157{
158 /* handles all the received frames */
159 while(emac_received_packet_size_get() != 0)
160 {
161 lwip_pkt_handle();
162 }
163
164 /* clear the emac dma rx it pending bits */
165 emac_dma_flag_clear(EMAC_DMA_RI_FLAG);
166 emac_dma_flag_clear(EMAC_DMA_NIS_FLAG);
167}
168
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c:92
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c:53
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c:66
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c:105
EMAC_IRQHandler
void EMAC_IRQHandler(void)
this function handles emac handler.
Definition: project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c:156
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c:123
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c:44
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c:79
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c:132
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c:114
TMR6_DAC_GLOBAL_IRQHandler
void TMR6_DAC_GLOBAL_IRQHandler(void)
this function handles timer6 overflow handler.
Definition: project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c:141
emac_dma_flag_clear
void emac_dma_flag_clear(uint32_t dma_flag)
clear the emac dma flag.
Definition: at32f435_437_emac.c:2290
emac_received_packet_size_get
uint32_t emac_received_packet_size_get(void)
get the size of received the received packet.
Definition: at32f435_437_emac.c:1044
EMAC_DMA_RI_FLAG
#define EMAC_DMA_RI_FLAG
Definition: at32f435_437_emac.h:264
EMAC_DMA_NIS_FLAG
#define EMAC_DMA_NIS_FLAG
Definition: at32f435_437_emac.h:272
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • emac
  • telnet
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/telnet/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "at32_emac.h"
#include "netconf.h"
#include "telnet.h"

Go to the source code of this file.

Macros

#define | DELAY 100
#define | FAST 1
#define | SLOW 4

Functions

int main (void)
main function. More...

Variables

uint8_t | g_speed = 1
volatile uint32_t | local_time = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/telnet/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • emac
  • telnet
  • src
project/at_start_f437/examples/emac/telnet/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "at32_emac.h"
30#include "netconf.h"
31#include "telnet.h"
32
41#define DELAY 100
42#define FAST 1
43#define SLOW 4
44
45uint8_t g_speed = FAST;
46volatile uint32_t local_time = 0;
47
53int main(void)
54{
55 error_status status;
56 system_clock_config();
57
58 at32_board_init();
59
60 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
61
62 delay_init();
63
64 status = emac_system_init();
65
66 while(status == ERROR);
67
68 tcpip_stack_init();
69
70 helloworld_init();
71
72 while(1)
73 {
74 lwip_periodic_handle(local_time);
75 }
76}
77
at32f435_437_board.h
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
FAST
#define FAST
Definition: project/at_start_f437/examples/emac/telnet/src/main.c:42
main
int main(void)
main function.
Definition: project/at_start_f437/examples/emac/telnet/src/main.c:53
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/telnet/src/main.c:46
g_speed
uint8_t g_speed
Definition: project/at_start_f437/examples/emac/telnet/src/main.c:45
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
delay_init
void delay_init()
initialize delay function
Definition: at32f435_437_board.c:293
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
helloworld_init
void helloworld_init(void)
initialize the hello application
Definition: telnet.c:177
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
telnet.h
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: netconf.c File Reference

  • emac
  • telnet
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/telnet/src/netconf.c File Reference

network connection configuration More...

#include "lwip/memp.h"
#include "lwip/tcp.h"
#include "lwip/priv/tcp_priv.h"
#include "lwip/udp.h"
#include "netif/etharp.h"
#include "lwip/dhcp.h"
#include "ethernetif.h"
#include "netconf.h"
#include "stdio.h"
#include "at32_emac.h"

Go to the source code of this file.

Macros

#define | MAC_ADDR_LENGTH (6)
#define | ADDR_LENGTH (4)
#define | SYSTEMTICK_PERIOD_MS 10

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Variables

volatile uint32_t | local_time
struct netif | netif
volatile uint32_t | tcp_timer = 0
volatile uint32_t | arp_timer = 0
volatile uint32_t | link_timer = 0
static uint8_t | mac_address [(6)] = {0, 0, 0x44, 0x45, 0x56, 1}
static uint8_t | local_ip [(4)] = {192, 168, 81, 37}
static uint8_t | local_gw [(4)] = {192, 168, 81, 187}
static uint8_t | local_mask [(4)] = {255, 255, 255, 0}

Detailed Description

network connection configuration

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/telnet/src/netconf.c.


AT32F435/437 Firmwary Library: netconf.c Source File

  • emac
  • telnet
  • src
project/at_start_f437/examples/emac/telnet/src/netconf.c
Go to the documentation of this file.
1
27/* Includes ------------------------------------------------------------------*/
28#include "lwip/memp.h"
29#include "lwip/tcp.h"
30#include "lwip/priv/tcp_priv.h"
31#include "lwip/udp.h"
32#include "netif/etharp.h"
33#include "lwip/dhcp.h"
34#include "ethernetif.h"
35#include "netconf.h"
36#include "stdio.h"
37#include "at32_emac.h"
38
51/* Private define ------------------------------------------------------------*/
52/* Private macro -------------------------------------------------------------*/
53#define MAC_ADDR_LENGTH (6)
54#define ADDR_LENGTH (4)
55#define SYSTEMTICK_PERIOD_MS 10
56/* Private variables ---------------------------------------------------------*/
57extern volatile uint32_t local_time;
58struct netif netif;
59volatile uint32_t tcp_timer = 0;
60volatile uint32_t arp_timer = 0;
61volatile uint32_t link_timer = 0;
62
63static uint8_t mac_address[MAC_ADDR_LENGTH] = {0, 0, 0x44, 0x45, 0x56, 1};;
64#if LWIP_DHCP
65volatile uint32_t dhcp_fine_timer = 0;
66volatile uint32_t dhcp_coarse_timer = 0;
67#else
68static uint8_t local_ip[ADDR_LENGTH] = {192, 168, 81, 37};
69static uint8_t local_gw[ADDR_LENGTH] = {192, 168, 81, 187};
70static uint8_t local_mask[ADDR_LENGTH] = {255, 255, 255, 0};
71#endif
72
73/* Private function prototypes -----------------------------------------------*/
74/* Private functions ---------------------------------------------------------*/
75
81void tcpip_stack_init(void)
82{
83 ip_addr_t ipaddr;
84 ip_addr_t netmask;
85 ip_addr_t gw;
86
87 /* Initializes the dynamic memory heap defined by MEM_SIZE.*/
88 mem_init();
89
90 /* Initializes the memory pools defined by MEMP_NUM_x.*/
91 memp_init();
92
93
94#if LWIP_DHCP //need DHCP server
95 ipaddr.addr = 0;
96 netmask.addr = 0;
97 gw.addr = 0;
98
99#else
100 IP4_ADDR(&ipaddr, local_ip[0], local_ip[1], local_ip[2], local_ip[3]);
101 IP4_ADDR(&netmask, local_mask[0], local_mask[1], local_mask[2], local_mask[3]);
102 IP4_ADDR(&gw, local_gw[0], local_gw[1], local_gw[2], local_gw[3]);
103#endif
104
105 lwip_set_mac_address(mac_address);
106
107 /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
108 struct ip_addr *netmask, struct ip_addr *gw,
109 void *state, err_t (* init)(struct netif *netif),
110 err_t (* input)(struct pbuf *p, struct netif *netif))
111
112 Adds your network interface to the netif_list. Allocate a struct
113 netif and pass a pointer to this structure as the first argument.
114 Give pointers to cleared ip_addr structures when using DHCP,
115 or fill them with sane numbers otherwise. The state pointer may be NULL.
116
117 The init function pointer must point to a initialization function for
118 your ethernet netif interface. The following code illustrates it's use.*/
119
120 if(netif_add(&netif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &netif_input) == NULL)
121 {
122 while(1);
123 }
124
125 /* Registers the default network interface.*/
126 netif_set_default(&netif);
127
128 /* When the netif is fully configured this function must be called.*/
129 netif_set_up(&netif);
130
131 /* Set the link callback function, this function is called on change of link status*/
132 netif_set_link_callback(&netif, ethernetif_update_config);
133}
134
140void lwip_pkt_handle(void)
141{
142 /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */
143 if(ethernetif_input(&netif) != ERR_OK)
144 {
145 while(1);
146 }
147}
148
154void time_update(void)
155{
156 local_time += SYSTEMTICK_PERIOD_MS;
157}
158
164void lwip_periodic_handle(volatile uint32_t localtime)
165{
166
167 /* TCP periodic process every 250 ms */
168 if (localtime - tcp_timer >= TCP_TMR_INTERVAL)
169 {
170 tcp_timer = localtime;
171 tcp_tmr();
172 }
173 /* ARP periodic process every 5s */
174 if (localtime - arp_timer >= ARP_TMR_INTERVAL)
175 {
176 arp_timer = localtime;
177 etharp_tmr();
178 }
179
180#if LWIP_DHCP
181 /* Fine DHCP periodic process every 500ms */
182 if (localtime - dhcp_fine_timer >= DHCP_FINE_TIMER_MSECS)
183 {
184 dhcp_fine_timer = localtime;
185 dhcp_fine_tmr();
186 }
187 /* DHCP Coarse periodic process every 60s */
188 if (localtime - dhcp_coarse_timer >= DHCP_COARSE_TIMER_MSECS)
189 {
190 dhcp_coarse_timer = localtime;
191 dhcp_coarse_tmr();
192 }
193#endif
194
195#if (LINK_DETECTION > 0)
196 /* link detection process every 500 ms */
197 if (localtime - link_timer >= 500)
198 {
199 link_timer = localtime;
200 ethernetif_set_link(&netif);
201 }
202#endif
203}
204
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
local_mask
static uint8_t local_mask[(4)]
Definition: project/at_start_f437/examples/emac/telnet/src/netconf.c:70
link_timer
volatile uint32_t link_timer
Definition: project/at_start_f437/examples/emac/telnet/src/netconf.c:61
local_gw
static uint8_t local_gw[(4)]
Definition: project/at_start_f437/examples/emac/telnet/src/netconf.c:69
ADDR_LENGTH
#define ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/telnet/src/netconf.c:54
arp_timer
volatile uint32_t arp_timer
Definition: project/at_start_f437/examples/emac/telnet/src/netconf.c:60
MAC_ADDR_LENGTH
#define MAC_ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/telnet/src/netconf.c:53
SYSTEMTICK_PERIOD_MS
#define SYSTEMTICK_PERIOD_MS
Definition: project/at_start_f437/examples/emac/telnet/src/netconf.c:55
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:49
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/telnet/src/netconf.c:58
tcp_timer
volatile uint32_t tcp_timer
Definition: project/at_start_f437/examples/emac/telnet/src/netconf.c:59
local_ip
static uint8_t local_ip[(4)]
Definition: project/at_start_f437/examples/emac/telnet/src/netconf.c:68
mac_address
static uint8_t mac_address[(6)]
Definition: project/at_start_f437/examples/emac/telnet/src/netconf.c:63


AT32F435/437 Firmwary Library: at32_emac.h File Reference

  • emac
  • wake_on_lan
  • inc
Macros | Functions
project/at_start_f437/examples/emac/wake_on_lan/inc/at32_emac.h File Reference

header file of emac config program. More...

#include "at32f435_437.h"
#include "netif.h"

Go to the source code of this file.

Macros

#define | RX_REMAP (1)
#define | CRYSTAL_ON_PHY (0)
#define | RMII_MODE
#define | DM9162
#define | LINK_DETECTION (1)
#define | PHY_ADDRESS (0x03)
#define | PHY_CONTROL_REG (0x00)
#define | PHY_STATUS_REG (0x01)
#define | PHY_SPECIFIED_CS_REG (0x11)
#define | PHY_AUTO_NEGOTIATION_BIT (0x1000)
#define | PHY_LOOPBACK_BIT (0x4000)
#define | PHY_RESET_BIT (0x8000)
#define | PHY_LINKED_STATUS_BIT (0x0004)
#define | PHY_NEGO_COMPLETE_BIT (0x0020)
#define | PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
#define | PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
#define | PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
#define | PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Detailed Description

header file of emac config program.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/wake_on_lan/inc/at32_emac.h.


AT32F435/437 Firmwary Library: at32_emac.h Source File

  • emac
  • wake_on_lan
  • inc
project/at_start_f437/examples/emac/wake_on_lan/inc/at32_emac.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32_EMAC_H
29#define __AT32_EMAC_H
30
31#ifdef __cplusplus
32 extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37#include "netif.h"
38
47#define RX_REMAP (1)
48#define CRYSTAL_ON_PHY (0)
49
50//#define MII_MODE
51#define RMII_MODE
52
53#define DM9162
54//#define DP83848
55
56#define LINK_DETECTION (1)
58#if defined (DM9162)
59 #define PHY_ADDRESS (0x03)
60 #define PHY_CONTROL_REG (0x00)
61 #define PHY_STATUS_REG (0x01)
62 #define PHY_SPECIFIED_CS_REG (0x11)
63 /* phy control register */
64 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
65 #define PHY_LOOPBACK_BIT (0x4000)
66 #define PHY_RESET_BIT (0x8000)
67 /* phy status register */
68 #define PHY_LINKED_STATUS_BIT (0x0004)
69 #define PHY_NEGO_COMPLETE_BIT (0x0020)
70 /* phy specified control/status register */
71 #define PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
72 #define PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
73 #define PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
74 #define PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)
75#elif defined (DP83848)
76 #define PHY_ADDRESS (0x01)
77 #define PHY_CONTROL_REG (0x00)
78 #define PHY_STATUS_REG (0x01)
79 #define PHY_SPECIFIED_CS_REG (0x10)
80 /* phy control register */
81 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
82 #define PHY_LOOPBACK_BIT (0x4000)
83 #define PHY_RESET_BIT (0x8000)
84 /* phy status register */
85 #define PHY_LINKED_STATUS_BIT (0x0004)
86 #define PHY_NEGO_COMPLETE_BIT (0x0020)
88 #define PHY_DUPLEX_MODE (0x0004)
89 #define PHY_SPEED_MODE (0x0002)
90#endif
91
92 error_status emac_system_init(void);
93void emac_nvic_configuration(void);
94void emac_pins_configuration(void);
95 error_status emac_layer2_configuration(void);
96void static reset_phy(void);
97 error_status emac_phy_register_reset(void);
98 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed);
99 error_status emac_phy_init(emac_control_config_type *control_para);
100
101uint16_t link_update(void);
102void ethernetif_set_link(void const *argument);
103void ethernetif_notify_conn_changed(struct netif *netif);
104void ethernetif_update_config(struct netif *netif);
105void emac_tmr_init(void);
106
115#ifdef __cplusplus
116}
117#endif
118
119#endif
at32f435_437.h
at32f435_437 header file
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:80
reset_phy
static void reset_phy(void)
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:205
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:550
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:574
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:70
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:335
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
error_status
error_status
Definition: at32f435_437.h:380
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • emac
  • wake_on_lan
  • inc
project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • emac
  • wake_on_lan
  • inc
project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • emac
  • wake_on_lan
  • inc
project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: lwipopts.h File Reference

  • emac
  • wake_on_lan
  • inc
Macros
project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h File Reference

Go to the source code of this file.

Macros

#define | LWIP_IPV4 1
#define | NO_SYS 1
#define | SYS_LIGHTWEIGHT_PROT 0
#define | LWIP_NETCONN !NO_SYS
#define | LWIP_SOCKET !NO_SYS
#define | LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
#define | LWIP_NETBUF_RECVINFO 1
#define | LWIP_HAVE_LOOPIF 1
#define | LWIP_NETIF_LINK_CALLBACK 1
#define | LWIP_DNS 1
#define | DNS_DOES_NAME_CHECK 1
#define | LWIP_DHCP 0
#define | TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
#define | MEM_ALIGNMENT 4
#define | MEM_SIZE (20*1024)
#define | TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
#define | MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
#define | TCP_SND_BUF (2 * TCP_MSS)
#define | TCP_WND (2 * TCP_MSS)
#define | LWIP_WND_SCALE 0
#define | TCP_RCV_SCALE 0
#define | PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
#define | PBUF_POOL_BUFSIZE 1500
#define | LWIP_TCP 1
#define | TCP_TTL 255
#define | LWIP_IGMP 1
#define | LWIP_MDNS_RESPONDER 1
#define | LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
#define | ETHARP_SUPPORT_STATIC_ENTRIES 1
#define | MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
#define | MIB2_STATS 1
#define | LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */

Macro Definition Documentation

◆ DNS_DOES_NAME_CHECK

#define DNS_DOES_NAME_CHECK 1

Definition at line 54 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ ETHARP_SUPPORT_STATIC_ENTRIES

#define ETHARP_SUPPORT_STATIC_ENTRIES 1

Definition at line 90 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_DHCP

#define LWIP_DHCP 0

Definition at line 58 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_DNS

#define LWIP_DNS 1

Definition at line 53 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_HAVE_LOOPIF

#define LWIP_HAVE_LOOPIF 1

Definition at line 51 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_IGMP

#define LWIP_IGMP 1

Definition at line 85 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_IPV4

#define LWIP_IPV4 1

Definition at line 37 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_MDNS_RESPONDER

#define LWIP_MDNS_RESPONDER 1

Definition at line 86 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_MEM_ILLEGAL_FREE

#define LWIP_MEM_ILLEGAL_FREE ( msg ) /* to nothing */

Definition at line 101 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_NETBUF_RECVINFO

#define LWIP_NETBUF_RECVINFO 1

Definition at line 50 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_NETCONN

#define LWIP_NETCONN !NO_SYS

Definition at line 47 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_NETCONN_FULLDUPLEX

#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET

Definition at line 49 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_NETIF_LINK_CALLBACK

#define LWIP_NETIF_LINK_CALLBACK 1

Definition at line 52 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_NUM_NETIF_CLIENT_DATA

#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)

Definition at line 87 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_SOCKET

#define LWIP_SOCKET !NO_SYS

Definition at line 48 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_TCP

#define LWIP_TCP 1

Definition at line 81 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ LWIP_WND_SCALE

#define LWIP_WND_SCALE 0

Definition at line 73 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ MEM_ALIGNMENT

#define MEM_ALIGNMENT 4

Definition at line 67 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ MEM_SIZE

#define MEM_SIZE (20*1024)

Definition at line 68 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ MEMP_NUM_SYS_TIMEOUT

#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)

Definition at line 92 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ MEMP_NUM_TCP_SEG

#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN

Definition at line 70 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ MIB2_STATS

#define MIB2_STATS 1

Definition at line 95 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ NO_SYS

#define NO_SYS 1

Definition at line 45 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ PBUF_POOL_BUFSIZE

#define PBUF_POOL_BUFSIZE 1500

Definition at line 77 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ PBUF_POOL_SIZE

#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */

Definition at line 75 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ SYS_LIGHTWEIGHT_PROT

#define SYS_LIGHTWEIGHT_PROT 0

Definition at line 46 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ TCP_MSS

#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */

Definition at line 63 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ TCP_RCV_SCALE

#define TCP_RCV_SCALE 0

Definition at line 74 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ TCP_SND_BUF

#define TCP_SND_BUF (2 * TCP_MSS)

Definition at line 71 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ TCP_SND_QUEUELEN

#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS

Definition at line 69 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ TCP_TTL

#define TCP_TTL 255

Definition at line 82 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.

◆ TCP_WND

#define TCP_WND (2 * TCP_MSS)

Definition at line 72 of file project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h.


AT32F435/437 Firmwary Library: lwipopts.h Source File

  • emac
  • wake_on_lan
  • inc
project/at_start_f437/examples/emac/wake_on_lan/inc/lwipopts.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
21 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
25 * OF SUCH DAMAGE.
26 *
27 * This file is part of the lwIP TCP/IP stack.
28 *
29 * Author: Simon Goldschmidt
30 *
31 */
32#ifndef LWIP_HDR_LWIPOPTS_H
33#define LWIP_HDR_LWIPOPTS_H
34
35//#define LWIP_TESTMODE 0
36
37#define LWIP_IPV4 1
38//#define LWIP_TIMERS 0
39
40//#define LWIP_CHECKSUM_ON_COPY 1
41//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK 1
42//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL(printfmsg) LWIP_ASSERT("TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL", 0)
43
44/* We link to special sys_arch.c (for basic non-waiting API layers unit tests) */
45#define NO_SYS 1
46#define SYS_LIGHTWEIGHT_PROT 0
47#define LWIP_NETCONN !NO_SYS
48#define LWIP_SOCKET !NO_SYS
49#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
50#define LWIP_NETBUF_RECVINFO 1
51#define LWIP_HAVE_LOOPIF 1
52#define LWIP_NETIF_LINK_CALLBACK 1
53#define LWIP_DNS 1
54#define DNS_DOES_NAME_CHECK 1
55//#define TCPIP_THREAD_TEST
56
57/* Enable DHCP to test it, disable UDP checksum to easier inject packets */
58#define LWIP_DHCP 0
59
60/* Minimal changes to opt.h required for tcp unit tests: */
61/* TCP Maximum segment size. */
62
63#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
64/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
65 lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
66 byte alignment -> define MEM_ALIGNMENT to 2. */
67#define MEM_ALIGNMENT 4
68#define MEM_SIZE (20*1024)
69#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
70#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
71#define TCP_SND_BUF (2 * TCP_MSS)
72#define TCP_WND (2 * TCP_MSS)
73#define LWIP_WND_SCALE 0
74#define TCP_RCV_SCALE 0
75#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
76/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
77#define PBUF_POOL_BUFSIZE 1500
78//#define TCP_QUEUE_OOSEQ 0
79
80/* ---------- TCP options ---------- */
81#define LWIP_TCP 1
82#define TCP_TTL 255
83
84/* Enable IGMP and MDNS for MDNS tests */
85#define LWIP_IGMP 1
86#define LWIP_MDNS_RESPONDER 1
87#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
88
89/* Minimal changes to opt.h required for etharp unit tests: */
90#define ETHARP_SUPPORT_STATIC_ENTRIES 1
91
92#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
93
94/* MIB2 stats are required to check IPv4 reassembly results */
95#define MIB2_STATS 1
96
97/* netif tests want to test this, so enable: */
98//#define LWIP_NETIF_EXT_STATUS_CALLBACK 1
99
100/* Check lwip_stats.mem.illegal instead of asserting */
101#define LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */
102
103#endif /* LWIP_HDR_LWIPOPTS_H */


AT32F435/437 Firmwary Library: netconf.h File Reference

  • emac
  • wake_on_lan
  • inc
Functions
project/at_start_f437/examples/emac/wake_on_lan/inc/netconf.h File Reference

This file contains all the functions prototypes for the netconf.c file. More...

Go to the source code of this file.

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Detailed Description

This file contains all the functions prototypes for the netconf.c file.

Version
v2.0.9
Date
2022-06-28
        Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/wake_on_lan/inc/netconf.h.


AT32F435/437 Firmwary Library: netconf.h Source File

  • emac
  • wake_on_lan
  • inc
project/at_start_f437/examples/emac/wake_on_lan/inc/netconf.h
Go to the documentation of this file.
1
28/* Define to prevent recursive inclusion -------------------------------------*/
29#ifndef __NETCONF_H
30#define __NETCONF_H
31
32#ifdef __cplusplus
33 extern "C" {
34#endif
35
48/* Includes ------------------------------------------------------------------*/
49void tcpip_stack_init(void);
50void lwip_pkt_handle(void);
51void time_update(void);
52void lwip_periodic_handle(volatile uint32_t localtime);
53
54
55#ifdef __cplusplus
56}
57#endif
58
66#endif /* __NETCONF_H */
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164


AT32F435/437 Firmwary Library: at32_emac.c File Reference

  • emac
  • wake_on_lan
  • src
Functions | Variables
project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c File Reference

emac config program More...

#include "at32f435_437_board.h"
#include "lwip/dhcp.h"
#include "at32_emac.h"

Go to the source code of this file.

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
reset layer 1 More...
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Variables

emac_control_config_type mac_control_para

Detailed Description

emac config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c.

Function Documentation

◆ reset_phy()

static void reset_phy ( void )
static

reset layer 1

Parameters
none
Return values
none

Definition at line 261 of file project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c.

Referenced by emac_layer2_configuration().


AT32F435/437 Firmwary Library: at32_emac.c Source File

  • emac
  • wake_on_lan
  • src
project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_board.h"
29#include "lwip/dhcp.h"
30#include "at32_emac.h"
31
40 emac_control_config_type mac_control_para;
41
47 error_status emac_system_init(void)
48{
49 error_status status;
50
51 emac_nvic_configuration();
52
53 /* emac periph clock enable */
54 crm_periph_clock_enable(CRM_EMAC_PERIPH_CLOCK, TRUE);
55 crm_periph_clock_enable(CRM_EMACTX_PERIPH_CLOCK, TRUE);
56 crm_periph_clock_enable(CRM_EMACRX_PERIPH_CLOCK, TRUE);
57
58 emac_pins_configuration();
59 status = emac_layer2_configuration();
60 emac_tmr_init();
61
62 return status;
63}
64
70void emac_nvic_configuration(void)
71{
72 nvic_irq_enable(EMAC_IRQn, 1, 0);
73}
74
80void emac_pins_configuration(void)
81{
82 gpio_init_type gpio_init_struct = {0};
83
84 /* emac pins clock enable */
85 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
87 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
88 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
89 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
90 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
91
92 /* pa2 -> mdio */
93 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_11);
94 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
95 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
96 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
97 gpio_init_struct.gpio_pins = GPIO_PINS_2;
98 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
99 gpio_init(GPIOA, &gpio_init_struct);
100
101 /* pc1 -> mdc */
102 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE1, GPIO_MUX_11);
103 gpio_init_struct.gpio_pins = GPIO_PINS_1;
104 gpio_init(GPIOC, &gpio_init_struct);
105
106 #ifdef MII_MODE
107 /*
108 pb12 -> tx_d0
109 pb13 -> tx_d1
110 pc2 -> tx_d2
111 pb8 -> tx_d3
112 pb11 -> tx_en
113 pc3 -> tx_clk
114 */
115 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_11);
116 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_11);
117 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_11);
118 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_11);
119 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_11 | GPIO_PINS_12 | GPIO_PINS_13;
120 gpio_init(GPIOB, &gpio_init_struct);
121
122 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_11);
123 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE3, GPIO_MUX_11);
124 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
125 gpio_init(GPIOC, &gpio_init_struct);
126
127 /*
128 pd8 -> rx_dv
129 pd9 -> rx_d0
130 pd10 -> rx_d1
131 pd11 -> rx_d2
132 pd12 -> rx_d3
133 */
134 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
135 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
136 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
137 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE11, GPIO_MUX_11);
138 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE12, GPIO_MUX_11);
139 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12;
140 gpio_init(GPIOD, &gpio_init_struct);
141
142 /*
143 pa1 -> rx_clk
144 pa0 -> crs
145 pa3 -> col
146 pb10 -> rx_er
147 */
148 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_11);
149 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
150 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_11);
151 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_3;
152 gpio_init(GPIOA, &gpio_init_struct);
153
154 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_11);
155 gpio_init_struct.gpio_pins = GPIO_PINS_10;
156 gpio_init(GPIOB, &gpio_init_struct);
157 #endif /* MII_MODE */
158
159 #ifdef RMII_MODE
160 /*
161 pb12 -> tx_d0
162 pb13 -> tx_d1
163 pb11 -> tx_en
164 */
165 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE11, GPIO_MUX_11);
166 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE13, GPIO_MUX_11);
167 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE14, GPIO_MUX_11);
168 gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_13 | GPIO_PINS_14;
169 gpio_init(GPIOG, &gpio_init_struct);
170
171 /*
172 pd8 -> rx_dv
173 pd9 -> rx_d0
174 pd10 -> rx_d1
175 */
176 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
177 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
178 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
179 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10;
180 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
181 gpio_init(GPIOD, &gpio_init_struct);
182
183
184 #endif /* RMII_MODE */
185 /*
186 pa1 -> ref_clk
187 */
188 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
189 gpio_init_struct.gpio_pins = GPIO_PINS_1;
190 gpio_init(GPIOA, &gpio_init_struct);
191
192 #if !CRYSTAL_ON_PHY
193 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_0);
194 gpio_init_struct.gpio_pins = GPIO_PINS_8;
195 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
196 gpio_init(GPIOA, &gpio_init_struct);
197 #endif
198}
199
205 error_status emac_layer2_configuration(void)
206{
207 emac_dma_config_type dma_control_para;
208 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
209 #ifdef MII_MODE
210 scfg_emac_interface_set(SCFG_EMAC_SELECT_MII);
211 #elif defined RMII_MODE
212 scfg_emac_interface_set(SCFG_EMAC_SELECT_RMII);
213 #endif
214 crm_clock_out1_set(CRM_CLKOUT1_PLL);
215 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_5, CRM_CLKOUT_DIV2_2);
216
217 /* reset phy */
218 reset_phy();
219 /* reset emac ahb bus */
220 emac_reset();
221
222 /* software reset emac dma */
223 emac_dma_software_reset_set();
224
225 while(emac_dma_software_reset_get() == SET);
226
227 emac_control_para_init(&mac_control_para);
228
229 mac_control_para.auto_nego = EMAC_AUTO_NEGOTIATION_ON;
230
231 if(emac_phy_init(&mac_control_para) == ERROR)
232 {
233 return ERROR;
234 }
235
236 emac_dma_para_init(&dma_control_para);
237
238 dma_control_para.rsf_enable = TRUE;
239 dma_control_para.tsf_enable = TRUE;
240 dma_control_para.osf_enable = TRUE;
241 dma_control_para.aab_enable = TRUE;
242 dma_control_para.usp_enable = TRUE;
243 dma_control_para.fb_enable = TRUE;
244 dma_control_para.flush_rx_disable = TRUE;
245 dma_control_para.rx_dma_pal = EMAC_DMA_PBL_32;
246 dma_control_para.tx_dma_pal = EMAC_DMA_PBL_32;
247 dma_control_para.priority_ratio = EMAC_DMA_2_RX_1_TX;
248
249 emac_dma_config(&dma_control_para);
250 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_NORMAL_SUMMARY, TRUE);
251 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_RX, TRUE);
252
253 return SUCCESS;
254}
255
261void static reset_phy(void)
262{
263 gpio_init_type gpio_init_struct = {0};
264 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
265 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
266 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE8, GPIO_MUX_0);
267 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
268 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
269 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
270 gpio_init_struct.gpio_pins = GPIO_PINS_15;
271 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
272 gpio_init(GPIOE, &gpio_init_struct);
273
274 gpio_init_struct.gpio_pins = GPIO_PINS_15;
275 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
276 gpio_init(GPIOG, &gpio_init_struct);
277 gpio_bits_reset(GPIOG, GPIO_PINS_15);
278 gpio_bits_reset(GPIOE, GPIO_PINS_15);
279 delay_ms(2);
280 gpio_bits_set(GPIOE, GPIO_PINS_15);
281 delay_ms(2);
282}
283
289 error_status emac_phy_register_reset(void)
290{
291 uint16_t data = 0;
292 uint32_t timeout = 0;
293 uint32_t i = 0;
294
295 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_RESET_BIT) == ERROR)
296 {
297 return ERROR;
298 }
299
300 for(i = 0; i < 0x000FFFFF; i++);
301
302 do
303 {
304 timeout++;
305 if(emac_phy_register_read(PHY_ADDRESS, PHY_CONTROL_REG, &data) == ERROR)
306 {
307 return ERROR;
308 }
309 } while((data & PHY_RESET_BIT) && (timeout < PHY_TIMEOUT));
310
311 for(i = 0; i < 0x00FFFFF; i++);
312 if(timeout == PHY_TIMEOUT)
313 {
314 return ERROR;
315 }
316 return SUCCESS;
317}
318
335 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
336{
337 uint16_t data = 0;
338 uint32_t timeout = 0;
339 if(nego == EMAC_AUTO_NEGOTIATION_ON)
340 {
341 do
342 {
343 timeout++;
344 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
345 {
346 return ERROR;
347 }
348 } while(!(data & PHY_LINKED_STATUS_BIT) && (timeout < PHY_TIMEOUT));
349
350 if(timeout == PHY_TIMEOUT)
351 {
352 return ERROR;
353 }
354
355 timeout = 0;
356
357 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_AUTO_NEGOTIATION_BIT) == ERROR)
358 {
359 return ERROR;
360 }
361
362
363 do
364 {
365 timeout++;
366 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
367 {
368 return ERROR;
369 }
370 } while(!(data & PHY_NEGO_COMPLETE_BIT) && (timeout < PHY_TIMEOUT));
371
372 if(timeout == PHY_TIMEOUT)
373 {
374 return ERROR;
375 }
376
377 if(emac_phy_register_read(PHY_ADDRESS, PHY_SPECIFIED_CS_REG, &data) == ERROR)
378 {
379 return ERROR;
380 }
381 #ifdef DM9162
382 if(data & PHY_FULL_DUPLEX_100MBPS_BIT)
383 {
384 emac_fast_speed_set(EMAC_SPEED_100MBPS);
385 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
386 }
387 else if(data & PHY_HALF_DUPLEX_100MBPS_BIT)
388 {
389 emac_fast_speed_set(EMAC_SPEED_100MBPS);
390 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
391 }
392 else if(data & PHY_FULL_DUPLEX_10MBPS_BIT)
393 {
394 emac_fast_speed_set(EMAC_SPEED_10MBPS);
395 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
396 }
397 else if(data & PHY_HALF_DUPLEX_10MBPS_BIT)
398 {
399 emac_fast_speed_set(EMAC_SPEED_10MBPS);
400 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
401 }
402 #else
403 if(data & PHY_DUPLEX_MODE)
404 {
405 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
406 }
407 else
408 {
409 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
410 }
411 if(data & PHY_SPEED_MODE)
412 {
413 emac_fast_speed_set(EMAC_SPEED_10MBPS);
414 }
415 else
416 {
417 emac_fast_speed_set(EMAC_SPEED_100MBPS);
418 }
419 #endif
420 }
421 else
422 {
423 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, (uint16_t)((mode << 8) | (speed << 13))) == ERROR)
424 {
425 return ERROR;
426 }
427 if(speed == EMAC_SPEED_100MBPS)
428 {
429 emac_fast_speed_set(EMAC_SPEED_100MBPS);
430 }
431 else
432 {
433 emac_fast_speed_set(EMAC_SPEED_10MBPS);
434 }
435 if(mode == EMAC_FULL_DUPLEX)
436 {
437 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
438 }
439 else
440 {
441 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
442 }
443 }
444
445 return SUCCESS;
446}
447
453 error_status emac_phy_init(emac_control_config_type *control_para)
454{
455 emac_clock_range_set();
456 if(emac_phy_register_reset() == ERROR)
457 {
458 return ERROR;
459 }
460
461 emac_control_config(control_para);
462 return SUCCESS;
463}
464
470uint16_t link_update(void)
471{
472 uint16_t link_data, link_state;
473 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &link_data) == ERROR)
474 {
475 return ERROR;
476 }
477
478 link_state = (link_data & PHY_LINKED_STATUS_BIT)>>2;
479 return link_state;
480}
481
487void ethernetif_set_link(void const *argument)
488{
489 uint16_t regvalue = 0;
490 struct netif *netif = (struct netif *)argument;
491
492 /* read phy_bsr*/
493 regvalue = link_update();
494
495 if(regvalue > 0)
496 {
497 at32_led_on(LED4);
498 at32_led_off(LED2);
499 }
500 else
501 {
502 at32_led_on(LED2);
503 at32_led_off(LED4);
504 }
505 /* check whether the netif link down and the phy link is up */
506 if(!netif_is_link_up(netif) && (regvalue))
507 {
508 /* network cable is connected */
509 netif_set_link_up(netif);
510 }
511 else if(netif_is_link_up(netif) && (!regvalue))
512 {
513 /* network cable is dis-connected */
514 netif_set_link_down(netif);
515 }
516}
517
523void ethernetif_notify_conn_changed(struct netif *netif)
524{
525 /* note : this is function could be implemented in user file
526 when the callback is needed,
527 */
528
529 if (netif_is_link_up(netif)) {
530 netif_set_up(netif);
531
532#if LWIP_DHCP
533 /* creates a new dhcp client for this interface on the first call.
534 note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
535 the predefined regular intervals after starting the client.
536 you can peek in the netif->dhcp struct for the actual dhcp status.*/
537 dhcp_start(netif);
538#endif
539 }
540 else
541 netif_set_down(netif);
542}
543
550void ethernetif_update_config(struct netif *netif)
551{
552 if(netif_is_link_up(netif))
553 {
554 emac_speed_config(mac_control_para.auto_nego, mac_control_para.duplex_mode, mac_control_para.fast_ethernet_speed);
555
556 delay_ms(300);
557 /* enable mac and dma transmission and reception */
558 emac_start();
559 }
560 else
561 {
562 /* disable mac and dma transmission and reception */
563 emac_stop();
564 }
565
566 ethernetif_notify_conn_changed(netif);
567}
568
574void emac_tmr_init(void)
575{
576 crm_clocks_freq_type crm_clocks_freq_struct = {0};
577 crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
578
579 crm_clocks_freq_get(&crm_clocks_freq_struct);
580 /* tmr1 configuration */
581 /* time base configuration */
582 /* systemclock/24000/100 = 100hz */
583 tmr_base_init(TMR6, 99, (crm_clocks_freq_struct.ahb_freq / 10000) - 1);
584 tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
585
586 /* overflow interrupt enable */
587 tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
588
589 /* tmr1 overflow interrupt nvic init */
590 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
591 nvic_irq_enable(TMR6_DAC_GLOBAL_IRQn, 0, 0);
592 tmr_counter_enable(TMR6, TRUE);
593}
594
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:80
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:205
PHY_AUTO_NEGOTIATION_BIT
#define PHY_AUTO_NEGOTIATION_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:64
PHY_RESET_BIT
#define PHY_RESET_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:66
PHY_ADDRESS
#define PHY_ADDRESS
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:59
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
PHY_FULL_DUPLEX_10MBPS_BIT
#define PHY_FULL_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:73
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:574
PHY_FULL_DUPLEX_100MBPS_BIT
#define PHY_FULL_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:71
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:70
PHY_SPECIFIED_CS_REG
#define PHY_SPECIFIED_CS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:62
PHY_CONTROL_REG
#define PHY_CONTROL_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:60
PHY_NEGO_COMPLETE_BIT
#define PHY_NEGO_COMPLETE_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:69
PHY_HALF_DUPLEX_100MBPS_BIT
#define PHY_HALF_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:72
PHY_STATUS_REG
#define PHY_STATUS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:61
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:335
PHY_LINKED_STATUS_BIT
#define PHY_LINKED_STATUS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:68
PHY_HALF_DUPLEX_10MBPS_BIT
#define PHY_HALF_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:74
mac_control_para
emac_control_config_type mac_control_para
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:40
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR6_PERIPH_CLOCK
@ CRM_TMR6_PERIPH_CLOCK
Definition: at32f435_437_crm.h:132
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_GPIOE_PERIPH_CLOCK
@ CRM_GPIOE_PERIPH_CLOCK
Definition: at32f435_437_crm.h:109
CRM_CLKOUT_DIV1_5
@ CRM_CLKOUT_DIV1_5
Definition: at32f435_437_crm.h:729
CRM_CLKOUT_DIV2_2
@ CRM_CLKOUT_DIV2_2
Definition: at32f435_437_crm.h:738
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
emac_dma_software_reset_set
void emac_dma_software_reset_set(void)
reset emac dma
Definition: at32f435_437_emac.c:156
emac_control_para_init
void emac_control_para_init(emac_control_config_type *control_para)
initialize emac control structure
Definition: at32f435_437_emac.c:70
emac_dma_software_reset_get
flag_status emac_dma_software_reset_get(void)
get emac dma reset status
Definition: at32f435_437_emac.c:166
emac_control_config
void emac_control_config(emac_control_config_type *control_struct)
configure emac control setting.
Definition: at32f435_437_emac.c:136
emac_phy_register_read
error_status emac_phy_register_read(uint8_t address, uint8_t reg, uint16_t *data)
read phy data
Definition: at32f435_437_emac.c:262
emac_reset
void emac_reset(void)
deinitialize the emac peripheral registers to their default reset values.
Definition: at32f435_437_emac.c:59
emac_start
void emac_start(void)
enable emac and dma reception/transmission
Definition: at32f435_437_emac.c:183
emac_duplex_mode_set
void emac_duplex_mode_set(emac_duplex_type duplex_mode)
set duplex mode.
Definition: at32f435_437_emac.c:463
emac_fast_speed_set
void emac_fast_speed_set(emac_speed_type speed)
set mac fast emac speed.
Definition: at32f435_437_emac.c:450
emac_clock_range_set
void emac_clock_range_set(void)
according to hclk to set mdc clock frequency.
Definition: at32f435_437_emac.c:93
emac_dma_interrupt_enable
void emac_dma_interrupt_enable(emac_dma_interrupt_type it, confirm_state new_state)
enable dma interrupt
Definition: at32f435_437_emac.c:1497
emac_dma_para_init
void emac_dma_para_init(emac_dma_config_type *control_para)
init emac dma parameters
Definition: at32f435_437_emac.c:1073
emac_phy_register_write
error_status emac_phy_register_write(uint8_t address, uint8_t reg, uint16_t data)
write phy data.
Definition: at32f435_437_emac.c:232
emac_dma_config
void emac_dma_config(emac_dma_config_type *control_para)
configure emac dma
Definition: at32f435_437_emac.c:1099
emac_stop
void emac_stop(void)
stop emac and dma reception/transmission
Definition: at32f435_437_emac.c:206
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
EMAC_HALF_DUPLEX
@ EMAC_HALF_DUPLEX
Definition: at32f435_437_emac.h:303
EMAC_FULL_DUPLEX
@ EMAC_FULL_DUPLEX
Definition: at32f435_437_emac.h:304
EMAC_DMA_PBL_32
@ EMAC_DMA_PBL_32
Definition: at32f435_437_emac.h:427
EMAC_SPEED_10MBPS
@ EMAC_SPEED_10MBPS
Definition: at32f435_437_emac.h:312
EMAC_SPEED_100MBPS
@ EMAC_SPEED_100MBPS
Definition: at32f435_437_emac.h:313
EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
@ EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
Definition: at32f435_437_emac.h:527
EMAC_DMA_INTERRUPT_RX
@ EMAC_DMA_INTERRUPT_RX
Definition: at32f435_437_emac.h:519
EMAC_AUTO_NEGOTIATION_ON
@ EMAC_AUTO_NEGOTIATION_ON
Definition: at32f435_437_emac.h:284
EMAC_DMA_2_RX_1_TX
@ EMAC_DMA_2_RX_1_TX
Definition: at32f435_437_emac.h:412
PHY_TIMEOUT
#define PHY_TIMEOUT
Definition: at32f435_437_emac.h:47
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_0
@ GPIO_MUX_0
Definition: at32f435_437_gpio.h:156
GPIO_MUX_11
@ GPIO_MUX_11
Definition: at32f435_437_gpio.h:167
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
GPIOE
#define GPIOE
Definition: at32f435_437_gpio.h:525
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_emac_interface_set
void scfg_emac_interface_set(scfg_emac_interface_type mode)
scfg emac interface set
Definition: at32f435_437_scfg.c:113
SCFG_EMAC_SELECT_MII
@ SCFG_EMAC_SELECT_MII
Definition: at32f435_437_scfg.h:139
SCFG_EMAC_SELECT_RMII
@ SCFG_EMAC_SELECT_RMII
Definition: at32f435_437_scfg.h:140
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
TMR6_DAC_GLOBAL_IRQn
@ TMR6_DAC_GLOBAL_IRQn
Definition: at32f435_437.h:202
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
reset_phy
static void reset_phy(void)
reset layer 1
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c:261
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::ahb_freq
uint32_t ahb_freq
Definition: at32f435_437_crm.h:790
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588
emac_control_config_type::auto_nego
emac_auto_negotiation_type auto_nego
Definition: at32f435_437_emac.h:589
emac_control_config_type::fast_ethernet_speed
emac_speed_type fast_ethernet_speed
Definition: at32f435_437_emac.h:598
emac_control_config_type::duplex_mode
emac_duplex_type duplex_mode
Definition: at32f435_437_emac.h:595
emac_dma_config_type
ethernet mac dma config type
Definition: at32f435_437_emac.h:609
emac_dma_config_type::tx_dma_pal
emac_dma_pbl_type tx_dma_pal
Definition: at32f435_437_emac.h:614
emac_dma_config_type::aab_enable
confirm_state aab_enable
Definition: at32f435_437_emac.h:610
emac_dma_config_type::rx_dma_pal
emac_dma_pbl_type rx_dma_pal
Definition: at32f435_437_emac.h:612
emac_dma_config_type::flush_rx_disable
confirm_state flush_rx_disable
Definition: at32f435_437_emac.h:620
emac_dma_config_type::priority_ratio
emac_dma_rx_tx_ratio_type priority_ratio
Definition: at32f435_437_emac.h:617
emac_dma_config_type::osf_enable
confirm_state osf_enable
Definition: at32f435_437_emac.h:626
emac_dma_config_type::usp_enable
confirm_state usp_enable
Definition: at32f435_437_emac.h:611
emac_dma_config_type::rsf_enable
confirm_state rsf_enable
Definition: at32f435_437_emac.h:619
emac_dma_config_type::tsf_enable
confirm_state tsf_enable
Definition: at32f435_437_emac.h:621
emac_dma_config_type::fb_enable
confirm_state fb_enable
Definition: at32f435_437_emac.h:613
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • emac
  • wake_on_lan
  • src
Functions
project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • emac
  • wake_on_lan
  • src
project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 125, 1, CRM_PLL_FR_4);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_4
@ CRM_PLL_FR_4
Definition: at32f435_437_crm.h:548
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • emac
  • wake_on_lan
  • src
Functions
project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_clock.h"
#include "netconf.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR6_DAC_GLOBAL_IRQHandler (void)
this function handles timer6 overflow handler. More...
void | EMAC_IRQHandler (void)
this function handles emac handler. More...
void | EMAC_WKUP_IRQHandler (void)
this function handles wakeup frames and magic packets More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • emac
  • wake_on_lan
  • src
project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_clock.h"
30#include "netconf.h"
31
45void NMI_Handler(void)
46{
47}
48
54void HardFault_Handler(void)
55{
56 /* go to infinite loop when hard fault exception occurs */
57 while(1)
58 {
59 }
60}
61
67void MemManage_Handler(void)
68{
69 /* go to infinite loop when memory manage exception occurs */
70 while(1)
71 {
72 }
73}
74
80void BusFault_Handler(void)
81{
82 /* go to infinite loop when bus fault exception occurs */
83 while(1)
84 {
85 }
86}
87
93void UsageFault_Handler(void)
94{
95 /* go to infinite loop when usage fault exception occurs */
96 while(1)
97 {
98 }
99}
100
106void SVC_Handler(void)
107{
108}
109
115void DebugMon_Handler(void)
116{
117}
118
124void PendSV_Handler(void)
125{
126}
127
133void SysTick_Handler(void)
134{
135}
136
142void TMR6_DAC_GLOBAL_IRQHandler(void)
143{
144 if(tmr_flag_get(TMR6, TMR_OVF_FLAG) != RESET)
145 {
146 /* Update the local_time by adding SYSTEMTICK_PERIOD_MS each SysTick interrupt */
147 time_update();
148 tmr_flag_clear(TMR6, TMR_OVF_FLAG);
149 }
150}
156void EMAC_IRQHandler(void)
157{
158 /* handles all the received frames */
159 while(emac_received_packet_size_get() != 0)
160 {
161 lwip_pkt_handle();
162 }
163
164 /* clear the emac dma rx it pending bits */
165 emac_dma_flag_clear(EMAC_DMA_RI_FLAG);
166 emac_dma_flag_clear(EMAC_DMA_NIS_FLAG);
167}
168
174void EMAC_WKUP_IRQHandler(void)
175{
176 volatile uint32_t reg_val;
177
178 emac_power_down_set(FALSE);
179 reg_val = EMAC->pmtctrlsts;
180
181 emac_trasmitter_enable(TRUE);
182 emac_dma_operations_set(EMAC_DMA_OPS_START_STOP_TRANSMIT, TRUE);
183 emac_dma_operations_set(EMAC_DMA_OPS_START_STOP_RECEIVE, TRUE);
184
185 EMAC_DMA->sts = 0x10000000;
186 exint_flag_clear(EXINT_LINE_19);
187 system_clock_config();
188}
189
EMAC_WKUP_IRQHandler
void EMAC_WKUP_IRQHandler(void)
this function handles wakeup frames and magic packets
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c:174
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c:93
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c:54
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c:67
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c:106
EMAC_IRQHandler
void EMAC_IRQHandler(void)
this function handles emac handler.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c:156
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c:124
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c:45
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c:80
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c:133
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c:115
TMR6_DAC_GLOBAL_IRQHandler
void TMR6_DAC_GLOBAL_IRQHandler(void)
this function handles timer6 overflow handler.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c:142
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
emac_dma_operations_set
void emac_dma_operations_set(emac_dma_operations_type ops, confirm_state new_state)
set dma operations
Definition: at32f435_437_emac.c:1371
emac_trasmitter_enable
void emac_trasmitter_enable(confirm_state new_state)
emac transmitter enable.
Definition: at32f435_437_emac.c:307
emac_power_down_set
void emac_power_down_set(confirm_state new_state)
all frame will be droppped except wakeup frame or magic packet.
Definition: at32f435_437_emac.c:747
emac_dma_flag_clear
void emac_dma_flag_clear(uint32_t dma_flag)
clear the emac dma flag.
Definition: at32f435_437_emac.c:2290
emac_received_packet_size_get
uint32_t emac_received_packet_size_get(void)
get the size of received the received packet.
Definition: at32f435_437_emac.c:1044
EMAC_DMA_OPS_START_STOP_RECEIVE
@ EMAC_DMA_OPS_START_STOP_RECEIVE
Definition: at32f435_437_emac.h:470
EMAC_DMA_OPS_START_STOP_TRANSMIT
@ EMAC_DMA_OPS_START_STOP_TRANSMIT
Definition: at32f435_437_emac.h:474
EMAC_DMA_RI_FLAG
#define EMAC_DMA_RI_FLAG
Definition: at32f435_437_emac.h:264
EMAC_DMA_NIS_FLAG
#define EMAC_DMA_NIS_FLAG
Definition: at32f435_437_emac.h:272
EMAC_DMA
#define EMAC_DMA
Definition: at32f435_437_emac.h:1561
EMAC
#define EMAC
Definition: at32f435_437_emac.h:1558
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
EXINT_LINE_19
#define EXINT_LINE_19
Definition: at32f435_437_exint.h:71
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
at32f435_437_clock.h
header file of clock program
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • emac
  • wake_on_lan
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/wake_on_lan/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "at32_emac.h"
#include "netconf.h"
#include "ip_addr.h"

Go to the source code of this file.

Macros

#define | DELAY 100
#define | FAST 1
#define | SLOW 4

Functions

void | emac_wake_on_lan_init (void)
wake on lan configuration, it will be woken by magic packet More...
int | main (void)
main function. More...

Variables

uint8_t | g_speed = 1
volatile uint32_t | local_time = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/wake_on_lan/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • emac
  • wake_on_lan
  • src
project/at_start_f437/examples/emac/wake_on_lan/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "at32_emac.h"
30#include "netconf.h"
31#include "ip_addr.h"
32
41#define DELAY 100
42#define FAST 1
43#define SLOW 4
44
45uint8_t g_speed = FAST;
46volatile uint32_t local_time = 0;
47
48void emac_wake_on_lan_init(void);
49
55int main(void)
56{
57 error_status status;
58
59 system_clock_config();
60
61 at32_board_init();
62
63 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
64
65 delay_init();
66
67 status = emac_system_init();
68
69 while(status == ERROR);
70
71 tcpip_stack_init();
72
73 emac_wake_on_lan_init();
74
75 while(1)
76 {
77 lwip_periodic_handle(local_time);
78 }
79}
80
86void emac_wake_on_lan_init(void)
87{
88 exint_init_type exint_init_structure;
89
90 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
91 nvic_irq_enable(EMAC_WKUP_IRQn, 2, 0);
92
93 emac_dma_operations_set(EMAC_DMA_OPS_START_STOP_TRANSMIT, FALSE);
94 emac_trasmitter_enable(FALSE);
95
96 emac_receiver_enable(FALSE);
97 emac_dma_operations_set(EMAC_DMA_OPS_START_STOP_RECEIVE, FALSE);
98
99 exint_init_structure.line_select = EXINT_LINE_19;
100 exint_init_structure.line_enable = TRUE;
101 exint_init_structure.line_mode = EXINT_LINE_INTERRUPUT;
102 exint_init_structure.line_polarity = EXINT_TRIGGER_BOTH_EDGE;
103 exint_init(&exint_init_structure);
104
105 emac_magic_packet_enable(TRUE);
106
107 emac_power_down_set(TRUE);
108
109 emac_receiver_enable(TRUE);
110
111 SysTick->CTRL = FALSE;
112 SysTick->VAL = FALSE;
113
114 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
115 exint_flag_clear(EXINT_LINE_19);
116
117 pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER);
118 pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI);
119}
120
at32f435_437_board.h
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
emac_wake_on_lan_init
void emac_wake_on_lan_init(void)
wake on lan configuration, it will be woken by magic packet
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/main.c:86
FAST
#define FAST
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/main.c:42
main
int main(void)
main function.
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/main.c:55
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/main.c:46
g_speed
uint8_t g_speed
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/main.c:45
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
delay_init
void delay_init()
initialize delay function
Definition: at32f435_437_board.c:293
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
emac_dma_operations_set
void emac_dma_operations_set(emac_dma_operations_type ops, confirm_state new_state)
set dma operations
Definition: at32f435_437_emac.c:1371
emac_trasmitter_enable
void emac_trasmitter_enable(confirm_state new_state)
emac transmitter enable.
Definition: at32f435_437_emac.c:307
emac_power_down_set
void emac_power_down_set(confirm_state new_state)
all frame will be droppped except wakeup frame or magic packet.
Definition: at32f435_437_emac.c:747
emac_magic_packet_enable
void emac_magic_packet_enable(confirm_state new_state)
magic packet enable
Definition: at32f435_437_emac.c:757
emac_receiver_enable
void emac_receiver_enable(confirm_state new_state)
emac receiver enable.
Definition: at32f435_437_emac.c:291
EMAC_DMA_OPS_START_STOP_RECEIVE
@ EMAC_DMA_OPS_START_STOP_RECEIVE
Definition: at32f435_437_emac.h:470
EMAC_DMA_OPS_START_STOP_TRANSMIT
@ EMAC_DMA_OPS_START_STOP_TRANSMIT
Definition: at32f435_437_emac.h:474
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_BOTH_EDGE
@ EXINT_TRIGGER_BOTH_EDGE
Definition: at32f435_437_exint.h:100
EXINT_LINE_19
#define EXINT_LINE_19
Definition: at32f435_437_exint.h:71
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_voltage_regulate_set
void pwc_voltage_regulate_set(pwc_regulator_type pwc_regulator)
regulate low power consumption in the deep sleep mode
Definition: at32f435_437_pwc.c:214
pwc_deep_sleep_mode_enter
void pwc_deep_sleep_mode_enter(pwc_deep_sleep_enter_type pwc_deep_sleep_enter)
enter pwc deep-sleep mode
Definition: at32f435_437_pwc.c:190
PWC_REGULATOR_LOW_POWER
@ PWC_REGULATOR_LOW_POWER
Definition: at32f435_437_pwc.h:130
PWC_DEEP_SLEEP_ENTER_WFI
@ PWC_DEEP_SLEEP_ENTER_WFI
Definition: at32f435_437_pwc.h:120
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: netconf.c File Reference

  • emac
  • wake_on_lan
  • src
Macros | Functions | Variables
project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c File Reference

network connection configuration More...

#include "lwip/memp.h"
#include "lwip/tcp.h"
#include "lwip/priv/tcp_priv.h"
#include "lwip/udp.h"
#include "netif/etharp.h"
#include "lwip/dhcp.h"
#include "ethernetif.h"
#include "netconf.h"
#include "stdio.h"
#include "at32_emac.h"

Go to the source code of this file.

Macros

#define | MAC_ADDR_LENGTH (6)
#define | ADDR_LENGTH (4)
#define | SYSTEMTICK_PERIOD_MS 10

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Variables

volatile uint32_t | local_time
struct netif | netif
volatile uint32_t | tcp_timer = 0
volatile uint32_t | arp_timer = 0
volatile uint32_t | link_timer = 0
static uint8_t | mac_address [(6)] = {0, 0, 0x44, 0x45, 0x56, 1}
static uint8_t | local_ip [(4)] = {192, 168, 81, 37}
static uint8_t | local_gw [(4)] = {192, 168, 81, 187}
static uint8_t | local_mask [(4)] = {255, 255, 255, 0}

Detailed Description

network connection configuration

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c.


AT32F435/437 Firmwary Library: netconf.c Source File

  • emac
  • wake_on_lan
  • src
project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c
Go to the documentation of this file.
1
27/* Includes ------------------------------------------------------------------*/
28#include "lwip/memp.h"
29#include "lwip/tcp.h"
30#include "lwip/priv/tcp_priv.h"
31#include "lwip/udp.h"
32#include "netif/etharp.h"
33#include "lwip/dhcp.h"
34#include "ethernetif.h"
35#include "netconf.h"
36#include "stdio.h"
37#include "at32_emac.h"
38
51/* Private define ------------------------------------------------------------*/
52/* Private macro -------------------------------------------------------------*/
53#define MAC_ADDR_LENGTH (6)
54#define ADDR_LENGTH (4)
55#define SYSTEMTICK_PERIOD_MS 10
56/* Private variables ---------------------------------------------------------*/
57extern volatile uint32_t local_time;
58struct netif netif;
59volatile uint32_t tcp_timer = 0;
60volatile uint32_t arp_timer = 0;
61volatile uint32_t link_timer = 0;
62
63static uint8_t mac_address[MAC_ADDR_LENGTH] = {0, 0, 0x44, 0x45, 0x56, 1};;
64#if LWIP_DHCP
65volatile uint32_t dhcp_fine_timer = 0;
66volatile uint32_t dhcp_coarse_timer = 0;
67#else
68static uint8_t local_ip[ADDR_LENGTH] = {192, 168, 81, 37};
69static uint8_t local_gw[ADDR_LENGTH] = {192, 168, 81, 187};
70static uint8_t local_mask[ADDR_LENGTH] = {255, 255, 255, 0};
71#endif
72
73/* Private function prototypes -----------------------------------------------*/
74/* Private functions ---------------------------------------------------------*/
75
81void tcpip_stack_init(void)
82{
83 ip_addr_t ipaddr;
84 ip_addr_t netmask;
85 ip_addr_t gw;
86
87 /* Initializes the dynamic memory heap defined by MEM_SIZE.*/
88 mem_init();
89
90 /* Initializes the memory pools defined by MEMP_NUM_x.*/
91 memp_init();
92
93
94#if LWIP_DHCP //need DHCP server
95 ipaddr.addr = 0;
96 netmask.addr = 0;
97 gw.addr = 0;
98
99#else
100 IP4_ADDR(&ipaddr, local_ip[0], local_ip[1], local_ip[2], local_ip[3]);
101 IP4_ADDR(&netmask, local_mask[0], local_mask[1], local_mask[2], local_mask[3]);
102 IP4_ADDR(&gw, local_gw[0], local_gw[1], local_gw[2], local_gw[3]);
103#endif
104
105 lwip_set_mac_address(mac_address);
106
107 /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
108 struct ip_addr *netmask, struct ip_addr *gw,
109 void *state, err_t (* init)(struct netif *netif),
110 err_t (* input)(struct pbuf *p, struct netif *netif))
111
112 Adds your network interface to the netif_list. Allocate a struct
113 netif and pass a pointer to this structure as the first argument.
114 Give pointers to cleared ip_addr structures when using DHCP,
115 or fill them with sane numbers otherwise. The state pointer may be NULL.
116
117 The init function pointer must point to a initialization function for
118 your ethernet netif interface. The following code illustrates it's use.*/
119
120 if(netif_add(&netif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &netif_input) == NULL)
121 {
122 while(1);
123 }
124
125 /* Registers the default network interface.*/
126 netif_set_default(&netif);
127
128 /* When the netif is fully configured this function must be called.*/
129 netif_set_up(&netif);
130
131 /* Set the link callback function, this function is called on change of link status*/
132 netif_set_link_callback(&netif, ethernetif_update_config);
133}
134
140void lwip_pkt_handle(void)
141{
142 /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */
143 if(ethernetif_input(&netif) != ERR_OK)
144 {
145 while(1);
146 }
147}
148
154void time_update(void)
155{
156 local_time += SYSTEMTICK_PERIOD_MS;
157}
158
164void lwip_periodic_handle(volatile uint32_t localtime)
165{
166
167 /* TCP periodic process every 250 ms */
168 if (localtime - tcp_timer >= TCP_TMR_INTERVAL)
169 {
170 tcp_timer = localtime;
171 tcp_tmr();
172 }
173 /* ARP periodic process every 5s */
174 if (localtime - arp_timer >= ARP_TMR_INTERVAL)
175 {
176 arp_timer = localtime;
177 etharp_tmr();
178 }
179
180#if LWIP_DHCP
181 /* Fine DHCP periodic process every 500ms */
182 if (localtime - dhcp_fine_timer >= DHCP_FINE_TIMER_MSECS)
183 {
184 dhcp_fine_timer = localtime;
185 dhcp_fine_tmr();
186 }
187 /* DHCP Coarse periodic process every 60s */
188 if (localtime - dhcp_coarse_timer >= DHCP_COARSE_TIMER_MSECS)
189 {
190 dhcp_coarse_timer = localtime;
191 dhcp_coarse_tmr();
192 }
193#endif
194
195#if (LINK_DETECTION > 0)
196 /* link detection process every 500 ms */
197 if (localtime - link_timer >= 500)
198 {
199 link_timer = localtime;
200 ethernetif_set_link(&netif);
201 }
202#endif
203}
204
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
local_mask
static uint8_t local_mask[(4)]
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c:70
link_timer
volatile uint32_t link_timer
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c:61
local_gw
static uint8_t local_gw[(4)]
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c:69
ADDR_LENGTH
#define ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c:54
arp_timer
volatile uint32_t arp_timer
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c:60
MAC_ADDR_LENGTH
#define MAC_ADDR_LENGTH
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c:53
SYSTEMTICK_PERIOD_MS
#define SYSTEMTICK_PERIOD_MS
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c:55
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:49
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c:58
tcp_timer
volatile uint32_t tcp_timer
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c:59
local_ip
static uint8_t local_ip[(4)]
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c:68
mac_address
static uint8_t mac_address[(6)]
Definition: project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c:63


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • ertc
  • bpr_domain
  • inc
project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • ertc
  • bpr_domain
  • inc
project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • ertc
  • bpr_domain
  • inc
project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • ertc
  • bpr_domain
  • src
Functions
project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • ertc
  • bpr_domain
  • src
project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • ertc
  • bpr_domain
  • src
Functions
project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • ertc
  • bpr_domain
  • src
project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • ertc
  • bpr_domain
  • src
Macros | Functions | Variables
project/at_start_f437/examples/ertc/bpr_domain/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define ERTC_BPR_DT_NUMBER 20

Functions

void | ertc_config (void)
configure the ertc peripheral. More...
void | bpr_reg_write (void)
write data to bpr dt register. More...
uint32_t | bpr_reg_check (void)
checks if the bpr dt register values are correct or not. More...
int | main (void)
main function. More...

Variables

ertc_dt_type bpr_addr_tab [20]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/bpr_domain/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • ertc
  • bpr_domain
  • src
project/at_start_f437/examples/ertc/bpr_domain/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define ERTC_BPR_DT_NUMBER 20
39
40 ertc_dt_type bpr_addr_tab[ERTC_BPR_DT_NUMBER] =
41{
42 ERTC_DT1, ERTC_DT2, ERTC_DT3, ERTC_DT4, ERTC_DT5,
43 ERTC_DT6, ERTC_DT7, ERTC_DT8, ERTC_DT9, ERTC_DT10,
44 ERTC_DT11, ERTC_DT12, ERTC_DT13, ERTC_DT14, ERTC_DT15,
45 ERTC_DT16, ERTC_DT17, ERTC_DT18, ERTC_DT19, ERTC_DT20
46};
47
48void ertc_config(void);
49void bpr_reg_write(void);
50uint32_t bpr_reg_check(void);
51
57int main(void)
58{
59 uint32_t temp = 0;
60 ertc_time_type time;
61
62 /* initial system clock */
63 system_clock_config();
64
65 /* initial the nvic priority group */
66 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
67
68 /* initialize uart */
69 uart_print_init(115200);
70
71 printf("\r\nertc bpr domain example\r\n\r\n");
72
73 /* enable the pwc clock interface */
74 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
75
76 /* allow access to bpr domain */
77 pwc_battery_powered_domain_access(TRUE);
78
79 /* check data from bpr dt register */
80 if(bpr_reg_check() == FALSE)
81 {
82 printf("bpr reg => reset\r\n\r\n");
83
84 /* ertc configuration */
85 ertc_config();
86
87 /* write to ertc bpr data registers */
88 bpr_reg_write();
89 }
90 else
91 {
92 printf("bpr reg => none reset\r\n\r\n");
93
94 /* wait for ertc registers update */
95 ertc_wait_update();
96 }
97
98 while(1)
99 {
100 /* get the current time */
101 ertc_calendar_get(&time);
102
103 if(temp != time.sec)
104 {
105 temp = time.sec;
106
107 /* display date format : year-month-day */
108 printf("%02d-%02d-%02d ",time.year, time.month, time.day);
109
110 /* display time format : hour:min:sec */
111 printf("%02d:%02d:%02d\r\n",time.hour, time.min, time.sec);
112 }
113 }
114}
115
121void ertc_config(void)
122{
123 /* allow access to ertc */
124 pwc_battery_powered_domain_access(TRUE);
125
126 /* reset ertc domain */
127 crm_battery_powered_domain_reset(TRUE);
128 crm_battery_powered_domain_reset(FALSE);
129
130 /* enable the lext osc */
131 crm_clock_source_enable(CRM_CLOCK_SOURCE_LEXT, TRUE);
132
133 /* wait till lext is ready */
134 while(crm_flag_get(CRM_LEXT_STABLE_FLAG) == RESET)
135 {
136 }
137
138 /* select the ertc clock source */
139 crm_ertc_clock_select(CRM_ERTC_CLOCK_LEXT);
140
141 /* enable the ertc clock */
142 crm_ertc_clock_enable(TRUE);
143
144 /* deinitializes the ertc registers */
145 ertc_reset();
146
147 /* wait for ertc apb registers update */
148 ertc_wait_update();
149
150 /* configure the ertc divider */
151 /* ertc second(1hz) = ertc_clk / (div_a + 1) * (div_b + 1) */
152 ertc_divider_set(127, 255);
153
154 /* configure the ertc hour mode */
155 ertc_hour_mode_set(ERTC_HOUR_MODE_24);
156
157 /* set date: 2021-05-01 */
158 ertc_date_set(21, 5, 1, 5);
159
160 /* set time: 12:00:00 */
161 ertc_time_set(12, 0, 0, ERTC_AM);
162}
163
169void bpr_reg_write(void)
170{
171 uint32_t index = 0;
172
173 for (index = 0; index < ERTC_BPR_DT_NUMBER; index++)
174 {
175 ertc_bpr_data_write(bpr_addr_tab[index], 0x5A00 + (index * 0x5A));
176 }
177}
178
187uint32_t bpr_reg_check(void)
188{
189 uint32_t index = 0;
190
191 for (index = 0; index < ERTC_BPR_DT_NUMBER; index++)
192 {
193 if (ertc_bpr_data_read(bpr_addr_tab[index]) != (0x5A00 + (index * 0x5A)))
194 {
195 return FALSE;
196 }
197 }
198
199 return TRUE;
200}
201
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
ERTC_BPR_DT_NUMBER
#define ERTC_BPR_DT_NUMBER
Definition: project/at_start_f437/examples/ertc/bpr_domain/src/main.c:38
bpr_addr_tab
ertc_dt_type bpr_addr_tab[20]
Definition: project/at_start_f437/examples/ertc/bpr_domain/src/main.c:40
bpr_reg_write
void bpr_reg_write(void)
write data to bpr dt register.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:169
bpr_reg_check
uint32_t bpr_reg_check(void)
checks if the bpr dt register values are correct or not.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:187
ertc_config
void ertc_config(void)
configure the ertc peripheral.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:121
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_ertc_clock_select
void crm_ertc_clock_select(crm_ertc_clock_type value)
select ertc clock
Definition: at32f435_437_crm.c:434
crm_ertc_clock_enable
void crm_ertc_clock_enable(confirm_state new_state)
enable or disable ertc
Definition: at32f435_437_crm.c:445
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_battery_powered_domain_reset
void crm_battery_powered_domain_reset(confirm_state new_state)
battery powered domain software reset
Definition: at32f435_437_crm.c:541
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_CLOCK_SOURCE_LEXT
@ CRM_CLOCK_SOURCE_LEXT
Definition: at32f435_437_crm.h:562
CRM_ERTC_CLOCK_LEXT
@ CRM_ERTC_CLOCK_LEXT
Definition: at32f435_437_crm.h:632
CRM_LEXT_STABLE_FLAG
#define CRM_LEXT_STABLE_FLAG
Definition: at32f435_437_crm.h:58
ertc_hour_mode_set
error_status ertc_hour_mode_set(ertc_hour_mode_set_type mode)
ertc hour mode set.
Definition: at32f435_437_ertc.c:283
ertc_wait_update
error_status ertc_wait_update(void)
ertc wait register update finish.
Definition: at32f435_437_ertc.c:97
ertc_time_set
error_status ertc_time_set(uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set time.
Definition: at32f435_437_ertc.c:363
ertc_reset
error_status ertc_reset(void)
ertc reset all register.
Definition: at32f435_437_ertc.c:207
ertc_date_set
error_status ertc_date_set(uint8_t year, uint8_t month, uint8_t date, uint8_t week)
set date.
Definition: at32f435_437_ertc.c:314
ertc_bpr_data_read
uint32_t ertc_bpr_data_read(ertc_dt_type dt)
read data from bpr register.
Definition: at32f435_437_ertc.c:1550
ertc_calendar_get
void ertc_calendar_get(ertc_time_type *time)
get calendar
Definition: at32f435_437_ertc.c:404
ertc_divider_set
error_status ertc_divider_set(uint16_t div_a, uint16_t div_b)
ertc division set.
Definition: at32f435_437_ertc.c:251
ertc_bpr_data_write
void ertc_bpr_data_write(ertc_dt_type dt, uint32_t data)
write data to the bpr register.
Definition: at32f435_437_ertc.c:1524
ertc_dt_type
ertc_dt_type
ertc bpr register
Definition: at32f435_437_ertc.h:356
ERTC_HOUR_MODE_24
@ ERTC_HOUR_MODE_24
Definition: at32f435_437_ertc.h:116
ERTC_DT11
@ ERTC_DT11
Definition: at32f435_437_ertc.h:367
ERTC_DT13
@ ERTC_DT13
Definition: at32f435_437_ertc.h:369
ERTC_DT2
@ ERTC_DT2
Definition: at32f435_437_ertc.h:358
ERTC_DT1
@ ERTC_DT1
Definition: at32f435_437_ertc.h:357
ERTC_DT15
@ ERTC_DT15
Definition: at32f435_437_ertc.h:371
ERTC_DT18
@ ERTC_DT18
Definition: at32f435_437_ertc.h:374
ERTC_DT19
@ ERTC_DT19
Definition: at32f435_437_ertc.h:375
ERTC_DT6
@ ERTC_DT6
Definition: at32f435_437_ertc.h:362
ERTC_DT7
@ ERTC_DT7
Definition: at32f435_437_ertc.h:363
ERTC_DT20
@ ERTC_DT20
Definition: at32f435_437_ertc.h:376
ERTC_DT17
@ ERTC_DT17
Definition: at32f435_437_ertc.h:373
ERTC_DT3
@ ERTC_DT3
Definition: at32f435_437_ertc.h:359
ERTC_DT4
@ ERTC_DT4
Definition: at32f435_437_ertc.h:360
ERTC_DT8
@ ERTC_DT8
Definition: at32f435_437_ertc.h:364
ERTC_DT5
@ ERTC_DT5
Definition: at32f435_437_ertc.h:361
ERTC_DT10
@ ERTC_DT10
Definition: at32f435_437_ertc.h:366
ERTC_DT9
@ ERTC_DT9
Definition: at32f435_437_ertc.h:365
ERTC_DT16
@ ERTC_DT16
Definition: at32f435_437_ertc.h:372
ERTC_DT12
@ ERTC_DT12
Definition: at32f435_437_ertc.h:368
ERTC_DT14
@ ERTC_DT14
Definition: at32f435_437_ertc.h:370
ERTC_AM
@ ERTC_AM
Definition: at32f435_437_ertc.h:126
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
time
ertc_time_type * time
Definition: random.c:41
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_battery_powered_domain_access
void pwc_battery_powered_domain_access(confirm_state new_state)
enable or disable access to the battery powered domain.
Definition: at32f435_437_pwc.c:61
ertc_time_type
ertc time
Definition: at32f435_437_ertc.h:383
ertc_time_type::year
uint8_t year
Definition: at32f435_437_ertc.h:384
ertc_time_type::day
uint8_t day
Definition: at32f435_437_ertc.h:386
ertc_time_type::hour
uint8_t hour
Definition: at32f435_437_ertc.h:387
ertc_time_type::min
uint8_t min
Definition: at32f435_437_ertc.h:388
ertc_time_type::month
uint8_t month
Definition: at32f435_437_ertc.h:385
ertc_time_type::sec
uint8_t sec
Definition: at32f435_437_ertc.h:389
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • ertc
  • calendar
  • inc
project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • ertc
  • calendar
  • inc
project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • ertc
  • calendar
  • inc
project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • ertc
  • calendar
  • src
Functions
project/at_start_f437/examples/ertc/calendar/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/calendar/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • ertc
  • calendar
  • src
project/at_start_f437/examples/ertc/calendar/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/ertc/calendar/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • ertc
  • calendar
  • src
Functions
project/at_start_f437/examples/ertc/calendar/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | ertc_alarm_show (void)
display the current alarm. More...
void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | ERTCAlarm_IRQHandler (void)
this function handles ertc alarms interrupt request. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/calendar/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • ertc
  • calendar
  • src
project/at_start_f437/examples/ertc/calendar/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
39extern void ertc_alarm_show(void);
40
46void NMI_Handler(void)
47{
48}
49
55void HardFault_Handler(void)
56{
57 /* go to infinite loop when hard fault exception occurs */
58 while(1)
59 {
60 }
61}
62
68void MemManage_Handler(void)
69{
70 /* go to infinite loop when memory manage exception occurs */
71 while(1)
72 {
73 }
74}
75
81void BusFault_Handler(void)
82{
83 /* go to infinite loop when bus fault exception occurs */
84 while(1)
85 {
86 }
87}
88
94void UsageFault_Handler(void)
95{
96 /* go to infinite loop when usage fault exception occurs */
97 while(1)
98 {
99 }
100}
101
107void SVC_Handler(void)
108{
109}
110
116void DebugMon_Handler(void)
117{
118}
119
125void PendSV_Handler(void)
126{
127}
128
134void SysTick_Handler(void)
135{
136}
137
143void ERTCAlarm_IRQHandler(void)
144{
145 if(ertc_flag_get(ERTC_ALAF_FLAG) != RESET)
146 {
147 /* display the alarm */
148 ertc_alarm_show();
149
150 at32_led_on(LED2);
151
152 /* clear alarm flag */
153 ertc_flag_clear(ERTC_ALAF_FLAG);
154
155 /* clear exint flag */
156 exint_flag_clear(EXINT_LINE_17);
157 }
158}
159
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ERTCAlarm_IRQHandler
void ERTCAlarm_IRQHandler(void)
this function handles ertc alarms interrupt request.
Definition: project/at_start_f435/examples/ertc/calendar/src/at32f435_437_int.c:143
ertc_alarm_show
void ertc_alarm_show(void)
display the current alarm.
Definition: project/at_start_f435/examples/ertc/calendar/src/main.c:247
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
ertc_flag_get
flag_status ertc_flag_get(uint32_t flag)
get flag status.
Definition: at32f435_437_ertc.c:1474
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ERTC_ALAF_FLAG
#define ERTC_ALAF_FLAG
Definition: at32f435_437_ertc.h:74
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
EXINT_LINE_17
#define EXINT_LINE_17
Definition: at32f435_437_exint.h:69
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • ertc
  • calendar
  • src
Macros | Functions | Variables
project/at_start_f437/examples/ertc/calendar/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define ERTC_CLOCK_SOURCE_LEXT /* select lext as the ertc clock */

Functions

void | ertc_config (void)
configure the ertc peripheral by selecting the clock source. More...
void | ertc_alarm_show (void)
display the current alarm. More...
void | ertc_time_show (void)
display the current time. More...
int | main (void)
main program More...

Variables

__IO uint16_t | ertc_clk_div_a = 0
__IO uint16_t | ertc_clk_div_b = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/calendar/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • ertc
  • calendar
  • src
project/at_start_f437/examples/ertc/calendar/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38/* select the ertc clock source */
39#define ERTC_CLOCK_SOURCE_LEXT /* select lext as the ertc clock */
40//#define ERTC_CLOCK_SOURCE_LICK /* select lick as the ertc clock */
41
42__IO uint16_t ertc_clk_div_a = 0;
43__IO uint16_t ertc_clk_div_b = 0;
44
45void ertc_config(void);
46void ertc_alarm_show(void);
47void ertc_time_show(void);
48
54int main(void)
55{
56 exint_init_type exint_init_struct;
57 ertc_time_type time;
58 uint32_t temp = 0;
59
60 /* initial system clock */
61 system_clock_config();
62
63 /* initial the nvic priority group */
64 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
65
66 /* at board initial */
67 at32_board_init();
68
69 /* initialize uart */
70 uart_print_init(115200);
71
72 /* enable the pwc clock interface */
73 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
74
75 /* allow access to ertc */
76 pwc_battery_powered_domain_access(TRUE);
77
78 if (ertc_bpr_data_read(ERTC_DT1) != 0x1234)
79 {
80 /* printf ertc status */
81 printf("ertc has not been initialized\r\n\r\n");
82
83 /* ertc configuration */
84 ertc_config();
85 }
86 else
87 {
88 /* printf ertc status */
89 printf("ertc has been initialized\r\n\r\n");
90
91 /* wait for ertc registers update */
92 ertc_wait_update();
93
94 /* clear the ertc alarm flag */
95 ertc_flag_clear(ERTC_ALAF_FLAG);
96
97 /* clear the exint line 17 pending bit */
98 exint_flag_clear(EXINT_LINE_17);
99 }
100
101 /* display the ertc alarm and time */
102 ertc_time_show();
103 ertc_alarm_show();
104
105 printf("\r\n");
106
107 /* ertc alarm interrupt configuration */
108 exint_default_para_init(&exint_init_struct);
109 exint_init_struct.line_enable = TRUE;
110 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
111 exint_init_struct.line_select = EXINT_LINE_17;
112 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
113 exint_init(&exint_init_struct);
114
115 /* enable the ertc interrupt */
116 nvic_irq_enable(ERTCAlarm_IRQn, 0, 1);
117
118 while(1)
119 {
120 /* get the current time */
121 ertc_calendar_get(&time);
122
123 if(temp != time.sec)
124 {
125 temp = time.sec;
126
127 /* display date format : year-month-day */
128 printf("%02d-%02d-%02d ",time.year, time.month, time.day);
129
130 /* display time format : hour:min:sec */
131 printf("%02d:%02d:%02d\r\n",time.hour, time.min, time.sec);
132 }
133 }
134}
135
141void ertc_config(void)
142{
143 /* enable the pwc clock interface */
144 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
145
146 /* allow access to ertc */
147 pwc_battery_powered_domain_access(TRUE);
148
149 /* reset ertc domain */
150 crm_battery_powered_domain_reset(TRUE);
151 crm_battery_powered_domain_reset(FALSE);
152
153#if defined (ERTC_CLOCK_SOURCE_LICK)
154 /* enable the lick osc */
155 crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE);
156
157 /* wait till lick is ready */
158 while(crm_flag_get(CRM_LICK_STABLE_FLAG) == RESET)
159 {
160 }
161
162 /* select the ertc clock source */
163 crm_ertc_clock_select(CRM_ERTC_CLOCK_LICK);
164
165 /* ertc second(1hz) = ertc_clk(lick) / (ertc_clk_div_a + 1) * (ertc_clk_div_b + 1) */
166 ertc_clk_div_b = 255;
167 ertc_clk_div_a = 127;
168#elif defined (ERTC_CLOCK_SOURCE_LEXT)
169 /* enable the lext osc */
170 crm_clock_source_enable(CRM_CLOCK_SOURCE_LEXT, TRUE);
171
172 /* wait till lext is ready */
173 while(crm_flag_get(CRM_LEXT_STABLE_FLAG) == RESET)
174 {
175 }
176
177 /* select the ertc clock source */
178 crm_ertc_clock_select(CRM_ERTC_CLOCK_LEXT);
179
180 /* ertc second(1hz) = ertc_clk / (ertc_clk_div_a + 1) * (ertc_clk_div_b + 1) */
181 ertc_clk_div_b = 255;
182 ertc_clk_div_a = 127;
183#endif
184
185 /* enable the ertc clock */
186 crm_ertc_clock_enable(TRUE);
187
188 /* deinitializes the ertc registers */
189 ertc_reset();
190
191 /* wait for ertc registers update */
192 ertc_wait_update();
193
194 /* configure the ertc divider */
195 ertc_divider_set(ertc_clk_div_a, ertc_clk_div_b);
196
197 /* configure the ertc hour mode */
198 ertc_hour_mode_set(ERTC_HOUR_MODE_24);
199
200 /* set date: 2021-05-01 */
201 ertc_date_set(21, 5, 1, 5);
202
203 /* set time: 12:00:00 */
204 ertc_time_set(12, 0, 0, ERTC_AM);
205
206 /* set the alarm 12:00:10 */
207 ertc_alarm_mask_set(ERTC_ALA, ERTC_ALARM_MASK_DATE_WEEK);
208 ertc_alarm_week_date_select(ERTC_ALA, ERTC_SLECT_DATE);
209 ertc_alarm_set(ERTC_ALA, 1, 12, 0, 10, ERTC_AM);
210
211 /* enable ertc alarm a interrupt */
212 ertc_interrupt_enable(ERTC_ALA_INT, TRUE);
213
214 /* enable the alarm */
215 ertc_alarm_enable(ERTC_ALA, TRUE);
216
217 ertc_flag_clear(ERTC_ALAF_FLAG);
218
219 /* indicator for the ertc configuration */
220 ertc_bpr_data_write(ERTC_DT1, 0x1234);
221}
222
228void ertc_time_show(void)
229{
230 ertc_time_type time;
231
232 /* get the current time */
233 ertc_calendar_get(&time);
234
235 /* display date format : year-month-day */
236 printf("Time: %02d-%02d-%02d ",time.year, time.month, time.day);
237
238 /* display time format : hour:min:sec */
239 printf("%02d:%02d:%02d\r\n",time.hour, time.min, time.sec);
240}
241
247void ertc_alarm_show(void)
248{
249 ertc_alarm_value_type alarm;
250
251 /* get the current alarm */
252 ertc_alarm_get(ERTC_ALA, &alarm);
253
254 /* display alarm format : hour:min:sec */
255 printf("Alarm: %02d:%02d:%02d\r\n",alarm.hour, alarm.min, alarm.sec);
256}
257
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
ertc_config
void ertc_config(void)
configure the ertc peripheral.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:121
ertc_time_show
void ertc_time_show(void)
display the current time.
Definition: project/at_start_f435/examples/ertc/calendar/src/main.c:228
ertc_clk_div_a
__IO uint16_t ertc_clk_div_a
Definition: project/at_start_f437/examples/ertc/calendar/src/main.c:42
ertc_clk_div_b
__IO uint16_t ertc_clk_div_b
Definition: project/at_start_f437/examples/ertc/calendar/src/main.c:43
ertc_alarm_show
void ertc_alarm_show(void)
display the current alarm.
Definition: project/at_start_f435/examples/ertc/calendar/src/main.c:247
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_ertc_clock_select
void crm_ertc_clock_select(crm_ertc_clock_type value)
select ertc clock
Definition: at32f435_437_crm.c:434
crm_ertc_clock_enable
void crm_ertc_clock_enable(confirm_state new_state)
enable or disable ertc
Definition: at32f435_437_crm.c:445
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_battery_powered_domain_reset
void crm_battery_powered_domain_reset(confirm_state new_state)
battery powered domain software reset
Definition: at32f435_437_crm.c:541
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_CLOCK_SOURCE_LEXT
@ CRM_CLOCK_SOURCE_LEXT
Definition: at32f435_437_crm.h:562
CRM_CLOCK_SOURCE_LICK
@ CRM_CLOCK_SOURCE_LICK
Definition: at32f435_437_crm.h:563
CRM_ERTC_CLOCK_LICK
@ CRM_ERTC_CLOCK_LICK
Definition: at32f435_437_crm.h:633
CRM_ERTC_CLOCK_LEXT
@ CRM_ERTC_CLOCK_LEXT
Definition: at32f435_437_crm.h:632
CRM_LICK_STABLE_FLAG
#define CRM_LICK_STABLE_FLAG
Definition: at32f435_437_crm.h:59
CRM_LEXT_STABLE_FLAG
#define CRM_LEXT_STABLE_FLAG
Definition: at32f435_437_crm.h:58
ertc_alarm_get
void ertc_alarm_get(ertc_alarm_type alarm_x, ertc_alarm_value_type *alarm)
get alarm value.
Definition: at32f435_437_ertc.c:674
ertc_hour_mode_set
error_status ertc_hour_mode_set(ertc_hour_mode_set_type mode)
ertc hour mode set.
Definition: at32f435_437_ertc.c:283
ertc_wait_update
error_status ertc_wait_update(void)
ertc wait register update finish.
Definition: at32f435_437_ertc.c:97
ertc_time_set
error_status ertc_time_set(uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set time.
Definition: at32f435_437_ertc.c:363
ertc_reset
error_status ertc_reset(void)
ertc reset all register.
Definition: at32f435_437_ertc.c:207
ertc_alarm_mask_set
void ertc_alarm_mask_set(ertc_alarm_type alarm_x, uint32_t mask)
set which bits are irrelevant to the alarm match.
Definition: at32f435_437_ertc.c:458
ertc_interrupt_enable
void ertc_interrupt_enable(uint32_t source, confirm_state new_state)
enable or disable interrupt.
Definition: at32f435_437_ertc.c:1386
ertc_alarm_week_date_select
void ertc_alarm_week_date_select(ertc_alarm_type alarm_x, ertc_week_date_select_type wk)
alarm week or date mode select.
Definition: at32f435_437_ertc.c:500
ertc_date_set
error_status ertc_date_set(uint8_t year, uint8_t month, uint8_t date, uint8_t week)
set date.
Definition: at32f435_437_ertc.c:314
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ertc_bpr_data_read
uint32_t ertc_bpr_data_read(ertc_dt_type dt)
read data from bpr register.
Definition: at32f435_437_ertc.c:1550
ertc_alarm_set
void ertc_alarm_set(ertc_alarm_type alarm_x, uint8_t week_date, uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set alarm.
Definition: at32f435_437_ertc.c:538
ertc_calendar_get
void ertc_calendar_get(ertc_time_type *time)
get calendar
Definition: at32f435_437_ertc.c:404
ertc_divider_set
error_status ertc_divider_set(uint16_t div_a, uint16_t div_b)
ertc division set.
Definition: at32f435_437_ertc.c:251
ertc_bpr_data_write
void ertc_bpr_data_write(ertc_dt_type dt, uint32_t data)
write data to the bpr register.
Definition: at32f435_437_ertc.c:1524
ertc_alarm_enable
error_status ertc_alarm_enable(ertc_alarm_type alarm_x, confirm_state new_state)
enable or disable alarm clock.
Definition: at32f435_437_ertc.c:629
ERTC_SLECT_DATE
@ ERTC_SLECT_DATE
Definition: at32f435_437_ertc.h:135
ERTC_HOUR_MODE_24
@ ERTC_HOUR_MODE_24
Definition: at32f435_437_ertc.h:116
ERTC_DT1
@ ERTC_DT1
Definition: at32f435_437_ertc.h:357
ERTC_ALA
@ ERTC_ALA
Definition: at32f435_437_ertc.h:144
ERTC_AM
@ ERTC_AM
Definition: at32f435_437_ertc.h:126
ERTC_ALARM_MASK_DATE_WEEK
#define ERTC_ALARM_MASK_DATE_WEEK
Definition: at32f435_437_ertc.h:90
ERTC_ALAF_FLAG
#define ERTC_ALAF_FLAG
Definition: at32f435_437_ertc.h:74
ERTC_ALA_INT
#define ERTC_ALA_INT
Definition: at32f435_437_ertc.h:53
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_17
#define EXINT_LINE_17
Definition: at32f435_437_exint.h:69
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
time
ertc_time_type * time
Definition: random.c:41
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_battery_powered_domain_access
void pwc_battery_powered_domain_access(confirm_state new_state)
enable or disable access to the battery powered domain.
Definition: at32f435_437_pwc.c:61
ERTCAlarm_IRQn
@ ERTCAlarm_IRQn
Definition: at32f435_437.h:189
ertc_alarm_value_type
ertc alarm
Definition: at32f435_437_ertc.h:398
ertc_alarm_value_type::min
uint8_t min
Definition: at32f435_437_ertc.h:401
ertc_alarm_value_type::sec
uint8_t sec
Definition: at32f435_437_ertc.h:402
ertc_alarm_value_type::hour
uint8_t hour
Definition: at32f435_437_ertc.h:400
ertc_time_type
ertc time
Definition: at32f435_437_ertc.h:383
ertc_time_type::year
uint8_t year
Definition: at32f435_437_ertc.h:384
ertc_time_type::day
uint8_t day
Definition: at32f435_437_ertc.h:386
ertc_time_type::hour
uint8_t hour
Definition: at32f435_437_ertc.h:387
ertc_time_type::min
uint8_t min
Definition: at32f435_437_ertc.h:388
ertc_time_type::month
uint8_t month
Definition: at32f435_437_ertc.h:385
ertc_time_type::sec
uint8_t sec
Definition: at32f435_437_ertc.h:389
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • ertc
  • lick_calibration
  • inc
project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • ertc
  • lick_calibration
  • inc
project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • ertc
  • lick_calibration
  • inc
project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • ertc
  • lick_calibration
  • src
Functions
project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • ertc
  • lick_calibration
  • src
project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • ertc
  • lick_calibration
  • src
Functions | Variables
project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR5_GLOBAL_IRQHandler (void)
this function handles tmr5 global interrupt request. More...

Variables

__IO uint32_t | period_value
__IO uint32_t | capture_number
uint16_t | tmp_c4 [2] = {0, 0}

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • ertc
  • lick_calibration
  • src
project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
39extern __IO uint32_t period_value;
40extern __IO uint32_t capture_number;
41uint16_t tmp_c4[2] = {0, 0};
42
48void NMI_Handler(void)
49{
50}
51
57void HardFault_Handler(void)
58{
59 /* go to infinite loop when hard fault exception occurs */
60 while(1)
61 {
62 }
63}
64
70void MemManage_Handler(void)
71{
72 /* go to infinite loop when memory manage exception occurs */
73 while(1)
74 {
75 }
76}
77
83void BusFault_Handler(void)
84{
85 /* go to infinite loop when bus fault exception occurs */
86 while(1)
87 {
88 }
89}
90
96void UsageFault_Handler(void)
97{
98 /* go to infinite loop when usage fault exception occurs */
99 while(1)
100 {
101 }
102}
103
109void SVC_Handler(void)
110{
111}
112
118void DebugMon_Handler(void)
119{
120}
121
127void PendSV_Handler(void)
128{
129}
130
136void SysTick_Handler(void)
137{
138}
139
145void TMR5_GLOBAL_IRQHandler(void)
146{
147 if (tmr_flag_get(TMR5, TMR_C4_FLAG) != RESET)
148 {
149 /* get the input capture value */
150 tmp_c4[capture_number++] = tmr_channel_value_get(TMR5, TMR_SELECT_CHANNEL_4);
151
152 /* clear c4 interrupt pending bit */
153 tmr_flag_clear(TMR5, TMR_C4_FLAG);
154
155 if (capture_number >= 2)
156 {
157 /* compute the period length */
158 period_value = (uint16_t)(0xFFFF - tmp_c4[0] + tmp_c4[1] + 1);
159 }
160 }
161}
162
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
capture_number
__IO uint32_t capture_number
Definition: project/at_start_f435/examples/ertc/lick_calibration/src/main.c:39
TMR5_GLOBAL_IRQHandler
void TMR5_GLOBAL_IRQHandler(void)
this function handles tmr5 global interrupt request.
Definition: project/at_start_f435/examples/ertc/lick_calibration/src/at32f435_437_int.c:145
period_value
__IO uint32_t period_value
Definition: project/at_start_f435/examples/ertc/lick_calibration/src/main.c:40
tmp_c4
uint16_t tmp_c4[2]
Definition: project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_int.c:41
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_channel_value_get
uint32_t tmr_channel_value_get(tmr_type *tmr_x, tmr_channel_select_type tmr_channel)
get tmr channel value
Definition: at32f435_437_tmr.c:593
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_C4_FLAG
#define TMR_C4_FLAG
Definition: at32f435_437_tmr.h:56
TMR5
#define TMR5
Definition: at32f435_437_tmr.h:899
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • ertc
  • lick_calibration
  • src
Functions | Variables
project/at_start_f437/examples/ertc/lick_calibration/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | ertc_config (void)
configures the ertc peripheral by selecting the clock source. More...
uint32_t | lick_frequency_get (void)
configures tmr5 to measure the lick oscillator frequency. More...
int | main (void)
main program More...

Variables

__IO uint32_t | lick_freq = 0
__IO uint32_t | capture_number = 0
__IO uint32_t | period_value = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/lick_calibration/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • ertc
  • lick_calibration
  • src
project/at_start_f437/examples/ertc/lick_calibration/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint32_t lick_freq = 0;
39__IO uint32_t capture_number = 0;
40__IO uint32_t period_value = 0;
41
42void ertc_config(void);
43uint32_t lick_frequency_get(void);
44
50int main(void)
51{
52 ertc_time_type time;
53 uint32_t temp = 0;
54
55 /* initial system clock */
56 system_clock_config();
57
58 /* initial the nvic priority group */
59 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
60
61 /* at board initial */
62 at32_board_init();
63
64 /* initialize uart */
65 uart_print_init(115200);
66
67 /* ertc configuration */
68 ertc_config();
69
70 /* get the lick frequency: tmr5 is used to measure the lick frequency */
71 lick_freq = lick_frequency_get();
72
73 /* configure the ertc divider */
74 /* ertc second(1hz) = ertc_clk(lick) / (div_a + 1) * (div_b + 1) */
75 ertc_divider_set(127, (lick_freq / 128) - 1);
76
77 printf("lick_freq = %d\r\n", lick_freq);
78 printf("div_a = %d\r\n", 127);
79 printf("div_b = %d\r\n", (lick_freq / 128) - 1);
80 printf("\r\n");
81
82 while(1)
83 {
84 /* get the current time */
85 ertc_calendar_get(&time);
86
87 if(temp != time.sec)
88 {
89 temp = time.sec;
90
91 /* display date format : year-month-day */
92 printf("%02d-%02d-%02d ",time.year, time.month, time.day);
93
94 /* display time format : hour:min:sec */
95 printf("%02d:%02d:%02d\r\n",time.hour, time.min, time.sec);
96 }
97 }
98}
99
105void ertc_config(void)
106{
107 /* enable the pwc clock */
108 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
109
110 /* allow access to ertc */
111 pwc_battery_powered_domain_access(TRUE);
112
113 /* reset ertc domain */
114 crm_battery_powered_domain_reset(TRUE);
115 crm_battery_powered_domain_reset(FALSE);
116
117 /* enable the lick osc */
118 crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE);
119
120 /* wait till lick is ready */
121 while(crm_flag_get(CRM_LICK_STABLE_FLAG) == RESET)
122 {
123 }
124
125 /* select the ertc clock source */
126 crm_ertc_clock_select(CRM_ERTC_CLOCK_LICK);
127
128 /* enable the ertc clock */
129 crm_ertc_clock_enable(TRUE);
130
131 /* deinitializes the ertc registers */
132 ertc_reset();
133
134 /* wait for ertc apb registers update */
135 ertc_wait_update();
136
137 /* configure the ertc divider */
138 ertc_divider_set(0x7F, 0xFF);
139
140 /* configure the ertc hour mode */
141 ertc_hour_mode_set(ERTC_HOUR_MODE_24);
142
143 /* set date: 2021-05-01 */
144 ertc_date_set(21, 5, 1, 5);
145
146 /* set time: 12:00:00 */
147 ertc_time_set(12, 0, 0, ERTC_AM);
148}
149
155uint32_t lick_frequency_get(void)
156{
157 tmr_input_config_type tmr_input_config_struct;
158 crm_clocks_freq_type crm_clock_freq;
159
160 /* enable tmr5 apb1 clocks */
161 crm_periph_clock_enable(CRM_TMR5_PERIPH_CLOCK, TRUE);
162
163 /* connect internally the tmr5_ch4 to the lick clock output */
164 tmr_iremap_config(TMR5, TMR2_PTP_TMR5_LICK);
165
166 /* configure tmr5 divider */
167 tmr_div_value_set(TMR5, 0);
168 tmr_event_sw_trigger(TMR5, TMR_OVERFLOW_SWTRIG);
169
170 /* tmr5 channel4 input capture mode configuration */
171 tmr_input_config_struct.input_channel_select = TMR_SELECT_CHANNEL_4;
172 tmr_input_config_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
173 tmr_input_config_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
174 tmr_input_config_struct.input_filter_value = 0;
175 tmr_input_channel_init(TMR5, &tmr_input_config_struct, TMR_CHANNEL_INPUT_DIV_1);
176 tmr_input_channel_divider_set(TMR5, TMR_SELECT_CHANNEL_4, TMR_CHANNEL_INPUT_DIV_8);
177
178 /* enable tmr5 interrupt channel */
179 nvic_irq_enable(TMR5_GLOBAL_IRQn, 0, 0);
180
181 /* enable tmr5 counter */
182 tmr_counter_enable(TMR5, TRUE);
183
184 /* reset the flags */
185 TMR5->swevt = 0;
186
187 /* enable the cc4 interrupt request */
188 tmr_interrupt_enable(TMR5, TMR_C4_INT, TRUE);
189
190 /* wait the tmr5 measuring operation to be completed */
191 while(capture_number != 2);
192
193 /* deinitialize the tmr5 peripheral */
194 tmr_reset(TMR5);
195
196 /* get the frequency value */
197 crm_clocks_freq_get(&crm_clock_freq);
198
199 /* get pclk1 divider */
200 if ((CRM->cfg_bit.apb1div) > 0)
201 {
202 /* pclk1 divider different from 1 => timclk = 2 * pclk1 */
203 return (((2 * crm_clock_freq.apb1_freq) / period_value) * 8) ;
204 }
205 else
206 {
207 /* pclk1 divider equal to 1 => timclk = pclk1 */
208 return ((crm_clock_freq.apb1_freq / period_value) * 8);
209 }
210}
211
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
ertc_config
void ertc_config(void)
configure the ertc peripheral.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:121
capture_number
__IO uint32_t capture_number
Definition: project/at_start_f437/examples/ertc/lick_calibration/src/main.c:39
lick_freq
__IO uint32_t lick_freq
Definition: project/at_start_f437/examples/ertc/lick_calibration/src/main.c:38
period_value
__IO uint32_t period_value
Definition: project/at_start_f437/examples/ertc/lick_calibration/src/main.c:40
lick_frequency_get
uint32_t lick_frequency_get(void)
configures tmr5 to measure the lick oscillator frequency.
Definition: project/at_start_f435/examples/ertc/lick_calibration/src/main.c:155
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
tmr_input_config_struct
tmr_input_config_type tmr_input_config_struct
Definition: project/at_start_f435/examples/tmr/external_clock/src/main.c:41
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_ertc_clock_select
void crm_ertc_clock_select(crm_ertc_clock_type value)
select ertc clock
Definition: at32f435_437_crm.c:434
crm_ertc_clock_enable
void crm_ertc_clock_enable(confirm_state new_state)
enable or disable ertc
Definition: at32f435_437_crm.c:445
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_battery_powered_domain_reset
void crm_battery_powered_domain_reset(confirm_state new_state)
battery powered domain software reset
Definition: at32f435_437_crm.c:541
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_TMR5_PERIPH_CLOCK
@ CRM_TMR5_PERIPH_CLOCK
Definition: at32f435_437_crm.h:131
CRM_CLOCK_SOURCE_LICK
@ CRM_CLOCK_SOURCE_LICK
Definition: at32f435_437_crm.h:563
CRM_ERTC_CLOCK_LICK
@ CRM_ERTC_CLOCK_LICK
Definition: at32f435_437_crm.h:633
CRM_LICK_STABLE_FLAG
#define CRM_LICK_STABLE_FLAG
Definition: at32f435_437_crm.h:59
CRM
#define CRM
Definition: at32f435_437_crm.h:1506
ertc_hour_mode_set
error_status ertc_hour_mode_set(ertc_hour_mode_set_type mode)
ertc hour mode set.
Definition: at32f435_437_ertc.c:283
ertc_wait_update
error_status ertc_wait_update(void)
ertc wait register update finish.
Definition: at32f435_437_ertc.c:97
ertc_time_set
error_status ertc_time_set(uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set time.
Definition: at32f435_437_ertc.c:363
ertc_reset
error_status ertc_reset(void)
ertc reset all register.
Definition: at32f435_437_ertc.c:207
ertc_date_set
error_status ertc_date_set(uint8_t year, uint8_t month, uint8_t date, uint8_t week)
set date.
Definition: at32f435_437_ertc.c:314
ertc_calendar_get
void ertc_calendar_get(ertc_time_type *time)
get calendar
Definition: at32f435_437_ertc.c:404
ertc_divider_set
error_status ertc_divider_set(uint16_t div_a, uint16_t div_b)
ertc division set.
Definition: at32f435_437_ertc.c:251
ERTC_HOUR_MODE_24
@ ERTC_HOUR_MODE_24
Definition: at32f435_437_ertc.h:116
ERTC_AM
@ ERTC_AM
Definition: at32f435_437_ertc.h:126
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
time
ertc_time_type * time
Definition: random.c:41
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_battery_powered_domain_access
void pwc_battery_powered_domain_access(confirm_state new_state)
enable or disable access to the battery powered domain.
Definition: at32f435_437_pwc.c:61
tmr_input_channel_divider_set
void tmr_input_channel_divider_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_channel_input_divider_type divider_factor)
set tmr input channel divider
Definition: at32f435_437_tmr.c:1175
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_input_channel_init
void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct, tmr_channel_input_divider_type divider_factor)
init tmr input channel
Definition: at32f435_437_tmr.c:872
tmr_div_value_set
void tmr_div_value_set(tmr_type *tmr_x, uint32_t tmr_div_value)
set tmr div value
Definition: at32f435_437_tmr.c:314
tmr_iremap_config
void tmr_iremap_config(tmr_type *tmr_x, tmr_input_remap_type input_remap)
set tmr2/tmr5 input channel remap
Definition: at32f435_437_tmr.c:1824
tmr_event_sw_trigger
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event)
generate tmr event
Definition: at32f435_437_tmr.c:1486
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_reset
void tmr_reset(tmr_type *tmr_x)
tmr reset by crm reset register
Definition: at32f435_437_tmr.c:52
TMR_INPUT_RISING_EDGE
@ TMR_INPUT_RISING_EDGE
Definition: at32f435_437_tmr.h:207
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_CC_CHANNEL_MAPPED_DIRECT
@ TMR_CC_CHANNEL_MAPPED_DIRECT
Definition: at32f435_437_tmr.h:241
TMR_OVERFLOW_SWTRIG
@ TMR_OVERFLOW_SWTRIG
Definition: at32f435_437_tmr.h:285
TMR2_PTP_TMR5_LICK
@ TMR2_PTP_TMR5_LICK
Definition: at32f435_437_tmr.h:402
TMR_CHANNEL_INPUT_DIV_8
@ TMR_CHANNEL_INPUT_DIV_8
Definition: at32f435_437_tmr.h:254
TMR_CHANNEL_INPUT_DIV_1
@ TMR_CHANNEL_INPUT_DIV_1
Definition: at32f435_437_tmr.h:251
TMR_C4_INT
#define TMR_C4_INT
Definition: at32f435_437_tmr.h:79
TMR5
#define TMR5
Definition: at32f435_437_tmr.h:899
TMR5_GLOBAL_IRQn
@ TMR5_GLOBAL_IRQn
Definition: at32f435_437.h:198
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
ertc_time_type
ertc time
Definition: at32f435_437_ertc.h:383
ertc_time_type::year
uint8_t year
Definition: at32f435_437_ertc.h:384
ertc_time_type::day
uint8_t day
Definition: at32f435_437_ertc.h:386
ertc_time_type::hour
uint8_t hour
Definition: at32f435_437_ertc.h:387
ertc_time_type::min
uint8_t min
Definition: at32f435_437_ertc.h:388
ertc_time_type::month
uint8_t month
Definition: at32f435_437_ertc.h:385
ertc_time_type::sec
uint8_t sec
Definition: at32f435_437_ertc.h:389
tmr_input_config_type
tmr input capture config type
Definition: at32f435_437_tmr.h:425
tmr_input_config_type::input_mapped_select
tmr_input_direction_mapped_type input_mapped_select
Definition: at32f435_437_tmr.h:428
tmr_input_config_type::input_filter_value
uint8_t input_filter_value
Definition: at32f435_437_tmr.h:429
tmr_input_config_type::input_polarity_select
tmr_input_polarity_type input_polarity_select
Definition: at32f435_437_tmr.h:427
tmr_input_config_type::input_channel_select
tmr_channel_select_type input_channel_select
Definition: at32f435_437_tmr.h:426
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • ertc
  • tamper
  • inc
project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • ertc
  • tamper
  • inc
project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • ertc
  • tamper
  • inc
project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • ertc
  • tamper
  • src
Functions
project/at_start_f437/examples/ertc/tamper/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/tamper/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • ertc
  • tamper
  • src
project/at_start_f437/examples/ertc/tamper/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/ertc/tamper/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • ertc
  • tamper
  • src
Functions
project/at_start_f437/examples/ertc/tamper/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

uint32_t | is_bpr_reg_reset (void)
checks if the ertc bpr dtx registers are reset or not. More...
void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TAMP_STAMP_IRQHandler (void)
this function handles ertc tamper and time stamp interrupts requests. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/tamper/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • ertc
  • tamper
  • src
project/at_start_f437/examples/ertc/tamper/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
39extern uint32_t is_bpr_reg_reset(void);
40
46void NMI_Handler(void)
47{
48}
49
55void HardFault_Handler(void)
56{
57 /* go to infinite loop when hard fault exception occurs */
58 while(1)
59 {
60 }
61}
62
68void MemManage_Handler(void)
69{
70 /* go to infinite loop when memory manage exception occurs */
71 while(1)
72 {
73 }
74}
75
81void BusFault_Handler(void)
82{
83 /* go to infinite loop when bus fault exception occurs */
84 while(1)
85 {
86 }
87}
88
94void UsageFault_Handler(void)
95{
96 /* go to infinite loop when usage fault exception occurs */
97 while(1)
98 {
99 }
100}
101
107void SVC_Handler(void)
108{
109}
110
116void DebugMon_Handler(void)
117{
118}
119
125void PendSV_Handler(void)
126{
127}
128
134void SysTick_Handler(void)
135{
136}
137
143void TAMP_STAMP_IRQHandler(void)
144{
145 if(ertc_flag_get(ERTC_TP1F_FLAG) != RESET)
146 {
147 /* check if ertc backup data registers are cleared */
148 if(is_bpr_reg_reset() == 0)
149 {
150 printf("tamper: bpr data registers are cleared\r\n");
151 }
152 else
153 {
154 printf("tamper: bpr data registers are not reset\r\n");
155 }
156
157 /* clear tamper 1 pin event pending flag */
158 ertc_flag_clear(ERTC_TP1F_FLAG);
159
160 /* clear exint flag */
161 exint_flag_clear(EXINT_LINE_21);
162 }
163}
164
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
is_bpr_reg_reset
uint32_t is_bpr_reg_reset(void)
checks if the ertc bpr dtx registers are reset or not.
Definition: project/at_start_f435/examples/ertc/tamper/src/main.c:232
TAMP_STAMP_IRQHandler
void TAMP_STAMP_IRQHandler(void)
this function handles ertc tamper and time stamp interrupts requests.
Definition: project/at_start_f435/examples/ertc/tamper/src/at32f435_437_int.c:143
ertc_flag_get
flag_status ertc_flag_get(uint32_t flag)
get flag status.
Definition: at32f435_437_ertc.c:1474
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ERTC_TP1F_FLAG
#define ERTC_TP1F_FLAG
Definition: at32f435_437_ertc.h:79
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
EXINT_LINE_21
#define EXINT_LINE_21
Definition: at32f435_437_exint.h:73
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • ertc
  • tamper
  • src
Macros | Functions | Variables
project/at_start_f437/examples/ertc/tamper/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define ERTC_BPR_DT_NUMBER 20

Functions

void | ertc_config (void)
configure the ertc peripheral by selecting the clock source. More...
void | bpr_reg_write (void)
write data to bpr dt register. More...
uint32_t | bpr_reg_check (void)
checks if the bpr dt register values are correct or not. More...
uint32_t | is_bpr_reg_reset (void)
checks if the ertc bpr dtx registers are reset or not. More...
void | ertc_tamper_config (void)
configure the ertc tamper. More...
int | main (void)
main program More...

Variables

ertc_dt_type bpr_addr_tab [20]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/tamper/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • ertc
  • tamper
  • src
project/at_start_f437/examples/ertc/tamper/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define ERTC_BPR_DT_NUMBER 20
39
40 ertc_dt_type bpr_addr_tab[ERTC_BPR_DT_NUMBER] =
41{
42 ERTC_DT1, ERTC_DT2, ERTC_DT3, ERTC_DT4, ERTC_DT5,
43 ERTC_DT6, ERTC_DT7, ERTC_DT8, ERTC_DT9, ERTC_DT10,
44 ERTC_DT11, ERTC_DT12, ERTC_DT13, ERTC_DT14, ERTC_DT15,
45 ERTC_DT16, ERTC_DT17, ERTC_DT18, ERTC_DT19, ERTC_DT20,
46};
47
48void ertc_config(void);
49void bpr_reg_write(void);
50uint32_t bpr_reg_check(void);
51uint32_t is_bpr_reg_reset(void);
52void ertc_tamper_config(void);
53
59int main(void)
60{
61 /* initial system clock */
62 system_clock_config();
63
64 /* initial the nvic priority group */
65 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
66
67 /* at board initial */
68 at32_board_init();
69
70 /* initialize uart */
71 uart_print_init(115200);
72
73 /* ertc configuration */
74 ertc_config();
75
76 /* ertc tamper configuration */
77 ertc_tamper_config();
78
79 /* write to ertc bpr data registers */
80 bpr_reg_write();
81
82 /* check if the written data are correct */
83 if(bpr_reg_check() == TRUE)
84 {
85 printf("init: bpr data registers are not reset\r\n");
86 }
87 else
88 {
89 printf("init: bpr data registers are cleared\r\n");
90 }
91
92 while(1)
93 {
94 }
95}
96
102void ertc_config(void)
103{
104 /* enable the pwc clock */
105 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
106
107 /* allow access to ertc */
108 pwc_battery_powered_domain_access(TRUE);
109
110 /* reset bpr domain */
111 crm_battery_powered_domain_reset(TRUE);
112 crm_battery_powered_domain_reset(FALSE);
113
114 /* enable the lext osc */
115 crm_clock_source_enable(CRM_CLOCK_SOURCE_LEXT, TRUE);
116
117 /* wait till lext is ready */
118 while(crm_flag_get(CRM_LEXT_STABLE_FLAG) == RESET)
119 {
120 }
121
122 /* select the ertc clock source */
123 crm_ertc_clock_select(CRM_ERTC_CLOCK_LEXT);
124
125 /* enable the ertc clock */
126 crm_ertc_clock_enable(TRUE);
127
128 /* deinitializes the ertc registers */
129 ertc_reset();
130
131 /* wait for ertc apb registers update */
132 ertc_wait_update();
133
134 /* configure the ertc divider */
135 /* ertc second(1hz) = ertc_clk / (div_a + 1) * (div_b + 1) */
136 ertc_divider_set(127, 255);
137
138 /* configure the ertc hour mode */
139 ertc_hour_mode_set(ERTC_HOUR_MODE_24);
140
141 /* set date: 2021-05-01 */
142 ertc_date_set(21, 5, 1, 5);
143
144 /* set time: 12:00:00 */
145 ertc_time_set(12, 0, 0, ERTC_AM);
146}
147
153void ertc_tamper_config(void)
154{
155 exint_init_type exint_init_struct;
156
157 /* enable the external line 21 interrupt */
158 exint_default_para_init(&exint_init_struct);
159 exint_init_struct.line_enable = TRUE;
160 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
161 exint_init_struct.line_select = EXINT_LINE_21;
162 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
163 exint_init(&exint_init_struct);
164
165 /* enable tamper interrupt */
166 nvic_irq_enable(TAMP_STAMP_IRQn, 0, 0);
167
168 /* disable the tamper 1 detection */
169 ertc_tamper_enable(ERTC_TAMPER_1, FALSE);
170
171 /* clear tamper 1 pin event(tamp1f) pending flag */
172 ertc_flag_clear(ERTC_TP1F_FLAG);
173
174 /* configure the tamper 1 trigger */
175 ertc_tamper_valid_edge_set(ERTC_TAMPER_1, ERTC_TAMPER_EDGE_RISING);
176
177 /* enable the tamper interrupt */
178 ertc_interrupt_enable(ERTC_TP_INT, TRUE);
179
180 /* clear tamper 1 pin interrupt pending bit */
181 ertc_flag_clear(ERTC_TP1F_FLAG);
182
183 /* enable the tamper 1 detection */
184 ertc_tamper_enable(ERTC_TAMPER_1, TRUE);
185}
186
192void bpr_reg_write(void)
193{
194 uint32_t index = 0;
195
196 for (index = 0; index < ERTC_BPR_DT_NUMBER; index++)
197 {
198 ertc_bpr_data_write(bpr_addr_tab[index], 0x5A00 + (index * 0x5A));
199 }
200}
201
210uint32_t bpr_reg_check(void)
211{
212 uint32_t index = 0;
213
214 for (index = 0; index < ERTC_BPR_DT_NUMBER; index++)
215 {
216 if (ertc_bpr_data_read(bpr_addr_tab[index]) != (0x5A00 + (index * 0x5A)))
217 {
218 return FALSE;
219 }
220 }
221
222 return TRUE;
223}
224
232uint32_t is_bpr_reg_reset(void)
233{
234 uint32_t index = 0;
235
236 for (index = 0; index < ERTC_BPR_DT_NUMBER; index++)
237 {
238 /* read from bpr data register */
239 if (ertc_bpr_data_read(bpr_addr_tab[index]) != 0)
240 {
241 return (index + 1);
242 }
243 }
244 return 0;
245}
246
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
bpr_reg_write
void bpr_reg_write(void)
write data to bpr dt register.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:169
bpr_reg_check
uint32_t bpr_reg_check(void)
checks if the bpr dt register values are correct or not.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:187
ertc_config
void ertc_config(void)
configure the ertc peripheral.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:121
ERTC_BPR_DT_NUMBER
#define ERTC_BPR_DT_NUMBER
Definition: project/at_start_f437/examples/ertc/tamper/src/main.c:38
is_bpr_reg_reset
uint32_t is_bpr_reg_reset(void)
checks if the ertc bpr dtx registers are reset or not.
Definition: project/at_start_f435/examples/ertc/tamper/src/main.c:232
bpr_addr_tab
ertc_dt_type bpr_addr_tab[20]
Definition: project/at_start_f437/examples/ertc/tamper/src/main.c:40
ertc_tamper_config
void ertc_tamper_config(void)
configure the ertc tamper.
Definition: project/at_start_f435/examples/ertc/tamper/src/main.c:153
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_ertc_clock_select
void crm_ertc_clock_select(crm_ertc_clock_type value)
select ertc clock
Definition: at32f435_437_crm.c:434
crm_ertc_clock_enable
void crm_ertc_clock_enable(confirm_state new_state)
enable or disable ertc
Definition: at32f435_437_crm.c:445
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_battery_powered_domain_reset
void crm_battery_powered_domain_reset(confirm_state new_state)
battery powered domain software reset
Definition: at32f435_437_crm.c:541
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_CLOCK_SOURCE_LEXT
@ CRM_CLOCK_SOURCE_LEXT
Definition: at32f435_437_crm.h:562
CRM_ERTC_CLOCK_LEXT
@ CRM_ERTC_CLOCK_LEXT
Definition: at32f435_437_crm.h:632
CRM_LEXT_STABLE_FLAG
#define CRM_LEXT_STABLE_FLAG
Definition: at32f435_437_crm.h:58
ertc_hour_mode_set
error_status ertc_hour_mode_set(ertc_hour_mode_set_type mode)
ertc hour mode set.
Definition: at32f435_437_ertc.c:283
ertc_wait_update
error_status ertc_wait_update(void)
ertc wait register update finish.
Definition: at32f435_437_ertc.c:97
ertc_time_set
error_status ertc_time_set(uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set time.
Definition: at32f435_437_ertc.c:363
ertc_reset
error_status ertc_reset(void)
ertc reset all register.
Definition: at32f435_437_ertc.c:207
ertc_interrupt_enable
void ertc_interrupt_enable(uint32_t source, confirm_state new_state)
enable or disable interrupt.
Definition: at32f435_437_ertc.c:1386
ertc_date_set
error_status ertc_date_set(uint8_t year, uint8_t month, uint8_t date, uint8_t week)
set date.
Definition: at32f435_437_ertc.c:314
ertc_tamper_enable
void ertc_tamper_enable(ertc_tamper_select_type tamper_x, confirm_state new_state)
enable or disable tamper.
Definition: at32f435_437_ertc.c:1356
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ertc_bpr_data_read
uint32_t ertc_bpr_data_read(ertc_dt_type dt)
read data from bpr register.
Definition: at32f435_437_ertc.c:1550
ertc_tamper_valid_edge_set
void ertc_tamper_valid_edge_set(ertc_tamper_select_type tamper_x, ertc_tamper_valid_edge_type trigger)
set the tamper trigger.
Definition: at32f435_437_ertc.c:1313
ertc_divider_set
error_status ertc_divider_set(uint16_t div_a, uint16_t div_b)
ertc division set.
Definition: at32f435_437_ertc.c:251
ertc_bpr_data_write
void ertc_bpr_data_write(ertc_dt_type dt, uint32_t data)
write data to the bpr register.
Definition: at32f435_437_ertc.c:1524
ertc_dt_type
ertc_dt_type
ertc bpr register
Definition: at32f435_437_ertc.h:356
ERTC_TAMPER_EDGE_RISING
@ ERTC_TAMPER_EDGE_RISING
Definition: at32f435_437_ertc.h:346
ERTC_HOUR_MODE_24
@ ERTC_HOUR_MODE_24
Definition: at32f435_437_ertc.h:116
ERTC_TAMPER_1
@ ERTC_TAMPER_1
Definition: at32f435_437_ertc.h:300
ERTC_DT11
@ ERTC_DT11
Definition: at32f435_437_ertc.h:367
ERTC_DT13
@ ERTC_DT13
Definition: at32f435_437_ertc.h:369
ERTC_DT2
@ ERTC_DT2
Definition: at32f435_437_ertc.h:358
ERTC_DT1
@ ERTC_DT1
Definition: at32f435_437_ertc.h:357
ERTC_DT15
@ ERTC_DT15
Definition: at32f435_437_ertc.h:371
ERTC_DT18
@ ERTC_DT18
Definition: at32f435_437_ertc.h:374
ERTC_DT19
@ ERTC_DT19
Definition: at32f435_437_ertc.h:375
ERTC_DT6
@ ERTC_DT6
Definition: at32f435_437_ertc.h:362
ERTC_DT7
@ ERTC_DT7
Definition: at32f435_437_ertc.h:363
ERTC_DT20
@ ERTC_DT20
Definition: at32f435_437_ertc.h:376
ERTC_DT17
@ ERTC_DT17
Definition: at32f435_437_ertc.h:373
ERTC_DT3
@ ERTC_DT3
Definition: at32f435_437_ertc.h:359
ERTC_DT4
@ ERTC_DT4
Definition: at32f435_437_ertc.h:360
ERTC_DT8
@ ERTC_DT8
Definition: at32f435_437_ertc.h:364
ERTC_DT5
@ ERTC_DT5
Definition: at32f435_437_ertc.h:361
ERTC_DT10
@ ERTC_DT10
Definition: at32f435_437_ertc.h:366
ERTC_DT9
@ ERTC_DT9
Definition: at32f435_437_ertc.h:365
ERTC_DT16
@ ERTC_DT16
Definition: at32f435_437_ertc.h:372
ERTC_DT12
@ ERTC_DT12
Definition: at32f435_437_ertc.h:368
ERTC_DT14
@ ERTC_DT14
Definition: at32f435_437_ertc.h:370
ERTC_AM
@ ERTC_AM
Definition: at32f435_437_ertc.h:126
ERTC_TP1F_FLAG
#define ERTC_TP1F_FLAG
Definition: at32f435_437_ertc.h:79
ERTC_TP_INT
#define ERTC_TP_INT
Definition: at32f435_437_ertc.h:52
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_21
#define EXINT_LINE_21
Definition: at32f435_437_exint.h:73
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_battery_powered_domain_access
void pwc_battery_powered_domain_access(confirm_state new_state)
enable or disable access to the battery powered domain.
Definition: at32f435_437_pwc.c:61
TAMP_STAMP_IRQn
@ TAMP_STAMP_IRQn
Definition: at32f435_437.h:148
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • ertc
  • time_stamp
  • inc
project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • ertc
  • time_stamp
  • inc
project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • ertc
  • time_stamp
  • inc
project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • ertc
  • time_stamp
  • src
Functions
project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • ertc
  • time_stamp
  • src
project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • ertc
  • time_stamp
  • src
Functions
project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | ertc_time_show (void)
display the current date. More...
void | ertc_timestamp_show (void)
display the current timestamp. More...
void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TAMP_STAMP_IRQHandler (void)
this function handles external lines 15 to 10 interrupt request. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • ertc
  • time_stamp
  • src
project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
39extern void ertc_time_show(void);
40extern void ertc_timestamp_show(void);
41
47void NMI_Handler(void)
48{
49}
50
56void HardFault_Handler(void)
57{
58 /* go to infinite loop when hard fault exception occurs */
59 while(1)
60 {
61 }
62}
63
69void MemManage_Handler(void)
70{
71 /* go to infinite loop when memory manage exception occurs */
72 while(1)
73 {
74 }
75}
76
82void BusFault_Handler(void)
83{
84 /* go to infinite loop when bus fault exception occurs */
85 while(1)
86 {
87 }
88}
89
95void UsageFault_Handler(void)
96{
97 /* go to infinite loop when usage fault exception occurs */
98 while(1)
99 {
100 }
101}
102
108void SVC_Handler(void)
109{
110}
111
117void DebugMon_Handler(void)
118{
119}
120
126void PendSV_Handler(void)
127{
128}
129
135void SysTick_Handler(void)
136{
137}
138
144void TAMP_STAMP_IRQHandler(void)
145{
146 if(ertc_flag_get(ERTC_TSF_FLAG))
147 {
148 /* display the timestamp */
149 ertc_timestamp_show();
150
151 /* display the date / time */
152 ertc_time_show();
153
154 /* clear exint flag */
155 exint_flag_clear(EXINT_LINE_21);
156
157 /* clear timestamp flag */
158 ertc_flag_clear(ERTC_TSF_FLAG);
159 }
160}
161
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ertc_time_show
void ertc_time_show(void)
display the current time.
Definition: project/at_start_f435/examples/ertc/calendar/src/main.c:228
TAMP_STAMP_IRQHandler
void TAMP_STAMP_IRQHandler(void)
this function handles ertc tamper and time stamp interrupts requests.
Definition: project/at_start_f435/examples/ertc/tamper/src/at32f435_437_int.c:143
ertc_timestamp_show
void ertc_timestamp_show(void)
display the current timestamp.
Definition: project/at_start_f435/examples/ertc/time_stamp/src/main.c:183
ertc_flag_get
flag_status ertc_flag_get(uint32_t flag)
get flag status.
Definition: at32f435_437_ertc.c:1474
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ERTC_TSF_FLAG
#define ERTC_TSF_FLAG
Definition: at32f435_437_ertc.h:77
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
EXINT_LINE_21
#define EXINT_LINE_21
Definition: at32f435_437_exint.h:73
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • ertc
  • time_stamp
  • src
Functions
project/at_start_f437/examples/ertc/time_stamp/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | ertc_time_show (void)
display the current date. More...
void | ertc_timestamp_show (void)
display the current timestamp. More...
void | ertc_config (void)
configure the ertc peripheral by selecting the clock source. More...
void | ertc_timestamp_config (void)
configure the ertc timestamp. More...
int | main (void)
main program More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/time_stamp/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • ertc
  • time_stamp
  • src
project/at_start_f437/examples/ertc/time_stamp/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38void ertc_time_show(void);
39void ertc_timestamp_show(void);
40void ertc_config(void);
41void ertc_timestamp_config(void);
42
48int main(void)
49{
50 /* initial system clock */
51 system_clock_config();
52
53 /* initial the nvic priority group */
54 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
55
56 /* at board initial */
57 at32_board_init();
58
59 /* initialize uart */
60 uart_print_init(115200);
61
62 /* ertc configuration */
63 ertc_config();
64
65 /* configure the timestamp register */
66 ertc_timestamp_config();
67
68 /* display the date and time */
69 ertc_time_show();
70
71 while(1)
72 {
73
74 }
75}
76
82void ertc_config(void)
83{
84 /* enable the pwc clock */
85 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
86
87 /* allow access to ertc */
88 pwc_battery_powered_domain_access(TRUE);
89
90 /* reset ertc bpr domain */
91 crm_battery_powered_domain_reset(TRUE);
92 crm_battery_powered_domain_reset(FALSE);
93
94 /* enable the lext osc */
95 crm_clock_source_enable(CRM_CLOCK_SOURCE_LEXT, TRUE);
96
97 /* wait till lext is ready */
98 while(crm_flag_get(CRM_LEXT_STABLE_FLAG) == RESET)
99 {
100 }
101
102 /* select the ertc clock source */
103 crm_ertc_clock_select(CRM_ERTC_CLOCK_LEXT);
104
105 /* enable the ertc clock */
106 crm_ertc_clock_enable(TRUE);
107
108 /* deinitializes the ertc registers */
109 ertc_reset();
110
111 /* wait for ertc apb registers update */
112 ertc_wait_update();
113
114 /* configure the ertc divider */
115 /* ertc second(1hz) = ertc_clk / (div_a + 1) * (div_b + 1) */
116 ertc_divider_set(127, 255);
117
118 /* configure the ertc hour mode */
119 ertc_hour_mode_set(ERTC_HOUR_MODE_24);
120
121 /* set date: 2021-05-01 */
122 ertc_date_set(21, 5, 1, 5);
123
124 /* set time: 12:00:00 */
125 ertc_time_set(12, 0, 0, ERTC_AM);
126}
127
133void ertc_timestamp_config(void)
134{
135 exint_init_type exint_init_struct;
136
137 /* configure nvic */
138 nvic_irq_enable(TAMP_STAMP_IRQn, 0, 0);
139
140 /* configure exint */
141 exint_default_para_init(&exint_init_struct);
142 exint_init_struct.line_enable = TRUE;
143 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
144 exint_init_struct.line_select = EXINT_LINE_21;
145 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
146 exint_init(&exint_init_struct);
147
148 /* enable the timestamp */
149 ertc_timestamp_valid_edge_set(ERTC_TIMESTAMP_EDGE_FALLING);
150 ertc_timestamp_enable(TRUE);
151
152 /* enable the timestamp int */
153 ertc_interrupt_enable(ERTC_TS_INT, TRUE);
154}
155
161void ertc_time_show(void)
162{
163 ertc_time_type time;
164
165 /* get the current time */
166 ertc_calendar_get(&time);
167
168 /* display the curent time */
169 printf("current time: ");
170
171 /* display date format : year-month-day */
172 printf("%02d-%02d-%02d ",time.year, time.month, time.day);
173
174 /* display time format : hour:min:sec */
175 printf("%02d:%02d:%02d\r\n\r\n",time.hour, time.min, time.sec);
176}
177
183void ertc_timestamp_show(void)
184{
185 ertc_time_type time;
186
187 /* get the current timestamp */
188 ertc_timestamp_get(&time);
189
190 /* display the current timestamp */
191 printf("timestamp: ");
192
193 /* display date format : month-day */
194 printf(" %02d-%02d ", time.month, time.day);
195
196 /* display time format : hour:min:sec */
197 printf("%02d:%02d:%02d\r\n", time.hour, time.min, time.sec);
198}
199
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
ertc_config
void ertc_config(void)
configure the ertc peripheral.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:121
ertc_time_show
void ertc_time_show(void)
display the current time.
Definition: project/at_start_f435/examples/ertc/calendar/src/main.c:228
ertc_timestamp_show
void ertc_timestamp_show(void)
display the current timestamp.
Definition: project/at_start_f435/examples/ertc/time_stamp/src/main.c:183
ertc_timestamp_config
void ertc_timestamp_config(void)
configure the ertc timestamp.
Definition: project/at_start_f435/examples/ertc/time_stamp/src/main.c:133
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_ertc_clock_select
void crm_ertc_clock_select(crm_ertc_clock_type value)
select ertc clock
Definition: at32f435_437_crm.c:434
crm_ertc_clock_enable
void crm_ertc_clock_enable(confirm_state new_state)
enable or disable ertc
Definition: at32f435_437_crm.c:445
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_battery_powered_domain_reset
void crm_battery_powered_domain_reset(confirm_state new_state)
battery powered domain software reset
Definition: at32f435_437_crm.c:541
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_CLOCK_SOURCE_LEXT
@ CRM_CLOCK_SOURCE_LEXT
Definition: at32f435_437_crm.h:562
CRM_ERTC_CLOCK_LEXT
@ CRM_ERTC_CLOCK_LEXT
Definition: at32f435_437_crm.h:632
CRM_LEXT_STABLE_FLAG
#define CRM_LEXT_STABLE_FLAG
Definition: at32f435_437_crm.h:58
ertc_hour_mode_set
error_status ertc_hour_mode_set(ertc_hour_mode_set_type mode)
ertc hour mode set.
Definition: at32f435_437_ertc.c:283
ertc_wait_update
error_status ertc_wait_update(void)
ertc wait register update finish.
Definition: at32f435_437_ertc.c:97
ertc_timestamp_valid_edge_set
void ertc_timestamp_valid_edge_set(ertc_timestamp_valid_edge_type edge)
set the timestamp valid edge.
Definition: at32f435_437_ertc.c:1135
ertc_time_set
error_status ertc_time_set(uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set time.
Definition: at32f435_437_ertc.c:363
ertc_reset
error_status ertc_reset(void)
ertc reset all register.
Definition: at32f435_437_ertc.c:207
ertc_interrupt_enable
void ertc_interrupt_enable(uint32_t source, confirm_state new_state)
enable or disable interrupt.
Definition: at32f435_437_ertc.c:1386
ertc_date_set
error_status ertc_date_set(uint8_t year, uint8_t month, uint8_t date, uint8_t week)
set date.
Definition: at32f435_437_ertc.c:314
ertc_timestamp_get
void ertc_timestamp_get(ertc_time_type *time)
get the timestamp.
Definition: at32f435_437_ertc.c:1168
ertc_timestamp_enable
void ertc_timestamp_enable(confirm_state new_state)
enable or disable timestamp.
Definition: at32f435_437_ertc.c:1151
ertc_calendar_get
void ertc_calendar_get(ertc_time_type *time)
get calendar
Definition: at32f435_437_ertc.c:404
ertc_divider_set
error_status ertc_divider_set(uint16_t div_a, uint16_t div_b)
ertc division set.
Definition: at32f435_437_ertc.c:251
ERTC_HOUR_MODE_24
@ ERTC_HOUR_MODE_24
Definition: at32f435_437_ertc.h:116
ERTC_TIMESTAMP_EDGE_FALLING
@ ERTC_TIMESTAMP_EDGE_FALLING
Definition: at32f435_437_ertc.h:292
ERTC_AM
@ ERTC_AM
Definition: at32f435_437_ertc.h:126
ERTC_TS_INT
#define ERTC_TS_INT
Definition: at32f435_437_ertc.h:56
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_21
#define EXINT_LINE_21
Definition: at32f435_437_exint.h:73
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
time
ertc_time_type * time
Definition: random.c:41
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_battery_powered_domain_access
void pwc_battery_powered_domain_access(confirm_state new_state)
enable or disable access to the battery powered domain.
Definition: at32f435_437_pwc.c:61
TAMP_STAMP_IRQn
@ TAMP_STAMP_IRQn
Definition: at32f435_437.h:148
ertc_time_type
ertc time
Definition: at32f435_437_ertc.h:383
ertc_time_type::year
uint8_t year
Definition: at32f435_437_ertc.h:384
ertc_time_type::day
uint8_t day
Definition: at32f435_437_ertc.h:386
ertc_time_type::hour
uint8_t hour
Definition: at32f435_437_ertc.h:387
ertc_time_type::min
uint8_t min
Definition: at32f435_437_ertc.h:388
ertc_time_type::month
uint8_t month
Definition: at32f435_437_ertc.h:385
ertc_time_type::sec
uint8_t sec
Definition: at32f435_437_ertc.h:389
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • ertc
  • wakeup_timer
  • inc
project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • ertc
  • wakeup_timer
  • inc
project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • ertc
  • wakeup_timer
  • inc
project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • ertc
  • wakeup_timer
  • src
Functions
project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • ertc
  • wakeup_timer
  • src
project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • ertc
  • wakeup_timer
  • src
Functions
project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | ertc_wakeup_show (void)
void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | ERTC_WKUP_IRQHandler (void)
this function handles ertc wakeup timer interrupt request. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • ertc
  • wakeup_timer
  • src
project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
39extern void ertc_wakeup_show(void);
40
46void NMI_Handler(void)
47{
48}
49
55void HardFault_Handler(void)
56{
57 /* go to infinite loop when hard fault exception occurs */
58 while(1)
59 {
60 }
61}
62
68void MemManage_Handler(void)
69{
70 /* go to infinite loop when memory manage exception occurs */
71 while(1)
72 {
73 }
74}
75
81void BusFault_Handler(void)
82{
83 /* go to infinite loop when bus fault exception occurs */
84 while(1)
85 {
86 }
87}
88
94void UsageFault_Handler(void)
95{
96 /* go to infinite loop when usage fault exception occurs */
97 while(1)
98 {
99 }
100}
101
107void SVC_Handler(void)
108{
109}
110
116void DebugMon_Handler(void)
117{
118}
119
125void PendSV_Handler(void)
126{
127}
128
134void SysTick_Handler(void)
135{
136}
137
143void ERTC_WKUP_IRQHandler(void)
144{
145 if(ertc_flag_get(ERTC_WATF_FLAG) != RESET)
146 {
147 printf("wakeup\r\n");
148
149 at32_led_on(LED2);
150
151 /* clear wakeup timer flag */
152 ertc_flag_clear(ERTC_WATF_FLAG);
153
154 /* clear exint flag */
155 exint_flag_clear(EXINT_LINE_22);
156 }
157}
158
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ertc_wakeup_show
void ertc_wakeup_show(void)
ERTC_WKUP_IRQHandler
void ERTC_WKUP_IRQHandler(void)
this function handles ertc wakeup timer interrupt request.
Definition: project/at_start_f435/examples/ertc/wakeup_timer/src/at32f435_437_int.c:143
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
ertc_flag_get
flag_status ertc_flag_get(uint32_t flag)
get flag status.
Definition: at32f435_437_ertc.c:1474
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ERTC_WATF_FLAG
#define ERTC_WATF_FLAG
Definition: at32f435_437_ertc.h:76
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
EXINT_LINE_22
#define EXINT_LINE_22
Definition: at32f435_437_exint.h:74
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • ertc
  • wakeup_timer
  • src
Functions
project/at_start_f437/examples/ertc/wakeup_timer/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | ertc_config (void)
configure the ertc peripheral by selecting the clock source. More...
void | wakeup_timer_config (void)
configure the ertc peripheral by selecting the clock source. More...
int | main (void)
main program More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/ertc/wakeup_timer/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • ertc
  • wakeup_timer
  • src
project/at_start_f437/examples/ertc/wakeup_timer/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38void ertc_config(void);
39void wakeup_timer_config(void);
40
46int main(void)
47{
48 ertc_time_type time;
49 uint32_t temp = 0;
50
51 /* initial system clock */
52 system_clock_config();
53
54 /* initial the nvic priority group */
55 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
56
57 /* at board initial */
58 at32_board_init();
59
60 /* initialize uart */
61 uart_print_init(115200);
62
63 /* ertc configuration */
64 ertc_config();
65
66 /* ertc wakeup timer configuration */
67 wakeup_timer_config();
68
69 while(1)
70 {
71 /* get the current time */
72 ertc_calendar_get(&time);
73
74 if(temp != time.sec)
75 {
76 temp = time.sec;
77
78 /* display date format : year-month-day */
79 printf("%02d-%02d-%02d ",time.year, time.month, time.day);
80
81 /* display time format : hour:min:sec */
82 printf("%02d:%02d:%02d\r\n",time.hour, time.min, time.sec);
83 }
84 }
85}
86
92void ertc_config(void)
93{
94 /* enable the pwc clock interface */
95 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
96
97 /* allow access to ertc */
98 pwc_battery_powered_domain_access(TRUE);
99
100 /* reset ertc domain */
101 crm_battery_powered_domain_reset(TRUE);
102 crm_battery_powered_domain_reset(FALSE);
103
104 /* enable the lext osc */
105 crm_clock_source_enable(CRM_CLOCK_SOURCE_LEXT, TRUE);
106
107 /* wait till lext is ready */
108 while(crm_flag_get(CRM_LEXT_STABLE_FLAG) == RESET)
109 {
110 }
111
112 /* select the ertc clock source */
113 crm_ertc_clock_select(CRM_ERTC_CLOCK_LEXT);
114
115 /* enable the ertc clock */
116 crm_ertc_clock_enable(TRUE);
117
118 /* deinitializes the ertc registers */
119 ertc_reset();
120
121 /* wait for ertc apb registers update */
122 ertc_wait_update();
123
124 /* configure the ertc divider */
125 /* ertc second(1hz) = ertc_clk / (div_a + 1) * (div_b + 1) */
126 ertc_divider_set(127, 255);
127
128 /* configure the ertc hour mode */
129 ertc_hour_mode_set(ERTC_HOUR_MODE_24);
130
131 /* set date: 2021-05-01 */
132 ertc_date_set(21, 5, 1, 5);
133
134 /* set time: 12:00:00 */
135 ertc_time_set(12, 0, 0, ERTC_AM);
136}
137
138
144void wakeup_timer_config(void)
145{
146 exint_init_type exint_init_struct;
147
148 /* select the wakeup timer clock source */
149 ertc_wakeup_clock_set(ERTC_WAT_CLK_CK_B_16BITS);
150
151 /* set wakeup time: 5s */
152 ertc_wakeup_counter_set(5 - 1);
153
154 /* enable ertc wakeup timer interrupt */
155 ertc_interrupt_enable(ERTC_WAT_INT, TRUE);
156
157 /* enable the wakeup timer */
158 ertc_wakeup_enable(TRUE);
159
160 /* ertc wakeup timer interrupt configuration */
161 /* exint configuration */
162 exint_default_para_init(&exint_init_struct);
163 exint_init_struct.line_enable = TRUE;
164 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
165 exint_init_struct.line_select = EXINT_LINE_22;
166 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
167 exint_init(&exint_init_struct);
168
169 /* enable the ertc interrupt */
170 nvic_irq_enable(ERTC_WKUP_IRQn, 0, 1);
171}
172
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
ertc_config
void ertc_config(void)
configure the ertc peripheral.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:121
wakeup_timer_config
void wakeup_timer_config(void)
configure the ertc peripheral by selecting the clock source.
Definition: project/at_start_f435/examples/ertc/wakeup_timer/src/main.c:144
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_ertc_clock_select
void crm_ertc_clock_select(crm_ertc_clock_type value)
select ertc clock
Definition: at32f435_437_crm.c:434
crm_ertc_clock_enable
void crm_ertc_clock_enable(confirm_state new_state)
enable or disable ertc
Definition: at32f435_437_crm.c:445
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_battery_powered_domain_reset
void crm_battery_powered_domain_reset(confirm_state new_state)
battery powered domain software reset
Definition: at32f435_437_crm.c:541
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_CLOCK_SOURCE_LEXT
@ CRM_CLOCK_SOURCE_LEXT
Definition: at32f435_437_crm.h:562
CRM_ERTC_CLOCK_LEXT
@ CRM_ERTC_CLOCK_LEXT
Definition: at32f435_437_crm.h:632
CRM_LEXT_STABLE_FLAG
#define CRM_LEXT_STABLE_FLAG
Definition: at32f435_437_crm.h:58
ertc_hour_mode_set
error_status ertc_hour_mode_set(ertc_hour_mode_set_type mode)
ertc hour mode set.
Definition: at32f435_437_ertc.c:283
ertc_wakeup_clock_set
void ertc_wakeup_clock_set(ertc_wakeup_clock_type clock)
set wakeup timer clock.
Definition: at32f435_437_ertc.c:731
ertc_wait_update
error_status ertc_wait_update(void)
ertc wait register update finish.
Definition: at32f435_437_ertc.c:97
ertc_wakeup_counter_set
void ertc_wakeup_counter_set(uint32_t counter)
set wakeup counter.
Definition: at32f435_437_ertc.c:747
ertc_time_set
error_status ertc_time_set(uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set time.
Definition: at32f435_437_ertc.c:363
ertc_reset
error_status ertc_reset(void)
ertc reset all register.
Definition: at32f435_437_ertc.c:207
ertc_interrupt_enable
void ertc_interrupt_enable(uint32_t source, confirm_state new_state)
enable or disable interrupt.
Definition: at32f435_437_ertc.c:1386
ertc_wakeup_enable
error_status ertc_wakeup_enable(confirm_state new_state)
enable or disable wakeup timer.
Definition: at32f435_437_ertc.c:773
ertc_date_set
error_status ertc_date_set(uint8_t year, uint8_t month, uint8_t date, uint8_t week)
set date.
Definition: at32f435_437_ertc.c:314
ertc_calendar_get
void ertc_calendar_get(ertc_time_type *time)
get calendar
Definition: at32f435_437_ertc.c:404
ertc_divider_set
error_status ertc_divider_set(uint16_t div_a, uint16_t div_b)
ertc division set.
Definition: at32f435_437_ertc.c:251
ERTC_HOUR_MODE_24
@ ERTC_HOUR_MODE_24
Definition: at32f435_437_ertc.h:116
ERTC_WAT_CLK_CK_B_16BITS
@ ERTC_WAT_CLK_CK_B_16BITS
Definition: at32f435_437_ertc.h:180
ERTC_AM
@ ERTC_AM
Definition: at32f435_437_ertc.h:126
ERTC_WAT_INT
#define ERTC_WAT_INT
Definition: at32f435_437_ertc.h:55
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_22
#define EXINT_LINE_22
Definition: at32f435_437_exint.h:74
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
time
ertc_time_type * time
Definition: random.c:41
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_battery_powered_domain_access
void pwc_battery_powered_domain_access(confirm_state new_state)
enable or disable access to the battery powered domain.
Definition: at32f435_437_pwc.c:61
ERTC_WKUP_IRQn
@ ERTC_WKUP_IRQn
Definition: at32f435_437.h:149
ertc_time_type
ertc time
Definition: at32f435_437_ertc.h:383
ertc_time_type::year
uint8_t year
Definition: at32f435_437_ertc.h:384
ertc_time_type::day
uint8_t day
Definition: at32f435_437_ertc.h:386
ertc_time_type::hour
uint8_t hour
Definition: at32f435_437_ertc.h:387
ertc_time_type::min
uint8_t min
Definition: at32f435_437_ertc.h:388
ertc_time_type::month
uint8_t month
Definition: at32f435_437_ertc.h:385
ertc_time_type::sec
uint8_t sec
Definition: at32f435_437_ertc.h:389
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • exint
  • exint_config
  • inc
project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • exint
  • exint_config
  • inc
project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • exint
  • exint_config
  • inc
project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • exint
  • exint_config
  • src
Functions
project/at_start_f437/examples/exint/exint_config/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/exint/exint_config/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • exint
  • exint_config
  • src
project/at_start_f437/examples/exint/exint_config/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/exint/exint_config/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • exint
  • exint_config
  • src
Functions
project/at_start_f437/examples/exint/exint_config/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/exint/exint_config/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • exint
  • exint_config
  • src
project/at_start_f437/examples/exint/exint_config/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • exint
  • exint_config
  • src
Functions
project/at_start_f437/examples/exint/exint_config/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | exint_line0_config (void)
exint line0 config. configure pa0 in interrupt mode More...
void | EXINT0_IRQHandler (void)
exint0 interrupt handler More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/exint/exint_config/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • exint
  • exint_config
  • src
project/at_start_f437/examples/exint/exint_config/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38void exint_line0_config(void);
39
45void exint_line0_config(void)
46{
47 exint_init_type exint_init_struct;
48
49 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
50 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
51
52 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
53
54 exint_default_para_init(&exint_init_struct);
55 exint_init_struct.line_enable = TRUE;
56 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
57 exint_init_struct.line_select = EXINT_LINE_0;
58 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
59 exint_init(&exint_init_struct);
60
61 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
62 nvic_irq_enable(EXINT0_IRQn, 1, 0);
63}
64
70void EXINT0_IRQHandler(void)
71{
72 if(exint_flag_get(EXINT_LINE_0) != RESET)
73 {
74 at32_led_toggle(LED2);
75 at32_led_toggle(LED3);
76 at32_led_toggle(LED4);
77 exint_flag_clear(EXINT_LINE_0);
78 }
79}
80
86int main(void)
87{
88 system_clock_config();
89
90 at32_board_init();
91
92 /* turn led2/led3/led4 on */
93 at32_led_on(LED2);
94 at32_led_on(LED3);
95 at32_led_on(LED4);
96
97 /* configure pa0 in interrupt mode */
98 exint_line0_config();
99
100 while(1)
101 {
102 }
103}
104
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/examples/exint/exint_config/src/main.c:70
exint_line0_config
void exint_line0_config(void)
exint line0 config. configure pa0 in interrupt mode
Definition: project/at_start_f435/examples/exint/exint_config/src/main.c:45
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
exint_flag_get
flag_status exint_flag_get(uint32_t exint_line)
get exint flag
Definition: at32f435_437_exint.c:142
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • exint
  • exint_software_trigger
  • inc
project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • exint
  • exint_software_trigger
  • inc
project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • exint
  • exint_software_trigger
  • inc
project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • exint
  • exint_software_trigger
  • src
Functions
project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • exint
  • exint_software_trigger
  • src
project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • exint
  • exint_software_trigger
  • src
Functions
project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • exint
  • exint_software_trigger
  • src
project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • exint
  • exint_software_trigger
  • src
Functions
project/at_start_f437/examples/exint/exint_software_trigger/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | exint_line4_config (void)
exint line4 config. configure pa0 in interrupt mode More...
static void | tmr1_config (void)
tmr1 configuration. More...
void | TMR1_OVF_TMR10_IRQHandler (void)
tmr1 interrupt handler More...
void | EXINT4_IRQHandler (void)
exint4 interrupt handler More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/exint/exint_software_trigger/src/main.c.

Function Documentation

◆ tmr1_config()

static void tmr1_config ( void )
static

tmr1 configuration.

Parameters
none
Return values
none

< tmr interrupt overflow

Definition at line 67 of file project/at_start_f437/examples/exint/exint_software_trigger/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • exint
  • exint_software_trigger
  • src
project/at_start_f437/examples/exint/exint_software_trigger/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38void exint_line4_config(void);
39static void tmr1_config(void);
40
46void exint_line4_config(void)
47{
48 exint_init_type exint_init_struct;
49
50 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
51
52 exint_default_para_init(&exint_init_struct);
53 exint_init_struct.line_enable = TRUE;
54 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
55 exint_init_struct.line_select = EXINT_LINE_4;
56 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
57 exint_init(&exint_init_struct);
58 exint_flag_clear(EXINT_LINE_4);
59 nvic_irq_enable(EXINT4_IRQn, 1, 0);
60}
61
67static void tmr1_config(void)
68{
69 crm_clocks_freq_type crm_clocks_freq_struct = {0};
70
71 /* get system clock */
72 crm_clocks_freq_get(&crm_clocks_freq_struct);
73
74 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
75
76 /* (systemclock / (system_core_clock/10000)) / 10000 = 1Hz(1s) */
77 tmr_base_init(TMR1, 10000-1, system_core_clock/10000-1);
78 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
79 tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
80 tmr_interrupt_enable(TMR1, TMR_OVF_INT, TRUE);
81 nvic_irq_enable(TMR1_OVF_TMR10_IRQn, 0, 0);
82}
83
89void TMR1_OVF_TMR10_IRQHandler(void)
90{
91 if(tmr_flag_get(TMR1,TMR_OVF_FLAG) != RESET)
92 {
93 at32_led_toggle(LED2);
94 exint_software_interrupt_event_generate(EXINT_LINE_4);
95 tmr_flag_clear(TMR1,TMR_OVF_FLAG);
96 }
97}
98
104void EXINT4_IRQHandler(void)
105{
106 if(exint_flag_get(EXINT_LINE_4) != RESET)
107 {
108 at32_led_toggle(LED3);
109 at32_led_toggle(LED4);
110 exint_flag_clear(EXINT_LINE_4);
111 }
112}
113
119int main(void)
120{
121 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
122 system_clock_config();
123
124 at32_board_init();
125
126 /* turn led2/led3/led4 on */
127 at32_led_on(LED2);
128 at32_led_on(LED3);
129 at32_led_on(LED4);
130 tmr1_config();
131 exint_line4_config();
132 tmr_counter_enable(TMR1, TRUE);
133 while(1)
134 {
135 }
136}
137
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
TMR1_OVF_TMR10_IRQHandler
void TMR1_OVF_TMR10_IRQHandler(void)
this function handles tmr1 overflow handler.
Definition: project/at_start_f435/examples/debug/tmr1/src/main.c:46
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
exint_line4_config
void exint_line4_config(void)
exint line4 config. configure pa0 in interrupt mode
Definition: project/at_start_f435/examples/exint/exint_software_trigger/src/main.c:46
EXINT4_IRQHandler
void EXINT4_IRQHandler(void)
exint4 interrupt handler
Definition: project/at_start_f435/examples/exint/exint_software_trigger/src/main.c:104
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
exint_flag_get
flag_status exint_flag_get(uint32_t exint_line)
get exint flag
Definition: at32f435_437_exint.c:142
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_software_interrupt_event_generate
void exint_software_interrupt_event_generate(uint32_t exint_line)
generate exint software interrupt event
Definition: at32f435_437_exint.c:169
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_4
#define EXINT_LINE_4
Definition: at32f435_437_exint.h:56
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
TMR1_OVF_TMR10_IRQn
@ TMR1_OVF_TMR10_IRQn
Definition: at32f435_437.h:173
EXINT4_IRQn
@ EXINT4_IRQn
Definition: at32f435_437.h:156
tmr1_config
static void tmr1_config(void)
tmr1 configuration.
Definition: project/at_start_f437/examples/exint/exint_software_trigger/src/main.c:67
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • flash
  • fap_enable
  • inc
project/at_start_f437/examples/flash/fap_enable/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • flash
  • fap_enable
  • inc
project/at_start_f437/examples/flash/fap_enable/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • flash
  • fap_enable
  • inc
project/at_start_f437/examples/flash/fap_enable/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • flash
  • fap_enable
  • src
Functions
project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • flash
  • fap_enable
  • src
project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • flash
  • fap_enable
  • src
Functions
project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • flash
  • fap_enable
  • src
project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • flash
  • fap_enable
  • src
Functions
project/at_start_f437/examples/flash/fap_enable/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/flash/fap_enable/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • flash
  • fap_enable
  • src
project/at_start_f437/examples/flash/fap_enable/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43int main(void)
44{
45 flash_status_type status = FLASH_OPERATE_DONE;
46 system_clock_config();
47 at32_board_init();
48 if(flash_fap_status_get() == RESET)
49 {
50 flash_unlock();
51 /* wait for operation to be completed */
52 status = flash_operation_wait_for(OPERATION_TIMEOUT);
53
54 if(status != FLASH_OPERATE_TIMEOUT)
55 {
56 if((status == FLASH_PROGRAM_ERROR) || (status == FLASH_EPP_ERROR))
57 flash_flag_clear(FLASH_PRGMERR_FLAG | FLASH_EPPERR_FLAG);
58
59 status = flash_fap_enable(TRUE);
60 if(status == FLASH_OPERATE_DONE)
61 nvic_system_reset();
62 }
63 }else
64 {
65 at32_led_on(LED2);
66 at32_led_on(LED3);
67 at32_led_on(LED4);
68 }
69 while(1)
70 {
71 }
72}
73
74
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
OPERATION_TIMEOUT
#define OPERATION_TIMEOUT
Definition: at32f435_437_flash.h:151
FLASH_PRGMERR_FLAG
#define FLASH_PRGMERR_FLAG
Definition: at32f435_437_flash.h:81
FLASH_EPPERR_FLAG
#define FLASH_EPPERR_FLAG
Definition: at32f435_437_flash.h:82
flash_fap_status_get
flag_status flash_fap_status_get(void)
check the flash access protection status.
Definition: at32f435_437_flash.c:895
flash_unlock
void flash_unlock(void)
unlock the flash controller.
Definition: at32f435_437_flash.c:290
flash_fap_enable
flash_status_type flash_fap_enable(confirm_state new_state)
enable or disable the flash access protection.
Definition: at32f435_437_flash.c:848
flash_operation_wait_for
flash_status_type flash_operation_wait_for(uint32_t time_out)
wait for flash operation complete or timeout.
Definition: at32f435_437_flash.c:216
flash_flag_clear
void flash_flag_clear(uint32_t flash_flag)
clear the flash flag.
Definition: at32f435_437_flash.c:105
flash_status_type
flash_status_type
flash status type
Definition: at32f435_437_flash.h:199
FLASH_OPERATE_DONE
@ FLASH_OPERATE_DONE
Definition: at32f435_437_flash.h:203
FLASH_OPERATE_TIMEOUT
@ FLASH_OPERATE_TIMEOUT
Definition: at32f435_437_flash.h:204
FLASH_PROGRAM_ERROR
@ FLASH_PROGRAM_ERROR
Definition: at32f435_437_flash.h:201
FLASH_EPP_ERROR
@ FLASH_EPP_ERROR
Definition: at32f435_437_flash.h:202
nvic_system_reset
void nvic_system_reset(void)
system reset
Definition: at32f435_437_misc.c:52
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • flash
  • flash_write_read
  • inc
project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • flash
  • flash_write_read
  • inc
project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • flash
  • flash_write_read
  • inc
project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: flash.h File Reference

  • flash
  • flash_write_read
  • inc
Functions
project/at_start_f437/examples/flash/flash_write_read/inc/flash.h File Reference

flash header file More...

#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | flash_read (uint32_t read_addr, uint16_t *p_buffer, uint16_t num_read)
read data using halfword mode More...
error_status | flash_write_nocheck (uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write)
write data using halfword mode without checking More...
error_status | flash_write (uint32_t write_addr, uint16_t *p_Buffer, uint16_t num_write)
write data using halfword mode with checking More...

Detailed Description

flash header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/flash/flash_write_read/inc/flash.h.


AT32F435/437 Firmwary Library: flash.h Source File

  • flash
  • flash_write_read
  • inc
project/at_start_f437/examples/flash/flash_write_read/inc/flash.h
Go to the documentation of this file.
1
27/* Define to prevent recursive inclusion -------------------------------------*/
28#ifndef __FLASH_H__
29#define __FLASH_H__
30
31#include "at32f435_437_board.h"
32
46void flash_read(uint32_t read_addr, uint16_t *p_buffer, uint16_t num_read);
47 error_status flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write);
48 error_status flash_write(uint32_t write_addr,uint16_t *p_Buffer, uint16_t num_write);
49
63#endif
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
at32f435_437_board.h
error_status
error_status
Definition: at32f435_437.h:380
flash_write
error_status flash_write(uint32_t write_addr, uint16_t *p_Buffer, uint16_t num_write)
write data using halfword mode with checking
Definition: project/at_start_f437/examples/flash/flash_write_read/src/flash.c:87
flash_read
void flash_read(uint32_t read_addr, uint16_t *p_buffer, uint16_t num_read)
read data using halfword mode
Definition: project/at_start_f437/examples/flash/flash_write_read/src/flash.c:49
flash_write_nocheck
error_status flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write)
write data using halfword mode without checking
Definition: project/at_start_f437/examples/flash/flash_write_read/src/flash.c:66


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • flash
  • flash_write_read
  • src
Functions
project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • flash
  • flash_write_read
  • src
project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • flash
  • flash_write_read
  • src
Functions
project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • flash
  • flash_write_read
  • src
project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: flash.c File Reference

  • flash
  • flash_write_read
  • src
Macros | Functions | Variables
project/at_start_f437/examples/flash/flash_write_read/src/flash.c File Reference

flash program More...

#include "at32f435_437_board.h"
#include "flash.h"

Go to the source code of this file.

Macros

#define SECTOR_SIZE 4096 /* this parameter depends on the specific model of the chip */

Functions

void | flash_read (uint32_t read_addr, uint16_t *p_buffer, uint16_t num_read)
read data using halfword mode More...
error_status | flash_write_nocheck (uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write)
write data using halfword mode without checking More...
error_status | flash_write (uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write)
write data using halfword mode with checking More...

Variables

uint16_t flash_buf [4096/2]

Detailed Description

flash program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/flash/flash_write_read/src/flash.c.


AT32F435/437 Firmwary Library: flash.c Source File

  • flash
  • flash_write_read
  • src
project/at_start_f437/examples/flash/flash_write_read/src/flash.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "flash.h"
29
38#define SECTOR_SIZE 4096 /* this parameter depends on the specific model of the chip */
39
40uint16_t flash_buf[SECTOR_SIZE / 2];
41
49void flash_read(uint32_t read_addr, uint16_t *p_buffer, uint16_t num_read)
50{
51 uint16_t i;
52 for(i = 0; i < num_read; i++)
53 {
54 p_buffer[i] = *(uint16_t*)(read_addr);
55 read_addr += 2;
56 }
57}
58
66 error_status flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write)
67{
68 uint16_t i;
69 flash_status_type status = FLASH_OPERATE_DONE;
70 for(i = 0; i < num_write; i++)
71 {
72 status = flash_halfword_program(write_addr, p_buffer[i]);
73 if(status != FLASH_OPERATE_DONE)
74 return ERROR;
75 write_addr += 2;
76 }
77 return SUCCESS;
78}
79
87 error_status flash_write(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write)
88{
89 uint32_t offset_addr;
90 uint32_t sector_position;
91 uint16_t sector_offset;
92 uint16_t sector_remain;
93 uint16_t i;
94 flash_status_type status = FLASH_OPERATE_DONE;
95
96 flash_unlock();
97 offset_addr = write_addr - FLASH_BASE;
98 sector_position = offset_addr / SECTOR_SIZE;
99 sector_offset = (offset_addr % SECTOR_SIZE) / 2;
100 sector_remain = SECTOR_SIZE / 2 - sector_offset;
101 if(num_write <= sector_remain)
102 sector_remain = num_write;
103 while(1)
104 {
105 flash_read(sector_position * SECTOR_SIZE + FLASH_BASE, flash_buf, SECTOR_SIZE / 2);
106 for(i = 0; i < sector_remain; i++)
107 {
108 if(flash_buf[sector_offset + i] != 0xFFFF)
109 break;
110 }
111 if(i < sector_remain)
112 {
113 /* wait for operation to be completed */
114 status = flash_operation_wait_for(ERASE_TIMEOUT);
115
116 if((status == FLASH_PROGRAM_ERROR) || (status == FLASH_EPP_ERROR))
117 flash_flag_clear(FLASH_PRGMERR_FLAG | FLASH_EPPERR_FLAG);
118 else if(status == FLASH_OPERATE_TIMEOUT)
119 return ERROR;
120 status = flash_sector_erase(sector_position * SECTOR_SIZE + FLASH_BASE);
121 if(status != FLASH_OPERATE_DONE)
122 return ERROR;
123 for(i = 0; i < sector_remain; i++)
124 {
125 flash_buf[i + sector_offset] = p_buffer[i];
126 }
127 if(flash_write_nocheck(sector_position * SECTOR_SIZE + FLASH_BASE, flash_buf, SECTOR_SIZE / 2) != SUCCESS)
128 return ERROR;
129 }
130 else
131 {
132 if(flash_write_nocheck(write_addr, p_buffer, sector_remain) != SUCCESS)
133 return ERROR;
134 }
135 if(num_write == sector_remain)
136 break;
137 else
138 {
139 sector_position++;
140 sector_offset = 0;
141 p_buffer += sector_remain;
142 write_addr += (sector_remain * 2);
143 num_write -= sector_remain;
144 if(num_write > (SECTOR_SIZE / 2))
145 sector_remain = SECTOR_SIZE / 2;
146 else
147 sector_remain = num_write;
148 }
149 }
150 flash_lock();
151 return SUCCESS;
152}
153
154
155
at32f435_437_board.h
SECTOR_SIZE
#define SECTOR_SIZE
Definition: project/at_start_f437/examples/flash/flash_write_read/src/flash.c:38
flash_buf
uint16_t flash_buf[4096/2]
Definition: project/at_start_f437/examples/flash/flash_write_read/src/flash.c:40
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
ERASE_TIMEOUT
#define ERASE_TIMEOUT
flash timeout definition
Definition: at32f435_437_flash.h:149
FLASH_PRGMERR_FLAG
#define FLASH_PRGMERR_FLAG
Definition: at32f435_437_flash.h:81
FLASH_EPPERR_FLAG
#define FLASH_EPPERR_FLAG
Definition: at32f435_437_flash.h:82
flash_sector_erase
flash_status_type flash_sector_erase(uint32_t sector_address)
erase a specified flash sector.
Definition: at32f435_437_flash.c:357
flash_halfword_program
flash_status_type flash_halfword_program(uint32_t address, uint16_t data)
program a halfword at a specified address.
Definition: at32f435_437_flash.c:643
flash_unlock
void flash_unlock(void)
unlock the flash controller.
Definition: at32f435_437_flash.c:290
flash_lock
void flash_lock(void)
lock the flash controller.
Definition: at32f435_437_flash.c:325
flash_operation_wait_for
flash_status_type flash_operation_wait_for(uint32_t time_out)
wait for flash operation complete or timeout.
Definition: at32f435_437_flash.c:216
flash_flag_clear
void flash_flag_clear(uint32_t flash_flag)
clear the flash flag.
Definition: at32f435_437_flash.c:105
flash_status_type
flash_status_type
flash status type
Definition: at32f435_437_flash.h:199
FLASH_OPERATE_DONE
@ FLASH_OPERATE_DONE
Definition: at32f435_437_flash.h:203
FLASH_OPERATE_TIMEOUT
@ FLASH_OPERATE_TIMEOUT
Definition: at32f435_437_flash.h:204
FLASH_PROGRAM_ERROR
@ FLASH_PROGRAM_ERROR
Definition: at32f435_437_flash.h:201
FLASH_EPP_ERROR
@ FLASH_EPP_ERROR
Definition: at32f435_437_flash.h:202
flash_write
error_status flash_write(uint32_t write_addr, uint16_t *p_Buffer, uint16_t num_write)
write data using halfword mode with checking
Definition: project/at_start_f437/examples/flash/flash_write_read/src/flash.c:87
flash_read
void flash_read(uint32_t read_addr, uint16_t *p_buffer, uint16_t num_read)
read data using halfword mode
Definition: project/at_start_f437/examples/flash/flash_write_read/src/flash.c:49
flash_write_nocheck
error_status flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write)
write data using halfword mode without checking
Definition: project/at_start_f437/examples/flash/flash_write_read/src/flash.c:66
FLASH_BASE
#define FLASH_BASE
Definition: at32f435_437.h:425


AT32F435/437 Firmwary Library: main.c File Reference

  • flash
  • flash_write_read
  • src
Macros | Functions | Variables
project/at_start_f437/examples/flash/flash_write_read/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "flash.h"

Go to the source code of this file.

Macros

#define | TEST_BUFEER_SIZE 3000
#define | TEST_FLASH_ADDRESS_START (0x08000000 + 1024 * 10)

Functions

error_status | buffer_compare (uint16_t *p_buffer1, uint16_t *p_buffer2, uint16_t buffer_length)
compares two buffers. More...
int | main (void)
main function. More...

Variables

uint16_t | buffer_write [3000]
uint16_t | buffer_read [3000]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/flash/flash_write_read/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • flash
  • flash_write_read
  • src
project/at_start_f437/examples/flash/flash_write_read/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "flash.h"
30
39#define TEST_BUFEER_SIZE 3000
40#define TEST_FLASH_ADDRESS_START (0x08000000 + 1024 * 10)
41
42uint16_t buffer_write[TEST_BUFEER_SIZE];
43uint16_t buffer_read[TEST_BUFEER_SIZE];
44
45 error_status buffer_compare(uint16_t* p_buffer1, uint16_t* p_buffer2, uint16_t buffer_length);
46
54 error_status buffer_compare(uint16_t* p_buffer1, uint16_t* p_buffer2, uint16_t buffer_length)
55{
56 while(buffer_length--)
57 {
58 if(*p_buffer1 != *p_buffer2)
59 {
60 return ERROR;
61 }
62 p_buffer1++;
63 p_buffer2++;
64 }
65 return SUCCESS;
66}
67
73int main(void)
74{
75 uint32_t index=0;
76 error_status err_status;
77 system_clock_config();
78 at32_board_init();
79 /* fill buffer_write data to test */
80 for(index = 0; index < TEST_BUFEER_SIZE; index++)
81 {
82 buffer_write[index] = index;
83 }
84
85 /* write data to flash */
86 err_status = flash_write(TEST_FLASH_ADDRESS_START, buffer_write, TEST_BUFEER_SIZE);
87
88 /* read data from flash */
89 flash_read(TEST_FLASH_ADDRESS_START, buffer_read, TEST_BUFEER_SIZE);
90
91 /* compare the buffer */
92 if((buffer_compare(buffer_write, buffer_read, TEST_BUFEER_SIZE) == SUCCESS) && (err_status == SUCCESS))
93 {
94 at32_led_on(LED2);
95 at32_led_on(LED3);
96 at32_led_on(LED4);
97 }
98
99 while(1)
100 {
101 }
102}
103
104
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
TEST_BUFEER_SIZE
#define TEST_BUFEER_SIZE
Definition: project/at_start_f437/examples/flash/flash_write_read/src/main.c:39
buffer_read
uint16_t buffer_read[3000]
Definition: project/at_start_f437/examples/flash/flash_write_read/src/main.c:43
TEST_FLASH_ADDRESS_START
#define TEST_FLASH_ADDRESS_START
Definition: project/at_start_f437/examples/flash/flash_write_read/src/main.c:40
buffer_write
uint16_t buffer_write[3000]
Definition: project/at_start_f437/examples/flash/flash_write_read/src/main.c:42
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
flash_write
error_status flash_write(uint32_t write_addr, uint16_t *p_Buffer, uint16_t num_write)
write data using halfword mode with checking
Definition: project/at_start_f437/examples/flash/flash_write_read/src/flash.c:87
flash_read
void flash_read(uint32_t read_addr, uint16_t *p_buffer, uint16_t num_read)
read data using halfword mode
Definition: project/at_start_f437/examples/flash/flash_write_read/src/flash.c:49
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • gpio
  • io_toggle
  • inc
project/at_start_f437/examples/gpio/io_toggle/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • gpio
  • io_toggle
  • inc
project/at_start_f437/examples/gpio/io_toggle/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • gpio
  • io_toggle
  • inc
project/at_start_f437/examples/gpio/io_toggle/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • gpio
  • io_toggle
  • src
Functions
project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • gpio
  • io_toggle
  • src
project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • gpio
  • io_toggle
  • src
Functions
project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • gpio
  • io_toggle
  • src
project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • gpio
  • io_toggle
  • src
Functions
project/at_start_f437/examples/gpio/io_toggle/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | gpio_config (void)
pa.01 gpio configuration. More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/gpio/io_toggle/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • gpio
  • io_toggle
  • src
project/at_start_f437/examples/gpio/io_toggle/src/main.c
Go to the documentation of this file.
1
27/* includes */
28#include "at32f435_437_board.h"
29#include "at32f435_437_clock.h"
30
44void gpio_config(void)
45{
46 gpio_init_type gpio_init_struct;
47
48 /* enable the gpioa clock */
49 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
50
51 /* set default parameter */
52 gpio_default_para_init(&gpio_init_struct);
53
54 /* configure the gpio */
55 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
56 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
57 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
58 gpio_init_struct.gpio_pins = GPIO_PINS_1;
59 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
60 gpio_init(GPIOA, &gpio_init_struct);
61}
62
68int main(void)
69{
70 system_clock_config();
71
72 gpio_config();
73
74 while(1)
75 {
76 /* set pa.01 */
77 GPIOA->scr = GPIO_PINS_1;
78 /* reset pa.01 */
79 GPIOA->clr = GPIO_PINS_1;
80
81 /* set pa.01 */
82 GPIOA->scr = GPIO_PINS_1;
83 /* reset pa.01 */
84 GPIOA->clr = GPIO_PINS_1;
85
86 /* set pa.01 */
87 GPIOA->scr = GPIO_PINS_1;
88 /* reset pa.01 */
89 GPIOA->clr = GPIO_PINS_1;
90
91 /* set pa.01 */
92 GPIOA->scr = GPIO_PINS_1;
93 /* reset pa.01 */
94 GPIOA->clr = GPIO_PINS_1;
95
96 /* set pa.01 */
97 GPIOA->scr = GPIO_PINS_1;
98 /* reset pa.01 */
99 GPIOA->clr = GPIO_PINS_1;
100
101 /* set pa.01 */
102 GPIOA->scr = GPIO_PINS_1;
103 /* reset pa.01 */
104 GPIOA->clr = GPIO_PINS_1;
105 }
106}
107
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_config
void gpio_config(void)
pa.01 gpio configuration.
Definition: project/at_start_f435/examples/gpio/io_toggle/src/main.c:44
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • gpio
  • led_toggle
  • inc
project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • gpio
  • led_toggle
  • inc
project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • gpio
  • led_toggle
  • inc
project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • gpio
  • led_toggle
  • src
Functions
project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • gpio
  • led_toggle
  • src
project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • gpio
  • led_toggle
  • src
Functions
project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • gpio
  • led_toggle
  • src
project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • gpio
  • led_toggle
  • src
Functions
project/at_start_f437/examples/gpio/led_toggle/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/gpio/led_toggle/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • gpio
  • led_toggle
  • src
project/at_start_f437/examples/gpio/led_toggle/src/main.c
Go to the documentation of this file.
1
27/* includes */
28#include "at32f435_437_board.h"
29#include "at32f435_437_clock.h"
30
44int main(void)
45{
46 system_clock_config();
47
48 at32_board_init();
49
50 while(1)
51 {
52 at32_led_toggle(LED2);
53 delay_ms(200);
54 at32_led_toggle(LED3);
55 delay_ms(200);
56 at32_led_toggle(LED4);
57 delay_ms(200);
58 }
59}
60
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • gpio
  • swjtag_mux
  • inc
project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • gpio
  • swjtag_mux
  • inc
project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • gpio
  • swjtag_mux
  • inc
project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • gpio
  • swjtag_mux
  • src
Functions
project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • gpio
  • swjtag_mux
  • src
project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • gpio
  • swjtag_mux
  • src
Functions
project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • gpio
  • swjtag_mux
  • src
project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • gpio
  • swjtag_mux
  • src
Functions
project/at_start_f437/examples/gpio/swjtag_mux/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | swj_dp_config (void)
configure the gpio of swj-dp. More...
void | gpio_pins_toggle (gpio_type *gpio_x, uint16_t gpio_pin)
toggles the specified gpio pin More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/gpio/swjtag_mux/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • gpio
  • swjtag_mux
  • src
project/at_start_f437/examples/gpio/swjtag_mux/src/main.c
Go to the documentation of this file.
1
27/* includes */
28#include "at32f435_437_board.h"
29#include "at32f435_437_clock.h"
30
39void swj_dp_config(void);
40void gpio_pins_toggle(gpio_type* gpio_x, uint16_t gpio_pin);
41
47void swj_dp_config(void)
48{
49 gpio_init_type gpio_init_struct;
50
51 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
52 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
53
54 gpio_default_para_init(&gpio_init_struct);
55
56 /* configure pa13 (jtms/swdat) as general output push-pull */
57 gpio_init_struct.gpio_pins = GPIO_PINS_13;
58 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
59 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
60 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
61 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
62 gpio_init(GPIOA, &gpio_init_struct);
63
64 /* configure pa14 (jtck/swclk) as mux usart2 tx */
65 gpio_init_struct.gpio_pins = GPIO_PINS_14;
66 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
67 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
68 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
69 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
70 gpio_init(GPIOA, &gpio_init_struct);
71 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE14, GPIO_MUX_8);
72
73 /* configure usart2 param */
74 usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
75 usart_transmitter_enable(USART2, TRUE);
76 usart_enable(USART2, TRUE);
77}
78
85void gpio_pins_toggle(gpio_type* gpio_x, uint16_t gpio_pin)
86{
87 gpio_x->odt ^= gpio_pin;
88}
89
95int main(void)
96{
97 static uint8_t data = 0;
98 system_clock_config();
99 at32_board_init();
100 swj_dp_config();
101 while(1)
102 {
103 /* pa13 pin toggle */
104 gpio_pins_toggle(GPIOA, GPIO_PINS_13);
105 delay_ms(500);
106 /* pa14 pin send usart char */
107 while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
108 usart_data_transmit(USART2, data++);
109 }
110}
111
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_pins_toggle
void gpio_pins_toggle(gpio_type *gpio_x, uint16_t gpio_pin)
toggles the specified gpio pin
Definition: project/at_start_f435/examples/gpio/swjtag_mux/src/main.c:85
swj_dp_config
void swj_dp_config(void)
configure the gpio of swj-dp.
Definition: project/at_start_f435/examples/gpio/swjtag_mux/src/main.c:47
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_8
@ GPIO_MUX_8
Definition: at32f435_437_gpio.h:164
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART2
#define USART2
Definition: at32f435_437_usart.h:349
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
gpio_type
type define gpio register all
Definition: at32f435_437_gpio.h:178
gpio_type::odt
__IO uint32_t odt
Definition: at32f435_437_gpio.h:321
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • i2c
  • communication_dma
  • inc
project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • i2c
  • communication_dma
  • inc
project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • i2c
  • communication_dma
  • inc
project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • i2c
  • communication_dma
  • src
Functions
project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • i2c
  • communication_dma
  • src
project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • i2c
  • communication_dma
  • src
Macros | Functions | Variables
project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "i2c_application.h"

Go to the source code of this file.

Macros

#define | I2Cx_DMA_TX_IRQHandler DMA1_Channel1_IRQHandler
#define | I2Cx_DMA_RX_IRQHandler DMA1_Channel2_IRQHandler
#define | I2Cx_EVT_IRQHandler I2C1_EVT_IRQHandler
#define | I2Cx_ERR_IRQHandler I2C1_ERR_IRQHandler

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel2_IRQHandler (void)
this function handles dma interrupt request. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma interrupt request. More...
void | I2C1_EVT_IRQHandler (void)
this function handles i2c event interrupt request. More...
void | I2C1_ERR_IRQHandler (void)
this function handles i2c error interrupt request. More...

Variables

i2c_handle_type hi2cx

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • i2c
  • communication_dma
  • src
project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "i2c_application.h"
30
39extern i2c_handle_type hi2cx;
40
41#define I2Cx_DMA_TX_IRQHandler DMA1_Channel1_IRQHandler
42#define I2Cx_DMA_RX_IRQHandler DMA1_Channel2_IRQHandler
43#define I2Cx_EVT_IRQHandler I2C1_EVT_IRQHandler
44#define I2Cx_ERR_IRQHandler I2C1_ERR_IRQHandler
45
51void NMI_Handler(void)
52{
53}
54
60void HardFault_Handler(void)
61{
62 /* go to infinite loop when hard fault exception occurs */
63 while(1)
64 {
65 }
66}
67
73void MemManage_Handler(void)
74{
75 /* go to infinite loop when memory manage exception occurs */
76 while(1)
77 {
78 }
79}
80
86void BusFault_Handler(void)
87{
88 /* go to infinite loop when bus fault exception occurs */
89 while(1)
90 {
91 }
92}
93
99void UsageFault_Handler(void)
100{
101 /* go to infinite loop when usage fault exception occurs */
102 while(1)
103 {
104 }
105}
106
112void SVC_Handler(void)
113{
114}
115
121void DebugMon_Handler(void)
122{
123}
124
130void PendSV_Handler(void)
131{
132}
133
139void SysTick_Handler(void)
140{
141}
142
143
149void I2Cx_DMA_RX_IRQHandler(void)
150{
151 i2c_dma_rx_irq_handler(&hi2cx);
152}
153
159void I2Cx_DMA_TX_IRQHandler(void)
160{
161 i2c_dma_tx_irq_handler(&hi2cx);
162}
163
169void I2Cx_EVT_IRQHandler(void)
170{
171 i2c_evt_irq_handler(&hi2cx);
172}
173
179void I2Cx_ERR_IRQHandler(void)
180{
181 i2c_err_irq_handler(&hi2cx);
182}
183
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
I2Cx_EVT_IRQHandler
#define I2Cx_EVT_IRQHandler
Definition: project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_int.c:43
hi2cx
i2c_handle_type hi2cx
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c:37
I2Cx_ERR_IRQHandler
#define I2Cx_ERR_IRQHandler
Definition: project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_int.c:44
I2Cx_DMA_TX_IRQHandler
#define I2Cx_DMA_TX_IRQHandler
Definition: project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_int.c:41
I2Cx_DMA_RX_IRQHandler
#define I2Cx_DMA_RX_IRQHandler
Definition: project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_int.c:42
i2c_evt_irq_handler
void i2c_evt_irq_handler(i2c_handle_type *hi2c)
interrupt procession function.
Definition: i2c_application.c:2140
i2c_err_irq_handler
void i2c_err_irq_handler(i2c_handle_type *hi2c)
dma reveive complete interrupt function.
Definition: i2c_application.c:2174
i2c_dma_rx_irq_handler
void i2c_dma_rx_irq_handler(i2c_handle_type *hi2c)
dma reveive complete interrupt function.
Definition: i2c_application.c:2130
i2c_dma_tx_irq_handler
void i2c_dma_tx_irq_handler(i2c_handle_type *hi2c)
dma transmission complete interrupt function.
Definition: i2c_application.c:2120
i2c_application.h
i2c application libray header file
i2c_handle_type
Definition: i2c_application.h:112
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • i2c
  • communication_dma
  • src
Macros | Functions | Variables
project/at_start_f437/examples/i2c/communication_dma/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "i2c_application.h"

Go to the source code of this file.

Macros

#define | I2C_TIMEOUT 0xFFFFFFF
#define | I2Cx_CLKCTRL 0x80504C4E
#define | I2Cx_ADDRESS 0xA0
#define | I2Cx_PORT I2C1
#define | I2Cx_CLK CRM_I2C1_PERIPH_CLOCK
#define | I2Cx_DMA DMA1
#define | I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK
#define | I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
#define | I2Cx_SCL_GPIO_PIN GPIO_PINS_6
#define | I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE6
#define | I2Cx_SCL_GPIO_PORT GPIOB
#define | I2Cx_SCL_GPIO_MUX GPIO_MUX_4
#define | I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
#define | I2Cx_SDA_GPIO_PIN GPIO_PINS_7
#define | I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE7
#define | I2Cx_SDA_GPIO_PORT GPIOB
#define | I2Cx_SDA_GPIO_MUX GPIO_MUX_4
#define | I2Cx_DMA_TX_Channel DMA1_CHANNEL1
#define | I2Cx_DMA_TX_DMAMUX_Channel DMA1MUX_CHANNEL1
#define | I2Cx_DMA_TX_DMAREQ DMAMUX_DMAREQ_ID_I2C1_TX
#define | I2Cx_DMA_TX_IRQn DMA1_Channel1_IRQn
#define | I2Cx_DMA_RX_Channel DMA1_CHANNEL2
#define | I2Cx_DMA_RX_DMAMUX_Channel DMA1MUX_CHANNEL2
#define | I2Cx_DMA_RX_DMAREQ DMAMUX_DMAREQ_ID_I2C1_RX
#define | I2Cx_DMA_RX_IRQn DMA1_Channel2_IRQn
#define | I2Cx_EVT_IRQn I2C1_EVT_IRQn
#define | I2Cx_ERR_IRQn I2C1_ERR_IRQn
#define | BUF_SIZE 8
#define | MASTER_BOARD

Functions

void | error_handler (uint32_t error_code)
error handler program More...
uint32_t | buffer_compare (uint8_t *buffer1, uint8_t *buffer2, uint32_t len)
compare whether the valus of buffer 1 and buffer 2 are equal. More...
int | main (void)
main function. More...
void | i2c_lowlevel_init (i2c_handle_type *hi2c)
initializes peripherals used by the i2c. More...

Variables

uint8_t | tx_buf [8] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08}
uint8_t | rx_buf [8] = {0}
i2c_handle_type hi2cx

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/communication_dma/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • i2c
  • communication_dma
  • src
project/at_start_f437/examples/i2c/communication_dma/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "i2c_application.h"
30
39#define I2C_TIMEOUT 0xFFFFFFF
40
41//#define I2Cx_CLKCTRL 0xB170FFFF //10K
42//#define I2Cx_CLKCTRL 0xC0E06969 //50K
43#define I2Cx_CLKCTRL 0x80504C4E //100K
44//#define I2Cx_CLKCTRL 0x30F03C6B //200K
45
46#define I2Cx_ADDRESS 0xA0
47
48#define I2Cx_PORT I2C1
49#define I2Cx_CLK CRM_I2C1_PERIPH_CLOCK
50#define I2Cx_DMA DMA1
51#define I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK
52
53#define I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
54#define I2Cx_SCL_GPIO_PIN GPIO_PINS_6
55#define I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE6
56#define I2Cx_SCL_GPIO_PORT GPIOB
57#define I2Cx_SCL_GPIO_MUX GPIO_MUX_4
58
59#define I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
60#define I2Cx_SDA_GPIO_PIN GPIO_PINS_7
61#define I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE7
62#define I2Cx_SDA_GPIO_PORT GPIOB
63#define I2Cx_SDA_GPIO_MUX GPIO_MUX_4
64
65#define I2Cx_DMA_TX_Channel DMA1_CHANNEL1
66#define I2Cx_DMA_TX_DMAMUX_Channel DMA1MUX_CHANNEL1
67#define I2Cx_DMA_TX_DMAREQ DMAMUX_DMAREQ_ID_I2C1_TX
68#define I2Cx_DMA_TX_IRQn DMA1_Channel1_IRQn
69
70#define I2Cx_DMA_RX_Channel DMA1_CHANNEL2
71#define I2Cx_DMA_RX_DMAMUX_Channel DMA1MUX_CHANNEL2
72#define I2Cx_DMA_RX_DMAREQ DMAMUX_DMAREQ_ID_I2C1_RX
73#define I2Cx_DMA_RX_IRQn DMA1_Channel2_IRQn
74
75#define I2Cx_EVT_IRQn I2C1_EVT_IRQn
76#define I2Cx_ERR_IRQn I2C1_ERR_IRQn
77
78#define BUF_SIZE 8
79#define MASTER_BOARD
80
81uint8_t tx_buf[BUF_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08};
82uint8_t rx_buf[BUF_SIZE] = {0};
83
84 i2c_handle_type hi2cx;
85
91void error_handler(uint32_t error_code)
92{
93 while(1)
94 {
95 at32_led_toggle(LED2);
96 delay_ms(500);
97 }
98}
99
107uint32_t buffer_compare(uint8_t* buffer1, uint8_t* buffer2, uint32_t len)
108{
109 uint32_t i;
110
111 for(i = 0; i < len; i++)
112 {
113 if(buffer1[i] != buffer2[i])
114 {
115 return 1;
116 }
117 }
118
119 return 0;
120}
121
127int main(void)
128{
129 i2c_status_type i2c_status;
130
131 /* initial system clock */
132 system_clock_config();
133
134 /* config nvic priority group */
135 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
136
137 /* at board initial */
138 at32_board_init();
139
140 hi2cx.i2cx = I2Cx_PORT;
141
142 /* i2c config */
143 i2c_config(&hi2cx);
144
145 while(1)
146 {
147
148 #if defined (MASTER_BOARD)
149
150 /* wait for key USER_BUTTON press before starting the communication */
151 while(at32_button_press() != USER_BUTTON)
152 {
153 }
154
155 /* start the request reception process */
156 if((i2c_status = i2c_master_transmit_dma(&hi2cx, I2Cx_ADDRESS, tx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
157 {
158 error_handler(i2c_status);
159 }
160
161 /* wait for the communication to end */
162 if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
163 {
164 error_handler(i2c_status);
165 }
166
167 delay_ms(10);
168
169 /* start the request reception process */
170 if((i2c_status = i2c_master_receive_dma(&hi2cx, I2Cx_ADDRESS, rx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
171 {
172 error_handler(i2c_status);
173 }
174
175 /* wait for the communication to end */
176 if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
177 {
178 error_handler(i2c_status);
179 }
180
181 if(buffer_compare(tx_buf, rx_buf, BUF_SIZE) == 0)
182 {
183 at32_led_on(LED3);
184 }
185 else
186 {
187 error_handler(i2c_status);
188 }
189
190 #else
191
192 /* wait for key USER_BUTTON press before starting the communication */
193 while(at32_button_press() != USER_BUTTON)
194 {
195 }
196
197 /* start the transmission process */
198 if((i2c_status = i2c_slave_receive_dma(&hi2cx, rx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
199 {
200 error_handler(i2c_status);
201 }
202
203 /* wait for the communication to end */
204 if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
205 {
206 error_handler(i2c_status);
207 }
208
209 if((i2c_status = i2c_slave_transmit_dma(&hi2cx, tx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
210 {
211 error_handler(i2c_status);
212 }
213
214 /* wait for the communication to end */
215 if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
216 {
217 error_handler(i2c_status);
218 }
219
220 if(buffer_compare(tx_buf, rx_buf, BUF_SIZE) == 0)
221 {
222 at32_led_on(LED3);
223 }
224 else
225 {
226 error_handler(i2c_status);
227 }
228
229 #endif
230
231 }
232}
233
239void i2c_lowlevel_init(i2c_handle_type* hi2c)
240{
241 gpio_init_type gpio_init_structure;
242
243 if(hi2c->i2cx == I2Cx_PORT)
244 {
245 /* i2c periph clock enable */
246 crm_periph_clock_enable(I2Cx_CLK, TRUE);
247 crm_periph_clock_enable(I2Cx_SCL_GPIO_CLK, TRUE);
248 crm_periph_clock_enable(I2Cx_SDA_GPIO_CLK, TRUE);
249
250 /* gpio configuration */
251 gpio_pin_mux_config(I2Cx_SCL_GPIO_PORT, I2Cx_SCL_GPIO_PinsSource, I2Cx_SCL_GPIO_MUX);
252
253 gpio_pin_mux_config(I2Cx_SDA_GPIO_PORT, I2Cx_SDA_GPIO_PinsSource, I2Cx_SDA_GPIO_MUX);
254
255 /* configure i2c pins: scl */
256 gpio_init_structure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
257 gpio_init_structure.gpio_mode = GPIO_MODE_MUX;
258 gpio_init_structure.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
259 gpio_init_structure.gpio_pull = GPIO_PULL_UP;
260
261 gpio_init_structure.gpio_pins = I2Cx_SCL_GPIO_PIN;
262 gpio_init(I2Cx_SCL_GPIO_PORT, &gpio_init_structure);
263
264 /* configure i2c pins: sda */
265 gpio_init_structure.gpio_pins = I2Cx_SDA_GPIO_PIN;
266 gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure);
267
268 /* configure and enable i2c interrupt */
269 nvic_irq_enable(I2Cx_EVT_IRQn, 0, 0);
270 nvic_irq_enable(I2Cx_ERR_IRQn, 0, 0);
271
272 /* configure and enable i2c dma channel interrupt */
273 nvic_irq_enable(I2Cx_DMA_TX_IRQn, 0, 0);
274 nvic_irq_enable(I2Cx_DMA_RX_IRQn, 0, 0);
275
276 /* i2c dma tx and rx channels configuration */
277 /* enable the dma clock */
278 crm_periph_clock_enable(I2Cx_DMA_CLK, TRUE);
279
280 /* i2c dma channel configuration */
281 dma_reset(hi2c->dma_tx_channel);
282 dma_reset(hi2c->dma_rx_channel);
283
284 hi2c->dma_tx_channel = I2Cx_DMA_TX_Channel;
285 hi2c->dma_rx_channel = I2Cx_DMA_RX_Channel;
286
287 hi2c->dma_init_struct.peripheral_base_addr = (uint32_t)&hi2c->i2cx->txdt;
288 hi2c->dma_init_struct.memory_base_addr = 0;
289 hi2c->dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
290 hi2c->dma_init_struct.buffer_size = 0xFFFF;
291 hi2c->dma_init_struct.peripheral_inc_enable = FALSE;
292 hi2c->dma_init_struct.memory_inc_enable = TRUE;
293 hi2c->dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
294 hi2c->dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
295 hi2c->dma_init_struct.loop_mode_enable = FALSE;
296 hi2c->dma_init_struct.priority = DMA_PRIORITY_LOW;
297
298 dma_init(hi2c->dma_tx_channel, &hi2c->dma_init_struct);
299 dma_init(hi2c->dma_rx_channel, &hi2c->dma_init_struct);
300
301 dmamux_init(I2Cx_DMA_TX_DMAMUX_Channel, I2Cx_DMA_TX_DMAREQ);
302 dmamux_init(I2Cx_DMA_RX_DMAMUX_Channel, I2Cx_DMA_RX_DMAREQ);
303
304 dmamux_enable(I2Cx_DMA, TRUE);
305
306 /* config i2c */
307 i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL);
308
309 i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS);
310 }
311}
312
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
rx_buf
uint8_t rx_buf[8]
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:82
I2Cx_DMA_TX_Channel
#define I2Cx_DMA_TX_Channel
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:65
I2Cx_DMA
#define I2Cx_DMA
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:50
I2Cx_DMA_TX_DMAMUX_Channel
#define I2Cx_DMA_TX_DMAMUX_Channel
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:66
tx_buf
uint8_t tx_buf[8]
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:81
I2Cx_ADDRESS
#define I2Cx_ADDRESS
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:46
I2Cx_SDA_GPIO_PIN
#define I2Cx_SDA_GPIO_PIN
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:60
I2Cx_DMA_RX_IRQn
#define I2Cx_DMA_RX_IRQn
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:73
I2Cx_SDA_GPIO_MUX
#define I2Cx_SDA_GPIO_MUX
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:63
I2Cx_CLKCTRL
#define I2Cx_CLKCTRL
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:43
I2Cx_CLK
#define I2Cx_CLK
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:49
I2Cx_SCL_GPIO_PinsSource
#define I2Cx_SCL_GPIO_PinsSource
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:55
I2Cx_DMA_RX_DMAREQ
#define I2Cx_DMA_RX_DMAREQ
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:72
BUF_SIZE
#define BUF_SIZE
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:78
I2Cx_DMA_RX_Channel
#define I2Cx_DMA_RX_Channel
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:70
hi2cx
i2c_handle_type hi2cx
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:84
I2Cx_SCL_GPIO_MUX
#define I2Cx_SCL_GPIO_MUX
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:57
I2Cx_SDA_GPIO_PORT
#define I2Cx_SDA_GPIO_PORT
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:62
I2Cx_SDA_GPIO_PinsSource
#define I2Cx_SDA_GPIO_PinsSource
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:61
I2Cx_DMA_CLK
#define I2Cx_DMA_CLK
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:51
I2Cx_SDA_GPIO_CLK
#define I2Cx_SDA_GPIO_CLK
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:59
I2Cx_ERR_IRQn
#define I2Cx_ERR_IRQn
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:76
error_handler
void error_handler(uint32_t error_code)
error handler program
Definition: project/at_start_f435/examples/i2c/communication_dma/src/main.c:91
I2Cx_DMA_RX_DMAMUX_Channel
#define I2Cx_DMA_RX_DMAMUX_Channel
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:71
I2Cx_PORT
#define I2Cx_PORT
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:48
I2Cx_SCL_GPIO_PIN
#define I2Cx_SCL_GPIO_PIN
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:54
I2Cx_SCL_GPIO_CLK
#define I2Cx_SCL_GPIO_CLK
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:53
I2Cx_DMA_TX_DMAREQ
#define I2Cx_DMA_TX_DMAREQ
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:67
I2Cx_DMA_TX_IRQn
#define I2Cx_DMA_TX_IRQn
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:68
I2Cx_EVT_IRQn
#define I2Cx_EVT_IRQn
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:75
I2Cx_SCL_GPIO_PORT
#define I2Cx_SCL_GPIO_PORT
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:56
I2C_TIMEOUT
#define I2C_TIMEOUT
Definition: project/at_start_f437/examples/i2c/communication_dma/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_BYTE
@ DMA_PERIPHERAL_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:162
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_MEMORY_DATA_WIDTH_BYTE
@ DMA_MEMORY_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:172
DMA_PRIORITY_LOW
@ DMA_PRIORITY_LOW
Definition: at32f435_437_dma.h:182
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
i2c_init
void i2c_init(i2c_type *i2c_x, uint8_t dfilters, uint32_t clk)
init i2c digit filters and clock control register.
Definition: at32f435_437_i2c.c:79
i2c_own_address1_set
void i2c_own_address1_set(i2c_type *i2c_x, i2c_address_mode_type mode, uint16_t address)
config i2c own address 1.
Definition: at32f435_437_i2c.c:103
I2C_ADDRESS_MODE_7BIT
@ I2C_ADDRESS_MODE_7BIT
Definition: at32f435_437_i2c.h:113
i2c_wait_end
i2c_status_type i2c_wait_end(i2c_handle_type *hi2c, uint32_t timeout)
wait for the transfer to end.
Definition: i2c_application.c:165
i2c_slave_transmit_dma
i2c_status_type i2c_slave_transmit_dma(i2c_handle_type *hi2c, uint8_t *pdata, uint16_t size, uint32_t timeout)
the slave transmits data through dma mode.
Definition: i2c_application.c:959
i2c_master_transmit_dma
i2c_status_type i2c_master_transmit_dma(i2c_handle_type *hi2c, uint16_t address, uint8_t *pdata, uint16_t size, uint32_t timeout)
the master transmits data through dma mode.
Definition: i2c_application.c:835
i2c_config
void i2c_config(i2c_handle_type *hi2c)
i2c peripheral initialization.
Definition: i2c_application.c:113
i2c_lowlevel_init
__WEAK void i2c_lowlevel_init(i2c_handle_type *hi2c)
initializes peripherals used by the i2c.
Definition: i2c_application.c:103
i2c_slave_receive_dma
i2c_status_type i2c_slave_receive_dma(i2c_handle_type *hi2c, uint8_t *pdata, uint16_t size, uint32_t timeout)
the slave receive data through dma mode.
Definition: i2c_application.c:875
i2c_master_receive_dma
i2c_status_type i2c_master_receive_dma(i2c_handle_type *hi2c, uint16_t address, uint8_t *pdata, uint16_t size, uint32_t timeout)
the master receive data through dma mode.
Definition: i2c_application.c:919
i2c_status_type
i2c_status_type
Definition: i2c_application.h:80
I2C_OK
@ I2C_OK
Definition: i2c_application.h:81
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
i2c_application.h
i2c application libray header file
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
i2c_handle_type
Definition: i2c_application.h:112
i2c_handle_type::dma_rx_channel
dma_channel_type * dma_rx_channel
Definition: i2c_application.h:121
i2c_handle_type::i2cx
i2c_type * i2cx
Definition: i2c_application.h:113
i2c_handle_type::dma_init_struct
dma_init_type dma_init_struct
Definition: i2c_application.h:122
i2c_handle_type::dma_tx_channel
dma_channel_type * dma_tx_channel
Definition: i2c_application.h:120
i2c_type::txdt
__IO uint32_t txdt
Definition: at32f435_437_i2c.h:400
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • i2c
  • communication_int
  • inc
project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • i2c
  • communication_int
  • inc
project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • i2c
  • communication_int
  • inc
project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • i2c
  • communication_int
  • src
Functions
project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • i2c
  • communication_int
  • src
project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • i2c
  • communication_int
  • src
Macros | Functions | Variables
project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "i2c_application.h"

Go to the source code of this file.

Macros

#define | I2Cx_EVT_IRQHandler I2C1_EVT_IRQHandler
#define | I2Cx_ERR_IRQHandler I2C1_ERR_IRQHandler

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | I2C1_EVT_IRQHandler (void)
this function handles i2c event interrupt request. More...
void | I2C1_ERR_IRQHandler (void)
this function handles i2c error interrupt request. More...

Variables

i2c_handle_type hi2cx

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • i2c
  • communication_int
  • src
project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "i2c_application.h"
30
39extern i2c_handle_type hi2cx;
40
41#define I2Cx_EVT_IRQHandler I2C1_EVT_IRQHandler
42#define I2Cx_ERR_IRQHandler I2C1_ERR_IRQHandler
43
49void NMI_Handler(void)
50{
51}
52
58void HardFault_Handler(void)
59{
60 /* go to infinite loop when hard fault exception occurs */
61 while(1)
62 {
63 }
64}
65
71void MemManage_Handler(void)
72{
73 /* go to infinite loop when memory manage exception occurs */
74 while(1)
75 {
76 }
77}
78
84void BusFault_Handler(void)
85{
86 /* go to infinite loop when bus fault exception occurs */
87 while(1)
88 {
89 }
90}
91
97void UsageFault_Handler(void)
98{
99 /* go to infinite loop when usage fault exception occurs */
100 while(1)
101 {
102 }
103}
104
110void SVC_Handler(void)
111{
112}
113
119void DebugMon_Handler(void)
120{
121}
122
128void PendSV_Handler(void)
129{
130}
131
137void SysTick_Handler(void)
138{
139}
140
146void I2Cx_EVT_IRQHandler(void)
147{
148 i2c_evt_irq_handler(&hi2cx);
149}
150
156void I2Cx_ERR_IRQHandler(void)
157{
158 i2c_err_irq_handler(&hi2cx);
159}
160
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
I2Cx_EVT_IRQHandler
#define I2Cx_EVT_IRQHandler
Definition: project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_int.c:41
hi2cx
i2c_handle_type hi2cx
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c:37
I2Cx_ERR_IRQHandler
#define I2Cx_ERR_IRQHandler
Definition: project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_int.c:42
i2c_evt_irq_handler
void i2c_evt_irq_handler(i2c_handle_type *hi2c)
interrupt procession function.
Definition: i2c_application.c:2140
i2c_err_irq_handler
void i2c_err_irq_handler(i2c_handle_type *hi2c)
dma reveive complete interrupt function.
Definition: i2c_application.c:2174
i2c_application.h
i2c application libray header file
i2c_handle_type
Definition: i2c_application.h:112
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • i2c
  • communication_int
  • src
Macros | Functions | Variables
project/at_start_f437/examples/i2c/communication_int/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "i2c_application.h"

Go to the source code of this file.

Macros

#define | I2C_TIMEOUT 0xFFFFFFF
#define | I2Cx_CLKCTRL 0x80504C4E
#define | I2Cx_ADDRESS 0xA0
#define | I2Cx_PORT I2C1
#define | I2Cx_CLK CRM_I2C1_PERIPH_CLOCK
#define | I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
#define | I2Cx_SCL_GPIO_PIN GPIO_PINS_6
#define | I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE6
#define | I2Cx_SCL_GPIO_PORT GPIOB
#define | I2Cx_SCL_GPIO_MUX GPIO_MUX_4
#define | I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
#define | I2Cx_SDA_GPIO_PIN GPIO_PINS_7
#define | I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE7
#define | I2Cx_SDA_GPIO_PORT GPIOB
#define | I2Cx_SDA_GPIO_MUX GPIO_MUX_4
#define | I2Cx_EVT_IRQn I2C1_EVT_IRQn
#define | I2Cx_ERR_IRQn I2C1_ERR_IRQn
#define | BUF_SIZE 8
#define | MASTER_BOARD

Functions

void | error_handler (uint32_t error_code)
error handler program More...
uint32_t | buffer_compare (uint8_t *buffer1, uint8_t *buffer2, uint32_t len)
compare whether the valus of buffer 1 and buffer 2 are equal. More...
int | main (void)
main function. More...
void | i2c_lowlevel_init (i2c_handle_type *hi2c)
initializes peripherals used by the i2c. More...

Variables

uint8_t | tx_buf [8] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08}
uint8_t | rx_buf [8] = {0}
i2c_handle_type hi2cx

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/communication_int/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • i2c
  • communication_int
  • src
project/at_start_f437/examples/i2c/communication_int/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "i2c_application.h"
30
39#define I2C_TIMEOUT 0xFFFFFFF
40
41//#define I2Cx_CLKCTRL 0xB170FFFF //10K
42//#define I2Cx_CLKCTRL 0xC0E06969 //50K
43#define I2Cx_CLKCTRL 0x80504C4E //100K
44//#define I2Cx_CLKCTRL 0x30F03C6B //200K
45
46#define I2Cx_ADDRESS 0xA0
47
48#define I2Cx_PORT I2C1
49#define I2Cx_CLK CRM_I2C1_PERIPH_CLOCK
50
51#define I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
52#define I2Cx_SCL_GPIO_PIN GPIO_PINS_6
53#define I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE6
54#define I2Cx_SCL_GPIO_PORT GPIOB
55#define I2Cx_SCL_GPIO_MUX GPIO_MUX_4
56
57#define I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
58#define I2Cx_SDA_GPIO_PIN GPIO_PINS_7
59#define I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE7
60#define I2Cx_SDA_GPIO_PORT GPIOB
61#define I2Cx_SDA_GPIO_MUX GPIO_MUX_4
62
63#define I2Cx_EVT_IRQn I2C1_EVT_IRQn
64#define I2Cx_ERR_IRQn I2C1_ERR_IRQn
65
66#define BUF_SIZE 8
67#define MASTER_BOARD
68
69uint8_t tx_buf[BUF_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08};
70uint8_t rx_buf[BUF_SIZE] = {0};
71
72 i2c_handle_type hi2cx;
73
79void error_handler(uint32_t error_code)
80{
81 while(1)
82 {
83 at32_led_toggle(LED2);
84 delay_ms(500);
85 }
86}
87
95uint32_t buffer_compare(uint8_t* buffer1, uint8_t* buffer2, uint32_t len)
96{
97 uint32_t i;
98
99 for(i = 0; i < len; i++)
100 {
101 if(buffer1[i] != buffer2[i])
102 {
103 return 1;
104 }
105 }
106
107 return 0;
108}
109
115int main(void)
116{
117 i2c_status_type i2c_status;
118
119 /* initial system clock */
120 system_clock_config();
121
122 /* config nvic priority group */
123 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
124
125 /* at board initial */
126 at32_board_init();
127
128 hi2cx.i2cx = I2Cx_PORT;
129
130 /* i2c config */
131 i2c_config(&hi2cx);
132
133 while(1)
134 {
135
136 #if defined (MASTER_BOARD)
137
138 /* wait for key USER_BUTTON press before starting the communication */
139 while(at32_button_press() != USER_BUTTON)
140 {
141 }
142
143 /* start the request reception process */
144 if((i2c_status = i2c_master_transmit_int(&hi2cx, I2Cx_ADDRESS, tx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
145 {
146 error_handler(i2c_status);
147 }
148
149 /* wait for the communication to end */
150 if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
151 {
152 error_handler(i2c_status);
153 }
154
155 delay_ms(10);
156
157 /* start the request reception process */
158 if((i2c_status = i2c_master_receive_int(&hi2cx, I2Cx_ADDRESS, rx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
159 {
160 error_handler(i2c_status);
161 }
162
163 /* wait for the communication to end */
164 if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
165 {
166 error_handler(i2c_status);
167 }
168
169 if(buffer_compare(tx_buf, rx_buf, BUF_SIZE) == 0)
170 {
171 at32_led_on(LED3);
172 }
173 else
174 {
175 error_handler(i2c_status);
176 }
177
178 #else
179
180 /* wait for key USER_BUTTON press before starting the communication */
181 while(at32_button_press() != USER_BUTTON)
182 {
183 }
184
185 /* start the transmission process */
186 if((i2c_status = i2c_slave_receive_int(&hi2cx, rx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
187 {
188 error_handler(i2c_status);
189 }
190
191 /* wait for the communication to end */
192 if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
193 {
194 error_handler(i2c_status);
195 }
196
197 if((i2c_status = i2c_slave_transmit_int(&hi2cx, tx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
198 {
199 error_handler(i2c_status);
200 }
201
202 /* wait for the communication to end */
203 if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
204 {
205 error_handler(i2c_status);
206 }
207
208 if(buffer_compare(tx_buf, rx_buf, BUF_SIZE) == 0)
209 {
210 at32_led_on(LED3);
211 }
212 else
213 {
214 error_handler(i2c_status);
215 }
216 #endif
217
218 }
219}
220
226void i2c_lowlevel_init(i2c_handle_type* hi2c)
227{
228 gpio_init_type gpio_init_structure;
229
230 if(hi2c->i2cx == I2Cx_PORT)
231 {
232 /* i2c periph clock enable */
233 crm_periph_clock_enable(I2Cx_CLK, TRUE);
234 crm_periph_clock_enable(I2Cx_SCL_GPIO_CLK, TRUE);
235 crm_periph_clock_enable(I2Cx_SDA_GPIO_CLK, TRUE);
236
237 /* gpio configuration */
238 gpio_pin_mux_config(I2Cx_SCL_GPIO_PORT, I2Cx_SCL_GPIO_PinsSource, I2Cx_SCL_GPIO_MUX);
239
240 gpio_pin_mux_config(I2Cx_SDA_GPIO_PORT, I2Cx_SDA_GPIO_PinsSource, I2Cx_SDA_GPIO_MUX);
241
242 /* configure i2c pins: scl */
243 gpio_init_structure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
244 gpio_init_structure.gpio_mode = GPIO_MODE_MUX;
245 gpio_init_structure.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
246 gpio_init_structure.gpio_pull = GPIO_PULL_UP;
247
248 gpio_init_structure.gpio_pins = I2Cx_SCL_GPIO_PIN;
249 gpio_init(I2Cx_SCL_GPIO_PORT, &gpio_init_structure);
250
251 /* configure i2c pins: sda */
252 gpio_init_structure.gpio_pins = I2Cx_SDA_GPIO_PIN;
253 gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure);
254
255 /* configure and enable i2c interrupt */
256 nvic_irq_enable(I2Cx_EVT_IRQn, 0, 0);
257 nvic_irq_enable(I2Cx_ERR_IRQn, 0, 0);
258
259 /* config i2c */
260 i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL);
261
262 i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS);
263 }
264}
265
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
error_handler
void error_handler(uint32_t error_code)
error handler program
Definition: project/at_start_f435/examples/i2c/communication_dma/src/main.c:91
rx_buf
uint8_t rx_buf[8]
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:70
tx_buf
uint8_t tx_buf[8]
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:69
I2Cx_ADDRESS
#define I2Cx_ADDRESS
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:46
I2Cx_SDA_GPIO_PIN
#define I2Cx_SDA_GPIO_PIN
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:58
I2Cx_SDA_GPIO_MUX
#define I2Cx_SDA_GPIO_MUX
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:61
I2Cx_CLKCTRL
#define I2Cx_CLKCTRL
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:43
I2Cx_CLK
#define I2Cx_CLK
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:49
I2Cx_SCL_GPIO_PinsSource
#define I2Cx_SCL_GPIO_PinsSource
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:53
BUF_SIZE
#define BUF_SIZE
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:66
hi2cx
i2c_handle_type hi2cx
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:72
I2Cx_SCL_GPIO_MUX
#define I2Cx_SCL_GPIO_MUX
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:55
I2Cx_SDA_GPIO_PORT
#define I2Cx_SDA_GPIO_PORT
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:60
I2Cx_SDA_GPIO_PinsSource
#define I2Cx_SDA_GPIO_PinsSource
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:59
I2Cx_SDA_GPIO_CLK
#define I2Cx_SDA_GPIO_CLK
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:57
I2Cx_ERR_IRQn
#define I2Cx_ERR_IRQn
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:64
I2Cx_PORT
#define I2Cx_PORT
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:48
I2Cx_SCL_GPIO_PIN
#define I2Cx_SCL_GPIO_PIN
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:52
I2Cx_SCL_GPIO_CLK
#define I2Cx_SCL_GPIO_CLK
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:51
I2Cx_EVT_IRQn
#define I2Cx_EVT_IRQn
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:63
I2Cx_SCL_GPIO_PORT
#define I2Cx_SCL_GPIO_PORT
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:54
I2C_TIMEOUT
#define I2C_TIMEOUT
Definition: project/at_start_f437/examples/i2c/communication_int/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
i2c_init
void i2c_init(i2c_type *i2c_x, uint8_t dfilters, uint32_t clk)
init i2c digit filters and clock control register.
Definition: at32f435_437_i2c.c:79
i2c_own_address1_set
void i2c_own_address1_set(i2c_type *i2c_x, i2c_address_mode_type mode, uint16_t address)
config i2c own address 1.
Definition: at32f435_437_i2c.c:103
I2C_ADDRESS_MODE_7BIT
@ I2C_ADDRESS_MODE_7BIT
Definition: at32f435_437_i2c.h:113
i2c_wait_end
i2c_status_type i2c_wait_end(i2c_handle_type *hi2c, uint32_t timeout)
wait for the transfer to end.
Definition: i2c_application.c:165
i2c_slave_transmit_int
i2c_status_type i2c_slave_transmit_int(i2c_handle_type *hi2c, uint8_t *pdata, uint16_t size, uint32_t timeout)
the slave transmits data through interrupt mode.
Definition: i2c_application.c:798
i2c_master_receive_int
i2c_status_type i2c_master_receive_int(i2c_handle_type *hi2c, uint16_t address, uint8_t *pdata, uint16_t size, uint32_t timeout)
the master receive data through interrupt mode.
Definition: i2c_application.c:764
i2c_config
void i2c_config(i2c_handle_type *hi2c)
i2c peripheral initialization.
Definition: i2c_application.c:113
i2c_lowlevel_init
__WEAK void i2c_lowlevel_init(i2c_handle_type *hi2c)
initializes peripherals used by the i2c.
Definition: i2c_application.c:103
i2c_master_transmit_int
i2c_status_type i2c_master_transmit_int(i2c_handle_type *hi2c, uint16_t address, uint8_t *pdata, uint16_t size, uint32_t timeout)
the master transmits data through interrupt mode.
Definition: i2c_application.c:695
i2c_slave_receive_int
i2c_status_type i2c_slave_receive_int(i2c_handle_type *hi2c, uint8_t *pdata, uint16_t size, uint32_t timeout)
the slave receive data through interrupt mode.
Definition: i2c_application.c:729
i2c_status_type
i2c_status_type
Definition: i2c_application.h:80
I2C_OK
@ I2C_OK
Definition: i2c_application.h:81
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
i2c_application.h
i2c application libray header file
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
i2c_handle_type
Definition: i2c_application.h:112
i2c_handle_type::i2cx
i2c_type * i2cx
Definition: i2c_application.h:113
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • i2c
  • communication_poll
  • inc
project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • i2c
  • communication_poll
  • inc
project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • i2c
  • communication_poll
  • inc
project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • i2c
  • communication_poll
  • src
Functions
project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • i2c
  • communication_poll
  • src
project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • i2c
  • communication_poll
  • src
Functions
project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "i2c_application.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • i2c
  • communication_poll
  • src
project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "i2c_application.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
i2c_application.h
i2c application libray header file
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • i2c
  • communication_poll
  • src
Macros | Functions | Variables
project/at_start_f437/examples/i2c/communication_poll/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "i2c_application.h"

Go to the source code of this file.

Macros

#define | I2C_TIMEOUT 0xFFFFFFF
#define | I2Cx_CLKCTRL 0x80504C4E
#define | I2Cx_ADDRESS 0xA0
#define | I2Cx_PORT I2C1
#define | I2Cx_CLK CRM_I2C1_PERIPH_CLOCK
#define | I2Cx_DMA DMA1
#define | I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK
#define | I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
#define | I2Cx_SCL_GPIO_PIN GPIO_PINS_6
#define | I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE6
#define | I2Cx_SCL_GPIO_PORT GPIOB
#define | I2Cx_SCL_GPIO_MUX GPIO_MUX_4
#define | I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
#define | I2Cx_SDA_GPIO_PIN GPIO_PINS_7
#define | I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE7
#define | I2Cx_SDA_GPIO_PORT GPIOB
#define | I2Cx_SDA_GPIO_MUX GPIO_MUX_4
#define | BUF_SIZE 8
#define | MASTER_BOARD

Functions

void | error_handler (uint32_t error_code)
error handler program More...
uint32_t | buffer_compare (uint8_t *buffer1, uint8_t *buffer2, uint32_t len)
compare whether the valus of buffer 1 and buffer 2 are equal. More...
int | main (void)
main function. More...
void | i2c_lowlevel_init (i2c_handle_type *hi2c)
initializes peripherals used by the i2c. More...

Variables

uint8_t | tx_buf [8] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08}
uint8_t | rx_buf [8] = {0}
i2c_handle_type hi2cx

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/communication_poll/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • i2c
  • communication_poll
  • src
project/at_start_f437/examples/i2c/communication_poll/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "i2c_application.h"
30
39#define I2C_TIMEOUT 0xFFFFFFF
40
41//#define I2Cx_CLKCTRL 0xB170FFFF //10K
42//#define I2Cx_CLKCTRL 0xC0E06969 //50K
43#define I2Cx_CLKCTRL 0x80504C4E //100K
44//#define I2Cx_CLKCTRL 0x30F03C6B //200K
45
46#define I2Cx_ADDRESS 0xA0
47
48#define I2Cx_PORT I2C1
49#define I2Cx_CLK CRM_I2C1_PERIPH_CLOCK
50#define I2Cx_DMA DMA1
51#define I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK
52
53#define I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
54#define I2Cx_SCL_GPIO_PIN GPIO_PINS_6
55#define I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE6
56#define I2Cx_SCL_GPIO_PORT GPIOB
57#define I2Cx_SCL_GPIO_MUX GPIO_MUX_4
58
59#define I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
60#define I2Cx_SDA_GPIO_PIN GPIO_PINS_7
61#define I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE7
62#define I2Cx_SDA_GPIO_PORT GPIOB
63#define I2Cx_SDA_GPIO_MUX GPIO_MUX_4
64
65#define BUF_SIZE 8
66#define MASTER_BOARD
67
68uint8_t tx_buf[BUF_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08};
69uint8_t rx_buf[BUF_SIZE] = {0};
70
71 i2c_handle_type hi2cx;
72
78void error_handler(uint32_t error_code)
79{
80 while(1)
81 {
82 at32_led_toggle(LED2);
83 delay_ms(500);
84 }
85}
86
94uint32_t buffer_compare(uint8_t* buffer1, uint8_t* buffer2, uint32_t len)
95{
96 uint32_t i;
97
98 for(i = 0; i < len; i++)
99 {
100 if(buffer1[i] != buffer2[i])
101 {
102 return 1;
103 }
104 }
105
106 return 0;
107}
108
114int main(void)
115{
116 i2c_status_type i2c_status;
117
118 /* initial system clock */
119 system_clock_config();
120
121 /* config nvic priority group */
122 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
123
124 /* at board initial */
125 at32_board_init();
126
127 hi2cx.i2cx = I2Cx_PORT;
128
129 /* i2c config */
130 i2c_config(&hi2cx);
131
132 while(1)
133 {
134
135 #if defined (MASTER_BOARD)
136
137 /* wait for key USER_BUTTON press before starting the communication */
138 while(at32_button_press() != USER_BUTTON)
139 {
140 }
141
142 /* start the request reception process */
143 if((i2c_status = i2c_master_transmit(&hi2cx, I2Cx_ADDRESS, tx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
144 {
145 error_handler(i2c_status);
146 }
147
148 delay_ms(10);
149
150 /* start the request reception process */
151 if((i2c_status = i2c_master_receive(&hi2cx, I2Cx_ADDRESS, rx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
152 {
153 error_handler(i2c_status);
154 }
155
156 if(buffer_compare(tx_buf, rx_buf, BUF_SIZE) == 0)
157 {
158 at32_led_on(LED3);
159 }
160 else
161 {
162 error_handler(i2c_status);
163 }
164 #else
165
166 /* wait for key USER_BUTTON press before starting the communication */
167 while(at32_button_press() != USER_BUTTON)
168 {
169 }
170
171 /* start the transmission process */
172 if((i2c_status = i2c_slave_receive(&hi2cx, rx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
173 {
174 error_handler(i2c_status);
175 }
176
177 if((i2c_status = i2c_slave_transmit(&hi2cx, tx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
178 {
179 error_handler(i2c_status);
180 }
181
182 if(buffer_compare(tx_buf, rx_buf, BUF_SIZE) == 0)
183 {
184 at32_led_on(LED3);
185 }
186 else
187 {
188 error_handler(i2c_status);
189 }
190 #endif
191
192 }
193}
194
200void i2c_lowlevel_init(i2c_handle_type* hi2c)
201{
202 gpio_init_type gpio_init_structure;
203
204 if(hi2c->i2cx == I2Cx_PORT)
205 {
206 /* i2c periph clock enable */
207 crm_periph_clock_enable(I2Cx_CLK, TRUE);
208 crm_periph_clock_enable(I2Cx_SCL_GPIO_CLK, TRUE);
209 crm_periph_clock_enable(I2Cx_SDA_GPIO_CLK, TRUE);
210
211 /* gpio configuration */
212 gpio_pin_mux_config(I2Cx_SCL_GPIO_PORT, I2Cx_SCL_GPIO_PinsSource, I2Cx_SCL_GPIO_MUX);
213
214 gpio_pin_mux_config(I2Cx_SDA_GPIO_PORT, I2Cx_SDA_GPIO_PinsSource, I2Cx_SDA_GPIO_MUX);
215
216 /* configure i2c pins: scl */
217 gpio_init_structure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
218 gpio_init_structure.gpio_mode = GPIO_MODE_MUX;
219 gpio_init_structure.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
220 gpio_init_structure.gpio_pull = GPIO_PULL_UP;
221
222 gpio_init_structure.gpio_pins = I2Cx_SCL_GPIO_PIN;
223 gpio_init(I2Cx_SCL_GPIO_PORT, &gpio_init_structure);
224
225 /* configure i2c pins: sda */
226 gpio_init_structure.gpio_pins = I2Cx_SDA_GPIO_PIN;
227 gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure);
228
229 /* config i2c */
230 i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL);
231
232 i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS);
233 }
234}
235
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
error_handler
void error_handler(uint32_t error_code)
error handler program
Definition: project/at_start_f435/examples/i2c/communication_dma/src/main.c:91
rx_buf
uint8_t rx_buf[8]
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:69
tx_buf
uint8_t tx_buf[8]
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:68
I2Cx_ADDRESS
#define I2Cx_ADDRESS
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:46
I2Cx_SDA_GPIO_PIN
#define I2Cx_SDA_GPIO_PIN
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:60
I2Cx_SDA_GPIO_MUX
#define I2Cx_SDA_GPIO_MUX
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:63
I2Cx_CLKCTRL
#define I2Cx_CLKCTRL
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:43
I2Cx_CLK
#define I2Cx_CLK
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:49
I2Cx_SCL_GPIO_PinsSource
#define I2Cx_SCL_GPIO_PinsSource
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:55
BUF_SIZE
#define BUF_SIZE
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:65
hi2cx
i2c_handle_type hi2cx
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:71
I2Cx_SCL_GPIO_MUX
#define I2Cx_SCL_GPIO_MUX
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:57
I2Cx_SDA_GPIO_PORT
#define I2Cx_SDA_GPIO_PORT
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:62
I2Cx_SDA_GPIO_PinsSource
#define I2Cx_SDA_GPIO_PinsSource
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:61
I2Cx_SDA_GPIO_CLK
#define I2Cx_SDA_GPIO_CLK
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:59
I2Cx_PORT
#define I2Cx_PORT
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:48
I2Cx_SCL_GPIO_PIN
#define I2Cx_SCL_GPIO_PIN
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:54
I2Cx_SCL_GPIO_CLK
#define I2Cx_SCL_GPIO_CLK
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:53
I2Cx_SCL_GPIO_PORT
#define I2Cx_SCL_GPIO_PORT
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:56
I2C_TIMEOUT
#define I2C_TIMEOUT
Definition: project/at_start_f437/examples/i2c/communication_poll/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
i2c_init
void i2c_init(i2c_type *i2c_x, uint8_t dfilters, uint32_t clk)
init i2c digit filters and clock control register.
Definition: at32f435_437_i2c.c:79
i2c_own_address1_set
void i2c_own_address1_set(i2c_type *i2c_x, i2c_address_mode_type mode, uint16_t address)
config i2c own address 1.
Definition: at32f435_437_i2c.c:103
I2C_ADDRESS_MODE_7BIT
@ I2C_ADDRESS_MODE_7BIT
Definition: at32f435_437_i2c.h:113
i2c_slave_receive
i2c_status_type i2c_slave_receive(i2c_handle_type *hi2c, uint8_t *pdata, uint16_t size, uint32_t timeout)
the slave receive data through polling mode.
Definition: i2c_application.c:441
i2c_config
void i2c_config(i2c_handle_type *hi2c)
i2c peripheral initialization.
Definition: i2c_application.c:113
i2c_lowlevel_init
__WEAK void i2c_lowlevel_init(i2c_handle_type *hi2c)
initializes peripherals used by the i2c.
Definition: i2c_application.c:103
i2c_master_receive
i2c_status_type i2c_master_receive(i2c_handle_type *hi2c, uint16_t address, uint8_t *pdata, uint16_t size, uint32_t timeout)
the master receive data through polling mode.
Definition: i2c_application.c:524
i2c_master_transmit
i2c_status_type i2c_master_transmit(i2c_handle_type *hi2c, uint16_t address, uint8_t *pdata, uint16_t size, uint32_t timeout)
the master transmits data through polling mode.
Definition: i2c_application.c:375
i2c_slave_transmit
i2c_status_type i2c_slave_transmit(i2c_handle_type *hi2c, uint8_t *pdata, uint16_t size, uint32_t timeout)
the slave transmits data through polling mode.
Definition: i2c_application.c:590
i2c_status_type
i2c_status_type
Definition: i2c_application.h:80
I2C_OK
@ I2C_OK
Definition: i2c_application.h:81
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
i2c_application.h
i2c application libray header file
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
i2c_handle_type
Definition: i2c_application.h:112
i2c_handle_type::i2cx
i2c_type * i2cx
Definition: i2c_application.h:113
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • i2c
  • communication_smbus
  • inc
project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • i2c
  • communication_smbus
  • inc
project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • i2c
  • communication_smbus
  • inc
project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • i2c
  • communication_smbus
  • src
Functions
project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • i2c
  • communication_smbus
  • src
project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • i2c
  • communication_smbus
  • src
Functions
project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "i2c_application.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • i2c
  • communication_smbus
  • src
project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "i2c_application.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
i2c_application.h
i2c application libray header file
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • i2c
  • communication_smbus
  • src
Macros | Functions | Variables
project/at_start_f437/examples/i2c/communication_smbus/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "i2c_application.h"

Go to the source code of this file.

Macros

#define | I2C_TIMEOUT 0xFFFFFFF
#define | I2Cx_CLKCTRL 0x80504C4E
#define | I2Cx_ADDRESS 0xA2
#define | I2Cx_PORT I2C1
#define | I2Cx_CLK CRM_I2C1_PERIPH_CLOCK
#define | I2Cx_DMA DMA1
#define | I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK
#define | I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
#define | I2Cx_SCL_GPIO_PIN GPIO_PINS_6
#define | I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE6
#define | I2Cx_SCL_GPIO_PORT GPIOB
#define | I2Cx_SCL_GPIO_MUX GPIO_MUX_4
#define | I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
#define | I2Cx_SDA_GPIO_PIN GPIO_PINS_7
#define | I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE7
#define | I2Cx_SDA_GPIO_PORT GPIOB
#define | I2Cx_SDA_GPIO_MUX GPIO_MUX_4
#define | BUF_SIZE 9
#define | MASTER_BOARD

Functions

void | error_handler (uint32_t error_code)
error handler program More...
uint32_t | buffer_compare (uint8_t *buffer1, uint8_t *buffer2, uint32_t len)
compare whether the valus of buffer 1 and buffer 2 are equal. More...
int | main (void)
main function. More...
void | i2c_lowlevel_init (i2c_handle_type *hi2c)
initializes peripherals used by the i2c. More...

Variables

uint8_t | tx_buf [9] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x00}
uint8_t | rx_buf [9] = {0}
i2c_handle_type hi2cx

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/communication_smbus/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • i2c
  • communication_smbus
  • src
project/at_start_f437/examples/i2c/communication_smbus/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "i2c_application.h"
30
39#define I2C_TIMEOUT 0xFFFFFFF
40
41//#define I2Cx_CLKCTRL 0xB170FFFF //10K
42//#define I2Cx_CLKCTRL 0xC0E06969 //50K
43#define I2Cx_CLKCTRL 0x80504C4E //100K
44//#define I2Cx_CLKCTRL 0x30F03C6B //200K
45
46#define I2Cx_ADDRESS 0xA2
47
48#define I2Cx_PORT I2C1
49#define I2Cx_CLK CRM_I2C1_PERIPH_CLOCK
50#define I2Cx_DMA DMA1
51#define I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK
52
53#define I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
54#define I2Cx_SCL_GPIO_PIN GPIO_PINS_6
55#define I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE6
56#define I2Cx_SCL_GPIO_PORT GPIOB
57#define I2Cx_SCL_GPIO_MUX GPIO_MUX_4
58
59#define I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
60#define I2Cx_SDA_GPIO_PIN GPIO_PINS_7
61#define I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE7
62#define I2Cx_SDA_GPIO_PORT GPIOB
63#define I2Cx_SDA_GPIO_MUX GPIO_MUX_4
64
65#define BUF_SIZE 9
66#define MASTER_BOARD
67
68uint8_t tx_buf[BUF_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x00};
69uint8_t rx_buf[BUF_SIZE] = {0};
70
71 i2c_handle_type hi2cx;
72
78void error_handler(uint32_t error_code)
79{
80 while(1)
81 {
82 at32_led_toggle(LED2);
83 delay_ms(500);
84 }
85}
86
94uint32_t buffer_compare(uint8_t* buffer1, uint8_t* buffer2, uint32_t len)
95{
96 uint32_t i;
97
98 for(i = 0; i < len; i++)
99 {
100 if(buffer1[i] != buffer2[i])
101 {
102 return 1;
103 }
104 }
105
106 return 0;
107}
108
114int main(void)
115{
116 i2c_status_type i2c_status;
117
118 /* initial system clock */
119 system_clock_config();
120
121 /* config nvic priority group */
122 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
123
124 /* at board initial */
125 at32_board_init();
126
127 hi2cx.i2cx = I2Cx_PORT;
128
129 /* i2c config */
130 i2c_config(&hi2cx);
131
132 while(1)
133 {
134
135 #if defined (MASTER_BOARD)
136
137 /* wait for key USER_BUTTON press before starting the communication */
138 while(at32_button_press() != USER_BUTTON)
139 {
140 }
141
142 /* start the request reception process */
143 if((i2c_status = i2c_smbus_master_transmit(&hi2cx, I2Cx_ADDRESS, tx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
144 {
145 error_handler(i2c_status);
146 }
147
148 delay_ms(10);
149
150 /* start the request reception process */
151 if((i2c_status = i2c_smbus_master_receive(&hi2cx, I2Cx_ADDRESS, rx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
152 {
153 error_handler(i2c_status);
154 }
155
156 if(buffer_compare(tx_buf, rx_buf, BUF_SIZE - 1) == 0)
157 {
158 at32_led_on(LED3);
159 }
160 else
161 {
162 error_handler(i2c_status);
163 }
164 #else
165
166 /* wait for key USER_BUTTON press before starting the communication */
167 while(at32_button_press() != USER_BUTTON)
168 {
169 }
170
171 /* start the transmission process */
172 if((i2c_status = i2c_smbus_slave_receive(&hi2cx, rx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
173 {
174 error_handler(i2c_status);
175 }
176
177 if((i2c_status = i2c_smbus_slave_transmit(&hi2cx, tx_buf, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
178 {
179 error_handler(i2c_status);
180 }
181
182 if(buffer_compare(tx_buf, rx_buf, BUF_SIZE - 1) == 0)
183 {
184 at32_led_on(LED3);
185 }
186 else
187 {
188 error_handler(i2c_status);
189 }
190 #endif
191
192 }
193}
194
200void i2c_lowlevel_init(i2c_handle_type* hi2c)
201{
202 gpio_init_type gpio_init_structure;
203
204 if(hi2c->i2cx == I2Cx_PORT)
205 {
206 /* i2c periph clock enable */
207 crm_periph_clock_enable(I2Cx_CLK, TRUE);
208 crm_periph_clock_enable(I2Cx_SCL_GPIO_CLK, TRUE);
209 crm_periph_clock_enable(I2Cx_SDA_GPIO_CLK, TRUE);
210
211 /* gpio configuration */
212 gpio_pin_mux_config(I2Cx_SCL_GPIO_PORT, I2Cx_SCL_GPIO_PinsSource, I2Cx_SCL_GPIO_MUX);
213
214 gpio_pin_mux_config(I2Cx_SDA_GPIO_PORT, I2Cx_SDA_GPIO_PinsSource, I2Cx_SDA_GPIO_MUX);
215
216 /* configure i2c pins: scl */
217 gpio_init_structure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
218 gpio_init_structure.gpio_mode = GPIO_MODE_MUX;
219 gpio_init_structure.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
220 gpio_init_structure.gpio_pull = GPIO_PULL_UP;
221
222 gpio_init_structure.gpio_pins = I2Cx_SCL_GPIO_PIN;
223 gpio_init(I2Cx_SCL_GPIO_PORT, &gpio_init_structure);
224
225 /* configure i2c pins: sda */
226 gpio_init_structure.gpio_pins = I2Cx_SDA_GPIO_PIN;
227 gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure);
228
229 /* config i2c */
230 i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL);
231
232 i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS);
233 }
234}
235
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
error_handler
void error_handler(uint32_t error_code)
error handler program
Definition: project/at_start_f435/examples/i2c/communication_dma/src/main.c:91
I2Cx_ADDRESS
#define I2Cx_ADDRESS
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:46
I2Cx_SDA_GPIO_PIN
#define I2Cx_SDA_GPIO_PIN
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:60
I2Cx_SDA_GPIO_MUX
#define I2Cx_SDA_GPIO_MUX
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:63
I2Cx_CLKCTRL
#define I2Cx_CLKCTRL
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:43
I2Cx_CLK
#define I2Cx_CLK
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:49
I2Cx_SCL_GPIO_PinsSource
#define I2Cx_SCL_GPIO_PinsSource
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:55
BUF_SIZE
#define BUF_SIZE
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:65
rx_buf
uint8_t rx_buf[9]
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:69
hi2cx
i2c_handle_type hi2cx
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:71
I2Cx_SCL_GPIO_MUX
#define I2Cx_SCL_GPIO_MUX
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:57
I2Cx_SDA_GPIO_PORT
#define I2Cx_SDA_GPIO_PORT
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:62
I2Cx_SDA_GPIO_PinsSource
#define I2Cx_SDA_GPIO_PinsSource
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:61
I2Cx_SDA_GPIO_CLK
#define I2Cx_SDA_GPIO_CLK
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:59
I2Cx_PORT
#define I2Cx_PORT
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:48
I2Cx_SCL_GPIO_PIN
#define I2Cx_SCL_GPIO_PIN
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:54
I2Cx_SCL_GPIO_CLK
#define I2Cx_SCL_GPIO_CLK
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:53
tx_buf
uint8_t tx_buf[9]
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:68
I2Cx_SCL_GPIO_PORT
#define I2Cx_SCL_GPIO_PORT
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:56
I2C_TIMEOUT
#define I2C_TIMEOUT
Definition: project/at_start_f437/examples/i2c/communication_smbus/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
i2c_init
void i2c_init(i2c_type *i2c_x, uint8_t dfilters, uint32_t clk)
init i2c digit filters and clock control register.
Definition: at32f435_437_i2c.c:79
i2c_own_address1_set
void i2c_own_address1_set(i2c_type *i2c_x, i2c_address_mode_type mode, uint16_t address)
config i2c own address 1.
Definition: at32f435_437_i2c.c:103
I2C_ADDRESS_MODE_7BIT
@ I2C_ADDRESS_MODE_7BIT
Definition: at32f435_437_i2c.h:113
i2c_smbus_slave_receive
i2c_status_type i2c_smbus_slave_receive(i2c_handle_type *hi2c, uint8_t *pdata, uint16_t size, uint32_t timeout)
the slave receive data through SMBus mode.
Definition: i2c_application.c:1464
i2c_smbus_master_transmit
i2c_status_type i2c_smbus_master_transmit(i2c_handle_type *hi2c, uint16_t address, uint8_t *pdata, uint16_t size, uint32_t timeout)
the master transmits data through SMBus mode.
Definition: i2c_application.c:1390
i2c_smbus_slave_transmit
i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type *hi2c, uint8_t *pdata, uint16_t size, uint32_t timeout)
the slave transmits data through SMBus mode.
Definition: i2c_application.c:1628
i2c_config
void i2c_config(i2c_handle_type *hi2c)
i2c peripheral initialization.
Definition: i2c_application.c:113
i2c_lowlevel_init
__WEAK void i2c_lowlevel_init(i2c_handle_type *hi2c)
initializes peripherals used by the i2c.
Definition: i2c_application.c:103
i2c_smbus_master_receive
i2c_status_type i2c_smbus_master_receive(i2c_handle_type *hi2c, uint16_t address, uint8_t *pdata, uint16_t size, uint32_t timeout)
the master receive data through SMBus mode.
Definition: i2c_application.c:1556
i2c_status_type
i2c_status_type
Definition: i2c_application.h:80
I2C_OK
@ I2C_OK
Definition: i2c_application.h:81
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
i2c_application.h
i2c application libray header file
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
i2c_handle_type
Definition: i2c_application.h:112
i2c_handle_type::i2cx
i2c_type * i2cx
Definition: i2c_application.h:113
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • i2c
  • eeprom
  • inc
project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • i2c
  • eeprom
  • inc
project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • i2c
  • eeprom
  • inc
project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • i2c
  • eeprom
  • src
Functions
project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • i2c
  • eeprom
  • src
project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • i2c
  • eeprom
  • src
Macros | Functions | Variables
project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "i2c_application.h"

Go to the source code of this file.

Macros

#define | I2Cx_DMA_TX_IRQHandler DMA1_Channel1_IRQHandler
#define | I2Cx_DMA_RX_IRQHandler DMA1_Channel2_IRQHandler
#define | I2Cx_EVT_IRQHandler I2C2_EVT_IRQHandler
#define | I2Cx_ERR_IRQHandler I2C2_ERR_IRQHandler

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel2_IRQHandler (void)
this function handles dma interrupt request. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma interrupt request. More...
void | I2C2_EVT_IRQHandler (void)
this function handles i2c event interrupt request. More...
void | I2C2_ERR_IRQHandler (void)
this function handles i2c error interrupt request. More...

Variables

i2c_handle_type hi2cx

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • i2c
  • eeprom
  • src
project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "i2c_application.h"
30
39extern i2c_handle_type hi2cx;
40
41#define I2Cx_DMA_TX_IRQHandler DMA1_Channel1_IRQHandler
42#define I2Cx_DMA_RX_IRQHandler DMA1_Channel2_IRQHandler
43#define I2Cx_EVT_IRQHandler I2C2_EVT_IRQHandler
44#define I2Cx_ERR_IRQHandler I2C2_ERR_IRQHandler
45
51void NMI_Handler(void)
52{
53}
54
60void HardFault_Handler(void)
61{
62 /* go to infinite loop when hard fault exception occurs */
63 while(1)
64 {
65 }
66}
67
73void MemManage_Handler(void)
74{
75 /* go to infinite loop when memory manage exception occurs */
76 while(1)
77 {
78 }
79}
80
86void BusFault_Handler(void)
87{
88 /* go to infinite loop when bus fault exception occurs */
89 while(1)
90 {
91 }
92}
93
99void UsageFault_Handler(void)
100{
101 /* go to infinite loop when usage fault exception occurs */
102 while(1)
103 {
104 }
105}
106
112void SVC_Handler(void)
113{
114}
115
121void DebugMon_Handler(void)
122{
123}
124
130void PendSV_Handler(void)
131{
132}
133
139void SysTick_Handler(void)
140{
141}
142
148void I2Cx_DMA_RX_IRQHandler(void)
149{
150 i2c_dma_rx_irq_handler(&hi2cx);
151}
152
158void I2Cx_DMA_TX_IRQHandler(void)
159{
160 i2c_dma_tx_irq_handler(&hi2cx);
161}
162
168void I2Cx_EVT_IRQHandler(void)
169{
170 i2c_evt_irq_handler(&hi2cx);
171}
172
178void I2Cx_ERR_IRQHandler(void)
179{
180 i2c_err_irq_handler(&hi2cx);
181}
182
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
I2Cx_EVT_IRQHandler
#define I2Cx_EVT_IRQHandler
Definition: project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_int.c:43
hi2cx
i2c_handle_type hi2cx
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c:37
I2Cx_ERR_IRQHandler
#define I2Cx_ERR_IRQHandler
Definition: project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_int.c:44
I2Cx_DMA_TX_IRQHandler
#define I2Cx_DMA_TX_IRQHandler
Definition: project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_int.c:41
I2Cx_DMA_RX_IRQHandler
#define I2Cx_DMA_RX_IRQHandler
Definition: project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_int.c:42
i2c_evt_irq_handler
void i2c_evt_irq_handler(i2c_handle_type *hi2c)
interrupt procession function.
Definition: i2c_application.c:2140
i2c_err_irq_handler
void i2c_err_irq_handler(i2c_handle_type *hi2c)
dma reveive complete interrupt function.
Definition: i2c_application.c:2174
i2c_dma_rx_irq_handler
void i2c_dma_rx_irq_handler(i2c_handle_type *hi2c)
dma reveive complete interrupt function.
Definition: i2c_application.c:2130
i2c_dma_tx_irq_handler
void i2c_dma_tx_irq_handler(i2c_handle_type *hi2c)
dma transmission complete interrupt function.
Definition: i2c_application.c:2120
i2c_application.h
i2c application libray header file
i2c_handle_type
Definition: i2c_application.h:112
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • i2c
  • eeprom
  • src
Macros | Functions | Variables
project/at_start_f437/examples/i2c/eeprom/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "i2c_application.h"

Go to the source code of this file.

Macros

#define | I2C_TIMEOUT 0xFFFFFFF
#define | I2Cx_CLKCTRL 0x80504C4E
#define | I2Cx_ADDRESS 0xA0
#define | I2Cx_PORT I2C2
#define | I2Cx_CLK CRM_I2C2_PERIPH_CLOCK
#define | I2Cx_DMA DMA1
#define | I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK
#define | I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
#define | I2Cx_SCL_GPIO_PIN GPIO_PINS_10
#define | I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE10
#define | I2Cx_SCL_GPIO_PORT GPIOB
#define | I2Cx_SCL_GPIO_MUX GPIO_MUX_4
#define | I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
#define | I2Cx_SDA_GPIO_PIN GPIO_PINS_11
#define | I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE11
#define | I2Cx_SDA_GPIO_PORT GPIOB
#define | I2Cx_SDA_GPIO_MUX GPIO_MUX_4
#define | I2Cx_DMA_TX_Channel DMA1_CHANNEL1
#define | I2Cx_DMA_TX_DMAMUX_Channel DMA1MUX_CHANNEL1
#define | I2Cx_DMA_TX_DMAREQ DMAMUX_DMAREQ_ID_I2C2_TX
#define | I2Cx_DMA_TX_IRQn DMA1_Channel1_IRQn
#define | I2Cx_DMA_RX_Channel DMA1_CHANNEL2
#define | I2Cx_DMA_RX_DMAMUX_Channel DMA1MUX_CHANNEL2
#define | I2Cx_DMA_RX_DMAREQ DMAMUX_DMAREQ_ID_I2C2_RX
#define | I2Cx_DMA_RX_IRQn DMA1_Channel2_IRQn
#define | I2Cx_EVT_IRQn I2C2_EVT_IRQn
#define | I2Cx_ERR_IRQn I2C2_ERR_IRQn
#define | BUF_SIZE 8

Functions

void | error_handler (uint32_t error_code)
error handler program More...
uint32_t | buffer_compare (uint8_t *buffer1, uint8_t *buffer2, uint32_t len)
compare whether the valus of buffer 1 and buffer 2 are equal. More...
int | main (void)
main function. More...
void | i2c_lowlevel_init (i2c_handle_type *hi2c)
initializes peripherals used by the i2c. More...

Variables

uint8_t | tx_buf1 [8] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08}
uint8_t | tx_buf2 [8] = {0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70, 0x80}
uint8_t | tx_buf3 [8] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88}
uint8_t | rx_buf1 [8] = {0}
uint8_t | rx_buf2 [8] = {0}
uint8_t | rx_buf3 [8] = {0}
i2c_handle_type hi2cx

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2c/eeprom/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • i2c
  • eeprom
  • src
project/at_start_f437/examples/i2c/eeprom/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "i2c_application.h"
30
39#define I2C_TIMEOUT 0xFFFFFFF
40
41//#define I2Cx_CLKCTRL 0xB170FFFF //10K
42//#define I2Cx_CLKCTRL 0xC0E06969 //50K
43#define I2Cx_CLKCTRL 0x80504C4E //100K
44//#define I2Cx_CLKCTRL 0x30F03C6B //200K
45
46#define I2Cx_ADDRESS 0xA0
47
48#define I2Cx_PORT I2C2
49#define I2Cx_CLK CRM_I2C2_PERIPH_CLOCK
50#define I2Cx_DMA DMA1
51#define I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK
52
53#define I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
54#define I2Cx_SCL_GPIO_PIN GPIO_PINS_10
55#define I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE10
56#define I2Cx_SCL_GPIO_PORT GPIOB
57#define I2Cx_SCL_GPIO_MUX GPIO_MUX_4
58
59#define I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK
60#define I2Cx_SDA_GPIO_PIN GPIO_PINS_11
61#define I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE11
62#define I2Cx_SDA_GPIO_PORT GPIOB
63#define I2Cx_SDA_GPIO_MUX GPIO_MUX_4
64
65#define I2Cx_DMA_TX_Channel DMA1_CHANNEL1
66#define I2Cx_DMA_TX_DMAMUX_Channel DMA1MUX_CHANNEL1
67#define I2Cx_DMA_TX_DMAREQ DMAMUX_DMAREQ_ID_I2C2_TX
68#define I2Cx_DMA_TX_IRQn DMA1_Channel1_IRQn
69
70#define I2Cx_DMA_RX_Channel DMA1_CHANNEL2
71#define I2Cx_DMA_RX_DMAMUX_Channel DMA1MUX_CHANNEL2
72#define I2Cx_DMA_RX_DMAREQ DMAMUX_DMAREQ_ID_I2C2_RX
73#define I2Cx_DMA_RX_IRQn DMA1_Channel2_IRQn
74
75#define I2Cx_EVT_IRQn I2C2_EVT_IRQn
76#define I2Cx_ERR_IRQn I2C2_ERR_IRQn
77
78#define BUF_SIZE 8
79
80uint8_t tx_buf1[BUF_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08};
81uint8_t tx_buf2[BUF_SIZE] = {0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70, 0x80};
82uint8_t tx_buf3[BUF_SIZE] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88};
83uint8_t rx_buf1[BUF_SIZE] = {0};
84uint8_t rx_buf2[BUF_SIZE] = {0};
85uint8_t rx_buf3[BUF_SIZE] = {0};
86
87 i2c_handle_type hi2cx;
88
94void error_handler(uint32_t error_code)
95{
96 while(1)
97 {
98 at32_led_toggle(LED2);
99 delay_ms(500);
100 }
101}
102
110uint32_t buffer_compare(uint8_t* buffer1, uint8_t* buffer2, uint32_t len)
111{
112 uint32_t i;
113
114 for(i = 0; i < len; i++)
115 {
116 if(buffer1[i] != buffer2[i])
117 {
118 return 1;
119 }
120 }
121
122 return 0;
123}
124
130int main(void)
131{
132 i2c_status_type i2c_status;
133
134 /* initial system clock */
135 system_clock_config();
136
137 /* config nvic priority group */
138 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
139
140 /* at board initial */
141 at32_board_init();
142
143 hi2cx.i2cx = I2Cx_PORT;
144
145 /* i2c config */
146 i2c_config(&hi2cx);
147
148 while(1)
149 {
150 /* wait for key USER_BUTTON press before starting the communication */
151 while(at32_button_press() != USER_BUTTON)
152 {
153 }
154
155 /* write data to memory device */
156 if((i2c_status = i2c_memory_write(&hi2cx, I2Cx_ADDRESS, 0, tx_buf1, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
157 {
158 error_handler(i2c_status);
159 }
160
161 delay_ms(5);
162
163 /* read data from memory device */
164 if((i2c_status = i2c_memory_read(&hi2cx, I2Cx_ADDRESS, 0, rx_buf1, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
165 {
166 error_handler(i2c_status);
167 }
168
169 /* write data to memory device */
170 if((i2c_status = i2c_memory_write_int(&hi2cx, I2Cx_ADDRESS, 0, tx_buf2, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
171 {
172 error_handler(i2c_status);
173 }
174
175 /* wait for the communication to end */
176 if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
177 {
178 error_handler(i2c_status);
179 }
180
181 delay_ms(5);
182
183 /* read data from memory device */
184 if((i2c_status = i2c_memory_read_int(&hi2cx, I2Cx_ADDRESS, 0, rx_buf2, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
185 {
186 error_handler(i2c_status);
187 }
188
189 /* wait for the communication to end */
190 if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
191 {
192 error_handler(i2c_status);
193 }
194
195 /* write data to memory device */
196 if((i2c_status = i2c_memory_write_dma(&hi2cx, I2Cx_ADDRESS, 0, tx_buf3, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
197 {
198 error_handler(i2c_status);
199 }
200
201 /* wait for the communication to end */
202 if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
203 {
204 error_handler(i2c_status);
205 }
206
207 delay_ms(5);
208
209 /* read data from memory device */
210 if((i2c_status = i2c_memory_read_dma(&hi2cx, I2Cx_ADDRESS, 0, rx_buf3, BUF_SIZE, I2C_TIMEOUT)) != I2C_OK)
211 {
212 error_handler(i2c_status);
213 }
214
215 /* wait for the communication to end */
216 if(i2c_wait_end(&hi2cx, I2C_TIMEOUT) != I2C_OK)
217 {
218 error_handler(i2c_status);
219 }
220
221 if((buffer_compare(tx_buf1, rx_buf1, BUF_SIZE) == 0) &&
222 (buffer_compare(tx_buf2, rx_buf2, BUF_SIZE) == 0) &&
223 (buffer_compare(tx_buf3, rx_buf3, BUF_SIZE) == 0))
224 {
225 at32_led_on(LED3);
226 }
227 else
228 {
229 error_handler(i2c_status);
230 }
231
232 }
233}
234
240void i2c_lowlevel_init(i2c_handle_type* hi2c)
241{
242 gpio_init_type gpio_init_structure;
243
244 if(hi2c->i2cx == I2Cx_PORT)
245 {
246 /* i2c periph clock enable */
247 crm_periph_clock_enable(I2Cx_CLK, TRUE);
248 crm_periph_clock_enable(I2Cx_SCL_GPIO_CLK, TRUE);
249 crm_periph_clock_enable(I2Cx_SDA_GPIO_CLK, TRUE);
250
251 /* gpio configuration */
252 gpio_pin_mux_config(I2Cx_SCL_GPIO_PORT, I2Cx_SCL_GPIO_PinsSource, I2Cx_SCL_GPIO_MUX);
253
254 gpio_pin_mux_config(I2Cx_SDA_GPIO_PORT, I2Cx_SDA_GPIO_PinsSource, I2Cx_SDA_GPIO_MUX);
255
256 /* configure i2c pins: scl */
257 gpio_init_structure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
258 gpio_init_structure.gpio_mode = GPIO_MODE_MUX;
259 gpio_init_structure.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
260 gpio_init_structure.gpio_pull = GPIO_PULL_UP;
261
262 gpio_init_structure.gpio_pins = I2Cx_SCL_GPIO_PIN;
263 gpio_init(I2Cx_SCL_GPIO_PORT, &gpio_init_structure);
264
265 /* configure i2c pins: sda */
266 gpio_init_structure.gpio_pins = I2Cx_SDA_GPIO_PIN;
267 gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure);
268
269 /* configure and enable i2c interrupt */
270 nvic_irq_enable(I2Cx_EVT_IRQn, 0, 0);
271 nvic_irq_enable(I2Cx_ERR_IRQn, 0, 0);
272
273 /* configure and enable i2c dma channel interrupt */
274 nvic_irq_enable(I2Cx_DMA_TX_IRQn, 0, 0);
275 nvic_irq_enable(I2Cx_DMA_RX_IRQn, 0, 0);
276
277 /* i2c dma tx and rx channels configuration */
278 /* enable the dma clock */
279 crm_periph_clock_enable(I2Cx_DMA_CLK, TRUE);
280
281 /* i2c dma channel configuration */
282 dma_reset(hi2c->dma_tx_channel);
283 dma_reset(hi2c->dma_rx_channel);
284
285 hi2c->dma_tx_channel = I2Cx_DMA_TX_Channel;
286 hi2c->dma_rx_channel = I2Cx_DMA_RX_Channel;
287
288 hi2c->dma_init_struct.peripheral_base_addr = (uint32_t)&hi2c->i2cx->txdt;
289 hi2c->dma_init_struct.memory_base_addr = 0;
290 hi2c->dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
291 hi2c->dma_init_struct.buffer_size = 0xFFFF;
292 hi2c->dma_init_struct.peripheral_inc_enable = FALSE;
293 hi2c->dma_init_struct.memory_inc_enable = TRUE;
294 hi2c->dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
295 hi2c->dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
296 hi2c->dma_init_struct.loop_mode_enable = FALSE;
297 hi2c->dma_init_struct.priority = DMA_PRIORITY_LOW;
298
299 dma_init(hi2c->dma_tx_channel, &hi2c->dma_init_struct);
300 dma_init(hi2c->dma_rx_channel, &hi2c->dma_init_struct);
301
302 dmamux_init(I2Cx_DMA_TX_DMAMUX_Channel, I2Cx_DMA_TX_DMAREQ);
303 dmamux_init(I2Cx_DMA_RX_DMAMUX_Channel, I2Cx_DMA_RX_DMAREQ);
304
305 dmamux_enable(I2Cx_DMA, TRUE);
306
307 /* config i2c */
308 i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL);
309
310 i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS);
311 }
312}
313
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
error_handler
void error_handler(uint32_t error_code)
error handler program
Definition: project/at_start_f435/examples/i2c/communication_dma/src/main.c:91
I2Cx_DMA_TX_Channel
#define I2Cx_DMA_TX_Channel
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:65
I2Cx_DMA
#define I2Cx_DMA
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:50
I2Cx_DMA_TX_DMAMUX_Channel
#define I2Cx_DMA_TX_DMAMUX_Channel
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:66
I2Cx_ADDRESS
#define I2Cx_ADDRESS
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:46
I2Cx_SDA_GPIO_PIN
#define I2Cx_SDA_GPIO_PIN
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:60
I2Cx_DMA_RX_IRQn
#define I2Cx_DMA_RX_IRQn
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:73
I2Cx_SDA_GPIO_MUX
#define I2Cx_SDA_GPIO_MUX
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:63
I2Cx_CLKCTRL
#define I2Cx_CLKCTRL
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:43
I2Cx_CLK
#define I2Cx_CLK
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:49
tx_buf3
uint8_t tx_buf3[8]
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:82
I2Cx_SCL_GPIO_PinsSource
#define I2Cx_SCL_GPIO_PinsSource
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:55
I2Cx_DMA_RX_DMAREQ
#define I2Cx_DMA_RX_DMAREQ
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:72
BUF_SIZE
#define BUF_SIZE
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:78
rx_buf1
uint8_t rx_buf1[8]
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:83
I2Cx_DMA_RX_Channel
#define I2Cx_DMA_RX_Channel
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:70
hi2cx
i2c_handle_type hi2cx
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:87
I2Cx_SCL_GPIO_MUX
#define I2Cx_SCL_GPIO_MUX
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:57
I2Cx_SDA_GPIO_PORT
#define I2Cx_SDA_GPIO_PORT
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:62
I2Cx_SDA_GPIO_PinsSource
#define I2Cx_SDA_GPIO_PinsSource
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:61
I2Cx_DMA_CLK
#define I2Cx_DMA_CLK
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:51
I2Cx_SDA_GPIO_CLK
#define I2Cx_SDA_GPIO_CLK
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:59
rx_buf2
uint8_t rx_buf2[8]
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:84
I2Cx_ERR_IRQn
#define I2Cx_ERR_IRQn
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:76
I2Cx_DMA_RX_DMAMUX_Channel
#define I2Cx_DMA_RX_DMAMUX_Channel
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:71
I2Cx_PORT
#define I2Cx_PORT
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:48
I2Cx_SCL_GPIO_PIN
#define I2Cx_SCL_GPIO_PIN
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:54
rx_buf3
uint8_t rx_buf3[8]
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:85
tx_buf2
uint8_t tx_buf2[8]
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:81
I2Cx_SCL_GPIO_CLK
#define I2Cx_SCL_GPIO_CLK
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:53
I2Cx_DMA_TX_DMAREQ
#define I2Cx_DMA_TX_DMAREQ
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:67
I2Cx_DMA_TX_IRQn
#define I2Cx_DMA_TX_IRQn
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:68
tx_buf1
uint8_t tx_buf1[8]
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:80
I2Cx_EVT_IRQn
#define I2Cx_EVT_IRQn
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:75
I2Cx_SCL_GPIO_PORT
#define I2Cx_SCL_GPIO_PORT
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:56
I2C_TIMEOUT
#define I2C_TIMEOUT
Definition: project/at_start_f437/examples/i2c/eeprom/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_BYTE
@ DMA_PERIPHERAL_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:162
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_MEMORY_DATA_WIDTH_BYTE
@ DMA_MEMORY_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:172
DMA_PRIORITY_LOW
@ DMA_PRIORITY_LOW
Definition: at32f435_437_dma.h:182
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
i2c_init
void i2c_init(i2c_type *i2c_x, uint8_t dfilters, uint32_t clk)
init i2c digit filters and clock control register.
Definition: at32f435_437_i2c.c:79
i2c_own_address1_set
void i2c_own_address1_set(i2c_type *i2c_x, i2c_address_mode_type mode, uint16_t address)
config i2c own address 1.
Definition: at32f435_437_i2c.c:103
I2C_ADDRESS_MODE_7BIT
@ I2C_ADDRESS_MODE_7BIT
Definition: at32f435_437_i2c.h:113
i2c_wait_end
i2c_status_type i2c_wait_end(i2c_handle_type *hi2c, uint32_t timeout)
wait for the transfer to end.
Definition: i2c_application.c:165
i2c_memory_read
i2c_status_type i2c_memory_read(i2c_handle_type *hi2c, uint16_t address, uint16_t mem_address, uint8_t *pdata, uint16_t size, uint32_t timeout)
read data from memory device through polling mode.
Definition: i2c_application.c:1084
i2c_memory_write_int
i2c_status_type i2c_memory_write_int(i2c_handle_type *hi2c, uint16_t address, uint16_t mem_address, uint8_t *pdata, uint16_t size, uint32_t timeout)
write data to the memory device through interrupt mode.
Definition: i2c_application.c:1170
i2c_memory_write
i2c_status_type i2c_memory_write(i2c_handle_type *hi2c, uint16_t address, uint16_t mem_address, uint8_t *pdata, uint16_t size, uint32_t timeout)
write data to the memory device through polling mode.
Definition: i2c_application.c:1004
i2c_memory_write_dma
i2c_status_type i2c_memory_write_dma(i2c_handle_type *hi2c, uint16_t address, uint16_t mem_address, uint8_t *pdata, uint16_t size, uint32_t timeout)
write data to the memory device through dma mode.
Definition: i2c_application.c:1271
i2c_config
void i2c_config(i2c_handle_type *hi2c)
i2c peripheral initialization.
Definition: i2c_application.c:113
i2c_lowlevel_init
__WEAK void i2c_lowlevel_init(i2c_handle_type *hi2c)
initializes peripherals used by the i2c.
Definition: i2c_application.c:103
i2c_memory_read_int
i2c_status_type i2c_memory_read_int(i2c_handle_type *hi2c, uint16_t address, uint16_t mem_address, uint8_t *pdata, uint16_t size, uint32_t timeout)
read data from memory device through interrupt mode.
Definition: i2c_application.c:1217
i2c_memory_read_dma
i2c_status_type i2c_memory_read_dma(i2c_handle_type *hi2c, uint16_t address, uint16_t mem_address, uint8_t *pdata, uint16_t size, uint32_t timeout)
read data from memory device through polling mode.
Definition: i2c_application.c:1331
i2c_status_type
i2c_status_type
Definition: i2c_application.h:80
I2C_OK
@ I2C_OK
Definition: i2c_application.h:81
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
i2c_application.h
i2c application libray header file
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
i2c_handle_type
Definition: i2c_application.h:112
i2c_handle_type::dma_rx_channel
dma_channel_type * dma_rx_channel
Definition: i2c_application.h:121
i2c_handle_type::i2cx
i2c_type * i2cx
Definition: i2c_application.h:113
i2c_handle_type::dma_init_struct
dma_init_type dma_init_struct
Definition: i2c_application.h:122
i2c_handle_type::dma_tx_channel
dma_channel_type * dma_tx_channel
Definition: i2c_application.h:120
i2c_type::txdt
__IO uint32_t txdt
Definition: at32f435_437_i2c.h:400
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • i2s
  • fullduplex_dma
  • inc
project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • i2s
  • fullduplex_dma
  • inc
project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • i2s
  • fullduplex_dma
  • inc
project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • i2s
  • fullduplex_dma
  • src
Functions
project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • i2s
  • fullduplex_dma
  • src
project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • i2s
  • fullduplex_dma
  • src
Functions
project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • i2s
  • fullduplex_dma
  • src
project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • i2s
  • fullduplex_dma
  • src
Macros | Functions | Variables
project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | TXBUF_SIZE 32
#define | RXBUF_SIZE TXBUF_SIZE

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | i2s_config (void)
i2s configuration. More...
void | tx_data_fill (void)
transfer data fill. More...
error_status | buffer_compare (uint16_t *pbuffer1, uint16_t *pbuffer2, uint16_t buffer_length)
buffer compare function. More...
int | main (void)
main function. More...

Variables

uint16_t | i2s2_buffer_tx [32]
uint16_t | i2s2_buffer_rx [32]
uint16_t | i2s3_buffer_tx [32]
uint16_t | i2s3_buffer_rx [32]
volatile error_status | transfer_status1 = ERROR
volatile error_status | transfer_status2 = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c.

Function Documentation

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 0

< gpio pins number 1

< gpio pins number 2

< gpio pins number 4

< gpio pins number 4

< gpio pins number 10

< gpio pins number 11

< gpio pins number 12

Definition at line 171 of file project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c.

◆ i2s_config()

static void i2s_config ( void )
static

i2s configuration.

Parameters
none
Return values
none

Definition at line 92 of file project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • i2s
  • fullduplex_dma
  • src
project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define TXBUF_SIZE 32
39#define RXBUF_SIZE TXBUF_SIZE
40
41uint16_t i2s2_buffer_tx[TXBUF_SIZE];
42uint16_t i2s2_buffer_rx[RXBUF_SIZE];
43uint16_t i2s3_buffer_tx[TXBUF_SIZE];
44uint16_t i2s3_buffer_rx[RXBUF_SIZE];
45volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
46
47static void gpio_config(void);
48static void i2s_config(void);
49void tx_data_fill(void);
50 error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
51
57 error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length)
58{
59 while(buffer_length--)
60 {
61 if(*pbuffer1 != *pbuffer2)
62 {
63 return ERROR;
64 }
65
66 pbuffer1++;
67 pbuffer2++;
68 }
69 return SUCCESS;
70}
71
77void tx_data_fill(void)
78{
79 uint32_t data_index = 0;
80 for(data_index = 0; data_index < TXBUF_SIZE; data_index++)
81 {
82 i2s2_buffer_tx[data_index] = data_index;
83 i2s3_buffer_tx[data_index] = TXBUF_SIZE - data_index;
84 }
85}
86
92static void i2s_config(void)
93{
94 dma_init_type dma_init_struct;
95 i2s_init_type i2s_init_struct;
96
97 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
98 dma_reset(DMA1_CHANNEL1);
99 dma_reset(DMA1_CHANNEL2);
100 dma_reset(DMA1_CHANNEL3);
101 dma_reset(DMA1_CHANNEL4);
102 dmamux_enable(DMA1, TRUE);
103 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_SPI2_TX);
104 dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_I2S2_EXT_RX);
105 dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_SPI3_RX);
106 dmamux_init(DMA1MUX_CHANNEL4, DMAMUX_DMAREQ_ID_I2S3_EXT_TX);
107
108 dma_default_para_init(&dma_init_struct);
109 dma_init_struct.buffer_size = TXBUF_SIZE;
110 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
111 dma_init_struct.memory_inc_enable = TRUE;
112 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
113 dma_init_struct.peripheral_inc_enable = FALSE;
114 dma_init_struct.priority = DMA_PRIORITY_HIGH;
115 dma_init_struct.loop_mode_enable = FALSE;
116
117 dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_tx;
118 dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
119 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
120 dma_init(DMA1_CHANNEL1, &dma_init_struct);
121
122 dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_rx;
123 dma_init_struct.peripheral_base_addr = (uint32_t)&(I2S2EXT->dt);
124 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
125 dma_init(DMA1_CHANNEL2, &dma_init_struct);
126
127 dma_init_struct.memory_base_addr = (uint32_t)i2s3_buffer_rx;
128 dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt);
129 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
130 dma_init(DMA1_CHANNEL3, &dma_init_struct);
131
132 dma_init_struct.memory_base_addr = (uint32_t)i2s3_buffer_tx;
133 dma_init_struct.peripheral_base_addr = (uint32_t)&(I2S3EXT->dt);
134 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
135 dma_init(DMA1_CHANNEL4, &dma_init_struct);
136
137 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
138 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
139 i2s_default_para_init(&i2s_init_struct);
140 i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
141 i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT;
142 i2s_init_struct.mclk_output_enable = FALSE;
143 i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K;
144 i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
145
146 i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX;
147 i2s_init(SPI2, &i2s_init_struct);
148 i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX;
149 i2s_init(I2S2EXT, &i2s_init_struct);
150
151 i2s_init_struct.operation_mode = I2S_MODE_SLAVE_RX;
152 i2s_init(SPI3, &i2s_init_struct);
153 i2s_init_struct.operation_mode =I2S_MODE_SLAVE_TX;
154 i2s_init(I2S3EXT, &i2s_init_struct);
155
156 dma_channel_enable(DMA1_CHANNEL1, TRUE);
157 dma_channel_enable(DMA1_CHANNEL2, TRUE);
158 dma_channel_enable(DMA1_CHANNEL3, TRUE);
159 dma_channel_enable(DMA1_CHANNEL4, TRUE);
160 spi_i2s_dma_transmitter_enable(SPI2, TRUE);
161 spi_i2s_dma_receiver_enable(I2S2EXT, TRUE);
162 spi_i2s_dma_receiver_enable(SPI3, TRUE);
163 spi_i2s_dma_transmitter_enable(I2S3EXT, TRUE);
164}
165
171static void gpio_config(void)
172{
173 gpio_init_type gpio_initstructure;
174 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
175 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
176 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
177
178 /* master ws pin */
179 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
180 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
181 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
182 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
183 gpio_initstructure.gpio_pins = GPIO_PINS_0;
184 gpio_init(GPIOD, &gpio_initstructure);
185 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE0, GPIO_MUX_7);
186
187 /* master ck pin */
188 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
189 gpio_initstructure.gpio_pins = GPIO_PINS_1;
190 gpio_init(GPIOD, &gpio_initstructure);
191 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6);
192
193 /* master ext_sd pin */
194 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
195 gpio_initstructure.gpio_pins = GPIO_PINS_2;
196 gpio_init(GPIOC, &gpio_initstructure);
197 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_6);
198
199 /* master sd pin */
200 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
201 gpio_initstructure.gpio_pins = GPIO_PINS_4;
202 gpio_init(GPIOD, &gpio_initstructure);
203 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_6);
204
205 /* slave ws pin */
206 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
207 gpio_initstructure.gpio_pins = GPIO_PINS_4;
208 gpio_init(GPIOA, &gpio_initstructure);
209 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE4, GPIO_MUX_6);
210
211 /* slave ck pin */
212 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
213 gpio_initstructure.gpio_pins = GPIO_PINS_10;
214 gpio_init(GPIOC, &gpio_initstructure);
215 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE10, GPIO_MUX_6);
216
217 /* slave ext_sd pin */
218 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
219 gpio_initstructure.gpio_pins = GPIO_PINS_11;
220 gpio_init(GPIOC, &gpio_initstructure);
221 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE11, GPIO_MUX_5);
222
223 /* slave sd pin */
224 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
225 gpio_initstructure.gpio_pins = GPIO_PINS_12;
226 gpio_init(GPIOC, &gpio_initstructure);
227 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_6);
228}
229
235int main(void)
236{
237 system_clock_config();
238 at32_board_init();
239 at32_led_off(LED2);
240 at32_led_off(LED3);
241 at32_led_off(LED4);
242 tx_data_fill();
243 gpio_config();
244 i2s_config();
245 i2s_enable(SPI3, TRUE);
246 i2s_enable(I2S3EXT, TRUE);
247 i2s_enable(I2S2EXT, TRUE);
248 i2s_enable(SPI2, TRUE);
249
250 while(dma_flag_get(DMA1_FDT2_FLAG) == RESET);
251
252 /* test result:the data check */
253 transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, TXBUF_SIZE);
254 transfer_status2 = buffer_compare(i2s3_buffer_rx, i2s2_buffer_tx, TXBUF_SIZE);
255
256 /* test result indicate:if success ,led2 lights */
257 if((transfer_status1 == SUCCESS) &&(transfer_status2 == SUCCESS))
258 {
259 at32_led_on(LED2);
260 }
261 else
262 {
263 at32_led_off(LED2);
264 }
265 while(1)
266 {
267 }
268}
269
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
i2s3_buffer_tx
uint16_t i2s3_buffer_tx[32]
Definition: project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c:43
i2s2_buffer_tx
uint16_t i2s2_buffer_tx[32]
Definition: project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c:41
i2s2_buffer_rx
uint16_t i2s2_buffer_rx[32]
Definition: project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c:42
RXBUF_SIZE
#define RXBUF_SIZE
Definition: project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c:39
transfer_status1
volatile error_status transfer_status1
Definition: project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c:45
transfer_status2
volatile error_status transfer_status2
Definition: project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c:45
TXBUF_SIZE
#define TXBUF_SIZE
Definition: project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c:38
i2s3_buffer_rx
uint16_t i2s3_buffer_rx[32]
Definition: project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c:44
tx_data_fill
void tx_data_fill(void)
transfer data fill.
Definition: project/at_start_f435/examples/i2s/fullduplex_dma/src/main.c:77
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SPI3_PERIPH_CLOCK
@ CRM_SPI3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:139
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_SPI2_PERIPH_CLOCK
@ CRM_SPI2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:138
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_SPI2_TX
@ DMAMUX_DMAREQ_ID_SPI2_TX
Definition: at32f435_437_dma.h:207
DMAMUX_DMAREQ_ID_SPI3_RX
@ DMAMUX_DMAREQ_ID_SPI3_RX
Definition: at32f435_437_dma.h:208
DMAMUX_DMAREQ_ID_I2S3_EXT_TX
@ DMAMUX_DMAREQ_ID_I2S3_EXT_TX
Definition: at32f435_437_dma.h:215
DMAMUX_DMAREQ_ID_I2S2_EXT_RX
@ DMAMUX_DMAREQ_ID_I2S2_EXT_RX
Definition: at32f435_437_dma.h:212
DMA1_FDT2_FLAG
#define DMA1_FDT2_FLAG
Definition: at32f435_437_dma.h:70
DMA1MUX_CHANNEL2
#define DMA1MUX_CHANNEL2
Definition: at32f435_437_dma.h:705
DMA1MUX_CHANNEL3
#define DMA1MUX_CHANNEL3
Definition: at32f435_437_dma.h:706
DMA1_CHANNEL3
#define DMA1_CHANNEL3
Definition: at32f435_437_dma.h:698
DMA1MUX_CHANNEL4
#define DMA1MUX_CHANNEL4
Definition: at32f435_437_dma.h:707
DMA1_CHANNEL4
#define DMA1_CHANNEL4
Definition: at32f435_437_dma.h:699
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1_CHANNEL2
#define DMA1_CHANNEL2
Definition: at32f435_437_dma.h:697
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_6
@ GPIO_MUX_6
Definition: at32f435_437_gpio.h:162
GPIO_MUX_5
@ GPIO_MUX_5
Definition: at32f435_437_gpio.h:161
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
i2s_init
void i2s_init(spi_type *spi_x, i2s_init_type *i2s_init_struct)
i2s init config with its setting value.
Definition: at32f435_437_spi.c:350
spi_i2s_dma_receiver_enable
void spi_i2s_dma_receiver_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the spi/i2s dma receiver mode.
Definition: at32f435_437_spi.c:533
i2s_enable
void i2s_enable(spi_type *spi_x, confirm_state new_state)
enable or disable i2s.
Definition: at32f435_437_spi.c:479
i2s_default_para_init
void i2s_default_para_init(i2s_init_type *i2s_init_struct)
i2s init config with its default value.
Definition: at32f435_437_spi.c:332
spi_i2s_dma_transmitter_enable
void spi_i2s_dma_transmitter_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the spi/i2s dma transmitter mode.
Definition: at32f435_437_spi.c:519
I2S_CLOCK_POLARITY_LOW
@ I2S_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:251
I2S_DATA_16BIT_CHANNEL_32BIT
@ I2S_DATA_16BIT_CHANNEL_32BIT
Definition: at32f435_437_spi.h:230
I2S_AUDIO_FREQUENCY_48K
@ I2S_AUDIO_FREQUENCY_48K
Definition: at32f435_437_spi.h:219
I2S_AUDIO_PROTOCOL_PHILLIPS
@ I2S_AUDIO_PROTOCOL_PHILLIPS
Definition: at32f435_437_spi.h:200
I2S_MODE_MASTER_TX
@ I2S_MODE_MASTER_TX
Definition: at32f435_437_spi.h:242
I2S_MODE_SLAVE_RX
@ I2S_MODE_SLAVE_RX
Definition: at32f435_437_spi.h:241
I2S_MODE_SLAVE_TX
@ I2S_MODE_SLAVE_TX
Definition: at32f435_437_spi.h:240
I2S3EXT
#define I2S3EXT
Definition: at32f435_437_spi.h:458
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
I2S2EXT
#define I2S2EXT
Definition: at32f435_437_spi.h:457
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
i2s_config
static void i2s_config(void)
i2s configuration.
Definition: project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c:92
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c:171
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
i2s_init_type
i2s init type
Definition: at32f435_437_spi.h:274
i2s_init_type::audio_sampling_freq
i2s_audio_sampling_freq_type audio_sampling_freq
Definition: at32f435_437_spi.h:277
i2s_init_type::data_channel_format
i2s_data_channel_format_type data_channel_format
Definition: at32f435_437_spi.h:278
i2s_init_type::mclk_output_enable
confirm_state mclk_output_enable
Definition: at32f435_437_spi.h:280
i2s_init_type::audio_protocol
i2s_audio_protocol_type audio_protocol
Definition: at32f435_437_spi.h:276
i2s_init_type::operation_mode
i2s_operation_mode_type operation_mode
Definition: at32f435_437_spi.h:275
i2s_init_type::clock_polarity
i2s_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:279
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • i2s
  • halfduplex_dma
  • inc
project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • i2s
  • halfduplex_dma
  • inc
project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • i2s
  • halfduplex_dma
  • inc
project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • i2s
  • halfduplex_dma
  • src
Functions
project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • i2s
  • halfduplex_dma
  • src
project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • i2s
  • halfduplex_dma
  • src
Functions
project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • i2s
  • halfduplex_dma
  • src
project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • i2s
  • halfduplex_dma
  • src
Functions | Variables
project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | i2s_config (void)
i2s configuration. More...
error_status | buffer_compare (uint16_t *pbuffer1, uint16_t *pbuffer2, uint16_t buffer_length)
buffer_compare function. More...
int | main (void)
main function. More...

Variables

uint16_t | i2s3_buffer_tx [32]
uint16_t | i2s2_buffer_rx [32]
volatile error_status | transfer_status = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c.

Function Documentation

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 10

< gpio pins number 12

< gpio pins number 7

< gpio pins number 0

< gpio pins number 1

< gpio pins number 4

Definition at line 133 of file project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c.

◆ i2s_config()

static void i2s_config ( void )
static

i2s configuration.

Parameters
none
Return values
none

Definition at line 76 of file project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • i2s
  • halfduplex_dma
  • src
project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38uint16_t i2s3_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C,
39 0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718,
40 0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324,
41 0x2526, 0x2728, 0x292A, 0x2B2C, 0x2D2E, 0x2F30,
42 0x3132, 0x3334, 0x3536, 0x3738, 0x393A, 0x3B3C,
43 0x3D3E, 0x3F40};
44uint16_t i2s2_buffer_rx[32];
45volatile error_status transfer_status = ERROR;
46
47static void gpio_config(void);
48static void i2s_config(void);
49 error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
50
56 error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length)
57{
58 while(buffer_length--)
59 {
60 if(*pbuffer1 != *pbuffer2)
61 {
62 return ERROR;
63 }
64
65 pbuffer1++;
66 pbuffer2++;
67 }
68 return SUCCESS;
69}
70
76static void i2s_config(void)
77{
78 dma_init_type dma_init_struct;
79 i2s_init_type i2s_init_struct;
80
81 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
82 dmamux_enable(DMA1, TRUE);
83 dma_reset(DMA1_CHANNEL1);
84 dma_reset(DMA1_CHANNEL2);
85 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_SPI2_RX);
86 dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_SPI3_TX);
87
88 dma_default_para_init(&dma_init_struct);
89 dma_init_struct.buffer_size = 32;
90 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
91 dma_init_struct.memory_inc_enable = TRUE;
92 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
93 dma_init_struct.peripheral_inc_enable = FALSE;
94 dma_init_struct.priority = DMA_PRIORITY_HIGH;
95 dma_init_struct.loop_mode_enable = FALSE;
96
97 dma_init_struct.memory_base_addr = (uint32_t)i2s3_buffer_tx;
98 dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt);
99 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
100 dma_init(DMA1_CHANNEL2, &dma_init_struct);
101
102 dma_init_struct.memory_base_addr = (uint32_t)i2s2_buffer_rx;
103 dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
104 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
105 dma_init(DMA1_CHANNEL1, &dma_init_struct);
106
107 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
108 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
109 i2s_default_para_init(&i2s_init_struct);
110 i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
111 i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT;
112 i2s_init_struct.mclk_output_enable = TRUE;
113 i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K;
114 i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
115 i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX;
116 i2s_init(SPI3, &i2s_init_struct);
117
118 i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX;
119 i2s_init(SPI2, &i2s_init_struct);
120
121 dma_channel_enable(DMA1_CHANNEL1, TRUE);
122 dma_channel_enable(DMA1_CHANNEL2, TRUE);
123 spi_i2s_dma_receiver_enable(SPI2, TRUE);
124 spi_i2s_dma_transmitter_enable(SPI3, TRUE);
125 i2s_enable(SPI2, TRUE);
126}
127
133static void gpio_config(void)
134{
135 gpio_init_type gpio_initstructure;
136 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
137 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
138 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
139
140 /* master ws pin */
141 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
142 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
143 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
144 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
145 gpio_initstructure.gpio_pins = GPIO_PINS_4;
146 gpio_init(GPIOA, &gpio_initstructure);
147 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE4, GPIO_MUX_6);
148
149 /* master ck pin */
150 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
151 gpio_initstructure.gpio_pins = GPIO_PINS_10;
152 gpio_init(GPIOC, &gpio_initstructure);
153 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE10, GPIO_MUX_6);
154
155 /* master sd pin */
156 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
157 gpio_initstructure.gpio_pins = GPIO_PINS_12;
158 gpio_init(GPIOC, &gpio_initstructure);
159 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_6);
160
161 /* master mck pin */
162 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
163 gpio_initstructure.gpio_pins = GPIO_PINS_7;
164 gpio_init(GPIOC, &gpio_initstructure);
165 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE7, GPIO_MUX_6);
166
167 /* slave ws pin */
168 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
169 gpio_initstructure.gpio_pins = GPIO_PINS_0;
170 gpio_init(GPIOD, &gpio_initstructure);
171 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE0, GPIO_MUX_7);
172
173 /* slave ck pin */
174 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
175 gpio_initstructure.gpio_pins = GPIO_PINS_1;
176 gpio_init(GPIOD, &gpio_initstructure);
177 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6);
178
179 /* slave sd pin */
180 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
181 gpio_initstructure.gpio_pins = GPIO_PINS_4;
182 gpio_init(GPIOD, &gpio_initstructure);
183 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_6);
184}
185
191int main(void)
192{
193 system_clock_config();
194 at32_board_init();
195 at32_led_off(LED2);
196 at32_led_off(LED3);
197 at32_led_off(LED4);
198 gpio_config();
199 i2s_config();
200 i2s_enable(SPI3, TRUE);
201
202 while(dma_flag_get(DMA1_FDT1_FLAG) == RESET);
203
204 /* test result:the data check */
205 transfer_status = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, 32);
206
207 /* test result indicate:if success ,led2 lights */
208 if(transfer_status==SUCCESS)
209 {
210 at32_led_on(LED2);
211 }
212 else
213 {
214 at32_led_off(LED2);
215 }
216 while(1)
217 {
218 }
219}
220
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
i2s3_buffer_tx
uint16_t i2s3_buffer_tx[32]
Definition: project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c:38
transfer_status
volatile error_status transfer_status
Definition: project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c:45
i2s2_buffer_rx
uint16_t i2s2_buffer_rx[32]
Definition: project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c:44
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SPI3_PERIPH_CLOCK
@ CRM_SPI3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:139
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_SPI2_PERIPH_CLOCK
@ CRM_SPI2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:138
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_SPI2_RX
@ DMAMUX_DMAREQ_ID_SPI2_RX
Definition: at32f435_437_dma.h:206
DMAMUX_DMAREQ_ID_SPI3_TX
@ DMAMUX_DMAREQ_ID_SPI3_TX
Definition: at32f435_437_dma.h:209
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
DMA1MUX_CHANNEL2
#define DMA1MUX_CHANNEL2
Definition: at32f435_437_dma.h:705
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1_CHANNEL2
#define DMA1_CHANNEL2
Definition: at32f435_437_dma.h:697
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_6
@ GPIO_MUX_6
Definition: at32f435_437_gpio.h:162
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
i2s_init
void i2s_init(spi_type *spi_x, i2s_init_type *i2s_init_struct)
i2s init config with its setting value.
Definition: at32f435_437_spi.c:350
spi_i2s_dma_receiver_enable
void spi_i2s_dma_receiver_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the spi/i2s dma receiver mode.
Definition: at32f435_437_spi.c:533
i2s_enable
void i2s_enable(spi_type *spi_x, confirm_state new_state)
enable or disable i2s.
Definition: at32f435_437_spi.c:479
i2s_default_para_init
void i2s_default_para_init(i2s_init_type *i2s_init_struct)
i2s init config with its default value.
Definition: at32f435_437_spi.c:332
spi_i2s_dma_transmitter_enable
void spi_i2s_dma_transmitter_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the spi/i2s dma transmitter mode.
Definition: at32f435_437_spi.c:519
I2S_CLOCK_POLARITY_LOW
@ I2S_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:251
I2S_DATA_16BIT_CHANNEL_32BIT
@ I2S_DATA_16BIT_CHANNEL_32BIT
Definition: at32f435_437_spi.h:230
I2S_AUDIO_FREQUENCY_48K
@ I2S_AUDIO_FREQUENCY_48K
Definition: at32f435_437_spi.h:219
I2S_AUDIO_PROTOCOL_PHILLIPS
@ I2S_AUDIO_PROTOCOL_PHILLIPS
Definition: at32f435_437_spi.h:200
I2S_MODE_MASTER_TX
@ I2S_MODE_MASTER_TX
Definition: at32f435_437_spi.h:242
I2S_MODE_SLAVE_RX
@ I2S_MODE_SLAVE_RX
Definition: at32f435_437_spi.h:241
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
i2s_config
static void i2s_config(void)
i2s configuration.
Definition: project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c:76
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c:133
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
i2s_init_type
i2s init type
Definition: at32f435_437_spi.h:274
i2s_init_type::audio_sampling_freq
i2s_audio_sampling_freq_type audio_sampling_freq
Definition: at32f435_437_spi.h:277
i2s_init_type::data_channel_format
i2s_data_channel_format_type data_channel_format
Definition: at32f435_437_spi.h:278
i2s_init_type::mclk_output_enable
confirm_state mclk_output_enable
Definition: at32f435_437_spi.h:280
i2s_init_type::audio_protocol
i2s_audio_protocol_type audio_protocol
Definition: at32f435_437_spi.h:276
i2s_init_type::operation_mode
i2s_operation_mode_type operation_mode
Definition: at32f435_437_spi.h:275
i2s_init_type::clock_polarity
i2s_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:279
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • i2s
  • halfduplex_interrupt
  • inc
project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • i2s
  • halfduplex_interrupt
  • inc
project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • i2s
  • halfduplex_interrupt
  • inc
project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • i2s
  • halfduplex_interrupt
  • src
Functions
project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • i2s
  • halfduplex_interrupt
  • src
project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • i2s
  • halfduplex_interrupt
  • src
Functions | Variables
project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | SPI2_I2S2EXT_IRQHandler (void)
This function handles the spi2 interrupt request. More...
void | SPI3_I2S3EXT_IRQHandler (void)
This function handles the spi3 interrupt request. More...

Variables

uint16_t | i2s3_buffer_tx [32]
uint16_t | i2s2_buffer_rx [32]
__IO uint32_t | tx_index
__IO uint32_t | rx_index

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • i2s
  • halfduplex_interrupt
  • src
project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38extern uint16_t i2s3_buffer_tx[32];
39extern uint16_t i2s2_buffer_rx[32];
40extern __IO uint32_t tx_index, rx_index;
41
47void NMI_Handler(void)
48{
49}
50
56void HardFault_Handler(void)
57{
58 /* go to infinite loop when hard fault exception occurs */
59 while(1)
60 {
61 }
62}
63
69void MemManage_Handler(void)
70{
71 /* go to infinite loop when memory manage exception occurs */
72 while(1)
73 {
74 }
75}
76
82void BusFault_Handler(void)
83{
84 /* go to infinite loop when bus fault exception occurs */
85 while(1)
86 {
87 }
88}
89
95void UsageFault_Handler(void)
96{
97 /* go to infinite loop when usage fault exception occurs */
98 while(1)
99 {
100 }
101}
102
108void SVC_Handler(void)
109{
110}
111
117void DebugMon_Handler(void)
118{
119}
120
126void PendSV_Handler(void)
127{
128}
129
135void SysTick_Handler(void)
136{
137}
138
144 void SPI2_I2S2EXT_IRQHandler(void)
145{
146 if(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET)
147 {
148 i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
149 }
150}
151
157void SPI3_I2S3EXT_IRQHandler(void)
158{
159 if(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) != RESET)
160 {
161 spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]);
162 if(tx_index == 32)
163 {
164 spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, FALSE);
165 }
166 }
167}
168
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
i2s3_buffer_tx
uint16_t i2s3_buffer_tx[32]
Definition: project/at_start_f435/examples/i2s/fullduplex_dma/src/main.c:43
tx_index
__IO uint32_t tx_index
Definition: project/at_start_f435/examples/i2s/halfduplex_interrupt/src/main.c:45
SPI3_I2S3EXT_IRQHandler
void SPI3_I2S3EXT_IRQHandler(void)
This function handles the spi3 interrupt request.
Definition: project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c:157
SPI2_I2S2EXT_IRQHandler
void SPI2_I2S2EXT_IRQHandler(void)
This function handles the spi2 interrupt request.
Definition: project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c:144
rx_index
__IO uint32_t rx_index
Definition: project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c:40
i2s2_buffer_rx
uint16_t i2s2_buffer_rx[32]
Definition: project/at_start_f435/examples/i2s/fullduplex_dma/src/main.c:42
FALSE
@ FALSE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
SPI_I2S_TDBE_FLAG
#define SPI_I2S_TDBE_FLAG
Definition: at32f435_437_spi.h:54
SPI_I2S_RDBF_FLAG
#define SPI_I2S_RDBF_FLAG
Definition: at32f435_437_spi.h:53
SPI_I2S_TDBE_INT
#define SPI_I2S_TDBE_INT
Definition: at32f435_437_spi.h:75
spi_i2s_interrupt_enable
void spi_i2s_interrupt_enable(spi_type *spi_x, uint32_t spi_i2s_int, confirm_state new_state)
enable or disable the specified spi/i2s interrupts.
Definition: at32f435_437_spi.c:498
spi_i2s_data_transmit
void spi_i2s_data_transmit(spi_type *spi_x, uint16_t tx_data)
spi/i2s data transmit
Definition: at32f435_437_spi.c:548
spi_i2s_flag_get
flag_status spi_i2s_flag_get(spi_type *spi_x, uint32_t spi_i2s_flag)
get flag of the specified spi/i2s peripheral.
Definition: at32f435_437_spi.c:583
spi_i2s_data_receive
uint16_t spi_i2s_data_receive(spi_type *spi_x)
spi/i2s data receive
Definition: at32f435_437_spi.c:560
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • i2s
  • halfduplex_interrupt
  • src
Functions | Variables
project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | i2s_config (i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq)
i2s configuration. More...
error_status | buffer_compare (uint16_t *pbuffer1, uint16_t *pbuffer2, uint16_t buffer_length)
buffer_compare function. More...
error_status | buffer_compare_24bits (uint16_t *pbuffer1, uint16_t *pbuffer2, uint16_t buffer_length)
buffer_compare_24bits function. More...
int | main (void)
main function. More...

Variables

uint16_t | i2s3_buffer_tx [32]
uint16_t | i2s2_buffer_rx [32]
__IO uint32_t | tx_index = 0
__IO uint32_t | rx_index = 0
volatile error_status | transfer_status1 = ERROR
volatile error_status | transfer_status2 = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c.

Function Documentation

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 15

< gpio pins number 3

< gpio pins number 5

< gpio pins number 7

< gpio pins number 0

< gpio pins number 1

< gpio pins number 4

Definition at line 135 of file project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c.

◆ i2s_config()

static void i2s_config | ( | i2s_data_channel_format_type | format,
 |  | i2s_audio_sampling_freq_type | freq
 | ) |  |
static

i2s configuration.

Parameters
none
Return values
none

< receive data buffer full interrupt

< transmit data buffer empty interrupt

Definition at line 101 of file project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • i2s
  • halfduplex_interrupt
  • src
project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38uint16_t i2s3_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C,
39 0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718,
40 0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324,
41 0x2526, 0x2728, 0x292A, 0x2B2C, 0x2D2E, 0x2F30,
42 0x3132, 0x3334, 0x3536, 0x3738, 0x393A, 0x3B3C,
43 0x3D3E, 0x3F40};
44uint16_t i2s2_buffer_rx[32];
45__IO uint32_t tx_index = 0, rx_index = 0;
46volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
47
48static void gpio_config(void);
49static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq);
50 error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
51 error_status buffer_compare_24bits(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
52
58 error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length)
59{
60 while(buffer_length--)
61 {
62 if(*pbuffer1 != *pbuffer2)
63 {
64 return ERROR;
65 }
66
67 pbuffer1++;
68 pbuffer2++;
69 }
70 return SUCCESS;
71}
72
78 error_status buffer_compare_24bits(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length)
79{
80 while(buffer_length--)
81 {
82 if(*pbuffer1 != *pbuffer2)
83 {
84 if(*pbuffer1 != (*pbuffer2 & 0xFF00))
85 {
86 return ERROR;
87 }
88 }
89
90 pbuffer1++;
91 pbuffer2++;
92 }
93 return SUCCESS;
94}
95
101static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq)
102{
103 i2s_init_type i2s_init_struct;
104
105 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
106 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
107
108 nvic_irq_enable(SPI3_I2S3EXT_IRQn, 0, 0);
109 nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0);
110 spi_i2s_reset(SPI2);
111 spi_i2s_reset(SPI3);
112 i2s_default_para_init(&i2s_init_struct);
113 i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
114 i2s_init_struct.data_channel_format = format;
115 i2s_init_struct.mclk_output_enable = TRUE;
116 i2s_init_struct.audio_sampling_freq = freq;
117 i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
118 i2s_init_struct.operation_mode = I2S_MODE_MASTER_TX;
119 i2s_init(SPI3, &i2s_init_struct);
120
121 i2s_init_struct.operation_mode =I2S_MODE_SLAVE_RX;
122 i2s_init(SPI2, &i2s_init_struct);
123
124 spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE);
125 spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, TRUE);
126 i2s_enable(SPI2, TRUE);
127 i2s_enable(SPI3, TRUE);
128}
129
135static void gpio_config(void)
136{
137 gpio_init_type gpio_initstructure;
138 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
139 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
140 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
141 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
142
143 /* master ws pin */
144 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
145 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
146 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
147 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
148 gpio_initstructure.gpio_pins = GPIO_PINS_15;
149 gpio_init(GPIOA, &gpio_initstructure);
150 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE15, GPIO_MUX_6);
151
152 /* master ck pin */
153 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
154 gpio_initstructure.gpio_pins = GPIO_PINS_3;
155 gpio_init(GPIOB, &gpio_initstructure);
156 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE3, GPIO_MUX_6);
157
158 /* master sd pin */
159 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
160 gpio_initstructure.gpio_pins = GPIO_PINS_5;
161 gpio_init(GPIOB, &gpio_initstructure);
162 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE5, GPIO_MUX_6);
163
164 /* master mck pin */
165 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
166 gpio_initstructure.gpio_pins = GPIO_PINS_7;
167 gpio_init(GPIOC, &gpio_initstructure);
168 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE7, GPIO_MUX_6);
169
170 /* slave ws pin */
171 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
172 gpio_initstructure.gpio_pins = GPIO_PINS_0;
173 gpio_init(GPIOD, &gpio_initstructure);
174 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE0, GPIO_MUX_7);
175
176 /* slave ck pin */
177 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
178 gpio_initstructure.gpio_pins = GPIO_PINS_1;
179 gpio_init(GPIOD, &gpio_initstructure);
180 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6);
181
182 /* slave sd pin */
183 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
184 gpio_initstructure.gpio_pins = GPIO_PINS_4;
185 gpio_init(GPIOD, &gpio_initstructure);
186 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_6);
187}
188
194int main(void)
195{
196 __IO uint32_t index = 0;
197 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
198 system_clock_config();
199 at32_board_init();
200 at32_led_off(LED2);
201 at32_led_off(LED3);
202 at32_led_off(LED4);
203 gpio_config();
204 i2s_config(I2S_DATA_16BIT_CHANNEL_32BIT, I2S_AUDIO_FREQUENCY_48K);
205 while(rx_index < 32);
206
207 /* test result:the data check */
208 transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, 32);
209
210 for(index = 0; index < 32; index++) i2s2_buffer_rx[index] = 0;
211 tx_index = 0;
212 rx_index = 0;
213
214 i2s_config(I2S_DATA_24BIT_CHANNEL_32BIT, I2S_AUDIO_FREQUENCY_16K);
215 while(rx_index < 32);
216
217 /* test result:the data check */
218 transfer_status2 = buffer_compare_24bits(i2s2_buffer_rx, i2s3_buffer_tx, 32);
219
220 /* test result indicate:if success ,led2 lights */
221 if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS))
222 {
223 at32_led_on(LED2);
224 }
225 else
226 {
227 at32_led_off(LED2);
228 }
229
230 while(1)
231 {
232 }
233}
234
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
i2s3_buffer_tx
uint16_t i2s3_buffer_tx[32]
Definition: project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c:38
tx_index
__IO uint32_t tx_index
Definition: project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c:45
transfer_status1
volatile error_status transfer_status1
Definition: project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c:46
transfer_status2
volatile error_status transfer_status2
Definition: project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c:46
buffer_compare_24bits
error_status buffer_compare_24bits(uint16_t *pbuffer1, uint16_t *pbuffer2, uint16_t buffer_length)
buffer_compare_24bits function.
Definition: project/at_start_f435/examples/i2s/halfduplex_interrupt/src/main.c:78
rx_index
__IO uint32_t rx_index
Definition: project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c:45
i2s2_buffer_rx
uint16_t i2s2_buffer_rx[32]
Definition: project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c:44
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SPI3_PERIPH_CLOCK
@ CRM_SPI3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:139
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_SPI2_PERIPH_CLOCK
@ CRM_SPI2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:138
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PINS_SOURCE15
@ GPIO_PINS_SOURCE15
Definition: at32f435_437_gpio.h:148
GPIO_PINS_SOURCE5
@ GPIO_PINS_SOURCE5
Definition: at32f435_437_gpio.h:138
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_6
@ GPIO_MUX_6
Definition: at32f435_437_gpio.h:162
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
SPI_I2S_TDBE_INT
#define SPI_I2S_TDBE_INT
Definition: at32f435_437_spi.h:75
SPI_I2S_RDBF_INT
#define SPI_I2S_RDBF_INT
Definition: at32f435_437_spi.h:74
spi_i2s_interrupt_enable
void spi_i2s_interrupt_enable(spi_type *spi_x, uint32_t spi_i2s_int, confirm_state new_state)
enable or disable the specified spi/i2s interrupts.
Definition: at32f435_437_spi.c:498
i2s_init
void i2s_init(spi_type *spi_x, i2s_init_type *i2s_init_struct)
i2s init config with its setting value.
Definition: at32f435_437_spi.c:350
i2s_enable
void i2s_enable(spi_type *spi_x, confirm_state new_state)
enable or disable i2s.
Definition: at32f435_437_spi.c:479
spi_i2s_reset
void spi_i2s_reset(spi_type *spi_x)
spi reset by crm reset register
Definition: at32f435_437_spi.c:51
i2s_default_para_init
void i2s_default_para_init(i2s_init_type *i2s_init_struct)
i2s init config with its default value.
Definition: at32f435_437_spi.c:332
i2s_data_channel_format_type
i2s_data_channel_format_type
i2s data bit num and channel bit num type
Definition: at32f435_437_spi.h:228
i2s_audio_sampling_freq_type
i2s_audio_sampling_freq_type
i2s audio frequency type
Definition: at32f435_437_spi.h:211
I2S_CLOCK_POLARITY_LOW
@ I2S_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:251
I2S_DATA_24BIT_CHANNEL_32BIT
@ I2S_DATA_24BIT_CHANNEL_32BIT
Definition: at32f435_437_spi.h:231
I2S_DATA_16BIT_CHANNEL_32BIT
@ I2S_DATA_16BIT_CHANNEL_32BIT
Definition: at32f435_437_spi.h:230
I2S_AUDIO_FREQUENCY_48K
@ I2S_AUDIO_FREQUENCY_48K
Definition: at32f435_437_spi.h:219
I2S_AUDIO_FREQUENCY_16K
@ I2S_AUDIO_FREQUENCY_16K
Definition: at32f435_437_spi.h:215
I2S_AUDIO_PROTOCOL_PHILLIPS
@ I2S_AUDIO_PROTOCOL_PHILLIPS
Definition: at32f435_437_spi.h:200
I2S_MODE_MASTER_TX
@ I2S_MODE_MASTER_TX
Definition: at32f435_437_spi.h:242
I2S_MODE_SLAVE_RX
@ I2S_MODE_SLAVE_RX
Definition: at32f435_437_spi.h:241
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
SPI2_I2S2EXT_IRQn
@ SPI2_I2S2EXT_IRQn
Definition: at32f435_437.h:184
SPI3_I2S3EXT_IRQn
@ SPI3_I2S3EXT_IRQn
Definition: at32f435_437.h:199
i2s_config
static void i2s_config(i2s_data_channel_format_type format, i2s_audio_sampling_freq_type freq)
i2s configuration.
Definition: project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c:101
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c:135
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
i2s_init_type
i2s init type
Definition: at32f435_437_spi.h:274
i2s_init_type::audio_sampling_freq
i2s_audio_sampling_freq_type audio_sampling_freq
Definition: at32f435_437_spi.h:277
i2s_init_type::data_channel_format
i2s_data_channel_format_type data_channel_format
Definition: at32f435_437_spi.h:278
i2s_init_type::mclk_output_enable
confirm_state mclk_output_enable
Definition: at32f435_437_spi.h:280
i2s_init_type::audio_protocol
i2s_audio_protocol_type audio_protocol
Definition: at32f435_437_spi.h:276
i2s_init_type::operation_mode
i2s_operation_mode_type operation_mode
Definition: at32f435_437_spi.h:275
i2s_init_type::clock_polarity
i2s_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:279
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • i2s
  • spii2s_switch_halfduplex_polling
  • inc
project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • i2s
  • spii2s_switch_halfduplex_polling
  • inc
project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • i2s
  • spii2s_switch_halfduplex_polling
  • inc
project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • i2s
  • spii2s_switch_halfduplex_polling
  • src
Functions
project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • i2s
  • spii2s_switch_halfduplex_polling
  • src
project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • i2s
  • spii2s_switch_halfduplex_polling
  • src
Functions
project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • i2s
  • spii2s_switch_halfduplex_polling
  • src
project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • i2s
  • spii2s_switch_halfduplex_polling
  • src
Functions | Variables
project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | spi_config (void)
spi configuration. More...
static void | i2s_config (i2s_operation_mode_type i2s3_mode, i2s_operation_mode_type i2s2_mode)
i2s configuration. More...
error_status | buffer_compare (uint16_t *pbuffer1, uint16_t *pbuffer2, uint16_t buffer_length)
buffer_compare function. More...
int | main (void)
main function. More...

Variables

uint16_t | i2s3_buffer_tx [32]
uint16_t | spi3_buffer_tx [32]
uint16_t | i2s2_buffer_rx [32]
uint16_t | spi2_buffer_rx [32]
__IO uint32_t | tx_index = 0
__IO uint32_t | rx_index = 0
volatile error_status | transfer_status1 = ERROR
volatile error_status | transfer_status2 = ERROR
volatile error_status | transfer_status3 = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c.

Function Documentation

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 15

< gpio pins number 3

< gpio pins number 5

< gpio pins number 0

< gpio pins number 1

< gpio pins number 4

Definition at line 146 of file project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c.

◆ i2s_config()

static void i2s_config | ( | i2s_operation_mode_type | i2s3_mode,
 |  | i2s_operation_mode_type | i2s2_mode
 | ) |  |
static

i2s configuration.

Parameters
none
Return values
none

Definition at line 87 of file project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c.

◆ spi_config()

static void spi_config ( void )
static

spi configuration.

Parameters
none
Return values
none

Definition at line 114 of file project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • i2s
  • spii2s_switch_halfduplex_polling
  • src
project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38uint16_t i2s3_buffer_tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C,
39 0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718,
40 0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324,
41 0x2526, 0x2728, 0x292A, 0x2B2C, 0x2D2E, 0x2F30,
42 0x3132, 0x3334, 0x3536, 0x3738, 0x393A, 0x3B3C,
43 0x3D3E, 0x3F40
44 };
45uint16_t spi3_buffer_tx[32] = {0x5152, 0x5354, 0x5556, 0x5758, 0x595A, 0x5B5C,
46 0x5D5E, 0x5F60, 0x6162, 0x6364, 0x6566, 0x6768,
47 0x696A, 0x6B6C, 0x6D6E, 0x6F70, 0x7172, 0x7374,
48 0x7576, 0x7778, 0x797A, 0x7B7C, 0x7D7E, 0x7F80,
49 0x8182, 0x8384, 0x8586, 0x8788, 0x898A, 0x8B8C,
50 0x8D8E, 0x8F90
51 };
52uint16_t i2s2_buffer_rx[32];
53uint16_t spi2_buffer_rx[32];
54__IO uint32_t tx_index = 0, rx_index = 0;
55volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR, transfer_status3 = ERROR;
56
57static void gpio_config(void);
58static void spi_config(void);
59static void i2s_config(i2s_operation_mode_type i2s3_mode, i2s_operation_mode_type i2s2_mode);
60 error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
61
67 error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length)
68{
69 while(buffer_length--)
70 {
71 if(*pbuffer1 != *pbuffer2)
72 {
73 return ERROR;
74 }
75
76 pbuffer1++;
77 pbuffer2++;
78 }
79 return SUCCESS;
80}
81
87static void i2s_config(i2s_operation_mode_type i2s3_mode, i2s_operation_mode_type i2s2_mode)
88{
89 i2s_init_type i2s_init_struct;
90
91 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
92 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
93
94 spi_i2s_reset(SPI2);
95 spi_i2s_reset(SPI3);
96 i2s_default_para_init(&i2s_init_struct);
97 i2s_init_struct.audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
98 i2s_init_struct.data_channel_format = I2S_DATA_16BIT_CHANNEL_32BIT;
99 i2s_init_struct.mclk_output_enable = FALSE;
100 i2s_init_struct.audio_sampling_freq = I2S_AUDIO_FREQUENCY_48K;
101 i2s_init_struct.clock_polarity = I2S_CLOCK_POLARITY_LOW;
102 i2s_init_struct.operation_mode = i2s3_mode;
103 i2s_init(SPI3, &i2s_init_struct);
104
105 i2s_init_struct.operation_mode =i2s2_mode;
106 i2s_init(SPI2, &i2s_init_struct);
107}
108
114static void spi_config(void)
115{
116 spi_init_type spi_init_struct;
117 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
118 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
119
120 spi_i2s_reset(SPI2);
121 spi_i2s_reset(SPI3);
122 spi_default_para_init(&spi_init_struct);
123 spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX;
124 spi_init_struct.master_slave_mode =SPI_MODE_MASTER;
125 spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
126 spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
127 spi_init_struct.frame_bit_num = SPI_FRAME_16BIT;
128 spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
129 spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
130 spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
131 spi_init(SPI3, &spi_init_struct);
132
133 spi_init_struct.transmission_mode = SPI_TRANSMIT_SIMPLEX_RX;
134 spi_init_struct.master_slave_mode =SPI_MODE_SLAVE;
135 spi_init(SPI2, &spi_init_struct);
136
137 spi_enable(SPI2, TRUE);
138 spi_enable(SPI3, TRUE);
139}
140
146static void gpio_config(void)
147{
148 gpio_init_type gpio_initstructure;
149 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
150 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
151 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
152
153 /* spi3/i2s3 ws pin */
154 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
155 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
156 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
157 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
158 gpio_initstructure.gpio_pins = GPIO_PINS_15;
159 gpio_init(GPIOA, &gpio_initstructure);
160 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE15, GPIO_MUX_6);
161
162 /* spi3/i2s3 ck pin */
163 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
164 gpio_initstructure.gpio_pins = GPIO_PINS_3;
165 gpio_init(GPIOB, &gpio_initstructure);
166 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE3, GPIO_MUX_6);
167
168 /* spi3/i2s3 sd pin */
169 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
170 gpio_initstructure.gpio_pins = GPIO_PINS_5;
171 gpio_init(GPIOB, &gpio_initstructure);
172 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE5, GPIO_MUX_6);
173
174 /* spi2/i2s2 ws pin */
175 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
176 gpio_initstructure.gpio_pins = GPIO_PINS_0;
177 gpio_init(GPIOD, &gpio_initstructure);
178 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE0, GPIO_MUX_7);
179
180 /* spi2/i2s2 ck pin */
181 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
182 gpio_initstructure.gpio_pins = GPIO_PINS_1;
183 gpio_init(GPIOD, &gpio_initstructure);
184 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6);
185
186 /* spi2/i2s2 sd pin */
187 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
188 gpio_initstructure.gpio_pins = GPIO_PINS_4;
189 gpio_init(GPIOD, &gpio_initstructure);
190 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_6);
191}
192
198int main(void)
199{
200 __IO uint32_t index = 0;
201 system_clock_config();
202 at32_board_init();
203 at32_led_off(LED2);
204 at32_led_off(LED3);
205 at32_led_off(LED4);
206 gpio_config();
207 i2s_config(I2S_MODE_MASTER_TX, I2S_MODE_SLAVE_RX);
208 i2s_enable(SPI2, TRUE);
209 i2s_enable(SPI3, TRUE);
210 while(rx_index < 32)
211 {
212 while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET);
213 spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]);
214 while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
215 i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
216 }
217
218 /* test result:the data check */
219 transfer_status1 = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, 32);
220
221 tx_index = 0;
222 rx_index = 0;
223 spi_config();
224 while(rx_index < 32)
225 {
226 while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET);
227 spi_i2s_data_transmit(SPI3, spi3_buffer_tx[tx_index++]);
228 while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
229 spi2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
230 }
231
232 /* test result:the data check */
233 transfer_status2 = buffer_compare(spi2_buffer_rx, spi3_buffer_tx, 32);
234
235 for(index = 0; index < 32; index++) i2s2_buffer_rx[index] = 0;
236 tx_index = 0;
237 rx_index = 0;
238 i2s_config(I2S_MODE_SLAVE_TX, I2S_MODE_MASTER_RX);
239 while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET);
240 spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]);
241 i2s_enable(SPI3, TRUE);
242 i2s_enable(SPI2, TRUE);
243 while(rx_index < 32)
244 {
245 while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
246 i2s2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
247 while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET);
248 spi_i2s_data_transmit(SPI3, i2s3_buffer_tx[tx_index++]);
249 }
250
251 /* test result:the data check */
252 transfer_status3 = buffer_compare(i2s2_buffer_rx, i2s3_buffer_tx, 32);
253
254 /* test result indicate:if success ,led2 lights */
255 if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS) && (transfer_status3 == SUCCESS))
256 {
257 at32_led_on(LED2);
258 }
259 else
260 {
261 at32_led_off(LED2);
262 }
263 while(1)
264 {
265 }
266}
267
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
i2s3_buffer_tx
uint16_t i2s3_buffer_tx[32]
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:38
tx_index
__IO uint32_t tx_index
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:54
transfer_status3
volatile error_status transfer_status3
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:55
spi3_buffer_tx
uint16_t spi3_buffer_tx[32]
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:45
transfer_status1
volatile error_status transfer_status1
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:55
transfer_status2
volatile error_status transfer_status2
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:55
spi2_buffer_rx
uint16_t spi2_buffer_rx[32]
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:53
rx_index
__IO uint32_t rx_index
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:54
i2s2_buffer_rx
uint16_t i2s2_buffer_rx[32]
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:52
spi_init_struct
spi_init_type spi_init_struct
Definition: project/at_start_f435/examples/spi/fullduplex_polling/src/main.c:40
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_SPI3_PERIPH_CLOCK
@ CRM_SPI3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:139
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_SPI2_PERIPH_CLOCK
@ CRM_SPI2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:138
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PINS_SOURCE15
@ GPIO_PINS_SOURCE15
Definition: at32f435_437_gpio.h:148
GPIO_PINS_SOURCE5
@ GPIO_PINS_SOURCE5
Definition: at32f435_437_gpio.h:138
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_6
@ GPIO_MUX_6
Definition: at32f435_437_gpio.h:162
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
SPI_I2S_TDBE_FLAG
#define SPI_I2S_TDBE_FLAG
Definition: at32f435_437_spi.h:54
SPI_I2S_RDBF_FLAG
#define SPI_I2S_RDBF_FLAG
Definition: at32f435_437_spi.h:53
i2s_init
void i2s_init(spi_type *spi_x, i2s_init_type *i2s_init_struct)
i2s init config with its setting value.
Definition: at32f435_437_spi.c:350
spi_i2s_data_transmit
void spi_i2s_data_transmit(spi_type *spi_x, uint16_t tx_data)
spi/i2s data transmit
Definition: at32f435_437_spi.c:548
spi_i2s_flag_get
flag_status spi_i2s_flag_get(spi_type *spi_x, uint32_t spi_i2s_flag)
get flag of the specified spi/i2s peripheral.
Definition: at32f435_437_spi.c:583
i2s_enable
void i2s_enable(spi_type *spi_x, confirm_state new_state)
enable or disable i2s.
Definition: at32f435_437_spi.c:479
spi_init
void spi_init(spi_type *spi_x, spi_init_type *spi_init_struct)
spi init config with its setting value.
Definition: at32f435_437_spi.c:101
spi_default_para_init
void spi_default_para_init(spi_init_type *spi_init_struct)
spi init config with its default value.
Definition: at32f435_437_spi.c:81
spi_i2s_data_receive
uint16_t spi_i2s_data_receive(spi_type *spi_x)
spi/i2s data receive
Definition: at32f435_437_spi.c:560
spi_i2s_reset
void spi_i2s_reset(spi_type *spi_x)
spi reset by crm reset register
Definition: at32f435_437_spi.c:51
i2s_default_para_init
void i2s_default_para_init(i2s_init_type *i2s_init_struct)
i2s init config with its default value.
Definition: at32f435_437_spi.c:332
spi_enable
void spi_enable(spi_type *spi_x, confirm_state new_state)
enable or disable spi.
Definition: at32f435_437_spi.c:321
i2s_operation_mode_type
i2s_operation_mode_type
i2s operation mode type
Definition: at32f435_437_spi.h:239
I2S_CLOCK_POLARITY_LOW
@ I2S_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:251
SPI_MODE_SLAVE
@ SPI_MODE_SLAVE
Definition: at32f435_437_spi.h:99
SPI_MODE_MASTER
@ SPI_MODE_MASTER
Definition: at32f435_437_spi.h:100
I2S_DATA_16BIT_CHANNEL_32BIT
@ I2S_DATA_16BIT_CHANNEL_32BIT
Definition: at32f435_437_spi.h:230
SPI_CLOCK_PHASE_2EDGE
@ SPI_CLOCK_PHASE_2EDGE
Definition: at32f435_437_spi.h:118
I2S_AUDIO_FREQUENCY_48K
@ I2S_AUDIO_FREQUENCY_48K
Definition: at32f435_437_spi.h:219
SPI_CS_SOFTWARE_MODE
@ SPI_CS_SOFTWARE_MODE
Definition: at32f435_437_spi.h:127
SPI_FIRST_BIT_MSB
@ SPI_FIRST_BIT_MSB
Definition: at32f435_437_spi.h:153
SPI_CLOCK_POLARITY_LOW
@ SPI_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:108
SPI_TRANSMIT_HALF_DUPLEX_TX
@ SPI_TRANSMIT_HALF_DUPLEX_TX
Definition: at32f435_437_spi.h:165
SPI_TRANSMIT_SIMPLEX_RX
@ SPI_TRANSMIT_SIMPLEX_RX
Definition: at32f435_437_spi.h:163
I2S_AUDIO_PROTOCOL_PHILLIPS
@ I2S_AUDIO_PROTOCOL_PHILLIPS
Definition: at32f435_437_spi.h:200
SPI_MCLK_DIV_8
@ SPI_MCLK_DIV_8
Definition: at32f435_437_spi.h:138
SPI_FRAME_16BIT
@ SPI_FRAME_16BIT
Definition: at32f435_437_spi.h:91
I2S_MODE_MASTER_TX
@ I2S_MODE_MASTER_TX
Definition: at32f435_437_spi.h:242
I2S_MODE_MASTER_RX
@ I2S_MODE_MASTER_RX
Definition: at32f435_437_spi.h:243
I2S_MODE_SLAVE_RX
@ I2S_MODE_SLAVE_RX
Definition: at32f435_437_spi.h:241
I2S_MODE_SLAVE_TX
@ I2S_MODE_SLAVE_TX
Definition: at32f435_437_spi.h:240
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
spi_config
static void spi_config(void)
spi configuration.
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:114
i2s_config
static void i2s_config(i2s_operation_mode_type i2s3_mode, i2s_operation_mode_type i2s2_mode)
i2s configuration.
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:87
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:146
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
i2s_init_type
i2s init type
Definition: at32f435_437_spi.h:274
i2s_init_type::audio_sampling_freq
i2s_audio_sampling_freq_type audio_sampling_freq
Definition: at32f435_437_spi.h:277
i2s_init_type::data_channel_format
i2s_data_channel_format_type data_channel_format
Definition: at32f435_437_spi.h:278
i2s_init_type::mclk_output_enable
confirm_state mclk_output_enable
Definition: at32f435_437_spi.h:280
i2s_init_type::audio_protocol
i2s_audio_protocol_type audio_protocol
Definition: at32f435_437_spi.h:276
i2s_init_type::operation_mode
i2s_operation_mode_type operation_mode
Definition: at32f435_437_spi.h:275
i2s_init_type::clock_polarity
i2s_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:279
spi_init_type
spi init type
Definition: at32f435_437_spi.h:259
spi_init_type::master_slave_mode
spi_master_slave_mode_type master_slave_mode
Definition: at32f435_437_spi.h:261
spi_init_type::first_bit_transmission
spi_first_bit_type first_bit_transmission
Definition: at32f435_437_spi.h:263
spi_init_type::frame_bit_num
spi_frame_bit_num_type frame_bit_num
Definition: at32f435_437_spi.h:264
spi_init_type::clock_polarity
spi_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:265
spi_init_type::cs_mode_selection
spi_cs_mode_type cs_mode_selection
Definition: at32f435_437_spi.h:267
spi_init_type::mclk_freq_division
spi_mclk_freq_div_type mclk_freq_division
Definition: at32f435_437_spi.h:262
spi_init_type::transmission_mode
spi_transmission_mode_type transmission_mode
Definition: at32f435_437_spi.h:260
spi_init_type::clock_phase
spi_clock_phase_type clock_phase
Definition: at32f435_437_spi.h:266
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • irtmr
  • irtmr_output
  • inc
project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • irtmr
  • irtmr_output
  • inc
project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • irtmr
  • irtmr_output
  • inc
project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • irtmr
  • irtmr_output
  • src
Functions
project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • irtmr
  • irtmr_output
  • src
project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • irtmr
  • irtmr_output
  • src
Functions
project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • irtmr
  • irtmr_output
  • src
project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • irtmr
  • irtmr_output
  • src
Functions | Variables
project/at_start_f437/examples/irtmr/irtmr_output/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | crm_configuration (void)
configures the different system clocks. More...
void | gpio_configuration (void)
configure the tmr10 pin and irtmr pin. More...
int | main (void)
main function. More...

Variables

tmr_output_config_type tmr_oc_init_structure
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | ccr1_val = 249
uint16_t | ccr2_val = 24
uint16_t | prescalervalue = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/irtmr/irtmr_output/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • irtmr
  • irtmr_output
  • src
project/at_start_f437/examples/irtmr/irtmr_output/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_output_config_type tmr_oc_init_structure;
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40
41uint16_t ccr1_val = 249;
42uint16_t ccr2_val = 24;
43uint16_t prescalervalue = 0;
44
45void crm_configuration(void);
46void gpio_configuration(void);
47
53int main(void)
54{
55 system_clock_config();
56
57 /* system clocks configuration */
58 crm_configuration();
59
60 /* get system clock */
61 crm_clocks_freq_get(&crm_clocks_freq_struct);
62
63 /* gpio configuration */
64 gpio_configuration();
65
66 /* irtmr configuration */
67 scfg_infrared_config(SCFG_IR_SOURCE_TMR10, SCFG_IR_POLARITY_NO_AFFECTE);
68
69 /* compute the prescaler value */
70 prescalervalue = (uint16_t) ((crm_clocks_freq_struct.apb1_freq * 2) / 1000000) - 1;
71
72 /* tmr10 time base configuration */
73 tmr_base_init(TMR10, 665, prescalervalue);
74 tmr_cnt_dir_set(TMR10, TMR_COUNT_UP);
75 tmr_clock_source_div_set(TMR10, TMR_CLOCK_DIV1);
76
77 tmr_output_default_para_init(&tmr_oc_init_structure);
78 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
79 tmr_oc_init_structure.oc_idle_state = FALSE;
80 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
81 tmr_oc_init_structure.oc_output_state = TRUE;
82 tmr_output_channel_config(TMR10, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
83 tmr_channel_value_set(TMR10, TMR_SELECT_CHANNEL_1, ccr1_val);
84 tmr_output_channel_buffer_enable(TMR10, TMR_SELECT_CHANNEL_1, TRUE);
85
86 tmr_period_buffer_enable(TMR10, TRUE);
87
88 /* tmr11 time base configuration */
89 tmr_base_init(TMR11, 65, prescalervalue);
90 tmr_cnt_dir_set(TMR11, TMR_COUNT_UP);
91 tmr_clock_source_div_set(TMR11, TMR_CLOCK_DIV1);
92
93 tmr_output_default_para_init(&tmr_oc_init_structure);
94 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
95 tmr_oc_init_structure.oc_idle_state = FALSE;
96 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
97 tmr_oc_init_structure.oc_output_state = TRUE;
98 tmr_output_channel_config(TMR11, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
99 tmr_channel_value_set(TMR11, TMR_SELECT_CHANNEL_1, ccr2_val);
100 tmr_output_channel_buffer_enable(TMR11, TMR_SELECT_CHANNEL_1, TRUE);
101
102 tmr_period_buffer_enable(TMR11, TRUE);
103
104 /* tmr enable counter */
105 tmr_counter_enable(TMR10, TRUE);
106 tmr_counter_enable(TMR11, TRUE);
107
108 while(1)
109 {
110 }
111}
112
118void gpio_configuration(void)
119{
120 gpio_init_type gpio_init_struct;
121
122 gpio_default_para_init(&gpio_init_struct);
123
124 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9;
125 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
126 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
127 gpio_init(GPIOB, &gpio_init_struct);
128
129 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_3);
130 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE9, GPIO_MUX_0);
131}
132
138void crm_configuration(void)
139{
140 /* tmr10 clock enable */
141 crm_periph_clock_enable(CRM_TMR10_PERIPH_CLOCK, TRUE);
142
143 /* tmr11 clock enable */
144 crm_periph_clock_enable(CRM_TMR11_PERIPH_CLOCK, TRUE);
145
146 /* gpioa gpiob clock enable */
147 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
148
149 /* gpioa scfg clock enable */
150 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
151}
152
153
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
ccr1_val
uint16_t ccr1_val
Definition: project/at_start_f437/examples/irtmr/irtmr_output/src/main.c:41
prescalervalue
uint16_t prescalervalue
Definition: project/at_start_f437/examples/irtmr/irtmr_output/src/main.c:43
ccr2_val
uint16_t ccr2_val
Definition: project/at_start_f437/examples/irtmr/irtmr_output/src/main.c:42
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f437/examples/irtmr/irtmr_output/src/main.c:38
crm_configuration
void crm_configuration(void)
configures the different system clocks.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:138
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/irtmr/irtmr_output/src/main.c:39
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR10_PERIPH_CLOCK
@ CRM_TMR10_PERIPH_CLOCK
Definition: at32f435_437_crm.h:165
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_TMR11_PERIPH_CLOCK
@ CRM_TMR11_PERIPH_CLOCK
Definition: at32f435_437_crm.h:166
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_MUX_0
@ GPIO_MUX_0
Definition: at32f435_437_gpio.h:156
GPIO_MUX_3
@ GPIO_MUX_3
Definition: at32f435_437_gpio.h:159
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
scfg_infrared_config
void scfg_infrared_config(scfg_ir_source_type source, scfg_ir_polarity_type polarity)
scfg infrared config
Definition: at32f435_437_scfg.c:83
SCFG_IR_SOURCE_TMR10
@ SCFG_IR_SOURCE_TMR10
Definition: at32f435_437_scfg.h:70
SCFG_IR_POLARITY_NO_AFFECTE
@ SCFG_IR_POLARITY_NO_AFFECTE
Definition: at32f435_437_scfg.h:80
tmr_period_buffer_enable
void tmr_period_buffer_enable(tmr_type *tmr_x, confirm_state new_state)
set tmr period buffer
Definition: at32f435_437_tmr.c:638
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_output_channel_buffer_enable
void tmr_output_channel_buffer_enable(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, confirm_state new_state)
set tmr output channel buffer
Definition: at32f435_437_tmr.c:660
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR10
#define TMR10
Definition: at32f435_437_tmr.h:904
TMR11
#define TMR11
Definition: at32f435_437_tmr.h:905
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • pwc
  • deepsleep_ertc_alarm
  • inc
project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • pwc
  • deepsleep_ertc_alarm
  • inc
project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • pwc
  • deepsleep_ertc_alarm
  • inc
project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • pwc
  • deepsleep_ertc_alarm
  • src
Functions
project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • pwc
  • deepsleep_ertc_alarm
  • src
project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • pwc
  • deepsleep_ertc_alarm
  • src
Functions
project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | ERTCAlarm_IRQHandler (void)
this function handles ertc alarms interrupt request. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • pwc
  • deepsleep_ertc_alarm
  • src
project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void ERTCAlarm_IRQHandler(void)
142{
143 if(ertc_flag_get(ERTC_ALAF_FLAG) != RESET)
144 {
145 /* clear ertc alarm flag */
146 ertc_flag_clear(ERTC_ALAF_FLAG);
147
148 /* clear exint line flag */
149 exint_flag_clear(EXINT_LINE_17);
150
151 /* toggle led */
152 at32_led_toggle(LED4);
153 }
154}
155
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ERTCAlarm_IRQHandler
void ERTCAlarm_IRQHandler(void)
this function handles ertc alarms interrupt request.
Definition: project/at_start_f435/examples/ertc/calendar/src/at32f435_437_int.c:143
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
ertc_flag_get
flag_status ertc_flag_get(uint32_t flag)
get flag status.
Definition: at32f435_437_ertc.c:1474
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ERTC_ALAF_FLAG
#define ERTC_ALAF_FLAG
Definition: at32f435_437_ertc.h:74
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
EXINT_LINE_17
#define EXINT_LINE_17
Definition: at32f435_437_exint.h:69
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • pwc
  • deepsleep_ertc_alarm
  • src
Functions
project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | ertc_config (void)
ertc configuration. More...
void | ertc_alarm_config (void)
ertc alarm configuration. More...
void | ertc_alarm_value_set (uint32_t alam_index)
ertc alarm value set. More...
void | system_clock_recover (void)
system clock recover. More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • pwc
  • deepsleep_ertc_alarm
  • src
project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43void ertc_config(void)
44{
45 /* enable the pwc clock interface */
46 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
47
48 /* allow access to ertc */
49 pwc_battery_powered_domain_access(TRUE);
50
51 /* reset ertc domain */
52 crm_battery_powered_domain_reset(TRUE);
53 crm_battery_powered_domain_reset(FALSE);
54
55 /* enable the lext osc */
56 crm_clock_source_enable(CRM_CLOCK_SOURCE_LEXT, TRUE);
57
58 /* wait till lext is ready */
59 while(crm_flag_get(CRM_LEXT_STABLE_FLAG) == RESET);
60
61 /* select the ertc clock source */
62 crm_ertc_clock_select(CRM_ERTC_CLOCK_LEXT);
63
64 /* enable the ertc clock */
65 crm_ertc_clock_enable(TRUE);
66
67 /* deinitializes the ertc registers */
68 ertc_reset();
69
70 /* wait for ertc apb registers synchronisation */
71 ertc_wait_update();
72
73 /* configure the ertc data register and ertc prescaler
74 ck_spre(1hz) = ertcclk(lext) /(ertc_clk_div_a + 1)*(ertc_clk_div_b + 1)*/
75 ertc_divider_set(127, 255);
76
77 /* configure the hour format is 24-hour format*/
78 ertc_hour_mode_set(ERTC_HOUR_MODE_24);
79
80 /* set the date: friday june 11th 2021 */
81 ertc_date_set(21, 6, 11, 5);
82
83 /* set the time to 06h 20mn 00s am */
84 ertc_time_set(6, 20, 0, ERTC_AM);
85}
86
92void ertc_alarm_config(void)
93{
94 exint_init_type exint_init_struct;
95
96 /* config the exint line of the ertc alarm */
97 exint_init_struct.line_select = EXINT_LINE_17;
98 exint_init_struct.line_enable = TRUE;
99 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
100 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
101 exint_init(&exint_init_struct);
102
103 /* set the alarm 05h:20min:10s */
104 ertc_alarm_mask_set(ERTC_ALA, ERTC_ALARM_MASK_DATE_WEEK | ERTC_ALARM_MASK_HOUR | ERTC_ALARM_MASK_MIN);
105 ertc_alarm_week_date_select(ERTC_ALA, ERTC_SLECT_DATE);
106 ertc_alarm_set(ERTC_ALA, 31, 6, 20, 5, ERTC_AM);
107
108 /* enable the ertc interrupt */
109 nvic_irq_enable(ERTCAlarm_IRQn, 0, 0);
110
111 /* enable ertc alarm a interrupt */
112 ertc_interrupt_enable(ERTC_ALA_INT, TRUE);
113
114 /* enable the alarm */
115 ertc_alarm_enable(ERTC_ALA, TRUE);
116}
117
123void ertc_alarm_value_set(uint32_t alam_index)
124{
125 ertc_time_type ertc_time_struct;
126
127 /* disable the alarm */
128 ertc_alarm_enable(ERTC_ALA, FALSE);
129 ertc_calendar_get(&ertc_time_struct);
130 ertc_alarm_set(ERTC_ALA, ertc_time_struct.day, ertc_time_struct.hour, ertc_time_struct.min, (ertc_time_struct.sec + alam_index)% 60, ertc_time_struct.ampm);
131
132 /* disable the alarm */
133 ertc_alarm_enable(ERTC_ALA, TRUE);
134}
135
141void system_clock_recover(void)
142{
143 /* enable external high-speed crystal oscillator - hext */
144 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
145
146 /* wait till hext is ready */
147 while(crm_hext_stable_wait() == ERROR);
148
149 /* enable pll */
150 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
151
152 /* wait till pll is ready */
153 while(crm_flag_get(CRM_PLL_STABLE_FLAG) == RESET);
154
155 /* enable auto step mode */
156 crm_auto_step_mode_enable(TRUE);
157
158 /* select pll as system clock source */
159 crm_sysclk_switch(CRM_SCLK_PLL);
160
161 /* wait till pll is used as system clock source */
162 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL);
163}
164
170int main(void)
171{
172 __IO uint32_t systick_index = 0;
173 __IO uint32_t delay_index = 0;
174
175 /* congfig the system clock */
176 system_clock_config();
177
178 /* init at start board */
179 at32_board_init();
180
181 /* config priority group */
182 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
183
184 /* enable pwc and bpr clock */
185 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
186
187 /* config ertc */
188 ertc_config();
189
190 /* set the wakeup time: 06h:20min:5s */
191 ertc_alarm_config();
192
193 while(1)
194 {
195 /* turn off the led light */
196 at32_led_off(LED2);
197
198 /* save systick register configuration */
199 systick_index = SysTick->CTRL;
200 systick_index &= ~((uint32_t)0xFFFFFFFE);
201
202 /* disable systick */
203 SysTick->CTRL &= (uint32_t)0xFFFFFFFE;
204
205 ertc_alarm_value_set(1);
206
207 /* select system clock source as hick before ldo set */
208 crm_sysclk_switch(CRM_SCLK_HICK);
209
210 /* wait till hick is used as system clock source */
211 while(crm_sysclk_switch_status_get() != CRM_SCLK_HICK)
212 {
213 }
214
215 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V0);
216
217 /* congfig the voltage regulator mode */
218 pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER);
219
220 /* enter deep sleep mode */
221 pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI);
222
223 /* wake up from deep sleep mode, restore systick register configuration */
224 SysTick->CTRL |= systick_index;
225
226 /* turn on the led light */
227 at32_led_on(LED2);
228
229 /* wait clock stable */
230 for(delay_index = 0; delay_index < 600; delay_index++)
231 {
232 __NOP();
233 }
234
235 /* resume ldo before system clock source enhance */
236 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
237
238 /* congfig the system clock */
239 system_clock_recover();
240
241 delay_ms(500);
242 }
243}
244
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
ertc_config
void ertc_config(void)
configure the ertc peripheral.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:121
ertc_alarm_value_set
void ertc_alarm_value_set(uint32_t alam_index)
ertc alarm value set.
Definition: project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c:123
system_clock_recover
void system_clock_recover(void)
system clock recover.
Definition: project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c:141
ertc_alarm_config
void ertc_alarm_config(void)
ertc alarm configuration.
Definition: project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c:92
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_ertc_clock_select
void crm_ertc_clock_select(crm_ertc_clock_type value)
select ertc clock
Definition: at32f435_437_crm.c:434
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_ertc_clock_enable
void crm_ertc_clock_enable(confirm_state new_state)
enable or disable ertc
Definition: at32f435_437_crm.c:445
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
crm_battery_powered_domain_reset
void crm_battery_powered_domain_reset(confirm_state new_state)
battery powered domain software reset
Definition: at32f435_437_crm.c:541
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_LEXT
@ CRM_CLOCK_SOURCE_LEXT
Definition: at32f435_437_crm.h:562
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_SCLK_HICK
@ CRM_SCLK_HICK
Definition: at32f435_437_crm.h:680
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_ERTC_CLOCK_LEXT
@ CRM_ERTC_CLOCK_LEXT
Definition: at32f435_437_crm.h:632
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
CRM_LEXT_STABLE_FLAG
#define CRM_LEXT_STABLE_FLAG
Definition: at32f435_437_crm.h:58
ertc_hour_mode_set
error_status ertc_hour_mode_set(ertc_hour_mode_set_type mode)
ertc hour mode set.
Definition: at32f435_437_ertc.c:283
ertc_wait_update
error_status ertc_wait_update(void)
ertc wait register update finish.
Definition: at32f435_437_ertc.c:97
ertc_time_set
error_status ertc_time_set(uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set time.
Definition: at32f435_437_ertc.c:363
ertc_reset
error_status ertc_reset(void)
ertc reset all register.
Definition: at32f435_437_ertc.c:207
ertc_alarm_mask_set
void ertc_alarm_mask_set(ertc_alarm_type alarm_x, uint32_t mask)
set which bits are irrelevant to the alarm match.
Definition: at32f435_437_ertc.c:458
ertc_interrupt_enable
void ertc_interrupt_enable(uint32_t source, confirm_state new_state)
enable or disable interrupt.
Definition: at32f435_437_ertc.c:1386
ertc_alarm_week_date_select
void ertc_alarm_week_date_select(ertc_alarm_type alarm_x, ertc_week_date_select_type wk)
alarm week or date mode select.
Definition: at32f435_437_ertc.c:500
ertc_date_set
error_status ertc_date_set(uint8_t year, uint8_t month, uint8_t date, uint8_t week)
set date.
Definition: at32f435_437_ertc.c:314
ertc_alarm_set
void ertc_alarm_set(ertc_alarm_type alarm_x, uint8_t week_date, uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set alarm.
Definition: at32f435_437_ertc.c:538
ertc_calendar_get
void ertc_calendar_get(ertc_time_type *time)
get calendar
Definition: at32f435_437_ertc.c:404
ertc_divider_set
error_status ertc_divider_set(uint16_t div_a, uint16_t div_b)
ertc division set.
Definition: at32f435_437_ertc.c:251
ertc_alarm_enable
error_status ertc_alarm_enable(ertc_alarm_type alarm_x, confirm_state new_state)
enable or disable alarm clock.
Definition: at32f435_437_ertc.c:629
ERTC_SLECT_DATE
@ ERTC_SLECT_DATE
Definition: at32f435_437_ertc.h:135
ERTC_HOUR_MODE_24
@ ERTC_HOUR_MODE_24
Definition: at32f435_437_ertc.h:116
ERTC_ALA
@ ERTC_ALA
Definition: at32f435_437_ertc.h:144
ERTC_AM
@ ERTC_AM
Definition: at32f435_437_ertc.h:126
ERTC_ALARM_MASK_DATE_WEEK
#define ERTC_ALARM_MASK_DATE_WEEK
Definition: at32f435_437_ertc.h:90
ERTC_ALARM_MASK_HOUR
#define ERTC_ALARM_MASK_HOUR
Definition: at32f435_437_ertc.h:89
ERTC_ALARM_MASK_MIN
#define ERTC_ALARM_MASK_MIN
Definition: at32f435_437_ertc.h:88
ERTC_ALA_INT
#define ERTC_ALA_INT
Definition: at32f435_437_ertc.h:53
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_17
#define EXINT_LINE_17
Definition: at32f435_437_exint.h:69
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_battery_powered_domain_access
void pwc_battery_powered_domain_access(confirm_state new_state)
enable or disable access to the battery powered domain.
Definition: at32f435_437_pwc.c:61
pwc_voltage_regulate_set
void pwc_voltage_regulate_set(pwc_regulator_type pwc_regulator)
regulate low power consumption in the deep sleep mode
Definition: at32f435_437_pwc.c:214
pwc_deep_sleep_mode_enter
void pwc_deep_sleep_mode_enter(pwc_deep_sleep_enter_type pwc_deep_sleep_enter)
enter pwc deep-sleep mode
Definition: at32f435_437_pwc.c:190
PWC_REGULATOR_LOW_POWER
@ PWC_REGULATOR_LOW_POWER
Definition: at32f435_437_pwc.h:130
PWC_DEEP_SLEEP_ENTER_WFI
@ PWC_DEEP_SLEEP_ENTER_WFI
Definition: at32f435_437_pwc.h:120
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
PWC_LDO_OUTPUT_1V0
@ PWC_LDO_OUTPUT_1V0
Definition: at32f435_437_pwc.h:103
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
ERTCAlarm_IRQn
@ ERTCAlarm_IRQn
Definition: at32f435_437.h:189
ertc_time_type
ertc time
Definition: at32f435_437_ertc.h:383
ertc_time_type::ampm
ertc_am_pm_type ampm
Definition: at32f435_437_ertc.h:391
ertc_time_type::day
uint8_t day
Definition: at32f435_437_ertc.h:386
ertc_time_type::hour
uint8_t hour
Definition: at32f435_437_ertc.h:387
ertc_time_type::min
uint8_t min
Definition: at32f435_437_ertc.h:388
ertc_time_type::sec
uint8_t sec
Definition: at32f435_437_ertc.h:389
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • pwc
  • deepsleep_ertc_tamper
  • inc
project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • pwc
  • deepsleep_ertc_tamper
  • inc
project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • pwc
  • deepsleep_ertc_tamper
  • inc
project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • pwc
  • deepsleep_ertc_tamper
  • src
Functions
project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • pwc
  • deepsleep_ertc_tamper
  • src
project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • pwc
  • deepsleep_ertc_tamper
  • src
Functions
project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TAMP_STAMP_IRQHandler (void)
this function handles ertc tamper interrupt request. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • pwc
  • deepsleep_ertc_tamper
  • src
project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void TAMP_STAMP_IRQHandler(void)
142{
143 if(ertc_flag_get(ERTC_TP1F_FLAG) != RESET)
144 {
145 /* clear ertc alarm flag */
146 ertc_flag_clear(ERTC_TP1F_FLAG);
147
148 /* clear exint line flag */
149 exint_flag_clear(EXINT_LINE_21);
150
151 /* toggle led */
152 at32_led_toggle(LED4);
153 }
154}
155
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
TAMP_STAMP_IRQHandler
void TAMP_STAMP_IRQHandler(void)
this function handles ertc tamper and time stamp interrupts requests.
Definition: project/at_start_f435/examples/ertc/tamper/src/at32f435_437_int.c:143
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
ertc_flag_get
flag_status ertc_flag_get(uint32_t flag)
get flag status.
Definition: at32f435_437_ertc.c:1474
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ERTC_TP1F_FLAG
#define ERTC_TP1F_FLAG
Definition: at32f435_437_ertc.h:79
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
EXINT_LINE_21
#define EXINT_LINE_21
Definition: at32f435_437_exint.h:73
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • pwc
  • deepsleep_ertc_tamper
  • src
Functions
project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | ertc_config (void)
ertc configuration. More...
void | ertc_tamper_config (void)
ertc tamper configuration. More...
void | system_clock_recover (void)
system clock recover. More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • pwc
  • deepsleep_ertc_tamper
  • src
project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43void ertc_config(void)
44{
45 /* enable the pwc clock interface */
46 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
47
48 /* allow access to ertc */
49 pwc_battery_powered_domain_access(TRUE);
50
51 /* reset ertc domain */
52 crm_battery_powered_domain_reset(TRUE);
53 crm_battery_powered_domain_reset(FALSE);
54
55 /* enable the lext osc */
56 crm_clock_source_enable(CRM_CLOCK_SOURCE_LEXT, TRUE);
57
58 /* wait till lext is ready */
59 while(crm_flag_get(CRM_LEXT_STABLE_FLAG) == RESET);
60
61 /* select the ertc clock source */
62 crm_ertc_clock_select(CRM_ERTC_CLOCK_LEXT);
63
64 /* enable the ertc clock */
65 crm_ertc_clock_enable(TRUE);
66
67 /* deinitializes the ertc registers */
68 ertc_reset();
69}
70
76void ertc_tamper_config(void)
77{
78 exint_init_type exint_init_struct;
79
80 /* config the exint line of the ertc tamper */
81 exint_init_struct.line_select = EXINT_LINE_21;
82 exint_init_struct.line_enable = TRUE;
83 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
84 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
85 exint_init(&exint_init_struct);
86
87 /* enable tamper irqchannel */
88 nvic_irq_enable(TAMP_STAMP_IRQn, 0, 0);
89
90 /* disable the tamper 1 detection */
91 ertc_tamper_enable(ERTC_TAMPER_1, FALSE);
92
93 /* clear tamper 1 pin event(tamp1f) pending flag */
94 ertc_flag_clear(ERTC_TP1F_FLAG);
95
96 /* configure the tamper 1 trigger */
97 ertc_tamper_valid_edge_set(ERTC_TAMPER_1, ERTC_TAMPER_EDGE_RISING);
98
99 /* enable the tamper interrupt */
100 ertc_interrupt_enable(ERTC_TP_INT, TRUE);
101
102 /* enable the tamper 1 detection */
103 ertc_tamper_enable(ERTC_TAMPER_1, TRUE);
104}
105
111void system_clock_recover(void)
112{
113 /* enable external high-speed crystal oscillator - hext */
114 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
115
116 /* wait till hext is ready */
117 while(crm_hext_stable_wait() == ERROR);
118
119 /* enable pll */
120 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
121
122 /* wait till pll is ready */
123 while(crm_flag_get(CRM_PLL_STABLE_FLAG) == RESET);
124
125 /* enable auto step mode */
126 crm_auto_step_mode_enable(TRUE);
127
128 /* select pll as system clock source */
129 crm_sysclk_switch(CRM_SCLK_PLL);
130
131 /* wait till pll is used as system clock source */
132 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL);
133}
134
140int main(void)
141{
142 __IO uint32_t systick_index = 0;
143 __IO uint32_t delay_index = 0;
144
145 /* congfig the system clock */
146 system_clock_config();
147
148 /* init at start board */
149 at32_board_init();
150
151 /* config priority group */
152 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
153
154 /* enable pwc and bpr clock */
155 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
156
157 /* turn on the led light */
158 at32_led_on(LED2);
159
160 /* config ertc */
161 ertc_config();
162
163 /* set the wakeup time: 06h:20min:5s */
164 ertc_tamper_config();
165
166 /* save systick register configuration */
167 systick_index = SysTick->CTRL;
168 systick_index &= ~((uint32_t)0xFFFFFFFE);
169
170 /* disable systick */
171 SysTick->CTRL &= (uint32_t)0xFFFFFFFE;
172
173 /* select system clock source as hick before ldo set */
174 crm_sysclk_switch(CRM_SCLK_HICK);
175
176 /* wait till hick is used as system clock source */
177 while(crm_sysclk_switch_status_get() != CRM_SCLK_HICK)
178 {
179 }
180
181 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V0);
182
183 /* congfig the voltage regulator mode */
184 pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER);
185
186 /* enter deep sleep mode */
187 pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI);
188
189 /* wake up from deep sleep mode, restore systick register configuration */
190 SysTick->CTRL |= systick_index;
191
192 /* turn on the led light */
193 at32_led_on(LED3);
194
195 /* wait clock stable */
196 for(delay_index = 0; delay_index < 600; delay_index++)
197 {
198 __NOP();
199 }
200
201 /* resume ldo before system clock source enhance */
202 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
203
204 /* congfig the system clock */
205 system_clock_recover();
206
207 while(1)
208 {
209 }
210}
211
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
ertc_config
void ertc_config(void)
configure the ertc peripheral.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:121
ertc_tamper_config
void ertc_tamper_config(void)
configure the ertc tamper.
Definition: project/at_start_f435/examples/ertc/tamper/src/main.c:153
system_clock_recover
void system_clock_recover(void)
system clock recover.
Definition: project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c:141
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_ertc_clock_select
void crm_ertc_clock_select(crm_ertc_clock_type value)
select ertc clock
Definition: at32f435_437_crm.c:434
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_ertc_clock_enable
void crm_ertc_clock_enable(confirm_state new_state)
enable or disable ertc
Definition: at32f435_437_crm.c:445
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
crm_battery_powered_domain_reset
void crm_battery_powered_domain_reset(confirm_state new_state)
battery powered domain software reset
Definition: at32f435_437_crm.c:541
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_LEXT
@ CRM_CLOCK_SOURCE_LEXT
Definition: at32f435_437_crm.h:562
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_SCLK_HICK
@ CRM_SCLK_HICK
Definition: at32f435_437_crm.h:680
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_ERTC_CLOCK_LEXT
@ CRM_ERTC_CLOCK_LEXT
Definition: at32f435_437_crm.h:632
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
CRM_LEXT_STABLE_FLAG
#define CRM_LEXT_STABLE_FLAG
Definition: at32f435_437_crm.h:58
ertc_reset
error_status ertc_reset(void)
ertc reset all register.
Definition: at32f435_437_ertc.c:207
ertc_interrupt_enable
void ertc_interrupt_enable(uint32_t source, confirm_state new_state)
enable or disable interrupt.
Definition: at32f435_437_ertc.c:1386
ertc_tamper_enable
void ertc_tamper_enable(ertc_tamper_select_type tamper_x, confirm_state new_state)
enable or disable tamper.
Definition: at32f435_437_ertc.c:1356
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ertc_tamper_valid_edge_set
void ertc_tamper_valid_edge_set(ertc_tamper_select_type tamper_x, ertc_tamper_valid_edge_type trigger)
set the tamper trigger.
Definition: at32f435_437_ertc.c:1313
ERTC_TAMPER_EDGE_RISING
@ ERTC_TAMPER_EDGE_RISING
Definition: at32f435_437_ertc.h:346
ERTC_TAMPER_1
@ ERTC_TAMPER_1
Definition: at32f435_437_ertc.h:300
ERTC_TP1F_FLAG
#define ERTC_TP1F_FLAG
Definition: at32f435_437_ertc.h:79
ERTC_TP_INT
#define ERTC_TP_INT
Definition: at32f435_437_ertc.h:52
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_21
#define EXINT_LINE_21
Definition: at32f435_437_exint.h:73
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_battery_powered_domain_access
void pwc_battery_powered_domain_access(confirm_state new_state)
enable or disable access to the battery powered domain.
Definition: at32f435_437_pwc.c:61
pwc_voltage_regulate_set
void pwc_voltage_regulate_set(pwc_regulator_type pwc_regulator)
regulate low power consumption in the deep sleep mode
Definition: at32f435_437_pwc.c:214
pwc_deep_sleep_mode_enter
void pwc_deep_sleep_mode_enter(pwc_deep_sleep_enter_type pwc_deep_sleep_enter)
enter pwc deep-sleep mode
Definition: at32f435_437_pwc.c:190
PWC_REGULATOR_LOW_POWER
@ PWC_REGULATOR_LOW_POWER
Definition: at32f435_437_pwc.h:130
PWC_DEEP_SLEEP_ENTER_WFI
@ PWC_DEEP_SLEEP_ENTER_WFI
Definition: at32f435_437_pwc.h:120
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
PWC_LDO_OUTPUT_1V0
@ PWC_LDO_OUTPUT_1V0
Definition: at32f435_437_pwc.h:103
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
TAMP_STAMP_IRQn
@ TAMP_STAMP_IRQn
Definition: at32f435_437.h:148
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • pwc
  • deepsleep_ertc_wakeup
  • inc
project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • pwc
  • deepsleep_ertc_wakeup
  • inc
project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • pwc
  • deepsleep_ertc_wakeup
  • inc
project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • pwc
  • deepsleep_ertc_wakeup
  • src
Functions
project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • pwc
  • deepsleep_ertc_wakeup
  • src
project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • pwc
  • deepsleep_ertc_wakeup
  • src
Functions
project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | ERTC_WKUP_IRQHandler (void)
this function handles ertc wakeup timer interrupt request. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • pwc
  • deepsleep_ertc_wakeup
  • src
project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void ERTC_WKUP_IRQHandler(void)
142{
143 if(ertc_flag_get(ERTC_WATF_FLAG) != RESET)
144 {
145 /* clear ertc wakeup timer flag */
146 ertc_flag_clear(ERTC_WATF_FLAG);
147
148 /* clear exint line flag */
149 exint_flag_clear(EXINT_LINE_22);
150
151 /* toggle led */
152 at32_led_toggle(LED4);
153 }
154}
155
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ERTC_WKUP_IRQHandler
void ERTC_WKUP_IRQHandler(void)
this function handles ertc wakeup timer interrupt request.
Definition: project/at_start_f435/examples/ertc/wakeup_timer/src/at32f435_437_int.c:143
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
ertc_flag_get
flag_status ertc_flag_get(uint32_t flag)
get flag status.
Definition: at32f435_437_ertc.c:1474
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ERTC_WATF_FLAG
#define ERTC_WATF_FLAG
Definition: at32f435_437_ertc.h:76
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
EXINT_LINE_22
#define EXINT_LINE_22
Definition: at32f435_437_exint.h:74
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • pwc
  • deepsleep_ertc_wakeup
  • src
Functions
project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | ertc_config (void)
ertc configuration. More...
void | ertc_wakeup_timer_config (void)
ertc wakeup timer configuration. More...
void | system_clock_recover (void)
system clock recover. More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • pwc
  • deepsleep_ertc_wakeup
  • src
project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43void ertc_config(void)
44{
45 /* enable the pwc clock interface */
46 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
47
48 /* allow access to ertc */
49 pwc_battery_powered_domain_access(TRUE);
50
51 /* reset ertc domain */
52 crm_battery_powered_domain_reset(TRUE);
53 crm_battery_powered_domain_reset(FALSE);
54
55 /* enable the lext osc */
56 crm_clock_source_enable(CRM_CLOCK_SOURCE_LEXT, TRUE);
57
58 /* wait till lext is ready */
59 while(crm_flag_get(CRM_LEXT_STABLE_FLAG) == RESET);
60
61 /* select the ertc clock source */
62 crm_ertc_clock_select(CRM_ERTC_CLOCK_LEXT);
63
64 /* enable the ertc clock */
65 crm_ertc_clock_enable(TRUE);
66
67 /* deinitializes the ertc registers */
68 ertc_reset();
69
70 /* wait for ertc apb registers synchronisation */
71 ertc_wait_update();
72
73 /* configure the ertc data register and ertc prescaler
74 ck_spre(1hz) = ertcclk(lext) /(ertc_clk_div_a + 1)*(ertc_clk_div_b + 1)*/
75 ertc_divider_set(127, 255);
76
77 /* configure the hour format is 24-hour format*/
78 ertc_hour_mode_set(ERTC_HOUR_MODE_24);
79
80 /* set the date: friday june 11th 2021 */
81 ertc_date_set(21, 6, 11, 5);
82
83 /* set the time to 06h 20mn 00s am */
84 ertc_time_set(6, 20, 0, ERTC_AM);
85}
86
92void ertc_wakeup_timer_config(void)
93{
94 exint_init_type exint_init_struct;
95
96 /* config the exint line of the ertc wakeup timer */
97 exint_init_struct.line_select = EXINT_LINE_22;
98 exint_init_struct.line_enable = TRUE;
99 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
100 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
101 exint_init(&exint_init_struct);
102
103 /* set wakeup timer clock 1hz */
104 ertc_wakeup_clock_set(ERTC_WAT_CLK_CK_B_16BITS);
105
106 /* set the wakeup time to 5s */
107 ertc_wakeup_counter_set(5 - 1);
108
109 /* enable the ertc interrupt */
110 nvic_irq_enable(ERTC_WKUP_IRQn, 0, 0);
111
112 /* enable ertc wakeup timer a interrupt */
113 ertc_interrupt_enable(ERTC_WAT_INT, TRUE);
114
115 /* enable the wakeup timer */
116 ertc_wakeup_enable(TRUE);
117}
118
124void system_clock_recover(void)
125{
126 /* enable external high-speed crystal oscillator - hext */
127 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
128
129 /* wait till hext is ready */
130 while(crm_hext_stable_wait() == ERROR);
131
132 /* enable pll */
133 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
134
135 /* wait till pll is ready */
136 while(crm_flag_get(CRM_PLL_STABLE_FLAG) == RESET);
137
138 /* enable auto step mode */
139 crm_auto_step_mode_enable(TRUE);
140
141 /* select pll as system clock source */
142 crm_sysclk_switch(CRM_SCLK_PLL);
143
144 /* wait till pll is used as system clock source */
145 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL);
146}
147
153int main(void)
154{
155 __IO uint32_t systick_index = 0;
156 __IO uint32_t delay_index = 0;
157
158 /* congfig the system clock */
159 system_clock_config();
160
161 /* init at start board */
162 at32_board_init();
163
164 /* config priority group */
165 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
166
167 /* enable pwc and bpr clock */
168 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
169
170 /* turn on the led light */
171 at32_led_on(LED2);
172
173 /* config ertc */
174 ertc_config();
175
176 /* config the wakeup timer */
177 ertc_wakeup_timer_config();
178
179 /* save systick register configuration */
180 systick_index = SysTick->CTRL;
181 systick_index &= ~((uint32_t)0xFFFFFFFE);
182
183 /* disable systick */
184 SysTick->CTRL &= (uint32_t)0xFFFFFFFE;
185
186 /* select system clock source as hick before ldo set */
187 crm_sysclk_switch(CRM_SCLK_HICK);
188
189 /* wait till hick is used as system clock source */
190 while(crm_sysclk_switch_status_get() != CRM_SCLK_HICK)
191 {
192 }
193
194 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V0);
195
196 /* congfig the voltage regulator mode */
197 pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER);
198
199 /* enter deep sleep mode */
200 pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI);
201
202 /* wake up from deep sleep mode, restore systick register configuration */
203 SysTick->CTRL |= systick_index;
204
205 /* turn on the led light */
206 at32_led_on(LED3);
207
208 /* wait clock stable */
209 for(delay_index = 0; delay_index < 600; delay_index++)
210 {
211 __NOP();
212 }
213
214 /* resume ldo before system clock source enhance */
215 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
216
217 /* congfig the system clock */
218 system_clock_recover();
219
220 while(1)
221 {
222 }
223}
224
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
ertc_config
void ertc_config(void)
configure the ertc peripheral.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:121
system_clock_recover
void system_clock_recover(void)
system clock recover.
Definition: project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c:141
ertc_wakeup_timer_config
void ertc_wakeup_timer_config(void)
ertc wakeup timer configuration.
Definition: project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/main.c:92
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_ertc_clock_select
void crm_ertc_clock_select(crm_ertc_clock_type value)
select ertc clock
Definition: at32f435_437_crm.c:434
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_ertc_clock_enable
void crm_ertc_clock_enable(confirm_state new_state)
enable or disable ertc
Definition: at32f435_437_crm.c:445
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
crm_battery_powered_domain_reset
void crm_battery_powered_domain_reset(confirm_state new_state)
battery powered domain software reset
Definition: at32f435_437_crm.c:541
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_LEXT
@ CRM_CLOCK_SOURCE_LEXT
Definition: at32f435_437_crm.h:562
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_SCLK_HICK
@ CRM_SCLK_HICK
Definition: at32f435_437_crm.h:680
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_ERTC_CLOCK_LEXT
@ CRM_ERTC_CLOCK_LEXT
Definition: at32f435_437_crm.h:632
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
CRM_LEXT_STABLE_FLAG
#define CRM_LEXT_STABLE_FLAG
Definition: at32f435_437_crm.h:58
ertc_hour_mode_set
error_status ertc_hour_mode_set(ertc_hour_mode_set_type mode)
ertc hour mode set.
Definition: at32f435_437_ertc.c:283
ertc_wakeup_clock_set
void ertc_wakeup_clock_set(ertc_wakeup_clock_type clock)
set wakeup timer clock.
Definition: at32f435_437_ertc.c:731
ertc_wait_update
error_status ertc_wait_update(void)
ertc wait register update finish.
Definition: at32f435_437_ertc.c:97
ertc_wakeup_counter_set
void ertc_wakeup_counter_set(uint32_t counter)
set wakeup counter.
Definition: at32f435_437_ertc.c:747
ertc_time_set
error_status ertc_time_set(uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set time.
Definition: at32f435_437_ertc.c:363
ertc_reset
error_status ertc_reset(void)
ertc reset all register.
Definition: at32f435_437_ertc.c:207
ertc_interrupt_enable
void ertc_interrupt_enable(uint32_t source, confirm_state new_state)
enable or disable interrupt.
Definition: at32f435_437_ertc.c:1386
ertc_wakeup_enable
error_status ertc_wakeup_enable(confirm_state new_state)
enable or disable wakeup timer.
Definition: at32f435_437_ertc.c:773
ertc_date_set
error_status ertc_date_set(uint8_t year, uint8_t month, uint8_t date, uint8_t week)
set date.
Definition: at32f435_437_ertc.c:314
ertc_divider_set
error_status ertc_divider_set(uint16_t div_a, uint16_t div_b)
ertc division set.
Definition: at32f435_437_ertc.c:251
ERTC_HOUR_MODE_24
@ ERTC_HOUR_MODE_24
Definition: at32f435_437_ertc.h:116
ERTC_WAT_CLK_CK_B_16BITS
@ ERTC_WAT_CLK_CK_B_16BITS
Definition: at32f435_437_ertc.h:180
ERTC_AM
@ ERTC_AM
Definition: at32f435_437_ertc.h:126
ERTC_WAT_INT
#define ERTC_WAT_INT
Definition: at32f435_437_ertc.h:55
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_22
#define EXINT_LINE_22
Definition: at32f435_437_exint.h:74
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_battery_powered_domain_access
void pwc_battery_powered_domain_access(confirm_state new_state)
enable or disable access to the battery powered domain.
Definition: at32f435_437_pwc.c:61
pwc_voltage_regulate_set
void pwc_voltage_regulate_set(pwc_regulator_type pwc_regulator)
regulate low power consumption in the deep sleep mode
Definition: at32f435_437_pwc.c:214
pwc_deep_sleep_mode_enter
void pwc_deep_sleep_mode_enter(pwc_deep_sleep_enter_type pwc_deep_sleep_enter)
enter pwc deep-sleep mode
Definition: at32f435_437_pwc.c:190
PWC_REGULATOR_LOW_POWER
@ PWC_REGULATOR_LOW_POWER
Definition: at32f435_437_pwc.h:130
PWC_DEEP_SLEEP_ENTER_WFI
@ PWC_DEEP_SLEEP_ENTER_WFI
Definition: at32f435_437_pwc.h:120
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
PWC_LDO_OUTPUT_1V0
@ PWC_LDO_OUTPUT_1V0
Definition: at32f435_437_pwc.h:103
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
ERTC_WKUP_IRQn
@ ERTC_WKUP_IRQn
Definition: at32f435_437.h:149
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • pwc
  • ldo_set
  • inc
project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • pwc
  • ldo_set
  • inc
project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • pwc
  • ldo_set
  • inc
project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • pwc
  • ldo_set
  • src
Functions
project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • pwc
  • ldo_set
  • src
project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • pwc
  • ldo_set
  • src
Functions
project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TAMP_STAMP_IRQHandler (void)
this function handles ertc tamper interrupt request. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • pwc
  • ldo_set
  • src
project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void TAMP_STAMP_IRQHandler(void)
142{
143 if(ertc_flag_get(ERTC_TP1F_FLAG) != RESET)
144 {
145 /* clear ertc alarm flag */
146 ertc_flag_clear(ERTC_TP1F_FLAG);
147
148 /* clear exint line flag */
149 exint_flag_clear(EXINT_LINE_21);
150
151 /* toggle led */
152 at32_led_toggle(LED4);
153 }
154}
155
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
TAMP_STAMP_IRQHandler
void TAMP_STAMP_IRQHandler(void)
this function handles ertc tamper and time stamp interrupts requests.
Definition: project/at_start_f435/examples/ertc/tamper/src/at32f435_437_int.c:143
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
ertc_flag_get
flag_status ertc_flag_get(uint32_t flag)
get flag status.
Definition: at32f435_437_ertc.c:1474
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ERTC_TP1F_FLAG
#define ERTC_TP1F_FLAG
Definition: at32f435_437_ertc.h:79
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
EXINT_LINE_21
#define EXINT_LINE_21
Definition: at32f435_437_exint.h:73
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • pwc
  • ldo_set
  • src
Functions
project/at_start_f437/examples/pwc/ldo_set/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | ertc_config (void)
ertc configuration. More...
void | ertc_tamper_config (void)
ertc tamper configuration. More...
void | system_clock_recover (void)
system clock recover. More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/ldo_set/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • pwc
  • ldo_set
  • src
project/at_start_f437/examples/pwc/ldo_set/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43void ertc_config(void)
44{
45 /* enable the pwc clock interface */
46 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
47
48 /* allow access to ertc */
49 pwc_battery_powered_domain_access(TRUE);
50
51 /* reset ertc domain */
52 crm_battery_powered_domain_reset(TRUE);
53 crm_battery_powered_domain_reset(FALSE);
54
55 /* enable the lext osc */
56 crm_clock_source_enable(CRM_CLOCK_SOURCE_LEXT, TRUE);
57
58 /* wait till lext is ready */
59 while(crm_flag_get(CRM_LEXT_STABLE_FLAG) == RESET);
60
61 /* select the ertc clock source */
62 crm_ertc_clock_select(CRM_ERTC_CLOCK_LEXT);
63
64 /* enable the ertc clock */
65 crm_ertc_clock_enable(TRUE);
66
67 /* deinitializes the ertc registers */
68 ertc_reset();
69}
70
76void ertc_tamper_config(void)
77{
78 exint_init_type exint_init_struct;
79
80 /* config the exint line of the ertc tamper */
81 exint_init_struct.line_select = EXINT_LINE_21;
82 exint_init_struct.line_enable = TRUE;
83 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
84 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
85 exint_init(&exint_init_struct);
86
87 /* enable tamper irqchannel */
88 nvic_irq_enable(TAMP_STAMP_IRQn, 0, 0);
89
90 /* disable the tamper 1 detection */
91 ertc_tamper_enable(ERTC_TAMPER_1, FALSE);
92
93 /* clear tamper 1 pin event(tamp1f) pending flag */
94 ertc_flag_clear(ERTC_TP1F_FLAG);
95
96 /* configure the tamper 1 trigger */
97 ertc_tamper_valid_edge_set(ERTC_TAMPER_1, ERTC_TAMPER_EDGE_RISING);
98
99 /* enable the tamper interrupt */
100 ertc_interrupt_enable(ERTC_TP_INT, TRUE);
101
102 /* enable the tamper 1 detection */
103 ertc_tamper_enable(ERTC_TAMPER_1, TRUE);
104}
105
111void system_clock_recover(void)
112{
113 /* enable external high-speed crystal oscillator - hext */
114 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
115
116 /* wait till hext is ready */
117 while(crm_hext_stable_wait() == ERROR);
118
119 /* enable pll */
120 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
121
122 /* wait till pll is ready */
123 while(crm_flag_get(CRM_PLL_STABLE_FLAG) == RESET);
124
125 /* enable auto step mode */
126 crm_auto_step_mode_enable(TRUE);
127
128 /* select pll as system clock source */
129 crm_sysclk_switch(CRM_SCLK_PLL);
130
131 /* wait till pll is used as system clock source */
132 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL);
133}
134
135
141int main(void)
142{
143 __IO uint32_t systick_index = 0;
144 __IO uint32_t delay_index = 0;
145
146 /* congfig the system clock */
147 system_clock_config();
148
149 /* init at start board */
150 at32_board_init();
151
152 /* config priority group */
153 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
154
155 /* turn on the led light */
156 at32_led_on(LED2);
157 at32_led_on(LED3);
158 at32_led_on(LED4);
159
160 /* enable pwc clock */
161 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
162
163 /* config ertc */
164 ertc_config();
165
166 /* set the wakeup time: 06h:20min:5s */
167 ertc_tamper_config();
168
169 while(1)
170 {
171 at32_led_toggle(LED3);
172
173 /* save systick register configuration */
174 systick_index = SysTick->CTRL;
175 systick_index &= ~((uint32_t)0xFFFFFFFE);
176
177 /* disable systick */
178 SysTick->CTRL &= (uint32_t)0xFFFFFFFE;
179
180 /* select system clock source as hick before ldo set */
181 crm_sysclk_switch(CRM_SCLK_HICK);
182
183 /* wait till hick is used as system clock source */
184 while(crm_sysclk_switch_status_get() != CRM_SCLK_HICK)
185 {
186 }
187
188 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V0);
189
190 /* congfig the voltage regulator mode */
191 pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER);
192
193 /* enter deep sleep mode */
194 pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI);
195
196 /* wake up from deep sleep mode, restore systick register configuration */
197 SysTick->CTRL |= systick_index;
198
199 /* wait clock stable */
200 for(delay_index = 0; delay_index < 600; delay_index++)
201 {
202 __NOP();
203 }
204
205 /* resume ldo before system clock source enhance */
206 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
207
208 /* congfig the system clock */
209 system_clock_recover();
210
211 }
212}
213
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
ertc_config
void ertc_config(void)
configure the ertc peripheral.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:121
ertc_tamper_config
void ertc_tamper_config(void)
configure the ertc tamper.
Definition: project/at_start_f435/examples/ertc/tamper/src/main.c:153
system_clock_recover
void system_clock_recover(void)
system clock recover.
Definition: project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c:141
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_ertc_clock_select
void crm_ertc_clock_select(crm_ertc_clock_type value)
select ertc clock
Definition: at32f435_437_crm.c:434
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_ertc_clock_enable
void crm_ertc_clock_enable(confirm_state new_state)
enable or disable ertc
Definition: at32f435_437_crm.c:445
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
crm_battery_powered_domain_reset
void crm_battery_powered_domain_reset(confirm_state new_state)
battery powered domain software reset
Definition: at32f435_437_crm.c:541
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_LEXT
@ CRM_CLOCK_SOURCE_LEXT
Definition: at32f435_437_crm.h:562
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_SCLK_HICK
@ CRM_SCLK_HICK
Definition: at32f435_437_crm.h:680
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_ERTC_CLOCK_LEXT
@ CRM_ERTC_CLOCK_LEXT
Definition: at32f435_437_crm.h:632
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
CRM_LEXT_STABLE_FLAG
#define CRM_LEXT_STABLE_FLAG
Definition: at32f435_437_crm.h:58
ertc_reset
error_status ertc_reset(void)
ertc reset all register.
Definition: at32f435_437_ertc.c:207
ertc_interrupt_enable
void ertc_interrupt_enable(uint32_t source, confirm_state new_state)
enable or disable interrupt.
Definition: at32f435_437_ertc.c:1386
ertc_tamper_enable
void ertc_tamper_enable(ertc_tamper_select_type tamper_x, confirm_state new_state)
enable or disable tamper.
Definition: at32f435_437_ertc.c:1356
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ertc_tamper_valid_edge_set
void ertc_tamper_valid_edge_set(ertc_tamper_select_type tamper_x, ertc_tamper_valid_edge_type trigger)
set the tamper trigger.
Definition: at32f435_437_ertc.c:1313
ERTC_TAMPER_EDGE_RISING
@ ERTC_TAMPER_EDGE_RISING
Definition: at32f435_437_ertc.h:346
ERTC_TAMPER_1
@ ERTC_TAMPER_1
Definition: at32f435_437_ertc.h:300
ERTC_TP1F_FLAG
#define ERTC_TP1F_FLAG
Definition: at32f435_437_ertc.h:79
ERTC_TP_INT
#define ERTC_TP_INT
Definition: at32f435_437_ertc.h:52
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_21
#define EXINT_LINE_21
Definition: at32f435_437_exint.h:73
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_battery_powered_domain_access
void pwc_battery_powered_domain_access(confirm_state new_state)
enable or disable access to the battery powered domain.
Definition: at32f435_437_pwc.c:61
pwc_voltage_regulate_set
void pwc_voltage_regulate_set(pwc_regulator_type pwc_regulator)
regulate low power consumption in the deep sleep mode
Definition: at32f435_437_pwc.c:214
pwc_deep_sleep_mode_enter
void pwc_deep_sleep_mode_enter(pwc_deep_sleep_enter_type pwc_deep_sleep_enter)
enter pwc deep-sleep mode
Definition: at32f435_437_pwc.c:190
PWC_REGULATOR_LOW_POWER
@ PWC_REGULATOR_LOW_POWER
Definition: at32f435_437_pwc.h:130
PWC_DEEP_SLEEP_ENTER_WFI
@ PWC_DEEP_SLEEP_ENTER_WFI
Definition: at32f435_437_pwc.h:120
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
PWC_LDO_OUTPUT_1V0
@ PWC_LDO_OUTPUT_1V0
Definition: at32f435_437_pwc.h:103
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
TAMP_STAMP_IRQn
@ TAMP_STAMP_IRQn
Definition: at32f435_437.h:148
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • pwc
  • power_voltage_monitor
  • inc
project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • pwc
  • power_voltage_monitor
  • inc
project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • pwc
  • power_voltage_monitor
  • inc
project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • pwc
  • power_voltage_monitor
  • src
Functions
project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • pwc
  • power_voltage_monitor
  • src
project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • pwc
  • power_voltage_monitor
  • src
Functions
project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | PVM_IRQHandler (void)
This function handles the power voltage monitoring output interrupt request. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • pwc
  • power_voltage_monitor
  • src
project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void PVM_IRQHandler(void)
142{
143 if(exint_flag_get(EXINT_LINE_16) != RESET)
144 {
145 /* clear exint line flag */
146 exint_flag_clear(EXINT_LINE_16);
147
148 /* toggle led */
149 at32_led_toggle(LED2);
150 at32_led_toggle(LED3);
151 at32_led_toggle(LED4);
152 }
153}
154
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
PVM_IRQHandler
void PVM_IRQHandler(void)
This function handles the power voltage monitoring output interrupt request.
Definition: project/at_start_f435/examples/pwc/power_voltage_monitor/src/at32f435_437_int.c:141
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
exint_flag_get
flag_status exint_flag_get(uint32_t exint_line)
get exint flag
Definition: at32f435_437_exint.c:142
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
EXINT_LINE_16
#define EXINT_LINE_16
Definition: at32f435_437_exint.h:68
RESET
@ RESET
Definition: at32f435_437.h:378
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • pwc
  • power_voltage_monitor
  • src
Functions
project/at_start_f437/examples/pwc/power_voltage_monitor/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | pvm_exint_config (void)
power voltage monitor exint configuration. More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/power_voltage_monitor/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • pwc
  • power_voltage_monitor
  • src
project/at_start_f437/examples/pwc/power_voltage_monitor/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43void pvm_exint_config(void)
44{
45 exint_init_type exint_init_struct;
46
47 /* config the exint line of the power voltage monitor */
48 exint_init_struct.line_select = EXINT_LINE_16;
49 exint_init_struct.line_enable = TRUE;
50 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
51 exint_init_struct.line_polarity = EXINT_TRIGGER_BOTH_EDGE;
52 exint_init(&exint_init_struct);
53}
54
60int main(void)
61{
62 __IO uint32_t index = 0;
63
64 /* congfig the system clock */
65 system_clock_config();
66
67 /* init at start board */
68 at32_board_init();
69
70 /* config priority group */
71 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
72
73 /* turn on the led light */
74 at32_led_on(LED2);
75 at32_led_on(LED3);
76 at32_led_on(LED4);
77
78 /* enable pwc clock */
79 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
80
81 /* set the threshold voltage to 2.9v */
82 pwc_pvm_level_select(PWC_PVM_VOLTAGE_2V9);
83
84 /* enable power voltage monitor */
85 pwc_power_voltage_monitor_enable(TRUE);
86
87 /* config the exint line of the power voltage monitor */
88 pvm_exint_config();
89
90 /* enable power voltage monitor interrupt */
91 nvic_irq_enable(PVM_IRQn, 0, 0);
92
93 while(1)
94 {
95 }
96}
97
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
pvm_exint_config
void pvm_exint_config(void)
power voltage monitor exint configuration.
Definition: project/at_start_f435/examples/pwc/power_voltage_monitor/src/main.c:43
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_BOTH_EDGE
@ EXINT_TRIGGER_BOTH_EDGE
Definition: at32f435_437_exint.h:100
EXINT_LINE_16
#define EXINT_LINE_16
Definition: at32f435_437_exint.h:68
TRUE
@ TRUE
Definition: at32f435_437.h:379
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_power_voltage_monitor_enable
void pwc_power_voltage_monitor_enable(confirm_state new_state)
enable or disable pwc power voltage monitor (pvm)
Definition: at32f435_437_pwc.c:90
pwc_pvm_level_select
void pwc_pvm_level_select(pwc_pvm_voltage_type pvm_voltage)
select the voltage threshold detected by the power voltage detector.
Definition: at32f435_437_pwc.c:79
PWC_PVM_VOLTAGE_2V9
@ PWC_PVM_VOLTAGE_2V9
Definition: at32f435_437_pwc.h:92
PVM_IRQn
@ PVM_IRQn
Definition: at32f435_437.h:147
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • pwc
  • sleep_tmr2
  • inc
project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • pwc
  • sleep_tmr2
  • inc
project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • pwc
  • sleep_tmr2
  • inc
project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • pwc
  • sleep_tmr2
  • src
Functions
project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • pwc
  • sleep_tmr2
  • src
project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • pwc
  • sleep_tmr2
  • src
Functions
project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR2_GLOBAL_IRQHandler (void)
This function handles the power voltage monitoring output interrupt request. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • pwc
  • sleep_tmr2
  • src
project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void TMR2_GLOBAL_IRQHandler(void)
142{
143 if(tmr_flag_get(TMR2, TMR_OVF_FLAG) != RESET)
144 {
145 /* clear timer 2 ovf flag */
146 tmr_flag_clear(TMR2, TMR_OVF_FLAG);
147
148 /* toggle led */
149 at32_led_toggle(LED4);
150 }
151}
152
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
TMR2_GLOBAL_IRQHandler
void TMR2_GLOBAL_IRQHandler(void)
This function handles the power voltage monitoring output interrupt request.
Definition: project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_int.c:141
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • pwc
  • sleep_tmr2
  • src
Functions
project/at_start_f437/examples/pwc/sleep_tmr2/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | tmr2_config (void)
tmr2 configuration. More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/sleep_tmr2/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • pwc
  • sleep_tmr2
  • src
project/at_start_f437/examples/pwc/sleep_tmr2/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43void tmr2_config(void)
44{
45 crm_clocks_freq_type crm_clocks_freq_struct = {0};
46
47 /* enable tmr 2 clock */
48 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
49
50 /* get system clock */
51 crm_clocks_freq_get(&crm_clocks_freq_struct);
52
53 /* (systemclock/(systemclock/10000))/10000 = 1Hz(1s) */
54 tmr_base_init(TMR2, 9999, (crm_clocks_freq_struct.sclk_freq/10000 - 1));
55
56 /* config the counting direction */
57 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
58
59 /* config the clock divider value */
60 tmr_clock_source_div_set(TMR2, TMR_CLOCK_DIV1);
61
62 /* enable tmr 2 interrupt */
63 tmr_interrupt_enable(TMR2, TMR_OVF_INT, TRUE);
64
65 /* config tmr 2 nvic */
66 nvic_irq_enable(TMR2_GLOBAL_IRQn, 0, 0);
67
68 /* enable tmr 2 */
69 tmr_counter_enable(TMR2, TRUE);
70}
71
77int main(void)
78{
79 __IO uint32_t index = 0;
80 __IO uint32_t systick_index = 0;
81
82 /* congfig the system clock */
83 system_clock_config();
84
85 /* init at start board */
86 at32_board_init();
87
88 /* config priority group */
89 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
90
91 /* turn on the led light */
92 at32_led_on(LED2);
93 at32_led_on(LED3);
94 at32_led_on(LED4);
95
96 /* enable pwc clock */
97 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
98
99 /* config tmr 2 */
100 tmr2_config();
101
102 while(1)
103 {
104 at32_led_off(LED2);
105
106 /* save systick register configuration */
107 systick_index = SysTick->CTRL;
108 systick_index &= ~((uint32_t)0xFFFFFFFE);
109
110 /* disable systick */
111 SysTick->CTRL &= (uint32_t)0xFFFFFFFE;
112
113 /* enter sleep mode */
114 pwc_sleep_mode_enter(PWC_SLEEP_ENTER_WFI);
115
116 /* restore systick register configuration */
117 SysTick->CTRL |= systick_index;
118
119 /* wake up from sleep mode */
120 at32_led_on(LED2);
121 for(index = 0; index < 500000; index++);
122 }
123}
124
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
tmr2_config
void tmr2_config(void)
tmr2 configuration.
Definition: project/at_start_f435/examples/pwc/sleep_tmr2/src/main.c:43
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
TRUE
@ TRUE
Definition: at32f435_437.h:379
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_sleep_mode_enter
void pwc_sleep_mode_enter(pwc_sleep_enter_type pwc_sleep_enter)
enter pwc sleep mode
Definition: at32f435_437_pwc.c:167
PWC_SLEEP_ENTER_WFI
@ PWC_SLEEP_ENTER_WFI
Definition: at32f435_437_pwc.h:111
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
TMR2_GLOBAL_IRQn
@ TMR2_GLOBAL_IRQn
Definition: at32f435_437.h:176
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::sclk_freq
uint32_t sclk_freq
Definition: at32f435_437_crm.h:789
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • pwc
  • sleep_usart1
  • inc
project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • pwc
  • sleep_usart1
  • inc
project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • pwc
  • sleep_usart1
  • inc
project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • pwc
  • sleep_usart1
  • src
Functions
project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • pwc
  • sleep_usart1
  • src
project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • pwc
  • sleep_usart1
  • src
Functions | Variables
project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | USART1_IRQHandler (void)
this function handles the usatt interrupt request. More...

Variables

uint16_t usart1_index = 0

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • pwc
  • sleep_usart1
  • src
project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
39uint16_t usart1_index = 0;
45void NMI_Handler(void)
46{
47}
48
54void HardFault_Handler(void)
55{
56 /* go to infinite loop when hard fault exception occurs */
57 while(1)
58 {
59 }
60}
61
67void MemManage_Handler(void)
68{
69 /* go to infinite loop when memory manage exception occurs */
70 while(1)
71 {
72 }
73}
74
80void BusFault_Handler(void)
81{
82 /* go to infinite loop when bus fault exception occurs */
83 while(1)
84 {
85 }
86}
87
93void UsageFault_Handler(void)
94{
95 /* go to infinite loop when usage fault exception occurs */
96 while(1)
97 {
98 }
99}
100
106void SVC_Handler(void)
107{
108}
109
115void DebugMon_Handler(void)
116{
117}
118
124void PendSV_Handler(void)
125{
126}
127
133void SysTick_Handler(void)
134{
135}
136
142void USART1_IRQHandler(void)
143{
144 if(usart_flag_get(USART1, USART_RDBF_FLAG) != RESET)
145 {
146 /* clear rdbf flag */
147 usart1_index = usart_data_receive(USART1);
148
149 /* toggle led */
150 at32_led_toggle(LED4);
151 }
152}
153
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
USART1_IRQHandler
void USART1_IRQHandler(void)
this function handles the usatt interrupt request.
Definition: project/at_start_f435/examples/pwc/sleep_usart1/src/at32f435_437_int.c:142
usart1_index
uint16_t usart1_index
Definition: project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_int.c:39
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
RESET
@ RESET
Definition: at32f435_437.h:378
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART1
#define USART1
Definition: at32f435_437_usart.h:348
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • pwc
  • sleep_usart1
  • src
Functions
project/at_start_f437/examples/pwc/sleep_usart1/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | usart1_config (uint32_t baudrate)
usart1 configuration. More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/sleep_usart1/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • pwc
  • sleep_usart1
  • src
project/at_start_f437/examples/pwc/sleep_usart1/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43void usart1_config(uint32_t baudrate)
44{
45 gpio_init_type gpio_init_struct;
46
47 /* enable the uart1 and gpio clock */
48 crm_periph_clock_enable(CRM_USART1_PERIPH_CLOCK, TRUE);
49 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
50
51 gpio_default_para_init(&gpio_init_struct);
52
53 /* configure the uart1 tx pin */
54 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
55 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
56 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
57 gpio_init_struct.gpio_pins = GPIO_PINS_9;
58 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
59 gpio_init(GPIOA, &gpio_init_struct);
60 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE9, GPIO_MUX_7);
61
62 /* configure the uart1 rx pin */
63 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
64 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
65 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
66 gpio_init_struct.gpio_pins = GPIO_PINS_10;
67 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
68 gpio_init(GPIOA, &gpio_init_struct);
69 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE10, GPIO_MUX_7);
70
71 nvic_irq_enable(USART1_IRQn, 0, 0);
72
73 /* configure uart param */
74 usart_init(USART1, baudrate, USART_DATA_8BITS, USART_STOP_1_BIT);
75 usart_parity_selection_config(USART1, USART_PARITY_NONE);
76 usart_transmitter_enable(USART1, TRUE);
77 usart_receiver_enable(USART1, TRUE);
78 usart_hardware_flow_control_set(USART1,USART_HARDWARE_FLOW_NONE);
79 usart_interrupt_enable(USART1, USART_RDBF_INT, TRUE);
80 usart_enable(USART1, TRUE);
81}
82
88int main(void)
89{
90 __IO uint32_t index = 0;
91 __IO uint32_t systick_index = 0;
92
93 /* congfig the system clock */
94 system_clock_config();
95
96 /* init at start board */
97 at32_board_init();
98
99 /* config priority group */
100 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
101
102 /* turn on the led light */
103 at32_led_on(LED2);
104 at32_led_on(LED3);
105 at32_led_on(LED4);
106
107 /* enable pwc clock */
108 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
109
110 /* config usart1 */
111 usart1_config(115200);
112
113 printf("exit sleep mode by usart1 rdbf interrupt \r\n");
114
115 while(1)
116 {
117 at32_led_off(LED2);
118 at32_led_off(LED3);
119 printf("now enter sleep mode \r\n");
120
121 /* save systick register configuration */
122 systick_index = SysTick->CTRL;
123 systick_index &= ~((uint32_t)0xFFFFFFFE);
124
125 /* disable systick */
126 SysTick->CTRL &= (uint32_t)0xFFFFFFFE;
127
128 /* enter sleep mode */
129 pwc_sleep_mode_enter(PWC_SLEEP_ENTER_WFI);
130
131 /* restore systick register configuration */
132 SysTick->CTRL |= systick_index;
133
134 /* wake up from sleep mode */
135 printf("now exit sleep mode by usart1 rdbf interrupt \r\n");
136 printf("\r\n");
137 at32_led_on(LED2);
138 for(index = 0; index < 500000; index++);
139 }
140}
141
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
usart1_config
void usart1_config(uint32_t baudrate)
usart1 configuration.
Definition: project/at_start_f435/examples/pwc/sleep_usart1/src/main.c:43
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART1_PERIPH_CLOCK
@ CRM_USART1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:156
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_sleep_mode_enter
void pwc_sleep_mode_enter(pwc_sleep_enter_type pwc_sleep_enter)
enter pwc sleep mode
Definition: at32f435_437_pwc.c:167
PWC_SLEEP_ENTER_WFI
@ PWC_SLEEP_ENTER_WFI
Definition: at32f435_437_pwc.h:111
usart_parity_selection_config
void usart_parity_selection_config(usart_type *usart_x, usart_parity_selection_type parity)
usart parity selection config.
Definition: at32f435_437_usart.c:168
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_hardware_flow_control_set
void usart_hardware_flow_control_set(usart_type *usart_x, usart_hardware_flow_control_type flow_state)
configure the usart's hardware flow control.
Definition: at32f435_437_usart.c:555
usart_interrupt_enable
void usart_interrupt_enable(usart_type *usart_x, uint32_t usart_int, confirm_state new_state)
enable or disable the specified usart interrupts.
Definition: at32f435_437_usart.c:287
USART_HARDWARE_FLOW_NONE
@ USART_HARDWARE_FLOW_NONE
Definition: at32f435_437_usart.h:170
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_PARITY_NONE
@ USART_PARITY_NONE
Definition: at32f435_437_usart.h:94
USART_RDBF_INT
#define USART_RDBF_INT
Definition: at32f435_437_usart.h:73
USART1
#define USART1
Definition: at32f435_437_usart.h:348
USART1_IRQn
@ USART1_IRQn
Definition: at32f435_437.h:185
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • pwc
  • standby_ertc_alarm
  • inc
project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • pwc
  • standby_ertc_alarm
  • inc
project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • pwc
  • standby_ertc_alarm
  • inc
project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • pwc
  • standby_ertc_alarm
  • src
Functions
project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • pwc
  • standby_ertc_alarm
  • src
project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • pwc
  • standby_ertc_alarm
  • src
Functions
project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • pwc
  • standby_ertc_alarm
  • src
project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • pwc
  • standby_ertc_alarm
  • src
Functions
project/at_start_f437/examples/pwc/standby_ertc_alarm/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | ertc_config (void)
ertc configuration. More...
void | ertc_alarm_config (void)
ertc alarm configuration. More...
void | ertc_alarm_value_set (uint32_t alam_index)
ertc alarm value set. More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/standby_ertc_alarm/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • pwc
  • standby_ertc_alarm
  • src
project/at_start_f437/examples/pwc/standby_ertc_alarm/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43void ertc_config(void)
44{
45 /* enable the pwc clock interface */
46 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
47
48 /* allow access to ertc */
49 pwc_battery_powered_domain_access(TRUE);
50
51 /* reset ertc domain */
52 crm_battery_powered_domain_reset(TRUE);
53 crm_battery_powered_domain_reset(FALSE);
54
55 /* enable the lext osc */
56 crm_clock_source_enable(CRM_CLOCK_SOURCE_LEXT, TRUE);
57
58 /* wait till lext is ready */
59 while(crm_flag_get(CRM_LEXT_STABLE_FLAG) == RESET);
60
61 /* select the ertc clock source */
62 crm_ertc_clock_select(CRM_ERTC_CLOCK_LEXT);
63
64 /* enable the ertc clock */
65 crm_ertc_clock_enable(TRUE);
66
67 /* deinitializes the ertc registers */
68 ertc_reset();
69
70 /* wait for ertc apb registers synchronisation */
71 ertc_wait_update();
72
73 /* configure the ertc data register and ertc prescaler
74 ck_spre(1hz) = ertcclk(lext) /(ertc_clk_div_a + 1)*(ertc_clk_div_b + 1)*/
75 ertc_divider_set(127, 255);
76
77 /* configure the hour format is 24-hour format*/
78 ertc_hour_mode_set(ERTC_HOUR_MODE_24);
79
80 /* set the date: friday june 11th 2021 */
81 ertc_date_set(21, 6, 11, 5);
82
83 /* set the time to 06h 20mn 00s am */
84 ertc_time_set(6, 20, 0, ERTC_AM);
85}
86
92void ertc_alarm_config(void)
93{
94 /* set the alarm 05h:20min:10s */
95 ertc_alarm_mask_set(ERTC_ALA, ERTC_ALARM_MASK_DATE_WEEK | ERTC_ALARM_MASK_HOUR | ERTC_ALARM_MASK_MIN);
96 ertc_alarm_week_date_select(ERTC_ALA, ERTC_SLECT_DATE);
97
98 /* enable ertc alarm a interrupt */
99 ertc_interrupt_enable(ERTC_ALA_INT, TRUE);
100}
101
107void ertc_alarm_value_set(uint32_t alam_index)
108{
109 ertc_time_type ertc_time_struct;
110
111 /* disable the alarm */
112 ertc_alarm_enable(ERTC_ALA, FALSE);
113 ertc_calendar_get(&ertc_time_struct);
114 ertc_alarm_set(ERTC_ALA, ertc_time_struct.day, ertc_time_struct.hour, ertc_time_struct.min, (ertc_time_struct.sec + alam_index)% 60, ertc_time_struct.ampm);
115
116 /* disable the alarm */
117 ertc_alarm_enable(ERTC_ALA, TRUE);
118}
119
125int main(void)
126{
127 __IO uint32_t index = 0;
128
129 /* congfig the system clock */
130 system_clock_config();
131
132 /* init at start board */
133 at32_board_init();
134
135 /* enable pwc and bpr clock */
136 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
137
138 if(pwc_flag_get(PWC_STANDBY_FLAG) != RESET)
139 {
140 /* wakeup from standby */
141 pwc_flag_clear(PWC_STANDBY_FLAG);
142 at32_led_on(LED2);
143 }
144 if(pwc_flag_get(PWC_WAKEUP_FLAG) != RESET)
145 {
146 /* wakeup event occurs */
147 pwc_flag_clear(PWC_WAKEUP_FLAG);
148 at32_led_on(LED3);
149 }
150 delay_sec(1);
151 /* config ertc */
152 ertc_config();
153 at32_led_on(LED4);
154 ertc_alarm_config();
155 delay_sec(1);
156 ertc_alarm_value_set(3);
157
158 /* enter standby mode */
159 pwc_standby_mode_enter();
160 while(1)
161 {
162 }
163}
164
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
ertc_config
void ertc_config(void)
configure the ertc peripheral.
Definition: project/at_start_f435/examples/ertc/bpr_domain/src/main.c:121
ertc_alarm_value_set
void ertc_alarm_value_set(uint32_t alam_index)
ertc alarm value set.
Definition: project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c:123
ertc_alarm_config
void ertc_alarm_config(void)
ertc alarm configuration.
Definition: project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c:92
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_ertc_clock_select
void crm_ertc_clock_select(crm_ertc_clock_type value)
select ertc clock
Definition: at32f435_437_crm.c:434
crm_ertc_clock_enable
void crm_ertc_clock_enable(confirm_state new_state)
enable or disable ertc
Definition: at32f435_437_crm.c:445
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_battery_powered_domain_reset
void crm_battery_powered_domain_reset(confirm_state new_state)
battery powered domain software reset
Definition: at32f435_437_crm.c:541
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_CLOCK_SOURCE_LEXT
@ CRM_CLOCK_SOURCE_LEXT
Definition: at32f435_437_crm.h:562
CRM_ERTC_CLOCK_LEXT
@ CRM_ERTC_CLOCK_LEXT
Definition: at32f435_437_crm.h:632
CRM_LEXT_STABLE_FLAG
#define CRM_LEXT_STABLE_FLAG
Definition: at32f435_437_crm.h:58
ertc_hour_mode_set
error_status ertc_hour_mode_set(ertc_hour_mode_set_type mode)
ertc hour mode set.
Definition: at32f435_437_ertc.c:283
ertc_wait_update
error_status ertc_wait_update(void)
ertc wait register update finish.
Definition: at32f435_437_ertc.c:97
ertc_time_set
error_status ertc_time_set(uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set time.
Definition: at32f435_437_ertc.c:363
ertc_reset
error_status ertc_reset(void)
ertc reset all register.
Definition: at32f435_437_ertc.c:207
ertc_alarm_mask_set
void ertc_alarm_mask_set(ertc_alarm_type alarm_x, uint32_t mask)
set which bits are irrelevant to the alarm match.
Definition: at32f435_437_ertc.c:458
ertc_interrupt_enable
void ertc_interrupt_enable(uint32_t source, confirm_state new_state)
enable or disable interrupt.
Definition: at32f435_437_ertc.c:1386
ertc_alarm_week_date_select
void ertc_alarm_week_date_select(ertc_alarm_type alarm_x, ertc_week_date_select_type wk)
alarm week or date mode select.
Definition: at32f435_437_ertc.c:500
ertc_date_set
error_status ertc_date_set(uint8_t year, uint8_t month, uint8_t date, uint8_t week)
set date.
Definition: at32f435_437_ertc.c:314
ertc_alarm_set
void ertc_alarm_set(ertc_alarm_type alarm_x, uint8_t week_date, uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set alarm.
Definition: at32f435_437_ertc.c:538
ertc_calendar_get
void ertc_calendar_get(ertc_time_type *time)
get calendar
Definition: at32f435_437_ertc.c:404
ertc_divider_set
error_status ertc_divider_set(uint16_t div_a, uint16_t div_b)
ertc division set.
Definition: at32f435_437_ertc.c:251
ertc_alarm_enable
error_status ertc_alarm_enable(ertc_alarm_type alarm_x, confirm_state new_state)
enable or disable alarm clock.
Definition: at32f435_437_ertc.c:629
ERTC_SLECT_DATE
@ ERTC_SLECT_DATE
Definition: at32f435_437_ertc.h:135
ERTC_HOUR_MODE_24
@ ERTC_HOUR_MODE_24
Definition: at32f435_437_ertc.h:116
ERTC_ALA
@ ERTC_ALA
Definition: at32f435_437_ertc.h:144
ERTC_AM
@ ERTC_AM
Definition: at32f435_437_ertc.h:126
ERTC_ALARM_MASK_DATE_WEEK
#define ERTC_ALARM_MASK_DATE_WEEK
Definition: at32f435_437_ertc.h:90
ERTC_ALARM_MASK_HOUR
#define ERTC_ALARM_MASK_HOUR
Definition: at32f435_437_ertc.h:89
ERTC_ALARM_MASK_MIN
#define ERTC_ALARM_MASK_MIN
Definition: at32f435_437_ertc.h:88
ERTC_ALA_INT
#define ERTC_ALA_INT
Definition: at32f435_437_ertc.h:53
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
pwc_battery_powered_domain_access
void pwc_battery_powered_domain_access(confirm_state new_state)
enable or disable access to the battery powered domain.
Definition: at32f435_437_pwc.c:61
pwc_standby_mode_enter
void pwc_standby_mode_enter(void)
enter pwc standby mode
Definition: at32f435_437_pwc.c:224
pwc_flag_get
flag_status pwc_flag_get(uint32_t pwc_flag)
get flag of pwc
Definition: at32f435_437_pwc.c:145
pwc_flag_clear
void pwc_flag_clear(uint32_t pwc_flag)
clear flag of pwc
Definition: at32f435_437_pwc.c:128
PWC_STANDBY_FLAG
#define PWC_STANDBY_FLAG
Definition: at32f435_437_pwc.h:53
PWC_WAKEUP_FLAG
#define PWC_WAKEUP_FLAG
Definition: at32f435_437_pwc.h:52
ertc_time_type
ertc time
Definition: at32f435_437_ertc.h:383
ertc_time_type::ampm
ertc_am_pm_type ampm
Definition: at32f435_437_ertc.h:391
ertc_time_type::day
uint8_t day
Definition: at32f435_437_ertc.h:386
ertc_time_type::hour
uint8_t hour
Definition: at32f435_437_ertc.h:387
ertc_time_type::min
uint8_t min
Definition: at32f435_437_ertc.h:388
ertc_time_type::sec
uint8_t sec
Definition: at32f435_437_ertc.h:389
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • pwc
  • standby_wakeup_pin
  • inc
project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • pwc
  • standby_wakeup_pin
  • inc
project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • pwc
  • standby_wakeup_pin
  • inc
project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • pwc
  • standby_wakeup_pin
  • src
Functions
project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • pwc
  • standby_wakeup_pin
  • src
project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • pwc
  • standby_wakeup_pin
  • src
Functions
project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • pwc
  • standby_wakeup_pin
  • src
project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • pwc
  • standby_wakeup_pin
  • src
Functions
project/at_start_f437/examples/pwc/standby_wakeup_pin/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/pwc/standby_wakeup_pin/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • pwc
  • standby_wakeup_pin
  • src
project/at_start_f437/examples/pwc/standby_wakeup_pin/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43int main(void)
44{
45 __IO uint32_t index = 0;
46
47 /* congfig the system clock */
48 system_clock_config();
49
50 /* init at start board */
51 at32_board_init();
52
53 /* config priority group */
54 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
55
56 /* turn on the led light */
57 at32_led_off(LED2);
58 at32_led_off(LED3);
59 at32_led_off(LED4);
60
61 /* enable pwc clock */
62 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
63
64 if(pwc_flag_get(PWC_STANDBY_FLAG) != RESET)
65 {
66 /* wakeup from standby */
67 pwc_flag_clear(PWC_STANDBY_FLAG);
68 at32_led_on(LED2);
69 }
70
71 if(pwc_flag_get(PWC_WAKEUP_FLAG) != RESET)
72 {
73 /* wakeup event occurs */
74 pwc_flag_clear(PWC_WAKEUP_FLAG);
75 at32_led_on(LED3);
76 }
77
78 at32_led_on(LED4);
79 for(index = 0; index < 0xFFFFFF; index++);
80
81 /* enable wakeup pin1(pa0), pin2(pc13) */
82 pwc_wakeup_pin_enable(PWC_WAKEUP_PIN_1 | PWC_WAKEUP_PIN_2, TRUE);
83
84 /* enter standby mode */
85 pwc_standby_mode_enter();
86
87 while(1)
88 {
89 }
90}
91
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_standby_mode_enter
void pwc_standby_mode_enter(void)
enter pwc standby mode
Definition: at32f435_437_pwc.c:224
pwc_flag_get
flag_status pwc_flag_get(uint32_t pwc_flag)
get flag of pwc
Definition: at32f435_437_pwc.c:145
pwc_flag_clear
void pwc_flag_clear(uint32_t pwc_flag)
clear flag of pwc
Definition: at32f435_437_pwc.c:128
pwc_wakeup_pin_enable
void pwc_wakeup_pin_enable(uint32_t pin_num, confirm_state new_state)
enable or disable pwc standby wakeup pin
Definition: at32f435_437_pwc.c:107
PWC_STANDBY_FLAG
#define PWC_STANDBY_FLAG
Definition: at32f435_437_pwc.h:53
PWC_WAKEUP_FLAG
#define PWC_WAKEUP_FLAG
Definition: at32f435_437_pwc.h:52
PWC_WAKEUP_PIN_2
#define PWC_WAKEUP_PIN_2
Definition: at32f435_437_pwc.h:64
PWC_WAKEUP_PIN_1
#define PWC_WAKEUP_PIN_1
pwc wakeup pin num definition
Definition: at32f435_437_pwc.h:63
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • qspi
  • command_port_using_dma
  • inc
project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • qspi
  • command_port_using_dma
  • inc
project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • qspi
  • command_port_using_dma
  • inc
project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • qspi
  • command_port_using_dma
  • src
Functions
project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • qspi
  • command_port_using_dma
  • src
project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • qspi
  • command_port_using_dma
  • src
Functions
project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • qspi
  • command_port_using_dma
  • src
project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • qspi
  • command_port_using_dma
  • src
Macros | Functions | Variables
project/at_start_f437/examples/qspi/command_port_using_dma/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include <string.h>

Go to the source code of this file.

Macros

#define TEST_SIZE 4096

Functions

void | qspi_data_read (uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi read data More...
void | qspi_data_write (uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi write data More...
void | qspi_erase (uint32_t sec_addr)
qspi erase data More...
void | qspi_config (void)
qspi config More...
int | main (void)
main function. More...

Variables

ALIGNED_HEAD uint8_t wbuf[4096] ALIGNED_TAIL

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_dma/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • qspi
  • command_port_using_dma
  • src
project/at_start_f437/examples/qspi/command_port_using_dma/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include <string.h>
30
39extern void qspi_data_read(uint32_t addr, uint32_t total_len, uint8_t* buf);
40extern void qspi_data_write(uint32_t addr, uint32_t total_len, uint8_t* buf);
41extern void qspi_erase(uint32_t sec_addr);
42
43#define TEST_SIZE 4096
44/* use dma transmit must align at word */
45#if defined ( __ICCARM__ ) /* iar compiler */
46 #pragma data_alignment=4
47#endif
48ALIGNED_HEAD uint8_t wbuf[TEST_SIZE] ALIGNED_TAIL;
49
50#if defined ( __ICCARM__ ) /* iar compiler */
51 #pragma data_alignment=4
52#endif
53ALIGNED_HEAD uint8_t rbuf[TEST_SIZE] ALIGNED_TAIL;
54
60void qspi_config(void)
61{
62 gpio_init_type gpio_init_struct;
63 /* enable the dma clock */
64 crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE);
65
66 /* enable the qspi clock */
67 crm_periph_clock_enable(CRM_QSPI1_PERIPH_CLOCK, TRUE);
68
69 /* enable the pin clock */
70 crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE);
71 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
72
73 /* set default parameter */
74 gpio_default_para_init(&gpio_init_struct);
75
76 /* configure the io0 gpio */
77 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
78 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
79 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
80 gpio_init_struct.gpio_pins = GPIO_PINS_8;
81 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
82 gpio_init(GPIOF, &gpio_init_struct);
83 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE8, GPIO_MUX_10);
84
85 /* configure the io1 gpio */
86 gpio_init_struct.gpio_pins = GPIO_PINS_9;
87 gpio_init(GPIOF, &gpio_init_struct);
88 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE9, GPIO_MUX_10);
89
90 /* configure the io2 gpio */
91 gpio_init_struct.gpio_pins = GPIO_PINS_7;
92 gpio_init(GPIOF, &gpio_init_struct);
93 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE7, GPIO_MUX_9);
94
95 /* configure the io3 gpio */
96 gpio_init_struct.gpio_pins = GPIO_PINS_6;
97 gpio_init(GPIOF, &gpio_init_struct);
98 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE6, GPIO_MUX_9);
99
100 /* configure the sck gpio */
101 gpio_init_struct.gpio_pins = GPIO_PINS_10;
102 gpio_init(GPIOF, &gpio_init_struct);
103 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE10, GPIO_MUX_9);
104
105 /* configure the cs gpio */
106 gpio_init_struct.gpio_pins = GPIO_PINS_6;
107 gpio_init(GPIOG, &gpio_init_struct);
108 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE6, GPIO_MUX_10);
109}
110
116int main(void)
117{
118 uint16_t i, err = 0;
119
120 system_clock_config();
121 at32_board_init();
122
123 for(i = 0; i < TEST_SIZE; i++)
124 {
125 wbuf[i] = (uint8_t)i;
126 rbuf[i] = 0;
127 }
128 /* qspi config */
129 qspi_config();
130
131 /* switch to cmd port */
132 qspi_xip_enable(QSPI1, FALSE);
133
134 /* set sclk */
135 qspi_clk_division_set(QSPI1, QSPI_CLK_DIV_4);
136
137 /* set sck idle mode 0 */
138 qspi_sck_mode_set(QSPI1, QSPI_SCK_MODE_0);
139
140 /* set wip in bit 0 */
141 qspi_busy_config(QSPI1, QSPI_BUSY_OFFSET_0);
142
143 /* erase */
144 qspi_erase(0);
145
146 /* read */
147 qspi_data_read(0, TEST_SIZE, rbuf);
148
149 for(i = 0; i < TEST_SIZE; i++)
150 {
151 if(rbuf[i] != 0xFF)
152 {
153 err = 1;
154 break;
155 }
156 }
157
158 /* program */
159 qspi_data_write(0, TEST_SIZE, wbuf);
160
161 /* read */
162 qspi_data_read(0, TEST_SIZE, rbuf);
163
164 if(memcmp(rbuf, wbuf, TEST_SIZE))
165 {
166 err = 1;
167 }
168
169 while(1)
170 {
171 if(err == 0)
172 {
173 at32_led_toggle(LED3);
174 delay_ms(300);
175 }
176 else
177 {
178 at32_led_toggle(LED2);
179 delay_ms(300);
180 }
181 }
182}
183
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
ALIGNED_TAIL
ALIGNED_HEAD uint8_t wbuf[4096] ALIGNED_TAIL
Definition: project/at_start_f437/examples/qspi/command_port_using_dma/src/main.c:48
qspi_erase
void qspi_erase(uint32_t sec_addr)
qspi erase data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:281
qspi_config
void qspi_config(void)
qspi config
Definition: project/at_start_f435/examples/qspi/command_port_using_dma/src/main.c:60
TEST_SIZE
#define TEST_SIZE
Definition: project/at_start_f437/examples/qspi/command_port_using_dma/src/main.c:43
qspi_data_read
void qspi_data_read(uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi read data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:192
qspi_data_write
void qspi_data_write(uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi write data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:256
wbuf
uint8_t wbuf[4096]
Definition: project/at_start_f435/examples/qspi/command_port_using_interrupt/src/main.c:44
rbuf
uint8_t rbuf[4096]
Definition: project/at_start_f435/examples/qspi/command_port_using_interrupt/src/main.c:45
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOF_PERIPH_CLOCK
@ CRM_GPIOF_PERIPH_CLOCK
Definition: at32f435_437_crm.h:110
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_QSPI1_PERIPH_CLOCK
@ CRM_QSPI1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:124
CRM_DMA2_PERIPH_CLOCK
@ CRM_DMA2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:116
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_9
@ GPIO_MUX_9
Definition: at32f435_437_gpio.h:165
GPIO_MUX_10
@ GPIO_MUX_10
Definition: at32f435_437_gpio.h:166
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOF
#define GPIOF
Definition: at32f435_437_gpio.h:526
qspi_sck_mode_set
void qspi_sck_mode_set(qspi_type *qspi_x, qspi_clk_mode_type new_mode)
set qspi sck mode.
Definition: at32f435_437_qspi.c:70
qspi_xip_enable
void qspi_xip_enable(qspi_type *qspi_x, confirm_state new_state)
enable xip mode or command-port mode.
Definition: at32f435_437_qspi.c:254
qspi_busy_config
void qspi_busy_config(qspi_type *qspi_x, qspi_busy_pos_type busy_pos)
set wip position in status register of flash
Definition: at32f435_437_qspi.c:241
qspi_clk_division_set
void qspi_clk_division_set(qspi_type *qspi_x, qspi_clk_div_type new_clkdiv)
set qspi clock division
Definition: at32f435_437_qspi.c:93
QSPI_BUSY_OFFSET_0
@ QSPI_BUSY_OFFSET_0
Definition: at32f435_437_qspi.h:87
QSPI_SCK_MODE_0
@ QSPI_SCK_MODE_0
Definition: at32f435_437_qspi.h:171
QSPI_CLK_DIV_4
@ QSPI_CLK_DIV_4
Definition: at32f435_437_qspi.h:126
QSPI1
#define QSPI1
Definition: at32f435_437_qspi.h:512
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • qspi
  • command_port_using_dma_and_pem
  • inc
project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • qspi
  • command_port_using_dma_and_pem
  • inc
project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • qspi
  • command_port_using_dma_and_pem
  • inc
project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • qspi
  • command_port_using_dma_and_pem
  • src
Functions
project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • qspi
  • command_port_using_dma_and_pem
  • src
project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • qspi
  • command_port_using_dma_and_pem
  • src
Functions
project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • qspi
  • command_port_using_dma_and_pem
  • src
project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • qspi
  • command_port_using_dma_and_pem
  • src
Macros | Functions | Variables
project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include <string.h>

Go to the source code of this file.

Macros

#define TEST_SIZE 4096

Functions

void | qspi_data_read (uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi read data More...
void | qspi_data_write (uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi write data More...
void | qspi_erase (uint32_t sec_addr)
qspi erase data More...
void | qspi_config (void)
qspi config More...
int | main (void)
main function. More...

Variables

ALIGNED_HEAD uint8_t wbuf[4096] ALIGNED_TAIL

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • qspi
  • command_port_using_dma_and_pem
  • src
project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include <string.h>
30
39extern void qspi_data_read(uint32_t addr, uint32_t total_len, uint8_t* buf);
40extern void qspi_data_write(uint32_t addr, uint32_t total_len, uint8_t* buf);
41extern void qspi_erase(uint32_t sec_addr);
42
43#define TEST_SIZE 4096
44/* use dma transmit must align at word */
45#if defined ( __ICCARM__ ) /* iar compiler */
46 #pragma data_alignment=4
47#endif
48ALIGNED_HEAD uint8_t wbuf[TEST_SIZE] ALIGNED_TAIL;
49
50#if defined ( __ICCARM__ ) /* iar compiler */
51 #pragma data_alignment=4
52#endif
53ALIGNED_HEAD uint8_t rbuf[TEST_SIZE] ALIGNED_TAIL;
54
60void qspi_config(void)
61{
62 gpio_init_type gpio_init_struct;
63 /* enable the dma clock */
64 crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE);
65
66 /* enable the qspi clock */
67 crm_periph_clock_enable(CRM_QSPI1_PERIPH_CLOCK, TRUE);
68
69 /* enable the pin clock */
70 crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE);
71 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
72
73 /* set default parameter */
74 gpio_default_para_init(&gpio_init_struct);
75
76 /* configure the io0 gpio */
77 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
78 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
79 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
80 gpio_init_struct.gpio_pins = GPIO_PINS_8;
81 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
82 gpio_init(GPIOF, &gpio_init_struct);
83 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE8, GPIO_MUX_10);
84
85 /* configure the io1 gpio */
86 gpio_init_struct.gpio_pins = GPIO_PINS_9;
87 gpio_init(GPIOF, &gpio_init_struct);
88 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE9, GPIO_MUX_10);
89
90 /* configure the io2 gpio */
91 gpio_init_struct.gpio_pins = GPIO_PINS_7;
92 gpio_init(GPIOF, &gpio_init_struct);
93 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE7, GPIO_MUX_9);
94
95 /* configure the io3 gpio */
96 gpio_init_struct.gpio_pins = GPIO_PINS_6;
97 gpio_init(GPIOF, &gpio_init_struct);
98 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE6, GPIO_MUX_9);
99
100 /* configure the sck gpio */
101 gpio_init_struct.gpio_pins = GPIO_PINS_10;
102 gpio_init(GPIOF, &gpio_init_struct);
103 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE10, GPIO_MUX_9);
104
105 /* configure the cs gpio */
106 gpio_init_struct.gpio_pins = GPIO_PINS_6;
107 gpio_init(GPIOG, &gpio_init_struct);
108 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE6, GPIO_MUX_10);
109}
110
116int main(void)
117{
118 uint16_t i, err = 0;
119
120 system_clock_config();
121 at32_board_init();
122
123 for(i = 0; i < TEST_SIZE; i++)
124 {
125 wbuf[i] = (uint8_t)i;
126 rbuf[i] = 0;
127 }
128 /* qspi config */
129 qspi_config();
130
131 /* switch to cmd port */
132 qspi_xip_enable(QSPI1, FALSE);
133
134 /* set sclk */
135 qspi_clk_division_set(QSPI1, QSPI_CLK_DIV_4);
136
137 /* set sck idle mode 0 */
138 qspi_sck_mode_set(QSPI1, QSPI_SCK_MODE_0);
139
140 /* set wip in bit 0 */
141 qspi_busy_config(QSPI1, QSPI_BUSY_OFFSET_0);
142
143 /* erase */
144 qspi_erase(0);
145
146 /* read */
147 qspi_data_read(0, TEST_SIZE, rbuf);
148
149 for(i = 0; i < TEST_SIZE; i++)
150 {
151 if(rbuf[i] != 0xFF)
152 {
153 err = 1;
154 break;
155 }
156 }
157
158 /* program */
159 qspi_data_write(0, TEST_SIZE, wbuf);
160
161 /* read */
162 qspi_data_read(0, TEST_SIZE, rbuf);
163
164 if(memcmp(rbuf, wbuf, TEST_SIZE))
165 {
166 err = 1;
167 }
168
169 while(1)
170 {
171 if(err == 0)
172 {
173 at32_led_toggle(LED3);
174 delay_ms(300);
175 }
176 else
177 {
178 at32_led_toggle(LED2);
179 delay_ms(300);
180 }
181 }
182}
183
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
ALIGNED_TAIL
ALIGNED_HEAD uint8_t wbuf[4096] ALIGNED_TAIL
Definition: project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/main.c:48
TEST_SIZE
#define TEST_SIZE
Definition: project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/main.c:43
qspi_erase
void qspi_erase(uint32_t sec_addr)
qspi erase data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:281
qspi_config
void qspi_config(void)
qspi config
Definition: project/at_start_f435/examples/qspi/command_port_using_dma/src/main.c:60
qspi_data_read
void qspi_data_read(uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi read data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:192
qspi_data_write
void qspi_data_write(uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi write data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:256
wbuf
uint8_t wbuf[4096]
Definition: project/at_start_f435/examples/qspi/command_port_using_interrupt/src/main.c:44
rbuf
uint8_t rbuf[4096]
Definition: project/at_start_f435/examples/qspi/command_port_using_interrupt/src/main.c:45
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOF_PERIPH_CLOCK
@ CRM_GPIOF_PERIPH_CLOCK
Definition: at32f435_437_crm.h:110
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_QSPI1_PERIPH_CLOCK
@ CRM_QSPI1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:124
CRM_DMA2_PERIPH_CLOCK
@ CRM_DMA2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:116
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_9
@ GPIO_MUX_9
Definition: at32f435_437_gpio.h:165
GPIO_MUX_10
@ GPIO_MUX_10
Definition: at32f435_437_gpio.h:166
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOF
#define GPIOF
Definition: at32f435_437_gpio.h:526
qspi_sck_mode_set
void qspi_sck_mode_set(qspi_type *qspi_x, qspi_clk_mode_type new_mode)
set qspi sck mode.
Definition: at32f435_437_qspi.c:70
qspi_xip_enable
void qspi_xip_enable(qspi_type *qspi_x, confirm_state new_state)
enable xip mode or command-port mode.
Definition: at32f435_437_qspi.c:254
qspi_busy_config
void qspi_busy_config(qspi_type *qspi_x, qspi_busy_pos_type busy_pos)
set wip position in status register of flash
Definition: at32f435_437_qspi.c:241
qspi_clk_division_set
void qspi_clk_division_set(qspi_type *qspi_x, qspi_clk_div_type new_clkdiv)
set qspi clock division
Definition: at32f435_437_qspi.c:93
QSPI_BUSY_OFFSET_0
@ QSPI_BUSY_OFFSET_0
Definition: at32f435_437_qspi.h:87
QSPI_SCK_MODE_0
@ QSPI_SCK_MODE_0
Definition: at32f435_437_qspi.h:171
QSPI_CLK_DIV_4
@ QSPI_CLK_DIV_4
Definition: at32f435_437_qspi.h:126
QSPI1
#define QSPI1
Definition: at32f435_437_qspi.h:512
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • qspi
  • command_port_using_dma_qpi_mode
  • inc
project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • qspi
  • command_port_using_dma_qpi_mode
  • inc
project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • qspi
  • command_port_using_dma_qpi_mode
  • inc
project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • qspi
  • command_port_using_dma_qpi_mode
  • src
Functions
project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • qspi
  • command_port_using_dma_qpi_mode
  • src
project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • qspi
  • command_port_using_dma_qpi_mode
  • src
Functions
project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • qspi
  • command_port_using_dma_qpi_mode
  • src
project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • qspi
  • command_port_using_dma_qpi_mode
  • src
Macros | Functions | Variables
project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include <string.h>

Go to the source code of this file.

Macros

#define TEST_SIZE 4096

Functions

void | qspi_data_read (uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi read data More...
void | qspi_data_write (uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi write data More...
void | qspi_erase (uint32_t sec_addr)
qspi erase data More...
void | esmt32m_qpi_mode_init (void)
switch QSPI to cmd port and setup to qpi mode More...
void | qspi_config (void)
qspi config More...
int | main (void)
main function. More...

Variables

ALIGNED_HEAD uint8_t wbuf[4096] ALIGNED_TAIL

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • qspi
  • command_port_using_dma_qpi_mode
  • src
project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include <string.h>
30
39extern void qspi_data_read(uint32_t addr, uint32_t total_len, uint8_t* buf);
40extern void qspi_data_write(uint32_t addr, uint32_t total_len, uint8_t* buf);
41extern void qspi_erase(uint32_t sec_addr);
42extern void esmt32m_qpi_mode_init(void);
43
44#define TEST_SIZE 4096
45/* use dma transmit must align at word */
46#if defined ( __ICCARM__ ) /* iar compiler */
47 #pragma data_alignment=4
48#endif
49ALIGNED_HEAD uint8_t wbuf[TEST_SIZE] ALIGNED_TAIL;
50
51#if defined ( __ICCARM__ ) /* iar compiler */
52 #pragma data_alignment=4
53#endif
54ALIGNED_HEAD uint8_t rbuf[TEST_SIZE] ALIGNED_TAIL;
55
61void qspi_config(void)
62{
63 gpio_init_type gpio_init_struct;
64 /* enable the dma clock */
65 crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE);
66
67 /* enable the qspi clock */
68 crm_periph_clock_enable(CRM_QSPI1_PERIPH_CLOCK, TRUE);
69
70 /* enable the pin clock */
71 crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE);
72 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
73
74 /* set default parameter */
75 gpio_default_para_init(&gpio_init_struct);
76
77 /* configure the io0 gpio */
78 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
79 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
80 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
81 gpio_init_struct.gpio_pins = GPIO_PINS_8;
82 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
83 gpio_init(GPIOF, &gpio_init_struct);
84 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE8, GPIO_MUX_10);
85
86 /* configure the io1 gpio */
87 gpio_init_struct.gpio_pins = GPIO_PINS_9;
88 gpio_init(GPIOF, &gpio_init_struct);
89 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE9, GPIO_MUX_10);
90
91 /* configure the io2 gpio */
92 gpio_init_struct.gpio_pins = GPIO_PINS_7;
93 gpio_init(GPIOF, &gpio_init_struct);
94 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE7, GPIO_MUX_9);
95
96 /* configure the io3 gpio */
97 gpio_init_struct.gpio_pins = GPIO_PINS_6;
98 gpio_init(GPIOF, &gpio_init_struct);
99 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE6, GPIO_MUX_9);
100
101 /* configure the sck gpio */
102 gpio_init_struct.gpio_pins = GPIO_PINS_10;
103 gpio_init(GPIOF, &gpio_init_struct);
104 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE10, GPIO_MUX_9);
105
106 /* configure the cs gpio */
107 gpio_init_struct.gpio_pins = GPIO_PINS_6;
108 gpio_init(GPIOG, &gpio_init_struct);
109 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE6, GPIO_MUX_10);
110}
111
117int main(void)
118{
119 uint16_t i, err = 0;
120
121 system_clock_config();
122 at32_board_init();
123
124 for(i = 0; i < TEST_SIZE; i++)
125 {
126 wbuf[i] = (uint8_t)i;
127 rbuf[i] = 0;
128 }
129 /* qspi config */
130 qspi_config();
131
132 /* switch to cmd port */
133 qspi_xip_enable(QSPI1, FALSE);
134
135 /* set sclk */
136 qspi_clk_division_set(QSPI1, QSPI_CLK_DIV_4);
137
138 /* set sck idle mode 0 */
139 qspi_sck_mode_set(QSPI1, QSPI_SCK_MODE_0);
140
141 /* set wip in bit 0 */
142 qspi_busy_config(QSPI1, QSPI_BUSY_OFFSET_0);
143
144 esmt32m_qpi_mode_init();
145
146 /* erase */
147 qspi_erase(0);
148
149 /* read */
150 qspi_data_read(0, TEST_SIZE, rbuf);
151
152 for(i = 0; i < TEST_SIZE; i++)
153 {
154 if(rbuf[i] != 0xFF)
155 {
156 err = 1;
157 break;
158 }
159 }
160
161 /* program */
162 qspi_data_write(0, TEST_SIZE, wbuf);
163
164 /* read */
165 qspi_data_read(0, TEST_SIZE, rbuf);
166
167 if(memcmp(rbuf, wbuf, TEST_SIZE))
168 {
169 err = 1;
170 }
171
172 while(1)
173 {
174 if(err == 0)
175 {
176 at32_led_toggle(LED3);
177 delay_ms(300);
178 }
179 else
180 {
181 at32_led_toggle(LED2);
182 delay_ms(300);
183 }
184 }
185}
186
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
ALIGNED_TAIL
ALIGNED_HEAD uint8_t wbuf[4096] ALIGNED_TAIL
Definition: project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/main.c:49
TEST_SIZE
#define TEST_SIZE
Definition: project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/main.c:44
esmt32m_qpi_mode_init
void esmt32m_qpi_mode_init(void)
switch QSPI to cmd port and setup to qpi mode
Definition: at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/qspi_cmd_esmt32m.c:427
qspi_erase
void qspi_erase(uint32_t sec_addr)
qspi erase data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:281
qspi_config
void qspi_config(void)
qspi config
Definition: project/at_start_f435/examples/qspi/command_port_using_dma/src/main.c:60
qspi_data_read
void qspi_data_read(uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi read data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:192
qspi_data_write
void qspi_data_write(uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi write data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:256
wbuf
uint8_t wbuf[4096]
Definition: project/at_start_f435/examples/qspi/command_port_using_interrupt/src/main.c:44
rbuf
uint8_t rbuf[4096]
Definition: project/at_start_f435/examples/qspi/command_port_using_interrupt/src/main.c:45
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOF_PERIPH_CLOCK
@ CRM_GPIOF_PERIPH_CLOCK
Definition: at32f435_437_crm.h:110
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_QSPI1_PERIPH_CLOCK
@ CRM_QSPI1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:124
CRM_DMA2_PERIPH_CLOCK
@ CRM_DMA2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:116
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_9
@ GPIO_MUX_9
Definition: at32f435_437_gpio.h:165
GPIO_MUX_10
@ GPIO_MUX_10
Definition: at32f435_437_gpio.h:166
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOF
#define GPIOF
Definition: at32f435_437_gpio.h:526
qspi_sck_mode_set
void qspi_sck_mode_set(qspi_type *qspi_x, qspi_clk_mode_type new_mode)
set qspi sck mode.
Definition: at32f435_437_qspi.c:70
qspi_xip_enable
void qspi_xip_enable(qspi_type *qspi_x, confirm_state new_state)
enable xip mode or command-port mode.
Definition: at32f435_437_qspi.c:254
qspi_busy_config
void qspi_busy_config(qspi_type *qspi_x, qspi_busy_pos_type busy_pos)
set wip position in status register of flash
Definition: at32f435_437_qspi.c:241
qspi_clk_division_set
void qspi_clk_division_set(qspi_type *qspi_x, qspi_clk_div_type new_clkdiv)
set qspi clock division
Definition: at32f435_437_qspi.c:93
QSPI_BUSY_OFFSET_0
@ QSPI_BUSY_OFFSET_0
Definition: at32f435_437_qspi.h:87
QSPI_SCK_MODE_0
@ QSPI_SCK_MODE_0
Definition: at32f435_437_qspi.h:171
QSPI_CLK_DIV_4
@ QSPI_CLK_DIV_4
Definition: at32f435_437_qspi.h:126
QSPI1
#define QSPI1
Definition: at32f435_437_qspi.h:512
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • qspi
  • command_port_using_interrupt
  • inc
project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • qspi
  • command_port_using_interrupt
  • inc
project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • qspi
  • command_port_using_interrupt
  • inc
project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • qspi
  • command_port_using_interrupt
  • src
Functions
project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • qspi
  • command_port_using_interrupt
  • src
project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • qspi
  • command_port_using_interrupt
  • src
Functions
project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • qspi
  • command_port_using_interrupt
  • src
project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • qspi
  • command_port_using_interrupt
  • src
Macros | Functions | Variables
project/at_start_f437/examples/qspi/command_port_using_interrupt/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include <string.h>

Go to the source code of this file.

Macros

#define TEST_SIZE 4096

Functions

void | qspi_data_read (uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi read data More...
void | qspi_data_write (uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi write data More...
void | qspi_erase (uint32_t sec_addr)
qspi erase data More...
void | qspi_config (void)
qspi config More...
int | main (void)
main function. More...

Variables

uint8_t | wbuf [4096]
uint8_t | rbuf [4096]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_interrupt/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • qspi
  • command_port_using_interrupt
  • src
project/at_start_f437/examples/qspi/command_port_using_interrupt/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include <string.h>
30
39extern void qspi_data_read(uint32_t addr, uint32_t total_len, uint8_t* buf);
40extern void qspi_data_write(uint32_t addr, uint32_t total_len, uint8_t* buf);
41extern void qspi_erase(uint32_t sec_addr);
42
43#define TEST_SIZE 4096
44uint8_t wbuf[TEST_SIZE];
45uint8_t rbuf[TEST_SIZE];
46
52void qspi_config(void)
53{
54 gpio_init_type gpio_init_struct;
55
56 /* enable the qspi clock */
57 crm_periph_clock_enable(CRM_QSPI1_PERIPH_CLOCK, TRUE);
58
59 /* enable the pin clock */
60 crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE);
61 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
62
63 /* set default parameter */
64 gpio_default_para_init(&gpio_init_struct);
65
66 /* configure the io0 gpio */
67 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
68 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
69 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
70 gpio_init_struct.gpio_pins = GPIO_PINS_8;
71 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
72 gpio_init(GPIOF, &gpio_init_struct);
73 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE8, GPIO_MUX_10);
74
75 /* configure the io1 gpio */
76 gpio_init_struct.gpio_pins = GPIO_PINS_9;
77 gpio_init(GPIOF, &gpio_init_struct);
78 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE9, GPIO_MUX_10);
79
80 /* configure the io2 gpio */
81 gpio_init_struct.gpio_pins = GPIO_PINS_7;
82 gpio_init(GPIOF, &gpio_init_struct);
83 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE7, GPIO_MUX_9);
84
85 /* configure the io3 gpio */
86 gpio_init_struct.gpio_pins = GPIO_PINS_6;
87 gpio_init(GPIOF, &gpio_init_struct);
88 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE6, GPIO_MUX_9);
89
90 /* configure the sck gpio */
91 gpio_init_struct.gpio_pins = GPIO_PINS_10;
92 gpio_init(GPIOF, &gpio_init_struct);
93 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE10, GPIO_MUX_9);
94
95 /* configure the cs gpio */
96 gpio_init_struct.gpio_pins = GPIO_PINS_6;
97 gpio_init(GPIOG, &gpio_init_struct);
98 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE6, GPIO_MUX_10);
99}
100
106int main(void)
107{
108 uint16_t i, err = 0;
109
110 system_clock_config();
111 at32_board_init();
112
113 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
114
115 for(i = 0; i < TEST_SIZE; i++)
116 {
117 wbuf[i] = (uint8_t)i;
118 rbuf[i] = 0;
119 }
120 /* qspi config */
121 qspi_config();
122
123 /* switch to cmd port */
124 qspi_xip_enable(QSPI1, FALSE);
125
126 /* set sclk */
127 qspi_clk_division_set(QSPI1, QSPI_CLK_DIV_4);
128
129 /* set sck idle mode 0 */
130 qspi_sck_mode_set(QSPI1, QSPI_SCK_MODE_0);
131
132 /* set wip in bit 0 */
133 qspi_busy_config(QSPI1, QSPI_BUSY_OFFSET_0);
134
135 nvic_irq_enable(QSPI1_IRQn, 0, 0);
136 qspi_interrupt_enable(QSPI1, TRUE);
137
138 /* erase */
139 qspi_erase(0);
140
141 /* read */
142 qspi_data_read(0, TEST_SIZE, rbuf);
143
144 for(i = 0; i < TEST_SIZE; i++)
145 {
146 if(rbuf[i] != 0xFF)
147 {
148 err = 1;
149 break;
150 }
151 }
152
153 /* program */
154 qspi_data_write(0, TEST_SIZE, wbuf);
155
156 /* read */
157 qspi_data_read(0, TEST_SIZE, rbuf);
158
159 if(memcmp(rbuf, wbuf, TEST_SIZE))
160 {
161 err = 1;
162 }
163
164 while(1)
165 {
166 if(err == 0)
167 {
168 at32_led_toggle(LED3);
169 delay_ms(300);
170 }
171 else
172 {
173 at32_led_toggle(LED2);
174 delay_ms(300);
175 }
176 }
177}
178
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
qspi_erase
void qspi_erase(uint32_t sec_addr)
qspi erase data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:281
qspi_config
void qspi_config(void)
qspi config
Definition: project/at_start_f435/examples/qspi/command_port_using_dma/src/main.c:60
qspi_data_read
void qspi_data_read(uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi read data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:192
qspi_data_write
void qspi_data_write(uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi write data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:256
rbuf
uint8_t rbuf[4096]
Definition: project/at_start_f437/examples/qspi/command_port_using_interrupt/src/main.c:45
TEST_SIZE
#define TEST_SIZE
Definition: project/at_start_f437/examples/qspi/command_port_using_interrupt/src/main.c:43
wbuf
uint8_t wbuf[4096]
Definition: project/at_start_f437/examples/qspi/command_port_using_interrupt/src/main.c:44
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOF_PERIPH_CLOCK
@ CRM_GPIOF_PERIPH_CLOCK
Definition: at32f435_437_crm.h:110
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_QSPI1_PERIPH_CLOCK
@ CRM_QSPI1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:124
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_9
@ GPIO_MUX_9
Definition: at32f435_437_gpio.h:165
GPIO_MUX_10
@ GPIO_MUX_10
Definition: at32f435_437_gpio.h:166
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOF
#define GPIOF
Definition: at32f435_437_gpio.h:526
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
qspi_sck_mode_set
void qspi_sck_mode_set(qspi_type *qspi_x, qspi_clk_mode_type new_mode)
set qspi sck mode.
Definition: at32f435_437_qspi.c:70
qspi_interrupt_enable
void qspi_interrupt_enable(qspi_type *qspi_x, confirm_state new_state)
enable/disable interrupt when command is completed
Definition: at32f435_437_qspi.c:121
qspi_xip_enable
void qspi_xip_enable(qspi_type *qspi_x, confirm_state new_state)
enable xip mode or command-port mode.
Definition: at32f435_437_qspi.c:254
qspi_busy_config
void qspi_busy_config(qspi_type *qspi_x, qspi_busy_pos_type busy_pos)
set wip position in status register of flash
Definition: at32f435_437_qspi.c:241
qspi_clk_division_set
void qspi_clk_division_set(qspi_type *qspi_x, qspi_clk_div_type new_clkdiv)
set qspi clock division
Definition: at32f435_437_qspi.c:93
QSPI_BUSY_OFFSET_0
@ QSPI_BUSY_OFFSET_0
Definition: at32f435_437_qspi.h:87
QSPI_SCK_MODE_0
@ QSPI_SCK_MODE_0
Definition: at32f435_437_qspi.h:171
QSPI_CLK_DIV_4
@ QSPI_CLK_DIV_4
Definition: at32f435_437_qspi.h:126
QSPI1
#define QSPI1
Definition: at32f435_437_qspi.h:512
QSPI1_IRQn
@ QSPI1_IRQn
Definition: at32f435_437.h:227
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • qspi
  • command_port_using_polling
  • inc
project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • qspi
  • command_port_using_polling
  • inc
project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • qspi
  • command_port_using_polling
  • inc
project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • qspi
  • command_port_using_polling
  • src
Functions
project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • qspi
  • command_port_using_polling
  • src
project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • qspi
  • command_port_using_polling
  • src
Functions
project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • qspi
  • command_port_using_polling
  • src
project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • qspi
  • command_port_using_polling
  • src
Macros | Functions | Variables
project/at_start_f437/examples/qspi/command_port_using_polling/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include <string.h>

Go to the source code of this file.

Macros

#define TEST_SIZE 4096

Functions

void | qspi_data_read (uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi read data More...
void | qspi_data_write (uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi write data More...
void | qspi_erase (uint32_t sec_addr)
qspi erase data More...
void | qspi_config (void)
qspi config More...
int | main (void)
main function. More...

Variables

uint8_t | wbuf [4096]
uint8_t | rbuf [4096]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_polling/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • qspi
  • command_port_using_polling
  • src
project/at_start_f437/examples/qspi/command_port_using_polling/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include <string.h>
30
39extern void qspi_data_read(uint32_t addr, uint32_t total_len, uint8_t* buf);
40extern void qspi_data_write(uint32_t addr, uint32_t total_len, uint8_t* buf);
41extern void qspi_erase(uint32_t sec_addr);
42
43#define TEST_SIZE 4096
44uint8_t wbuf[TEST_SIZE];
45uint8_t rbuf[TEST_SIZE];
46
52void qspi_config(void)
53{
54 gpio_init_type gpio_init_struct;
55
56 /* enable the qspi clock */
57 crm_periph_clock_enable(CRM_QSPI1_PERIPH_CLOCK, TRUE);
58
59 /* enable the pin clock */
60 crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE);
61 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
62
63 /* set default parameter */
64 gpio_default_para_init(&gpio_init_struct);
65
66 /* configure the io0 gpio */
67 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
68 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
69 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
70 gpio_init_struct.gpio_pins = GPIO_PINS_8;
71 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
72 gpio_init(GPIOF, &gpio_init_struct);
73 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE8, GPIO_MUX_10);
74
75 /* configure the io1 gpio */
76 gpio_init_struct.gpio_pins = GPIO_PINS_9;
77 gpio_init(GPIOF, &gpio_init_struct);
78 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE9, GPIO_MUX_10);
79
80 /* configure the io2 gpio */
81 gpio_init_struct.gpio_pins = GPIO_PINS_7;
82 gpio_init(GPIOF, &gpio_init_struct);
83 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE7, GPIO_MUX_9);
84
85 /* configure the io3 gpio */
86 gpio_init_struct.gpio_pins = GPIO_PINS_6;
87 gpio_init(GPIOF, &gpio_init_struct);
88 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE6, GPIO_MUX_9);
89
90 /* configure the sck gpio */
91 gpio_init_struct.gpio_pins = GPIO_PINS_10;
92 gpio_init(GPIOF, &gpio_init_struct);
93 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE10, GPIO_MUX_9);
94
95 /* configure the cs gpio */
96 gpio_init_struct.gpio_pins = GPIO_PINS_6;
97 gpio_init(GPIOG, &gpio_init_struct);
98 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE6, GPIO_MUX_10);
99}
100
106int main(void)
107{
108 uint16_t i, err = 0;
109
110 system_clock_config();
111 at32_board_init();
112
113 for(i = 0; i < TEST_SIZE; i++)
114 {
115 wbuf[i] = (uint8_t)i;
116 rbuf[i] = 0;
117 }
118 /* qspi config */
119 qspi_config();
120
121 /* switch to cmd port */
122 qspi_xip_enable(QSPI1, FALSE);
123
124 /* set sclk */
125 qspi_clk_division_set(QSPI1, QSPI_CLK_DIV_4);
126
127 /* set sck idle mode 0 */
128 qspi_sck_mode_set(QSPI1, QSPI_SCK_MODE_0);
129
130 /* set wip in bit 0 */
131 qspi_busy_config(QSPI1, QSPI_BUSY_OFFSET_0);
132
133 /* erase */
134 qspi_erase(0);
135
136 /* read */
137 qspi_data_read(0, TEST_SIZE, rbuf);
138
139 for(i = 0; i < TEST_SIZE; i++)
140 {
141 if(rbuf[i] != 0xFF)
142 {
143 err = 1;
144 break;
145 }
146 }
147
148 /* program */
149 qspi_data_write(0, TEST_SIZE, wbuf);
150
151 /* read */
152 qspi_data_read(0, TEST_SIZE, rbuf);
153
154 if(memcmp(rbuf, wbuf, TEST_SIZE))
155 {
156 err = 1;
157 }
158
159 while(1)
160 {
161 if(err == 0)
162 {
163 at32_led_toggle(LED3);
164 delay_ms(300);
165 }
166 else
167 {
168 at32_led_toggle(LED2);
169 delay_ms(300);
170 }
171 }
172}
173
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
qspi_erase
void qspi_erase(uint32_t sec_addr)
qspi erase data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:281
qspi_config
void qspi_config(void)
qspi config
Definition: project/at_start_f435/examples/qspi/command_port_using_dma/src/main.c:60
qspi_data_read
void qspi_data_read(uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi read data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:192
qspi_data_write
void qspi_data_write(uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi write data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:256
rbuf
uint8_t rbuf[4096]
Definition: project/at_start_f437/examples/qspi/command_port_using_polling/src/main.c:45
TEST_SIZE
#define TEST_SIZE
Definition: project/at_start_f437/examples/qspi/command_port_using_polling/src/main.c:43
wbuf
uint8_t wbuf[4096]
Definition: project/at_start_f437/examples/qspi/command_port_using_polling/src/main.c:44
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOF_PERIPH_CLOCK
@ CRM_GPIOF_PERIPH_CLOCK
Definition: at32f435_437_crm.h:110
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_QSPI1_PERIPH_CLOCK
@ CRM_QSPI1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:124
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_9
@ GPIO_MUX_9
Definition: at32f435_437_gpio.h:165
GPIO_MUX_10
@ GPIO_MUX_10
Definition: at32f435_437_gpio.h:166
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOF
#define GPIOF
Definition: at32f435_437_gpio.h:526
qspi_sck_mode_set
void qspi_sck_mode_set(qspi_type *qspi_x, qspi_clk_mode_type new_mode)
set qspi sck mode.
Definition: at32f435_437_qspi.c:70
qspi_xip_enable
void qspi_xip_enable(qspi_type *qspi_x, confirm_state new_state)
enable xip mode or command-port mode.
Definition: at32f435_437_qspi.c:254
qspi_busy_config
void qspi_busy_config(qspi_type *qspi_x, qspi_busy_pos_type busy_pos)
set wip position in status register of flash
Definition: at32f435_437_qspi.c:241
qspi_clk_division_set
void qspi_clk_division_set(qspi_type *qspi_x, qspi_clk_div_type new_clkdiv)
set qspi clock division
Definition: at32f435_437_qspi.c:93
QSPI_BUSY_OFFSET_0
@ QSPI_BUSY_OFFSET_0
Definition: at32f435_437_qspi.h:87
QSPI_SCK_MODE_0
@ QSPI_SCK_MODE_0
Definition: at32f435_437_qspi.h:171
QSPI_CLK_DIV_4
@ QSPI_CLK_DIV_4
Definition: at32f435_437_qspi.h:126
QSPI1
#define QSPI1
Definition: at32f435_437_qspi.h:512
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • qspi
  • command_port_using_rdsr_sw
  • inc
project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • qspi
  • command_port_using_rdsr_sw
  • inc
project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • qspi
  • command_port_using_rdsr_sw
  • inc
project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • qspi
  • command_port_using_rdsr_sw
  • src
Functions
project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • qspi
  • command_port_using_rdsr_sw
  • src
project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • qspi
  • command_port_using_rdsr_sw
  • src
Functions
project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • qspi
  • command_port_using_rdsr_sw
  • src
project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • qspi
  • command_port_using_rdsr_sw
  • src
Macros | Functions | Variables
project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include <string.h>

Go to the source code of this file.

Macros

#define TEST_SIZE 4096

Functions

void | qspi_data_read (uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi read data More...
void | qspi_data_write (uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi write data More...
void | qspi_erase (uint32_t sec_addr)
qspi erase data More...
void | qspi_config (void)
qspi config More...
int | main (void)
main function. More...

Variables

uint8_t | wbuf [4096]
uint8_t | rbuf [4096]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • qspi
  • command_port_using_rdsr_sw
  • src
project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include <string.h>
30
39extern void qspi_data_read(uint32_t addr, uint32_t total_len, uint8_t* buf);
40extern void qspi_data_write(uint32_t addr, uint32_t total_len, uint8_t* buf);
41extern void qspi_erase(uint32_t sec_addr);
42
43#define TEST_SIZE 4096
44uint8_t wbuf[TEST_SIZE];
45uint8_t rbuf[TEST_SIZE];
46
52void qspi_config(void)
53{
54 gpio_init_type gpio_init_struct;
55
56 /* enable the qspi clock */
57 crm_periph_clock_enable(CRM_QSPI1_PERIPH_CLOCK, TRUE);
58
59 /* enable the pin clock */
60 crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE);
61 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
62
63 /* set default parameter */
64 gpio_default_para_init(&gpio_init_struct);
65
66 /* configure the io0 gpio */
67 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
68 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
69 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
70 gpio_init_struct.gpio_pins = GPIO_PINS_8;
71 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
72 gpio_init(GPIOF, &gpio_init_struct);
73 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE8, GPIO_MUX_10);
74
75 /* configure the io1 gpio */
76 gpio_init_struct.gpio_pins = GPIO_PINS_9;
77 gpio_init(GPIOF, &gpio_init_struct);
78 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE9, GPIO_MUX_10);
79
80 /* configure the io2 gpio */
81 gpio_init_struct.gpio_pins = GPIO_PINS_7;
82 gpio_init(GPIOF, &gpio_init_struct);
83 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE7, GPIO_MUX_9);
84
85 /* configure the io3 gpio */
86 gpio_init_struct.gpio_pins = GPIO_PINS_6;
87 gpio_init(GPIOF, &gpio_init_struct);
88 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE6, GPIO_MUX_9);
89
90 /* configure the sck gpio */
91 gpio_init_struct.gpio_pins = GPIO_PINS_10;
92 gpio_init(GPIOF, &gpio_init_struct);
93 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE10, GPIO_MUX_9);
94
95 /* configure the cs gpio */
96 gpio_init_struct.gpio_pins = GPIO_PINS_6;
97 gpio_init(GPIOG, &gpio_init_struct);
98 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE6, GPIO_MUX_10);
99}
100
106int main(void)
107{
108 uint16_t i, err = 0;
109
110 system_clock_config();
111 at32_board_init();
112
113 for(i = 0; i < TEST_SIZE; i++)
114 {
115 wbuf[i] = (uint8_t)i;
116 rbuf[i] = 0;
117 }
118 /* qspi config */
119 qspi_config();
120
121 /* switch to cmd port */
122 qspi_xip_enable(QSPI1, FALSE);
123
124 /* set sclk */
125 qspi_clk_division_set(QSPI1, QSPI_CLK_DIV_4);
126
127 /* set sck idle mode 0 */
128 qspi_sck_mode_set(QSPI1, QSPI_SCK_MODE_0);
129
130 /* set wip in bit 0 */
131 qspi_busy_config(QSPI1, QSPI_BUSY_OFFSET_0);
132
133 /* erase */
134 qspi_erase(0);
135
136 /* read */
137 qspi_data_read(0, TEST_SIZE, rbuf);
138
139 for(i = 0; i < TEST_SIZE; i++)
140 {
141 if(rbuf[i] != 0xFF)
142 {
143 err = 1;
144 break;
145 }
146 }
147
148 /* program */
149 qspi_data_write(0, TEST_SIZE, wbuf);
150
151 /* read */
152 qspi_data_read(0, TEST_SIZE, rbuf);
153
154 if(memcmp(rbuf, wbuf, TEST_SIZE))
155 {
156 err = 1;
157 }
158
159 while(1)
160 {
161 if(err == 0)
162 {
163 at32_led_toggle(LED3);
164 delay_ms(300);
165 }
166 else
167 {
168 at32_led_toggle(LED2);
169 delay_ms(300);
170 }
171 }
172}
173
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
qspi_erase
void qspi_erase(uint32_t sec_addr)
qspi erase data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:281
qspi_config
void qspi_config(void)
qspi config
Definition: project/at_start_f435/examples/qspi/command_port_using_dma/src/main.c:60
qspi_data_read
void qspi_data_read(uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi read data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:192
qspi_data_write
void qspi_data_write(uint32_t addr, uint32_t total_len, uint8_t *buf)
qspi write data
Definition: at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c:256
rbuf
uint8_t rbuf[4096]
Definition: project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/main.c:45
TEST_SIZE
#define TEST_SIZE
Definition: project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/main.c:43
wbuf
uint8_t wbuf[4096]
Definition: project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/main.c:44
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOF_PERIPH_CLOCK
@ CRM_GPIOF_PERIPH_CLOCK
Definition: at32f435_437_crm.h:110
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_QSPI1_PERIPH_CLOCK
@ CRM_QSPI1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:124
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_9
@ GPIO_MUX_9
Definition: at32f435_437_gpio.h:165
GPIO_MUX_10
@ GPIO_MUX_10
Definition: at32f435_437_gpio.h:166
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOF
#define GPIOF
Definition: at32f435_437_gpio.h:526
qspi_sck_mode_set
void qspi_sck_mode_set(qspi_type *qspi_x, qspi_clk_mode_type new_mode)
set qspi sck mode.
Definition: at32f435_437_qspi.c:70
qspi_xip_enable
void qspi_xip_enable(qspi_type *qspi_x, confirm_state new_state)
enable xip mode or command-port mode.
Definition: at32f435_437_qspi.c:254
qspi_busy_config
void qspi_busy_config(qspi_type *qspi_x, qspi_busy_pos_type busy_pos)
set wip position in status register of flash
Definition: at32f435_437_qspi.c:241
qspi_clk_division_set
void qspi_clk_division_set(qspi_type *qspi_x, qspi_clk_div_type new_clkdiv)
set qspi clock division
Definition: at32f435_437_qspi.c:93
QSPI_BUSY_OFFSET_0
@ QSPI_BUSY_OFFSET_0
Definition: at32f435_437_qspi.h:87
QSPI_SCK_MODE_0
@ QSPI_SCK_MODE_0
Definition: at32f435_437_qspi.h:171
QSPI_CLK_DIV_4
@ QSPI_CLK_DIV_4
Definition: at32f435_437_qspi.h:126
QSPI1
#define QSPI1
Definition: at32f435_437_qspi.h:512
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • qspi
  • xip_port_write_read
  • inc
project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • qspi
  • xip_port_write_read
  • inc
project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • qspi
  • xip_port_write_read
  • inc
project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • qspi
  • xip_port_write_read
  • src
Functions
project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • qspi
  • xip_port_write_read
  • src
project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • qspi
  • xip_port_write_read
  • src
Functions
project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • qspi
  • xip_port_write_read
  • src
project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • qspi
  • xip_port_write_read
  • src
Macros | Functions | Variables
project/at_start_f437/examples/qspi/xip_port_write_read/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include <string.h>

Go to the source code of this file.

Macros

#define TEST_SIZE 4096

Functions

void | qspi_xip_init_ly68l6400 (void)
void | qspi_config (void)
qspi config More...
int | main (void)
main function. More...

Variables

uint8_t | wbuf [4096]
uint8_t | rbuf [4096]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/qspi/xip_port_write_read/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • qspi
  • xip_port_write_read
  • src
project/at_start_f437/examples/qspi/xip_port_write_read/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include <string.h>
30
39extern void qspi_xip_init_ly68l6400(void);
40
41#define TEST_SIZE 4096
42uint8_t wbuf[TEST_SIZE];
43uint8_t rbuf[TEST_SIZE];
44
50void qspi_config(void)
51{
52 gpio_init_type gpio_init_struct;
53
54 /* enable the qspi clock */
55 crm_periph_clock_enable(CRM_QSPI1_PERIPH_CLOCK, TRUE);
56
57 /* enable the pin clock */
58 crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE);
59 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
60
61 /* set default parameter */
62 gpio_default_para_init(&gpio_init_struct);
63
64 /* configure the io0 gpio */
65 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
66 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
67 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
68 gpio_init_struct.gpio_pins = GPIO_PINS_8;
69 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
70 gpio_init(GPIOF, &gpio_init_struct);
71 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE8, GPIO_MUX_10);
72
73 /* configure the io1 gpio */
74 gpio_init_struct.gpio_pins = GPIO_PINS_9;
75 gpio_init(GPIOF, &gpio_init_struct);
76 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE9, GPIO_MUX_10);
77
78 /* configure the io2 gpio */
79 gpio_init_struct.gpio_pins = GPIO_PINS_7;
80 gpio_init(GPIOF, &gpio_init_struct);
81 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE7, GPIO_MUX_9);
82
83 /* configure the io3 gpio */
84 gpio_init_struct.gpio_pins = GPIO_PINS_6;
85 gpio_init(GPIOF, &gpio_init_struct);
86 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE6, GPIO_MUX_9);
87
88 /* configure the sck gpio */
89 gpio_init_struct.gpio_pins = GPIO_PINS_10;
90 gpio_init(GPIOF, &gpio_init_struct);
91 gpio_pin_mux_config(GPIOF, GPIO_PINS_SOURCE10, GPIO_MUX_9);
92
93 /* configure the cs gpio */
94 gpio_init_struct.gpio_pins = GPIO_PINS_6;
95 gpio_init(GPIOG, &gpio_init_struct);
96 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE6, GPIO_MUX_10);
97}
98
104int main(void)
105{
106 uint16_t i, err = 0;
107 uint8_t *qspi1_mem_addr;
108
109 system_clock_config();
110 at32_board_init();
111
112 for(i = 0; i < TEST_SIZE; i++)
113 {
114 wbuf[i] = (uint8_t)i;
115 rbuf[i] = 0;
116 }
117 /* qspi config */
118 qspi_config();
119
120 /* switch to cmd port */
121 qspi_xip_enable(QSPI1, FALSE);
122
123 /* set sclk */
124 qspi_clk_division_set(QSPI1, QSPI_CLK_DIV_4);
125
126 /* set sck idle mode 0 */
127 qspi_sck_mode_set(QSPI1, QSPI_SCK_MODE_0);
128
129 /* set wip in bit 0 */
130 qspi_busy_config(QSPI1, QSPI_BUSY_OFFSET_0);
131
132 qspi_xip_init_ly68l6400();
133
134 qspi1_mem_addr = (uint8_t*)QSPI1_MEM_BASE;
135
136 memcpy(qspi1_mem_addr, wbuf, TEST_SIZE);
137
138 memcpy(rbuf, qspi1_mem_addr, TEST_SIZE);
139
140 if(memcmp(rbuf, wbuf, TEST_SIZE))
141 {
142 err = 1;
143 }
144
145 while(1)
146 {
147 if(err == 0)
148 {
149 at32_led_toggle(LED3);
150 delay_ms(300);
151 }
152 else
153 {
154 at32_led_toggle(LED2);
155 delay_ms(300);
156 }
157 }
158}
159
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
qspi_config
void qspi_config(void)
qspi config
Definition: project/at_start_f435/examples/qspi/command_port_using_dma/src/main.c:60
qspi_xip_init_ly68l6400
void qspi_xip_init_ly68l6400(void)
Definition: at_start_f435/examples/qspi/xip_port_write_read/src/qspi_xip_ly68l6400.c:114
rbuf
uint8_t rbuf[4096]
Definition: project/at_start_f437/examples/qspi/xip_port_write_read/src/main.c:43
TEST_SIZE
#define TEST_SIZE
Definition: project/at_start_f437/examples/qspi/xip_port_write_read/src/main.c:41
wbuf
uint8_t wbuf[4096]
Definition: project/at_start_f437/examples/qspi/xip_port_write_read/src/main.c:42
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOF_PERIPH_CLOCK
@ CRM_GPIOF_PERIPH_CLOCK
Definition: at32f435_437_crm.h:110
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_QSPI1_PERIPH_CLOCK
@ CRM_QSPI1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:124
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_9
@ GPIO_MUX_9
Definition: at32f435_437_gpio.h:165
GPIO_MUX_10
@ GPIO_MUX_10
Definition: at32f435_437_gpio.h:166
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOF
#define GPIOF
Definition: at32f435_437_gpio.h:526
QSPI1_MEM_BASE
#define QSPI1_MEM_BASE
Definition: at32f435_437.h:418
qspi_sck_mode_set
void qspi_sck_mode_set(qspi_type *qspi_x, qspi_clk_mode_type new_mode)
set qspi sck mode.
Definition: at32f435_437_qspi.c:70
qspi_xip_enable
void qspi_xip_enable(qspi_type *qspi_x, confirm_state new_state)
enable xip mode or command-port mode.
Definition: at32f435_437_qspi.c:254
qspi_busy_config
void qspi_busy_config(qspi_type *qspi_x, qspi_busy_pos_type busy_pos)
set wip position in status register of flash
Definition: at32f435_437_qspi.c:241
qspi_clk_division_set
void qspi_clk_division_set(qspi_type *qspi_x, qspi_clk_div_type new_clkdiv)
set qspi clock division
Definition: at32f435_437_qspi.c:93
QSPI_BUSY_OFFSET_0
@ QSPI_BUSY_OFFSET_0
Definition: at32f435_437_qspi.h:87
QSPI_SCK_MODE_0
@ QSPI_SCK_MODE_0
Definition: at32f435_437_qspi.h:171
QSPI_CLK_DIV_4
@ QSPI_CLK_DIV_4
Definition: at32f435_437_qspi.h:126
QSPI1
#define QSPI1
Definition: at32f435_437_qspi.h:512
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • scfg
  • mem_map_sel
  • inc
project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • scfg
  • mem_map_sel
  • inc
project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • scfg
  • mem_map_sel
  • inc
project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • scfg
  • mem_map_sel
  • src
Functions
project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • scfg
  • mem_map_sel
  • src
project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • scfg
  • mem_map_sel
  • src
Functions
project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • scfg
  • mem_map_sel
  • src
project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • scfg
  • mem_map_sel
  • src
Functions
project/at_start_f437/examples/scfg/mem_map_sel/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/scfg/mem_map_sel/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • scfg
  • mem_map_sel
  • src
project/at_start_f437/examples/scfg/mem_map_sel/src/main.c
Go to the documentation of this file.
1
27/* includes */
28#include "at32f435_437_board.h"
29#include "at32f435_437_clock.h"
30
44int main(void)
45{
46 system_clock_config();
47
48 at32_board_init();
49
50 /* enable the scfg clock */
51 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
52
53 scfg_mem_map_set(SCFG_MEM_MAP_BOOT_MEMORY);
54
55 if((*(__IO uint32_t *)0x00000000) == (*(__IO uint32_t *)0x1FFF0000))
56 {
57 at32_led_on(LED2);
58 at32_led_on(LED3);
59 at32_led_on(LED4);
60 }
61 while(1)
62 {
63 }
64}
65
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
TRUE
@ TRUE
Definition: at32f435_437.h:379
scfg_mem_map_set
void scfg_mem_map_set(scfg_mem_map_type mem_map)
scfg memory address mapping set
Definition: at32f435_437_scfg.c:100
SCFG_MEM_MAP_BOOT_MEMORY
@ SCFG_MEM_MAP_BOOT_MEMORY
Definition: at32f435_437_scfg.h:90
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • sdio
  • sd_mmc_card
  • inc
project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • sdio
  • sd_mmc_card
  • inc
project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • sdio
  • sd_mmc_card
  • inc
project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • sdio
  • sd_mmc_card
  • src
Functions
project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • sdio
  • sd_mmc_card
  • src
project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • sdio
  • sd_mmc_card
  • src
Functions
project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • sdio
  • sd_mmc_card
  • src
project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • sdio
  • sd_mmc_card
  • src
Macros | Enumerations | Functions | Variables
project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c File Reference

main program More...

#include <stdbool.h>
#include <string.h>
#include "at32_sdio.h"
#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | BLOCK_SIZE (512)
#define | BLOCKS_NUMBER (64)
#define | MULTI_BUFFER_SIZE (BLOCK_SIZE * BLOCKS_NUMBER)
#define | STREAM_BUFFER_SIZE (4096)

Enumerations

enum test_result_type {
TEST_FAIL = 0 , TEST_SUCCESS , TEST_FAIL = 0 , TEST_SUCCESS ,
TEST_FAIL = 0 , TEST_SUCCESS , TEST_FAIL = 0 , TEST_SUCCESS
}

Functions

static test_result_type | sd_single_block_test (void)
sd card single block read/write test. More...
static test_result_type | sd_multiple_blocks_test (void)
sd card multiple blocks read/write test. More...
uint8_t | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
compares two buffers. More...
static void | sd_test_error (void)
LED2 on off every 300ms for sd test error. More...
static void | nvic_configuration (void)
configures sdio1 irq channel. More...
static test_result_type | mmc_stream_test (void)
mmc card data stream read/write test. More...
void | show_card_info (void)
show sd/mmc card info. More...
int | main (void)
main function. More...

Variables

static uint8_t | sblock_tbuffer [(512)]
static uint8_t | sblock_rbuffer [(512)]
static uint8_t | mblock_tbuffer [((512) *(64))]
static uint8_t | mblock_rbuffer [((512) *(64))]
static uint8_t | stream_tbuffer [(4096)]
static uint8_t | stream_rbuffer [(4096)]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c.

Function Documentation

◆ mmc_stream_test()

static test_result_type mmc_stream_test ( void )
static

mmc card data stream read/write test.

Parameters
none
Return values
TEST_FAIL fail. TEST_SUCCESS: success.

Definition at line 166 of file project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c.

◆ nvic_configuration()

static void nvic_configuration ( void )
static

configures sdio1 irq channel.

Parameters
none
Return values
none

Definition at line 247 of file project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c.

◆ sd_multiple_blocks_test()

static test_result_type sd_multiple_blocks_test ( void )
static

sd card multiple blocks read/write test.

Parameters
none
Return values
TEST_FAIL fail. TEST_SUCCESS: success.

Definition at line 118 of file project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c.

◆ sd_single_block_test()

static test_result_type sd_single_block_test ( void )
static

sd card single block read/write test.

Parameters
none
Return values
TEST_FAIL fail. TEST_SUCCESS: success.

Definition at line 71 of file project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c.

◆ sd_test_error()

static void sd_test_error ( void )
static

LED2 on off every 300ms for sd test error.

Parameters
none
Return values
none

Definition at line 234 of file project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • sdio
  • sd_mmc_card
  • src
project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c
Go to the documentation of this file.
1
27#include <stdbool.h>
28#include <string.h>
29#include "at32_sdio.h"
30#include "at32f435_437_board.h"
31#include "at32f435_437_clock.h"
32
41#define BLOCK_SIZE (512)
42#define BLOCKS_NUMBER (64)
43#define MULTI_BUFFER_SIZE (BLOCK_SIZE * BLOCKS_NUMBER)
44#define STREAM_BUFFER_SIZE (4096)
45
46static uint8_t sblock_tbuffer[BLOCK_SIZE], sblock_rbuffer[BLOCK_SIZE];
47static uint8_t mblock_tbuffer[MULTI_BUFFER_SIZE], mblock_rbuffer[MULTI_BUFFER_SIZE];
48static uint8_t stream_tbuffer[STREAM_BUFFER_SIZE], stream_rbuffer[STREAM_BUFFER_SIZE];
49
53typedef enum
54{
55 TEST_FAIL = 0,
56 TEST_SUCCESS,
57} test_result_type;
58
59static test_result_type sd_single_block_test(void);
60static test_result_type sd_multiple_blocks_test(void);
61uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length);
62static void sd_test_error(void);
63static void nvic_configuration(void);
64
71static test_result_type sd_single_block_test(void)
72{
73 sd_error_status_type status = SD_OK;
74 uint8_t bus_width;
75
76 /* test 1-bit and 4-bit width */
77 for(bus_width = 0; bus_width < 2; bus_width++)
78 {
79 memset(sblock_tbuffer, bus_width + 0xAB, BLOCK_SIZE);
80 memset(sblock_rbuffer, 0, BLOCK_SIZE);
81
82 /* set data width */
83 status = sd_wide_bus_operation_config((sdio_bus_width_type)bus_width);
84 if(status != SD_OK)
85 {
86 return TEST_FAIL;
87 }
88
89 /* write block of 512 bytes on address 0 */
90 status = sd_block_write(sblock_tbuffer, 0x00, BLOCK_SIZE);
91 if(status != SD_OK)
92 {
93 return TEST_FAIL;
94 }
95
96 /* read block of 512 bytes from address 0 */
97 status = sd_block_read(sblock_rbuffer, 0x00, BLOCK_SIZE);
98 if(status != SD_OK)
99 {
100 return TEST_FAIL;
101 }
102
103 if(!buffer_compare(sblock_tbuffer, sblock_rbuffer, BLOCK_SIZE))
104 {
105 return TEST_FAIL;
106 }
107 }
108
109 return TEST_SUCCESS;
110}
111
118static test_result_type sd_multiple_blocks_test(void)
119{
120 sd_error_status_type status = SD_OK;
121 uint8_t bus_width;
122
123 /* test 1-bit and 4-bit width */
124 for(bus_width = 0; bus_width < 2; bus_width++)
125 {
126 memset(mblock_tbuffer, bus_width + 0x3C, MULTI_BUFFER_SIZE);
127 memset(mblock_rbuffer, 0, MULTI_BUFFER_SIZE);
128
129 /* set data width */
130 status = sd_wide_bus_operation_config((sdio_bus_width_type)bus_width);
131 if(status != SD_OK)
132 {
133 return TEST_FAIL;
134 }
135
136 /* write multiple block of many bytes on address 0 */
137 status = sd_mult_blocks_write(mblock_tbuffer, 0x00, BLOCK_SIZE, BLOCKS_NUMBER);
138 if(status != SD_OK)
139 {
140 return TEST_FAIL;
141 }
142
143 /* read block of many bytes from address 0 */
144 status = sd_mult_blocks_read(mblock_rbuffer, 0x00, BLOCK_SIZE, BLOCKS_NUMBER);
145 if(status != SD_OK)
146 {
147 return TEST_FAIL;
148 }
149
150 /* check the correctness of written data */
151 if(!buffer_compare(mblock_tbuffer, mblock_rbuffer, MULTI_BUFFER_SIZE))
152 {
153 return TEST_FAIL;
154 }
155 }
156
157 return TEST_SUCCESS;
158}
159
166static test_result_type mmc_stream_test(void)
167{
168 sd_error_status_type status = SD_OK;
169 uint8_t bus_width;
170
171 /* only test 1-bit width */
172 for(bus_width = 0; bus_width < 1; bus_width++)
173 {
174 memset(stream_tbuffer, bus_width+0x5A, STREAM_BUFFER_SIZE);
175 memset(stream_rbuffer, 0, STREAM_BUFFER_SIZE);
176
177 /* set data width */
178 status = sd_wide_bus_operation_config((sdio_bus_width_type)bus_width);
179 if(status != SD_OK)
180 {
181 return TEST_FAIL;
182 }
183
184 /* write stream of many bytes on address 0 */
185 status = mmc_stream_write(stream_tbuffer, 0x00, STREAM_BUFFER_SIZE);
186 if (status != SD_OK)
187 {
188 return TEST_FAIL;
189 }
190
191 /* read stream of many bytes from address 0 */
192 status = mmc_stream_read(stream_rbuffer, 0x00, STREAM_BUFFER_SIZE);
193 if (status != SD_OK)
194 {
195 return TEST_FAIL;
196 }
197
198 /* check the correctness of written data */
199 if(!buffer_compare(stream_tbuffer, stream_rbuffer, STREAM_BUFFER_SIZE))
200 {
201 return TEST_FAIL;
202 }
203 }
204
205 return TEST_SUCCESS;
206}
207
215uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
216{
217 while(buffer_length--)
218 {
219 if(*pbuffer1 != *pbuffer2)
220 {
221 return 0;
222 }
223 pbuffer1++;
224 pbuffer2++;
225 }
226 return 1;
227}
228
234static void sd_test_error(void)
235{
236 at32_led_on(LED2);
237 delay_ms(300);
238 at32_led_off(LED2);
239 delay_ms(300);
240}
241
247static void nvic_configuration(void)
248{
249 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
250 nvic_irq_enable(SDIO1_IRQn, 1, 0);
251}
252
258void show_card_info(void)
259{
260 printf("---------------------\r\n");
261 switch(sd_card_info.card_type)
262 {
263 case SDIO_STD_CAPACITY_SD_CARD_V1_1: printf("card type: SDSC V1.1\r\n");break;
264 case SDIO_STD_CAPACITY_SD_CARD_V2_0: printf("card type: SDSC V2.0\r\n");break;
265 case SDIO_HIGH_CAPACITY_SD_CARD: printf("card type: SDHC V2.0\r\n");break;
266 case SDIO_MULTIMEDIA_CARD: printf("card type: MMC Card\r\n");break;
267 }
268 printf("card manufacturer_id: %d\r\n", sd_card_info.sd_cid_reg.manufacturer_id);
269 printf("card rca: 0x%X\r\n", sd_card_info.rca);
270 printf("card c_size = %u\r\n", sd_card_info.sd_csd_reg.device_size);
271 printf("card capacity: %uMB %uKB\r\n", (uint32_t)(sd_card_info.card_capacity>>20), (uint32_t)(sd_card_info.card_capacity>>10));
272 printf("card block_size: %d\r\n", sd_card_info.card_blk_size);
273 printf("---------------------\r\n");
274}
275
276/* gloable functions ---------------------------------------------------------*/
282int main(void)
283{
284 system_clock_config();
285
286 at32_board_init();
287
288 nvic_configuration();
289
290 uart_print_init(115200);
291 printf("start test..\r\n");
292
293 /* sdio init */
294 if(SD_OK != sd_init())
295 {
296 printf("sdio init fail\r\n");
297 while(1)
298 {
299 sd_test_error();
300 }
301 }
302 printf("sdio init ok\r\n");
303 show_card_info();
304
305 /* sd card single block test */
306 if(TEST_SUCCESS != sd_single_block_test())
307 {
308 printf("sd card single block test fail\r\n");
309 /* single block test fail, led2 fresh */
310 while(1)
311 {
312 sd_test_error();
313 }
314 }
315 printf("sd card single block test ok\r\n");
316
317 /* sd card multiple blocks test */
318 if(TEST_SUCCESS != sd_multiple_blocks_test())
319 {
320 printf("sd card multiple blocks test fail\r\n");
321 /* multiple blocks test fail, led2 fresh */
322 while(1)
323 {
324 sd_test_error();
325 }
326 }
327 printf("sd card multiple blocks test ok\r\n");
328
329 /* mmc card stream data transfer test */
330 if(sd_card_info.card_type == SDIO_MULTIMEDIA_CARD)
331 {
332 if(TEST_SUCCESS != mmc_stream_test())
333 {
334 printf("mmc card stream data test fail\r\n");
335 /* mmc card stream data test fail, led2 fresh */
336 while(1)
337 {
338 sd_test_error();
339 }
340 }
341 printf("mmc card stream data test ok\r\n");
342 }
343
344 /* all tests pass, led3 and led4 fresh */
345 while(1)
346 {
347 at32_led_toggle(LED3);
348 at32_led_toggle(LED4);
349 delay_ms(300);
350 }
351}
352
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
STREAM_BUFFER_SIZE
#define STREAM_BUFFER_SIZE
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:44
mblock_rbuffer
static uint8_t mblock_rbuffer[((512) *(64))]
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:47
stream_tbuffer
static uint8_t stream_tbuffer[(4096)]
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:48
BLOCKS_NUMBER
#define BLOCKS_NUMBER
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:42
mblock_tbuffer
static uint8_t mblock_tbuffer[((512) *(64))]
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:47
sblock_rbuffer
static uint8_t sblock_rbuffer[(512)]
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:46
stream_rbuffer
static uint8_t stream_rbuffer[(4096)]
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:48
test_result_type
test_result_type
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:54
show_card_info
void show_card_info(void)
show sd/mmc card info.
Definition: project/at_start_f435/examples/sdio/sd_mmc_card/src/main.c:258
sblock_tbuffer
static uint8_t sblock_tbuffer[(512)]
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:46
MULTI_BUFFER_SIZE
#define MULTI_BUFFER_SIZE
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:43
BLOCK_SIZE
#define BLOCK_SIZE
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:41
TEST_FAIL
@ TEST_FAIL
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:55
TEST_SUCCESS
@ TEST_SUCCESS
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:56
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
mmc_stream_write
sd_error_status_type mmc_stream_write(uint8_t *buf, long long addr, uint32_t len)
write mmc card data stream.
Definition: at_start_f437/examples/sdio/sd_mmc_card/src/at32_sdio.c:1700
sd_block_read
sd_error_status_type sd_block_read(uint8_t *buf, long long addr, uint16_t blk_size)
allows to read one block from a specified address in a card. the data transfer can be managed by dma ...
Definition: at_start_f437/examples/sdio/sd_mmc_card/src/at32_sdio.c:1188
sd_mult_blocks_write
sd_error_status_type sd_mult_blocks_write(const uint8_t *buf, long long addr, uint16_t blk_size, uint32_t nblks)
allows to write blocks starting from a specified address in a card. the data transfer can be managed ...
Definition: at_start_f437/examples/sdio/sd_mmc_card/src/at32_sdio.c:1489
sd_block_write
sd_error_status_type sd_block_write(const uint8_t *buf, long long addr, uint16_t blk_size)
allows to write one block starting from a specified address in a card. the data transfer can be manag...
Definition: at_start_f437/examples/sdio/sd_mmc_card/src/at32_sdio.c:1367
sd_init
sd_error_status_type sd_init(void)
initializes the sd card and put it into standby state (ready for data transfer).
Definition: at_start_f437/examples/sdio/sd_mmc_card/src/at32_sdio.c:72
mmc_stream_read
sd_error_status_type mmc_stream_read(uint8_t *buf, long long addr, uint32_t len)
read mmc card data stream.
Definition: at_start_f437/examples/sdio/sd_mmc_card/src/at32_sdio.c:1653
sd_mult_blocks_read
sd_error_status_type sd_mult_blocks_read(uint8_t *buf, long long addr, uint16_t blk_size, uint32_t nblks)
allows to read blocks from a specified address in a card. the data transfer can be managed by dma mod...
Definition: at_start_f437/examples/sdio/sd_mmc_card/src/at32_sdio.c:1277
sd_wide_bus_operation_config
sd_error_status_type sd_wide_bus_operation_config(sdio_bus_width_type mode)
enable wide bus opeartion for the requeseted card if supported by card.
Definition: at_start_f437/examples/sdio/sd_mmc_card/src/at32_sdio.c:743
sd_card_info
sd_card_info_struct_type sd_card_info
Definition: at_start_f435/examples/sdio/sd_mmc_card/src/at32_sdio.c:48
sd_error_status_type
sd_error_status_type
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:75
sdio_bus_width_type
sdio_bus_width_type
sdio bus width
Definition: at32f435_437_sdio.h:139
SD_OK
@ SD_OK
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:120
SDIO_HIGH_CAPACITY_SD_CARD
@ SDIO_HIGH_CAPACITY_SD_CARD
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:207
SDIO_STD_CAPACITY_SD_CARD_V1_1
@ SDIO_STD_CAPACITY_SD_CARD_V1_1
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:205
SDIO_STD_CAPACITY_SD_CARD_V2_0
@ SDIO_STD_CAPACITY_SD_CARD_V2_0
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:206
SDIO_MULTIMEDIA_CARD
@ SDIO_MULTIMEDIA_CARD
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:208
SDIO1_IRQn
@ SDIO1_IRQn
Definition: at32f435_437.h:197
sd_multiple_blocks_test
static test_result_type sd_multiple_blocks_test(void)
sd card multiple blocks read/write test.
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:118
sd_test_error
static void sd_test_error(void)
LED2 on off every 300ms for sd test error.
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:234
nvic_configuration
static void nvic_configuration(void)
configures sdio1 irq channel.
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:247
sd_single_block_test
static test_result_type sd_single_block_test(void)
sd card single block read/write test.
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:71
mmc_stream_test
static test_result_type mmc_stream_test(void)
mmc card data stream read/write test.
Definition: project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c:166
sd_card_info_struct_type::card_capacity
long long card_capacity
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:242
sd_card_info_struct_type::sd_cid_reg
sd_cid_struct_type sd_cid_reg
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:240
sd_card_info_struct_type::sd_csd_reg
sd_csd_struct_type sd_csd_reg
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:239
sd_card_info_struct_type::card_blk_size
uint32_t card_blk_size
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:243
sd_card_info_struct_type::rca
uint16_t rca
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:244
sd_card_info_struct_type::card_type
uint8_t card_type
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:245
sd_cid_struct_type::manufacturer_id
uint8_t manufacturer_id
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:172
sd_csd_struct_type::device_size
uint32_t device_size
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:141
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • sdio
  • sdio_fatfs
  • inc
project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • sdio
  • sdio_fatfs
  • inc
project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • sdio
  • sdio_fatfs
  • inc
project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • sdio
  • sdio_fatfs
  • src
Functions
project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • sdio
  • sdio_fatfs
  • src
project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • sdio
  • sdio_fatfs
  • src
Functions
project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • sdio
  • sdio_fatfs
  • src
project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • sdio
  • sdio_fatfs
  • src
Enumerations | Functions | Variables
project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c File Reference

main program More...

#include <stdbool.h>
#include <string.h>
#include "at32_sdio.h"
#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "ff.h"

Go to the source code of this file.

Enumerations

enum test_result_type {
TEST_FAIL = 0 , TEST_SUCCESS , TEST_FAIL = 0 , TEST_SUCCESS ,
TEST_FAIL = 0 , TEST_SUCCESS , TEST_FAIL = 0 , TEST_SUCCESS
}

Functions

uint8_t | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
compares two buffers. More...
static void | sd_test_error (void)
led2 on off every 300ms for sd test error. More...
static void | nvic_configuration (void)
configures sdio1 irq channel. More...
static test_result_type | fatfs_test (void)
fatfs file read/write test. More...
int | main (void)
main function. More...

Variables

FATFS | fs
FIL | file
BYTE | work [FF_MAX_SS]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c.

Function Documentation

◆ fatfs_test()

static test_result_type fatfs_test ( void )
static

fatfs file read/write test.

Parameters
none
Return values
TEST_FAIL fail. TEST_SUCCESS: success.

Definition at line 110 of file project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c.

◆ nvic_configuration()

static void nvic_configuration ( void )
static

configures sdio1 irq channel.

Parameters
none
Return values
none

Definition at line 98 of file project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c.

◆ sd_test_error()

static void sd_test_error ( void )
static

led2 on off every 300ms for sd test error.

Parameters
none
Return values
none

Definition at line 85 of file project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • sdio
  • sdio_fatfs
  • src
project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c
Go to the documentation of this file.
1
27#include <stdbool.h>
28#include <string.h>
29#include "at32_sdio.h"
30#include "at32f435_437_board.h"
31#include "at32f435_437_clock.h"
32#include "ff.h"
33
42FATFS fs;
43FIL file;
44BYTE work[FF_MAX_SS];
45
49typedef enum
50{
51 TEST_FAIL = 0,
52 TEST_SUCCESS,
53} test_result_type;
54
55uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length);
56static void sd_test_error(void);
57static void nvic_configuration(void);
58
66uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
67{
68 while(buffer_length--)
69 {
70 if(*pbuffer1 != *pbuffer2)
71 {
72 return 0;
73 }
74 pbuffer1++;
75 pbuffer2++;
76 }
77 return 1;
78}
79
85static void sd_test_error(void)
86{
87 at32_led_on(LED2);
88 delay_ms(300);
89 at32_led_off(LED2);
90 delay_ms(300);
91}
92
98static void nvic_configuration(void)
99{
100 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
101 nvic_irq_enable(SDIO1_IRQn, 1, 0);
102}
103
110static test_result_type fatfs_test(void)
111{
112 FRESULT ret;
113 char filename[] = "1:/test1.txt";
114 const char wbuf[] = "this is my file for test fatfs!\r\n";
115 char rbuf[50];
116 UINT bytes_written = 0;
117 UINT bytes_read = 0;
118 DWORD fre_clust, fre_sect, tot_sect;
119 FATFS* pt_fs;
120
121 ret = f_mount(&fs, "1:", 1);
122 if(ret){
123 printf("fs mount err:%d.\r\n", ret);
124 if(ret == FR_NO_FILESYSTEM){
125 printf("create fatfs..\r\n");
126 ret = f_mkfs("1:", 0, work, sizeof(work));
127 if(ret){
128 printf("creates fatfs err:%d.\r\n", ret);
129 return TEST_FAIL;
130 }
131 else{
132 printf("creates fatfs ok.\r\n");
133 }
134 ret = f_mount(NULL, "1:", 1);
135 ret = f_mount(&fs, "1:", 1);
136 if(ret){
137 printf("fs mount err:%d.\r\n", ret);
138 return TEST_FAIL;
139 }
140 else{
141 printf("fs mount ok.\r\n");
142 }
143 }
144 else{
145 return TEST_FAIL;
146 }
147 }
148 else{
149 printf("fs mount ok.\r\n");
150 }
151
152 ret = f_open(&file, filename, FA_READ | FA_WRITE | FA_CREATE_ALWAYS);
153 if(ret){
154 printf("open file err:%d.\r\n", ret);
155 }
156 else{
157 printf("open file ok.\r\n");
158 }
159 ret = f_write(&file, wbuf, sizeof(wbuf), &bytes_written);
160 if(ret){
161 printf("write file err:%d.\r\n", ret);
162 }
163 else{
164 printf("write file ok, byte:%u.\r\n", bytes_written);
165 }
166 f_lseek(&file, 0);
167 ret = f_read(&file, rbuf, sizeof(rbuf), &bytes_read);
168 if(ret){
169 printf("read file err:%d.\r\n", ret);
170 }
171 else{
172 printf("read file ok, byte:%u.\r\n", bytes_read);
173 }
174 ret = f_close(&file);
175 if(ret){
176 printf("close file err:%d.\r\n", ret);
177 }
178 else{
179 printf("close file ok.\r\n");
180 }
181
182 pt_fs = &fs;
183 /* get volume information and free clusters of drive 1 */
184 ret = f_getfree("1:", &fre_clust, &pt_fs);
185 if(ret == FR_OK)
186 {
187 /* get total sectors and free sectors */
188 tot_sect = (pt_fs->n_fatent - 2) * pt_fs->csize;
189 fre_sect = fre_clust * pt_fs->csize;
190
191 /* print the free space (assuming 512 bytes/sector) */
192 printf("%10u KiB total drive space.\r\n%10u KiB available.\r\n", tot_sect / 2, fre_sect / 2);
193 }
194
195 ret = f_mount(NULL, "1:", 1);
196
197 if(1 == buffer_compare((uint8_t*)rbuf, (uint8_t*)wbuf, sizeof(wbuf))){
198 printf("r/w file data test ok.\r\n");
199 }
200 else{
201 printf("r/w file data test fail.\r\n");
202 return TEST_FAIL;
203 }
204
205 return TEST_SUCCESS;
206}
207
208/* gloable functions ---------------------------------------------------------*/
214int main(void)
215{
216 system_clock_config();
217
218 at32_board_init();
219
220 nvic_configuration();
221
222 uart_print_init(115200);
223 printf("start test fatfs r0.14b..\r\n");
224
225 if(TEST_SUCCESS != fatfs_test())
226 {
227 while(1)
228 {
229 sd_test_error();
230 }
231 }
232
233 /* all tests pass, led3 and led4 fresh */
234 while(1)
235 {
236 at32_led_toggle(LED3);
237 at32_led_toggle(LED4);
238 delay_ms(300);
239 }
240}
241
at32f435_437_board.h
FF_MAX_SS
#define FF_MAX_SS
Definition: at_start_f435/examples/sdio/sdio_fatfs/inc/ffconf.h:197
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
wbuf
uint8_t wbuf[4096]
Definition: project/at_start_f435/examples/qspi/command_port_using_interrupt/src/main.c:44
rbuf
uint8_t rbuf[4096]
Definition: project/at_start_f435/examples/qspi/command_port_using_interrupt/src/main.c:45
test_result_type
test_result_type
Definition: project/at_start_f435/examples/sdio/sd_mmc_card/src/main.c:54
file
FIL file
Definition: project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c:43
test_result_type
test_result_type
Definition: project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c:50
work
BYTE work[FF_MAX_SS]
Definition: project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c:44
fs
FATFS fs
Definition: project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c:42
TEST_FAIL
@ TEST_FAIL
Definition: project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c:51
TEST_SUCCESS
@ TEST_SUCCESS
Definition: project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c:52
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
SDIO1_IRQn
@ SDIO1_IRQn
Definition: at32f435_437.h:197
sd_test_error
static void sd_test_error(void)
led2 on off every 300ms for sd test error.
Definition: project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c:85
nvic_configuration
static void nvic_configuration(void)
configures sdio1 irq channel.
Definition: project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c:98
fatfs_test
static test_result_type fatfs_test(void)
fatfs file read/write test.
Definition: project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • spi
  • crc_transfer_polling
  • inc
project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • spi
  • crc_transfer_polling
  • inc
project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • spi
  • crc_transfer_polling
  • inc
project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • spi
  • crc_transfer_polling
  • src
Functions
project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • spi
  • crc_transfer_polling
  • src
project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • spi
  • crc_transfer_polling
  • src
Functions
project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • spi
  • crc_transfer_polling
  • src
project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • spi
  • crc_transfer_polling
  • src
Macros | Functions | Variables
project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 32

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | spi_config (void)
spi configuration. More...
error_status | buffer_compare (uint16_t *pbuffer1, uint16_t *pbuffer2, uint16_t buffer_length)
buffer compare function. More...
int | main (void)
main function. More...

Variables

uint16_t | spi3_buffer_tx [32]
uint16_t | spi2_buffer_tx [32]
uint16_t | spi3_buffer_rx [32]
uint16_t | spi2_buffer_rx [32]
uint32_t | tx_index = 0
uint32_t | rx_index = 0
__IO uint16_t | crc1_value = 0
__IO uint16_t | crc2_value = 0
volatile error_status | transfer_status1 = ERROR
volatile error_status | transfer_status2 = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c.

Function Documentation

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 10

< gpio pins number 11

< gpio pins number 12

< gpio pins number 1

< gpio pins number 2

< gpio pins number 4

Definition at line 114 of file project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c.

◆ spi_config()

static void spi_config ( void )
static

spi configuration.

Parameters
none
Return values
none

Definition at line 82 of file project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • spi
  • crc_transfer_polling
  • src
project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 32
39
40uint16_t spi3_buffer_tx[BUFFER_SIZE] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, 0x0D0E, 0x0F10,
41 0x1112, 0x1314, 0x1516, 0x1718, 0x191A, 0x1B1C, 0x1D1E, 0x1F20,
42 0x2122, 0x2324, 0x2526, 0x2728, 0x292A, 0x2B2C, 0x2D2E, 0x2F30,
43 0x3132, 0x3334, 0x3536, 0x3738, 0x393A, 0x3B3C, 0x3D3E, 0x3F40};
44uint16_t spi2_buffer_tx[BUFFER_SIZE] = {0x5152, 0x5354, 0x5556, 0x5758, 0x595A, 0x5B5C, 0x5D5E, 0x5F60,
45 0x6162, 0x6364, 0x6566, 0x6768, 0x696A, 0x6B6C, 0x6D6E, 0x6F70,
46 0x7172, 0x7374, 0x7576, 0x7778, 0x797A, 0x7B7C, 0x7D7E, 0x7F80,
47 0x8182, 0x8384, 0x8586, 0x8788, 0x898A, 0x8B8C, 0x8D8E, 0x8F90};
48uint16_t spi3_buffer_rx[BUFFER_SIZE], spi2_buffer_rx[BUFFER_SIZE];
49uint32_t tx_index = 0, rx_index = 0;
50__IO uint16_t crc1_value = 0, crc2_value = 0;
51volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
52
53static void gpio_config(void);
54static void spi_config(void);
55 error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length);
56
63 error_status buffer_compare(uint16_t* pbuffer1, uint16_t* pbuffer2, uint16_t buffer_length)
64{
65 while(buffer_length--)
66 {
67 if(*pbuffer1 != *pbuffer2)
68 {
69 return ERROR;
70 }
71 pbuffer1++;
72 pbuffer2++;
73 }
74 return SUCCESS;
75}
76
82static void spi_config(void)
83{
84 spi_init_type spi_init_struct;
85 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
87 spi_default_para_init(&spi_init_struct);
88 spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
89 spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
90 spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
91 spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
92 spi_init_struct.frame_bit_num = SPI_FRAME_16BIT;
93 spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
94 spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
95 spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
96 spi_init(SPI3, &spi_init_struct);
97
98 spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
99 spi_init(SPI2, &spi_init_struct);
100
101 spi_crc_polynomial_set(SPI3, 7);
102 spi_crc_polynomial_set(SPI2, 7);
103 spi_crc_enable(SPI3, TRUE);
104 spi_crc_enable(SPI2, TRUE);
105 spi_enable(SPI3, TRUE);
106 spi_enable(SPI2, TRUE);
107}
108
114static void gpio_config(void)
115{
116 gpio_init_type gpio_initstructure;
117 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
118 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
119
120 /* master sck pin */
121 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
122 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
123 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
124 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
125 gpio_initstructure.gpio_pins = GPIO_PINS_10;
126 gpio_init(GPIOC, &gpio_initstructure);
127 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE10, GPIO_MUX_6);
128
129 /* master miso pin */
130 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
131 gpio_initstructure.gpio_pins = GPIO_PINS_11;
132 gpio_init(GPIOC, &gpio_initstructure);
133 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE11, GPIO_MUX_6);
134
135 /* master mosi pin */
136 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
137 gpio_initstructure.gpio_pins = GPIO_PINS_12;
138 gpio_init(GPIOC, &gpio_initstructure);
139 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_6);
140
141 /* slave sck pin */
142 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
143 gpio_initstructure.gpio_pins = GPIO_PINS_1;
144 gpio_init(GPIOD, &gpio_initstructure);
145 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6);
146
147 /* slave miso pin */
148 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
149 gpio_initstructure.gpio_pins = GPIO_PINS_2;
150 gpio_init(GPIOC, &gpio_initstructure);
151 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_5);
152
153 /* slave mosi pin */
154 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
155 gpio_initstructure.gpio_pins = GPIO_PINS_4;
156 gpio_init(GPIOD, &gpio_initstructure);
157 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_6);
158}
159
165int main(void)
166{
167 system_clock_config();
168 at32_board_init();
169 gpio_config();
170 spi_config();
171
172 /* transfer procedure:the "BUFFER_SIZE-1" data transfer */
173 while(tx_index < BUFFER_SIZE - 1)
174 {
175 while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET);
176 spi_i2s_data_transmit(SPI2, spi2_buffer_tx[tx_index]);
177 while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET);
178 spi_i2s_data_transmit(SPI3, spi3_buffer_tx[tx_index++]);
179 while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
180 spi2_buffer_rx[rx_index] = spi_i2s_data_receive(SPI2);
181 while(spi_i2s_flag_get(SPI3, SPI_I2S_RDBF_FLAG) == RESET);
182 spi3_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI3);
183 }
184 while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET);
185 while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET);
186
187 /* transfer procedure:the last data and crc transfer */
188 spi_i2s_data_transmit(SPI2, spi2_buffer_tx[tx_index]);
189 spi_crc_next_transmit(SPI2);
190 spi_i2s_data_transmit(SPI3, spi3_buffer_tx[tx_index]);
191 spi_crc_next_transmit(SPI3);
192 while(spi_i2s_flag_get(SPI3, SPI_I2S_RDBF_FLAG) == RESET);
193 spi3_buffer_rx[rx_index] = spi_i2s_data_receive(SPI3);
194 while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
195 spi2_buffer_rx[rx_index] = spi_i2s_data_receive(SPI2);
196 while(spi_i2s_flag_get(SPI3, SPI_I2S_RDBF_FLAG) == RESET);
197 while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
198
199 /* test result:the data and crc check */
200 transfer_status1 = buffer_compare(spi2_buffer_rx, spi3_buffer_tx, BUFFER_SIZE);
201 transfer_status2 = buffer_compare(spi3_buffer_rx, spi2_buffer_tx, BUFFER_SIZE);
202 if((spi_i2s_flag_get(SPI3, SPI_CCERR_FLAG)) != RESET)
203 {
204 spi_i2s_flag_clear(SPI3, SPI_CCERR_FLAG);
205 transfer_status2 = ERROR;
206 }
207 if((spi_i2s_flag_get(SPI2, SPI_CCERR_FLAG)) != RESET)
208 {
209 spi_i2s_flag_clear(SPI2, SPI_CCERR_FLAG);
210 transfer_status1 = ERROR;
211 }
212 crc1_value = spi_i2s_data_receive(SPI3);
213 crc2_value = spi_i2s_data_receive(SPI2);
214
215 /* test result indicate:if success ,led2 lights */
216 if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS))
217 {
218 at32_led_on(LED2);
219 }
220 else
221 {
222 at32_led_off(LED2);
223 }
224 while(1)
225 {
226 }
227}
228
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
spi2_buffer_tx
uint16_t spi2_buffer_tx[32]
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:44
spi3_buffer_tx
uint16_t spi3_buffer_tx[32]
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:40
transfer_status1
volatile error_status transfer_status1
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:51
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:38
crc2_value
__IO uint16_t crc2_value
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:50
transfer_status2
volatile error_status transfer_status2
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:51
spi3_buffer_rx
uint16_t spi3_buffer_rx[32]
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:48
rx_index
uint32_t rx_index
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:49
spi2_buffer_rx
uint16_t spi2_buffer_rx[32]
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:48
tx_index
uint32_t tx_index
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:49
crc1_value
__IO uint16_t crc1_value
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:50
spi_init_struct
spi_init_type spi_init_struct
Definition: project/at_start_f435/examples/spi/fullduplex_polling/src/main.c:40
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SPI3_PERIPH_CLOCK
@ CRM_SPI3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:139
CRM_SPI2_PERIPH_CLOCK
@ CRM_SPI2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:138
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_6
@ GPIO_MUX_6
Definition: at32f435_437_gpio.h:162
GPIO_MUX_5
@ GPIO_MUX_5
Definition: at32f435_437_gpio.h:161
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
SPI_CCERR_FLAG
#define SPI_CCERR_FLAG
Definition: at32f435_437_spi.h:57
SPI_I2S_TDBE_FLAG
#define SPI_I2S_TDBE_FLAG
Definition: at32f435_437_spi.h:54
SPI_I2S_RDBF_FLAG
#define SPI_I2S_RDBF_FLAG
Definition: at32f435_437_spi.h:53
spi_i2s_data_transmit
void spi_i2s_data_transmit(spi_type *spi_x, uint16_t tx_data)
spi/i2s data transmit
Definition: at32f435_437_spi.c:548
spi_crc_enable
void spi_crc_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the hardware crc calculation for the spi peripheral.
Definition: at32f435_437_spi.c:225
spi_i2s_flag_get
flag_status spi_i2s_flag_get(spi_type *spi_x, uint32_t spi_i2s_flag)
get flag of the specified spi/i2s peripheral.
Definition: at32f435_437_spi.c:583
spi_crc_next_transmit
void spi_crc_next_transmit(spi_type *spi_x)
spi next transmit crc for the spi peripheral.
Definition: at32f435_437_spi.c:186
spi_init
void spi_init(spi_type *spi_x, spi_init_type *spi_init_struct)
spi init config with its setting value.
Definition: at32f435_437_spi.c:101
spi_default_para_init
void spi_default_para_init(spi_init_type *spi_init_struct)
spi init config with its default value.
Definition: at32f435_437_spi.c:81
spi_crc_polynomial_set
void spi_crc_polynomial_set(spi_type *spi_x, uint16_t crc_poly)
set the crc polynomial value for the spi peripheral.
Definition: at32f435_437_spi.c:199
spi_i2s_data_receive
uint16_t spi_i2s_data_receive(spi_type *spi_x)
spi/i2s data receive
Definition: at32f435_437_spi.c:560
spi_i2s_flag_clear
void spi_i2s_flag_clear(spi_type *spi_x, uint32_t spi_i2s_flag)
clear flag of the specified spi/i2s peripheral.
Definition: at32f435_437_spi.c:616
spi_enable
void spi_enable(spi_type *spi_x, confirm_state new_state)
enable or disable spi.
Definition: at32f435_437_spi.c:321
SPI_MODE_SLAVE
@ SPI_MODE_SLAVE
Definition: at32f435_437_spi.h:99
SPI_MODE_MASTER
@ SPI_MODE_MASTER
Definition: at32f435_437_spi.h:100
SPI_CLOCK_PHASE_2EDGE
@ SPI_CLOCK_PHASE_2EDGE
Definition: at32f435_437_spi.h:118
SPI_CS_SOFTWARE_MODE
@ SPI_CS_SOFTWARE_MODE
Definition: at32f435_437_spi.h:127
SPI_FIRST_BIT_MSB
@ SPI_FIRST_BIT_MSB
Definition: at32f435_437_spi.h:153
SPI_CLOCK_POLARITY_LOW
@ SPI_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:108
SPI_TRANSMIT_FULL_DUPLEX
@ SPI_TRANSMIT_FULL_DUPLEX
Definition: at32f435_437_spi.h:162
SPI_MCLK_DIV_8
@ SPI_MCLK_DIV_8
Definition: at32f435_437_spi.h:138
SPI_FRAME_16BIT
@ SPI_FRAME_16BIT
Definition: at32f435_437_spi.h:91
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
spi_config
static void spi_config(void)
spi configuration.
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:82
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c:114
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
spi_init_type
spi init type
Definition: at32f435_437_spi.h:259
spi_init_type::master_slave_mode
spi_master_slave_mode_type master_slave_mode
Definition: at32f435_437_spi.h:261
spi_init_type::first_bit_transmission
spi_first_bit_type first_bit_transmission
Definition: at32f435_437_spi.h:263
spi_init_type::frame_bit_num
spi_frame_bit_num_type frame_bit_num
Definition: at32f435_437_spi.h:264
spi_init_type::clock_polarity
spi_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:265
spi_init_type::cs_mode_selection
spi_cs_mode_type cs_mode_selection
Definition: at32f435_437_spi.h:267
spi_init_type::mclk_freq_division
spi_mclk_freq_div_type mclk_freq_division
Definition: at32f435_437_spi.h:262
spi_init_type::transmission_mode
spi_transmission_mode_type transmission_mode
Definition: at32f435_437_spi.h:260
spi_init_type::clock_phase
spi_clock_phase_type clock_phase
Definition: at32f435_437_spi.h:266
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • spi
  • fullduplex_polling
  • inc
project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • spi
  • fullduplex_polling
  • inc
project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • spi
  • fullduplex_polling
  • inc
project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • spi
  • fullduplex_polling
  • src
Functions
project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • spi
  • fullduplex_polling
  • src
project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • spi
  • fullduplex_polling
  • src
Functions
project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • spi
  • fullduplex_polling
  • src
project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • spi
  • fullduplex_polling
  • src
Macros | Functions | Variables
project/at_start_f437/examples/spi/fullduplex_polling/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 32

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | spi_config (void)
spi configuration. More...
error_status | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t bufferlength)
buffer compare function. More...
int | main (void)
main function. More...

Variables

spi_init_type spi_init_struct
uint8_t | spi3_buffer_tx [32]
uint8_t | spi2_buffer_tx [32]
uint8_t | spi3_buffer_rx [32]
uint8_t | spi2_buffer_rx [32]
uint32_t | tx_index = 0
uint32_t | rx_index = 0
volatile error_status | transfer_status1 = ERROR
volatile error_status | transfer_status2 = ERROR
volatile error_status | transfer_status3 = ERROR
volatile error_status | transfer_status4 = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/fullduplex_polling/src/main.c.

Function Documentation

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 10

< gpio pins number 11

< gpio pins number 12

< gpio pins number 1

< gpio pins number 2

< gpio pins number 4

Definition at line 111 of file project/at_start_f437/examples/spi/fullduplex_polling/src/main.c.

◆ spi_config()

static void spi_config ( void )
static

spi configuration.

Parameters
none
Return values
none

Definition at line 84 of file project/at_start_f437/examples/spi/fullduplex_polling/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • spi
  • fullduplex_polling
  • src
project/at_start_f437/examples/spi/fullduplex_polling/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 32
39
40 spi_init_type spi_init_struct;
41uint8_t spi3_buffer_tx[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
42 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
43 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
44 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20};
45uint8_t spi2_buffer_tx[BUFFER_SIZE] = {0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58,
46 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F, 0x60,
47 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
48 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70};
49uint8_t spi3_buffer_rx[BUFFER_SIZE], spi2_buffer_rx[BUFFER_SIZE];
50uint32_t tx_index = 0, rx_index = 0;
51volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
52volatile error_status transfer_status3 = ERROR, transfer_status4 = ERROR;
53
54static void gpio_config(void);
55static void spi_config(void);
56 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength);
57
64 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength)
65{
66 while(bufferlength--)
67 {
68 if(*pbuffer1 != *pbuffer2)
69 {
70 return ERROR;
71 }
72
73 pbuffer1++;
74 pbuffer2++;
75 }
76 return SUCCESS;
77}
78
84static void spi_config(void)
85{
86 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
87 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
88 spi_default_para_init(&spi_init_struct);
89 spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
90 spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
91 spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
92 spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB;
93 spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
94 spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
95 spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
96 spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
97 spi_init(SPI3, &spi_init_struct);
98
99 spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
100 spi_init(SPI2, &spi_init_struct);
101
102 spi_enable(SPI3, TRUE);
103 spi_enable(SPI2, TRUE);
104}
105
111static void gpio_config(void)
112{
113 gpio_init_type gpio_initstructure;
114 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
115 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
116 gpio_default_para_init(&gpio_initstructure);
117 /* spi3 sck pin */
118 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
119 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
120 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
121 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
122 gpio_initstructure.gpio_pins = GPIO_PINS_10;
123 gpio_init(GPIOC, &gpio_initstructure);
124 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE10, GPIO_MUX_6);
125
126 /* spi3 miso pin */
127 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
128 gpio_initstructure.gpio_pins = GPIO_PINS_11;
129 gpio_init(GPIOC, &gpio_initstructure);
130 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE11, GPIO_MUX_6);
131
132 /* spi3 mosi pin */
133 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
134 gpio_initstructure.gpio_pins = GPIO_PINS_12;
135 gpio_init(GPIOC, &gpio_initstructure);
136 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_6);
137
138 /* spi2 sck pin */
139 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
140 gpio_initstructure.gpio_pins = GPIO_PINS_1;
141 gpio_init(GPIOD, &gpio_initstructure);
142 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6);
143
144 /* spi2 miso pin */
145 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
146 gpio_initstructure.gpio_pins = GPIO_PINS_2;
147 gpio_init(GPIOC, &gpio_initstructure);
148 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_5);
149
150 /* spi2 mosi pin */
151 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
152 gpio_initstructure.gpio_pins = GPIO_PINS_4;
153 gpio_init(GPIOD, &gpio_initstructure);
154 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_6);
155}
156
162int main(void)
163{
164 __IO uint32_t index = 0;
165 system_clock_config();
166 at32_board_init();
167 gpio_config();
168 spi_config();
169
170 /* transfer procedure:the "BUFFER_SIZE" data transfer */
171 while(tx_index < BUFFER_SIZE)
172 {
173 while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET);
174 spi_i2s_data_transmit(SPI2, spi2_buffer_tx[tx_index]);
175 while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET);
176 spi_i2s_data_transmit(SPI3, spi3_buffer_tx[tx_index++]);
177 while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
178 spi2_buffer_rx[rx_index] = spi_i2s_data_receive(SPI2);
179 while(spi_i2s_flag_get(SPI3, SPI_I2S_RDBF_FLAG) == RESET);
180 spi3_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI3);
181 }
182
183 /* test result:the data check */
184 transfer_status1 = buffer_compare(spi2_buffer_rx, spi3_buffer_tx, BUFFER_SIZE);
185 transfer_status2 = buffer_compare(spi3_buffer_rx, spi2_buffer_tx, BUFFER_SIZE);
186
187 /* master &slave mode switch */
188 spi_enable(SPI3, FALSE);
189 spi_enable(SPI2, FALSE);
190 spi_init_struct.master_slave_mode =SPI_MODE_SLAVE;
191 spi_init(SPI3, &spi_init_struct);
192
193 spi_init_struct.master_slave_mode =SPI_MODE_MASTER;
194 spi_init(SPI2, &spi_init_struct);
195
196 tx_index = 0;
197 rx_index = 0;
198 for(index = 0; index < BUFFER_SIZE; index++)
199 spi3_buffer_rx[index] = 0;
200 for(index = 0; index < BUFFER_SIZE; index++)
201 spi2_buffer_rx[index] = 0;
202
203 spi_enable(SPI2, TRUE);
204 spi_enable(SPI3, TRUE);
205
206 /* transfer procedure:the "BUFFER_SIZE" data transfer */
207 while(tx_index < BUFFER_SIZE)
208 {
209 while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET);
210 spi_i2s_data_transmit(SPI3, spi3_buffer_tx[tx_index]);
211 while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET);
212 spi_i2s_data_transmit(SPI2, spi2_buffer_tx[tx_index++]);
213 while(spi_i2s_flag_get(SPI3, SPI_I2S_RDBF_FLAG) == RESET);
214 spi3_buffer_rx[rx_index] = spi_i2s_data_receive(SPI3);
215 while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
216 spi2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
217 }
218
219 /* test result:the data check */
220 transfer_status3 = buffer_compare(spi2_buffer_rx, spi3_buffer_tx, BUFFER_SIZE);
221 transfer_status4 = buffer_compare(spi3_buffer_rx, spi2_buffer_tx, BUFFER_SIZE);
222
223 /* test result indicate:if success ,led2 lights */
224 if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS) && \
225 (transfer_status3 == SUCCESS) && (transfer_status4 == SUCCESS))
226 {
227 at32_led_on(LED2);
228 }
229 else
230 {
231 at32_led_off(LED2);
232 }
233 while(1)
234 {
235 }
236}
237
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
spi2_buffer_tx
uint8_t spi2_buffer_tx[32]
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:45
spi3_buffer_rx
uint8_t spi3_buffer_rx[32]
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:49
spi2_buffer_rx
uint8_t spi2_buffer_rx[32]
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:49
transfer_status3
volatile error_status transfer_status3
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:52
transfer_status1
volatile error_status transfer_status1
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:51
transfer_status4
volatile error_status transfer_status4
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:52
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:38
transfer_status2
volatile error_status transfer_status2
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:51
spi_init_struct
spi_init_type spi_init_struct
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:40
rx_index
uint32_t rx_index
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:50
tx_index
uint32_t tx_index
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:50
spi3_buffer_tx
uint8_t spi3_buffer_tx[32]
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SPI3_PERIPH_CLOCK
@ CRM_SPI3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:139
CRM_SPI2_PERIPH_CLOCK
@ CRM_SPI2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:138
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_6
@ GPIO_MUX_6
Definition: at32f435_437_gpio.h:162
GPIO_MUX_5
@ GPIO_MUX_5
Definition: at32f435_437_gpio.h:161
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
SPI_I2S_TDBE_FLAG
#define SPI_I2S_TDBE_FLAG
Definition: at32f435_437_spi.h:54
SPI_I2S_RDBF_FLAG
#define SPI_I2S_RDBF_FLAG
Definition: at32f435_437_spi.h:53
spi_i2s_data_transmit
void spi_i2s_data_transmit(spi_type *spi_x, uint16_t tx_data)
spi/i2s data transmit
Definition: at32f435_437_spi.c:548
spi_i2s_flag_get
flag_status spi_i2s_flag_get(spi_type *spi_x, uint32_t spi_i2s_flag)
get flag of the specified spi/i2s peripheral.
Definition: at32f435_437_spi.c:583
spi_init
void spi_init(spi_type *spi_x, spi_init_type *spi_init_struct)
spi init config with its setting value.
Definition: at32f435_437_spi.c:101
spi_default_para_init
void spi_default_para_init(spi_init_type *spi_init_struct)
spi init config with its default value.
Definition: at32f435_437_spi.c:81
spi_i2s_data_receive
uint16_t spi_i2s_data_receive(spi_type *spi_x)
spi/i2s data receive
Definition: at32f435_437_spi.c:560
spi_enable
void spi_enable(spi_type *spi_x, confirm_state new_state)
enable or disable spi.
Definition: at32f435_437_spi.c:321
SPI_MODE_SLAVE
@ SPI_MODE_SLAVE
Definition: at32f435_437_spi.h:99
SPI_MODE_MASTER
@ SPI_MODE_MASTER
Definition: at32f435_437_spi.h:100
SPI_CLOCK_PHASE_2EDGE
@ SPI_CLOCK_PHASE_2EDGE
Definition: at32f435_437_spi.h:118
SPI_CS_SOFTWARE_MODE
@ SPI_CS_SOFTWARE_MODE
Definition: at32f435_437_spi.h:127
SPI_FIRST_BIT_LSB
@ SPI_FIRST_BIT_LSB
Definition: at32f435_437_spi.h:154
SPI_CLOCK_POLARITY_LOW
@ SPI_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:108
SPI_TRANSMIT_FULL_DUPLEX
@ SPI_TRANSMIT_FULL_DUPLEX
Definition: at32f435_437_spi.h:162
SPI_MCLK_DIV_8
@ SPI_MCLK_DIV_8
Definition: at32f435_437_spi.h:138
SPI_FRAME_8BIT
@ SPI_FRAME_8BIT
Definition: at32f435_437_spi.h:90
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
spi_config
static void spi_config(void)
spi configuration.
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:84
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/spi/fullduplex_polling/src/main.c:111
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
spi_init_type
spi init type
Definition: at32f435_437_spi.h:259
spi_init_type::master_slave_mode
spi_master_slave_mode_type master_slave_mode
Definition: at32f435_437_spi.h:261
spi_init_type::first_bit_transmission
spi_first_bit_type first_bit_transmission
Definition: at32f435_437_spi.h:263
spi_init_type::frame_bit_num
spi_frame_bit_num_type frame_bit_num
Definition: at32f435_437_spi.h:264
spi_init_type::clock_polarity
spi_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:265
spi_init_type::cs_mode_selection
spi_cs_mode_type cs_mode_selection
Definition: at32f435_437_spi.h:267
spi_init_type::mclk_freq_division
spi_mclk_freq_div_type mclk_freq_division
Definition: at32f435_437_spi.h:262
spi_init_type::transmission_mode
spi_transmission_mode_type transmission_mode
Definition: at32f435_437_spi.h:260
spi_init_type::clock_phase
spi_clock_phase_type clock_phase
Definition: at32f435_437_spi.h:266
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • spi
  • halfduplex_interrupt
  • inc
project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • spi
  • halfduplex_interrupt
  • inc
project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • spi
  • halfduplex_interrupt
  • inc
project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • spi
  • halfduplex_interrupt
  • src
Functions
project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • spi
  • halfduplex_interrupt
  • src
project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • spi
  • halfduplex_interrupt
  • src
Macros | Functions | Variables
project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Macros

#define BUFFERSIZE 32

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | SPI3_I2S3EXT_IRQHandler (void)
This function handles the spi3 interrupt request. More...
void | SPI2_I2S2EXT_IRQHandler (void)
This function handles the spi2 interrupt request. More...

Variables

uint8_t | spi3_buffer_tx [32]
uint8_t | spi2_buffer_rx [32]
uint32_t | tx_index
uint32_t | rx_index

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • spi
  • halfduplex_interrupt
  • src
project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38#define BUFFERSIZE 32
39
40extern uint8_t spi3_buffer_tx[BUFFERSIZE];
41extern uint8_t spi2_buffer_rx[BUFFERSIZE];
42extern uint32_t tx_index;
43extern uint32_t rx_index;
44
50void NMI_Handler(void)
51{
52}
53
59void HardFault_Handler(void)
60{
61 /* go to infinite loop when hard fault exception occurs */
62 while(1)
63 {
64 }
65}
66
72void MemManage_Handler(void)
73{
74 /* go to infinite loop when memory manage exception occurs */
75 while(1)
76 {
77 }
78}
79
85void BusFault_Handler(void)
86{
87 /* go to infinite loop when bus fault exception occurs */
88 while(1)
89 {
90 }
91}
92
98void UsageFault_Handler(void)
99{
100 /* go to infinite loop when usage fault exception occurs */
101 while(1)
102 {
103 }
104}
105
111void SVC_Handler(void)
112{
113}
114
120void DebugMon_Handler(void)
121{
122}
123
129void PendSV_Handler(void)
130{
131}
132
138void SysTick_Handler(void)
139{
140}
141
147 void SPI3_I2S3EXT_IRQHandler(void)
148{
149 if(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) != RESET)
150 {
151 spi_i2s_data_transmit(SPI3, spi3_buffer_tx[tx_index++]);
152 if(tx_index == BUFFERSIZE)
153 {
154 spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, FALSE);
155 }
156 }
157}
158
164 void SPI2_I2S2EXT_IRQHandler(void)
165{
166 if(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET)
167 {
168 spi2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
169 }
170}
171
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
SPI3_I2S3EXT_IRQHandler
void SPI3_I2S3EXT_IRQHandler(void)
This function handles the spi3 interrupt request.
Definition: project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c:157
SPI2_I2S2EXT_IRQHandler
void SPI2_I2S2EXT_IRQHandler(void)
This function handles the spi2 interrupt request.
Definition: project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c:144
spi2_buffer_rx
uint8_t spi2_buffer_rx[32]
Definition: project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:53
rx_index
uint32_t rx_index
Definition: project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c:40
tx_index
uint32_t tx_index
Definition: project/at_start_f435/examples/i2s/halfduplex_interrupt/src/main.c:45
BUFFERSIZE
#define BUFFERSIZE
Definition: project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_int.c:38
spi3_buffer_tx
uint8_t spi3_buffer_tx[32]
Definition: project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:45
FALSE
@ FALSE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
SPI_I2S_TDBE_FLAG
#define SPI_I2S_TDBE_FLAG
Definition: at32f435_437_spi.h:54
SPI_I2S_RDBF_FLAG
#define SPI_I2S_RDBF_FLAG
Definition: at32f435_437_spi.h:53
SPI_I2S_TDBE_INT
#define SPI_I2S_TDBE_INT
Definition: at32f435_437_spi.h:75
spi_i2s_interrupt_enable
void spi_i2s_interrupt_enable(spi_type *spi_x, uint32_t spi_i2s_int, confirm_state new_state)
enable or disable the specified spi/i2s interrupts.
Definition: at32f435_437_spi.c:498
spi_i2s_data_transmit
void spi_i2s_data_transmit(spi_type *spi_x, uint16_t tx_data)
spi/i2s data transmit
Definition: at32f435_437_spi.c:548
spi_i2s_flag_get
flag_status spi_i2s_flag_get(spi_type *spi_x, uint32_t spi_i2s_flag)
get flag of the specified spi/i2s peripheral.
Definition: at32f435_437_spi.c:583
spi_i2s_data_receive
uint16_t spi_i2s_data_receive(spi_type *spi_x)
spi/i2s data receive
Definition: at32f435_437_spi.c:560
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • spi
  • halfduplex_interrupt
  • src
Macros | Functions | Variables
project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 32

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | spi_config (void)
spi configuration. More...
error_status | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
buffer compare function. More...
int | main (void)
main function. More...

Variables

spi_init_type spi_init_struct
uint8_t | spi3_buffer_tx [32]
uint8_t | spi2_buffer_rx [32]
volatile uint32_t | tx_index = 0
volatile uint32_t | rx_index = 0
volatile error_status | transfer_status = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c.

Function Documentation

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 10

< gpio pins number 12

< gpio pins number 1

< gpio pins number 2

Definition at line 113 of file project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c.

◆ spi_config()

static void spi_config ( void )
static

spi configuration.

Parameters
none
Return values
none

< transmit data buffer empty interrupt

< receive data buffer full interrupt

Definition at line 80 of file project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • spi
  • halfduplex_interrupt
  • src
project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 32
39
40 spi_init_type spi_init_struct;
41
42uint8_t spi3_buffer_tx[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
43 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
44 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
45 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20};
46uint8_t spi2_buffer_rx[BUFFER_SIZE];
47volatile uint32_t tx_index = 0, rx_index = 0;
48volatile error_status transfer_status = ERROR;
49
50static void gpio_config(void);
51static void spi_config(void);
52 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length);
53
60 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
61{
62 while(buffer_length--)
63 {
64 if(*pbuffer1 != *pbuffer2)
65 {
66 return ERROR;
67 }
68
69 pbuffer1++;
70 pbuffer2++;
71 }
72 return SUCCESS;
73}
74
80static void spi_config(void)
81{
82 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
83 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
84 spi_default_para_init(&spi_init_struct);
85 spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX;
86 spi_init_struct.master_slave_mode =SPI_MODE_MASTER;
87 spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
88 spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
89 spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
90 spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
91 spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
92 spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
93 spi_init(SPI3, &spi_init_struct);
94
95 spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX;
96 spi_init_struct.master_slave_mode =SPI_MODE_SLAVE;
97 spi_init(SPI2, &spi_init_struct);
98
99 nvic_irq_enable(SPI3_I2S3EXT_IRQn, 0, 0);
100 nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0);
101 spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, TRUE);
102 spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE);
103
104 spi_enable(SPI2, TRUE);
105 spi_enable(SPI3, TRUE);
106}
107
113static void gpio_config(void)
114{
115 gpio_init_type gpio_initstructure;
116 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
117 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
118
119 /* master sck pin */
120 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
121 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
122 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
123 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
124 gpio_initstructure.gpio_pins = GPIO_PINS_10;
125 gpio_init(GPIOC, &gpio_initstructure);
126 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE10, GPIO_MUX_6);
127
128 /* master mosi pin */
129 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
130 gpio_initstructure.gpio_pins = GPIO_PINS_12;
131 gpio_init(GPIOC, &gpio_initstructure);
132 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_6);
133
134 /* slave sck pin */
135 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
136 gpio_initstructure.gpio_pins = GPIO_PINS_1;
137 gpio_init(GPIOD, &gpio_initstructure);
138 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6);
139
140 /* slave miso pin */
141 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
142 gpio_initstructure.gpio_pins = GPIO_PINS_2;
143 gpio_init(GPIOC, &gpio_initstructure);
144 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_5);
145}
146
152int main(void)
153{
154 system_clock_config();
155 at32_board_init();
156 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
157 gpio_config();
158 /* config spi1 send spi2 receive */
159 spi_config();
160 while(rx_index < BUFFER_SIZE);
161
162 /* test result:the data check */
163 transfer_status = buffer_compare(spi2_buffer_rx, spi3_buffer_tx, BUFFER_SIZE);
164
165 /* test result indicate:if success ,led2 lights */
166 if(transfer_status==SUCCESS)
167 {
168 at32_led_on(LED2);
169 }
170 else
171 {
172 at32_led_off(LED2);
173 }
174 while(1)
175 {
176 }
177}
178
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
tx_index
volatile uint32_t tx_index
Definition: project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c:47
spi2_buffer_rx
uint8_t spi2_buffer_rx[32]
Definition: project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c:46
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c:38
spi_init_struct
spi_init_type spi_init_struct
Definition: project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c:40
rx_index
volatile uint32_t rx_index
Definition: project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c:47
spi3_buffer_tx
uint8_t spi3_buffer_tx[32]
Definition: project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c:42
transfer_status
volatile error_status transfer_status
Definition: project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c:48
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SPI3_PERIPH_CLOCK
@ CRM_SPI3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:139
CRM_SPI2_PERIPH_CLOCK
@ CRM_SPI2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:138
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_6
@ GPIO_MUX_6
Definition: at32f435_437_gpio.h:162
GPIO_MUX_5
@ GPIO_MUX_5
Definition: at32f435_437_gpio.h:161
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
SPI_I2S_TDBE_INT
#define SPI_I2S_TDBE_INT
Definition: at32f435_437_spi.h:75
SPI_I2S_RDBF_INT
#define SPI_I2S_RDBF_INT
Definition: at32f435_437_spi.h:74
spi_i2s_interrupt_enable
void spi_i2s_interrupt_enable(spi_type *spi_x, uint32_t spi_i2s_int, confirm_state new_state)
enable or disable the specified spi/i2s interrupts.
Definition: at32f435_437_spi.c:498
spi_init
void spi_init(spi_type *spi_x, spi_init_type *spi_init_struct)
spi init config with its setting value.
Definition: at32f435_437_spi.c:101
spi_default_para_init
void spi_default_para_init(spi_init_type *spi_init_struct)
spi init config with its default value.
Definition: at32f435_437_spi.c:81
spi_enable
void spi_enable(spi_type *spi_x, confirm_state new_state)
enable or disable spi.
Definition: at32f435_437_spi.c:321
SPI_MODE_SLAVE
@ SPI_MODE_SLAVE
Definition: at32f435_437_spi.h:99
SPI_MODE_MASTER
@ SPI_MODE_MASTER
Definition: at32f435_437_spi.h:100
SPI_CLOCK_PHASE_2EDGE
@ SPI_CLOCK_PHASE_2EDGE
Definition: at32f435_437_spi.h:118
SPI_CS_SOFTWARE_MODE
@ SPI_CS_SOFTWARE_MODE
Definition: at32f435_437_spi.h:127
SPI_FIRST_BIT_MSB
@ SPI_FIRST_BIT_MSB
Definition: at32f435_437_spi.h:153
SPI_CLOCK_POLARITY_LOW
@ SPI_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:108
SPI_TRANSMIT_HALF_DUPLEX_RX
@ SPI_TRANSMIT_HALF_DUPLEX_RX
Definition: at32f435_437_spi.h:164
SPI_TRANSMIT_HALF_DUPLEX_TX
@ SPI_TRANSMIT_HALF_DUPLEX_TX
Definition: at32f435_437_spi.h:165
SPI_MCLK_DIV_8
@ SPI_MCLK_DIV_8
Definition: at32f435_437_spi.h:138
SPI_FRAME_8BIT
@ SPI_FRAME_8BIT
Definition: at32f435_437_spi.h:90
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
SPI2_I2S2EXT_IRQn
@ SPI2_I2S2EXT_IRQn
Definition: at32f435_437.h:184
SPI3_I2S3EXT_IRQn
@ SPI3_I2S3EXT_IRQn
Definition: at32f435_437.h:199
spi_config
static void spi_config(void)
spi configuration.
Definition: project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c:80
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c:113
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
spi_init_type
spi init type
Definition: at32f435_437_spi.h:259
spi_init_type::master_slave_mode
spi_master_slave_mode_type master_slave_mode
Definition: at32f435_437_spi.h:261
spi_init_type::first_bit_transmission
spi_first_bit_type first_bit_transmission
Definition: at32f435_437_spi.h:263
spi_init_type::frame_bit_num
spi_frame_bit_num_type frame_bit_num
Definition: at32f435_437_spi.h:264
spi_init_type::clock_polarity
spi_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:265
spi_init_type::cs_mode_selection
spi_cs_mode_type cs_mode_selection
Definition: at32f435_437_spi.h:267
spi_init_type::mclk_freq_division
spi_mclk_freq_div_type mclk_freq_division
Definition: at32f435_437_spi.h:262
spi_init_type::transmission_mode
spi_transmission_mode_type transmission_mode
Definition: at32f435_437_spi.h:260
spi_init_type::clock_phase
spi_clock_phase_type clock_phase
Definition: at32f435_437_spi.h:266
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • spi
  • halfduplex_transceiver_switch
  • inc
project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • spi
  • halfduplex_transceiver_switch
  • inc
project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • spi
  • halfduplex_transceiver_switch
  • inc
project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • spi
  • halfduplex_transceiver_switch
  • src
Functions
project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • spi
  • halfduplex_transceiver_switch
  • src
project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • spi
  • halfduplex_transceiver_switch
  • src
Macros | Functions | Variables
project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Macros

#define BUFFERSIZE 32

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | SPI3_I2S3EXT_IRQHandler (void)
This function handles the spi3 interrupt request. More...
void | SPI2_I2S2EXT_IRQHandler (void)
This function handles the spi2 interrupt request. More...

Variables

uint8_t | spi3_buffer_tx [32]
uint8_t | spi2_buffer_tx [32]
uint8_t | spi3_buffer_rx [32]
uint8_t | spi2_buffer_rx [32]
uint32_t | tx_index
uint32_t | rx_index

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • spi
  • halfduplex_transceiver_switch
  • src
project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38#define BUFFERSIZE 32
39
40extern uint8_t spi3_buffer_tx[BUFFERSIZE];
41extern uint8_t spi2_buffer_tx[BUFFERSIZE];
42extern uint8_t spi3_buffer_rx[BUFFERSIZE];
43extern uint8_t spi2_buffer_rx[BUFFERSIZE];
44extern uint32_t tx_index;
45extern uint32_t rx_index;
46
52void NMI_Handler(void)
53{
54}
55
61void HardFault_Handler(void)
62{
63 /* go to infinite loop when hard fault exception occurs */
64 while(1)
65 {
66 }
67}
68
74void MemManage_Handler(void)
75{
76 /* go to infinite loop when memory manage exception occurs */
77 while(1)
78 {
79 }
80}
81
87void BusFault_Handler(void)
88{
89 /* go to infinite loop when bus fault exception occurs */
90 while(1)
91 {
92 }
93}
94
100void UsageFault_Handler(void)
101{
102 /* go to infinite loop when usage fault exception occurs */
103 while(1)
104 {
105 }
106}
107
113void SVC_Handler(void)
114{
115}
116
122void DebugMon_Handler(void)
123{
124}
125
131void PendSV_Handler(void)
132{
133}
134
140void SysTick_Handler(void)
141{
142}
143
149 void SPI3_I2S3EXT_IRQHandler(void)
150{
151 if(SPI3->ctrl2_bit.tdbeie != RESET)
152 {
153 if(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) != RESET)
154 {
155 spi_i2s_data_transmit(SPI3, spi3_buffer_tx[tx_index++]);
156 if(tx_index == BUFFERSIZE)
157 {
158 spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, FALSE);
159 }
160 }
161 }
162 if(SPI3->ctrl2_bit.rdbfie != RESET)
163 {
164 if(spi_i2s_flag_get(SPI3, SPI_I2S_RDBF_FLAG) != RESET)
165 {
166 spi_enable(SPI3, FALSE);
167 spi3_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI3);
168 spi_enable(SPI3, TRUE);
169 if(rx_index == BUFFERSIZE)
170 {
171 spi_i2s_interrupt_enable(SPI3, SPI_I2S_RDBF_INT, FALSE);
172 }
173 }
174 }
175}
176
182 void SPI2_I2S2EXT_IRQHandler(void)
183{
184 if(SPI2->ctrl2_bit.tdbeie != RESET)
185 {
186 if(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) != RESET)
187 {
188 spi_i2s_data_transmit(SPI2, spi2_buffer_tx[tx_index++]);
189 if(tx_index == BUFFERSIZE)
190 {
191 spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, FALSE);
192 }
193 }
194 }
195 if(SPI2->ctrl2_bit.rdbfie != RESET)
196 {
197 if(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) != RESET)
198 {
199 spi2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
200 }
201 }
202}
203
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
SPI3_I2S3EXT_IRQHandler
void SPI3_I2S3EXT_IRQHandler(void)
This function handles the spi3 interrupt request.
Definition: project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c:157
SPI2_I2S2EXT_IRQHandler
void SPI2_I2S2EXT_IRQHandler(void)
This function handles the spi2 interrupt request.
Definition: project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c:144
spi2_buffer_tx
uint8_t spi2_buffer_tx[32]
Definition: project/at_start_f435/examples/spi/crc_transfer_polling/src/main.c:44
spi3_buffer_rx
uint8_t spi3_buffer_rx[32]
Definition: project/at_start_f435/examples/spi/crc_transfer_polling/src/main.c:48
spi2_buffer_rx
uint8_t spi2_buffer_rx[32]
Definition: project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:53
rx_index
uint32_t rx_index
Definition: project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c:40
tx_index
uint32_t tx_index
Definition: project/at_start_f435/examples/i2s/halfduplex_interrupt/src/main.c:45
BUFFERSIZE
#define BUFFERSIZE
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_int.c:38
spi3_buffer_tx
uint8_t spi3_buffer_tx[32]
Definition: project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c:45
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
SPI_I2S_TDBE_FLAG
#define SPI_I2S_TDBE_FLAG
Definition: at32f435_437_spi.h:54
SPI_I2S_RDBF_FLAG
#define SPI_I2S_RDBF_FLAG
Definition: at32f435_437_spi.h:53
SPI_I2S_TDBE_INT
#define SPI_I2S_TDBE_INT
Definition: at32f435_437_spi.h:75
SPI_I2S_RDBF_INT
#define SPI_I2S_RDBF_INT
Definition: at32f435_437_spi.h:74
spi_i2s_interrupt_enable
void spi_i2s_interrupt_enable(spi_type *spi_x, uint32_t spi_i2s_int, confirm_state new_state)
enable or disable the specified spi/i2s interrupts.
Definition: at32f435_437_spi.c:498
spi_i2s_data_transmit
void spi_i2s_data_transmit(spi_type *spi_x, uint16_t tx_data)
spi/i2s data transmit
Definition: at32f435_437_spi.c:548
spi_i2s_flag_get
flag_status spi_i2s_flag_get(spi_type *spi_x, uint32_t spi_i2s_flag)
get flag of the specified spi/i2s peripheral.
Definition: at32f435_437_spi.c:583
spi_i2s_data_receive
uint16_t spi_i2s_data_receive(spi_type *spi_x)
spi/i2s data receive
Definition: at32f435_437_spi.c:560
spi_enable
void spi_enable(spi_type *spi_x, confirm_state new_state)
enable or disable spi.
Definition: at32f435_437_spi.c:321
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • spi
  • halfduplex_transceiver_switch
  • src
Macros | Functions | Variables
project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 32

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | spi_config (void)
spi configuration. More...
error_status | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
buffer compare function. More...
int | main (void)
main function. More...

Variables

spi_init_type spi_init_struct
uint8_t | spi3_buffer_tx [32]
uint8_t | spi2_buffer_tx [32]
uint8_t | spi3_buffer_rx [32]
uint8_t | spi2_buffer_rx [32]
volatile uint32_t | tx_index = 0
volatile uint32_t | rx_index = 0
volatile error_status | transfer_status1 = ERROR
volatile error_status | transfer_status2 = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c.

Function Documentation

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 10

< gpio pins number 12

< gpio pins number 1

< gpio pins number 2

< gpio pins number 1

Definition at line 116 of file project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c.

◆ spi_config()

static void spi_config ( void )
static

spi configuration.

Parameters
none
Return values
none

< transmit data buffer empty interrupt

< receive data buffer full interrupt

Definition at line 83 of file project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • spi
  • halfduplex_transceiver_switch
  • src
project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 32
39
40 spi_init_type spi_init_struct;
41uint8_t spi3_buffer_tx[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
42 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
43 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
44 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20};
45uint8_t spi2_buffer_tx[BUFFER_SIZE] = {0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58,
46 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F, 0x60,
47 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
48 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70};
49uint8_t spi3_buffer_rx[BUFFER_SIZE], spi2_buffer_rx[BUFFER_SIZE];
50volatile uint32_t tx_index = 0, rx_index = 0;
51volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
52
53static void gpio_config(void);
54static void spi_config(void);
55 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length);
56
63 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
64{
65 while(buffer_length--)
66 {
67 if(*pbuffer1 != *pbuffer2)
68 {
69 return ERROR;
70 }
71
72 pbuffer1++;
73 pbuffer2++;
74 }
75 return SUCCESS;
76}
77
83static void spi_config(void)
84{
85 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
87 spi_default_para_init(&spi_init_struct);
88 spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX;
89 spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
90 spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_256;
91 spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
92 spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
93 spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
94 spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
95 spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
96 spi_init(SPI3, &spi_init_struct);
97
98 spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX;
99 spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
100 spi_init(SPI2, &spi_init_struct);
101
102 nvic_irq_enable(SPI3_I2S3EXT_IRQn, 0, 0);
103 nvic_irq_enable(SPI2_I2S2EXT_IRQn, 0, 0);
104 spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, TRUE);
105 spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, TRUE);
106
107 spi_enable(SPI3, TRUE);
108 spi_enable(SPI2, TRUE);
109}
110
116static void gpio_config(void)
117{
118 gpio_init_type gpio_initstructure;
119 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
120 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
121
122 /* master sck pin */
123 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
124 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
125 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
126 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
127 gpio_initstructure.gpio_pins = GPIO_PINS_10;
128 gpio_init(GPIOC, &gpio_initstructure);
129 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE10, GPIO_MUX_6);
130
131 /* master mosi pin */
132 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
133 gpio_initstructure.gpio_pins = GPIO_PINS_12;
134 gpio_init(GPIOC, &gpio_initstructure);
135 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_6);
136
137 /* slave sck pin */
138 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
139 gpio_initstructure.gpio_pins = GPIO_PINS_1;
140 gpio_init(GPIOD, &gpio_initstructure);
141 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6);
142
143 /* slave miso pin */
144 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
145 gpio_initstructure.gpio_pins = GPIO_PINS_2;
146 gpio_init(GPIOC, &gpio_initstructure);
147 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_5);
148
149 while(gpio_input_data_bit_read(GPIOD, GPIO_PINS_1)!=RESET);
150}
151
157int main(void)
158{
159 system_clock_config();
160 at32_board_init();
161 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
162 gpio_config();
163 /* config spi1 send spi2 receive */
164 spi_config();
165 while(rx_index < BUFFER_SIZE);
166
167 /* test result:the data check */
168 transfer_status1 = buffer_compare(spi2_buffer_rx, spi3_buffer_tx, BUFFER_SIZE);
169
170 /* config spi2 send spi1 receive */
171 spi_enable(SPI3, FALSE);
172 spi_enable(SPI2, FALSE);
173 rx_index = 0;
174 tx_index = 0;
175 spi_i2s_interrupt_enable(SPI3, SPI_I2S_TDBE_INT, FALSE);
176 spi_i2s_interrupt_enable(SPI2, SPI_I2S_RDBF_INT, FALSE);
177
178 spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_RX;
179 spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
180 spi_init(SPI3, &spi_init_struct);
181
182 spi_init_struct.transmission_mode = SPI_TRANSMIT_HALF_DUPLEX_TX;
183 spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
184 spi_init(SPI2, &spi_init_struct);
185
186 spi_i2s_interrupt_enable(SPI3, SPI_I2S_RDBF_INT, TRUE);
187 spi_i2s_interrupt_enable(SPI2, SPI_I2S_TDBE_INT, TRUE);
188 spi_enable(SPI2, TRUE);
189 spi_enable(SPI3, TRUE);
190 while(rx_index < BUFFER_SIZE);
191
192 /* test result:the data check */
193 transfer_status2 = buffer_compare(spi3_buffer_rx, spi2_buffer_tx, BUFFER_SIZE);
194
195 /* test result indicate:if success ,led2 lights */
196 if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS))
197 {
198 at32_led_on(LED2);
199 }
200 else
201 {
202 at32_led_off(LED2);
203 }
204 while(1)
205 {
206 }
207}
208
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
spi2_buffer_tx
uint8_t spi2_buffer_tx[32]
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c:45
tx_index
volatile uint32_t tx_index
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c:50
spi3_buffer_rx
uint8_t spi3_buffer_rx[32]
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c:49
spi2_buffer_rx
uint8_t spi2_buffer_rx[32]
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c:49
transfer_status1
volatile error_status transfer_status1
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c:51
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c:38
transfer_status2
volatile error_status transfer_status2
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c:51
spi_init_struct
spi_init_type spi_init_struct
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c:40
rx_index
volatile uint32_t rx_index
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c:50
spi3_buffer_tx
uint8_t spi3_buffer_tx[32]
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SPI3_PERIPH_CLOCK
@ CRM_SPI3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:139
CRM_SPI2_PERIPH_CLOCK
@ CRM_SPI2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:138
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_input_data_bit_read
flag_status gpio_input_data_bit_read(gpio_type *gpio_x, uint16_t pins)
read the specified input port pin.
Definition: at32f435_437_gpio.c:170
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_6
@ GPIO_MUX_6
Definition: at32f435_437_gpio.h:162
GPIO_MUX_5
@ GPIO_MUX_5
Definition: at32f435_437_gpio.h:161
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
SPI_I2S_TDBE_INT
#define SPI_I2S_TDBE_INT
Definition: at32f435_437_spi.h:75
SPI_I2S_RDBF_INT
#define SPI_I2S_RDBF_INT
Definition: at32f435_437_spi.h:74
spi_i2s_interrupt_enable
void spi_i2s_interrupt_enable(spi_type *spi_x, uint32_t spi_i2s_int, confirm_state new_state)
enable or disable the specified spi/i2s interrupts.
Definition: at32f435_437_spi.c:498
spi_init
void spi_init(spi_type *spi_x, spi_init_type *spi_init_struct)
spi init config with its setting value.
Definition: at32f435_437_spi.c:101
spi_default_para_init
void spi_default_para_init(spi_init_type *spi_init_struct)
spi init config with its default value.
Definition: at32f435_437_spi.c:81
spi_enable
void spi_enable(spi_type *spi_x, confirm_state new_state)
enable or disable spi.
Definition: at32f435_437_spi.c:321
SPI_MODE_SLAVE
@ SPI_MODE_SLAVE
Definition: at32f435_437_spi.h:99
SPI_MODE_MASTER
@ SPI_MODE_MASTER
Definition: at32f435_437_spi.h:100
SPI_CLOCK_PHASE_2EDGE
@ SPI_CLOCK_PHASE_2EDGE
Definition: at32f435_437_spi.h:118
SPI_CS_SOFTWARE_MODE
@ SPI_CS_SOFTWARE_MODE
Definition: at32f435_437_spi.h:127
SPI_FIRST_BIT_MSB
@ SPI_FIRST_BIT_MSB
Definition: at32f435_437_spi.h:153
SPI_CLOCK_POLARITY_LOW
@ SPI_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:108
SPI_TRANSMIT_HALF_DUPLEX_RX
@ SPI_TRANSMIT_HALF_DUPLEX_RX
Definition: at32f435_437_spi.h:164
SPI_TRANSMIT_HALF_DUPLEX_TX
@ SPI_TRANSMIT_HALF_DUPLEX_TX
Definition: at32f435_437_spi.h:165
SPI_MCLK_DIV_256
@ SPI_MCLK_DIV_256
Definition: at32f435_437_spi.h:143
SPI_FRAME_8BIT
@ SPI_FRAME_8BIT
Definition: at32f435_437_spi.h:90
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
SPI2_I2S2EXT_IRQn
@ SPI2_I2S2EXT_IRQn
Definition: at32f435_437.h:184
SPI3_I2S3EXT_IRQn
@ SPI3_I2S3EXT_IRQn
Definition: at32f435_437.h:199
spi_config
static void spi_config(void)
spi configuration.
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c:83
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c:116
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
spi_init_type
spi init type
Definition: at32f435_437_spi.h:259
spi_init_type::master_slave_mode
spi_master_slave_mode_type master_slave_mode
Definition: at32f435_437_spi.h:261
spi_init_type::first_bit_transmission
spi_first_bit_type first_bit_transmission
Definition: at32f435_437_spi.h:263
spi_init_type::frame_bit_num
spi_frame_bit_num_type frame_bit_num
Definition: at32f435_437_spi.h:264
spi_init_type::clock_polarity
spi_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:265
spi_init_type::cs_mode_selection
spi_cs_mode_type cs_mode_selection
Definition: at32f435_437_spi.h:267
spi_init_type::mclk_freq_division
spi_mclk_freq_div_type mclk_freq_division
Definition: at32f435_437_spi.h:262
spi_init_type::transmission_mode
spi_transmission_mode_type transmission_mode
Definition: at32f435_437_spi.h:260
spi_init_type::clock_phase
spi_clock_phase_type clock_phase
Definition: at32f435_437_spi.h:266
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • spi
  • only_receive_mode_polling
  • inc
project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • spi
  • only_receive_mode_polling
  • inc
project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • spi
  • only_receive_mode_polling
  • inc
project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • spi
  • only_receive_mode_polling
  • src
Functions
project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • spi
  • only_receive_mode_polling
  • src
project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • spi
  • only_receive_mode_polling
  • src
Functions
project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • spi
  • only_receive_mode_polling
  • src
project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • spi
  • only_receive_mode_polling
  • src
Macros | Functions | Variables
project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 32

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | spi_config (void)
spi configuration. More...
error_status | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
buffer compare function. More...
int | main (void)
main function. More...

Variables

spi_init_type spi_init_struct
uint8_t | spi3_buffer_tx [32]
uint8_t | spi2_buffer_rx [32]
uint32_t | tx_index = 0
uint32_t | rx_index = 0
volatile error_status | transfer_status = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c.

Function Documentation

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 10

< gpio pins number 12

< gpio pins number 1

< gpio pins number 4

< gpio pins number 1

Definition at line 107 of file project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c.

◆ spi_config()

static void spi_config ( void )
static

spi configuration.

Parameters
none
Return values
none

Definition at line 79 of file project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • spi
  • only_receive_mode_polling
  • src
project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 32
39
40 spi_init_type spi_init_struct;
41uint8_t spi3_buffer_tx[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
42 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
43 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
44 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20};
45uint8_t spi2_buffer_rx[BUFFER_SIZE];
46uint32_t tx_index = 0, rx_index = 0;
47volatile error_status transfer_status = ERROR;
48
49static void gpio_config(void);
50static void spi_config(void);
51 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length);
52
59 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
60{
61 while(buffer_length--)
62 {
63 if(*pbuffer1 != *pbuffer2)
64 {
65 return ERROR;
66 }
67
68 pbuffer1++;
69 pbuffer2++;
70 }
71 return SUCCESS;
72}
73
79static void spi_config(void)
80{
81 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
82 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
83 spi_default_para_init(&spi_init_struct);
84 spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
85 spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
86 spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
87 spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB;
88 spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
89 spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
90 spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
91 spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
92 spi_init(SPI3, &spi_init_struct);
93
94 spi_init_struct.transmission_mode = SPI_TRANSMIT_SIMPLEX_RX;
95 spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
96 spi_init(SPI2, &spi_init_struct);
97
98 spi_enable(SPI3, TRUE);
99 spi_enable(SPI2, TRUE);
100}
101
107static void gpio_config(void)
108{
109 gpio_init_type gpio_initstructure;
110 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
111 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
112 gpio_default_para_init(&gpio_initstructure);
113 /* spi3 sck pin */
114 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
115 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
116 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
117 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
118 gpio_initstructure.gpio_pins = GPIO_PINS_10;
119 gpio_init(GPIOC, &gpio_initstructure);
120 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE10, GPIO_MUX_6);
121
122 /* spi3 mosi pin */
123 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
124 gpio_initstructure.gpio_pins = GPIO_PINS_12;
125 gpio_init(GPIOC, &gpio_initstructure);
126 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_6);
127
128 /* spi2 sck pin */
129 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
130 gpio_initstructure.gpio_pins = GPIO_PINS_1;
131 gpio_init(GPIOD, &gpio_initstructure);
132 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6);
133
134 /* spi2 mosi pin */
135 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
136 gpio_initstructure.gpio_pins = GPIO_PINS_4;
137 gpio_init(GPIOD, &gpio_initstructure);
138 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_6);
139
140 while(gpio_input_data_bit_read(GPIOD, GPIO_PINS_1) != RESET);
141}
142
148int main(void)
149{
150 system_clock_config();
151 at32_board_init();
152 gpio_config();
153 spi_config();
154
155 /* transfer procedure:the "BUFFER_SIZE" data transfer */
156 while(tx_index < BUFFER_SIZE)
157 {
158 while(spi_i2s_flag_get(SPI3, SPI_I2S_TDBE_FLAG) == RESET);
159 spi_i2s_data_transmit(SPI3, spi3_buffer_tx[tx_index++]);
160 while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET);
161 spi2_buffer_rx[rx_index++] = spi_i2s_data_receive(SPI2);
162 }
163
164 /* test result:the data check */
165 transfer_status = buffer_compare(spi2_buffer_rx, spi3_buffer_tx, BUFFER_SIZE);
166
167 /* test result indicate:if success ,led2 lights */
168 if(transfer_status == SUCCESS)
169 {
170 at32_led_on(LED2);
171 }
172 else
173 {
174 at32_led_off(LED2);
175 }
176 while(1)
177 {
178 }
179}
180
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
spi2_buffer_rx
uint8_t spi2_buffer_rx[32]
Definition: project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c:45
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c:38
spi_init_struct
spi_init_type spi_init_struct
Definition: project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c:40
rx_index
uint32_t rx_index
Definition: project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c:46
tx_index
uint32_t tx_index
Definition: project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c:46
spi3_buffer_tx
uint8_t spi3_buffer_tx[32]
Definition: project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c:41
transfer_status
volatile error_status transfer_status
Definition: project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c:47
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SPI3_PERIPH_CLOCK
@ CRM_SPI3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:139
CRM_SPI2_PERIPH_CLOCK
@ CRM_SPI2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:138
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_input_data_bit_read
flag_status gpio_input_data_bit_read(gpio_type *gpio_x, uint16_t pins)
read the specified input port pin.
Definition: at32f435_437_gpio.c:170
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_6
@ GPIO_MUX_6
Definition: at32f435_437_gpio.h:162
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
SPI_I2S_TDBE_FLAG
#define SPI_I2S_TDBE_FLAG
Definition: at32f435_437_spi.h:54
SPI_I2S_RDBF_FLAG
#define SPI_I2S_RDBF_FLAG
Definition: at32f435_437_spi.h:53
spi_i2s_data_transmit
void spi_i2s_data_transmit(spi_type *spi_x, uint16_t tx_data)
spi/i2s data transmit
Definition: at32f435_437_spi.c:548
spi_i2s_flag_get
flag_status spi_i2s_flag_get(spi_type *spi_x, uint32_t spi_i2s_flag)
get flag of the specified spi/i2s peripheral.
Definition: at32f435_437_spi.c:583
spi_init
void spi_init(spi_type *spi_x, spi_init_type *spi_init_struct)
spi init config with its setting value.
Definition: at32f435_437_spi.c:101
spi_default_para_init
void spi_default_para_init(spi_init_type *spi_init_struct)
spi init config with its default value.
Definition: at32f435_437_spi.c:81
spi_i2s_data_receive
uint16_t spi_i2s_data_receive(spi_type *spi_x)
spi/i2s data receive
Definition: at32f435_437_spi.c:560
spi_enable
void spi_enable(spi_type *spi_x, confirm_state new_state)
enable or disable spi.
Definition: at32f435_437_spi.c:321
SPI_MODE_SLAVE
@ SPI_MODE_SLAVE
Definition: at32f435_437_spi.h:99
SPI_MODE_MASTER
@ SPI_MODE_MASTER
Definition: at32f435_437_spi.h:100
SPI_CLOCK_PHASE_2EDGE
@ SPI_CLOCK_PHASE_2EDGE
Definition: at32f435_437_spi.h:118
SPI_CS_SOFTWARE_MODE
@ SPI_CS_SOFTWARE_MODE
Definition: at32f435_437_spi.h:127
SPI_FIRST_BIT_LSB
@ SPI_FIRST_BIT_LSB
Definition: at32f435_437_spi.h:154
SPI_CLOCK_POLARITY_LOW
@ SPI_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:108
SPI_TRANSMIT_FULL_DUPLEX
@ SPI_TRANSMIT_FULL_DUPLEX
Definition: at32f435_437_spi.h:162
SPI_TRANSMIT_SIMPLEX_RX
@ SPI_TRANSMIT_SIMPLEX_RX
Definition: at32f435_437_spi.h:163
SPI_MCLK_DIV_8
@ SPI_MCLK_DIV_8
Definition: at32f435_437_spi.h:138
SPI_FRAME_8BIT
@ SPI_FRAME_8BIT
Definition: at32f435_437_spi.h:90
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
spi_config
static void spi_config(void)
spi configuration.
Definition: project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c:79
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c:107
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
spi_init_type
spi init type
Definition: at32f435_437_spi.h:259
spi_init_type::master_slave_mode
spi_master_slave_mode_type master_slave_mode
Definition: at32f435_437_spi.h:261
spi_init_type::first_bit_transmission
spi_first_bit_type first_bit_transmission
Definition: at32f435_437_spi.h:263
spi_init_type::frame_bit_num
spi_frame_bit_num_type frame_bit_num
Definition: at32f435_437_spi.h:264
spi_init_type::clock_polarity
spi_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:265
spi_init_type::cs_mode_selection
spi_cs_mode_type cs_mode_selection
Definition: at32f435_437_spi.h:267
spi_init_type::mclk_freq_division
spi_mclk_freq_div_type mclk_freq_division
Definition: at32f435_437_spi.h:262
spi_init_type::transmission_mode
spi_transmission_mode_type transmission_mode
Definition: at32f435_437_spi.h:260
spi_init_type::clock_phase
spi_clock_phase_type clock_phase
Definition: at32f435_437_spi.h:266
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • spi
  • ti_fullduplex_dma
  • inc
project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • spi
  • ti_fullduplex_dma
  • inc
project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • spi
  • ti_fullduplex_dma
  • inc
project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • spi
  • ti_fullduplex_dma
  • src
Functions
project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • spi
  • ti_fullduplex_dma
  • src
project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • spi
  • ti_fullduplex_dma
  • src
Functions
project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • spi
  • ti_fullduplex_dma
  • src
project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • spi
  • ti_fullduplex_dma
  • src
Macros | Functions | Variables
project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 32

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | spi_config (void)
spi configuration. More...
error_status | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t bufferlength)
buffer compare function. More...
int | main (void)
main function. More...

Variables

spi_init_type spi_init_struct
uint8_t | spi3_buffer_tx [32]
uint8_t | spi2_buffer_tx [32]
uint8_t | spi3_buffer_rx [32]
uint8_t | spi2_buffer_rx [32]
uint32_t | tx_index = 0
uint32_t | rx_index = 0
volatile error_status | transfer_status1 = ERROR
volatile error_status | transfer_status2 = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c.

Function Documentation

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 4

< gpio pins number 10

< gpio pins number 11

< gpio pins number 12

< gpio pins number 0

< gpio pins number 1

< gpio pins number 2

< gpio pins number 4

Definition at line 161 of file project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c.

◆ spi_config()

static void spi_config ( void )
static

spi configuration.

Parameters
none
Return values
none

Definition at line 83 of file project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • spi
  • ti_fullduplex_dma
  • src
project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 32
39
40 spi_init_type spi_init_struct;
41uint8_t spi3_buffer_tx[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
42 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
43 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
44 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20};
45uint8_t spi2_buffer_tx[BUFFER_SIZE] = {0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58,
46 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F, 0x60,
47 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
48 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70};
49uint8_t spi3_buffer_rx[BUFFER_SIZE], spi2_buffer_rx[BUFFER_SIZE];
50uint32_t tx_index = 0, rx_index = 0;
51volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
52
53static void gpio_config(void);
54static void spi_config(void);
55 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength);
56
63 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength)
64{
65 while(bufferlength--)
66 {
67 if(*pbuffer1 != *pbuffer2)
68 {
69 return ERROR;
70 }
71
72 pbuffer1++;
73 pbuffer2++;
74 }
75 return SUCCESS;
76}
77
83static void spi_config(void)
84{
85 dma_init_type dma_init_struct;
86
87 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
88 dma_reset(DMA1_CHANNEL1);
89 dma_reset(DMA1_CHANNEL2);
90 dma_reset(DMA1_CHANNEL3);
91 dma_reset(DMA1_CHANNEL4);
92 dmamux_enable(DMA1, TRUE);
93
94 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_SPI2_TX);
95 dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_SPI2_RX);
96 dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_SPI3_TX);
97 dmamux_init(DMA1MUX_CHANNEL4, DMAMUX_DMAREQ_ID_SPI3_RX);
98
99 dma_default_para_init(&dma_init_struct);
100 dma_init_struct.buffer_size = BUFFER_SIZE;
101 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
102 dma_init_struct.memory_inc_enable = TRUE;
103 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
104 dma_init_struct.peripheral_inc_enable = FALSE;
105 dma_init_struct.priority = DMA_PRIORITY_HIGH;
106 dma_init_struct.loop_mode_enable = FALSE;
107
108 dma_init_struct.memory_base_addr = (uint32_t)spi2_buffer_tx;
109 dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
110 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
111 dma_init(DMA1_CHANNEL1, &dma_init_struct);
112
113 dma_init_struct.memory_base_addr = (uint32_t)spi2_buffer_rx;
114 dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
115 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
116 dma_init(DMA1_CHANNEL2, &dma_init_struct);
117
118 dma_init_struct.memory_base_addr = (uint32_t)spi3_buffer_tx;
119 dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt);
120 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
121 dma_init(DMA1_CHANNEL3, &dma_init_struct);
122
123 dma_init_struct.memory_base_addr = (uint32_t)spi3_buffer_rx;
124 dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt);
125 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
126 dma_init(DMA1_CHANNEL4, &dma_init_struct);
127
128 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
129 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
130 spi_default_para_init(&spi_init_struct);
131 spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
132 spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
133 spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
134 spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
135 spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
136 spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
137 spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
138 spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
139 spi_init(SPI3, &spi_init_struct);
140
141 spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
142 spi_init(SPI2, &spi_init_struct);
143
144 spi_i2s_dma_transmitter_enable(SPI2,TRUE);
145 spi_i2s_dma_transmitter_enable(SPI3,TRUE);
146 spi_i2s_dma_receiver_enable(SPI2,TRUE);
147 spi_i2s_dma_receiver_enable(SPI3,TRUE);
148
149 /* enable ti mode,at this time,the setting in clock_polarity/clock_phase/cs_mode_selection invalid */
150 spi_ti_mode_enable(SPI3, TRUE);
151 spi_ti_mode_enable(SPI2, TRUE);
152 spi_enable(SPI2, TRUE);
153 spi_enable(SPI3, TRUE);
154}
155
161static void gpio_config(void)
162{
163 gpio_init_type gpio_initstructure;
164 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
165 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
166 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
167 gpio_default_para_init(&gpio_initstructure);
168 /* spi3 cs pin */
169 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
170 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
171 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
172 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
173 gpio_initstructure.gpio_pins = GPIO_PINS_4;
174 gpio_init(GPIOA, &gpio_initstructure);
175 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE4, GPIO_MUX_6);
176
177 /* spi3 sck pin */
178 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
179 gpio_initstructure.gpio_pins = GPIO_PINS_10;
180 gpio_init(GPIOC, &gpio_initstructure);
181 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE10, GPIO_MUX_6);
182
183 /* spi3 miso pin */
184 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
185 gpio_initstructure.gpio_pins = GPIO_PINS_11;
186 gpio_init(GPIOC, &gpio_initstructure);
187 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE11, GPIO_MUX_6);
188
189 /* spi3 mosi pin */
190 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
191 gpio_initstructure.gpio_pins = GPIO_PINS_12;
192 gpio_init(GPIOC, &gpio_initstructure);
193 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_6);
194
195 /* spi2 cs pin */
196 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
197 gpio_initstructure.gpio_pins = GPIO_PINS_0;
198 gpio_init(GPIOD, &gpio_initstructure);
199 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE0, GPIO_MUX_7);
200
201 /* spi2 sck pin */
202 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
203 gpio_initstructure.gpio_pins = GPIO_PINS_1;
204 gpio_init(GPIOD, &gpio_initstructure);
205 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6);
206
207 /* spi2 miso pin */
208 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
209 gpio_initstructure.gpio_pins = GPIO_PINS_2;
210 gpio_init(GPIOC, &gpio_initstructure);
211 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_5);
212
213 /* spi2 mosi pin */
214 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
215 gpio_initstructure.gpio_pins = GPIO_PINS_4;
216 gpio_init(GPIOD, &gpio_initstructure);
217 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_6);
218}
219
225int main(void)
226{
227 __IO uint32_t index = 0;
228 system_clock_config();
229 at32_board_init();
230 gpio_config();
231 spi_config();
232
233 dma_channel_enable(DMA1_CHANNEL1, TRUE);
234 dma_channel_enable(DMA1_CHANNEL2, TRUE);
235 dma_channel_enable(DMA1_CHANNEL3, TRUE);
236 dma_channel_enable(DMA1_CHANNEL4, TRUE);
237 while(dma_flag_get(DMA1_FDT2_FLAG) == RESET);
238
239 /* test result:the data check */
240 transfer_status1 = buffer_compare(spi2_buffer_rx, spi3_buffer_tx, BUFFER_SIZE);
241 transfer_status2 = buffer_compare(spi3_buffer_rx, spi2_buffer_tx, BUFFER_SIZE);
242
243 /* test result indicate:if success ,led2 lights */
244 if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS))
245 {
246 at32_led_on(LED2);
247 }
248 else
249 {
250 at32_led_off(LED2);
251 }
252 while(1)
253 {
254 }
255}
256
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
spi2_buffer_tx
uint8_t spi2_buffer_tx[32]
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c:45
spi3_buffer_rx
uint8_t spi3_buffer_rx[32]
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c:49
spi2_buffer_rx
uint8_t spi2_buffer_rx[32]
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c:49
transfer_status1
volatile error_status transfer_status1
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c:51
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c:38
transfer_status2
volatile error_status transfer_status2
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c:51
spi_init_struct
spi_init_type spi_init_struct
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c:40
rx_index
uint32_t rx_index
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c:50
tx_index
uint32_t tx_index
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c:50
spi3_buffer_tx
uint8_t spi3_buffer_tx[32]
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SPI3_PERIPH_CLOCK
@ CRM_SPI3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:139
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_SPI2_PERIPH_CLOCK
@ CRM_SPI2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:138
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_BYTE
@ DMA_PERIPHERAL_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:162
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_BYTE
@ DMA_MEMORY_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:172
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_SPI2_TX
@ DMAMUX_DMAREQ_ID_SPI2_TX
Definition: at32f435_437_dma.h:207
DMAMUX_DMAREQ_ID_SPI3_RX
@ DMAMUX_DMAREQ_ID_SPI3_RX
Definition: at32f435_437_dma.h:208
DMAMUX_DMAREQ_ID_SPI2_RX
@ DMAMUX_DMAREQ_ID_SPI2_RX
Definition: at32f435_437_dma.h:206
DMAMUX_DMAREQ_ID_SPI3_TX
@ DMAMUX_DMAREQ_ID_SPI3_TX
Definition: at32f435_437_dma.h:209
DMA1_FDT2_FLAG
#define DMA1_FDT2_FLAG
Definition: at32f435_437_dma.h:70
DMA1MUX_CHANNEL2
#define DMA1MUX_CHANNEL2
Definition: at32f435_437_dma.h:705
DMA1MUX_CHANNEL3
#define DMA1MUX_CHANNEL3
Definition: at32f435_437_dma.h:706
DMA1_CHANNEL3
#define DMA1_CHANNEL3
Definition: at32f435_437_dma.h:698
DMA1MUX_CHANNEL4
#define DMA1MUX_CHANNEL4
Definition: at32f435_437_dma.h:707
DMA1_CHANNEL4
#define DMA1_CHANNEL4
Definition: at32f435_437_dma.h:699
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1_CHANNEL2
#define DMA1_CHANNEL2
Definition: at32f435_437_dma.h:697
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_6
@ GPIO_MUX_6
Definition: at32f435_437_gpio.h:162
GPIO_MUX_5
@ GPIO_MUX_5
Definition: at32f435_437_gpio.h:161
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
spi_i2s_dma_receiver_enable
void spi_i2s_dma_receiver_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the spi/i2s dma receiver mode.
Definition: at32f435_437_spi.c:533
spi_init
void spi_init(spi_type *spi_x, spi_init_type *spi_init_struct)
spi init config with its setting value.
Definition: at32f435_437_spi.c:101
spi_default_para_init
void spi_default_para_init(spi_init_type *spi_init_struct)
spi init config with its default value.
Definition: at32f435_437_spi.c:81
spi_ti_mode_enable
void spi_ti_mode_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the ti mode for the spi peripheral.
Definition: at32f435_437_spi.c:174
spi_enable
void spi_enable(spi_type *spi_x, confirm_state new_state)
enable or disable spi.
Definition: at32f435_437_spi.c:321
spi_i2s_dma_transmitter_enable
void spi_i2s_dma_transmitter_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the spi/i2s dma transmitter mode.
Definition: at32f435_437_spi.c:519
SPI_MODE_SLAVE
@ SPI_MODE_SLAVE
Definition: at32f435_437_spi.h:99
SPI_MODE_MASTER
@ SPI_MODE_MASTER
Definition: at32f435_437_spi.h:100
SPI_CLOCK_PHASE_2EDGE
@ SPI_CLOCK_PHASE_2EDGE
Definition: at32f435_437_spi.h:118
SPI_CS_HARDWARE_MODE
@ SPI_CS_HARDWARE_MODE
Definition: at32f435_437_spi.h:126
SPI_FIRST_BIT_MSB
@ SPI_FIRST_BIT_MSB
Definition: at32f435_437_spi.h:153
SPI_CLOCK_POLARITY_LOW
@ SPI_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:108
SPI_TRANSMIT_FULL_DUPLEX
@ SPI_TRANSMIT_FULL_DUPLEX
Definition: at32f435_437_spi.h:162
SPI_MCLK_DIV_8
@ SPI_MCLK_DIV_8
Definition: at32f435_437_spi.h:138
SPI_FRAME_8BIT
@ SPI_FRAME_8BIT
Definition: at32f435_437_spi.h:90
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
spi_config
static void spi_config(void)
spi configuration.
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c:83
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c:161
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
spi_init_type
spi init type
Definition: at32f435_437_spi.h:259
spi_init_type::master_slave_mode
spi_master_slave_mode_type master_slave_mode
Definition: at32f435_437_spi.h:261
spi_init_type::first_bit_transmission
spi_first_bit_type first_bit_transmission
Definition: at32f435_437_spi.h:263
spi_init_type::frame_bit_num
spi_frame_bit_num_type frame_bit_num
Definition: at32f435_437_spi.h:264
spi_init_type::clock_polarity
spi_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:265
spi_init_type::cs_mode_selection
spi_cs_mode_type cs_mode_selection
Definition: at32f435_437_spi.h:267
spi_init_type::mclk_freq_division
spi_mclk_freq_div_type mclk_freq_division
Definition: at32f435_437_spi.h:262
spi_init_type::transmission_mode
spi_transmission_mode_type transmission_mode
Definition: at32f435_437_spi.h:260
spi_init_type::clock_phase
spi_clock_phase_type clock_phase
Definition: at32f435_437_spi.h:266
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • spi
  • use_jtagpin_hardwarecs_dma
  • inc
project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • spi
  • use_jtagpin_hardwarecs_dma
  • inc
project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • spi
  • use_jtagpin_hardwarecs_dma
  • inc
project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • spi
  • use_jtagpin_hardwarecs_dma
  • src
Functions
project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • spi
  • use_jtagpin_hardwarecs_dma
  • src
project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • spi
  • use_jtagpin_hardwarecs_dma
  • src
Functions
project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • spi
  • use_jtagpin_hardwarecs_dma
  • src
project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • spi
  • use_jtagpin_hardwarecs_dma
  • src
Macros | Functions | Variables
project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 32

Functions

static void | gpio_config (void)
gpio configuration. More...
static void | spi_config (void)
spi configuration. More...
error_status | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t bufferlength)
buffer compare function. More...
int | main (void)
main function. More...

Variables

spi_init_type spi_init_struct
uint8_t | spi3_buffer_tx [32]
uint8_t | spi2_buffer_tx [32]
uint8_t | spi3_buffer_rx [32]
uint8_t | spi2_buffer_rx [32]
uint32_t | tx_index = 0
uint32_t | rx_index = 0
volatile error_status | transfer_status1 = ERROR
volatile error_status | transfer_status2 = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c.

Function Documentation

◆ gpio_config()

static void gpio_config ( void )
static

gpio configuration.

Parameters
none
Return values
none

< gpio pins number 15

< gpio pins number 3

< gpio pins number 13

< gpio pins number 14

< gpio pins number 0

< gpio pins number 1

< gpio pins number 2

< gpio pins number 4

Definition at line 159 of file project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c.

◆ spi_config()

static void spi_config ( void )
static

spi configuration.

Parameters
none
Return values
none

Definition at line 83 of file project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • spi
  • use_jtagpin_hardwarecs_dma
  • src
project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 32
39
40 spi_init_type spi_init_struct;
41uint8_t spi3_buffer_tx[BUFFER_SIZE] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
42 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
43 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
44 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20};
45uint8_t spi2_buffer_tx[BUFFER_SIZE] = {0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58,
46 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F, 0x60,
47 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
48 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70};
49uint8_t spi3_buffer_rx[BUFFER_SIZE], spi2_buffer_rx[BUFFER_SIZE];
50uint32_t tx_index = 0, rx_index = 0;
51volatile error_status transfer_status1 = ERROR, transfer_status2 = ERROR;
52
53static void gpio_config(void);
54static void spi_config(void);
55 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength);
56
63 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t bufferlength)
64{
65 while(bufferlength--)
66 {
67 if(*pbuffer1 != *pbuffer2)
68 {
69 return ERROR;
70 }
71
72 pbuffer1++;
73 pbuffer2++;
74 }
75 return SUCCESS;
76}
77
83static void spi_config(void)
84{
85 dma_init_type dma_init_struct;
86
87 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
88 dma_reset(DMA1_CHANNEL1);
89 dma_reset(DMA1_CHANNEL2);
90 dma_reset(DMA1_CHANNEL3);
91 dma_reset(DMA1_CHANNEL4);
92 dmamux_enable(DMA1, TRUE);
93 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_SPI2_TX);
94 dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_SPI2_RX);
95 dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_SPI3_TX);
96 dmamux_init(DMA1MUX_CHANNEL4, DMAMUX_DMAREQ_ID_SPI3_RX);
97
98 dma_default_para_init(&dma_init_struct);
99 dma_init_struct.buffer_size = BUFFER_SIZE;
100 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
101 dma_init_struct.memory_inc_enable = TRUE;
102 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
103 dma_init_struct.peripheral_inc_enable = FALSE;
104 dma_init_struct.priority = DMA_PRIORITY_HIGH;
105 dma_init_struct.loop_mode_enable = FALSE;
106
107 dma_init_struct.memory_base_addr = (uint32_t)spi2_buffer_tx;
108 dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
109 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
110 dma_init(DMA1_CHANNEL1, &dma_init_struct);
111
112 dma_init_struct.memory_base_addr = (uint32_t)spi2_buffer_rx;
113 dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI2->dt);
114 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
115 dma_init(DMA1_CHANNEL2, &dma_init_struct);
116
117 dma_init_struct.memory_base_addr = (uint32_t)spi3_buffer_tx;
118 dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt);
119 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
120 dma_init(DMA1_CHANNEL3, &dma_init_struct);
121
122 dma_init_struct.memory_base_addr = (uint32_t)spi3_buffer_rx;
123 dma_init_struct.peripheral_base_addr = (uint32_t)&(SPI3->dt);
124 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
125 dma_init(DMA1_CHANNEL4, &dma_init_struct);
126
127 crm_periph_clock_enable(CRM_SPI3_PERIPH_CLOCK, TRUE);
128 crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
129 spi_default_para_init(&spi_init_struct);
130 spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
131 spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
132 spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
133 spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
134 spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
135 spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
136 spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
137 spi_init_struct.cs_mode_selection = SPI_CS_HARDWARE_MODE;
138 spi_init(SPI3, &spi_init_struct);
139
140 spi_init_struct.master_slave_mode = SPI_MODE_SLAVE;
141 spi_init(SPI2, &spi_init_struct);
142
143 spi_hardware_cs_output_enable(SPI3, TRUE);
144
145 spi_i2s_dma_transmitter_enable(SPI2,TRUE);
146 spi_i2s_dma_transmitter_enable(SPI3,TRUE);
147 spi_i2s_dma_receiver_enable(SPI2,TRUE);
148 spi_i2s_dma_receiver_enable(SPI3,TRUE);
149
150 spi_enable(SPI3, TRUE);
151 spi_enable(SPI2, TRUE);
152}
153
159static void gpio_config(void)
160{
161 gpio_init_type gpio_initstructure;
162 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
163 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
164 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
165 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
166 gpio_default_para_init(&gpio_initstructure);
167
168 /* spi3 cs pin */
169 gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
170 gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
171 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
172 gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
173 gpio_initstructure.gpio_pins = GPIO_PINS_15;
174 gpio_init(GPIOA, &gpio_initstructure);
175 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE15, GPIO_MUX_6);
176
177 /* spi3 sck pin */
178 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
179 gpio_initstructure.gpio_pins = GPIO_PINS_3;
180 gpio_init(GPIOB, &gpio_initstructure);
181 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE3, GPIO_MUX_6);
182
183 /* spi3 miso pin */
184 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
185 gpio_initstructure.gpio_pins = GPIO_PINS_13;
186 gpio_init(GPIOA, &gpio_initstructure);
187 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE13, GPIO_MUX_6);
188
189 /* spi3 mosi pin */
190 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
191 gpio_initstructure.gpio_pins = GPIO_PINS_14;
192 gpio_init(GPIOA, &gpio_initstructure);
193 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE14, GPIO_MUX_6);
194
195 /* spi2 cs pin */
196 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
197 gpio_initstructure.gpio_pins = GPIO_PINS_0;
198 gpio_init(GPIOD, &gpio_initstructure);
199 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE0, GPIO_MUX_7);
200
201 /* spi2 sck pin */
202 gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
203 gpio_initstructure.gpio_pins = GPIO_PINS_1;
204 gpio_init(GPIOD, &gpio_initstructure);
205 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6);
206
207 /* spi2 miso pin */
208 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
209 gpio_initstructure.gpio_pins = GPIO_PINS_2;
210 gpio_init(GPIOC, &gpio_initstructure);
211 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_5);
212
213 /* spi2 mosi pin */
214 gpio_initstructure.gpio_pull = GPIO_PULL_UP;
215 gpio_initstructure.gpio_pins = GPIO_PINS_4;
216 gpio_init(GPIOD, &gpio_initstructure);
217 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_6);
218}
219
225int main(void)
226{
227 __IO uint32_t index = 0;
228 system_clock_config();
229 at32_board_init();
230
231 /* button press:ensure code canbe download normally */
232 while(at32_button_press() == NO_BUTTON);
233
234 gpio_config();
235 spi_config();
236
237 dma_channel_enable(DMA1_CHANNEL1, TRUE);
238 dma_channel_enable(DMA1_CHANNEL2, TRUE);
239
240 dma_channel_enable(DMA1_CHANNEL4, TRUE);
241 dma_channel_enable(DMA1_CHANNEL3, TRUE);
242 while(dma_flag_get(DMA1_FDT2_FLAG) == RESET);
243
244 /* test result:the data check */
245 transfer_status1 = buffer_compare(spi2_buffer_rx, spi3_buffer_tx, BUFFER_SIZE);
246 transfer_status2 = buffer_compare(spi3_buffer_rx, spi2_buffer_tx, BUFFER_SIZE);
247
248 /* test result indicate:if success ,led2 lights */
249 if((transfer_status1 == SUCCESS) && (transfer_status2 == SUCCESS))
250 {
251 at32_led_on(LED2);
252 }
253 else
254 {
255 at32_led_off(LED2);
256 }
257 while(1)
258 {
259 }
260}
261
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
spi2_buffer_tx
uint8_t spi2_buffer_tx[32]
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c:45
spi3_buffer_rx
uint8_t spi3_buffer_rx[32]
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c:49
spi2_buffer_rx
uint8_t spi2_buffer_rx[32]
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c:49
transfer_status1
volatile error_status transfer_status1
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c:51
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c:38
transfer_status2
volatile error_status transfer_status2
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c:51
spi_init_struct
spi_init_type spi_init_struct
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c:40
rx_index
uint32_t rx_index
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c:50
tx_index
uint32_t tx_index
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c:50
spi3_buffer_tx
uint8_t spi3_buffer_tx[32]
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED2
@ LED2
Definition: at32f435_437_board.h:65
NO_BUTTON
@ NO_BUTTON
Definition: at32f435_437_board.h:99
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SPI3_PERIPH_CLOCK
@ CRM_SPI3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:139
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_SPI2_PERIPH_CLOCK
@ CRM_SPI2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:138
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_BYTE
@ DMA_PERIPHERAL_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:162
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_BYTE
@ DMA_MEMORY_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:172
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_SPI2_TX
@ DMAMUX_DMAREQ_ID_SPI2_TX
Definition: at32f435_437_dma.h:207
DMAMUX_DMAREQ_ID_SPI3_RX
@ DMAMUX_DMAREQ_ID_SPI3_RX
Definition: at32f435_437_dma.h:208
DMAMUX_DMAREQ_ID_SPI2_RX
@ DMAMUX_DMAREQ_ID_SPI2_RX
Definition: at32f435_437_dma.h:206
DMAMUX_DMAREQ_ID_SPI3_TX
@ DMAMUX_DMAREQ_ID_SPI3_TX
Definition: at32f435_437_dma.h:209
DMA1_FDT2_FLAG
#define DMA1_FDT2_FLAG
Definition: at32f435_437_dma.h:70
DMA1MUX_CHANNEL2
#define DMA1MUX_CHANNEL2
Definition: at32f435_437_dma.h:705
DMA1MUX_CHANNEL3
#define DMA1MUX_CHANNEL3
Definition: at32f435_437_dma.h:706
DMA1_CHANNEL3
#define DMA1_CHANNEL3
Definition: at32f435_437_dma.h:698
DMA1MUX_CHANNEL4
#define DMA1MUX_CHANNEL4
Definition: at32f435_437_dma.h:707
DMA1_CHANNEL4
#define DMA1_CHANNEL4
Definition: at32f435_437_dma.h:699
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1_CHANNEL2
#define DMA1_CHANNEL2
Definition: at32f435_437_dma.h:697
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PINS_SOURCE15
@ GPIO_PINS_SOURCE15
Definition: at32f435_437_gpio.h:148
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_6
@ GPIO_MUX_6
Definition: at32f435_437_gpio.h:162
GPIO_MUX_5
@ GPIO_MUX_5
Definition: at32f435_437_gpio.h:161
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
spi_i2s_dma_receiver_enable
void spi_i2s_dma_receiver_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the spi/i2s dma receiver mode.
Definition: at32f435_437_spi.c:533
spi_init
void spi_init(spi_type *spi_x, spi_init_type *spi_init_struct)
spi init config with its setting value.
Definition: at32f435_437_spi.c:101
spi_default_para_init
void spi_default_para_init(spi_init_type *spi_init_struct)
spi init config with its default value.
Definition: at32f435_437_spi.c:81
spi_hardware_cs_output_enable
void spi_hardware_cs_output_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the hardware cs output for the spi peripheral.
Definition: at32f435_437_spi.c:258
spi_enable
void spi_enable(spi_type *spi_x, confirm_state new_state)
enable or disable spi.
Definition: at32f435_437_spi.c:321
spi_i2s_dma_transmitter_enable
void spi_i2s_dma_transmitter_enable(spi_type *spi_x, confirm_state new_state)
enable or disable the spi/i2s dma transmitter mode.
Definition: at32f435_437_spi.c:519
SPI_MODE_SLAVE
@ SPI_MODE_SLAVE
Definition: at32f435_437_spi.h:99
SPI_MODE_MASTER
@ SPI_MODE_MASTER
Definition: at32f435_437_spi.h:100
SPI_CLOCK_PHASE_2EDGE
@ SPI_CLOCK_PHASE_2EDGE
Definition: at32f435_437_spi.h:118
SPI_CS_HARDWARE_MODE
@ SPI_CS_HARDWARE_MODE
Definition: at32f435_437_spi.h:126
SPI_FIRST_BIT_MSB
@ SPI_FIRST_BIT_MSB
Definition: at32f435_437_spi.h:153
SPI_CLOCK_POLARITY_LOW
@ SPI_CLOCK_POLARITY_LOW
Definition: at32f435_437_spi.h:108
SPI_TRANSMIT_FULL_DUPLEX
@ SPI_TRANSMIT_FULL_DUPLEX
Definition: at32f435_437_spi.h:162
SPI_MCLK_DIV_8
@ SPI_MCLK_DIV_8
Definition: at32f435_437_spi.h:138
SPI_FRAME_8BIT
@ SPI_FRAME_8BIT
Definition: at32f435_437_spi.h:90
SPI3
#define SPI3
Definition: at32f435_437_spi.h:455
SPI2
#define SPI2
Definition: at32f435_437_spi.h:454
spi_config
static void spi_config(void)
spi configuration.
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c:83
gpio_config
static void gpio_config(void)
gpio configuration.
Definition: project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c:159
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
spi_init_type
spi init type
Definition: at32f435_437_spi.h:259
spi_init_type::master_slave_mode
spi_master_slave_mode_type master_slave_mode
Definition: at32f435_437_spi.h:261
spi_init_type::first_bit_transmission
spi_first_bit_type first_bit_transmission
Definition: at32f435_437_spi.h:263
spi_init_type::frame_bit_num
spi_frame_bit_num_type frame_bit_num
Definition: at32f435_437_spi.h:264
spi_init_type::clock_polarity
spi_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:265
spi_init_type::cs_mode_selection
spi_cs_mode_type cs_mode_selection
Definition: at32f435_437_spi.h:267
spi_init_type::mclk_freq_division
spi_mclk_freq_div_type mclk_freq_division
Definition: at32f435_437_spi.h:262
spi_init_type::transmission_mode
spi_transmission_mode_type transmission_mode
Definition: at32f435_437_spi.h:260
spi_init_type::clock_phase
spi_clock_phase_type clock_phase
Definition: at32f435_437_spi.h:266
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • spi
  • w25q_flash
  • inc
project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • spi
  • w25q_flash
  • inc
project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • spi
  • w25q_flash
  • inc
project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • spi
  • w25q_flash
  • src
Functions
project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • spi
  • w25q_flash
  • src
project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • spi
  • w25q_flash
  • src
Functions
project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • spi
  • w25q_flash
  • src
project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • spi
  • w25q_flash
  • src
Macros | Functions | Variables
project/at_start_f437/examples/spi/w25q_flash/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "spi_flash.h"

Go to the source code of this file.

Macros

#define | FLASH_TEST_ADDR 0x1000
#define | BUF_SIZE 0x256

Functions

void | tx_data_fill (void)
transfer data fill. More...
error_status | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
buffer compare function. More...
int | main (void)
main function. More...

Variables

uint8_t | buffer_tx [0x256]
uint8_t | buffer_rx [0x256]
volatile error_status | transfer_status = ERROR

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/spi/w25q_flash/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • spi
  • w25q_flash
  • src
project/at_start_f437/examples/spi/w25q_flash/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "spi_flash.h"
30
39#define FLASH_TEST_ADDR 0x1000
40#define BUF_SIZE 0x256
41
42uint8_t buffer_tx[BUF_SIZE];
43uint8_t buffer_rx[BUF_SIZE];
44volatile error_status transfer_status = ERROR;
45
46void tx_data_fill(void);
47 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length);
48
54void tx_data_fill(void)
55{
56 uint32_t data_index = 0;
57 for(data_index = 0; data_index < BUF_SIZE; data_index++)
58 {
59 buffer_tx[data_index] = data_index;
60 }
61}
62
69 error_status buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
70{
71 while(buffer_length--)
72 {
73 if(*pbuffer1 != *pbuffer2)
74 {
75 return ERROR;
76 }
77
78 pbuffer1++;
79 pbuffer2++;
80 }
81 return SUCCESS;
82}
83
89int main(void)
90{
91 __IO uint32_t index = 0;
92 __IO uint32_t flash_id_index = 0;
93 system_clock_config();
94 at32_board_init();
95 tx_data_fill();
96 uart_print_init(115200);
97 spiflash_init();
98 flash_id_index = spiflash_read_id();
99 if((flash_id_index != W25Q128)&&(flash_id_index != W25Q80)&&(flash_id_index != W25Q16)&&(flash_id_index != W25Q32)&&(flash_id_index != W25Q64))
100 {
101 printf("flash id check error!\r\n");
102 for(index = 0; index < 50; index++)
103 {
104 at32_led_toggle(LED2);
105 at32_led_toggle(LED3);
106 delay_ms(200);
107 }
108 return 1;
109 }
110 else
111 {
112 printf("flash id check success! id: %x\r\n", flash_id_index);
113 }
114
115 /* erase sector */
116 spiflash_sector_erase(FLASH_TEST_ADDR / SPIF_SECTOR_SIZE);
117
118 /* write data */
119 spiflash_write(buffer_tx, FLASH_TEST_ADDR, BUF_SIZE);
120
121 /* read data */
122 spiflash_read(buffer_rx, FLASH_TEST_ADDR, BUF_SIZE);
123
124 /* printf read data */
125 printf("Read Data: ");
126 for(index = 0; index < BUF_SIZE; index++)
127 {
128 printf("%x ", buffer_rx[index]);
129 }
130
131 /* test result:the data check */
132 transfer_status = buffer_compare(buffer_rx, buffer_tx, BUF_SIZE);
133
134 /* test result indicate:if success ,led2 lights */
135 if(transfer_status == SUCCESS)
136 {
137 printf("\r\nflash data read write success!\r\n");
138 at32_led_on(LED2);
139 }
140 else
141 {
142 printf("\r\nflash data read write ERROR!\r\n");
143 at32_led_off(LED2);
144 }
145
146 while(1)
147 {
148 }
149}
150
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
tx_data_fill
void tx_data_fill(void)
transfer data fill.
Definition: project/at_start_f435/examples/i2s/fullduplex_dma/src/main.c:77
buffer_rx
uint8_t buffer_rx[0x256]
Definition: project/at_start_f437/examples/spi/w25q_flash/src/main.c:43
FLASH_TEST_ADDR
#define FLASH_TEST_ADDR
Definition: project/at_start_f437/examples/spi/w25q_flash/src/main.c:39
buffer_tx
uint8_t buffer_tx[0x256]
Definition: project/at_start_f437/examples/spi/w25q_flash/src/main.c:42
BUF_SIZE
#define BUF_SIZE
Definition: project/at_start_f437/examples/spi/w25q_flash/src/main.c:40
transfer_status
volatile error_status transfer_status
Definition: project/at_start_f437/examples/spi/w25q_flash/src/main.c:44
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
spiflash_init
void spiflash_init(void)
spi configuration.
Definition: at_start_f437/examples/spi/w25q_flash/src/spi_flash.c:45
spiflash_write
void spiflash_write(uint8_t *pbuffer, uint32_t write_addr, uint32_t length)
write data to flash
Definition: at_start_f437/examples/spi/w25q_flash/src/spi_flash.c:103
spiflash_sector_erase
void spiflash_sector_erase(uint32_t erase_addr)
erase a sector data
Definition: at_start_f437/examples/spi/w25q_flash/src/spi_flash.c:207
spiflash_read
void spiflash_read(uint8_t *pbuffer, uint32_t read_addr, uint32_t length)
read data from flash
Definition: at_start_f437/examples/spi/w25q_flash/src/spi_flash.c:191
spiflash_read_id
uint16_t spiflash_read_id(void)
read device id
Definition: at_start_f437/examples/spi/w25q_flash/src/spi_flash.c:478
W25Q128
#define W25Q128
Definition: at_start_f435/examples/spi/w25q_flash/inc/spi_flash.h:67
W25Q16
#define W25Q16
Definition: at_start_f435/examples/spi/w25q_flash/inc/spi_flash.h:63
W25Q32
#define W25Q32
Definition: at_start_f435/examples/spi/w25q_flash/inc/spi_flash.h:64
W25Q80
#define W25Q80
Definition: at_start_f435/examples/spi/w25q_flash/inc/spi_flash.h:62
W25Q64
#define W25Q64
Definition: at_start_f435/examples/spi/w25q_flash/inc/spi_flash.h:65
SPIF_SECTOR_SIZE
#define SPIF_SECTOR_SIZE
Definition: at_start_f435/examples/spi/w25q_flash/inc/spi_flash.h:78
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • sram
  • extend_sram
  • inc
project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • sram
  • extend_sram
  • inc
project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • sram
  • extend_sram
  • inc
project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • sram
  • extend_sram
  • src
Functions
project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • sram
  • extend_sram
  • src
project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • sram
  • extend_sram
  • src
Functions
project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • sram
  • extend_sram
  • src
project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • sram
  • extend_sram
  • src
Functions
project/at_start_f437/examples/sram/extend_sram/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | extend_sram (void)
to extend sram size More...
void | extend_sram (void)
to extend sram size More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/sram/extend_sram/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • sram
  • extend_sram
  • src
project/at_start_f437/examples/sram/extend_sram/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34void extend_sram(void);
35
36#ifdef __cplusplus
37}
38#endif
39
53void extend_sram(void)
54{
55 /* check if ram has been set to expectant size, if not, change eopb0 */
56 if(((USD->eopb0) & 0x07) != EXTEND_SRAM)
57 {
58 flash_unlock();
59 /* erase user system data bytes */
60 flash_user_system_data_erase();
61
62 /* change sram size */
63 flash_eopb0_config(EXTEND_SRAM);
64
65 /* system reset */
66 nvic_system_reset();
67 }
68}
69
75int main(void)
76{
77 system_clock_config();
78 at32_board_init();
79
80 /* check eopb0 */
81 if(((USD->eopb0) & 0x07) == EXTEND_SRAM)
82 {
83 at32_led_on(LED4);
84 }
85
86 while(1)
87 {
88 }
89}
90
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
extend_sram
void extend_sram(void)
to extend sram size
Definition: project/at_start_f435/examples/sram/extend_sram/src/main.c:53
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
flash_unlock
void flash_unlock(void)
unlock the flash controller.
Definition: at32f435_437_flash.c:290
flash_eopb0_config
flash_status_type flash_eopb0_config(flash_usd_eopb0_type data)
config the extend sram byte eopb0 in user system data.
Definition: at32f435_437_flash.c:576
flash_user_system_data_erase
flash_status_type flash_user_system_data_erase(void)
erase the flash user system data.
Definition: at32f435_437_flash.c:516
USD
#define USD
Definition: at32f435_437_flash.h:659
nvic_system_reset
void nvic_system_reset(void)
system reset
Definition: at32f435_437_misc.c:52
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • cascade_synchro
  • inc
project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • cascade_synchro
  • inc
project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • cascade_synchro
  • inc
project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • cascade_synchro
  • src
Functions
project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • cascade_synchro
  • src
project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • cascade_synchro
  • src
Functions
project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • cascade_synchro
  • src
project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133 /* trigger TMR1 hall event */
134 tmr_event_sw_trigger(TMR1, TMR_HALL_SWTRIG);
135}
136
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
tmr_event_sw_trigger
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event)
generate tmr event
Definition: at32f435_437_tmr.c:1486
TMR_HALL_SWTRIG
@ TMR_HALL_SWTRIG
Definition: at32f435_437_tmr.h:290
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • cascade_synchro
  • src
Functions | Variables
project/at_start_f437/examples/tmr/cascade_synchro/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
tmr_output_config_type tmr_output_struct
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | timerperiod = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/cascade_synchro/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • cascade_synchro
  • src
project/at_start_f437/examples/tmr/cascade_synchro/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 tmr_output_config_type tmr_output_struct;
40 crm_clocks_freq_type crm_clocks_freq_struct = {0};
41
42uint16_t timerperiod = 0;
43
49int main(void)
50{
51 system_clock_config();
52
53 /* get system clock */
54 crm_clocks_freq_get(&crm_clocks_freq_struct);
55
56 at32_board_init();
57
58 /* turn led2/led3/led4 on */
59 at32_led_on(LED2);
60 at32_led_on(LED3);
61 at32_led_on(LED4);
62
63 /* enable tmr2/tmr3/tmr4/gpioa/gpiob clock */
64 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
65 crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
66 crm_periph_clock_enable(CRM_TMR4_PERIPH_CLOCK, TRUE);
67 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
68 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
69
70 /* timer1 output pin Configuration */
71 gpio_init_struct.gpio_pins = GPIO_PINS_6 | GPIO_PINS_0;
72 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
73 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
74 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
75 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
76 gpio_init(GPIOA, &gpio_init_struct);
77
78 gpio_init_struct.gpio_pins = GPIO_PINS_6;
79 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
80 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
81 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
82 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
83 gpio_init(GPIOB, &gpio_init_struct);
84
85 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_1);
86 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_2);
87 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE6, GPIO_MUX_2);
88
89
90 /* timers synchronisation in cascade mode ----------------------------
91 1/tmr2 is configured as primary timer:
92 - pwm mode is used
93 - the tmr2 update event is used as trigger output
94
95 2/tmr3 is sub for tmr2 and primary for tmr4,
96 - pwm mode is used
97 - the itr1(tmr2) is used as input trigger
98 - gated mode is used, so start and stop of sub counter
99 are controlled by the master trigger output signal(tmr2 update event).
100 - the tmr3 update event is used as trigger output.
101
102 3/tmr4 is slave for tmr3,
103 - pwm mode is used
104 - the itr2(tmr3) is used as input trigger
105 - gated mode is used, so start and stop of sub counter
106 are controlled by the master trigger output signal(tmr3 overflow event).
107
108 the primary timer tmr2 is running at tmr2 frequency :
109 tim2 frequency = (tmr2 counter clock)/ (tmr2 period + 1) = 1 mhz
110 and the duty cycle = tmr2_ccr1/(tmr2_arr + 1) = 50%.
111
112 the tmr3 is running at:
113 (tmr2 frequency)/ (tmr3 period + 1) = 100 khz and a duty cycle equal
114 to tmr3_ccr1/(tmr3_arr + 1) = 50%
115
116 the tmr4 is running at:
117 (tmr3 frequency)/ (tmr4 period + 1) = 10 khz and a duty cycle equal
118 to tmr4_ccr1/(tmr4_arr + 1) = 50%
119 -------------------------------------------------------------------- */
120
121 timerperiod = ((crm_clocks_freq_struct.apb1_freq * 2) / 1000000) - 1;
122
123 tmr_base_init(TMR2, timerperiod, 0);
124 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
125
126 tmr_base_init(TMR3, 9, 0);
127 tmr_cnt_dir_set(TMR3, TMR_COUNT_UP);
128
129 tmr_base_init(TMR4, 9, 0);
130 tmr_cnt_dir_set(TMR4, TMR_COUNT_UP);
131
132 /* channelx Configuration in output mode */
133 tmr_output_default_para_init(&tmr_output_struct);
134 tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
135 tmr_output_struct.oc_output_state = TRUE;
136 tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;
137 tmr_output_struct.oc_idle_state = TRUE;
138 tmr_output_struct.occ_output_state = FALSE;
139 tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
140 tmr_output_struct.occ_idle_state = FALSE;
141 /* timer2 channel 1 */
142 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
143 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_1, timerperiod/2);
144
145 /* timer2 select enable signal to sub timer */
146 tmr_primary_mode_select(TMR2, TMR_PRIMARY_SEL_OVERFLOW);
147 tmr_sub_sync_mode_set(TMR2, TRUE);
148
149 /* timer3 channel 1 */
150 tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
151 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_1, 5);
152
153 /* sub mode selection: tmr3 */
154 tmr_sub_mode_select(TMR3, TMR_SUB_HANG_MODE);
155 tmr_trigger_input_select(TMR3, TMR_SUB_INPUT_SEL_IS1);
156
157 /* timer3 select enable signal to sub timer */
158 tmr_primary_mode_select(TMR3, TMR_PRIMARY_SEL_OVERFLOW);
159 tmr_sub_sync_mode_set(TMR3, TRUE);
160
161 /* timer4 channel 1 */
162 tmr_output_channel_config(TMR4, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
163 tmr_channel_value_set(TMR4, TMR_SELECT_CHANNEL_1, 5);
164
165 /* sub mode selection: tmr4 */
166 tmr_sub_mode_select(TMR4, TMR_SUB_HANG_MODE);
167 tmr_trigger_input_select(TMR4, TMR_SUB_INPUT_SEL_IS2);
168
169 /* enable tmr2/tmr3/tmr4 */
170 tmr_counter_enable(TMR2, TRUE);
171 tmr_counter_enable(TMR3, TRUE);
172 tmr_counter_enable(TMR4, TRUE);
173
174 while(1)
175 {}
176}
177
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/tmr/cascade_synchro/src/main.c:38
tmr_output_struct
tmr_output_config_type tmr_output_struct
Definition: project/at_start_f437/examples/tmr/cascade_synchro/src/main.c:39
timerperiod
uint16_t timerperiod
Definition: project/at_start_f437/examples/tmr/cascade_synchro/src/main.c:42
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/cascade_synchro/src/main.c:40
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
CRM_TMR4_PERIPH_CLOCK
@ CRM_TMR4_PERIPH_CLOCK
Definition: at32f435_437_crm.h:130
CRM_TMR3_PERIPH_CLOCK
@ CRM_TMR3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:129
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_2
@ GPIO_MUX_2
Definition: at32f435_437_gpio.h:158
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_sub_mode_select
void tmr_sub_mode_select(tmr_type *tmr_x, tmr_sub_mode_select_type sub_mode)
select tmr subordinate mode
Definition: at32f435_437_tmr.c:1245
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_sub_sync_mode_set
void tmr_sub_sync_mode_set(tmr_type *tmr_x, confirm_state new_state)
set tmr subordinate synchronization mode
Definition: at32f435_437_tmr.c:1335
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_trigger_input_select
void tmr_trigger_input_select(tmr_type *tmr_x, sub_tmr_input_sel_type trigger_select)
select tmr sub-trigger
Definition: at32f435_437_tmr.c:1322
tmr_primary_mode_select
void tmr_primary_mode_select(tmr_type *tmr_x, tmr_primary_select_type primary_mode)
select tmr primary mode
Definition: at32f435_437_tmr.c:1222
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR_OUTPUT_ACTIVE_LOW
@ TMR_OUTPUT_ACTIVE_LOW
Definition: at32f435_437_tmr.h:199
TMR_SUB_INPUT_SEL_IS2
@ TMR_SUB_INPUT_SEL_IS2
Definition: at32f435_437_tmr.h:136
TMR_SUB_INPUT_SEL_IS1
@ TMR_SUB_INPUT_SEL_IS1
Definition: at32f435_437_tmr.h:135
TMR_SUB_HANG_MODE
@ TMR_SUB_HANG_MODE
Definition: at32f435_437_tmr.h:154
TMR_PRIMARY_SEL_OVERFLOW
@ TMR_PRIMARY_SEL_OVERFLOW
Definition: at32f435_437_tmr.h:121
TMR3
#define TMR3
Definition: at32f435_437_tmr.h:897
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
TMR4
#define TMR4
Definition: at32f435_437_tmr.h:898
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::occ_output_state
confirm_state occ_output_state
Definition: at32f435_437_tmr.h:418
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::occ_polarity
tmr_output_polarity_type occ_polarity
Definition: at32f435_437_tmr.h:416
tmr_output_config_type::occ_idle_state
confirm_state occ_idle_state
Definition: at32f435_437_tmr.h:414
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • complementary_signals
  • inc
project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • complementary_signals
  • inc
project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • complementary_signals
  • inc
project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • complementary_signals
  • src
Functions
project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • complementary_signals
  • src
project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • complementary_signals
  • src
Functions
project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • complementary_signals
  • src
project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133 /* trigger TMR1 hall event */
134 tmr_event_sw_trigger(TMR1, TMR_HALL_SWTRIG);
135}
136
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
tmr_event_sw_trigger
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event)
generate tmr event
Definition: at32f435_437_tmr.c:1486
TMR_HALL_SWTRIG
@ TMR_HALL_SWTRIG
Definition: at32f435_437_tmr.h:290
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • complementary_signals
  • src
Functions | Variables
project/at_start_f437/examples/tmr/complementary_signals/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
tmr_output_config_type tmr_output_struct
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
tmr_brkdt_config_type | tmr_brkdt_config_struct = {0}
uint16_t | timerperiod = 0
uint16_t | channel1pulse = 0
uint16_t | channel2pulse = 0
uint16_t | channel3pulse = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/complementary_signals/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • complementary_signals
  • src
project/at_start_f437/examples/tmr/complementary_signals/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 tmr_output_config_type tmr_output_struct;
40 crm_clocks_freq_type crm_clocks_freq_struct = {0};
41 tmr_brkdt_config_type tmr_brkdt_config_struct = {0};
42
43uint16_t timerperiod = 0;
44uint16_t channel1pulse = 0, channel2pulse = 0, channel3pulse = 0;
45
51int main(void)
52{
53 system_clock_config();
54
55 at32_board_init();
56
57 /* get system clock */
58 crm_clocks_freq_get(&crm_clocks_freq_struct);
59
60 /* turn led2/led3/led4 on */
61 at32_led_on(LED2);
62 at32_led_on(LED3);
63 at32_led_on(LED4);
64
65 /* enable tmr1/gpioa/gpiob clock */
66 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
67 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
68 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
69
70 /* timer1 output pin configuration */
71 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10;
72 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
73 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
74 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
75 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
76 gpio_init(GPIOA, &gpio_init_struct);
77
78 gpio_init_struct.gpio_pins = GPIO_PINS_13 | GPIO_PINS_14 | GPIO_PINS_15;
79 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
80 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
81 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
82 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
83 gpio_init(GPIOB, &gpio_init_struct);
84
85 gpio_init_struct.gpio_pins = GPIO_PINS_12;
86 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
87 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
88 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
89 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
90 gpio_init(GPIOB, &gpio_init_struct);
91
92 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_1);
93 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE9, GPIO_MUX_1);
94 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE10, GPIO_MUX_1);
95 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_1);
96 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE14, GPIO_MUX_1);
97 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE15, GPIO_MUX_1);
98 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_1);
99
100 /* -----------------------------------------------------------------------
101 tmr1 configuration to:
102
103 1/ generate 3 complementary pwm signals with 3 different duty cycles:
104 tmr1clk is fixed to apb2_freq*2, the tmr1 prescaler is equal to 0 so the
105 tmr1 counter clock used is apb2_freq*2.
106
107 the objective is to generate pwm signal at 17.57 khz:
108 - tmr1_period = (apb2_freq*2 / 17570) - 1
109
110 the three duty cycles are computed as the following description:
111
112 the channel 1 duty cycle is set to 50% so channel 1n is set to 50%.
113 the channel 2 duty cycle is set to 25% so channel 2n is set to 75%.
114 the channel 3 duty cycle is set to 12.5% so channel 3n is set to 87.5%.
115 the timer pulse is calculated as follows:
116 - channelxpulse = dutycycle * (tmr1_period - 1) / 100
117
118 2/ insert a dead time equal to 11/apb2_freq*2 ns
119 3/ configure the break feature, active at high level, and using the automatic
120 output enable feature
121 4/ use the locking parameters level1.
122 ----------------------------------------------------------------------- */
123 /* compute the value to be set in arr regiter to generate signal frequency at 17.57 khz */
124 timerperiod = ((crm_clocks_freq_struct.apb2_freq * 2) / 17570 ) - 1;
125 /* compute ccr1 value to generate a duty cycle at 50% for channel 1 and 1n */
126 channel1pulse = (uint16_t) (((uint32_t) 5 * (timerperiod - 1)) / 10);
127 /* compute ccr2 value to generate a duty cycle at 25% for channel 2 and 2n */
128 channel2pulse = (uint16_t) (((uint32_t) 25 * (timerperiod - 1)) / 100);
129 /* compute ccr3 value to generate a duty cycle at 12.5% for channel 3 and 3n */
130 channel3pulse = (uint16_t) (((uint32_t) 125 * (timerperiod - 1)) / 1000);
131
132 tmr_base_init(TMR1, timerperiod, 0);
133 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
134
135 /* channel 1, 2, 3 and 4 Configuration in output mode */
136 tmr_output_default_para_init(&tmr_output_struct);
137 tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
138 tmr_output_struct.oc_output_state = TRUE;
139 tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;
140 tmr_output_struct.oc_idle_state = TRUE;
141 tmr_output_struct.occ_output_state = TRUE;
142 tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_LOW;
143 tmr_output_struct.occ_idle_state = FALSE;
144 /* channel 1 */
145 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
146 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, channel1pulse);
147 /* channel 2 */
148 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
149 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_2, channel2pulse);
150 /* channel 3 */
151 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
152 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_3, channel3pulse);
153
154 /* automatic output enable, stop, dead time and lock configuration*/
155 tmr_brkdt_default_para_init(&tmr_brkdt_config_struct);
156 tmr_brkdt_config_struct.brk_enable = TRUE;
157 tmr_brkdt_config_struct.auto_output_enable = TRUE;
158 tmr_brkdt_config_struct.deadtime = 11;
159 tmr_brkdt_config_struct.fcsodis_state = TRUE;
160 tmr_brkdt_config_struct.fcsoen_state = TRUE;
161 tmr_brkdt_config_struct.brk_polarity = TMR_BRK_INPUT_ACTIVE_HIGH;
162 tmr_brkdt_config_struct.wp_level = TMR_WP_LEVEL_3;
163 tmr_brkdt_config(TMR1, &tmr_brkdt_config_struct);
164
165 /* tmr1 output enable */
166 tmr_output_enable(TMR1, TRUE);
167 /* enable tmr1 */
168 tmr_counter_enable(TMR1, TRUE);
169
170 while(1)
171 {}
172}
173
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/tmr/complementary_signals/src/main.c:38
tmr_output_struct
tmr_output_config_type tmr_output_struct
Definition: project/at_start_f437/examples/tmr/complementary_signals/src/main.c:39
channel1pulse
uint16_t channel1pulse
Definition: project/at_start_f437/examples/tmr/complementary_signals/src/main.c:44
timerperiod
uint16_t timerperiod
Definition: project/at_start_f437/examples/tmr/complementary_signals/src/main.c:43
channel2pulse
uint16_t channel2pulse
Definition: project/at_start_f437/examples/tmr/complementary_signals/src/main.c:44
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/complementary_signals/src/main.c:40
channel3pulse
uint16_t channel3pulse
Definition: project/at_start_f437/examples/tmr/complementary_signals/src/main.c:44
tmr_brkdt_config_struct
tmr_brkdt_config_type tmr_brkdt_config_struct
Definition: project/at_start_f437/examples/tmr/complementary_signals/src/main.c:41
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE15
@ GPIO_PINS_SOURCE15
Definition: at32f435_437_gpio.h:148
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_brkdt_default_para_init
void tmr_brkdt_default_para_init(tmr_brkdt_config_type *tmr_brkdt_struct)
init tmr brkdt default para
Definition: at32f435_437_tmr.c:183
tmr_brkdt_config
void tmr_brkdt_config(tmr_type *tmr_x, tmr_brkdt_config_type *brkdt_struct)
config tmr break mode and dead-time
Definition: at32f435_437_tmr.c:1801
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_output_enable
void tmr_output_enable(tmr_type *tmr_x, confirm_state new_state)
tmr output enable(oen),this function is important for advtm output enable
Definition: at32f435_437_tmr.c:1499
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_WP_LEVEL_3
@ TMR_WP_LEVEL_3
Definition: at32f435_437_tmr.h:391
TMR_BRK_INPUT_ACTIVE_HIGH
@ TMR_BRK_INPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:382
TMR_OUTPUT_CONTROL_PWM_MODE_B
@ TMR_OUTPUT_CONTROL_PWM_MODE_B
Definition: at32f435_437_tmr.h:181
TMR_OUTPUT_ACTIVE_LOW
@ TMR_OUTPUT_ACTIVE_LOW
Definition: at32f435_437_tmr.h:199
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb2_freq
uint32_t apb2_freq
Definition: at32f435_437_crm.h:791
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_brkdt_config_type
tmr brkdt config type
Definition: at32f435_437_tmr.h:436
tmr_brkdt_config_type::brk_enable
confirm_state brk_enable
Definition: at32f435_437_tmr.h:443
tmr_brkdt_config_type::deadtime
uint8_t deadtime
Definition: at32f435_437_tmr.h:437
tmr_brkdt_config_type::auto_output_enable
confirm_state auto_output_enable
Definition: at32f435_437_tmr.h:440
tmr_brkdt_config_type::wp_level
tmr_wp_level_type wp_level
Definition: at32f435_437_tmr.h:439
tmr_brkdt_config_type::fcsoen_state
confirm_state fcsoen_state
Definition: at32f435_437_tmr.h:441
tmr_brkdt_config_type::fcsodis_state
confirm_state fcsodis_state
Definition: at32f435_437_tmr.h:442
tmr_brkdt_config_type::brk_polarity
tmr_brk_polarity_type brk_polarity
Definition: at32f435_437_tmr.h:438
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::occ_output_state
confirm_state occ_output_state
Definition: at32f435_437_tmr.h:418
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::occ_polarity
tmr_output_polarity_type occ_polarity
Definition: at32f435_437_tmr.h:416
tmr_output_config_type::occ_idle_state
confirm_state occ_idle_state
Definition: at32f435_437_tmr.h:414
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • dma
  • inc
project/at_start_f437/examples/tmr/dma/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • dma
  • inc
project/at_start_f437/examples/tmr/dma/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • dma
  • inc
project/at_start_f437/examples/tmr/dma/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • dma
  • src
Functions
project/at_start_f437/examples/tmr/dma/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/dma/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • dma
  • src
project/at_start_f437/examples/tmr/dma/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/dma/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • dma
  • src
Functions
project/at_start_f437/examples/tmr/dma/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/dma/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • dma
  • src
project/at_start_f437/examples/tmr/dma/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133 /* trigger TMR1 hall event */
134 tmr_event_sw_trigger(TMR1, TMR_HALL_SWTRIG);
135}
136
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
tmr_event_sw_trigger
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event)
generate tmr event
Definition: at32f435_437_tmr.c:1486
TMR_HALL_SWTRIG
@ TMR_HALL_SWTRIG
Definition: at32f435_437_tmr.h:290
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • dma
  • src
Functions | Variables
project/at_start_f437/examples/tmr/dma/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
tmr_output_config_type tmr_output_struct
dma_init_type dma_init_struct
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | timerperiod = 0
uint16_t | src_buffer [3] = {0, 0, 0}

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/dma/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • dma
  • src
project/at_start_f437/examples/tmr/dma/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 tmr_output_config_type tmr_output_struct;
40 dma_init_type dma_init_struct;
41 crm_clocks_freq_type crm_clocks_freq_struct = {0};
42
43uint16_t timerperiod = 0;
44uint16_t src_buffer[3] = {0, 0, 0};
45
51int main(void)
52{
53 system_clock_config();
54
55 at32_board_init();
56
57 /* get system clock */
58 crm_clocks_freq_get(&crm_clocks_freq_struct);
59
60 /* turn led2/led3/led4 on */
61 at32_led_on(LED2);
62 at32_led_on(LED3);
63 at32_led_on(LED4);
64
65 /* enable tmr1/gpioa/gpiob/dma clock */
66 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
67 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
68 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
69 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
70
71 /* timer1 output pin Configuration */
72 gpio_init_struct.gpio_pins = GPIO_PINS_10;
73 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
74 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
75 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
76 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
77 gpio_init(GPIOA, &gpio_init_struct);
78
79 gpio_init_struct.gpio_pins = GPIO_PINS_15;
80 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
81 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
82 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
83 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
84 gpio_init(GPIOB, &gpio_init_struct);
85
86 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE10, GPIO_MUX_1);
87 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE15, GPIO_MUX_1);
88
89 /* tmr1 dma transfer example -------------------------------------------------
90 tmr1clk = apb2_freq*2, prescaler = 0, tmr1 counter clock = apb2_freq*2
91
92 the objective is to configure tmr1 channel 3 to generate complementary pwm
93 signal with a frequency equal to 17.57 khz:
94 - tmr1_period = (apb2_freq * 2 / 17570) - 1
95 and a variable duty cycle that is changed by the dma after a specific number of
96 update dma request.
97
98 the number of this repetitive requests is defined by the tmr1 repetition counter,
99 each 3 update requests, the tmr1 channel 3 duty cycle changes to the next new
100 value defined by the src_buffer .
101 -----------------------------------------------------------------------------*/
102 /* compute the value to be set in arr regiter to generate signal frequency at 17.57 khz */
103 timerperiod = ((crm_clocks_freq_struct.apb2_freq * 2) / 17570 ) - 1;
104 /* compute c1dt value to generate a duty cycle at 50% */
105 src_buffer[0] = (uint16_t) (((uint32_t) 5 * (timerperiod - 1)) / 10);
106 /* compute c1dt value to generate a duty cycle at 37.5% */
107 src_buffer[1] = (uint16_t) (((uint32_t) 375 * (timerperiod - 1)) / 1000);
108 /* compute c1dt value to generate a duty cycle at 25% */
109 src_buffer[2] = (uint16_t) (((uint32_t) 25 * (timerperiod - 1)) / 100);
110
111 tmr_base_init(TMR1, timerperiod, 0);
112 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
113
114 /* channel 3 configuration in output mode */
115 tmr_output_default_para_init(&tmr_output_struct);
116 tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
117 tmr_output_struct.oc_output_state = TRUE;
118 tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;
119 tmr_output_struct.oc_idle_state = TRUE;
120 tmr_output_struct.occ_output_state = TRUE;
121 tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_LOW;
122 tmr_output_struct.occ_idle_state = FALSE;
123 /* channel 3 */
124 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
125 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_3, src_buffer[0]);
126
127 /* enable tmr1 overflow dma request */
128 tmr_dma_request_enable(TMR1, TMR_OVERFLOW_DMA_REQUEST, TRUE);
129
130 /* dma config for tmr1 overflow dma request */
131 /* dma1 channel5 configuration */
132 dma_reset(DMA1_CHANNEL1);
133 dma_init_struct.buffer_size = 3;
134 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
135 dma_init_struct.memory_base_addr = (uint32_t)src_buffer;
136 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
137 dma_init_struct.memory_inc_enable = TRUE;
138 dma_init_struct.peripheral_base_addr = (uint32_t)0x4001003C;
139 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
140 dma_init_struct.peripheral_inc_enable = FALSE;
141 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
142 dma_init_struct.loop_mode_enable = TRUE;
143 dma_init(DMA1_CHANNEL1, &dma_init_struct);
144
145 dmamux_enable(DMA1, TRUE);
146 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_TMR1_OVERFLOW);
147 dma_channel_enable(DMA1_CHANNEL1, TRUE);
148
149 /* tmr1 output enable */
150 tmr_output_enable(TMR1, TRUE);
151 /* enable tmr1 */
152 tmr_counter_enable(TMR1, TRUE);
153
154 while(1)
155 {}
156}
157
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/tmr/dma/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f437/examples/tmr/dma/src/main.c:40
tmr_output_struct
tmr_output_config_type tmr_output_struct
Definition: project/at_start_f437/examples/tmr/dma/src/main.c:39
src_buffer
uint16_t src_buffer[3]
Definition: project/at_start_f437/examples/tmr/dma/src/main.c:44
timerperiod
uint16_t timerperiod
Definition: project/at_start_f437/examples/tmr/dma/src/main.c:43
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/dma/src/main.c:41
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_MEDIUM
@ DMA_PRIORITY_MEDIUM
Definition: at32f435_437_dma.h:183
DMAMUX_DMAREQ_ID_TMR1_OVERFLOW
@ DMAMUX_DMAREQ_ID_TMR1_OVERFLOW
Definition: at32f435_437_dma.h:246
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE15
@ GPIO_PINS_SOURCE15
Definition: at32f435_437_gpio.h:148
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_dma_request_enable
void tmr_dma_request_enable(tmr_type *tmr_x, tmr_dma_request_type dma_request, confirm_state new_state)
enable or disable tmr dma request
Definition: at32f435_437_tmr.c:1358
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_output_enable
void tmr_output_enable(tmr_type *tmr_x, confirm_state new_state)
tmr output enable(oen),this function is important for advtm output enable
Definition: at32f435_437_tmr.c:1499
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_OVERFLOW_DMA_REQUEST
@ TMR_OVERFLOW_DMA_REQUEST
Definition: at32f435_437_tmr.h:271
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_OUTPUT_CONTROL_PWM_MODE_B
@ TMR_OUTPUT_CONTROL_PWM_MODE_B
Definition: at32f435_437_tmr.h:181
TMR_OUTPUT_ACTIVE_LOW
@ TMR_OUTPUT_ACTIVE_LOW
Definition: at32f435_437_tmr.h:199
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb2_freq
uint32_t apb2_freq
Definition: at32f435_437_crm.h:791
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::occ_output_state
confirm_state occ_output_state
Definition: at32f435_437_tmr.h:418
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::occ_polarity
tmr_output_polarity_type occ_polarity
Definition: at32f435_437_tmr.h:416
tmr_output_config_type::occ_idle_state
confirm_state occ_idle_state
Definition: at32f435_437_tmr.h:414
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • dma_burst
  • inc
project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • dma_burst
  • inc
project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • dma_burst
  • inc
project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • dma_burst
  • src
Functions
project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • dma_burst
  • src
project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • dma_burst
  • src
Functions
project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • dma_burst
  • src
project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133 /* trigger TMR1 hall event */
134 tmr_event_sw_trigger(TMR1, TMR_HALL_SWTRIG);
135}
136
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
tmr_event_sw_trigger
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event)
generate tmr event
Definition: at32f435_437_tmr.c:1486
TMR_HALL_SWTRIG
@ TMR_HALL_SWTRIG
Definition: at32f435_437_tmr.h:290
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • dma_burst
  • src
Functions | Variables
project/at_start_f437/examples/tmr/dma_burst/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
tmr_output_config_type tmr_output_struct
dma_init_type dma_init_struct
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | timerperiod = 0
uint16_t | src_buffer [3] = {0x0FFF, 0x0000, 0x0555}

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/dma_burst/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • dma_burst
  • src
project/at_start_f437/examples/tmr/dma_burst/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 tmr_output_config_type tmr_output_struct;
40 dma_init_type dma_init_struct;
41 crm_clocks_freq_type crm_clocks_freq_struct = {0};
42
43uint16_t timerperiod = 0;
44uint16_t src_buffer[3] = {0x0FFF, 0x0000, 0x0555};
45
51int main(void)
52{
53 system_clock_config();
54
55 at32_board_init();
56
57 /* get system clock */
58 crm_clocks_freq_get(&crm_clocks_freq_struct);
59
60 /* turn led2/led3/led4 on */
61 at32_led_on(LED2);
62 at32_led_on(LED3);
63 at32_led_on(LED4);
64
65 /* enable tmr1/gpioa/gpiob/dma clock */
66 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
67 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
68 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
69 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
70
71 /* timer1 output pin Configuration */
72 gpio_init_struct.gpio_pins = GPIO_PINS_8;
73 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
74 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
75 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
76 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
77 gpio_init(GPIOA, &gpio_init_struct);
78
79 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_1);
80
81 /* -----------------------------------------------------------------------
82 tmr1 configuration: generate 1 pwm signal using the dma burst mode:
83 the tmr1clk frequency is set to apb2_freq * 2 (hz), to get tmr1 counter
84 clock at 24 mhz the prescaler is computed as following:
85 - prescaler = (tim1clk / tmr1 counter clock) - 1
86 the tmr1 period is 5.86 khz: tmr1 frequency = tmr1 counter clock/(arr + 1)
87 = 288mhz / 4096 = 70.31khz
88 tmr1 channel1 duty cycle = (tim1_ccr1/ tmr1_arr)* 100 = 33.33%
89 ----------------------------------------------------------------------- */
90
91 tmr_base_init(TMR1, 0xFFFF, 0);
92 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
93
94 /* channel 3 configuration in output mode */
95 tmr_output_default_para_init(&tmr_output_struct);
96 tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
97 tmr_output_struct.oc_output_state = TRUE;
98 tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;
99 tmr_output_struct.oc_idle_state = TRUE;
100 tmr_output_struct.occ_output_state = FALSE;
101 tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_LOW;
102 tmr_output_struct.occ_idle_state = FALSE;
103 /* channel 3 */
104 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
105 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 0xFFF);
106
107 /* enable tmr1 overflow dma request */
108 tmr_dma_request_enable(TMR1, TMR_OVERFLOW_DMA_REQUEST, TRUE);
109 tmr_dma_control_config(TMR1, TMR_DMA_TRANSFER_3BYTES, TMR_PR_ADDRESS);
110
111 /* dma config for tmr1 overflow dma request */
112 /* dma1 channel5 configuration */
113 dma_reset(DMA1_CHANNEL1);
114 dma_init_struct.buffer_size = 3;
115 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
116 dma_init_struct.memory_base_addr = (uint32_t)src_buffer;
117 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
118 dma_init_struct.memory_inc_enable = TRUE;
119 dma_init_struct.peripheral_base_addr = (uint32_t)0x4001004C;
120 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
121 dma_init_struct.peripheral_inc_enable = FALSE;
122 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
123 dma_init_struct.loop_mode_enable = FALSE;
124 dma_init(DMA1_CHANNEL1, &dma_init_struct);
125
126 dmamux_enable(DMA1, TRUE);
127 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_TMR1_OVERFLOW);
128 dma_channel_enable(DMA1_CHANNEL1, TRUE);
129
130 /* tmr1 output enable */
131 tmr_output_enable(TMR1, TRUE);
132 /* enable tmr1 */
133 tmr_counter_enable(TMR1, TRUE);
134
135 while(1)
136 {}
137}
138
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/tmr/dma_burst/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f437/examples/tmr/dma_burst/src/main.c:40
tmr_output_struct
tmr_output_config_type tmr_output_struct
Definition: project/at_start_f437/examples/tmr/dma_burst/src/main.c:39
src_buffer
uint16_t src_buffer[3]
Definition: project/at_start_f437/examples/tmr/dma_burst/src/main.c:44
timerperiod
uint16_t timerperiod
Definition: project/at_start_f437/examples/tmr/dma_burst/src/main.c:43
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/dma_burst/src/main.c:41
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_MEDIUM
@ DMA_PRIORITY_MEDIUM
Definition: at32f435_437_dma.h:183
DMAMUX_DMAREQ_ID_TMR1_OVERFLOW
@ DMAMUX_DMAREQ_ID_TMR1_OVERFLOW
Definition: at32f435_437_dma.h:246
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_dma_control_config
void tmr_dma_control_config(tmr_type *tmr_x, tmr_dma_transfer_length_type dma_length, tmr_dma_address_type dma_base_address)
config tmr dma control
Definition: at32f435_437_tmr.c:1785
tmr_dma_request_enable
void tmr_dma_request_enable(tmr_type *tmr_x, tmr_dma_request_type dma_request, confirm_state new_state)
enable or disable tmr dma request
Definition: at32f435_437_tmr.c:1358
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_output_enable
void tmr_output_enable(tmr_type *tmr_x, confirm_state new_state)
tmr output enable(oen),this function is important for advtm output enable
Definition: at32f435_437_tmr.c:1499
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_OVERFLOW_DMA_REQUEST
@ TMR_OVERFLOW_DMA_REQUEST
Definition: at32f435_437_tmr.h:271
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_PR_ADDRESS
@ TMR_PR_ADDRESS
Definition: at32f435_437_tmr.h:366
TMR_OUTPUT_CONTROL_PWM_MODE_B
@ TMR_OUTPUT_CONTROL_PWM_MODE_B
Definition: at32f435_437_tmr.h:181
TMR_OUTPUT_ACTIVE_LOW
@ TMR_OUTPUT_ACTIVE_LOW
Definition: at32f435_437_tmr.h:199
TMR_DMA_TRANSFER_3BYTES
@ TMR_DMA_TRANSFER_3BYTES
Definition: at32f435_437_tmr.h:332
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::occ_output_state
confirm_state occ_output_state
Definition: at32f435_437_tmr.h:418
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::occ_polarity
tmr_output_polarity_type occ_polarity
Definition: at32f435_437_tmr.h:416
tmr_output_config_type::occ_idle_state
confirm_state occ_idle_state
Definition: at32f435_437_tmr.h:414
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • encoder_tmr2
  • inc
project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • encoder_tmr2
  • inc
project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • encoder_tmr2
  • inc
project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • encoder_tmr2
  • src
Functions
project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • encoder_tmr2
  • src
project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • encoder_tmr2
  • src
Functions
project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • encoder_tmr2
  • src
project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133 /* trigger TMR1 hall event */
134 tmr_event_sw_trigger(TMR1, TMR_HALL_SWTRIG);
135}
136
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
tmr_event_sw_trigger
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event)
generate tmr event
Definition: at32f435_437_tmr.c:1486
TMR_HALL_SWTRIG
@ TMR_HALL_SWTRIG
Definition: at32f435_437_tmr.h:290
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • encoder_tmr2
  • src
Functions | Variables
project/at_start_f437/examples/tmr/encoder_tmr2/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | delay (uint32_t time)
delay function More...
int | main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint32_t | counter

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/encoder_tmr2/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • encoder_tmr2
  • src
project/at_start_f437/examples/tmr/encoder_tmr2/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40
41void delay(uint32_t time);
42uint32_t counter;
48int main(void)
49{
50 system_clock_config();
51
52 at32_board_init();
53
54 /* get system clock */
55 crm_clocks_freq_get(&crm_clocks_freq_struct);
56
57 /* turn led2/led3/led4 on */
58 at32_led_on(LED2);
59 at32_led_on(LED3);
60 at32_led_on(LED4);
61
62 /* enable tmr2/gpioa clock */
63 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
64 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
65
66 /* timer1 output pin Configuration */
67 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1;
68 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
69 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
70 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
71 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
72 gpio_init(GPIOA, &gpio_init_struct);
73
74 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
75 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
76 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
77 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
78 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
79 gpio_init(GPIOA, &gpio_init_struct);
80
81 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_1);
82 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_1);
83
84 /* tmr2 encoder mode configuration--------------------------
85 tmr2 ti1pf1 ,ti2fp2 as encoder input pin, tmr2 counter
86 changed each signal edge.
87 ------------------------------------------------------------ */
88 /* enable tmr2 32bit function */
89 tmr_32_bit_function_enable(TMR2, TRUE);
90
91 tmr_base_init(TMR2, 0xFFFFFFFF, 0);
92 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
93
94 /* config encoder mode */
95 tmr_encoder_mode_config(TMR2, TMR_ENCODER_MODE_C, TMR_INPUT_RISING_EDGE, TMR_INPUT_RISING_EDGE);
96
97 /* enable TMR2 */
98 tmr_counter_enable(TMR2, TRUE);
99
100 while(1)
101 {
102 /* generate encoder signal */
103 gpio_bits_set(GPIOA, GPIO_PINS_2);
104 delay(150);
105 gpio_bits_set(GPIOA, GPIO_PINS_3);
106 delay(150);
107 gpio_bits_reset(GPIOA, GPIO_PINS_2);
108 delay(150);
109 gpio_bits_reset(GPIOA, GPIO_PINS_3);
110 delay(150);
111
112 /* get current counter value */
113 counter = tmr_counter_value_get(TMR2);
114 }
115}
116
122void delay(uint32_t time)
123{
124 uint32_t i;
125
126 for(i = 0; i < time; i++);
127}
128
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/tmr/encoder_tmr2/src/main.c:38
delay
void delay(uint32_t time)
delay function
Definition: project/at_start_f435/examples/tmr/encoder_tmr2/src/main.c:122
counter
uint32_t counter
Definition: project/at_start_f437/examples/tmr/encoder_tmr2/src/main.c:42
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/encoder_tmr2/src/main.c:39
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
TRUE
@ TRUE
Definition: at32f435_437.h:379
time
ertc_time_type * time
Definition: random.c:41
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_counter_value_get
uint32_t tmr_counter_value_get(tmr_type *tmr_x)
get tmr counter value
Definition: at32f435_437_tmr.c:299
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_32_bit_function_enable
void tmr_32_bit_function_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr 32 bit function(plus mode)
Definition: at32f435_437_tmr.c:819
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_encoder_mode_config
void tmr_encoder_mode_config(tmr_type *tmr_x, tmr_encoder_mode_type encoder_mode, tmr_input_polarity_type ic1_polarity, tmr_input_polarity_type ic2_polarity)
config tmr encoder mode
Definition: at32f435_437_tmr.c:1678
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_INPUT_RISING_EDGE
@ TMR_INPUT_RISING_EDGE
Definition: at32f435_437_tmr.h:207
TMR_ENCODER_MODE_C
@ TMR_ENCODER_MODE_C
Definition: at32f435_437_tmr.h:166
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • external_clock
  • inc
project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • external_clock
  • inc
project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • external_clock
  • inc
project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • external_clock
  • src
Functions
project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • external_clock
  • src
project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • external_clock
  • src
Functions
project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • external_clock
  • src
project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133 /* trigger TMR1 hall event */
134 tmr_event_sw_trigger(TMR1, TMR_HALL_SWTRIG);
135}
136
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
tmr_event_sw_trigger
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event)
generate tmr event
Definition: at32f435_437_tmr.c:1486
TMR_HALL_SWTRIG
@ TMR_HALL_SWTRIG
Definition: at32f435_437_tmr.h:290
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • external_clock
  • src
Functions | Variables
project/at_start_f437/examples/tmr/external_clock/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
tmr_output_config_type tmr_output_struct
tmr_input_config_type tmr_input_config_struct
uint16_t | timerperiod = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/external_clock/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • external_clock
  • src
project/at_start_f437/examples/tmr/external_clock/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40 tmr_output_config_type tmr_output_struct;
41 tmr_input_config_type tmr_input_config_struct;
42uint16_t timerperiod = 0;
43
49int main(void)
50{
51 system_clock_config();
52
53 at32_board_init();
54
55 /* get system clock */
56 crm_clocks_freq_get(&crm_clocks_freq_struct);
57
58 /* turn led2/led3/led4 on */
59 at32_led_on(LED2);
60 at32_led_on(LED3);
61 at32_led_on(LED4);
62
63 /* enable tmr2/tmr3/gpioa/gpiob clock */
64 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
65 crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
66 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
67 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
68
69 /* timer2 and timer3 output pin Configuration */
70 gpio_init_struct.gpio_pins = GPIO_PINS_0;
71 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
72 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
73 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
74 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
75 gpio_init(GPIOA, &gpio_init_struct);
76 gpio_init(GPIOB, &gpio_init_struct);
77
78 gpio_init_struct.gpio_pins = GPIO_PINS_7;
79 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
80 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
81 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
82 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
83 gpio_init(GPIOA, &gpio_init_struct);
84
85 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_1);
86 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_2);
87 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE0, GPIO_MUX_2);
88
89 /* use tmr2 generate clock to drive tmr3--------------------
90 tmr2 pwm frequency = 288000000(apb1_freq*2)/240(period+1)/1000(div+1) = 1 khz
91 tmr3 pwm frequency = 1000(tmr2 pwm frequency)/100(period+1)/1(div+1) = 10 hz
92 ------------------------------------------------------------ */
93 /* tmr2 and tmr3 counter mode configuration */
94
95 timerperiod = ((crm_clocks_freq_struct.apb1_freq * 2) / 1000000) - 1;
96 tmr_base_init(TMR2, timerperiod, 999);
97 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
98
99 tmr_base_init(TMR3, 99, 0);
100 tmr_cnt_dir_set(TMR3, TMR_COUNT_UP);
101
102 /* tmr2 and tmr3 output mode configuration */
103 tmr_output_default_para_init(&tmr_output_struct);
104 tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
105 tmr_output_struct.oc_output_state = TRUE;
106 tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
107 tmr_output_struct.oc_idle_state = TRUE;
108 tmr_output_struct.occ_output_state = FALSE;
109 tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
110 tmr_output_struct.occ_idle_state = FALSE;
111 /* tmr2 channel 1 */
112 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
113 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_1, timerperiod/2);
114 /* tmr3 channel 3 */
115 tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
116 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_3, 50);
117
118 /* configure tmr3 channel2 to get clock signal */
119 tmr_input_config_struct.input_channel_select = TMR_SELECT_CHANNEL_2;
120 tmr_input_config_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
121 tmr_input_config_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
122 tmr_input_channel_init(TMR3, &tmr_input_config_struct, TMR_CHANNEL_INPUT_DIV_1);
123
124 /* select the tmr3 input trigger: C2IF2 */
125 tmr_trigger_input_select(TMR3, TMR_SUB_INPUT_SEL_C2DF2);
126
127 /* select the slave mode: external mode a*/
128 tmr_sub_mode_select(TMR3, TMR_SUB_EXTERNAL_CLOCK_MODE_A);
129
130 /* enable tmr2 */
131 tmr_counter_enable(TMR2, TRUE);
132
133 /* enable tmr3 */
134 tmr_counter_enable(TMR3, TRUE);
135
136 while(1)
137 {
138 }
139}
140
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/tmr/external_clock/src/main.c:38
tmr_output_struct
tmr_output_config_type tmr_output_struct
Definition: project/at_start_f437/examples/tmr/external_clock/src/main.c:40
timerperiod
uint16_t timerperiod
Definition: project/at_start_f437/examples/tmr/external_clock/src/main.c:42
tmr_input_config_struct
tmr_input_config_type tmr_input_config_struct
Definition: project/at_start_f437/examples/tmr/external_clock/src/main.c:41
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/external_clock/src/main.c:39
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
CRM_TMR3_PERIPH_CLOCK
@ CRM_TMR3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:129
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_2
@ GPIO_MUX_2
Definition: at32f435_437_gpio.h:158
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_input_channel_init
void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct, tmr_channel_input_divider_type divider_factor)
init tmr input channel
Definition: at32f435_437_tmr.c:872
tmr_sub_mode_select
void tmr_sub_mode_select(tmr_type *tmr_x, tmr_sub_mode_select_type sub_mode)
select tmr subordinate mode
Definition: at32f435_437_tmr.c:1245
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_trigger_input_select
void tmr_trigger_input_select(tmr_type *tmr_x, sub_tmr_input_sel_type trigger_select)
select tmr sub-trigger
Definition: at32f435_437_tmr.c:1322
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_INPUT_RISING_EDGE
@ TMR_INPUT_RISING_EDGE
Definition: at32f435_437_tmr.h:207
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_CC_CHANNEL_MAPPED_DIRECT
@ TMR_CC_CHANNEL_MAPPED_DIRECT
Definition: at32f435_437_tmr.h:241
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR_SUB_INPUT_SEL_C2DF2
@ TMR_SUB_INPUT_SEL_C2DF2
Definition: at32f435_437_tmr.h:140
TMR_SUB_EXTERNAL_CLOCK_MODE_A
@ TMR_SUB_EXTERNAL_CLOCK_MODE_A
Definition: at32f435_437_tmr.h:156
TMR_CHANNEL_INPUT_DIV_1
@ TMR_CHANNEL_INPUT_DIV_1
Definition: at32f435_437_tmr.h:251
TMR3
#define TMR3
Definition: at32f435_437_tmr.h:897
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_input_config_type
tmr input capture config type
Definition: at32f435_437_tmr.h:425
tmr_input_config_type::input_mapped_select
tmr_input_direction_mapped_type input_mapped_select
Definition: at32f435_437_tmr.h:428
tmr_input_config_type::input_polarity_select
tmr_input_polarity_type input_polarity_select
Definition: at32f435_437_tmr.h:427
tmr_input_config_type::input_channel_select
tmr_channel_select_type input_channel_select
Definition: at32f435_437_tmr.h:426
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::occ_output_state
confirm_state occ_output_state
Definition: at32f435_437_tmr.h:418
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::occ_polarity
tmr_output_polarity_type occ_polarity
Definition: at32f435_437_tmr.h:416
tmr_output_config_type::occ_idle_state
confirm_state occ_idle_state
Definition: at32f435_437_tmr.h:414
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • hall_xor_tmr2
  • inc
project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • hall_xor_tmr2
  • inc
project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • hall_xor_tmr2
  • inc
project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • hall_xor_tmr2
  • src
Functions
project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • hall_xor_tmr2
  • src
project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • hall_xor_tmr2
  • src
Functions
project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • hall_xor_tmr2
  • src
project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133 /* trigger TMR1 hall event */
134 tmr_event_sw_trigger(TMR1, TMR_HALL_SWTRIG);
135}
136
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
tmr_event_sw_trigger
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event)
generate tmr event
Definition: at32f435_437_tmr.c:1486
TMR_HALL_SWTRIG
@ TMR_HALL_SWTRIG
Definition: at32f435_437_tmr.h:290
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • hall_xor_tmr2
  • src
Functions | Variables
project/at_start_f437/examples/tmr/hall_xor_tmr2/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int | main (void)
main function. More...
void | TMR2_GLOBAL_IRQHandler (void)
this function handles TMR2 trigger exception. More...

Variables

gpio_init_type | gpio_init_struct = {0}
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
tmr_output_config_type tmr_output_struct
tmr_input_config_type tmr_input_config_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/hall_xor_tmr2/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • hall_xor_tmr2
  • src
project/at_start_f437/examples/tmr/hall_xor_tmr2/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40 tmr_output_config_type tmr_output_struct;
41 tmr_input_config_type tmr_input_config_struct;
42
48int main(void)
49{
50 system_clock_config();
51
52 at32_board_init();
53
54 /* get system clock */
55 crm_clocks_freq_get(&crm_clocks_freq_struct);
56
57 /* turn led2/led3/led4 on */
58 at32_led_on(LED2);
59 at32_led_on(LED3);
60 at32_led_on(LED4);
61
62 /* enable tmr2/tmr3/gpioa/gpiob clock */
63 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
64 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
65
66 /* tmr2 channel1 ,channel2 and channel3 configuration */
67 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_2;
68 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
69 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
70 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
71 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
72 gpio_init(GPIOA, &gpio_init_struct);
73
74 /* hall signal (pa3 ,pa6 ,pa7) and trigger flag signal(pa8) configuration */
75 gpio_init_struct.gpio_pins = GPIO_PINS_3 | GPIO_PINS_6 | GPIO_PINS_7 | GPIO_PINS_8;
76 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
77 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
78 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
79 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
80 gpio_init(GPIOA, &gpio_init_struct);
81
82 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_1);
83 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_1);
84 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_1);
85
86 /* tmr2 xor mode configuration--------------------------------------------
87 tmr2 channel1 ,channel2 and channel3 as hall signal input channel, trigger
88 generated each signal edge.
89 ------------------------------------------------------------ */
90 /* tmr2 and tmr3 counter mode configuration */
91 tmr_32_bit_function_enable(TMR2, TRUE);
92
93 tmr_base_init(TMR2, 0xFFFFFFFF, 0);
94 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
95
96 /* config ti1 trc as input source */
97 tmr_input_config_struct.input_channel_select = TMR_SELECT_CHANNEL_1;
98 tmr_input_config_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_STI;
99 tmr_input_config_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
100 tmr_input_channel_init(TMR2, &tmr_input_config_struct, TMR_CHANNEL_INPUT_DIV_1);
101
102 /* xor funtion enable */
103 tmr_channel1_input_select(TMR2, TMR_CHANEL1_2_3_CONNECTED_C1IRAW_XOR);
104
105 /* select the tmr2 input trigger: C1INC */
106 tmr_trigger_input_select(TMR2, TMR_SUB_INPUT_SEL_C1INC);
107
108 /* select the slave mode: reset mode */
109 tmr_sub_mode_select(TMR2, TMR_SUB_RESET_MODE);
110
111 tmr_interrupt_enable(TMR2, TMR_TRIGGER_INT, TRUE);
112
113 /* tmr2 trigger interrupt nvic init */
114 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
115 nvic_irq_enable(TMR2_GLOBAL_IRQn, 1, 0);
116
117 /* enable tmr2 */
118 tmr_counter_enable(TMR2, TRUE);
119
120 while(1)
121 {
122 /* generate hall signal */
123 gpio_bits_set(GPIOA, GPIO_PINS_3);
124 delay_us(10);
125 gpio_bits_set(GPIOA, GPIO_PINS_6);
126 delay_us(10);
127 gpio_bits_set(GPIOA, GPIO_PINS_7);
128 delay_us(10);
129 gpio_bits_reset(GPIOA, GPIO_PINS_3);
130 delay_us(10);
131 gpio_bits_reset(GPIOA, GPIO_PINS_6);
132 delay_us(10);
133 gpio_bits_reset(GPIOA, GPIO_PINS_7);
134 delay_us(10);
135 }
136}
137
143void TMR2_GLOBAL_IRQHandler(void)
144{
145 if(tmr_flag_get(TMR2, TMR_TRIGGER_FLAG) == SET)
146 {
147 GPIOA->odt ^= GPIO_PINS_8;
148 tmr_flag_clear(TMR2, TMR_TRIGGER_FLAG);
149 }
150}
151
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
TMR2_GLOBAL_IRQHandler
void TMR2_GLOBAL_IRQHandler(void)
This function handles the power voltage monitoring output interrupt request.
Definition: project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_int.c:141
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/tmr/hall_xor_tmr2/src/main.c:38
tmr_output_struct
tmr_output_config_type tmr_output_struct
Definition: project/at_start_f437/examples/tmr/hall_xor_tmr2/src/main.c:40
tmr_input_config_struct
tmr_input_config_type tmr_input_config_struct
Definition: project/at_start_f437/examples/tmr/hall_xor_tmr2/src/main.c:41
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/hall_xor_tmr2/src/main.c:39
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_input_channel_init
void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct, tmr_channel_input_divider_type divider_factor)
init tmr input channel
Definition: at32f435_437_tmr.c:872
tmr_sub_mode_select
void tmr_sub_mode_select(tmr_type *tmr_x, tmr_sub_mode_select_type sub_mode)
select tmr subordinate mode
Definition: at32f435_437_tmr.c:1245
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_channel1_input_select
void tmr_channel1_input_select(tmr_type *tmr_x, tmr_channel1_input_connected_type ch1_connect)
select tmr channel1 input
Definition: at32f435_437_tmr.c:1150
tmr_32_bit_function_enable
void tmr_32_bit_function_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr 32 bit function(plus mode)
Definition: at32f435_437_tmr.c:819
tmr_trigger_input_select
void tmr_trigger_input_select(tmr_type *tmr_x, sub_tmr_input_sel_type trigger_select)
select tmr sub-trigger
Definition: at32f435_437_tmr.c:1322
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_INPUT_RISING_EDGE
@ TMR_INPUT_RISING_EDGE
Definition: at32f435_437_tmr.h:207
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_CHANEL1_2_3_CONNECTED_C1IRAW_XOR
@ TMR_CHANEL1_2_3_CONNECTED_C1IRAW_XOR
Definition: at32f435_437_tmr.h:233
TMR_CC_CHANNEL_MAPPED_STI
@ TMR_CC_CHANNEL_MAPPED_STI
Definition: at32f435_437_tmr.h:243
TMR_SUB_INPUT_SEL_C1INC
@ TMR_SUB_INPUT_SEL_C1INC
Definition: at32f435_437_tmr.h:138
TMR_SUB_RESET_MODE
@ TMR_SUB_RESET_MODE
Definition: at32f435_437_tmr.h:153
TMR_CHANNEL_INPUT_DIV_1
@ TMR_CHANNEL_INPUT_DIV_1
Definition: at32f435_437_tmr.h:251
TMR_TRIGGER_FLAG
#define TMR_TRIGGER_FLAG
Definition: at32f435_437_tmr.h:59
TMR_TRIGGER_INT
#define TMR_TRIGGER_INT
Definition: at32f435_437_tmr.h:81
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
TMR2_GLOBAL_IRQn
@ TMR2_GLOBAL_IRQn
Definition: at32f435_437.h:176
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_input_config_type
tmr input capture config type
Definition: at32f435_437_tmr.h:425
tmr_input_config_type::input_mapped_select
tmr_input_direction_mapped_type input_mapped_select
Definition: at32f435_437_tmr.h:428
tmr_input_config_type::input_polarity_select
tmr_input_polarity_type input_polarity_select
Definition: at32f435_437_tmr.h:427
tmr_input_config_type::input_channel_select
tmr_channel_select_type input_channel_select
Definition: at32f435_437_tmr.h:426
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • hang_mode
  • inc
project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • hang_mode
  • inc
project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • hang_mode
  • inc
project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • hang_mode
  • src
Functions
project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • hang_mode
  • src
project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • hang_mode
  • src
Functions
project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • hang_mode
  • src
project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133 /* trigger TMR1 hall event */
134 tmr_event_sw_trigger(TMR1, TMR_HALL_SWTRIG);
135}
136
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
tmr_event_sw_trigger
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event)
generate tmr event
Definition: at32f435_437_tmr.c:1486
TMR_HALL_SWTRIG
@ TMR_HALL_SWTRIG
Definition: at32f435_437_tmr.h:290
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • hang_mode
  • src
Functions | Variables
project/at_start_f437/examples/tmr/hang_mode/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
tmr_output_config_type tmr_output_struct
tmr_input_config_type tmr_input_config_struct
uint16_t | timerperiod = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/hang_mode/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • hang_mode
  • src
project/at_start_f437/examples/tmr/hang_mode/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40 tmr_output_config_type tmr_output_struct;
41 tmr_input_config_type tmr_input_config_struct;
42uint16_t timerperiod = 0;
43
49int main(void)
50{
51 system_clock_config();
52
53 at32_board_init();
54
55 /* get system clock */
56 crm_clocks_freq_get(&crm_clocks_freq_struct);
57
58 /* turn led2/led3/led4 on */
59 at32_led_on(LED2);
60 at32_led_on(LED3);
61 at32_led_on(LED4);
62
63 /* enable tmr1/gpioa clock */
64 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
65 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
66
67 /* timer1 output pin configuration */
68 gpio_init_struct.gpio_pins = GPIO_PINS_8;
69 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
70 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
71 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
72 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
73 gpio_init(GPIOA, &gpio_init_struct);
74
75 gpio_init_struct.gpio_pins = GPIO_PINS_9;
76 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
77 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
78 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
79 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
80 gpio_init(GPIOA, &gpio_init_struct);
81
82 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_1);
83 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE9, GPIO_MUX_1);
84
85 /* hang mode test -----
86 1/tmr1 is configured as master timer:
87 - toggle mode is used
88
89 2/tmr1 is configured as slave timer for an external trigger connected
90 to tmr1 ti2 pin (tmr1 ch2 configured as input pin):
91 - the tmr1 ti2fp2 is used as trigger input
92 - rising edge is used to start and stop the tmr1: hang mode.
93
94 * the timxclk is fixed to apb2_freq*2, the three timers are running at:
95 tmrx frequency = tmrx clock counter/ (timx_period + 1) = 500 khz.
96 */
97 /* tmr2 and tmr3 counter mode configuration */
98 timerperiod = ((crm_clocks_freq_struct.apb2_freq * 2) / 500000 ) - 1;
99 tmr_base_init(TMR1, timerperiod, 0);
100 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
101
102 /* tmr1 output mode configuration */
103 tmr_output_default_para_init(&tmr_output_struct);
104 tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
105 tmr_output_struct.oc_output_state = TRUE;
106 tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
107 tmr_output_struct.oc_idle_state = TRUE;
108 tmr_output_struct.occ_output_state = FALSE;
109 tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
110 tmr_output_struct.occ_idle_state = FALSE;
111 /* tmr1 channel 1 */
112 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
113 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, timerperiod/2);
114
115 /* configure tmr1 channel2 to get hang signal */
116 tmr_input_default_para_init(&tmr_input_config_struct);
117 tmr_input_config_struct.input_channel_select = TMR_SELECT_CHANNEL_2;
118 tmr_input_config_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
119 tmr_input_config_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
120 tmr_input_channel_init(TMR1, &tmr_input_config_struct, TMR_CHANNEL_INPUT_DIV_1);
121
122 /* select the tmr1 input trigger: C2IF2 */
123 tmr_trigger_input_select(TMR1, TMR_SUB_INPUT_SEL_C2DF2);
124
125 /* select the slave mode: hang mode */
126 tmr_sub_mode_select(TMR1, TMR_SUB_HANG_MODE);
127
128 /* tmr1 output enable */
129 tmr_output_enable(TMR1, TRUE);
130
131 /* enable tmr1 */
132 tmr_counter_enable(TMR1, TRUE);
133
134 while(1)
135 {
136 }
137}
138
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/tmr/hang_mode/src/main.c:38
tmr_output_struct
tmr_output_config_type tmr_output_struct
Definition: project/at_start_f437/examples/tmr/hang_mode/src/main.c:40
timerperiod
uint16_t timerperiod
Definition: project/at_start_f437/examples/tmr/hang_mode/src/main.c:42
tmr_input_config_struct
tmr_input_config_type tmr_input_config_struct
Definition: project/at_start_f437/examples/tmr/hang_mode/src/main.c:41
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/hang_mode/src/main.c:39
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_input_channel_init
void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct, tmr_channel_input_divider_type divider_factor)
init tmr input channel
Definition: at32f435_437_tmr.c:872
tmr_sub_mode_select
void tmr_sub_mode_select(tmr_type *tmr_x, tmr_sub_mode_select_type sub_mode)
select tmr subordinate mode
Definition: at32f435_437_tmr.c:1245
tmr_input_default_para_init
void tmr_input_default_para_init(tmr_input_config_type *tmr_input_struct)
init tmr input default para
Definition: at32f435_437_tmr.c:169
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_output_enable
void tmr_output_enable(tmr_type *tmr_x, confirm_state new_state)
tmr output enable(oen),this function is important for advtm output enable
Definition: at32f435_437_tmr.c:1499
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_trigger_input_select
void tmr_trigger_input_select(tmr_type *tmr_x, sub_tmr_input_sel_type trigger_select)
select tmr sub-trigger
Definition: at32f435_437_tmr.c:1322
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_INPUT_RISING_EDGE
@ TMR_INPUT_RISING_EDGE
Definition: at32f435_437_tmr.h:207
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_CC_CHANNEL_MAPPED_DIRECT
@ TMR_CC_CHANNEL_MAPPED_DIRECT
Definition: at32f435_437_tmr.h:241
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR_SUB_INPUT_SEL_C2DF2
@ TMR_SUB_INPUT_SEL_C2DF2
Definition: at32f435_437_tmr.h:140
TMR_SUB_HANG_MODE
@ TMR_SUB_HANG_MODE
Definition: at32f435_437_tmr.h:154
TMR_CHANNEL_INPUT_DIV_1
@ TMR_CHANNEL_INPUT_DIV_1
Definition: at32f435_437_tmr.h:251
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb2_freq
uint32_t apb2_freq
Definition: at32f435_437_crm.h:791
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_input_config_type
tmr input capture config type
Definition: at32f435_437_tmr.h:425
tmr_input_config_type::input_mapped_select
tmr_input_direction_mapped_type input_mapped_select
Definition: at32f435_437_tmr.h:428
tmr_input_config_type::input_polarity_select
tmr_input_polarity_type input_polarity_select
Definition: at32f435_437_tmr.h:427
tmr_input_config_type::input_channel_select
tmr_channel_select_type input_channel_select
Definition: at32f435_437_tmr.h:426
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::occ_output_state
confirm_state occ_output_state
Definition: at32f435_437_tmr.h:418
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::occ_polarity
tmr_output_polarity_type occ_polarity
Definition: at32f435_437_tmr.h:416
tmr_output_config_type::occ_idle_state
confirm_state occ_idle_state
Definition: at32f435_437_tmr.h:414
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • input_capture
  • inc
project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • input_capture
  • inc
project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • input_capture
  • inc
project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • input_capture
  • src
Functions
project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • input_capture
  • src
project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • input_capture
  • src
Functions
project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • input_capture
  • src
project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133 /* trigger TMR1 hall event */
134 tmr_event_sw_trigger(TMR1, TMR_HALL_SWTRIG);
135}
136
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
tmr_event_sw_trigger
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event)
generate tmr event
Definition: at32f435_437_tmr.c:1486
TMR_HALL_SWTRIG
@ TMR_HALL_SWTRIG
Definition: at32f435_437_tmr.h:290
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • input_capture
  • src
Functions | Variables
project/at_start_f437/examples/tmr/input_capture/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | delay (uint32_t time)
delay function More...
void | uart_init (uint32_t bound)
initialize print usart More...
int | main (void)
main function. More...
void | TMR3_GLOBAL_IRQHandler (void)
this function handles tmr3 trigger exception. More...

Variables

gpio_init_type | gpio_init_struct = {0}
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
tmr_input_config_type tmr_input_config_struct
__IO uint32_t | tmr3freq = 0
__IO uint32_t | sys_counter = 0
__IO uint16_t | capturenumber = 0
__IO uint16_t | ic3readvalue1 = 0
__IO uint16_t | ic3readvalue2 = 0
__IO uint32_t | capture = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/input_capture/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • input_capture
  • src
project/at_start_f437/examples/tmr/input_capture/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40 tmr_input_config_type tmr_input_config_struct;
41void delay(uint32_t time);
42void uart_init(uint32_t bound);
43__IO uint32_t tmr3freq = 0;
44__IO uint32_t sys_counter = 0;
45__IO uint16_t capturenumber = 0;
46__IO uint16_t ic3readvalue1 = 0, ic3readvalue2 = 0;
47__IO uint32_t capture = 0;
48
54int main(void)
55{
56 system_clock_config();
57
58 at32_board_init();
59
60 uart_print_init(115200);
61
62 /* get system clock */
63 crm_clocks_freq_get(&crm_clocks_freq_struct);
64
65 /* turn led2/led3/led4 on */
66 at32_led_on(LED2);
67 at32_led_on(LED3);
68 at32_led_on(LED4);
69
70 /* enable tmr3/gpioa clock */
71 crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
72 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
73
74 /* timer3 input pin Configuration */
75 gpio_init_struct.gpio_pins = GPIO_PINS_7;
76 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
77 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
78 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
79 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
80 gpio_init(GPIOA, &gpio_init_struct);
81
82 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_2);
83
84 /* tmr3 configuration: input capture mode ---------------------
85 the external signal is connected to tmr3 ch2 pin (pa.07)
86 the rising edge is used as active edge,
87 the tmr3 c2dt is used to compute the frequency value
88 ------------------------------------------------------------ */
89 /* tmr3 counter mode configuration */
90 tmr_base_init(TMR3, 0xFFFF, 0);
91 tmr_cnt_dir_set(TMR3, TMR_COUNT_UP);
92
93 /* configure tmr3 channel2 to get clock signal */
94 tmr_input_config_struct.input_channel_select = TMR_SELECT_CHANNEL_2;
95 tmr_input_config_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
96 tmr_input_config_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
97 tmr_input_channel_init(TMR3, &tmr_input_config_struct, TMR_CHANNEL_INPUT_DIV_1);
98
99 tmr_interrupt_enable(TMR3, TMR_C2_INT, TRUE);
100
101 /* tmr2 trigger interrupt nvic init */
102 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
103 nvic_irq_enable(TMR3_GLOBAL_IRQn, 1, 0);
104
105 /* enable tmr3 */
106 tmr_counter_enable(TMR3, TRUE);
107
108 while(1)
109 {
110 delay(10000);
111 printf("The external signal frequece is : %d\r\n",tmr3freq);
112 tmr3freq = 0;
113 }
114}
120void delay(uint32_t time)
121{
122 uint32_t i;
123
124 for(i = 0; i < time; i++);
125}
126
132void TMR3_GLOBAL_IRQHandler(void)
133{
134 if(tmr_flag_get(TMR3, TMR_C2_FLAG) == SET)
135 {
136 tmr_flag_clear(TMR3, TMR_C2_FLAG);
137 if(capturenumber == 0)
138 {
139 /* get the Input Capture value */
140 ic3readvalue1 = tmr_channel_value_get(TMR3, TMR_SELECT_CHANNEL_2);
141 capturenumber = 1;
142 }
143 else if(capturenumber == 1)
144 {
145 /* get the Input Capture value */
146 ic3readvalue2 = tmr_channel_value_get(TMR3, TMR_SELECT_CHANNEL_2);
147
148 /* capture computation */
149 if (ic3readvalue2 > ic3readvalue1)
150 {
151 capture = (ic3readvalue2 - ic3readvalue1);
152 }
153 else
154 {
155 capture = ((0xFFFF - ic3readvalue1) + ic3readvalue2);
156 }
157 /* frequency computation */
158 tmr3freq = (uint32_t) crm_clocks_freq_struct.sclk_freq / capture;
159 capturenumber = 0;
160 }
161 }
162}
163
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
uart_init
void uart_init(uint32_t bound)
initialize print usart
Definition: project/at_start_f435/examples/edma/link_list_mode/src/main.c:137
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
delay
void delay(uint32_t time)
delay function
Definition: project/at_start_f435/examples/tmr/encoder_tmr2/src/main.c:122
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/tmr/input_capture/src/main.c:38
ic3readvalue2
__IO uint16_t ic3readvalue2
Definition: project/at_start_f437/examples/tmr/input_capture/src/main.c:46
tmr3freq
__IO uint32_t tmr3freq
Definition: project/at_start_f437/examples/tmr/input_capture/src/main.c:43
capturenumber
__IO uint16_t capturenumber
Definition: project/at_start_f437/examples/tmr/input_capture/src/main.c:45
TMR3_GLOBAL_IRQHandler
void TMR3_GLOBAL_IRQHandler(void)
this function handles tmr3 trigger exception.
Definition: project/at_start_f435/examples/tmr/input_capture/src/main.c:132
tmr_input_config_struct
tmr_input_config_type tmr_input_config_struct
Definition: project/at_start_f437/examples/tmr/input_capture/src/main.c:40
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/input_capture/src/main.c:39
ic3readvalue1
__IO uint16_t ic3readvalue1
Definition: project/at_start_f437/examples/tmr/input_capture/src/main.c:46
sys_counter
__IO uint32_t sys_counter
Definition: project/at_start_f437/examples/tmr/input_capture/src/main.c:44
capture
__IO uint32_t capture
Definition: project/at_start_f437/examples/tmr/input_capture/src/main.c:47
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR3_PERIPH_CLOCK
@ CRM_TMR3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:129
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
time
ertc_time_type * time
Definition: random.c:41
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_2
@ GPIO_MUX_2
Definition: at32f435_437_gpio.h:158
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_channel_value_get
uint32_t tmr_channel_value_get(tmr_type *tmr_x, tmr_channel_select_type tmr_channel)
get tmr channel value
Definition: at32f435_437_tmr.c:593
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_input_channel_init
void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct, tmr_channel_input_divider_type divider_factor)
init tmr input channel
Definition: at32f435_437_tmr.c:872
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_INPUT_RISING_EDGE
@ TMR_INPUT_RISING_EDGE
Definition: at32f435_437_tmr.h:207
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_CC_CHANNEL_MAPPED_DIRECT
@ TMR_CC_CHANNEL_MAPPED_DIRECT
Definition: at32f435_437_tmr.h:241
TMR_CHANNEL_INPUT_DIV_1
@ TMR_CHANNEL_INPUT_DIV_1
Definition: at32f435_437_tmr.h:251
TMR_C2_FLAG
#define TMR_C2_FLAG
Definition: at32f435_437_tmr.h:54
TMR_C2_INT
#define TMR_C2_INT
Definition: at32f435_437_tmr.h:77
TMR3
#define TMR3
Definition: at32f435_437_tmr.h:897
TMR3_GLOBAL_IRQn
@ TMR3_GLOBAL_IRQn
Definition: at32f435_437.h:177
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::sclk_freq
uint32_t sclk_freq
Definition: at32f435_437_crm.h:789
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_input_config_type
tmr input capture config type
Definition: at32f435_437_tmr.h:425
tmr_input_config_type::input_mapped_select
tmr_input_direction_mapped_type input_mapped_select
Definition: at32f435_437_tmr.h:428
tmr_input_config_type::input_polarity_select
tmr_input_polarity_type input_polarity_select
Definition: at32f435_437_tmr.h:427
tmr_input_config_type::input_channel_select
tmr_channel_select_type input_channel_select
Definition: at32f435_437_tmr.h:426
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • oc_high
  • inc
project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • oc_high
  • inc
project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • oc_high
  • inc
project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • oc_high
  • src
Functions
project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • oc_high
  • src
project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • oc_high
  • src
Functions
project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR2_GLOBAL_IRQHandler (void)
this function handles tmr2 global interrupt request. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • oc_high
  • src
project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
140void TMR2_GLOBAL_IRQHandler(void)
141{
142 if (tmr_flag_get(TMR2, TMR_C1_FLAG) != RESET)
143 {
144 /* clear tmr2 channel1 interrupt pending bit*/
145 tmr_flag_clear(TMR2, TMR_C1_FLAG);
146
147 /* pc.06 turnoff after 1000 ms */
148 gpio_bits_reset(GPIOC, GPIO_PINS_6);
149 }
150 else if (tmr_flag_get(TMR2, TMR_C2_FLAG) != RESET)
151 {
152 /* clear tmr2 channel2 interrupt pending bit*/
153 tmr_flag_clear(TMR2, TMR_C2_FLAG);
154
155 /* pc.07 turnoff after 500 ms */
156 gpio_bits_reset(GPIOC, GPIO_PINS_7);
157 }
158 else if (tmr_flag_get(TMR2, TMR_C3_FLAG) != RESET)
159 {
160 /* clear tmr2 channel3 interrupt pending bit*/
161 tmr_flag_clear(TMR2, TMR_C3_FLAG);
162
163 /* pc.08 turnoff after 250 ms */
164 gpio_bits_reset(GPIOC, GPIO_PINS_8);
165 }
166 else
167 {
168 /* clear tmr2 channel4 interrupt pending bit*/
169 tmr_flag_clear(TMR2, TMR_C4_FLAG);
170
171 /* pc.09 turnoff after 125 ms */
172 gpio_bits_reset(GPIOC, GPIO_PINS_9);
173 }
174}
175
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
TMR2_GLOBAL_IRQHandler
void TMR2_GLOBAL_IRQHandler(void)
This function handles the power voltage monitoring output interrupt request.
Definition: project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_int.c:141
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_C1_FLAG
#define TMR_C1_FLAG
Definition: at32f435_437_tmr.h:53
TMR_C2_FLAG
#define TMR_C2_FLAG
Definition: at32f435_437_tmr.h:54
TMR_C3_FLAG
#define TMR_C3_FLAG
Definition: at32f435_437_tmr.h:55
TMR_C4_FLAG
#define TMR_C4_FLAG
Definition: at32f435_437_tmr.h:56
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • oc_high
  • src
Functions | Variables
project/at_start_f437/examples/tmr/oc_high/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | gpio_configuration (void)
configure the gpioc pins. More...
int | main (void)
main function. More...

Variables

tmr_output_config_type tmr_oc_init_structure
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | ccr1_val = 1000
uint16_t | ccr2_val = 500
uint16_t | ccr3_val = 250
uint16_t | ccr4_val = 125
uint16_t | prescalervalue = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/oc_high/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • oc_high
  • src
project/at_start_f437/examples/tmr/oc_high/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_output_config_type tmr_oc_init_structure;
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40uint16_t ccr1_val = 1000;
41uint16_t ccr2_val = 500;
42uint16_t ccr3_val = 250;
43uint16_t ccr4_val = 125;
44uint16_t prescalervalue = 0;
45
46void gpio_configuration(void);
47
53int main(void)
54{
55 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
56
57 system_clock_config();
58
59 at32_board_init();
60
61 crm_apb1_div_set(CRM_APB1_DIV_16);
62
63 /* get system clock */
64 crm_clocks_freq_get(&crm_clocks_freq_struct);
65
66 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
67 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
68
69 nvic_irq_enable(TMR2_GLOBAL_IRQn, 0, 1);
70
71 gpio_configuration();
72
73 /* compute the prescaler value */
74 prescalervalue = (uint16_t) ((crm_clocks_freq_struct.apb1_freq * 2) / 1000) - 1;
75
76 /* tmr2 time base configuration */
77 tmr_base_init(TMR2, 0xFFFF, prescalervalue);
78 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
79 tmr_clock_source_div_set(TMR2, TMR_CLOCK_DIV1);
80
81 tmr_output_default_para_init(&tmr_oc_init_structure);
82 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_HIGH;
83 tmr_oc_init_structure.oc_idle_state = FALSE;
84 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
85 tmr_oc_init_structure.oc_output_state = TRUE;
86 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
87 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_1, ccr1_val);
88
89 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_2, &tmr_oc_init_structure);
90 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_2, ccr2_val);
91
92 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_3, &tmr_oc_init_structure);
93 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_3, ccr3_val);
94
95 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_4, &tmr_oc_init_structure);
96 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_4, ccr4_val);
97
98 tmr_period_buffer_enable(TMR2, TRUE);
99
100 /* tmr2 int enable */
101 tmr_interrupt_enable(TMR2, TMR_C1_INT | TMR_C2_INT | TMR_C3_INT | TMR_C4_INT, TRUE);
102
103 /* set pc.06, pc.07, pc.08 and pc.09 pins */
104 gpio_bits_set(GPIOC, GPIO_PINS_6 | GPIO_PINS_7 | GPIO_PINS_8 | GPIO_PINS_9);
105
106 /* tmr2 enable counter */
107 tmr_counter_enable(TMR2, TRUE);
108
109 while(1)
110 {
111 }
112}
113
119void gpio_configuration(void)
120{
121 gpio_init_type gpio_init_struct;
122
123 gpio_default_para_init(&gpio_init_struct);
124 /* gpioc configuration: pin6, 7, 8 and 9 as output push-pull */
125 gpio_init_struct.gpio_pins = GPIO_PINS_6 | GPIO_PINS_7 | GPIO_PINS_8 | GPIO_PINS_9;
126 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
127 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
128 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
129 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
130
131 gpio_init(GPIOC, &gpio_init_struct);
132}
133
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
ccr1_val
uint16_t ccr1_val
Definition: project/at_start_f437/examples/tmr/oc_high/src/main.c:40
prescalervalue
uint16_t prescalervalue
Definition: project/at_start_f437/examples/tmr/oc_high/src/main.c:44
ccr2_val
uint16_t ccr2_val
Definition: project/at_start_f437/examples/tmr/oc_high/src/main.c:41
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f437/examples/tmr/oc_high/src/main.c:38
ccr4_val
uint16_t ccr4_val
Definition: project/at_start_f437/examples/tmr/oc_high/src/main.c:43
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/oc_high/src/main.c:39
ccr3_val
uint16_t ccr3_val
Definition: project/at_start_f437/examples/tmr/oc_high/src/main.c:42
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
CRM_APB1_DIV_16
@ CRM_APB1_DIV_16
Definition: at32f435_437_crm.h:591
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_period_buffer_enable
void tmr_period_buffer_enable(tmr_type *tmr_x, confirm_state new_state)
set tmr period buffer
Definition: at32f435_437_tmr.c:638
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_HIGH
@ TMR_OUTPUT_CONTROL_HIGH
Definition: at32f435_437_tmr.h:175
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR_C3_INT
#define TMR_C3_INT
Definition: at32f435_437_tmr.h:78
TMR_C4_INT
#define TMR_C4_INT
Definition: at32f435_437_tmr.h:79
TMR_C1_INT
#define TMR_C1_INT
Definition: at32f435_437_tmr.h:76
TMR_C2_INT
#define TMR_C2_INT
Definition: at32f435_437_tmr.h:77
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
TMR2_GLOBAL_IRQn
@ TMR2_GLOBAL_IRQn
Definition: at32f435_437.h:176
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • oc_low
  • inc
project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • oc_low
  • inc
project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • oc_low
  • inc
project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • oc_low
  • src
Functions
project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • oc_low
  • src
project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • oc_low
  • src
Functions
project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR2_GLOBAL_IRQHandler (void)
this function handles tmr2 global interrupt request. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • oc_low
  • src
project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
140void TMR2_GLOBAL_IRQHandler(void)
141{
142 if (tmr_flag_get(TMR2, TMR_C1_FLAG) != RESET)
143 {
144 /* clear tmr2 channel1 interrupt pending bit*/
145 tmr_flag_clear(TMR2, TMR_C1_FLAG);
146
147 /* pc.06 turnoff after 1000 ms */
148 gpio_bits_reset(GPIOC, GPIO_PINS_6);
149 }
150 else if (tmr_flag_get(TMR2, TMR_C2_FLAG) != RESET)
151 {
152 /* clear tmr2 channel2 interrupt pending bit*/
153 tmr_flag_clear(TMR2, TMR_C2_FLAG);
154
155 /* pc.07 turnoff after 500 ms */
156 gpio_bits_reset(GPIOC, GPIO_PINS_7);
157 }
158 else if (tmr_flag_get(TMR2, TMR_C3_FLAG) != RESET)
159 {
160 /* clear tmr2 channel3 interrupt pending bit*/
161 tmr_flag_clear(TMR2, TMR_C3_FLAG);
162
163 /* pc.08 turnoff after 250 ms */
164 gpio_bits_reset(GPIOC, GPIO_PINS_8);
165 }
166 else
167 {
168 /* clear tmr2 channel4 interrupt pending bit*/
169 tmr_flag_clear(TMR2, TMR_C4_FLAG);
170
171 /* pc.09 turnoff after 125 ms */
172 gpio_bits_reset(GPIOC, GPIO_PINS_9);
173 }
174}
175
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
TMR2_GLOBAL_IRQHandler
void TMR2_GLOBAL_IRQHandler(void)
This function handles the power voltage monitoring output interrupt request.
Definition: project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_int.c:141
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_C1_FLAG
#define TMR_C1_FLAG
Definition: at32f435_437_tmr.h:53
TMR_C2_FLAG
#define TMR_C2_FLAG
Definition: at32f435_437_tmr.h:54
TMR_C3_FLAG
#define TMR_C3_FLAG
Definition: at32f435_437_tmr.h:55
TMR_C4_FLAG
#define TMR_C4_FLAG
Definition: at32f435_437_tmr.h:56
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • oc_low
  • src
Functions | Variables
project/at_start_f437/examples/tmr/oc_low/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | gpio_configuration (void)
configure the gpioc pins. More...
int | main (void)
main function. More...

Variables

tmr_output_config_type tmr_oc_init_structure
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | ccr1_val = 1000
uint16_t | ccr2_val = 500
uint16_t | ccr3_val = 250
uint16_t | ccr4_val = 125
uint16_t | prescalervalue = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/oc_low/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • oc_low
  • src
project/at_start_f437/examples/tmr/oc_low/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_output_config_type tmr_oc_init_structure;
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40uint16_t ccr1_val = 1000;
41uint16_t ccr2_val = 500;
42uint16_t ccr3_val = 250;
43uint16_t ccr4_val = 125;
44uint16_t prescalervalue = 0;
45
46void gpio_configuration(void);
47
53int main(void)
54{
55 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
56
57 system_clock_config();
58
59 at32_board_init();
60
61 crm_apb1_div_set(CRM_APB1_DIV_16);
62
63 /* get system clock */
64 crm_clocks_freq_get(&crm_clocks_freq_struct);
65
66 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
67 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
68
69 nvic_irq_enable(TMR2_GLOBAL_IRQn, 0, 1);
70
71 gpio_configuration();
72
73 /* compute the prescaler value */
74 prescalervalue = (uint16_t) ((crm_clocks_freq_struct.apb1_freq * 2) / 1000) - 1;
75
76 /* tmr2 time base configuration */
77 tmr_base_init(TMR2, 65535, prescalervalue);
78 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
79 tmr_clock_source_div_set(TMR2, TMR_CLOCK_DIV1);
80
81 tmr_output_default_para_init(&tmr_oc_init_structure);
82 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_LOW;
83 tmr_oc_init_structure.oc_idle_state = FALSE;
84 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
85 tmr_oc_init_structure.oc_output_state = TRUE;
86 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
87 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_1, ccr1_val);
88
89 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_2, &tmr_oc_init_structure);
90 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_2, ccr2_val);
91
92 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_3, &tmr_oc_init_structure);
93 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_3, ccr3_val);
94
95 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_4, &tmr_oc_init_structure);
96 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_4, ccr4_val);
97
98 tmr_period_buffer_enable(TMR2, TRUE);
99
100 /* tmr2 int enable */
101 tmr_interrupt_enable(TMR2, TMR_C1_INT | TMR_C2_INT | TMR_C3_INT | TMR_C4_INT, TRUE);
102
103 /* set pc.06, pc.07, pc.08 and pc.09 pins */
104 gpio_bits_set(GPIOC, GPIO_PINS_6 | GPIO_PINS_7 | GPIO_PINS_8 | GPIO_PINS_9);
105
106 /* tmr2 enable counter */
107 tmr_counter_enable(TMR2, TRUE);
108
109 while(1)
110 {
111
112 }
113}
114
120void gpio_configuration(void)
121{
122 gpio_init_type gpio_init_struct;
123
124 /* gpioc configuration: pin6, 7, 8 and 9 as output push-pull */
125 gpio_default_para_init(&gpio_init_struct);
126 gpio_init_struct.gpio_pins = GPIO_PINS_6 | GPIO_PINS_7 | GPIO_PINS_8 | GPIO_PINS_9;
127 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
128 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
129 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
130 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
131
132 gpio_init(GPIOC, &gpio_init_struct);
133}
134
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
ccr1_val
uint16_t ccr1_val
Definition: project/at_start_f437/examples/tmr/oc_low/src/main.c:40
prescalervalue
uint16_t prescalervalue
Definition: project/at_start_f437/examples/tmr/oc_low/src/main.c:44
ccr2_val
uint16_t ccr2_val
Definition: project/at_start_f437/examples/tmr/oc_low/src/main.c:41
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f437/examples/tmr/oc_low/src/main.c:38
ccr4_val
uint16_t ccr4_val
Definition: project/at_start_f437/examples/tmr/oc_low/src/main.c:43
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/oc_low/src/main.c:39
ccr3_val
uint16_t ccr3_val
Definition: project/at_start_f437/examples/tmr/oc_low/src/main.c:42
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
CRM_APB1_DIV_16
@ CRM_APB1_DIV_16
Definition: at32f435_437_crm.h:591
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_period_buffer_enable
void tmr_period_buffer_enable(tmr_type *tmr_x, confirm_state new_state)
set tmr period buffer
Definition: at32f435_437_tmr.c:638
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_LOW
@ TMR_OUTPUT_CONTROL_LOW
Definition: at32f435_437_tmr.h:176
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR_C3_INT
#define TMR_C3_INT
Definition: at32f435_437_tmr.h:78
TMR_C4_INT
#define TMR_C4_INT
Definition: at32f435_437_tmr.h:79
TMR_C1_INT
#define TMR_C1_INT
Definition: at32f435_437_tmr.h:76
TMR_C2_INT
#define TMR_C2_INT
Definition: at32f435_437_tmr.h:77
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
TMR2_GLOBAL_IRQn
@ TMR2_GLOBAL_IRQn
Definition: at32f435_437.h:176
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • oc_toggle_tmr3
  • inc
project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • oc_toggle_tmr3
  • inc
project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • oc_toggle_tmr3
  • inc
project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • oc_toggle_tmr3
  • src
Functions
project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • oc_toggle_tmr3
  • src
project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • oc_toggle_tmr3
  • src
Functions | Variables
project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR3_GLOBAL_IRQHandler (void)
this function handles tmr3 global interrupt request. More...

Variables

uint32_t | capture = 0
__IO uint16_t | ccr1_val
__IO uint16_t | ccr2_val
__IO uint16_t | ccr3_val
__IO uint16_t | ccr4_val

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • oc_toggle_tmr3
  • src
project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38uint32_t capture = 0;
39extern __IO uint16_t ccr1_val;
40extern __IO uint16_t ccr2_val;
41extern __IO uint16_t ccr3_val;
42extern __IO uint16_t ccr4_val;
43
49void NMI_Handler(void)
50{
51}
52
58void HardFault_Handler(void)
59{
60 /* go to infinite loop when hard fault exception occurs */
61 while(1)
62 {
63 }
64}
65
71void MemManage_Handler(void)
72{
73 /* go to infinite loop when memory manage exception occurs */
74 while(1)
75 {
76 }
77}
78
84void BusFault_Handler(void)
85{
86 /* go to infinite loop when bus fault exception occurs */
87 while(1)
88 {
89 }
90}
91
97void UsageFault_Handler(void)
98{
99 /* go to infinite loop when usage fault exception occurs */
100 while(1)
101 {
102 }
103}
104
110void SVC_Handler(void)
111{
112}
113
119void DebugMon_Handler(void)
120{
121}
122
128void PendSV_Handler(void)
129{
130}
131
137void SysTick_Handler(void)
138{
139}
140
146void TMR3_GLOBAL_IRQHandler(void)
147{
148 /* TMR3_CH1 toggling with frequency = 183.1 Hz */
149 if (tmr_flag_get(TMR3, TMR_C1_FLAG) != RESET)
150 {
151 tmr_flag_clear(TMR3, TMR_C1_FLAG );
152 capture = tmr_channel_value_get(TMR3, TMR_SELECT_CHANNEL_1);
153 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_1, capture + ccr1_val);
154 }
155
156 /* TMR3_CH2 toggling with frequency = 366.2 Hz */
157 if (tmr_flag_get(TMR3, TMR_C2_FLAG) != RESET)
158 {
159 tmr_flag_clear(TMR3, TMR_C2_FLAG);
160 capture = tmr_channel_value_get(TMR3, TMR_SELECT_CHANNEL_2);
161 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_2, capture + ccr2_val);
162 }
163
164 /* TMR3_CH3 toggling with frequency = 732.4 Hz */
165 if (tmr_flag_get(TMR3, TMR_C3_FLAG) != RESET)
166 {
167 tmr_flag_clear(TMR3, TMR_C3_FLAG);
168 capture = tmr_channel_value_get(TMR3, TMR_SELECT_CHANNEL_3);
169 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_3, capture + ccr3_val);
170 }
171
172 /* TMR3_CH4 toggling with frequency = 1464.8 Hz */
173 if (tmr_flag_get(TMR3, TMR_C4_FLAG) != RESET)
174 {
175 tmr_flag_clear(TMR3, TMR_C4_FLAG);
176 capture = tmr_channel_value_get(TMR3, TMR_SELECT_CHANNEL_4);
177 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_4, capture + ccr4_val);
178 }
179}
180
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
TMR3_GLOBAL_IRQHandler
void TMR3_GLOBAL_IRQHandler(void)
this function handles tmr3 trigger exception.
Definition: project/at_start_f435/examples/tmr/input_capture/src/main.c:132
ccr2_val
__IO uint16_t ccr2_val
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:42
ccr3_val
__IO uint16_t ccr3_val
Definition: project/at_start_f435/examples/tmr/oc_high/src/main.c:42
ccr1_val
__IO uint16_t ccr1_val
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:41
ccr4_val
__IO uint16_t ccr4_val
Definition: project/at_start_f435/examples/tmr/oc_high/src/main.c:43
capture
uint32_t capture
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_int.c:38
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_channel_value_get
uint32_t tmr_channel_value_get(tmr_type *tmr_x, tmr_channel_select_type tmr_channel)
get tmr channel value
Definition: at32f435_437_tmr.c:593
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_C1_FLAG
#define TMR_C1_FLAG
Definition: at32f435_437_tmr.h:53
TMR_C2_FLAG
#define TMR_C2_FLAG
Definition: at32f435_437_tmr.h:54
TMR_C3_FLAG
#define TMR_C3_FLAG
Definition: at32f435_437_tmr.h:55
TMR_C4_FLAG
#define TMR_C4_FLAG
Definition: at32f435_437_tmr.h:56
TMR3
#define TMR3
Definition: at32f435_437_tmr.h:897
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • oc_toggle_tmr3
  • src
Functions | Variables
project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | crm_configuration (void)
configures the different peripheral clocks. More...
void | gpio_configuration (void)
configure the tmr3 pins. More...
void | nvic_configuration (void)
configures sdio1 irq channel. More...
int | main (void)
main function. More...

Variables

tmr_output_config_type tmr_oc_init_structure
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
__IO uint16_t | ccr1_val = 32768
__IO uint16_t | ccr2_val = 16384
__IO uint16_t | ccr3_val = 8192
__IO uint16_t | ccr4_val = 4096
uint16_t | prescalervalue = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • oc_toggle_tmr3
  • src
project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_output_config_type tmr_oc_init_structure;
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40__IO uint16_t ccr1_val = 32768;
41__IO uint16_t ccr2_val = 16384;
42__IO uint16_t ccr3_val = 8192;
43__IO uint16_t ccr4_val = 4096;
44uint16_t prescalervalue = 0;
45
46void crm_configuration(void);
47void gpio_configuration(void);
48void nvic_configuration(void);
49
55int main(void)
56{
57 system_clock_config();
58
59 /* system peripheral configuration */
60 crm_configuration();
61
62 /* get system clock */
63 crm_clocks_freq_get(&crm_clocks_freq_struct);
64
65 /* nvic configuration */
66 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
67 nvic_irq_enable(TMR3_GLOBAL_IRQn, 1, 0);
68
69 /* gpio configuration */
70 gpio_configuration();
71
72 /* ---------------------------------------------------------------------------
73 tmr3 configuration: output compare toggle mode:
74 tmr3clk = apb1_freq * 2,
75 the objective is to get tmr3 counter clock at 24 mhz:
76 - prescaler = (tmr3clk / tmr3 counter clock) - 1
77 cc1 update rate = tmr3 counter clock / ccr1_val / 2 = 366.2 hz
78 cc2 update rate = tmr3 counter clock / ccr2_val / 2 = 732.4 hz
79 cc3 update rate = tmr3 counter clock / ccr3_val / 2 = 1464.8 hz
80 cc4 update rate = tmr3 counter clock / ccr4_val / 2 = 2929.6 hz
81 ----------------------------------------------------------------------------*/
82 /* compute the prescaler value */
83 prescalervalue = (uint16_t) ((crm_clocks_freq_struct.apb1_freq * 2) / 24000000) - 1;
84
85 /* tmre base configuration */
86 tmr_base_init(TMR3, 65535, prescalervalue);
87 tmr_cnt_dir_set(TMR3, TMR_COUNT_UP);
88 tmr_clock_source_div_set(TMR3, TMR_CLOCK_DIV1);
89
90 /* output compare toggle mode configuration: channel1 */
91 tmr_output_default_para_init(&tmr_oc_init_structure);
92 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_SWITCH;
93 tmr_oc_init_structure.oc_idle_state = FALSE;
94 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;
95 tmr_oc_init_structure.oc_output_state = TRUE;
96 tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
97 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_1, ccr1_val);
98
99 /* output compare toggle mode configuration: channel2 */
100 tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_2, &tmr_oc_init_structure);
101 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_2, ccr2_val);
102
103 /* output compare toggle mode configuration: channel3 */
104 tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_3, &tmr_oc_init_structure);
105 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_3, ccr3_val);
106
107 /* output compare toggle mode configuration: channel4 */
108 tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_4, &tmr_oc_init_structure);
109 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_4, ccr4_val);
110
111 /* tmr enable counter */
112 tmr_counter_enable(TMR3, TRUE);
113
114 /* tmr it enable */
115 tmr_interrupt_enable(TMR3, TMR_C1_INT | TMR_C2_INT | TMR_C3_INT | TMR_C4_INT, TRUE);
116
117 while(1)
118 {}
119}
120
126void gpio_configuration(void)
127{
128 gpio_init_type gpio_init_struct;
129
130 /* gpioa configuration:tmr3 channel1, 2, 3 and 4 as alternate function push-pull */
131 gpio_default_para_init(&gpio_init_struct);
132 gpio_init_struct.gpio_pins = GPIO_PINS_6 | GPIO_PINS_7;
133 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
134 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
135 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
136 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
137
138 gpio_init(GPIOA, &gpio_init_struct);
139
140 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1;
141 gpio_init(GPIOB, &gpio_init_struct);
142
143 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_2);
144 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_2);
145 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE0, GPIO_MUX_2);
146 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE1, GPIO_MUX_2);
147}
148
154void crm_configuration(void)
155{
156 /* tmr3 clock enable */
157 crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
158
159 /* gpioa clock enable */
160 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
161 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
162}
163
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
crm_configuration
void crm_configuration(void)
configures the different system clocks.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:138
nvic_configuration
static void nvic_configuration(void)
configures sdio1 irq channel.
Definition: project/at_start_f435/examples/sdio/sd_mmc_card/src/main.c:247
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
ccr2_val
__IO uint16_t ccr2_val
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c:41
ccr3_val
__IO uint16_t ccr3_val
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c:42
ccr1_val
__IO uint16_t ccr1_val
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c:40
prescalervalue
uint16_t prescalervalue
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c:44
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c:39
ccr4_val
__IO uint16_t ccr4_val
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c:43
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR3_PERIPH_CLOCK
@ CRM_TMR3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:129
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_2
@ GPIO_MUX_2
Definition: at32f435_437_gpio.h:158
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_SWITCH
@ TMR_OUTPUT_CONTROL_SWITCH
Definition: at32f435_437_tmr.h:177
TMR_OUTPUT_ACTIVE_LOW
@ TMR_OUTPUT_ACTIVE_LOW
Definition: at32f435_437_tmr.h:199
TMR_C3_INT
#define TMR_C3_INT
Definition: at32f435_437_tmr.h:78
TMR_C4_INT
#define TMR_C4_INT
Definition: at32f435_437_tmr.h:79
TMR_C1_INT
#define TMR_C1_INT
Definition: at32f435_437_tmr.h:76
TMR_C2_INT
#define TMR_C2_INT
Definition: at32f435_437_tmr.h:77
TMR3
#define TMR3
Definition: at32f435_437_tmr.h:897
TMR3_GLOBAL_IRQn
@ TMR3_GLOBAL_IRQn
Definition: at32f435_437.h:177
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • oc_toggle_tmr9
  • inc
project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • oc_toggle_tmr9
  • inc
project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • oc_toggle_tmr9
  • inc
project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • oc_toggle_tmr9
  • src
Functions
project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • oc_toggle_tmr9
  • src
project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • oc_toggle_tmr9
  • src
Functions | Variables
project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR1_BRK_TMR9_IRQHandler (void)
this function handles TMR9 global interrupt request. More...

Variables

uint16_t | capture = 0
__IO uint16_t | ccr1_val
__IO uint16_t | ccr2_val

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • oc_toggle_tmr9
  • src
project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38uint16_t capture = 0;
39extern __IO uint16_t ccr1_val;
40extern __IO uint16_t ccr2_val;
41
47void NMI_Handler(void)
48{
49}
50
56void HardFault_Handler(void)
57{
58 /* go to infinite loop when hard fault exception occurs */
59 while(1)
60 {
61 }
62}
63
69void MemManage_Handler(void)
70{
71 /* go to infinite loop when memory manage exception occurs */
72 while(1)
73 {
74 }
75}
76
82void BusFault_Handler(void)
83{
84 /* go to infinite loop when bus fault exception occurs */
85 while(1)
86 {
87 }
88}
89
95void UsageFault_Handler(void)
96{
97 /* go to infinite loop when usage fault exception occurs */
98 while(1)
99 {
100 }
101}
102
108void SVC_Handler(void)
109{
110}
111
117void DebugMon_Handler(void)
118{
119}
120
126void PendSV_Handler(void)
127{
128}
129
135void SysTick_Handler(void)
136{
137}
138
144void TMR1_BRK_TMR9_IRQHandler(void)
145{
146 /* TMR9_CH1 toggling with frequency = 366.2 Hz */
147 if (tmr_flag_get(TMR9, TMR_C1_FLAG) != RESET)
148 {
149 tmr_flag_clear(TMR9, TMR_C1_FLAG );
150 capture = tmr_channel_value_get(TMR9, TMR_SELECT_CHANNEL_1);
151 tmr_channel_value_set(TMR9, TMR_SELECT_CHANNEL_1, capture + ccr1_val);
152 }
153
154 /* TMR9_CH2 toggling with frequency = 732.4 Hz */
155 if (tmr_flag_get(TMR9, TMR_C2_FLAG) != RESET)
156 {
157 tmr_flag_clear(TMR9, TMR_C2_FLAG);
158 capture = tmr_channel_value_get(TMR9, TMR_SELECT_CHANNEL_2);
159 tmr_channel_value_set(TMR9, TMR_SELECT_CHANNEL_2, capture + ccr2_val);
160 }
161}
162
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
ccr2_val
__IO uint16_t ccr2_val
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:42
ccr1_val
__IO uint16_t ccr1_val
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:41
TMR1_BRK_TMR9_IRQHandler
void TMR1_BRK_TMR9_IRQHandler(void)
this function handles TMR9 global interrupt request.
Definition: project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c:144
capture
uint16_t capture
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c:38
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_channel_value_get
uint32_t tmr_channel_value_get(tmr_type *tmr_x, tmr_channel_select_type tmr_channel)
get tmr channel value
Definition: at32f435_437_tmr.c:593
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_C1_FLAG
#define TMR_C1_FLAG
Definition: at32f435_437_tmr.h:53
TMR_C2_FLAG
#define TMR_C2_FLAG
Definition: at32f435_437_tmr.h:54
TMR9
#define TMR9
Definition: at32f435_437_tmr.h:903
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • oc_toggle_tmr9
  • src
Functions | Variables
project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | crm_configuration (void)
configures the different peripheral clocks. More...
void | gpio_configuration (void)
configure the tmr9 pins. More...
void | nvic_configuration (void)
int | main (void)
main function. More...

Variables

tmr_output_config_type tmr_oc_init_structure
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
__IO uint16_t | ccr1_val = 32768
__IO uint16_t | ccr2_val = 16384
uint16_t | prescalervalue = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • oc_toggle_tmr9
  • src
project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_output_config_type tmr_oc_init_structure;
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40__IO uint16_t ccr1_val = 32768;
41__IO uint16_t ccr2_val = 16384;
42uint16_t prescalervalue = 0;
43
44void crm_configuration(void);
45void gpio_configuration(void);
46void nvic_configuration(void);
47
53int main(void)
54{
55 system_clock_config();
56
57 /* system peripheral configuration */
58 crm_configuration();
59
60 /* get system clock */
61 crm_clocks_freq_get(&crm_clocks_freq_struct);
62
63 /* nvic configuration */
64 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
65 nvic_irq_enable(TMR1_BRK_TMR9_IRQn, 1, 0);
66
67 /* gpio configuration */
68 gpio_configuration();
69
70 /* ---------------------------------------------------------------------------
71 tmr9 configuration: output compare toggle mode:
72 tmr9clk = system_core_clock (240mhz),
73 the objective is to get tmr9 counter clock at 24 mhz:
74 - prescalervalue = (tmr9clk / tmr9 counter clock) - 1
75 cc1 update rate = tmr9 counter clock / ccr1val / 2 = 366.2 hz
76 cc2 update rate = tmr9 counter clock / ccr2val / 2 = 732.4 hz
77 ----------------------------------------------------------------------------*/
78 /* compute the prescaler value */
79 prescalervalue = (uint16_t) ((crm_clocks_freq_struct.apb1_freq * 2) / 24000000) - 1;
80
81 /* tmr base configuration */
82 tmr_base_init(TMR9, 65535, prescalervalue);
83 tmr_cnt_dir_set(TMR9, TMR_COUNT_UP);
84 tmr_clock_source_div_set(TMR9, TMR_CLOCK_DIV1);
85
86 /* output compare toggle mode configuration: channel1 */
87 tmr_output_default_para_init(&tmr_oc_init_structure);
88 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_SWITCH;
89 tmr_oc_init_structure.oc_idle_state = FALSE;
90 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;
91 tmr_oc_init_structure.oc_output_state = TRUE;
92 tmr_output_channel_config(TMR9, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
93 tmr_channel_value_set(TMR9, TMR_SELECT_CHANNEL_1, ccr1_val);
94
95 /* output toggle mode configuration: channel2 */
96 tmr_output_channel_config(TMR9, TMR_SELECT_CHANNEL_2, &tmr_oc_init_structure);
97 tmr_channel_value_set(TMR9, TMR_SELECT_CHANNEL_2, ccr2_val);
98
99 /* tmr enable counter */
100 tmr_counter_enable(TMR9, TRUE);
101
102 /* tmr interrupt enable */
103 tmr_interrupt_enable(TMR9, TMR_C1_INT | TMR_C2_INT | TMR_C3_INT | TMR_C4_INT, TRUE);
104
105 while(1)
106 {}
107}
108
114void gpio_configuration(void)
115{
116 gpio_init_type gpio_init_struct;
117
118 /* gpioa configuration:tmr9 channel1 and 2 as alternate function push-pull */
119 gpio_default_para_init(&gpio_init_struct);
120 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
121 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
122 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
123 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
124 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
125
126 gpio_init(GPIOA, &gpio_init_struct);
127 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_3);
128 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_3);
129}
130
136void crm_configuration(void)
137{
138 /* tmr9 clock enable */
139 crm_periph_clock_enable(CRM_TMR9_PERIPH_CLOCK, TRUE);
140
141 /* gpioa clock enable */
142 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
143}
144
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
crm_configuration
void crm_configuration(void)
configures the different system clocks.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:138
nvic_configuration
static void nvic_configuration(void)
configures sdio1 irq channel.
Definition: project/at_start_f435/examples/sdio/sd_mmc_card/src/main.c:247
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
ccr2_val
__IO uint16_t ccr2_val
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/main.c:41
ccr1_val
__IO uint16_t ccr1_val
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/main.c:40
prescalervalue
uint16_t prescalervalue
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/main.c:42
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/main.c:39
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR9_PERIPH_CLOCK
@ CRM_TMR9_PERIPH_CLOCK
Definition: at32f435_437_crm.h:164
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_3
@ GPIO_MUX_3
Definition: at32f435_437_gpio.h:159
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_SWITCH
@ TMR_OUTPUT_CONTROL_SWITCH
Definition: at32f435_437_tmr.h:177
TMR_OUTPUT_ACTIVE_LOW
@ TMR_OUTPUT_ACTIVE_LOW
Definition: at32f435_437_tmr.h:199
TMR_C3_INT
#define TMR_C3_INT
Definition: at32f435_437_tmr.h:78
TMR_C4_INT
#define TMR_C4_INT
Definition: at32f435_437_tmr.h:79
TMR_C1_INT
#define TMR_C1_INT
Definition: at32f435_437_tmr.h:76
TMR_C2_INT
#define TMR_C2_INT
Definition: at32f435_437_tmr.h:77
TMR9
#define TMR9
Definition: at32f435_437_tmr.h:903
TMR1_BRK_TMR9_IRQn
@ TMR1_BRK_TMR9_IRQn
Definition: at32f435_437.h:172
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • one_cycle
  • inc
project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • one_cycle
  • inc
project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • one_cycle
  • inc
project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • one_cycle
  • src
Functions
project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • one_cycle
  • src
project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • one_cycle
  • src
Functions
project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • one_cycle
  • src
project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • one_cycle
  • src
Functions | Variables
project/at_start_f437/examples/tmr/one_cycle/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | crm_configuration (void)
configures the different peripheral clocks. More...
void | gpio_configuration (void)
configure the tmr3 pins. More...
int | main (void)
main function. More...

Variables

tmr_output_config_type tmr_oc_init_structure
tmr_input_config_type tmr_ic_init_structure
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | prescalervalue = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/one_cycle/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • one_cycle
  • src
project/at_start_f437/examples/tmr/one_cycle/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_output_config_type tmr_oc_init_structure;
39 tmr_input_config_type tmr_ic_init_structure;
40 crm_clocks_freq_type crm_clocks_freq_struct = {0};
41uint16_t prescalervalue = 0;
42
43void crm_configuration(void);
44void gpio_configuration(void);
45
51int main(void)
52{
53 system_clock_config();
54
55 /* system peripheral configuration */
56 crm_configuration();
57
58 /* get system clock */
59 crm_clocks_freq_get(&crm_clocks_freq_struct);
60
61 /* gpio configuration */
62 gpio_configuration();
63
64 /* compute the prescaler value */
65 prescalervalue = (uint16_t) ((crm_clocks_freq_struct.apb1_freq * 2) / 24000000) - 1;
66
67 /* tmr base configuration */
68 tmr_base_init(TMR4, 65535, prescalervalue);
69 tmr_cnt_dir_set(TMR4, TMR_COUNT_UP);
70 tmr_clock_source_div_set(TMR4, TMR_CLOCK_DIV1);
71
72 /* output compare toggle mode configuration: channel1 */
73 tmr_output_default_para_init(&tmr_oc_init_structure);
74 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
75 tmr_oc_init_structure.oc_idle_state = FALSE;
76 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
77 tmr_oc_init_structure.oc_output_state = TRUE;
78 tmr_output_channel_config(TMR4, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
79 tmr_channel_value_set(TMR4, TMR_SELECT_CHANNEL_1, 16383);
80
81 tmr_input_default_para_init(&tmr_ic_init_structure);
82 tmr_ic_init_structure.input_filter_value = 0;
83 tmr_ic_init_structure.input_channel_select = TMR_SELECT_CHANNEL_2;
84 tmr_ic_init_structure.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
85 tmr_ic_init_structure.input_polarity_select = TMR_INPUT_RISING_EDGE;
86 tmr_input_channel_init(TMR4, &tmr_ic_init_structure, TMR_CHANNEL_INPUT_DIV_1);
87
88 /* one cycle mode selection */
89 tmr_one_cycle_mode_enable(TMR4, TRUE);
90
91 /* input trigger selection */
92 tmr_trigger_input_select(TMR4, TMR_SUB_INPUT_SEL_C2DF2);
93
94 /* slave mode selection: trigger mode */
95 tmr_sub_mode_select(TMR4, TMR_SUB_TRIGGER_MODE);
96
97 while(1)
98 {}
99}
100
106void gpio_configuration(void)
107{
108 gpio_init_type gpio_init_struct;
109
110 gpio_default_para_init(&gpio_init_struct);
111 /* tmr4_ch2 pin (pb.07) configuration */
112 gpio_init_struct.gpio_pins = GPIO_PINS_7;
113 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
114 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
115 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
116 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
117 gpio_init(GPIOB, &gpio_init_struct);
118
119 /* tmr4_ch1 pin (pb.06) configuration */
120 gpio_init_struct.gpio_pins = GPIO_PINS_6;
121 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
122 gpio_init(GPIOB, &gpio_init_struct);
123
124 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE6, GPIO_MUX_2);
125 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE7, GPIO_MUX_2);
126}
127
133void crm_configuration(void)
134{
135 /* tmr3 clock enable */
136 crm_periph_clock_enable(CRM_TMR4_PERIPH_CLOCK, TRUE);
137
138 /* gpioa clock enable */
139 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
140}
141
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
crm_configuration
void crm_configuration(void)
configures the different system clocks.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:138
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
prescalervalue
uint16_t prescalervalue
Definition: project/at_start_f437/examples/tmr/one_cycle/src/main.c:41
tmr_ic_init_structure
tmr_input_config_type tmr_ic_init_structure
Definition: project/at_start_f437/examples/tmr/one_cycle/src/main.c:39
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f437/examples/tmr/one_cycle/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/one_cycle/src/main.c:40
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR4_PERIPH_CLOCK
@ CRM_TMR4_PERIPH_CLOCK
Definition: at32f435_437_crm.h:130
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_2
@ GPIO_MUX_2
Definition: at32f435_437_gpio.h:158
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_input_channel_init
void tmr_input_channel_init(tmr_type *tmr_x, tmr_input_config_type *input_struct, tmr_channel_input_divider_type divider_factor)
init tmr input channel
Definition: at32f435_437_tmr.c:872
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_sub_mode_select
void tmr_sub_mode_select(tmr_type *tmr_x, tmr_sub_mode_select_type sub_mode)
select tmr subordinate mode
Definition: at32f435_437_tmr.c:1245
tmr_input_default_para_init
void tmr_input_default_para_init(tmr_input_config_type *tmr_input_struct)
init tmr input default para
Definition: at32f435_437_tmr.c:169
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_trigger_input_select
void tmr_trigger_input_select(tmr_type *tmr_x, sub_tmr_input_sel_type trigger_select)
select tmr sub-trigger
Definition: at32f435_437_tmr.c:1322
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_one_cycle_mode_enable
void tmr_one_cycle_mode_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr one cycle mode
Definition: at32f435_437_tmr.c:805
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_INPUT_RISING_EDGE
@ TMR_INPUT_RISING_EDGE
Definition: at32f435_437_tmr.h:207
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_CC_CHANNEL_MAPPED_DIRECT
@ TMR_CC_CHANNEL_MAPPED_DIRECT
Definition: at32f435_437_tmr.h:241
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_PWM_MODE_B
@ TMR_OUTPUT_CONTROL_PWM_MODE_B
Definition: at32f435_437_tmr.h:181
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR_SUB_INPUT_SEL_C2DF2
@ TMR_SUB_INPUT_SEL_C2DF2
Definition: at32f435_437_tmr.h:140
TMR_SUB_TRIGGER_MODE
@ TMR_SUB_TRIGGER_MODE
Definition: at32f435_437_tmr.h:155
TMR_CHANNEL_INPUT_DIV_1
@ TMR_CHANNEL_INPUT_DIV_1
Definition: at32f435_437_tmr.h:251
TMR4
#define TMR4
Definition: at32f435_437_tmr.h:898
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_input_config_type
tmr input capture config type
Definition: at32f435_437_tmr.h:425
tmr_input_config_type::input_mapped_select
tmr_input_direction_mapped_type input_mapped_select
Definition: at32f435_437_tmr.h:428
tmr_input_config_type::input_filter_value
uint8_t input_filter_value
Definition: at32f435_437_tmr.h:429
tmr_input_config_type::input_polarity_select
tmr_input_polarity_type input_polarity_select
Definition: at32f435_437_tmr.h:427
tmr_input_config_type::input_channel_select
tmr_channel_select_type input_channel_select
Definition: at32f435_437_tmr.h:426
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • parallel_synchro
  • inc
project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • parallel_synchro
  • inc
project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • parallel_synchro
  • inc
project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • parallel_synchro
  • src
Functions
project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • parallel_synchro
  • src
project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • parallel_synchro
  • src
Functions
project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • parallel_synchro
  • src
project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • parallel_synchro
  • src
Functions | Variables
project/at_start_f437/examples/tmr/parallel_synchro/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | crm_configuration (void)
configures the different peripheral clocks. More...
void | gpio_configuration (void)
configure the tmr3 pins. More...
int | main (void)
main function. More...

Variables

tmr_output_config_type tmr_oc_init_structure
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | timerperiod = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/parallel_synchro/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • parallel_synchro
  • src
project/at_start_f437/examples/tmr/parallel_synchro/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_output_config_type tmr_oc_init_structure;
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40uint16_t timerperiod = 0;
41
42void crm_configuration(void);
43void gpio_configuration(void);
44
50int main(void)
51{
52 system_clock_config();
53
54 /* system peripheral configuration */
55 crm_configuration();
56
57 /* get system clock */
58 crm_clocks_freq_get(&crm_clocks_freq_struct);
59
60 /* gpio configuration */
61 gpio_configuration();
62
63 /* tmr base configuration */
64 timerperiod = ((crm_clocks_freq_struct.apb1_freq * 2) / 750000 ) - 1;
65 tmr_base_init(TMR2, timerperiod, 0);
66 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
67 tmr_clock_source_div_set(TMR2, TMR_CLOCK_DIV1);
68 tmr_base_init(TMR3, 9, 0);
69 tmr_cnt_dir_set(TMR3, TMR_COUNT_UP);
70 tmr_clock_source_div_set(TMR3, TMR_CLOCK_DIV1);
71 tmr_base_init(TMR4, 4, 0);
72 tmr_cnt_dir_set(TMR4, TMR_COUNT_UP);
73 tmr_clock_source_div_set(TMR4, TMR_CLOCK_DIV1);
74
75 /* output compare toggle mode configuration: channel1 */
76 tmr_output_default_para_init(&tmr_oc_init_structure);
77 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
78 tmr_oc_init_structure.oc_idle_state = FALSE;
79 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
80 tmr_oc_init_structure.oc_output_state = TRUE;
81 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
82 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_1, timerperiod/5);
83
84 tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
85 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_1, 3);
86
87 tmr_output_channel_config(TMR4, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
88 tmr_channel_value_set(TMR4, TMR_SELECT_CHANNEL_1, 3);
89
90 /* primary mode selection: TMR2 */
91 tmr_sub_sync_mode_set(TMR2, TRUE);
92 tmr_primary_mode_select(TMR2, TMR_PRIMARY_SEL_OVERFLOW);
93
94 /* subordinate mode selection: TMR3 */
95 tmr_sub_mode_select(TMR3, TMR_SUB_HANG_MODE);
96 tmr_trigger_input_select(TMR3, TMR_SUB_INPUT_SEL_IS1);
97 /* subordinate mode selection: TMR4 */
98 tmr_sub_mode_select(TMR4, TMR_SUB_HANG_MODE);
99 tmr_trigger_input_select(TMR4, TMR_SUB_INPUT_SEL_IS1);
100
101 /* tmr enable counter */
102 tmr_counter_enable(TMR2, TRUE);
103 tmr_counter_enable(TMR3, TRUE);
104 tmr_counter_enable(TMR4, TRUE);
105
106 while(1)
107 {}
108}
109
115void gpio_configuration(void)
116{
117 gpio_init_type gpio_init_struct;
118
119 gpio_default_para_init(&gpio_init_struct);
120
121 gpio_init_struct.gpio_pins = GPIO_PINS_6 | GPIO_PINS_0;
122 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
123 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
124 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
125 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
126 gpio_init(GPIOA, &gpio_init_struct);
127
128 gpio_init_struct.gpio_pins = GPIO_PINS_6;
129 gpio_init(GPIOB, &gpio_init_struct);
130
131 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_1);
132 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_2);
133 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE6, GPIO_MUX_2);
134}
135
141void crm_configuration(void)
142{
143 /* tmr3 clock enable */
144 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
145 crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
146 crm_periph_clock_enable(CRM_TMR4_PERIPH_CLOCK, TRUE);
147
148 /* gpios clock enable */
149 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
150 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
151 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
152}
153
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
crm_configuration
void crm_configuration(void)
configures the different system clocks.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:138
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
timerperiod
uint16_t timerperiod
Definition: project/at_start_f437/examples/tmr/parallel_synchro/src/main.c:40
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f437/examples/tmr/parallel_synchro/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/parallel_synchro/src/main.c:39
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
CRM_TMR4_PERIPH_CLOCK
@ CRM_TMR4_PERIPH_CLOCK
Definition: at32f435_437_crm.h:130
CRM_TMR3_PERIPH_CLOCK
@ CRM_TMR3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:129
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_2
@ GPIO_MUX_2
Definition: at32f435_437_gpio.h:158
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_sub_mode_select
void tmr_sub_mode_select(tmr_type *tmr_x, tmr_sub_mode_select_type sub_mode)
select tmr subordinate mode
Definition: at32f435_437_tmr.c:1245
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_sub_sync_mode_set
void tmr_sub_sync_mode_set(tmr_type *tmr_x, confirm_state new_state)
set tmr subordinate synchronization mode
Definition: at32f435_437_tmr.c:1335
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_trigger_input_select
void tmr_trigger_input_select(tmr_type *tmr_x, sub_tmr_input_sel_type trigger_select)
select tmr sub-trigger
Definition: at32f435_437_tmr.c:1322
tmr_primary_mode_select
void tmr_primary_mode_select(tmr_type *tmr_x, tmr_primary_select_type primary_mode)
select tmr primary mode
Definition: at32f435_437_tmr.c:1222
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR_SUB_INPUT_SEL_IS1
@ TMR_SUB_INPUT_SEL_IS1
Definition: at32f435_437_tmr.h:135
TMR_SUB_HANG_MODE
@ TMR_SUB_HANG_MODE
Definition: at32f435_437_tmr.h:154
TMR_PRIMARY_SEL_OVERFLOW
@ TMR_PRIMARY_SEL_OVERFLOW
Definition: at32f435_437_tmr.h:121
TMR3
#define TMR3
Definition: at32f435_437_tmr.h:897
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
TMR4
#define TMR4
Definition: at32f435_437_tmr.h:898
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • pwm_input
  • inc
project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • pwm_input
  • inc
project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • pwm_input
  • inc
project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • pwm_input
  • src
Functions
project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • pwm_input
  • src
project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • pwm_input
  • src
Functions | Variables
project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR3_GLOBAL_IRQHandler (void)
this function handles tmr3 global interrupt request. More...

Variables

__IO uint16_t | ic2value = 0
uint16_t | dutycycle
uint32_t | frequency

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • pwm_input
  • src
project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38__IO uint16_t ic2value = 0;
39extern uint16_t dutycycle;
40extern uint32_t frequency;
41
47void NMI_Handler(void)
48{
49}
50
56void HardFault_Handler(void)
57{
58 /* go to infinite loop when hard fault exception occurs */
59 while(1)
60 {
61 }
62}
63
69void MemManage_Handler(void)
70{
71 /* go to infinite loop when memory manage exception occurs */
72 while(1)
73 {
74 }
75}
76
82void BusFault_Handler(void)
83{
84 /* go to infinite loop when bus fault exception occurs */
85 while(1)
86 {
87 }
88}
89
95void UsageFault_Handler(void)
96{
97 /* go to infinite loop when usage fault exception occurs */
98 while(1)
99 {
100 }
101}
102
108void SVC_Handler(void)
109{
110}
111
117void DebugMon_Handler(void)
118{
119}
120
126void PendSV_Handler(void)
127{
128}
129
135void SysTick_Handler(void)
136{
137}
138
144void TMR3_GLOBAL_IRQHandler(void)
145{
146 /* clear tmr3 channel interrupt pending bit */
147 tmr_flag_clear(TMR3, TMR_C2_FLAG);
148
149 /* get the input channel data value */
150 ic2value = tmr_channel_value_get(TMR3, TMR_SELECT_CHANNEL_2);
151
152 if (ic2value != 0)
153 {
154 /* duty cycle computation */
155 dutycycle = (tmr_channel_value_get(TMR3, TMR_SELECT_CHANNEL_1) * 100) / ic2value;
156
157 /* frequency computation */
158 frequency = system_core_clock / ic2value;
159 }
160 else
161 {
162 dutycycle = 0;
163 frequency = 0;
164 }
165}
166
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
TMR3_GLOBAL_IRQHandler
void TMR3_GLOBAL_IRQHandler(void)
this function handles tmr3 trigger exception.
Definition: project/at_start_f435/examples/tmr/input_capture/src/main.c:132
dutycycle
uint16_t dutycycle
Definition: project/at_start_f435/examples/tmr/pwm_input/src/main.c:40
ic2value
__IO uint16_t ic2value
Definition: project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_int.c:38
frequency
uint32_t frequency
Definition: project/at_start_f435/examples/tmr/pwm_input/src/main.c:41
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
tmr_channel_value_get
uint32_t tmr_channel_value_get(tmr_type *tmr_x, tmr_channel_select_type tmr_channel)
get tmr channel value
Definition: at32f435_437_tmr.c:593
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_C2_FLAG
#define TMR_C2_FLAG
Definition: at32f435_437_tmr.h:54
TMR3
#define TMR3
Definition: at32f435_437_tmr.h:897
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • pwm_input
  • src
Functions | Variables
project/at_start_f437/examples/tmr/pwm_input/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | crm_configuration (void)
configures the different peripheral clocks. More...
void | gpio_configuration (void)
Configure the TMR3 Pins. More...
int | main (void)
main function. More...

Variables

tmr_input_config_type tmr_ic_init_structure
__IO uint16_t | dutycycle = 0
__IO uint32_t | frequency = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_input/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • pwm_input
  • src
project/at_start_f437/examples/tmr/pwm_input/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_input_config_type tmr_ic_init_structure;
39
40__IO uint16_t dutycycle = 0;
41__IO uint32_t frequency = 0;
42
43void crm_configuration(void);
44void gpio_configuration(void);
45
51int main(void)
52{
53 system_clock_config();
54
55 /* system peripheral configuration */
56 crm_configuration();
57
58 /* nvic configuration */
59 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
60 nvic_irq_enable(TMR3_GLOBAL_IRQn, 1, 0);
61
62 /* gpio configuration */
63 gpio_configuration();
64
65 uart_print_init(115200);
66
67 tmr_input_default_para_init(&tmr_ic_init_structure);
68 tmr_ic_init_structure.input_filter_value = 0;
69 tmr_ic_init_structure.input_channel_select = TMR_SELECT_CHANNEL_2;
70 tmr_ic_init_structure.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
71 tmr_ic_init_structure.input_polarity_select = TMR_INPUT_RISING_EDGE;
72
73 tmr_pwm_input_config(TMR3, &tmr_ic_init_structure, TMR_CHANNEL_INPUT_DIV_1);
74
75 /* select the tmr3 input trigger: C2IF2 */
76 tmr_trigger_input_select(TMR3, TMR_SUB_INPUT_SEL_C2DF2);
77
78 /* select the sub mode: reset mode */
79 tmr_sub_mode_select(TMR3, TMR_SUB_RESET_MODE);
80
81 /* enable the sub sync mode */
82 tmr_sub_sync_mode_set(TMR3, TRUE);
83
84 /* tmr enable counter */
85 tmr_counter_enable(TMR3, TRUE);
86
87 /* enable the c2 interrupt request */
88 tmr_interrupt_enable(TMR3, TMR_C2_INT, TRUE);
89
90 while(1)
91 {
92 printf("Frequency = %dHZ,Dutycycle = %d%%\r\n", frequency, dutycycle);
93 }
94}
95
101void gpio_configuration(void)
102{
103 gpio_init_type gpio_init_struct;
104
105 gpio_default_para_init(&gpio_init_struct);
106
107 gpio_init_struct.gpio_pins = GPIO_PINS_7;
108 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
109 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
110 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
111 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
112 gpio_init(GPIOA, &gpio_init_struct);
113
114 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_2);
115}
116
122void crm_configuration(void)
123{
124 /* tmr3 clock enable */
125 crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
126
127 /* gpioa clock enable */
128 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
129}
130
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
crm_configuration
void crm_configuration(void)
configures the different system clocks.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:138
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
tmr_ic_init_structure
tmr_input_config_type tmr_ic_init_structure
Definition: project/at_start_f437/examples/tmr/pwm_input/src/main.c:38
frequency
__IO uint32_t frequency
Definition: project/at_start_f437/examples/tmr/pwm_input/src/main.c:41
dutycycle
__IO uint16_t dutycycle
Definition: project/at_start_f437/examples/tmr/pwm_input/src/main.c:40
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR3_PERIPH_CLOCK
@ CRM_TMR3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:129
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_2
@ GPIO_MUX_2
Definition: at32f435_437_gpio.h:158
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_sub_mode_select
void tmr_sub_mode_select(tmr_type *tmr_x, tmr_sub_mode_select_type sub_mode)
select tmr subordinate mode
Definition: at32f435_437_tmr.c:1245
tmr_input_default_para_init
void tmr_input_default_para_init(tmr_input_config_type *tmr_input_struct)
init tmr input default para
Definition: at32f435_437_tmr.c:169
tmr_sub_sync_mode_set
void tmr_sub_sync_mode_set(tmr_type *tmr_x, confirm_state new_state)
set tmr subordinate synchronization mode
Definition: at32f435_437_tmr.c:1335
tmr_pwm_input_config
void tmr_pwm_input_config(tmr_type *tmr_x, tmr_input_config_type *input_struct, tmr_channel_input_divider_type divider_factor)
config tmr pwm input
Definition: at32f435_437_tmr.c:1042
tmr_trigger_input_select
void tmr_trigger_input_select(tmr_type *tmr_x, sub_tmr_input_sel_type trigger_select)
select tmr sub-trigger
Definition: at32f435_437_tmr.c:1322
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
TMR_INPUT_RISING_EDGE
@ TMR_INPUT_RISING_EDGE
Definition: at32f435_437_tmr.h:207
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_CC_CHANNEL_MAPPED_DIRECT
@ TMR_CC_CHANNEL_MAPPED_DIRECT
Definition: at32f435_437_tmr.h:241
TMR_SUB_INPUT_SEL_C2DF2
@ TMR_SUB_INPUT_SEL_C2DF2
Definition: at32f435_437_tmr.h:140
TMR_SUB_RESET_MODE
@ TMR_SUB_RESET_MODE
Definition: at32f435_437_tmr.h:153
TMR_CHANNEL_INPUT_DIV_1
@ TMR_CHANNEL_INPUT_DIV_1
Definition: at32f435_437_tmr.h:251
TMR_C2_INT
#define TMR_C2_INT
Definition: at32f435_437_tmr.h:77
TMR3
#define TMR3
Definition: at32f435_437_tmr.h:897
TMR3_GLOBAL_IRQn
@ TMR3_GLOBAL_IRQn
Definition: at32f435_437.h:177
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_input_config_type
tmr input capture config type
Definition: at32f435_437_tmr.h:425
tmr_input_config_type::input_mapped_select
tmr_input_direction_mapped_type input_mapped_select
Definition: at32f435_437_tmr.h:428
tmr_input_config_type::input_filter_value
uint8_t input_filter_value
Definition: at32f435_437_tmr.h:429
tmr_input_config_type::input_polarity_select
tmr_input_polarity_type input_polarity_select
Definition: at32f435_437_tmr.h:427
tmr_input_config_type::input_channel_select
tmr_channel_select_type input_channel_select
Definition: at32f435_437_tmr.h:426
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • pwm_input_dma
  • inc
project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • pwm_input_dma
  • inc
project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • pwm_input_dma
  • inc
project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • pwm_input_dma
  • src
Functions
project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • pwm_input_dma
  • src
project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • pwm_input_dma
  • src
Functions
project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • pwm_input_dma
  • src
project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • pwm_input_dma
  • src
Macros | Functions | Variables
project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | tmr1_c1dt_address 0x40010034
#define | tmr1_c2dt_address 0x40010038
#define | SAMPLING_NUM 1000

Functions

void | crm_configuration (void)
configures the different peripheral clocks. More...
void | gpio_configuration (void)
configure the tmr1 pins. More...
int | main (void)
main function. More...
void | DMA1_Channel2_IRQHandler (void)

Variables

tmr_input_config_type tmr_ic_init_structure
dma_init_type dma_init_structure
__IO uint16_t | buffer_cc1 [1000]
__IO uint16_t | buffer_cc2 [1000]
__IO uint16_t | ic1value = 0
__IO uint32_t | frequency = 0
__IO float | dutycycle = 0
uint32_t | freq_result
float | duty_result

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • pwm_input_dma
  • src
project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define tmr1_c1dt_address 0x40010034
39#define tmr1_c2dt_address 0x40010038
40
41#define SAMPLING_NUM 1000
42
43 tmr_input_config_type tmr_ic_init_structure;
44 dma_init_type dma_init_structure;
45
46__IO uint16_t buffer_cc1[1000];
47__IO uint16_t buffer_cc2[1000];
48
49__IO uint16_t ic1value = 0;
50__IO uint32_t frequency = 0;
51__IO float dutycycle = 0;
52
53uint32_t freq_result;
54float duty_result;
55
56void crm_configuration(void);
57void gpio_configuration(void);
58
64int main(void)
65{
66 system_clock_config();
67
68 /* system peripheral configuration */
69 crm_configuration();
70
71 /* nvic configuration */
72 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
73 nvic_irq_enable(DMA1_Channel2_IRQn, 1, 0);
74
75 /* gpio configuration */
76 gpio_configuration();
77
78 uart_print_init(115200);
79
80 dma_reset(DMA1_CHANNEL2);
81 dma_default_para_init(&dma_init_structure);
82 dma_init_structure.peripheral_base_addr = (uint32_t)tmr1_c1dt_address;
83 dma_init_structure.memory_base_addr = (uint32_t)buffer_cc1;
84 dma_init_structure.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
85 dma_init_structure.buffer_size = SAMPLING_NUM;
86 dma_init_structure.peripheral_inc_enable = FALSE;
87 dma_init_structure.memory_inc_enable = TRUE;
88 dma_init_structure.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
89 dma_init_structure.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
90 dma_init_structure.loop_mode_enable = TRUE;
91 dma_init_structure.priority = DMA_PRIORITY_HIGH;
92 dma_init(DMA1_CHANNEL2, &dma_init_structure);
93
94 dma_reset(DMA1_CHANNEL3);
95 dma_init_structure.peripheral_base_addr = (uint32_t)tmr1_c2dt_address;
96 dma_init_structure.memory_base_addr = (uint32_t)buffer_cc2;
97 dma_init(DMA1_CHANNEL3, &dma_init_structure);
98
99 dma_interrupt_enable(DMA1_CHANNEL2, DMA_FDT_INT, TRUE);
100
101 dmamux_enable(DMA1, TRUE);
102 dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_TMR1_CH1);
103 dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_TMR1_CH2);
104
105 dma_channel_enable(DMA1_CHANNEL2, TRUE);
106 dma_channel_enable(DMA1_CHANNEL3, TRUE);
107
108 tmr_input_default_para_init(&tmr_ic_init_structure);
109 tmr_ic_init_structure.input_filter_value = 0;
110 tmr_ic_init_structure.input_channel_select = TMR_SELECT_CHANNEL_1;
111 tmr_ic_init_structure.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
112 tmr_ic_init_structure.input_polarity_select = TMR_INPUT_RISING_EDGE;
113
114 tmr_pwm_input_config(TMR1, &tmr_ic_init_structure, TMR_CHANNEL_INPUT_DIV_1);
115
116 /* select the TMR1 input trigger: C2IF2 */
117 tmr_trigger_input_select(TMR1, TMR_SUB_INPUT_SEL_C1DF1);
118
119 /* select the sub mode: reset mode */
120 tmr_sub_mode_select(TMR1, TMR_SUB_RESET_MODE);
121
122 /* enable the sub sync mode */
123 tmr_sub_sync_mode_set(TMR1, TRUE);
124
125 /* enable the c1/c2 dma */
126 tmr_dma_request_enable(TMR1, TMR_C1_DMA_REQUEST, TRUE);
127 tmr_dma_request_enable(TMR1, TMR_C2_DMA_REQUEST, TRUE);
128
129 /* tmr enable counter */
130 tmr_counter_enable(TMR1, TRUE);
131 printf("\r\nFreq=%dHZ, Duty=%.2f%%\r\n", frequency, dutycycle);
132
133 while(1)
134 {
135 }
136}
137
138void DMA1_Channel2_IRQHandler(void)
139{
140 uint16_t i;
141
142 dma_flag_clear(DMA1_FDT2_FLAG);
143
144 duty_result = 0;
145 freq_result = 0.0;
146
147 for(i = 0; i < SAMPLING_NUM; i++)
148 {
149 duty_result += ((buffer_cc2[i] * 100.0) / buffer_cc1[i]);
150 freq_result += (system_core_clock / buffer_cc1[i]);
151 }
152
153 dutycycle = duty_result / SAMPLING_NUM;
154 frequency = freq_result / SAMPLING_NUM;
155 printf("\r\nFreq=%dHZ, Duty=%.2f%%\r\n", frequency, dutycycle);
156}
157
163void gpio_configuration(void)
164{
165 gpio_init_type gpio_init_struct;
166
167 gpio_default_para_init(&gpio_init_struct);
168
169 gpio_init_struct.gpio_pins = GPIO_PINS_8;
170 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
171 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
172 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
173 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
174 gpio_init(GPIOA, &gpio_init_struct);
175
176 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_1);
177}
178
184void crm_configuration(void)
185{
186 /* tmr1 clock enable */
187 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
188
189 /* gpioa clock enable */
190 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
191
192 /* dma clock enable */
193 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
194}
195
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
DMA1_Channel2_IRQHandler
void DMA1_Channel2_IRQHandler(void)
this function handles dma interrupt request.
Definition: project/at_start_f435/examples/i2c/communication_dma/src/at32f435_437_int.c:149
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
crm_configuration
void crm_configuration(void)
configures the different system clocks.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:138
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
dma_init_structure
dma_init_type dma_init_structure
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c:44
tmr1_c2dt_address
#define tmr1_c2dt_address
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c:39
freq_result
uint32_t freq_result
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c:53
duty_result
float duty_result
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c:54
ic1value
__IO uint16_t ic1value
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c:49
tmr1_c1dt_address
#define tmr1_c1dt_address
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c:38
dutycycle
__IO float dutycycle
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c:51
buffer_cc1
__IO uint16_t buffer_cc1[1000]
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c:46
SAMPLING_NUM
#define SAMPLING_NUM
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c:41
tmr_ic_init_structure
tmr_input_config_type tmr_ic_init_structure
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c:43
frequency
__IO uint32_t frequency
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c:50
buffer_cc2
__IO uint16_t buffer_cc2[1000]
Definition: project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c:47
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
@ DMA_PERIPHERAL_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:163
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_HALFWORD
@ DMA_MEMORY_DATA_WIDTH_HALFWORD
Definition: at32f435_437_dma.h:173
DMA_PRIORITY_HIGH
@ DMA_PRIORITY_HIGH
Definition: at32f435_437_dma.h:184
DMAMUX_DMAREQ_ID_TMR1_CH2
@ DMAMUX_DMAREQ_ID_TMR1_CH2
Definition: at32f435_437_dma.h:243
DMAMUX_DMAREQ_ID_TMR1_CH1
@ DMAMUX_DMAREQ_ID_TMR1_CH1
Definition: at32f435_437_dma.h:242
DMA1_FDT2_FLAG
#define DMA1_FDT2_FLAG
Definition: at32f435_437_dma.h:70
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1MUX_CHANNEL2
#define DMA1MUX_CHANNEL2
Definition: at32f435_437_dma.h:705
DMA1MUX_CHANNEL3
#define DMA1MUX_CHANNEL3
Definition: at32f435_437_dma.h:706
DMA1_CHANNEL3
#define DMA1_CHANNEL3
Definition: at32f435_437_dma.h:698
DMA1_CHANNEL2
#define DMA1_CHANNEL2
Definition: at32f435_437_dma.h:697
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_dma_request_enable
void tmr_dma_request_enable(tmr_type *tmr_x, tmr_dma_request_type dma_request, confirm_state new_state)
enable or disable tmr dma request
Definition: at32f435_437_tmr.c:1358
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_sub_mode_select
void tmr_sub_mode_select(tmr_type *tmr_x, tmr_sub_mode_select_type sub_mode)
select tmr subordinate mode
Definition: at32f435_437_tmr.c:1245
tmr_input_default_para_init
void tmr_input_default_para_init(tmr_input_config_type *tmr_input_struct)
init tmr input default para
Definition: at32f435_437_tmr.c:169
tmr_sub_sync_mode_set
void tmr_sub_sync_mode_set(tmr_type *tmr_x, confirm_state new_state)
set tmr subordinate synchronization mode
Definition: at32f435_437_tmr.c:1335
tmr_pwm_input_config
void tmr_pwm_input_config(tmr_type *tmr_x, tmr_input_config_type *input_struct, tmr_channel_input_divider_type divider_factor)
config tmr pwm input
Definition: at32f435_437_tmr.c:1042
tmr_trigger_input_select
void tmr_trigger_input_select(tmr_type *tmr_x, sub_tmr_input_sel_type trigger_select)
select tmr sub-trigger
Definition: at32f435_437_tmr.c:1322
TMR_C1_DMA_REQUEST
@ TMR_C1_DMA_REQUEST
Definition: at32f435_437_tmr.h:272
TMR_C2_DMA_REQUEST
@ TMR_C2_DMA_REQUEST
Definition: at32f435_437_tmr.h:273
TMR_INPUT_RISING_EDGE
@ TMR_INPUT_RISING_EDGE
Definition: at32f435_437_tmr.h:207
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_CC_CHANNEL_MAPPED_DIRECT
@ TMR_CC_CHANNEL_MAPPED_DIRECT
Definition: at32f435_437_tmr.h:241
TMR_SUB_INPUT_SEL_C1DF1
@ TMR_SUB_INPUT_SEL_C1DF1
Definition: at32f435_437_tmr.h:139
TMR_SUB_RESET_MODE
@ TMR_SUB_RESET_MODE
Definition: at32f435_437_tmr.h:153
TMR_CHANNEL_INPUT_DIV_1
@ TMR_CHANNEL_INPUT_DIV_1
Definition: at32f435_437_tmr.h:251
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
DMA1_Channel2_IRQn
@ DMA1_Channel2_IRQn
Definition: at32f435_437.h:205
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_input_config_type
tmr input capture config type
Definition: at32f435_437_tmr.h:425
tmr_input_config_type::input_mapped_select
tmr_input_direction_mapped_type input_mapped_select
Definition: at32f435_437_tmr.h:428
tmr_input_config_type::input_filter_value
uint8_t input_filter_value
Definition: at32f435_437_tmr.h:429
tmr_input_config_type::input_polarity_select
tmr_input_polarity_type input_polarity_select
Definition: at32f435_437_tmr.h:427
tmr_input_config_type::input_channel_select
tmr_channel_select_type input_channel_select
Definition: at32f435_437_tmr.h:426
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • pwm_output_simulate
  • inc
project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • pwm_output_simulate
  • inc
project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • pwm_output_simulate
  • inc
project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • pwm_output_simulate
  • src
Functions
project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • pwm_output_simulate
  • src
project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • pwm_output_simulate
  • src
Functions | Variables
project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR2_GLOBAL_IRQHandler (void)

Variables

uint16_t | capture = 0
__IO uint16_t | ccr1_val
__IO uint16_t | ccr2_val
__IO uint16_t | ccr3_val
__IO uint16_t | ccr4_val

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • pwm_output_simulate
  • src
project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38uint16_t capture = 0;
39extern __IO uint16_t ccr1_val;
40extern __IO uint16_t ccr2_val;
41extern __IO uint16_t ccr3_val;
42extern __IO uint16_t ccr4_val;
43
49void NMI_Handler(void)
50{
51}
52
58void HardFault_Handler(void)
59{
60 /* go to infinite loop when hard fault exception occurs */
61 while(1)
62 {
63 }
64}
65
71void MemManage_Handler(void)
72{
73 /* go to infinite loop when memory manage exception occurs */
74 while(1)
75 {
76 }
77}
78
84void BusFault_Handler(void)
85{
86 /* go to infinite loop when bus fault exception occurs */
87 while(1)
88 {
89 }
90}
91
97void UsageFault_Handler(void)
98{
99 /* go to infinite loop when usage fault exception occurs */
100 while(1)
101 {
102 }
103}
104
110void SVC_Handler(void)
111{
112}
113
119void DebugMon_Handler(void)
120{
121}
122
128void PendSV_Handler(void)
129{
130}
131
137void SysTick_Handler(void)
138{
139}
140
141void TMR2_GLOBAL_IRQHandler(void)
142{
143 if (tmr_flag_get(TMR2, TMR_C1_FLAG) != RESET)
144 {
145 tmr_flag_clear(TMR2, TMR_C1_FLAG );
146
147 /* Pin PC.06 toggling with frequency = 73.24 Hz */
148 GPIOC->odt ^= GPIO_PINS_6;
149 capture = tmr_channel_value_get(TMR2, TMR_SELECT_CHANNEL_1);
150 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_1, capture + ccr1_val);
151 }
152 else if (tmr_flag_get(TMR2, TMR_C2_FLAG) != RESET)
153 {
154 tmr_flag_clear(TMR2, TMR_C2_FLAG);
155
156 /* Pin PC.06 toggling with frequency = 73.24 Hz */
157 GPIOC->odt ^= GPIO_PINS_7;
158 capture = tmr_channel_value_get(TMR2, TMR_SELECT_CHANNEL_2);
159 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_2, capture + ccr2_val);
160 }
161 else if (tmr_flag_get(TMR2, TMR_C3_FLAG) != RESET)
162 {
163 tmr_flag_clear(TMR2, TMR_C3_FLAG);
164
165 /* Pin PC.06 toggling with frequency = 73.24 Hz */
166 GPIOC->odt ^= GPIO_PINS_8;
167 capture = tmr_channel_value_get(TMR2, TMR_SELECT_CHANNEL_3);
168 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_3, capture + ccr3_val);
169 }
170 else
171 {
172 tmr_flag_clear(TMR2, TMR_C4_FLAG);
173
174 /* Pin PC.06 toggling with frequency = 73.24 Hz */
175 GPIOC->odt ^= GPIO_PINS_9;
176 capture = tmr_channel_value_get(TMR2, TMR_SELECT_CHANNEL_4);
177 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_4, capture + ccr4_val);
178 }
179}
180
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
TMR2_GLOBAL_IRQHandler
void TMR2_GLOBAL_IRQHandler(void)
This function handles the power voltage monitoring output interrupt request.
Definition: project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_int.c:141
ccr2_val
__IO uint16_t ccr2_val
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:42
ccr3_val
__IO uint16_t ccr3_val
Definition: project/at_start_f435/examples/tmr/oc_high/src/main.c:42
ccr1_val
__IO uint16_t ccr1_val
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:41
ccr4_val
__IO uint16_t ccr4_val
Definition: project/at_start_f435/examples/tmr/oc_high/src/main.c:43
capture
uint16_t capture
Definition: project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_int.c:38
RESET
@ RESET
Definition: at32f435_437.h:378
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
tmr_channel_value_get
uint32_t tmr_channel_value_get(tmr_type *tmr_x, tmr_channel_select_type tmr_channel)
get tmr channel value
Definition: at32f435_437_tmr.c:593
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_C1_FLAG
#define TMR_C1_FLAG
Definition: at32f435_437_tmr.h:53
TMR_C2_FLAG
#define TMR_C2_FLAG
Definition: at32f435_437_tmr.h:54
TMR_C3_FLAG
#define TMR_C3_FLAG
Definition: at32f435_437_tmr.h:55
TMR_C4_FLAG
#define TMR_C4_FLAG
Definition: at32f435_437_tmr.h:56
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • pwm_output_simulate
  • src
Functions | Variables
project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | crm_configuration (void)
configures the different peripheral clocks. More...
void | gpio_configuration (void)
configure the tmr1 pins. More...
int | main (void)
main function. More...

Variables

tmr_output_config_type tmr_oc_init_structure
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | ccr1_val = 40961
uint16_t | ccr2_val = 27309
uint16_t | ccr3_val = 13654
uint16_t | ccr4_val = 6826
uint16_t | prescalervalue = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • pwm_output_simulate
  • src
project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_output_config_type tmr_oc_init_structure;
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40
41uint16_t ccr1_val = 40961;
42uint16_t ccr2_val = 27309;
43uint16_t ccr3_val = 13654;
44uint16_t ccr4_val = 6826;
45uint16_t prescalervalue = 0;
46
47void crm_configuration(void);
48void gpio_configuration(void);
49
55int main(void)
56{
57 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
58
59 system_clock_config();
60
61 /* system peripheral configuration */
62 crm_configuration();
63
64 /* get system clock */
65 crm_clocks_freq_get(&crm_clocks_freq_struct);
66
67 /* nvic Configuration */
68 nvic_irq_enable(TMR2_GLOBAL_IRQn, 0, 1);
69
70 /* gpio configuration */
71 gpio_configuration();
72
73 /* compute the prescaler value */
74 prescalervalue = (uint16_t) ((crm_clocks_freq_struct.apb1_freq * 2) / 12000000) - 1;
75
76 /* tmr2 time base configuration */
77 tmr_base_init(TMR2, 65535, prescalervalue);
78 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
79 tmr_clock_source_div_set(TMR2, TMR_CLOCK_DIV1);
80
81 tmr_output_default_para_init(&tmr_oc_init_structure);
82 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_OFF;
83 tmr_oc_init_structure.oc_idle_state = FALSE;
84 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
85 tmr_oc_init_structure.oc_output_state = TRUE;
86 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
87 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_1, ccr1_val);
88
89 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_2, &tmr_oc_init_structure);
90 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_2, ccr2_val);
91
92 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_3, &tmr_oc_init_structure);
93 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_3, ccr3_val);
94
95 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_4, &tmr_oc_init_structure);
96 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_4, ccr4_val);
97
98 /* tmr2 int enable */
99 tmr_interrupt_enable(TMR2, TMR_C1_INT | TMR_C2_INT | TMR_C3_INT | TMR_C4_INT, TRUE);
100
101 /* tmr enable counter */
102 tmr_counter_enable(TMR2, TRUE);
103
104 while(1)
105 {
106 }
107}
108
114void gpio_configuration(void)
115{
116 gpio_init_type gpio_init_struct;
117
118 gpio_default_para_init(&gpio_init_struct);
119
120 gpio_init_struct.gpio_pins = GPIO_PINS_6 | GPIO_PINS_7 | GPIO_PINS_8 | GPIO_PINS_9;
121 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
122 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
123 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
124 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
125 gpio_init(GPIOC, &gpio_init_struct);
126}
127
133void crm_configuration(void)
134{
135 /* tmr2 clock enable */
136 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
137
138 /* gpioa gpiob clock enable */
139 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
140}
141
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
crm_configuration
void crm_configuration(void)
configures the different system clocks.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:138
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
ccr1_val
uint16_t ccr1_val
Definition: project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c:41
prescalervalue
uint16_t prescalervalue
Definition: project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c:45
ccr2_val
uint16_t ccr2_val
Definition: project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c:42
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c:38
ccr4_val
uint16_t ccr4_val
Definition: project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c:44
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c:39
ccr3_val
uint16_t ccr3_val
Definition: project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c:43
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_OFF
@ TMR_OUTPUT_CONTROL_OFF
Definition: at32f435_437_tmr.h:174
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR_C3_INT
#define TMR_C3_INT
Definition: at32f435_437_tmr.h:78
TMR_C4_INT
#define TMR_C4_INT
Definition: at32f435_437_tmr.h:79
TMR_C1_INT
#define TMR_C1_INT
Definition: at32f435_437_tmr.h:76
TMR_C2_INT
#define TMR_C2_INT
Definition: at32f435_437_tmr.h:77
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
TMR2_GLOBAL_IRQn
@ TMR2_GLOBAL_IRQn
Definition: at32f435_437.h:176
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • pwm_output_tmr3
  • inc
project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • pwm_output_tmr3
  • inc
project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • pwm_output_tmr3
  • inc
project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • pwm_output_tmr3
  • src
Functions
project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • pwm_output_tmr3
  • src
project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • pwm_output_tmr3
  • src
Functions
project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • pwm_output_tmr3
  • src
project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • pwm_output_tmr3
  • src
Functions | Variables
project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | crm_configuration (void)
configures the different peripheral clocks. More...
void | gpio_configuration (void)
configure the tmr1 pins. More...
int | main (void)
main function. More...

Variables

tmr_output_config_type tmr_oc_init_structure
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | ccr1_val = 333
uint16_t | ccr2_val = 249
uint16_t | ccr3_val = 166
uint16_t | ccr4_val = 83
uint16_t | prescalervalue = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • pwm_output_tmr3
  • src
project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_output_config_type tmr_oc_init_structure;
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40
41uint16_t ccr1_val = 333;
42uint16_t ccr2_val = 249;
43uint16_t ccr3_val = 166;
44uint16_t ccr4_val = 83;
45uint16_t prescalervalue = 0;
46
47void crm_configuration(void);
48void gpio_configuration(void);
49
55int main(void)
56{
57 system_clock_config();
58
59 /* system peripheral configuration */
60 crm_configuration();
61
62 /* get system clock */
63 crm_clocks_freq_get(&crm_clocks_freq_struct);
64
65 /* gpio configuration */
66 gpio_configuration();
67
68 /* compute the prescaler value */
69 prescalervalue = (uint16_t) ((crm_clocks_freq_struct.apb1_freq * 2) / 24000000) - 1;
70
71 /* tmr3 time base configuration */
72 tmr_base_init(TMR3, 665, prescalervalue);
73 tmr_cnt_dir_set(TMR3, TMR_COUNT_UP);
74 tmr_clock_source_div_set(TMR3, TMR_CLOCK_DIV1);
75
76 tmr_output_default_para_init(&tmr_oc_init_structure);
77 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
78 tmr_oc_init_structure.oc_idle_state = FALSE;
79 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
80 tmr_oc_init_structure.oc_output_state = TRUE;
81 tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
82 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_1, ccr1_val);
83 tmr_output_channel_buffer_enable(TMR3, TMR_SELECT_CHANNEL_1, TRUE);
84
85 tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_2, &tmr_oc_init_structure);
86 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_2, ccr2_val);
87 tmr_output_channel_buffer_enable(TMR3, TMR_SELECT_CHANNEL_2, TRUE);
88
89 tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_3, &tmr_oc_init_structure);
90 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_3, ccr3_val);
91 tmr_output_channel_buffer_enable(TMR3, TMR_SELECT_CHANNEL_3, TRUE);
92
93 tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_4, &tmr_oc_init_structure);
94 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_4, ccr4_val);
95 tmr_output_channel_buffer_enable(TMR3, TMR_SELECT_CHANNEL_4, TRUE);
96
97 tmr_period_buffer_enable(TMR3, TRUE);
98
99 /* tmr enable counter */
100 tmr_counter_enable(TMR3, TRUE);
101
102 while(1)
103 {
104 }
105}
106
112void gpio_configuration(void)
113{
114 gpio_init_type gpio_init_struct;
115
116 gpio_default_para_init(&gpio_init_struct);
117
118 gpio_init_struct.gpio_pins = GPIO_PINS_6 | GPIO_PINS_7;
119 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
120 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
121 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
122 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
123 gpio_init(GPIOA, &gpio_init_struct);
124
125 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1;
126 gpio_init(GPIOB, &gpio_init_struct);
127
128 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_2);
129 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_2);
130 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE0, GPIO_MUX_2);
131 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE1, GPIO_MUX_2);
132}
133
139void crm_configuration(void)
140{
141 /* tmr3 clock enable */
142 crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
143
144 /* gpioa gpiob clock enable */
145 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
146 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
147}
148
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
crm_configuration
void crm_configuration(void)
configures the different system clocks.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:138
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
ccr1_val
uint16_t ccr1_val
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c:41
prescalervalue
uint16_t prescalervalue
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c:45
ccr2_val
uint16_t ccr2_val
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c:42
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c:38
ccr4_val
uint16_t ccr4_val
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c:44
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c:39
ccr3_val
uint16_t ccr3_val
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c:43
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR3_PERIPH_CLOCK
@ CRM_TMR3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:129
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_2
@ GPIO_MUX_2
Definition: at32f435_437_gpio.h:158
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_period_buffer_enable
void tmr_period_buffer_enable(tmr_type *tmr_x, confirm_state new_state)
set tmr period buffer
Definition: at32f435_437_tmr.c:638
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_output_channel_buffer_enable
void tmr_output_channel_buffer_enable(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, confirm_state new_state)
set tmr output channel buffer
Definition: at32f435_437_tmr.c:660
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR3
#define TMR3
Definition: at32f435_437_tmr.h:897
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • pwm_output_tmr10
  • inc
project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • pwm_output_tmr10
  • inc
project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • pwm_output_tmr10
  • inc
project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • pwm_output_tmr10
  • src
Functions
project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • pwm_output_tmr10
  • src
project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • pwm_output_tmr10
  • src
Functions
project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • pwm_output_tmr10
  • src
project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • pwm_output_tmr10
  • src
Functions | Variables
project/at_start_f437/examples/tmr/pwm_output_tmr10/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | crm_configuration (void)
configures the different peripheral clocks. More...
void | gpio_configuration (void)
configure the tmr1 pins. More...
int | main (void)
main function. More...

Variables

tmr_output_config_type tmr_oc_init_structure
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | ccr1_val = 249
uint16_t | prescalervalue = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/pwm_output_tmr10/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • pwm_output_tmr10
  • src
project/at_start_f437/examples/tmr/pwm_output_tmr10/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_output_config_type tmr_oc_init_structure;
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40
41uint16_t ccr1_val = 249;
42uint16_t prescalervalue = 0;
43
44void crm_configuration(void);
45void gpio_configuration(void);
46
52int main(void)
53{
54 system_clock_config();
55
56 /* system peripheral configuration */
57 crm_configuration();
58
59 /* get system clock */
60 crm_clocks_freq_get(&crm_clocks_freq_struct);
61
62 /* gpio configuration */
63 gpio_configuration();
64
65 /* compute the prescaler value */
66 prescalervalue = (uint16_t) ((crm_clocks_freq_struct.apb2_freq * 2) / 24000000) - 1;
67
68 /* tmr10 time base configuration */
69 tmr_base_init(TMR10, 665, prescalervalue);
70 tmr_cnt_dir_set(TMR10, TMR_COUNT_UP);
71 tmr_clock_source_div_set(TMR10, TMR_CLOCK_DIV1);
72
73 tmr_output_default_para_init(&tmr_oc_init_structure);
74 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
75 tmr_oc_init_structure.oc_idle_state = FALSE;
76 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
77 tmr_oc_init_structure.oc_output_state = TRUE;
78 tmr_output_channel_config(TMR10, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
79 tmr_channel_value_set(TMR10, TMR_SELECT_CHANNEL_1, ccr1_val);
80 tmr_output_channel_buffer_enable(TMR10, TMR_SELECT_CHANNEL_1, TRUE);
81
82 tmr_period_buffer_enable(TMR10, TRUE);
83
84 /* tmr enable counter */
85 tmr_counter_enable(TMR10, TRUE);
86
87 while(1)
88 {
89 }
90}
91
97void gpio_configuration(void)
98{
99 gpio_init_type gpio_init_struct;
100
101 gpio_default_para_init(&gpio_init_struct);
102
103 gpio_init_struct.gpio_pins = GPIO_PINS_8;
104 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
105 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
106 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
107 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
108 gpio_init(GPIOB, &gpio_init_struct);
109
110 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_3);
111}
112
118void crm_configuration(void)
119{
120 /* tmr10 clock enable */
121 crm_periph_clock_enable(CRM_TMR10_PERIPH_CLOCK, TRUE);
122
123 /* gpioa gpiob clock enable */
124 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
125}
126
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
crm_configuration
void crm_configuration(void)
configures the different system clocks.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:138
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
ccr1_val
uint16_t ccr1_val
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr10/src/main.c:41
prescalervalue
uint16_t prescalervalue
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr10/src/main.c:42
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr10/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/pwm_output_tmr10/src/main.c:39
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR10_PERIPH_CLOCK
@ CRM_TMR10_PERIPH_CLOCK
Definition: at32f435_437_crm.h:165
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_3
@ GPIO_MUX_3
Definition: at32f435_437_gpio.h:159
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
tmr_period_buffer_enable
void tmr_period_buffer_enable(tmr_type *tmr_x, confirm_state new_state)
set tmr period buffer
Definition: at32f435_437_tmr.c:638
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_output_channel_buffer_enable
void tmr_output_channel_buffer_enable(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, confirm_state new_state)
set tmr output channel buffer
Definition: at32f435_437_tmr.c:660
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR10
#define TMR10
Definition: at32f435_437_tmr.h:904
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb2_freq
uint32_t apb2_freq
Definition: at32f435_437_crm.h:791
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • timer_base
  • inc
project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • timer_base
  • inc
project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • timer_base
  • inc
project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • timer_base
  • src
Functions
project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • timer_base
  • src
project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • timer_base
  • src
Functions
project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • timer_base
  • src
project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • timer_base
  • src
Functions | Variables
project/at_start_f437/examples/tmr/timer_base/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int | main (void)
main function. More...
void | TMR1_OVF_TMR10_IRQHandler (void)
this function handles timer1 overflow handler. More...

Variables

crm_clocks_freq_type crm_clocks_freq_struct = {0}

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/timer_base/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • timer_base
  • src
project/at_start_f437/examples/tmr/timer_base/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 crm_clocks_freq_type crm_clocks_freq_struct = {0};
39
45int main(void)
46{
47 system_clock_config();
48
49 at32_board_init();
50
51 /* get system clock */
52 crm_clocks_freq_get(&crm_clocks_freq_struct);
53
54 /* turn led2/led3/led4 on */
55 at32_led_on(LED2);
56 at32_led_on(LED3);
57 at32_led_on(LED4);
58
59 /* enable tmr1 clock */
60 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
61
62 /* tmr1 configuration */
63 /* time base configuration */
64 tmr_base_init(TMR1, 9999, (crm_clocks_freq_struct.apb2_freq * 2 / 10000) - 1);
65 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
66
67 /* overflow interrupt enable */
68 tmr_interrupt_enable(TMR1, TMR_OVF_INT, TRUE);
69
70 /* tmr1 hall interrupt nvic init */
71 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
72 nvic_irq_enable(TMR1_OVF_TMR10_IRQn, 1, 0);
73
74 /* enable tmr1 */
75 tmr_counter_enable(TMR1, TRUE);
76
77 while(1)
78 {}
79}
80
86void TMR1_OVF_TMR10_IRQHandler(void)
87{
88 if(tmr_flag_get(TMR1, TMR_OVF_FLAG) == SET)
89 {
90 /* add user code... */
91 at32_led_toggle(LED3);
92 tmr_flag_clear(TMR1, TMR_OVF_FLAG);
93 }
94}
95
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
TMR1_OVF_TMR10_IRQHandler
void TMR1_OVF_TMR10_IRQHandler(void)
this function handles tmr1 overflow handler.
Definition: project/at_start_f435/examples/debug/tmr1/src/main.c:46
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/timer_base/src/main.c:38
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
TMR1_OVF_TMR10_IRQn
@ TMR1_OVF_TMR10_IRQn
Definition: at32f435_437.h:173
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb2_freq
uint32_t apb2_freq
Definition: at32f435_437_crm.h:791
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • tmr1_synchro
  • inc
project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • tmr1_synchro
  • inc
project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • tmr1_synchro
  • inc
project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • tmr1_synchro
  • src
Functions
project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • tmr1_synchro
  • src
project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • tmr1_synchro
  • src
Functions
project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • tmr1_synchro
  • src
project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • tmr1_synchro
  • src
Functions | Variables
project/at_start_f437/examples/tmr/tmr1_synchro/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | crm_configuration (void)
configures the different peripheral clocks. More...
void | gpio_configuration (void)
configure the tmr1 pins. More...
int | main (void)
main function. More...

Variables

tmr_output_config_type tmr_oc_init_structure
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | timerperiod = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/tmr1_synchro/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • tmr1_synchro
  • src
project/at_start_f437/examples/tmr/tmr1_synchro/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_output_config_type tmr_oc_init_structure;
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40uint16_t timerperiod = 0;
41
42void crm_configuration(void);
43void gpio_configuration(void);
44
50int main(void)
51{
52 system_clock_config();
53
54 /* system peripheral configuration */
55 crm_configuration();
56
57 /* get system clock */
58 crm_clocks_freq_get(&crm_clocks_freq_struct);
59
60 /* gpio configuration */
61 gpio_configuration();
62
63 /* tmr3 time base configuration */
64 tmr_base_init(TMR3, 2, 0);
65 tmr_cnt_dir_set(TMR3, TMR_COUNT_UP);
66 tmr_clock_source_div_set(TMR3, TMR_CLOCK_DIV1);
67
68 tmr_output_default_para_init(&tmr_oc_init_structure);
69 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
70 tmr_oc_init_structure.oc_idle_state = FALSE;
71 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
72 tmr_oc_init_structure.oc_output_state = TRUE;
73 tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
74 tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_1, 1);
75
76 /* input trigger selection */
77 tmr_trigger_input_select(TMR3, TMR_SUB_INPUT_SEL_IS0);
78
79 /* slave mode selection: hang mode */
80 tmr_sub_mode_select(TMR3, TMR_SUB_HANG_MODE);
81
82 /* tmr4 time base configuration */
83 tmr_base_init(TMR4, 1, 0);
84 tmr_cnt_dir_set(TMR4, TMR_COUNT_UP);
85 tmr_clock_source_div_set(TMR4, TMR_CLOCK_DIV1);
86
87 tmr_output_default_para_init(&tmr_oc_init_structure);
88 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
89 tmr_oc_init_structure.oc_idle_state = FALSE;
90 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
91 tmr_oc_init_structure.oc_output_state = TRUE;
92 tmr_output_channel_config(TMR4, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
93 tmr_channel_value_set(TMR4, TMR_SELECT_CHANNEL_1, 1);
94
95 /* input trigger selection */
96 tmr_trigger_input_select(TMR4, TMR_SUB_INPUT_SEL_IS0);
97
98 /* slave mode selection: hang mode */
99 tmr_sub_mode_select(TMR4, TMR_SUB_HANG_MODE);
100
101 /* tmr1 time base configuration */
102 timerperiod = ((crm_clocks_freq_struct.apb1_freq * 2) / 750000) - 1;
103 tmr_base_init(TMR1, timerperiod, 0);
104 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
105 tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
106 tmr_repetition_counter_set(TMR1, 4);
107
108 tmr_output_default_para_init(&tmr_oc_init_structure);
109 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
110 tmr_oc_init_structure.oc_idle_state = TRUE;
111 tmr_oc_init_structure.occ_idle_state = FALSE;
112 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;
113 tmr_oc_init_structure.occ_polarity = TMR_OUTPUT_ACTIVE_LOW;
114 tmr_oc_init_structure.oc_output_state = TRUE;
115 tmr_oc_init_structure.occ_output_state = TRUE;
116 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
117 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, timerperiod/2);
118
119 tmr_primary_mode_select(TMR1, TMR_PRIMARY_SEL_OVERFLOW);
120 tmr_sub_sync_mode_set(TMR1, TRUE);
121
122 tmr_output_enable(TMR1, TRUE);
123
124 /* tmr enable counter */
125 tmr_counter_enable(TMR1, TRUE);
126 tmr_counter_enable(TMR3, TRUE);
127 tmr_counter_enable(TMR4, TRUE);
128
129 while(1)
130 {
131 }
132}
133
139void gpio_configuration(void)
140{
141 gpio_init_type gpio_init_struct;
142
143 gpio_default_para_init(&gpio_init_struct);
144
145 gpio_init_struct.gpio_pins = GPIO_PINS_6 | GPIO_PINS_8;
146 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
147 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
148 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
149 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
150 gpio_init(GPIOA, &gpio_init_struct);
151
152 gpio_init_struct.gpio_pins = GPIO_PINS_6;
153 gpio_init(GPIOB, &gpio_init_struct);
154
155 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_2);
156 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_1);
157 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE6, GPIO_MUX_2);
158}
159
165void crm_configuration(void)
166{
167 /* tmr clock enable */
168 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
169 crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
170 crm_periph_clock_enable(CRM_TMR4_PERIPH_CLOCK, TRUE);
171
172 /* gpio clock enable */
173 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
174 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
175}
176
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
crm_configuration
void crm_configuration(void)
configures the different system clocks.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:138
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
timerperiod
uint16_t timerperiod
Definition: project/at_start_f437/examples/tmr/tmr1_synchro/src/main.c:40
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f437/examples/tmr/tmr1_synchro/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/tmr1_synchro/src/main.c:39
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR4_PERIPH_CLOCK
@ CRM_TMR4_PERIPH_CLOCK
Definition: at32f435_437_crm.h:130
CRM_TMR3_PERIPH_CLOCK
@ CRM_TMR3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:129
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_2
@ GPIO_MUX_2
Definition: at32f435_437_gpio.h:158
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_repetition_counter_set
void tmr_repetition_counter_set(tmr_type *tmr_x, uint8_t tmr_rpr_value)
set the repetition counter register(rpr) value
Definition: at32f435_437_tmr.c:265
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_sub_mode_select
void tmr_sub_mode_select(tmr_type *tmr_x, tmr_sub_mode_select_type sub_mode)
select tmr subordinate mode
Definition: at32f435_437_tmr.c:1245
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_output_enable
void tmr_output_enable(tmr_type *tmr_x, confirm_state new_state)
tmr output enable(oen),this function is important for advtm output enable
Definition: at32f435_437_tmr.c:1499
tmr_sub_sync_mode_set
void tmr_sub_sync_mode_set(tmr_type *tmr_x, confirm_state new_state)
set tmr subordinate synchronization mode
Definition: at32f435_437_tmr.c:1335
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_trigger_input_select
void tmr_trigger_input_select(tmr_type *tmr_x, sub_tmr_input_sel_type trigger_select)
select tmr sub-trigger
Definition: at32f435_437_tmr.c:1322
tmr_primary_mode_select
void tmr_primary_mode_select(tmr_type *tmr_x, tmr_primary_select_type primary_mode)
select tmr primary mode
Definition: at32f435_437_tmr.c:1222
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_PWM_MODE_B
@ TMR_OUTPUT_CONTROL_PWM_MODE_B
Definition: at32f435_437_tmr.h:181
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR_OUTPUT_ACTIVE_LOW
@ TMR_OUTPUT_ACTIVE_LOW
Definition: at32f435_437_tmr.h:199
TMR_SUB_INPUT_SEL_IS0
@ TMR_SUB_INPUT_SEL_IS0
Definition: at32f435_437_tmr.h:134
TMR_SUB_HANG_MODE
@ TMR_SUB_HANG_MODE
Definition: at32f435_437_tmr.h:154
TMR_PRIMARY_SEL_OVERFLOW
@ TMR_PRIMARY_SEL_OVERFLOW
Definition: at32f435_437_tmr.h:121
TMR3
#define TMR3
Definition: at32f435_437_tmr.h:897
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
TMR4
#define TMR4
Definition: at32f435_437_tmr.h:898
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::occ_output_state
confirm_state occ_output_state
Definition: at32f435_437_tmr.h:418
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::occ_polarity
tmr_output_polarity_type occ_polarity
Definition: at32f435_437_tmr.h:416
tmr_output_config_type::occ_idle_state
confirm_state occ_idle_state
Definition: at32f435_437_tmr.h:414
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • tmr2_32bit
  • inc
project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • tmr2_32bit
  • inc
project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • tmr2_32bit
  • inc
project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • tmr2_32bit
  • src
Functions
project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • tmr2_32bit
  • src
project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • tmr2_32bit
  • src
Functions
project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • tmr2_32bit
  • src
project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • tmr2_32bit
  • src
Functions | Variables
project/at_start_f437/examples/tmr/tmr2_32bit/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | crm_configuration (void)
configures the different peripheral clocks. More...
void | gpio_configuration (void)
configure the tmr1 pins. More...
int | main (void)
main function. More...

Variables

tmr_output_config_type tmr_oc_init_structure
uint32_t | ccr1_val = 0x7ffff
uint32_t | ccr2_val = 0x3ffff
uint32_t | ccr3_val = 0x1ffff
uint32_t | ccr4_val = 0xffff

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/tmr2_32bit/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • tmr2_32bit
  • src
project/at_start_f437/examples/tmr/tmr2_32bit/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 tmr_output_config_type tmr_oc_init_structure;
39
40uint32_t ccr1_val = 0x7ffff;
41uint32_t ccr2_val = 0x3ffff;
42uint32_t ccr3_val = 0x1ffff;
43uint32_t ccr4_val = 0xffff;
44
45void crm_configuration(void);
46void gpio_configuration(void);
47
53int main(void)
54{
55 system_clock_config();
56
57 /* system peripheral configuration */
58 crm_configuration();
59
60 /* gpio configuration */
61 gpio_configuration();
62
63 tmr_32_bit_function_enable(TMR2, TRUE);
64
65 /* tmr2 time base configuration */
66 tmr_base_init(TMR2, 0xfffff, 0);
67 tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
68 tmr_clock_source_div_set(TMR2, TMR_CLOCK_DIV1);
69
70 tmr_output_default_para_init(&tmr_oc_init_structure);
71 tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
72 tmr_oc_init_structure.oc_idle_state = FALSE;
73 tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
74 tmr_oc_init_structure.oc_output_state = TRUE;
75 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
76 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_1, ccr1_val);
77 tmr_output_channel_buffer_enable(TMR2, TMR_SELECT_CHANNEL_1, TRUE);
78
79 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_2, &tmr_oc_init_structure);
80 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_2, ccr2_val);
81 tmr_output_channel_buffer_enable(TMR2, TMR_SELECT_CHANNEL_2, TRUE);
82
83 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_3, &tmr_oc_init_structure);
84 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_3, ccr3_val);
85 tmr_output_channel_buffer_enable(TMR2, TMR_SELECT_CHANNEL_3, TRUE);
86
87 tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_4, &tmr_oc_init_structure);
88 tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_4, ccr4_val);
89 tmr_output_channel_buffer_enable(TMR2, TMR_SELECT_CHANNEL_4, TRUE);
90
91 tmr_period_buffer_enable(TMR2, TRUE);
92
93 /* tmr2 enable counter */
94 tmr_counter_enable(TMR2, TRUE);
95
96 while(1)
97 {
98 }
99}
100
106void gpio_configuration(void)
107{
108 gpio_init_type gpio_init_struct;
109
110 gpio_default_para_init(&gpio_init_struct);
111
112 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_2 | GPIO_PINS_3;
113 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
114 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
115 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
116 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
117 gpio_init(GPIOA, &gpio_init_struct);
118
119 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_1);
120 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_1);
121 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_1);
122 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_1);
123}
124
130void crm_configuration(void)
131{
132 /* tmr clock enable */
133 crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
134
135 /* gpio clock enable */
136 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
137}
138
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
gpio_configuration
void gpio_configuration(void)
configure the tmr10 pin and irtmr pin.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:118
crm_configuration
void crm_configuration(void)
configures the different system clocks.
Definition: project/at_start_f435/examples/irtmr/irtmr_output/src/main.c:138
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
ccr2_val
uint32_t ccr2_val
Definition: project/at_start_f437/examples/tmr/tmr2_32bit/src/main.c:41
ccr4_val
uint32_t ccr4_val
Definition: project/at_start_f437/examples/tmr/tmr2_32bit/src/main.c:43
tmr_oc_init_structure
tmr_output_config_type tmr_oc_init_structure
Definition: project/at_start_f437/examples/tmr/tmr2_32bit/src/main.c:38
ccr1_val
uint32_t ccr1_val
Definition: project/at_start_f437/examples/tmr/tmr2_32bit/src/main.c:40
ccr3_val
uint32_t ccr3_val
Definition: project/at_start_f437/examples/tmr/tmr2_32bit/src/main.c:42
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_TMR2_PERIPH_CLOCK
@ CRM_TMR2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:128
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_period_buffer_enable
void tmr_period_buffer_enable(tmr_type *tmr_x, confirm_state new_state)
set tmr period buffer
Definition: at32f435_437_tmr.c:638
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_clock_source_div_set
void tmr_clock_source_div_set(tmr_type *tmr_x, tmr_clock_division_type tmr_clock_div)
set tmr clock source division
Definition: at32f435_437_tmr.c:230
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_32_bit_function_enable
void tmr_32_bit_function_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr 32 bit function(plus mode)
Definition: at32f435_437_tmr.c:819
tmr_output_channel_buffer_enable
void tmr_output_channel_buffer_enable(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, confirm_state new_state)
set tmr output channel buffer
Definition: at32f435_437_tmr.c:660
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_CLOCK_DIV1
@ TMR_CLOCK_DIV1
Definition: at32f435_437_tmr.h:97
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR2
#define TMR2
Definition: at32f435_437_tmr.h:896
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • 6_steps
  • inc
project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • 6_steps
  • inc
project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • 6_steps
  • inc
project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • 6_steps
  • src
Functions
project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • 6_steps
  • src
project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • 6_steps
  • src
Functions
project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • 6_steps
  • src
project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133 /* trigger TMR1 hall event */
134 tmr_event_sw_trigger(TMR1, TMR_HALL_SWTRIG);
135}
136
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
tmr_event_sw_trigger
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event)
generate tmr event
Definition: at32f435_437_tmr.c:1486
TMR_HALL_SWTRIG
@ TMR_HALL_SWTRIG
Definition: at32f435_437_tmr.h:290
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • 6_steps
  • src
Functions | Variables
project/at_start_f437/examples/tmr/6_steps/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | SysTick_Configuration (void)
configures the systick. More...
int | main (void)
main function. More...
void | TMR1_TRG_HALL_TMR11_IRQHandler (void)
this function handles tmr1 trigger and hall interrupts requests. More...

Variables

gpio_init_type | gpio_init_struct = {0}
tmr_output_config_type tmr_output_struct
tmr_brkdt_config_type | tmr_brkdt_config_struct = {0}
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
__IO uint32_t | step = 1

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/6_steps/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • 6_steps
  • src
project/at_start_f437/examples/tmr/6_steps/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 tmr_output_config_type tmr_output_struct;
40 tmr_brkdt_config_type tmr_brkdt_config_struct = {0};
41 crm_clocks_freq_type crm_clocks_freq_struct = {0};
42
43__IO uint32_t step = 1;
44/* systick configuration */
45void SysTick_Configuration(void);
51int main(void)
52{
53 system_clock_config();
54
55 at32_board_init();
56
57 /* get system clock */
58 crm_clocks_freq_get(&crm_clocks_freq_struct);
59
60 SysTick_Configuration();
61
62 /* turn led2/led3/led4 on */
63 at32_led_on(LED2);
64 at32_led_on(LED3);
65 at32_led_on(LED4);
66
67 /* enable tmr1/gpioa/gpiob clock */
68 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
69 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
70 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
71
72 /* timer2 output pin Configuration */
73 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10;
74 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
75 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
76 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
77 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
78 gpio_init(GPIOA, &gpio_init_struct);
79
80 gpio_init_struct.gpio_pins = GPIO_PINS_13 | GPIO_PINS_14 | GPIO_PINS_15;
81 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
82 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
83 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
84 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
85 gpio_init(GPIOB, &gpio_init_struct);
86
87 gpio_init_struct.gpio_pins = GPIO_PINS_12;
88 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
89 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
90 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
91 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
92 gpio_init(GPIOB, &gpio_init_struct);
93
94 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_1);
95 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE9, GPIO_MUX_1);
96 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE10, GPIO_MUX_1);
97 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_1);
98 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE14, GPIO_MUX_1);
99 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE15, GPIO_MUX_1);
100 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_1);
101
102 /*-----------------------------------------------------------------------------
103 the at32f403a tmr1 peripheral offers the possibility to program in advance the
104 configuration for the next tmr1 outputs behaviour (step) and change the configuration
105 of all the channels at the same time. this operation is possible when the hall
106 event is used.
107 the hall event can be generated by software by setting the hall bit in the tmr1_swevt
108 register or by hardware (on trc rising edge).
109 in this example, a software hall event is generated each 100 ms: using the systick
110 interrupt.
111 the tmr1 is configured in timing mode, each time a hall event occurs,
112 a new tmr1 configuration will be set in advance.
113 the following table describes the tmr1 channels states:
114 -----------------------------------------------
115 | step1 | step2 | step3 | step4 | step5 | step6 |
116 ----------------------------------------------------------
117 |channel1 | 1 | 0 | 0 | 0 | 0 | 1 |
118 ----------------------------------------------------------
119 |channel1n | 0 | 0 | 1 | 1 | 0 | 0 |
120 ----------------------------------------------------------
121 |channel2 | 0 | 0 | 0 | 1 | 1 | 0 |
122 ----------------------------------------------------------
123 |channel2n | 1 | 1 | 0 | 0 | 0 | 0 |
124 ----------------------------------------------------------
125 |channel3 | 0 | 1 | 1 | 0 | 0 | 0 |
126 ----------------------------------------------------------
127 |channel3n | 0 | 0 | 0 | 0 | 1 | 1 |
128 ----------------------------------------------------------
129 -----------------------------------------------------------------------------*/
130 /* tmr1 configuration */
131 /* time base configuration */
132
133 tmr_base_init(TMR1, 4095, 0);
134 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
135
136 /* Channel 1, 2 and 3 Configuration in output mode */
137 tmr_output_default_para_init(&tmr_output_struct);
138 tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
139 tmr_output_struct.oc_output_state = TRUE;
140 tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
141 tmr_output_struct.oc_idle_state = TRUE;
142 tmr_output_struct.occ_output_state = TRUE;
143 tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
144 tmr_output_struct.occ_idle_state = TRUE;
145 /* channel 1 */
146 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
147 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 2047);
148 /* channel 2 */
149 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
150 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_2, 1023);
151 /* channel 3 */
152 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
153 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_3, 511);
154
155 /* automatic output enable, break, dead time and lock configuration*/
156 tmr_brkdt_default_para_init(&tmr_brkdt_config_struct);
157 tmr_brkdt_config_struct.brk_enable = TRUE;
158 tmr_brkdt_config_struct.auto_output_enable = TRUE;
159 tmr_brkdt_config_struct.deadtime = 0;
160 tmr_brkdt_config_struct.fcsodis_state = TRUE;
161 tmr_brkdt_config_struct.fcsoen_state = TRUE;
162 tmr_brkdt_config_struct.brk_polarity = TMR_BRK_INPUT_ACTIVE_HIGH;
163 tmr_brkdt_config_struct.wp_level = TMR_WP_OFF;
164 tmr_brkdt_config(TMR1, &tmr_brkdt_config_struct);
165 tmr_channel_buffer_enable(TMR1, TRUE);
166
167 /* hall interrupt enable */
168 tmr_interrupt_enable(TMR1, TMR_HALL_INT, TRUE);
169
170 /* tmr1 hall interrupt nvic init */
171 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
172 nvic_irq_enable(TMR1_TRG_HALL_TMR11_IRQn, 1, 0);
173
174 /* tmr1 output enable */
175 tmr_output_enable(TMR1, TRUE);
176 /* enable tmr1 */
177 tmr_counter_enable(TMR1, TRUE);
178
179 while(1)
180 {}
181}
187void SysTick_Configuration(void)
188{
189 /* setup systick timer for 20 msec interrupts */
190 if (SysTick_Config((crm_clocks_freq_struct.sclk_freq) / 50))
191 {
192 /* capture error */
193 while(1);
194 }
195 NVIC_SetPriority(SysTick_IRQn, 0x0);
196}
197
204void TMR1_TRG_HALL_TMR11_IRQHandler(void)
205{
206 /* clear tmr1 com pending bit */
207 tmr_flag_clear(TMR1, TMR_HALL_FLAG);
208 if(step == 1)
209 {
210 /* next step: step 2 configuration ---------------------------- */
211 /* channel3 configuration */
212 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3, FALSE);
213 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3C, FALSE);
214
215 /* channel1 configuration */
216 tmr_output_channel_mode_select(TMR1, TMR_SELECT_CHANNEL_1, TMR_OUTPUT_CONTROL_PWM_MODE_A);
217 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1, TRUE);
218 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1C, FALSE);
219
220 /* channel2 configuration */
221 tmr_output_channel_mode_select(TMR1, TMR_SELECT_CHANNEL_2, TMR_OUTPUT_CONTROL_PWM_MODE_A);
222 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_2, FALSE);
223 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_2C, TRUE);
224 step++;
225 }
226 else if(step == 2)
227 {
228 /* next step: step 3 configuration ---------------------------- */
229 /* channel2 configuration */
230 tmr_output_channel_mode_select(TMR1, TMR_SELECT_CHANNEL_2, TMR_OUTPUT_CONTROL_PWM_MODE_A);
231 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_2, FALSE);
232 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_2C, TRUE);
233
234 /* channel3 configuration */
235 tmr_output_channel_mode_select(TMR1, TMR_SELECT_CHANNEL_3, TMR_OUTPUT_CONTROL_PWM_MODE_A);
236 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3, TRUE);
237 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3C, FALSE);
238
239 /* channel1 configuration */
240 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
241 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1C, FALSE);
242 step++;
243 }
244 else if(step == 3)
245 {
246 /* next step: step 4 configuration ---------------------------- */
247 /* channel3 configuration */
248 tmr_output_channel_mode_select(TMR1, TMR_SELECT_CHANNEL_3, TMR_OUTPUT_CONTROL_PWM_MODE_A);
249 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3, TRUE);
250 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3C, FALSE);
251
252 /* channel2 configuration */
253 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_2, FALSE);
254 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_2C, FALSE);
255
256 /* channel1 configuration */
257 tmr_output_channel_mode_select(TMR1, TMR_SELECT_CHANNEL_1, TMR_OUTPUT_CONTROL_PWM_MODE_A);
258 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
259 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1C, TRUE);
260 step++;
261 }
262 else if(step == 4)
263 {
264 /* next step: step 5 configuration ---------------------------- */
265 /* channel3 configuration */
266 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3, FALSE);
267 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3C, FALSE);
268
269 /* channel1 configuration */
270 tmr_output_channel_mode_select(TMR1, TMR_SELECT_CHANNEL_1, TMR_OUTPUT_CONTROL_PWM_MODE_A);
271 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
272 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1C, TRUE);
273
274 /* channel2 configuration */
275 tmr_output_channel_mode_select(TMR1, TMR_SELECT_CHANNEL_2, TMR_OUTPUT_CONTROL_PWM_MODE_A);
276 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_2, TRUE);
277 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_2C, FALSE);
278 step++;
279 }
280 else if (step == 5)
281 {
282 /* next step: step 6 configuration ---------------------------- */
283 /* channel3 configuration */
284 tmr_output_channel_mode_select(TMR1, TMR_SELECT_CHANNEL_3, TMR_OUTPUT_CONTROL_PWM_MODE_A);
285 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3, FALSE);
286 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3C, TRUE);
287
288 /* channel1 configuration */
289 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
290 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1C, FALSE);
291
292 /* channel2 configuration */
293 tmr_output_channel_mode_select(TMR1, TMR_SELECT_CHANNEL_2, TMR_OUTPUT_CONTROL_PWM_MODE_A);
294 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_2, TRUE);
295 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_2C, FALSE);
296 step++;
297 }
298 else
299 {
300 /* next step: step 1 configuration ---------------------------- */
301 /* channel1 configuration */
302 tmr_output_channel_mode_select(TMR1, TMR_SELECT_CHANNEL_1, TMR_OUTPUT_CONTROL_PWM_MODE_A);
303 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1, TRUE);
304 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_1C, FALSE);
305
306 /* channel3 configuration */
307 tmr_output_channel_mode_select(TMR1, TMR_SELECT_CHANNEL_3, TMR_OUTPUT_CONTROL_PWM_MODE_A);
308 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3, FALSE);
309 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3C, TRUE);
310
311 /* channel2 configuration */
312 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_2, FALSE);
313 tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_2C, FALSE);
314 step = 1;
315 }
316}
317
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/tmr/6_steps/src/main.c:38
tmr_output_struct
tmr_output_config_type tmr_output_struct
Definition: project/at_start_f437/examples/tmr/6_steps/src/main.c:39
SysTick_Configuration
void SysTick_Configuration(void)
configures the systick.
Definition: project/at_start_f435/examples/tmr/6_steps/src/main.c:187
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/6_steps/src/main.c:41
step
__IO uint32_t step
Definition: project/at_start_f437/examples/tmr/6_steps/src/main.c:43
TMR1_TRG_HALL_TMR11_IRQHandler
void TMR1_TRG_HALL_TMR11_IRQHandler(void)
this function handles tmr1 trigger and hall interrupts requests.
Definition: project/at_start_f435/examples/tmr/6_steps/src/main.c:204
tmr_brkdt_config_struct
tmr_brkdt_config_type tmr_brkdt_config_struct
Definition: project/at_start_f437/examples/tmr/6_steps/src/main.c:40
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE15
@ GPIO_PINS_SOURCE15
Definition: at32f435_437_gpio.h:148
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_channel_buffer_enable
void tmr_channel_buffer_enable(tmr_type *tmr_x, confirm_state new_state)
select tmr channel buffer
Definition: at32f435_437_tmr.c:1287
tmr_output_channel_mode_select
void tmr_output_channel_mode_select(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_control_mode_type oc_mode)
select tmr output channel mode
Definition: at32f435_437_tmr.c:461
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_brkdt_default_para_init
void tmr_brkdt_default_para_init(tmr_brkdt_config_type *tmr_brkdt_struct)
init tmr brkdt default para
Definition: at32f435_437_tmr.c:183
tmr_brkdt_config
void tmr_brkdt_config(tmr_type *tmr_x, tmr_brkdt_config_type *brkdt_struct)
config tmr break mode and dead-time
Definition: at32f435_437_tmr.c:1801
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_output_enable
void tmr_output_enable(tmr_type *tmr_x, confirm_state new_state)
tmr output enable(oen),this function is important for advtm output enable
Definition: at32f435_437_tmr.c:1499
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_enable
void tmr_channel_enable(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, confirm_state new_state)
tmr channel enable
Definition: at32f435_437_tmr.c:940
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_1C
@ TMR_SELECT_CHANNEL_1C
Definition: at32f435_437_tmr.h:218
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_2C
@ TMR_SELECT_CHANNEL_2C
Definition: at32f435_437_tmr.h:220
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_SELECT_CHANNEL_3C
@ TMR_SELECT_CHANNEL_3C
Definition: at32f435_437_tmr.h:222
TMR_WP_OFF
@ TMR_WP_OFF
Definition: at32f435_437_tmr.h:390
TMR_BRK_INPUT_ACTIVE_HIGH
@ TMR_BRK_INPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:382
TMR_OUTPUT_CONTROL_OFF
@ TMR_OUTPUT_CONTROL_OFF
Definition: at32f435_437_tmr.h:174
TMR_OUTPUT_CONTROL_PWM_MODE_A
@ TMR_OUTPUT_CONTROL_PWM_MODE_A
Definition: at32f435_437_tmr.h:180
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR_HALL_FLAG
#define TMR_HALL_FLAG
Definition: at32f435_437_tmr.h:58
TMR_HALL_INT
#define TMR_HALL_INT
Definition: at32f435_437_tmr.h:80
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
SysTick_IRQn
@ SysTick_IRQn
Definition: at32f435_437.h:143
TMR1_TRG_HALL_TMR11_IRQn
@ TMR1_TRG_HALL_TMR11_IRQn
Definition: at32f435_437.h:174
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::sclk_freq
uint32_t sclk_freq
Definition: at32f435_437_crm.h:789
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_brkdt_config_type
tmr brkdt config type
Definition: at32f435_437_tmr.h:436
tmr_brkdt_config_type::brk_enable
confirm_state brk_enable
Definition: at32f435_437_tmr.h:443
tmr_brkdt_config_type::deadtime
uint8_t deadtime
Definition: at32f435_437_tmr.h:437
tmr_brkdt_config_type::auto_output_enable
confirm_state auto_output_enable
Definition: at32f435_437_tmr.h:440
tmr_brkdt_config_type::wp_level
tmr_wp_level_type wp_level
Definition: at32f435_437_tmr.h:439
tmr_brkdt_config_type::fcsoen_state
confirm_state fcsoen_state
Definition: at32f435_437_tmr.h:441
tmr_brkdt_config_type::fcsodis_state
confirm_state fcsodis_state
Definition: at32f435_437_tmr.h:442
tmr_brkdt_config_type::brk_polarity
tmr_brk_polarity_type brk_polarity
Definition: at32f435_437_tmr.h:438
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::occ_output_state
confirm_state occ_output_state
Definition: at32f435_437_tmr.h:418
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::occ_polarity
tmr_output_polarity_type occ_polarity
Definition: at32f435_437_tmr.h:416
tmr_output_config_type::occ_idle_state
confirm_state occ_idle_state
Definition: at32f435_437_tmr.h:414
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • tmr
  • 7_pwm_output
  • inc
project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • tmr
  • 7_pwm_output
  • inc
project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • tmr
  • 7_pwm_output
  • inc
project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • tmr
  • 7_pwm_output
  • src
Functions
project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • tmr
  • 7_pwm_output
  • src
project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • tmr
  • 7_pwm_output
  • src
Functions
project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • tmr
  • 7_pwm_output
  • src
project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133 /* trigger TMR1 hall event */
134 tmr_event_sw_trigger(TMR1, TMR_HALL_SWTRIG);
135}
136
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
tmr_event_sw_trigger
void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event)
generate tmr event
Definition: at32f435_437_tmr.c:1486
TMR_HALL_SWTRIG
@ TMR_HALL_SWTRIG
Definition: at32f435_437_tmr.h:290
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • tmr
  • 7_pwm_output
  • src
Functions | Variables
project/at_start_f437/examples/tmr/7_pwm_output/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

gpio_init_type | gpio_init_struct = {0}
tmr_output_config_type tmr_output_struct
crm_clocks_freq_type | crm_clocks_freq_struct = {0}
uint16_t | timerperiod = 0
uint16_t | channel1pulse = 0
uint16_t | channel2pulse = 0
uint16_t | channel3pulse = 0
uint16_t | channel4pulse = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/tmr/7_pwm_output/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • tmr
  • 7_pwm_output
  • src
project/at_start_f437/examples/tmr/7_pwm_output/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38 gpio_init_type gpio_init_struct = {0};
39 tmr_output_config_type tmr_output_struct;
40 crm_clocks_freq_type crm_clocks_freq_struct = {0};
41
42uint16_t timerperiod = 0;
43uint16_t channel1pulse = 0, channel2pulse = 0, channel3pulse = 0, channel4pulse = 0;
44
50int main(void)
51{
52 system_clock_config();
53
54 at32_board_init();
55
56 /* get system clock */
57 crm_clocks_freq_get(&crm_clocks_freq_struct);
58
59 /* turn led2/led3/led4 on */
60 at32_led_on(LED2);
61 at32_led_on(LED3);
62 at32_led_on(LED4);
63
64 /* enable tmr1/gpioa/gpiob clock */
65 crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
66 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
67 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
68
69 /* timer1 output pin Configuration */
70 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11;
71 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
72 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
73 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
74 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
75 gpio_init(GPIOA, &gpio_init_struct);
76
77 gpio_init_struct.gpio_pins = GPIO_PINS_13 | GPIO_PINS_14 | GPIO_PINS_15;
78 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
79 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
80 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
81 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
82 gpio_init(GPIOB, &gpio_init_struct);
83
84 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_1);
85 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE9, GPIO_MUX_1);
86 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE10, GPIO_MUX_1);
87 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE11, GPIO_MUX_1);
88 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_1);
89 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE14, GPIO_MUX_1);
90 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE15, GPIO_MUX_1);
91
92
93 /* tmr1 configuration ---------------------------------------------------
94 generate 7 pwm signals with 4 different duty cycles:
95 prescaler = 0, tmr1 counter clock = apb2_freq *2
96
97 the objective is to generate 7 pwm signal at 17.57 khz:
98 - tim1_period = (apb2_freq * 2 / 17570) - 1
99 the channel 1 and channel 1n duty cycle is set to 50%
100 the channel 2 and channel 2n duty cycle is set to 37.5%
101 the channel 3 and channel 3n duty cycle is set to 25%
102 the channel 4 duty cycle is set to 12.5%
103 the timer pulse is calculated as follows:
104 - channelxpulse = dutycycle * (tim1_period - 1) / 100
105 ----------------------------------------------------------------------- */
106 /* compute the value to be set in arr regiter to generate signal frequency at 17.57 khz */
107 timerperiod = ((crm_clocks_freq_struct.apb2_freq * 2) / 17570 ) - 1;
108 /* compute ccr1 value to generate a duty cycle at 50% for channel 1 and 1n */
109 channel1pulse = (uint16_t) (((uint32_t) 5 * (timerperiod - 1)) / 10);
110 /* compute ccr2 value to generate a duty cycle at 37.5% for channel 2 and 2n */
111 channel2pulse = (uint16_t) (((uint32_t) 375 * (timerperiod - 1)) / 1000);
112 /* compute ccr3 value to generate a duty cycle at 25% for channel 3 and 3n */
113 channel3pulse = (uint16_t) (((uint32_t) 25 * (timerperiod - 1)) / 100);
114 /* compute ccr4 value to generate a duty cycle at 12.5% for channel 4 */
115 channel4pulse = (uint16_t) (((uint32_t) 125 * (timerperiod- 1)) / 1000);
116
117 tmr_base_init(TMR1, timerperiod, 0);
118 tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
119
120 /* channel 1, 2, 3 and 4 configuration in output mode */
121 tmr_output_default_para_init(&tmr_output_struct);
122 tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
123 tmr_output_struct.oc_output_state = TRUE;
124 tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;
125 tmr_output_struct.oc_idle_state = TRUE;
126 tmr_output_struct.occ_output_state = TRUE;
127 tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
128 tmr_output_struct.occ_idle_state = FALSE;
129 /* channel 1 */
130 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
131 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, channel1pulse);
132 /* channel 2 */
133 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
134 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_2, channel2pulse);
135 /* channel 3 */
136 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
137 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_3, channel3pulse);
138 /* channel 4 */
139 tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_4, &tmr_output_struct);
140 tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_4, channel4pulse);
141
142 /* tmr1 output enable */
143 tmr_output_enable(TMR1, TRUE);
144 /* enable tmr1 */
145 tmr_counter_enable(TMR1, TRUE);
146
147 while(1)
148 {}
149}
150
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f437/examples/tmr/7_pwm_output/src/main.c:38
tmr_output_struct
tmr_output_config_type tmr_output_struct
Definition: project/at_start_f437/examples/tmr/7_pwm_output/src/main.c:39
channel1pulse
uint16_t channel1pulse
Definition: project/at_start_f437/examples/tmr/7_pwm_output/src/main.c:43
timerperiod
uint16_t timerperiod
Definition: project/at_start_f437/examples/tmr/7_pwm_output/src/main.c:42
channel2pulse
uint16_t channel2pulse
Definition: project/at_start_f437/examples/tmr/7_pwm_output/src/main.c:43
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/tmr/7_pwm_output/src/main.c:40
channel3pulse
uint16_t channel3pulse
Definition: project/at_start_f437/examples/tmr/7_pwm_output/src/main.c:43
channel4pulse
uint16_t channel4pulse
Definition: project/at_start_f437/examples/tmr/7_pwm_output/src/main.c:43
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_TMR1_PERIPH_CLOCK
@ CRM_TMR1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:154
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PINS_SOURCE15
@ GPIO_PINS_SOURCE15
Definition: at32f435_437_gpio.h:148
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_1
@ GPIO_MUX_1
Definition: at32f435_437_gpio.h:157
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_output_channel_config
void tmr_output_channel_config(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, tmr_output_config_type *tmr_output_struct)
config tmr output channel
Definition: at32f435_437_tmr.c:350
tmr_output_default_para_init
void tmr_output_default_para_init(tmr_output_config_type *tmr_output_struct)
init tmr output default para
Definition: at32f435_437_tmr.c:152
tmr_output_enable
void tmr_output_enable(tmr_type *tmr_x, confirm_state new_state)
tmr output enable(oen),this function is important for advtm output enable
Definition: at32f435_437_tmr.c:1499
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
tmr_channel_value_set
void tmr_channel_value_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, uint32_t tmr_channel_value)
set tmr channel value
Definition: at32f435_437_tmr.c:543
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_SELECT_CHANNEL_3
@ TMR_SELECT_CHANNEL_3
Definition: at32f435_437_tmr.h:221
TMR_SELECT_CHANNEL_1
@ TMR_SELECT_CHANNEL_1
Definition: at32f435_437_tmr.h:217
TMR_SELECT_CHANNEL_4
@ TMR_SELECT_CHANNEL_4
Definition: at32f435_437_tmr.h:223
TMR_SELECT_CHANNEL_2
@ TMR_SELECT_CHANNEL_2
Definition: at32f435_437_tmr.h:219
TMR_OUTPUT_CONTROL_PWM_MODE_B
@ TMR_OUTPUT_CONTROL_PWM_MODE_B
Definition: at32f435_437_tmr.h:181
TMR_OUTPUT_ACTIVE_HIGH
@ TMR_OUTPUT_ACTIVE_HIGH
Definition: at32f435_437_tmr.h:198
TMR_OUTPUT_ACTIVE_LOW
@ TMR_OUTPUT_ACTIVE_LOW
Definition: at32f435_437_tmr.h:199
TMR1
#define TMR1
Definition: at32f435_437_tmr.h:895
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb2_freq
uint32_t apb2_freq
Definition: at32f435_437_crm.h:791
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
tmr_output_config_type
tmr output config type
Definition: at32f435_437_tmr.h:411
tmr_output_config_type::occ_output_state
confirm_state occ_output_state
Definition: at32f435_437_tmr.h:418
tmr_output_config_type::oc_idle_state
confirm_state oc_idle_state
Definition: at32f435_437_tmr.h:413
tmr_output_config_type::oc_output_state
confirm_state oc_output_state
Definition: at32f435_437_tmr.h:417
tmr_output_config_type::oc_mode
tmr_output_control_mode_type oc_mode
Definition: at32f435_437_tmr.h:412
tmr_output_config_type::occ_polarity
tmr_output_polarity_type occ_polarity
Definition: at32f435_437_tmr.h:416
tmr_output_config_type::occ_idle_state
confirm_state occ_idle_state
Definition: at32f435_437_tmr.h:414
tmr_output_config_type::oc_polarity
tmr_output_polarity_type oc_polarity
Definition: at32f435_437_tmr.h:415
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • half_duplex
  • inc
project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • half_duplex
  • inc
project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • half_duplex
  • inc
project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • half_duplex
  • src
Functions
project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • half_duplex
  • src
project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • half_duplex
  • src
Functions
project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • half_duplex
  • src
project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • half_duplex
  • src
Macros | Functions | Variables
project/at_start_f437/examples/usart/half_duplex/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | COUNTOF(a) (sizeof(a) / sizeof(*(a)))
#define | USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
#define | USART3_TX_BUFFER_SIZE (COUNTOF(usart3_tx_buffer) - 1)

Functions

void | usart_configuration (void)
config usart More...
uint8_t | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
compares two buffers. More...
int | main (void)
main function. More...

Variables

uint8_t | usart2_tx_buffer [] = "usart half-duplex transfer: usart2 -> usart3"
uint8_t | usart3_tx_buffer [] = "usart half-duplex transfer: usart3 -> usart2"
uint8_t | usart2_rx_buffer [((sizeof(usart3_tx_buffer)/sizeof(*(usart3_tx_buffer))) - 1)]
uint8_t | usart3_rx_buffer [((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
uint8_t | data_count

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/half_duplex/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • half_duplex
  • src
project/at_start_f437/examples/usart/half_duplex/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define COUNTOF(a) (sizeof(a) / sizeof(*(a)))
39#define USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
40#define USART3_TX_BUFFER_SIZE (COUNTOF(usart3_tx_buffer) - 1)
41
42uint8_t usart2_tx_buffer[] = "usart half-duplex transfer: usart2 -> usart3";
43uint8_t usart3_tx_buffer[] = "usart half-duplex transfer: usart3 -> usart2";
44uint8_t usart2_rx_buffer[USART3_TX_BUFFER_SIZE];
45uint8_t usart3_rx_buffer[USART2_TX_BUFFER_SIZE];
46uint8_t data_count;
47
53void usart_configuration(void)
54{
55 gpio_init_type gpio_init_struct;
56
57 /* enable the usart2 and gpio clock */
58 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
59 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
60
61 /* enable the usart3 and gpio clock */
62 crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE);
63 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
64
65 gpio_default_para_init(&gpio_init_struct);
66
67 /* configure the usart2 tx pin */
68 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
69 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
70 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
71 gpio_init_struct.gpio_pins = GPIO_PINS_2;
72 gpio_init_struct.gpio_pull = GPIO_PULL_UP;
73 gpio_init(GPIOA, &gpio_init_struct);
74 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
75
76 /* configure the usart3 tx pin */
77 gpio_init_struct.gpio_pins = GPIO_PINS_10;
78 gpio_init(GPIOB, &gpio_init_struct);
79 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_7);
80
81 /* configure usart2 param */
82 usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
83 usart_transmitter_enable(USART2, TRUE);
84 usart_receiver_enable(USART2, TRUE);
85 usart_single_line_halfduplex_select(USART2, TRUE);
86 usart_enable(USART2, TRUE);
87
88 /* configure usart3 param */
89 usart_init(USART3, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
90 usart_transmitter_enable(USART3, TRUE);
91 usart_receiver_enable(USART3, TRUE);
92 usart_single_line_halfduplex_select(USART3, TRUE);
93 usart_enable(USART3, TRUE);
94}
95
103uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
104{
105 while(buffer_length--)
106 {
107 if(*pbuffer1 != *pbuffer2)
108 {
109 return 0;
110 }
111 pbuffer1++;
112 pbuffer2++;
113 }
114 return 1;
115}
116
122int main(void)
123{
124 system_clock_config();
125 at32_board_init();
126 usart_configuration();
127
128 /* usart2 transmit and usart3 receive */
129 data_count = USART2_TX_BUFFER_SIZE;
130 while(data_count)
131 {
132 while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
133 usart_data_transmit(USART2, usart2_tx_buffer[USART2_TX_BUFFER_SIZE-data_count]);
134 while(usart_flag_get(USART3, USART_RDBF_FLAG) == RESET);
135 usart3_rx_buffer[USART2_TX_BUFFER_SIZE-data_count] = usart_data_receive(USART3);
136 data_count--;
137 }
138
139 /* usart3 transmit and usart2 receive */
140 data_count = USART3_TX_BUFFER_SIZE;
141 while(data_count)
142 {
143 while(usart_flag_get(USART3, USART_TDBE_FLAG) == RESET);
144 usart_data_transmit(USART3, usart3_tx_buffer[USART3_TX_BUFFER_SIZE-data_count]);
145 while(usart_flag_get(USART2, USART_RDBF_FLAG) == RESET);
146 usart2_rx_buffer[USART3_TX_BUFFER_SIZE-data_count] = usart_data_receive(USART2);
147 data_count--;
148 }
149
150 while(1)
151 {
152 /* compare data buffer */
153 if(buffer_compare(usart2_tx_buffer, usart3_rx_buffer, USART2_TX_BUFFER_SIZE) && \
154 buffer_compare(usart3_tx_buffer, usart2_rx_buffer, USART3_TX_BUFFER_SIZE))
155 {
156 at32_led_toggle(LED2);
157 at32_led_toggle(LED3);
158 at32_led_toggle(LED4);
159 delay_sec(1);
160 }
161 }
162}
163
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usart_configuration
void usart_configuration(void)
config usart
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:53
usart3_rx_buffer
uint8_t usart3_rx_buffer[((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/half_duplex/src/main.c:45
USART2_TX_BUFFER_SIZE
#define USART2_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/half_duplex/src/main.c:39
usart2_tx_buffer
uint8_t usart2_tx_buffer[]
Definition: project/at_start_f437/examples/usart/half_duplex/src/main.c:42
USART3_TX_BUFFER_SIZE
#define USART3_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/half_duplex/src/main.c:40
data_count
uint8_t data_count
Definition: project/at_start_f437/examples/usart/half_duplex/src/main.c:46
usart3_tx_buffer
uint8_t usart3_tx_buffer[]
Definition: project/at_start_f437/examples/usart/half_duplex/src/main.c:43
usart2_rx_buffer
uint8_t usart2_rx_buffer[((sizeof(usart3_tx_buffer)/sizeof(*(usart3_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/half_duplex/src/main.c:44
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART3_PERIPH_CLOCK
@ CRM_USART3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:141
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
usart_single_line_halfduplex_select
void usart_single_line_halfduplex_select(usart_type *usart_x, confirm_state new_state)
enable or disable the usart single line bidirectional half-duplex communication.
Definition: at32f435_437_usart.c:509
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART3
#define USART3
Definition: at32f435_437_usart.h:350
USART2
#define USART2
Definition: at32f435_437_usart.h:349
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • hw_flow_control
  • inc
project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • hw_flow_control
  • inc
project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • hw_flow_control
  • inc
project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • hw_flow_control
  • src
Functions
project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • hw_flow_control
  • src
project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • hw_flow_control
  • src
Functions
project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • hw_flow_control
  • src
project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • hw_flow_control
  • src
Macros | Functions | Variables
project/at_start_f437/examples/usart/hw_flow_control/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define BUFFER_SIZE 16

Functions

void | usart_configuration (void)
config usart More...
int | main (void)
main function. More...

Variables

uint8_t | rx_buffer [16]
uint8_t | data_count

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/hw_flow_control/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • hw_flow_control
  • src
project/at_start_f437/examples/usart/hw_flow_control/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 16
39
40uint8_t rx_buffer[BUFFER_SIZE];
41uint8_t data_count;
42
48void usart_configuration(void)
49{
50 gpio_init_type gpio_init_struct;
51
52 /* enable the usart2 and gpio clock */
53 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
54 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
55
56 gpio_default_para_init(&gpio_init_struct);
57
58 /* configure the usart2 tx, rx, cts and rts pin */
59 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
60 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
61 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
62 gpio_init_struct.gpio_pins = GPIO_PINS_3 | GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6;
63 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
64 gpio_init(GPIOD, &gpio_init_struct);
65 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE3, GPIO_MUX_7);
66 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_7);
67 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE5, GPIO_MUX_7);
68 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE6, GPIO_MUX_7);
69
70 /* configure usart2 param */
71 usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
72 usart_hardware_flow_control_set(USART2, USART_HARDWARE_FLOW_RTS_CTS);
73 usart_transmitter_enable(USART2, TRUE);
74 usart_receiver_enable(USART2, TRUE);
75 usart_enable(USART2, TRUE);
76}
77
83int main(void)
84{
85 system_clock_config();
86 at32_board_init();
87 usart_configuration();
88
89 /* receive a string (BUFFER_SIZE bytes) from the hyperterminal */
90 data_count = BUFFER_SIZE;
91 while(data_count)
92 {
93 while(usart_flag_get(USART2, USART_RDBF_FLAG) == RESET);
94 rx_buffer[BUFFER_SIZE-data_count] = usart_data_receive(USART2);
95 data_count--;
96 }
97
98 /* send a buffer from usart to hyperterminal */
99 data_count = BUFFER_SIZE;
100 while(data_count)
101 {
102 while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
103 usart_data_transmit(USART2, rx_buffer[BUFFER_SIZE-data_count]);
104 data_count--;
105 }
106
107 while(1)
108 {
109 at32_led_toggle(LED2);
110 at32_led_toggle(LED3);
111 at32_led_toggle(LED4);
112 delay_sec(1);
113 }
114}
115
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usart_configuration
void usart_configuration(void)
config usart
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:53
rx_buffer
uint8_t rx_buffer[16]
Definition: project/at_start_f437/examples/usart/hw_flow_control/src/main.c:40
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/hw_flow_control/src/main.c:38
data_count
uint8_t data_count
Definition: project/at_start_f437/examples/usart/hw_flow_control/src/main.c:41
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PINS_SOURCE5
@ GPIO_PINS_SOURCE5
Definition: at32f435_437_gpio.h:138
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_hardware_flow_control_set
void usart_hardware_flow_control_set(usart_type *usart_x, usart_hardware_flow_control_type flow_state)
configure the usart's hardware flow control.
Definition: at32f435_437_usart.c:555
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
USART_HARDWARE_FLOW_RTS_CTS
@ USART_HARDWARE_FLOW_RTS_CTS
Definition: at32f435_437_usart.h:173
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART2
#define USART2
Definition: at32f435_437_usart.h:349
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • idle_detection
  • inc
project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • idle_detection
  • inc
project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • idle_detection
  • inc
project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • idle_detection
  • src
Functions
project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • idle_detection
  • src
project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • idle_detection
  • src
Functions
project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | USART2_IRQHandler (void)
this function handles usart2 handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • idle_detection
  • src
project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void USART2_IRQHandler(void)
142{
143 if(usart_flag_get(USART2, USART_IDLEF_FLAG))
144 {
145 usart_data_receive(USART2);
146 at32_led_on(LED2);
147 at32_led_on(LED3);
148 at32_led_on(LED4);
149 }
150}
151
at32f435_437_board.h
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
USART2_IRQHandler
void USART2_IRQHandler(void)
this function handles usart2 handler.
Definition: project/at_start_f435/examples/usart/idle_detection/src/at32f435_437_int.c:141
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
USART_IDLEF_FLAG
#define USART_IDLEF_FLAG
Definition: at32f435_437_usart.h:56
USART2
#define USART2
Definition: at32f435_437_usart.h:349
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • idle_detection
  • src
Functions
project/at_start_f437/examples/usart/idle_detection/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | usart_configuration (void)
config usart More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/idle_detection/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • idle_detection
  • src
project/at_start_f437/examples/usart/idle_detection/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43void usart_configuration(void)
44{
45 gpio_init_type gpio_init_struct;
46
47 /* enable the usart2 and gpio clock */
48 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
49 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
50
51 gpio_default_para_init(&gpio_init_struct);
52
53 /* configure the usart2 tx. rx pin */
54 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
55 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
56 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
57 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
58 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
59 gpio_init(GPIOA, &gpio_init_struct);
60 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
61 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7);
62
63 /* config usart nvic interrupt */
64 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
65 nvic_irq_enable(USART2_IRQn, 0, 0);
66
67 /* configure usart2 param */
68 usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
69 usart_transmitter_enable(USART2, TRUE);
70 usart_receiver_enable(USART2, TRUE);
71 usart_interrupt_enable(USART2, USART_IDLE_INT, TRUE);
72 usart_enable(USART2, TRUE);
73}
74
80int main(void)
81{
82 system_clock_config();
83 at32_board_init();
84 at32_led_off(LED2);
85 at32_led_off(LED3);
86 at32_led_off(LED4);
87 usart_configuration();
88
89 /* transmit a data */
90 while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
91 usart_data_transmit(USART2, 0x55);
92
93 /* receive a data from the tx pin */
94 while(usart_flag_get(USART2, USART_RDBF_FLAG) == RESET);
95 usart_data_receive(USART2);
96
97 while(1)
98 {
99 }
100}
101
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usart_configuration
void usart_configuration(void)
config usart
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:53
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_interrupt_enable
void usart_interrupt_enable(usart_type *usart_x, uint32_t usart_int, confirm_state new_state)
enable or disable the specified usart interrupts.
Definition: at32f435_437_usart.c:287
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART_IDLE_INT
#define USART_IDLE_INT
Definition: at32f435_437_usart.h:72
USART2
#define USART2
Definition: at32f435_437_usart.h:349
USART2_IRQn
@ USART2_IRQn
Definition: at32f435_437.h:186
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • interrupt
  • inc
project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • interrupt
  • inc
project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • interrupt
  • inc
project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • interrupt
  • src
Functions
project/at_start_f437/examples/usart/interrupt/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/interrupt/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • interrupt
  • src
project/at_start_f437/examples/usart/interrupt/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/interrupt/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • interrupt
  • src
Functions | Variables
project/at_start_f437/examples/usart/interrupt/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | USART2_IRQHandler (void)
this function handles usart2 handler. More...
void | USART3_IRQHandler (void)
this function handles usart3 handler. More...

Variables

uint8_t | usart2_tx_buffer []
uint8_t | usart3_tx_buffer []
uint8_t | usart2_rx_buffer []
uint8_t | usart3_rx_buffer []
uint8_t | usart2_tx_counter
uint8_t | usart3_tx_counter
uint8_t | usart2_rx_counter
uint8_t | usart3_rx_counter
uint8_t | usart2_tx_buffer_size
uint8_t | usart3_tx_buffer_size

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/interrupt/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • interrupt
  • src
project/at_start_f437/examples/usart/interrupt/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38extern uint8_t usart2_tx_buffer[];
39extern uint8_t usart3_tx_buffer[];
40extern uint8_t usart2_rx_buffer[];
41extern uint8_t usart3_rx_buffer[];
42extern uint8_t usart2_tx_counter;
43extern uint8_t usart3_tx_counter;
44extern uint8_t usart2_rx_counter;
45extern uint8_t usart3_rx_counter;
46extern uint8_t usart2_tx_buffer_size;
47extern uint8_t usart3_tx_buffer_size;
48
54void NMI_Handler(void)
55{
56}
57
63void HardFault_Handler(void)
64{
65 /* go to infinite loop when hard fault exception occurs */
66 while(1)
67 {
68 }
69}
70
76void MemManage_Handler(void)
77{
78 /* go to infinite loop when memory manage exception occurs */
79 while(1)
80 {
81 }
82}
83
89void BusFault_Handler(void)
90{
91 /* go to infinite loop when bus fault exception occurs */
92 while(1)
93 {
94 }
95}
96
102void UsageFault_Handler(void)
103{
104 /* go to infinite loop when usage fault exception occurs */
105 while(1)
106 {
107 }
108}
109
115void SVC_Handler(void)
116{
117}
118
124void DebugMon_Handler(void)
125{
126}
127
133void PendSV_Handler(void)
134{
135}
136
142void SysTick_Handler(void)
143{
144}
145
151void USART2_IRQHandler(void)
152{
153 if(usart_flag_get(USART2, USART_RDBF_FLAG) != RESET)
154 {
155 /* read one byte from the receive data register */
156 usart2_rx_buffer[usart2_rx_counter++] = usart_data_receive(USART2);
157
158 if(usart2_rx_counter == usart3_tx_buffer_size)
159 {
160 /* disable the usart2 receive interrupt */
161 usart_interrupt_enable(USART2, USART_RDBF_INT, FALSE);
162 }
163 }
164
165 if(usart_flag_get(USART2, USART_TDBE_FLAG) != RESET)
166 {
167 /* write one byte to the transmit data register */
168 usart_data_transmit(USART2, usart2_tx_buffer[usart2_tx_counter++]);
169
170 if(usart2_tx_counter == usart2_tx_buffer_size)
171 {
172 /* disable the usart2 transmit interrupt */
173 usart_interrupt_enable(USART2, USART_TDBE_INT, FALSE);
174 }
175 }
176}
177
183void USART3_IRQHandler(void)
184{
185 if(usart_flag_get(USART3, USART_RDBF_FLAG) != RESET)
186 {
187 /* read one byte from the receive data register */
188 usart3_rx_buffer[usart3_rx_counter++] = usart_data_receive(USART3);
189
190 if(usart3_rx_counter == usart2_tx_buffer_size)
191 {
192 /* disable the usart3 receive interrupt */
193 usart_interrupt_enable(USART3, USART_RDBF_INT, FALSE);
194 }
195 }
196
197 if(usart_flag_get(USART3, USART_TDBE_FLAG) != RESET)
198 {
199 /* write one byte to the transmit data register */
200 usart_data_transmit(USART3, usart3_tx_buffer[usart3_tx_counter++]);
201
202 if(usart3_tx_counter == usart3_tx_buffer_size)
203 {
204 /* disable the usart3 transmit interrupt */
205 usart_interrupt_enable(USART3, USART_TDBE_INT, FALSE);
206 }
207 }
208}
209
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
USART2_IRQHandler
void USART2_IRQHandler(void)
this function handles usart2 handler.
Definition: project/at_start_f435/examples/usart/idle_detection/src/at32f435_437_int.c:141
USART3_IRQHandler
void USART3_IRQHandler(void)
this function handles usart3 handler.
Definition: project/at_start_f435/examples/usart/interrupt/src/at32f435_437_int.c:183
usart2_rx_buffer
uint8_t usart2_rx_buffer[]
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:44
usart3_tx_counter
uint8_t usart3_tx_counter
Definition: project/at_start_f435/examples/usart/interrupt/src/main.c:47
usart2_tx_counter
uint8_t usart2_tx_counter
Definition: project/at_start_f435/examples/usart/interrupt/src/main.c:46
usart2_tx_buffer_size
uint8_t usart2_tx_buffer_size
Definition: project/at_start_f435/examples/usart/interrupt/src/main.c:50
usart2_rx_counter
uint8_t usart2_rx_counter
Definition: project/at_start_f435/examples/usart/interrupt/src/main.c:48
usart3_tx_buffer_size
uint8_t usart3_tx_buffer_size
Definition: project/at_start_f435/examples/usart/interrupt/src/main.c:51
usart2_tx_buffer
uint8_t usart2_tx_buffer[]
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:42
usart3_tx_buffer
uint8_t usart3_tx_buffer[]
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:43
usart3_rx_counter
uint8_t usart3_rx_counter
Definition: project/at_start_f435/examples/usart/interrupt/src/main.c:49
usart3_rx_buffer
uint8_t usart3_rx_buffer[]
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:45
FALSE
@ FALSE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_interrupt_enable
void usart_interrupt_enable(usart_type *usart_x, uint32_t usart_int, confirm_state new_state)
enable or disable the specified usart interrupts.
Definition: at32f435_437_usart.c:287
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART_RDBF_INT
#define USART_RDBF_INT
Definition: at32f435_437_usart.h:73
USART_TDBE_INT
#define USART_TDBE_INT
Definition: at32f435_437_usart.h:75
USART3
#define USART3
Definition: at32f435_437_usart.h:350
USART2
#define USART2
Definition: at32f435_437_usart.h:349
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • interrupt
  • src
Macros | Functions | Variables
project/at_start_f437/examples/usart/interrupt/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | COUNTOF(a) (sizeof(a) / sizeof(*(a)))
#define | USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
#define | USART3_TX_BUFFER_SIZE (COUNTOF(usart3_tx_buffer) - 1)

Functions

void | usart_configuration (void)
config usart More...
uint8_t | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
compares two buffers. More...
int | main (void)
main function. More...

Variables

uint8_t | usart2_tx_buffer [] = "usart transfer by interrupt: usart2 -> usart3 using interrupt"
uint8_t | usart3_tx_buffer [] = "usart transfer by interrupt: usart3 -> usart2 using interrupt"
uint8_t | usart2_rx_buffer [((sizeof(usart3_tx_buffer)/sizeof(*(usart3_tx_buffer))) - 1)]
uint8_t | usart3_rx_buffer [((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
volatile uint8_t | usart2_tx_counter = 0x00
volatile uint8_t | usart3_tx_counter = 0x00
volatile uint8_t | usart2_rx_counter = 0x00
volatile uint8_t | usart3_rx_counter = 0x00
uint8_t | usart2_tx_buffer_size = ((sizeof( usart2_tx_buffer ) / sizeof(*( usart2_tx_buffer ))) - 1)
uint8_t | usart3_tx_buffer_size = ((sizeof( usart3_tx_buffer ) / sizeof(*( usart3_tx_buffer ))) - 1)

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/interrupt/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • interrupt
  • src
project/at_start_f437/examples/usart/interrupt/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define COUNTOF(a) (sizeof(a) / sizeof(*(a)))
39#define USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
40#define USART3_TX_BUFFER_SIZE (COUNTOF(usart3_tx_buffer) - 1)
41
42uint8_t usart2_tx_buffer[] = "usart transfer by interrupt: usart2 -> usart3 using interrupt";
43uint8_t usart3_tx_buffer[] = "usart transfer by interrupt: usart3 -> usart2 using interrupt";
44uint8_t usart2_rx_buffer[USART3_TX_BUFFER_SIZE];
45uint8_t usart3_rx_buffer[USART2_TX_BUFFER_SIZE];
46volatile uint8_t usart2_tx_counter = 0x00;
47volatile uint8_t usart3_tx_counter = 0x00;
48volatile uint8_t usart2_rx_counter = 0x00;
49volatile uint8_t usart3_rx_counter = 0x00;
50uint8_t usart2_tx_buffer_size = USART2_TX_BUFFER_SIZE;
51uint8_t usart3_tx_buffer_size = USART3_TX_BUFFER_SIZE;
52
58void usart_configuration(void)
59{
60 gpio_init_type gpio_init_struct;
61
62 /* enable the usart2 and gpio clock */
63 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
64 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
65
66 /* enable the usart3 and gpio clock */
67 crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE);
68 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
69
70 gpio_default_para_init(&gpio_init_struct);
71
72 /* configure the usart2 tx, rx pin */
73 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
74 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
75 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
76 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
77 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
78 gpio_init(GPIOA, &gpio_init_struct);
79 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
80 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7);
81
82 /* configure the usart3 tx, rx pin */
83 gpio_init_struct.gpio_pins = GPIO_PINS_10 | GPIO_PINS_11;
84 gpio_init(GPIOB, &gpio_init_struct);
85 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_7);
86 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_7);
87
88 /* config usart nvic interrupt */
89 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
90 nvic_irq_enable(USART2_IRQn, 0, 0);
91 nvic_irq_enable(USART3_IRQn, 0, 0);
92
93 /* configure usart2 param */
94 usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
95 usart_transmitter_enable(USART2, TRUE);
96 usart_receiver_enable(USART2, TRUE);
97
98 /* configure usart3 param */
99 usart_init(USART3, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
100 usart_transmitter_enable(USART3, TRUE);
101 usart_receiver_enable(USART3, TRUE);
102
103 /* enable usart2 and usart3 interrupt */
104 usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE);
105 usart_enable(USART2, TRUE);
106
107 usart_interrupt_enable(USART3, USART_RDBF_INT, TRUE);
108 usart_enable(USART3, TRUE);
109
110 usart_interrupt_enable(USART2, USART_TDBE_INT, TRUE);
111 usart_interrupt_enable(USART3, USART_TDBE_INT, TRUE);
112}
113
121uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
122{
123 while(buffer_length--)
124 {
125 if(*pbuffer1 != *pbuffer2)
126 {
127 return 0;
128 }
129 pbuffer1++;
130 pbuffer2++;
131 }
132 return 1;
133}
134
140int main(void)
141{
142 system_clock_config();
143 at32_board_init();
144 usart_configuration();
145
146 /* wait until end of transmission from usart2 to usart3 */
147 while(usart3_rx_counter < usart2_tx_buffer_size);
148
149 /* wait until end of transmission from usart3 to usart2 */
150 while(usart2_rx_counter < usart3_tx_buffer_size);
151
152 while(1)
153 {
154 /* compare data buffer */
155 if(buffer_compare(usart2_tx_buffer, usart3_rx_buffer, USART2_TX_BUFFER_SIZE) && \
156 buffer_compare(usart3_tx_buffer, usart2_rx_buffer, USART3_TX_BUFFER_SIZE))
157 {
158 at32_led_toggle(LED2);
159 at32_led_toggle(LED3);
160 at32_led_toggle(LED4);
161 delay_sec(1);
162 }
163 }
164}
165
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usart_configuration
void usart_configuration(void)
config usart
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:53
usart3_rx_counter
volatile uint8_t usart3_rx_counter
Definition: project/at_start_f437/examples/usart/interrupt/src/main.c:49
usart2_rx_counter
volatile uint8_t usart2_rx_counter
Definition: project/at_start_f437/examples/usart/interrupt/src/main.c:48
usart2_tx_counter
volatile uint8_t usart2_tx_counter
Definition: project/at_start_f437/examples/usart/interrupt/src/main.c:46
usart3_tx_counter
volatile uint8_t usart3_tx_counter
Definition: project/at_start_f437/examples/usart/interrupt/src/main.c:47
usart2_tx_buffer_size
uint8_t usart2_tx_buffer_size
Definition: project/at_start_f437/examples/usart/interrupt/src/main.c:50
usart3_rx_buffer
uint8_t usart3_rx_buffer[((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/interrupt/src/main.c:45
USART2_TX_BUFFER_SIZE
#define USART2_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/interrupt/src/main.c:39
usart3_tx_buffer_size
uint8_t usart3_tx_buffer_size
Definition: project/at_start_f437/examples/usart/interrupt/src/main.c:51
usart2_tx_buffer
uint8_t usart2_tx_buffer[]
Definition: project/at_start_f437/examples/usart/interrupt/src/main.c:42
USART3_TX_BUFFER_SIZE
#define USART3_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/interrupt/src/main.c:40
usart3_tx_buffer
uint8_t usart3_tx_buffer[]
Definition: project/at_start_f437/examples/usart/interrupt/src/main.c:43
usart2_rx_buffer
uint8_t usart2_rx_buffer[((sizeof(usart3_tx_buffer)/sizeof(*(usart3_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/interrupt/src/main.c:44
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART3_PERIPH_CLOCK
@ CRM_USART3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:141
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_interrupt_enable
void usart_interrupt_enable(usart_type *usart_x, uint32_t usart_int, confirm_state new_state)
enable or disable the specified usart interrupts.
Definition: at32f435_437_usart.c:287
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_RDBF_INT
#define USART_RDBF_INT
Definition: at32f435_437_usart.h:73
USART_TDBE_INT
#define USART_TDBE_INT
Definition: at32f435_437_usart.h:75
USART3
#define USART3
Definition: at32f435_437_usart.h:350
USART2
#define USART2
Definition: at32f435_437_usart.h:349
USART2_IRQn
@ USART2_IRQn
Definition: at32f435_437.h:186
USART3_IRQn
@ USART3_IRQn
Definition: at32f435_437.h:187
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • irda
  • inc
project/at_start_f437/examples/usart/irda/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • irda
  • inc
project/at_start_f437/examples/usart/irda/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • irda
  • inc
project/at_start_f437/examples/usart/irda/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • irda
  • src
Functions
project/at_start_f437/examples/usart/irda/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/irda/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • irda
  • src
project/at_start_f437/examples/usart/irda/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/irda/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • irda
  • src
Functions
project/at_start_f437/examples/usart/irda/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/irda/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • irda
  • src
project/at_start_f437/examples/usart/irda/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • irda
  • src
Functions
project/at_start_f437/examples/usart/irda/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | usart_configuration (void)
config usart More...
int | main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/irda/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • irda
  • src
project/at_start_f437/examples/usart/irda/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43void usart_configuration(void)
44{
45 gpio_init_type gpio_init_struct;
46
47 /* enable the usart2 and gpio clock */
48 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
49 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
50
51 gpio_default_para_init(&gpio_init_struct);
52
53 /* configure the usart2 tx, rx pin */
54 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
55 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
56 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
57 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
58 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
59 gpio_init(GPIOA, &gpio_init_struct);
60 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
61 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7);
62
63 /* configure usart2 param */
64 usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
65 usart_transmitter_enable(USART2, TRUE);
66 usart_receiver_enable(USART2, TRUE);
67 usart_irda_smartcard_division_set(USART2, 0x01);
68 usart_irda_mode_enable(USART2, TRUE);
69 usart_enable(USART2, TRUE);
70}
71
77int main(void)
78{
79 system_clock_config();
80 at32_board_init();
81 at32_led_off(LED2);
82 at32_led_off(LED3);
83 at32_led_off(LED4);
84 usart_configuration();
85
86#if defined(TRANSMIT)
87 while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
88 usart_data_transmit(USART2, 0x55);
89 at32_led_on(LED4);
90#endif
91
92#if defined(RECEIVE)
93 while(usart_flag_get(USART2, USART_RDBF_FLAG) == RESET);
94 if(usart_data_receive(USART2) == 0x55)
95 {
96 at32_led_on(LED4);
97 }
98#endif
99
100 while(1)
101 {
102 }
103}
104
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usart_configuration
void usart_configuration(void)
config usart
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:53
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_irda_smartcard_division_set
void usart_irda_smartcard_division_set(usart_type *usart_x, uint8_t div_val)
config the irda/smartcard division.
Definition: at32f435_437_usart.c:465
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_irda_mode_enable
void usart_irda_mode_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the usart's irda interface.
Definition: at32f435_437_usart.c:523
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART2
#define USART2
Definition: at32f435_437_usart.h:349
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • polling
  • inc
project/at_start_f437/examples/usart/polling/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • polling
  • inc
project/at_start_f437/examples/usart/polling/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • polling
  • inc
project/at_start_f437/examples/usart/polling/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • polling
  • src
Functions
project/at_start_f437/examples/usart/polling/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/polling/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • polling
  • src
project/at_start_f437/examples/usart/polling/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/polling/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • polling
  • src
Functions
project/at_start_f437/examples/usart/polling/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/polling/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • polling
  • src
project/at_start_f437/examples/usart/polling/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • polling
  • src
Macros | Functions | Variables
project/at_start_f437/examples/usart/polling/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | COUNTOF(a) (sizeof(a) / sizeof(*(a)))
#define | USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
#define | USART3_TX_BUFFER_SIZE (COUNTOF(usart3_tx_buffer) - 1)

Functions

void | usart_configuration (void)
config usart More...
uint8_t | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
compares two buffers. More...
int | main (void)
main function. More...

Variables

uint8_t | usart2_tx_buffer [] = "usart transfer by interrupt: usart2 -> usart3 using interrupt"
uint8_t | usart3_tx_buffer [] = "usart transfer by interrupt: usart3 -> usart2 using interrupt"
uint8_t | usart2_rx_buffer [((sizeof(usart3_tx_buffer)/sizeof(*(usart3_tx_buffer))) - 1)]
uint8_t | usart3_rx_buffer [((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
uint8_t | usart2_tx_counter = 0x00
uint8_t | usart3_tx_counter = 0x00
uint8_t | usart2_rx_counter = 0x00
uint8_t | usart3_rx_counter = 0x00
uint8_t | usart2_tx_buffer_size = ((sizeof( usart2_tx_buffer ) / sizeof(*( usart2_tx_buffer ))) - 1)
uint8_t | usart3_tx_buffer_size = ((sizeof( usart3_tx_buffer ) / sizeof(*( usart3_tx_buffer ))) - 1)

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/polling/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • polling
  • src
project/at_start_f437/examples/usart/polling/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define COUNTOF(a) (sizeof(a) / sizeof(*(a)))
39#define USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
40#define USART3_TX_BUFFER_SIZE (COUNTOF(usart3_tx_buffer) - 1)
41
42uint8_t usart2_tx_buffer[] = "usart transfer by interrupt: usart2 -> usart3 using interrupt";
43uint8_t usart3_tx_buffer[] = "usart transfer by interrupt: usart3 -> usart2 using interrupt";
44uint8_t usart2_rx_buffer[USART3_TX_BUFFER_SIZE];
45uint8_t usart3_rx_buffer[USART2_TX_BUFFER_SIZE];
46uint8_t usart2_tx_counter = 0x00;
47uint8_t usart3_tx_counter = 0x00;
48uint8_t usart2_rx_counter = 0x00;
49uint8_t usart3_rx_counter = 0x00;
50uint8_t usart2_tx_buffer_size = USART2_TX_BUFFER_SIZE;
51uint8_t usart3_tx_buffer_size = USART3_TX_BUFFER_SIZE;
52
58void usart_configuration(void)
59{
60 gpio_init_type gpio_init_struct;
61
62 /* enable the usart2 and gpio clock */
63 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
64 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
65
66 /* enable the usart3 and gpio clock */
67 crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE);
68 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
69
70 gpio_default_para_init(&gpio_init_struct);
71
72 /* configure the usart2 tx, rx pin */
73 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
74 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
75 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
76 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
77 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
78 gpio_init(GPIOA, &gpio_init_struct);
79 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
80 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7);
81
82 /* configure the usart3 tx, rx pin */
83 gpio_init_struct.gpio_pins = GPIO_PINS_10 | GPIO_PINS_11;
84 gpio_init(GPIOB, &gpio_init_struct);
85 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_7);
86 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_7);
87
88 /* configure usart2 param */
89 usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
90 usart_parity_selection_config(USART2, USART_PARITY_NONE);
91 usart_transmitter_enable(USART2, TRUE);
92 usart_receiver_enable(USART2, TRUE);
93 usart_enable(USART2, TRUE);
94
95 /* configure usart3 param */
96 usart_init(USART3, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
97 usart_parity_selection_config(USART3, USART_PARITY_NONE);
98 usart_transmitter_enable(USART3, TRUE);
99 usart_receiver_enable(USART3, TRUE);
100 usart_enable(USART3, TRUE);
101}
102
110uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
111{
112 while(buffer_length--)
113 {
114 if(*pbuffer1 != *pbuffer2)
115 {
116 return 0;
117 }
118 pbuffer1++;
119 pbuffer2++;
120 }
121 return 1;
122}
123
129int main(void)
130{
131 system_clock_config();
132 at32_board_init();
133 usart_configuration();
134
135 /* wait until end of transmission from usart2 to usart3 */
136 while(usart3_rx_counter < usart2_tx_buffer_size)
137 {
138 while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
139 usart_data_transmit(USART2, usart2_tx_buffer[usart2_tx_counter++]);
140
141 while(usart_flag_get(USART3, USART_RDBF_FLAG) == RESET);
142 usart3_rx_buffer[usart3_rx_counter++] = usart_data_receive(USART3);
143 }
144
145 /* wait until end of transmission from usart3 to usart2 */
146 while(usart2_rx_counter < usart3_tx_buffer_size)
147 {
148 while(usart_flag_get(USART3, USART_TDBE_FLAG) == RESET);
149 usart_data_transmit(USART3, usart3_tx_buffer[usart3_tx_counter++]);
150
151 while(usart_flag_get(USART2, USART_RDBF_FLAG) == RESET);
152 usart2_rx_buffer[usart2_rx_counter++] = usart_data_receive(USART2);
153 }
154
155 while(1)
156 {
157 /* compare data buffer */
158 if(buffer_compare(usart2_tx_buffer, usart3_rx_buffer, USART2_TX_BUFFER_SIZE) && \
159 buffer_compare(usart3_tx_buffer, usart2_rx_buffer, USART3_TX_BUFFER_SIZE))
160 {
161 at32_led_toggle(LED2);
162 at32_led_toggle(LED3);
163 at32_led_toggle(LED4);
164 delay_sec(1);
165 }
166 }
167}
168
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usart_configuration
void usart_configuration(void)
config usart
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:53
usart3_tx_counter
uint8_t usart3_tx_counter
Definition: project/at_start_f437/examples/usart/polling/src/main.c:47
usart2_tx_counter
uint8_t usart2_tx_counter
Definition: project/at_start_f437/examples/usart/polling/src/main.c:46
usart2_tx_buffer_size
uint8_t usart2_tx_buffer_size
Definition: project/at_start_f437/examples/usart/polling/src/main.c:50
usart3_rx_buffer
uint8_t usart3_rx_buffer[((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/polling/src/main.c:45
usart2_rx_counter
uint8_t usart2_rx_counter
Definition: project/at_start_f437/examples/usart/polling/src/main.c:48
USART2_TX_BUFFER_SIZE
#define USART2_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/polling/src/main.c:39
usart3_tx_buffer_size
uint8_t usart3_tx_buffer_size
Definition: project/at_start_f437/examples/usart/polling/src/main.c:51
usart2_tx_buffer
uint8_t usart2_tx_buffer[]
Definition: project/at_start_f437/examples/usart/polling/src/main.c:42
USART3_TX_BUFFER_SIZE
#define USART3_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/polling/src/main.c:40
usart3_tx_buffer
uint8_t usart3_tx_buffer[]
Definition: project/at_start_f437/examples/usart/polling/src/main.c:43
usart3_rx_counter
uint8_t usart3_rx_counter
Definition: project/at_start_f437/examples/usart/polling/src/main.c:49
usart2_rx_buffer
uint8_t usart2_rx_buffer[((sizeof(usart3_tx_buffer)/sizeof(*(usart3_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/polling/src/main.c:44
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART3_PERIPH_CLOCK
@ CRM_USART3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:141
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_parity_selection_config
void usart_parity_selection_config(usart_type *usart_x, usart_parity_selection_type parity)
usart parity selection config.
Definition: at32f435_437_usart.c:168
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_PARITY_NONE
@ USART_PARITY_NONE
Definition: at32f435_437_usart.h:94
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART3
#define USART3
Definition: at32f435_437_usart.h:350
USART2
#define USART2
Definition: at32f435_437_usart.h:349
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • printf
  • inc
project/at_start_f437/examples/usart/printf/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • printf
  • inc
project/at_start_f437/examples/usart/printf/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • printf
  • inc
project/at_start_f437/examples/usart/printf/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • printf
  • src
Functions
project/at_start_f437/examples/usart/printf/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/printf/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • printf
  • src
project/at_start_f437/examples/usart/printf/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/printf/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • printf
  • src
Functions
project/at_start_f437/examples/usart/printf/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/printf/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • printf
  • src
project/at_start_f437/examples/usart/printf/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • printf
  • src
Functions | Variables
project/at_start_f437/examples/usart/printf/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

__IO uint32_t time_cnt = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/printf/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • printf
  • src
project/at_start_f437/examples/usart/printf/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38__IO uint32_t time_cnt = 0;
39
45int main(void)
46{
47 system_clock_config();
48 at32_board_init();
49 uart_print_init(115200);
50
51 /* output a message on hyperterminal using printf function */
52 printf("usart printf example: retarget the c library printf function to the usart\r\n");
53
54 while(1)
55 {
56 printf("usart printf counter: %u\r\n",time_cnt++);
57 delay_sec(1);
58 }
59}
60
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
time_cnt
__IO uint32_t time_cnt
Definition: project/at_start_f437/examples/usart/printf/src/main.c:38
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • receiver_mute
  • inc
project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • receiver_mute
  • inc
project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • receiver_mute
  • inc
project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • receiver_mute
  • src
Functions
project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • receiver_mute
  • src
project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • receiver_mute
  • src
Functions | Variables
project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | USART3_IRQHandler (void)
this function handles usart3 handler. More...

Variables

uint8_t | usart3_rx_buffer []
uint8_t | rx_counter

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • receiver_mute
  • src
project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38extern uint8_t usart3_rx_buffer[];
39extern uint8_t rx_counter;
40
46void NMI_Handler(void)
47{
48}
49
55void HardFault_Handler(void)
56{
57 /* go to infinite loop when hard fault exception occurs */
58 while(1)
59 {
60 }
61}
62
68void MemManage_Handler(void)
69{
70 /* go to infinite loop when memory manage exception occurs */
71 while(1)
72 {
73 }
74}
75
81void BusFault_Handler(void)
82{
83 /* go to infinite loop when bus fault exception occurs */
84 while(1)
85 {
86 }
87}
88
94void UsageFault_Handler(void)
95{
96 /* go to infinite loop when usage fault exception occurs */
97 while(1)
98 {
99 }
100}
101
107void SVC_Handler(void)
108{
109}
110
116void DebugMon_Handler(void)
117{
118}
119
125void PendSV_Handler(void)
126{
127}
128
134void SysTick_Handler(void)
135{
136}
137
143void USART3_IRQHandler(void)
144{
145 if(usart_flag_get(USART3, USART_RDBF_FLAG) != RESET)
146 {
147 usart3_rx_buffer[rx_counter++] = usart_data_receive(USART3);
148 }
149}
150
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
USART3_IRQHandler
void USART3_IRQHandler(void)
this function handles usart3 handler.
Definition: project/at_start_f435/examples/usart/interrupt/src/at32f435_437_int.c:183
rx_counter
uint8_t rx_counter
Definition: project/at_start_f435/examples/usart/receiver_mute/src/main.c:49
usart3_rx_buffer
uint8_t usart3_rx_buffer[]
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:45
RESET
@ RESET
Definition: at32f435_437.h:378
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART3
#define USART3
Definition: at32f435_437_usart.h:350
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • receiver_mute
  • src
Macros | Functions | Variables
project/at_start_f437/examples/usart/receiver_mute/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | BUFFER_SIZE 7
#define | MATCH_ID_VAL 0x81
#define | ERROR_ID_VAL 0x82
#define | DATA1_VAL 0x7F
#define | DATA2_VAL 0x7A
#define | DATA3_VAL 0x7B
#define | DATA4_VAL 0x7C

Functions

void | usart_configuration (void)
config usart More...
int | main (void)
main function. More...

Variables

uint8_t | usart2_tx_buffer [7] = { 0x7F , 0x81 , 0x7A , 0x82 , 0x7B , 0x81 , 0x7C }
uint8_t | usart3_rx_buffer [7]
uint8_t | tx_counter = 0
uint8_t | rx_counter = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/receiver_mute/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • receiver_mute
  • src
project/at_start_f437/examples/usart/receiver_mute/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define BUFFER_SIZE 7
39#define MATCH_ID_VAL 0x81
40#define ERROR_ID_VAL 0x82
41#define DATA1_VAL 0x7F
42#define DATA2_VAL 0x7A
43#define DATA3_VAL 0x7B
44#define DATA4_VAL 0x7C
45
46uint8_t usart2_tx_buffer[BUFFER_SIZE] = {DATA1_VAL, MATCH_ID_VAL, DATA2_VAL, ERROR_ID_VAL, DATA3_VAL, MATCH_ID_VAL, DATA4_VAL};
47uint8_t usart3_rx_buffer[BUFFER_SIZE];
48uint8_t tx_counter = 0;
49uint8_t rx_counter = 0;
50
56void usart_configuration(void)
57{
58 gpio_init_type gpio_init_struct;
59
60 /* enable the usart2 and gpio clock */
61 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
62 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
63
64 /* enable the usart3 and gpio clock */
65 crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE);
66 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
67
68 gpio_default_para_init(&gpio_init_struct);
69
70 /* configure the usart2 tx pin */
71 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
72 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
73 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
74 gpio_init_struct.gpio_pins = GPIO_PINS_2;
75 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
76 gpio_init(GPIOA, &gpio_init_struct);
77 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
78
79 /* configure the usart3 rx pin */
80 gpio_init_struct.gpio_pins = GPIO_PINS_11;
81 gpio_init(GPIOB, &gpio_init_struct);
82 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_7);
83
84 /* configure usart2 param */
85 usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
86 usart_transmitter_enable(USART2, TRUE);
87 usart_enable(USART2, TRUE);
88
89 /* config usart3 nvic interrupt */
90 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
91 nvic_irq_enable(USART3_IRQn, 0 ,0);
92
93 /* configure usart3 param */
94 usart_init(USART3, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
95 usart_receiver_enable(USART3, TRUE);
96 usart_interrupt_enable(USART3, USART_RDBF_INT, TRUE);
97 usart_wakeup_id_set(USART3, 0x01);
98 usart_wakeup_mode_set(USART3, USART_WAKEUP_BY_MATCHING_ID);
99 usart_receiver_mute_enable(USART3, TRUE);
100 usart_enable(USART3, TRUE);
101}
102
108int main(void)
109{
110 system_clock_config();
111 at32_board_init();
112 usart_configuration();
113
114 /* usart2 transmit data */
115 while(tx_counter < BUFFER_SIZE)
116 {
117 while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
118 usart_data_transmit(USART2, usart2_tx_buffer[tx_counter++]);
119 }
120
121 /* wait usart2 data transmission complete */
122 while(usart_flag_get(USART2, USART_TDC_FLAG) == RESET);
123
124 while(1)
125 {
126 if((usart3_rx_buffer[0] == MATCH_ID_VAL) && (usart3_rx_buffer[1] == DATA2_VAL) && \
127 (usart3_rx_buffer[2] == MATCH_ID_VAL) && (usart3_rx_buffer[3] == DATA4_VAL))
128 {
129 at32_led_toggle(LED2);
130 at32_led_toggle(LED3);
131 at32_led_toggle(LED4);
132 delay_sec(1);
133 }
134 }
135}
136
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usart_configuration
void usart_configuration(void)
config usart
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:53
DATA4_VAL
#define DATA4_VAL
Definition: project/at_start_f437/examples/usart/receiver_mute/src/main.c:44
usart2_tx_buffer
uint8_t usart2_tx_buffer[7]
Definition: project/at_start_f437/examples/usart/receiver_mute/src/main.c:46
ERROR_ID_VAL
#define ERROR_ID_VAL
Definition: project/at_start_f437/examples/usart/receiver_mute/src/main.c:40
tx_counter
uint8_t tx_counter
Definition: project/at_start_f437/examples/usart/receiver_mute/src/main.c:48
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/receiver_mute/src/main.c:38
rx_counter
uint8_t rx_counter
Definition: project/at_start_f437/examples/usart/receiver_mute/src/main.c:49
DATA2_VAL
#define DATA2_VAL
Definition: project/at_start_f437/examples/usart/receiver_mute/src/main.c:42
DATA3_VAL
#define DATA3_VAL
Definition: project/at_start_f437/examples/usart/receiver_mute/src/main.c:43
MATCH_ID_VAL
#define MATCH_ID_VAL
Definition: project/at_start_f437/examples/usart/receiver_mute/src/main.c:39
usart3_rx_buffer
uint8_t usart3_rx_buffer[7]
Definition: project/at_start_f437/examples/usart/receiver_mute/src/main.c:47
DATA1_VAL
#define DATA1_VAL
Definition: project/at_start_f437/examples/usart/receiver_mute/src/main.c:41
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART3_PERIPH_CLOCK
@ CRM_USART3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:141
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_wakeup_id_set
void usart_wakeup_id_set(usart_type *usart_x, uint8_t usart_id)
set the wakeup id of the usart.
Definition: at32f435_437_usart.c:331
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_wakeup_mode_set
void usart_wakeup_mode_set(usart_type *usart_x, usart_wakeup_mode_type wakeup_mode)
select the usart wakeup method in multi-processor communication.
Definition: at32f435_437_usart.c:356
usart_interrupt_enable
void usart_interrupt_enable(usart_type *usart_x, uint32_t usart_int, confirm_state new_state)
enable or disable the specified usart interrupts.
Definition: at32f435_437_usart.c:287
usart_receiver_mute_enable
void usart_receiver_mute_enable(usart_type *usart_x, confirm_state new_state)
config the usart in mute mode in multi-processor communication.
Definition: at32f435_437_usart.c:370
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_WAKEUP_BY_MATCHING_ID
@ USART_WAKEUP_BY_MATCHING_ID
Definition: at32f435_437_usart.h:105
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART_TDC_FLAG
#define USART_TDC_FLAG
Definition: at32f435_437_usart.h:58
USART_RDBF_INT
#define USART_RDBF_INT
Definition: at32f435_437_usart.h:73
USART3
#define USART3
Definition: at32f435_437_usart.h:350
USART2
#define USART2
Definition: at32f435_437_usart.h:349
USART3_IRQn
@ USART3_IRQn
Definition: at32f435_437.h:187
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • rs485
  • inc
project/at_start_f437/examples/usart/rs485/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • rs485
  • inc
project/at_start_f437/examples/usart/rs485/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • rs485
  • inc
project/at_start_f437/examples/usart/rs485/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • rs485
  • src
Functions
project/at_start_f437/examples/usart/rs485/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/rs485/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • rs485
  • src
project/at_start_f437/examples/usart/rs485/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource */
71 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
72
73 /* enable pll */
74 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
75
76 /* wait till pll is ready */
77 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
78 {
79 }
80
81 /* config ahbclk */
82 crm_ahb_div_set(CRM_AHB_DIV_1);
83
84 /* config apb2clk */
85 crm_apb2_div_set(CRM_APB2_DIV_2);
86
87 /* config apb1clk */
88 crm_apb1_div_set(CRM_APB1_DIV_2);
89
90 /* enable auto step mode */
91 crm_auto_step_mode_enable(TRUE);
92
93 /* select pll as system clock source */
94 crm_sysclk_switch(CRM_SCLK_PLL);
95
96 /* wait till pll is used as system clock source */
97 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
98 {
99 }
100
101 /* disable auto step mode */
102 crm_auto_step_mode_enable(FALSE);
103
104 /* update system_core_clock global variable */
105 system_core_clock_update();
106}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/rs485/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • rs485
  • src
Functions
project/at_start_f437/examples/usart/rs485/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/rs485/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • rs485
  • src
project/at_start_f437/examples/usart/rs485/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • rs485
  • src
Macros | Functions | Variables
project/at_start_f437/examples/usart/rs485/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | RS485_BAUDRATE 9600
#define | RS485_BUFFER_SIZE 128

Functions

static void | rs485_config (void)
rs485 configiguration. More...
static void | rs485_send_data (u8 *buf, u8 cnt)
rs485 send data More...
int | main (void)
main function. More...
void | USART2_IRQHandler (void)
usart2 interrupt handler More...

Variables

uint8_t | rs485_buffer_rx [128]
uint8_t | rs485_buffer_rx_cnt = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/rs485/src/main.c.

Function Documentation

◆ rs485_config()

static void rs485_config ( void )
static

rs485 configiguration.

Parameters
none
Return values
none

< gpio pins number 2

< gpio pins number 3

< gpio pins number 1

< usart receive data buffer full flag

< usart receive data buffer full interrupt

Definition at line 49 of file project/at_start_f437/examples/usart/rs485/src/main.c.

◆ rs485_send_data()

static void rs485_send_data | ( | u8 * | buf,
 |  | u8 | cnt
 | ) |  |
static

rs485 send data

Parameters
buf | pointer to the buffer that contain the data to be transferred.
cnt | size of buffer in bytes.
Return values
none

< usart transmit data buffer empty flag

Definition at line 97 of file project/at_start_f437/examples/usart/rs485/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • rs485
  • src
project/at_start_f437/examples/usart/rs485/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define RS485_BAUDRATE 9600
39#define RS485_BUFFER_SIZE 128
40
41uint8_t rs485_buffer_rx[RS485_BUFFER_SIZE];
42uint8_t rs485_buffer_rx_cnt = 0;
43
49static void rs485_config(void)
50{
51 gpio_init_type gpio_init_struct;
52
53 /* enable the uart2 and gpio clock */
54 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
55 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
56
57 gpio_default_para_init(&gpio_init_struct);
58
59 /* configure the uart2 tx,rx,de pin */
60 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
61 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
62 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
63 gpio_init_struct.gpio_pins = GPIO_PINS_2|GPIO_PINS_3;
64 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
65 gpio_init(GPIOA, &gpio_init_struct);
66
67 gpio_init_struct.gpio_pins = GPIO_PINS_1;
68 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
69 gpio_init(GPIOA, &gpio_init_struct);
70
71 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_7);
72 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
73 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7);
74
75 /* configure uart2 param */
76 usart_init(USART2, RS485_BAUDRATE, USART_DATA_8BITS, USART_STOP_1_BIT);
77 usart_rs485_delay_time_config(USART2, 2, 2);
78 usart_de_polarity_set(USART2, USART_DE_POLARITY_HIGH);
79 usart_rs485_mode_enable(USART2, TRUE);
80
81 usart_flag_clear(USART2, USART_RDBF_FLAG);
82 usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE);
83
84 usart_receiver_enable(USART2, TRUE);
85 usart_transmitter_enable(USART2, TRUE);
86 usart_enable(USART2, TRUE);
87
88 nvic_irq_enable(USART2_IRQn, 1, 0);
89}
90
97static void rs485_send_data(u8* buf, u8 cnt)
98{
99 while(cnt--){
100 while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
101 usart_data_transmit(USART2, *buf++);
102 }
103}
104
110int main(void)
111{
112 char str[]="start test..\r\n";
113 u8 len = 0;
114
115 system_clock_config();
116 at32_board_init();
117 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
118
119 rs485_config();
120
121 len = sizeof(str);
122 rs485_send_data((u8*)str, len);
123 while(1)
124 {
125 if(usart_flag_get(USART2, USART_IDLEF_FLAG) != RESET)
126 {
127 usart_data_receive(USART2);
128 usart_interrupt_enable(USART2, USART_RDBF_INT, FALSE);
129 rs485_send_data(rs485_buffer_rx, rs485_buffer_rx_cnt);
130 rs485_buffer_rx_cnt = 0;
131 usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE);
132 }
133 }
134}
135
141void USART2_IRQHandler(void)
142{
143 uint16_t tmp;
144
145 if(usart_flag_get(USART2, USART_RDBF_FLAG) != RESET)
146 {
147 tmp = usart_data_receive(USART2);
148 if(rs485_buffer_rx_cnt < RS485_BUFFER_SIZE)
149 {
150 rs485_buffer_rx[rs485_buffer_rx_cnt++] = tmp;
151 }
152 }
153}
154
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
USART2_IRQHandler
void USART2_IRQHandler(void)
this function handles usart2 handler.
Definition: project/at_start_f435/examples/usart/idle_detection/src/at32f435_437_int.c:141
RS485_BAUDRATE
#define RS485_BAUDRATE
Definition: project/at_start_f437/examples/usart/rs485/src/main.c:38
rs485_buffer_rx
uint8_t rs485_buffer_rx[128]
Definition: project/at_start_f437/examples/usart/rs485/src/main.c:41
RS485_BUFFER_SIZE
#define RS485_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/rs485/src/main.c:39
rs485_buffer_rx_cnt
uint8_t rs485_buffer_rx_cnt
Definition: project/at_start_f437/examples/usart/rs485/src/main.c:42
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
u8
uint8_t u8
Definition: at32f435_437.h:364
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
usart_rs485_mode_enable
void usart_rs485_mode_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the usart's rs485 mode.
Definition: at32f435_437_usart.c:715
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_de_polarity_set
void usart_de_polarity_set(usart_type *usart_x, usart_de_polarity_type de_polarity)
set the usart's de polarity.
Definition: at32f435_437_usart.c:701
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_flag_clear
void usart_flag_clear(usart_type *usart_x, uint32_t flag)
clear the usart's pending flags.
Definition: at32f435_437_usart.c:636
usart_interrupt_enable
void usart_interrupt_enable(usart_type *usart_x, uint32_t usart_int, confirm_state new_state)
enable or disable the specified usart interrupts.
Definition: at32f435_437_usart.c:287
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
usart_rs485_delay_time_config
void usart_rs485_delay_time_config(usart_type *usart_x, uint8_t start_delay_time, uint8_t complete_delay_time)
configure the usart's rs485 transmit delay time.
Definition: at32f435_437_usart.c:658
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_DE_POLARITY_HIGH
@ USART_DE_POLARITY_HIGH
Definition: at32f435_437_usart.h:190
USART_IDLEF_FLAG
#define USART_IDLEF_FLAG
Definition: at32f435_437_usart.h:56
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART_RDBF_INT
#define USART_RDBF_INT
Definition: at32f435_437_usart.h:73
USART2
#define USART2
Definition: at32f435_437_usart.h:349
USART2_IRQn
@ USART2_IRQn
Definition: at32f435_437.h:186
rs485_send_data
static void rs485_send_data(u8 *buf, u8 cnt)
rs485 send data
Definition: project/at_start_f437/examples/usart/rs485/src/main.c:97
rs485_config
static void rs485_config(void)
rs485 configiguration.
Definition: project/at_start_f437/examples/usart/rs485/src/main.c:49
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • smartcard
  • inc
project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • smartcard
  • inc
project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • smartcard
  • inc
project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • smartcard
  • src
Functions
project/at_start_f437/examples/usart/smartcard/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/smartcard/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • smartcard
  • src
project/at_start_f437/examples/usart/smartcard/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/smartcard/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • smartcard
  • src
Functions | Variables
project/at_start_f437/examples/usart/smartcard/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "smartcard_config.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | EXINT9_5_IRQHandler (void)
this function handles external lines 9 to 5 interrupt request. More...
void | SC_USART_IRQHandler (void)
this function handles sc_usart global interrupt request. More...

Variables

uint32_t card_inserted

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/smartcard/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • smartcard
  • src
project/at_start_f437/examples/usart/smartcard/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "smartcard_config.h"
30
39extern uint32_t card_inserted;
40
46void NMI_Handler(void)
47{
48}
49
55void HardFault_Handler(void)
56{
57 /* go to infinite loop when hard fault exception occurs */
58 while(1)
59 {
60 }
61}
62
68void MemManage_Handler(void)
69{
70 /* go to infinite loop when memory manage exception occurs */
71 while(1)
72 {
73 }
74}
75
81void BusFault_Handler(void)
82{
83 /* go to infinite loop when bus fault exception occurs */
84 while(1)
85 {
86 }
87}
88
94void UsageFault_Handler(void)
95{
96 /* go to infinite loop when usage fault exception occurs */
97 while(1)
98 {
99 }
100}
101
107void SVC_Handler(void)
108{
109}
110
116void DebugMon_Handler(void)
117{
118}
119
125void PendSV_Handler(void)
126{
127}
128
134void SysTick_Handler(void)
135{
136}
137
143void EXINT9_5_IRQHandler(void)
144{
145 /* reset smart card cmdvcc */
146 gpio_bits_reset(SC_CMDVCC_PORT, SC_CMDVCC_PIN);
147
148 /* rst low */
149 gpio_bits_reset(SC_RESET_PORT, SC_RESET_PIN);
150
151 /* rst high */
152 gpio_bits_set(SC_RESET_PORT, SC_RESET_PIN);
153
154 /* clear sc exint line pending bit */
155 exint_flag_clear(SC_OFF_EXINT);
156
157 /* smart card detected */
158 card_inserted = 1;
159}
160
166void SC_USART_IRQHandler(void)
167{
168 /* if the sc_usart detects a parity error */
169 if(usart_flag_get(SC_USART, USART_PERR_FLAG) != RESET)
170 {
171 /* enable sc_usart rdbf interrupt (until receiving the corrupted byte) */
172 usart_interrupt_enable(SC_USART, USART_RDBF_INT, TRUE);
173 /* flush the sc_usart dr register */
174 usart_data_receive(SC_USART);
175 }
176
177 if(usart_flag_get(SC_USART, USART_RDBF_FLAG) != RESET)
178 {
179 /* disable sc_usart rdbf interrupt */
180 usart_interrupt_enable(SC_USART, USART_RDBF_INT, FALSE);
181 usart_data_receive(SC_USART);
182 }
183}
184
SC_RESET_PIN
#define SC_RESET_PIN
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:44
SC_RESET_PORT
#define SC_RESET_PORT
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:48
SC_OFF_EXINT
#define SC_OFF_EXINT
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:55
SC_USART
#define SC_USART
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:32
SC_CMDVCC_PORT
#define SC_CMDVCC_PORT
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:49
SC_CMDVCC_PIN
#define SC_CMDVCC_PIN
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:45
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
EXINT9_5_IRQHandler
void EXINT9_5_IRQHandler(void)
this function handles external lines 9 to 5 interrupt request.
Definition: project/at_start_f435/examples/usart/smartcard/src/at32f435_437_int.c:143
SC_USART_IRQHandler
void SC_USART_IRQHandler(void)
this function handles sc_usart global interrupt request.
Definition: project/at_start_f435/examples/usart/smartcard/src/at32f435_437_int.c:166
card_inserted
uint32_t card_inserted
Definition: project/at_start_f435/examples/usart/smartcard/src/main.c:63
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_interrupt_enable
void usart_interrupt_enable(usart_type *usart_x, uint32_t usart_int, confirm_state new_state)
enable or disable the specified usart interrupts.
Definition: at32f435_437_usart.c:287
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
USART_PERR_FLAG
#define USART_PERR_FLAG
Definition: at32f435_437_usart.h:52
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART_RDBF_INT
#define USART_RDBF_INT
Definition: at32f435_437_usart.h:73
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • smartcard
  • src
Data Structures | Macros | Functions | Variables
project/at_start_f437/examples/usart/smartcard/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "smartcard_config.h"

Go to the source code of this file.

Data Structures

struct sc_atr_type

Macros

#define | T0_PROTOCOL 0x00 /* t0 protocol */
#define | SETUP_LENGTH 20
#define | HIST_LENGTH 20
#define | SC_RECEIVE_TIMEOUT 0xA000 /* direction to reader */
#define | SC_USART_DIV_VAL 20 /* ISO 7816-3 protocol: SC_CLOCK_FREQ(PCLK/(2*USART_DIV_VAL)) is between 1 and 5 MHz */
#define | SC_F_DIV_D 372 /* ISO 7816-3 protocol: F/D = 372 */

Functions

void | usart_configuration (void)
config usart More...
uint8_t | sc_response_decode (__IO uint8_t *card)
decode the card atr response. More...
int | main (void)
main function. More...

Variables

sc_atr_type sc_a2r_struct
uint32_t | sc_baud_rate = 0
uint32_t | sc_clock_freq = 0
uint32_t | counter = 0
error_status atr_decode_status = ERROR
uint32_t | card_inserted = 0
uint32_t | card_protocol = 1
uint8_t | dst_buffer [50]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/smartcard/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • smartcard
  • src
project/at_start_f437/examples/usart/smartcard/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "smartcard_config.h"
30
39#define T0_PROTOCOL 0x00 /* t0 protocol */
40#define SETUP_LENGTH 20
41#define HIST_LENGTH 20
42#define SC_RECEIVE_TIMEOUT 0xA000 /* direction to reader */
43
44#define SC_USART_DIV_VAL 20 /* ISO 7816-3 protocol: SC_CLOCK_FREQ(PCLK/(2*USART_DIV_VAL)) is between 1 and 5 MHz */
45#define SC_F_DIV_D 372 /* ISO 7816-3 protocol: F/D = 372 */
46
47/* atr structure - answer to reset */
48typedef struct
49{
50 uint8_t ts; /* bit convention */
51 uint8_t t0; /* high nibble = n. of setup byte; low nibble = n. of historical byte */
52 uint8_t t[SETUP_LENGTH]; /* setup array */
53 uint8_t h[HIST_LENGTH]; /* historical array */
54 uint8_t tlength; /* setup array dimension */
55 uint8_t hlength; /* historical array dimension */
56} sc_atr_type;
57
58 sc_atr_type sc_a2r_struct;
59uint32_t sc_baud_rate = 0;
60uint32_t sc_clock_freq = 0;
61uint32_t counter = 0;
62 error_status atr_decode_status = ERROR;
63uint32_t card_inserted = 0, card_protocol = 1;
64uint8_t dst_buffer[50]= {
65 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
66 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
67 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
68 };
69
75void usart_configuration(void)
76{
77 gpio_init_type gpio_init_struct;
78 exint_init_type exint_init_struct;
79 crm_clocks_freq_type crm_clocks_struct;
80
81 /* enable gpio_3_5v, sc_usart_gpio_clk, gpio_reset, gpio_cmdvcc, gpio_off and iomux clocks */
82 crm_periph_clock_enable(SC_3_5V_CLK, TRUE);
83 crm_periph_clock_enable(SC_USART_GPIO_CLK, TRUE);
84 crm_periph_clock_enable(SC_RESET_CLK, TRUE);
85 crm_periph_clock_enable(SC_CMDVCC_CLK, TRUE);
86 crm_periph_clock_enable(SC_OFF_CLK, TRUE);
87
88 /* enable sc_usart clocks */
89 crm_periph_clock_enable(SC_USART_CLK, TRUE);
90
91 gpio_default_para_init(&gpio_init_struct);
92 /* configure sc_usart ck pin */
93 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
94 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
95 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
96 gpio_init_struct.gpio_pins = SC_USART_CLK_PIN;
97 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
98 gpio_init(SC_USART_CLK_PORT, &gpio_init_struct);
99 gpio_pin_mux_config(SC_USART_CLK_PORT, GPIO_PINS_SOURCE4, GPIO_MUX_7);
100
101 /* configure sc_usart tx pin */
102 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
103 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
104 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
105 gpio_init_struct.gpio_pins = SC_USART_TX_PIN;
106 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
107 gpio_init(SC_USART_TX_PORT, &gpio_init_struct);
108 gpio_pin_mux_config(SC_USART_TX_PORT, GPIO_PINS_SOURCE2, GPIO_MUX_7);
109
110 /* configure smartcard reset pin */
111 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
112 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
113 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
114 gpio_init_struct.gpio_pins = SC_RESET_PIN;
115 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
116 gpio_init(SC_RESET_PORT, &gpio_init_struct);
117
118 /* set reset pin high */
119 gpio_bits_set(SC_RESET_PORT, SC_RESET_PIN);
120
121 /* configure smartcard 3/5v pin */
122 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
123 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
124 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
125 gpio_init_struct.gpio_pins = SC_3_5V_PIN;
126 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
127 gpio_init(SC_3_5V_PORT, &gpio_init_struct);
128
129 /* select 5 v */
130 gpio_bits_set(SC_3_5V_PORT, SC_3_5V_PIN);
131
132 /* configure smartcard cmdvcc pin */
133 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
134 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
135 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
136 gpio_init_struct.gpio_pins = SC_CMDVCC_PIN;
137 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
138 gpio_init(SC_CMDVCC_PORT, &gpio_init_struct);
139
140 /* set smartcard cmdvcc */
141 gpio_bits_set(SC_CMDVCC_PORT, SC_CMDVCC_PIN);
142
143 /* configure smartcard off pin */
144 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
145 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
146 gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
147 gpio_init_struct.gpio_pins = SC_OFF_PIN;
148 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
149 gpio_init(SC_OFF_PORT, &gpio_init_struct);
150
151 /* nvic interrupt init */
152 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
153 NVIC_ClearPendingIRQ(SC_OFF_EXINT_IRQ);
154 nvic_irq_enable(SC_OFF_EXINT_IRQ, 0, 0);
155 nvic_irq_enable(SC_USART_IRQn, 1, 0);
156
157 /* configure smartcard off exint */
158 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
159 scfg_exint_line_config(SC_OFF_PORTSOURCE, SC_OFF_PINSOURCE);
160
161 exint_default_para_init(&exint_init_struct);
162 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
163 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
164 exint_init_struct.line_select = SC_OFF_EXINT;
165 exint_init_struct.line_enable = TRUE;
166 exint_init(&exint_init_struct);
167
168 /* clear sc exint line pending bit */
169 exint_flag_clear(SC_OFF_EXINT);
170
171 /* sc_usart clock set to (apbclk / (2 * SC_USART_DIV_VAL)) */
172 usart_irda_smartcard_division_set(SC_USART, SC_USART_DIV_VAL);
173 /* sc_usart guard time set to 2 bit */
174 usart_smartcard_guard_time_set(SC_USART, 0x2);
175
176 /* configure sc usart clk */
177 usart_clock_config(SC_USART, USART_CLOCK_POLARITY_LOW, USART_CLOCK_PHASE_1EDGE, USART_CLOCK_LAST_BIT_OUTPUT);
178 usart_clock_enable(SC_USART, TRUE);
179
180 crm_clocks_freq_get(&crm_clocks_struct);
181 sc_clock_freq = crm_clocks_struct.apb1_freq / (2 * SC_USART_DIV_VAL); /* ISO 7816-3 protocol: the CLK frequency is between 1 and 5 MHz */
182 sc_baud_rate = sc_clock_freq / SC_F_DIV_D;
183 /* configure sc usart param */
184 usart_init(SC_USART, sc_baud_rate, USART_DATA_9BITS, USART_STOP_1_5_BIT);
185 usart_parity_selection_config(SC_USART, USART_PARITY_EVEN);
186 usart_transmitter_enable(SC_USART, TRUE);
187 usart_receiver_enable(SC_USART, TRUE);
188
189 /* enable the sc_usart parity error interrupt */
190 usart_interrupt_enable(SC_USART, USART_PERR_INT, TRUE);
191 usart_enable(SC_USART, TRUE);
192
193 /* enable the nack transmission */
194 usart_smartcard_nack_set(SC_USART, TRUE);
195
196 /* enable the smartcard mode */
197 usart_smartcard_mode_enable(SC_USART, TRUE);
198}
199
205uint8_t sc_response_decode(__IO uint8_t *card)
206{
207 uint32_t i = 0, flag = 0, buf = 0, protocol = 0;
208
209 sc_a2r_struct.ts = 0;
210 sc_a2r_struct.t0 = 0;
211 for(i = 0; i < SETUP_LENGTH; i++)
212 {
213 sc_a2r_struct.t[i] = 0;
214 }
215 for(i = 0;i < HIST_LENGTH; i++)
216 {
217 sc_a2r_struct.h[i] = 0;
218 }
219 sc_a2r_struct.tlength = 0;
220 sc_a2r_struct.hlength = 0;
221
222 /* initial character */
223 sc_a2r_struct.ts = card[0];
224
225 /* format character */
226 sc_a2r_struct.t0 = card[1];
227
228 sc_a2r_struct.hlength = sc_a2r_struct.t0 & 0x0F;
229
230 if((sc_a2r_struct.t0 & 0x80) == 0x80) flag = 1;
231
232 for(i = 0; i < 4; i++)
233 {
234 sc_a2r_struct.tlength = sc_a2r_struct.tlength + (((sc_a2r_struct.t0 & 0xF0) >> (4 + i)) & 0x1);
235 }
236
237 for(i = 0; i < sc_a2r_struct.tlength; i++)
238 {
239 sc_a2r_struct.t[i] = card[i + 2];
240 }
241
242 protocol = sc_a2r_struct.t[sc_a2r_struct.tlength - 1] & 0x0F;
243
244 while(flag)
245 {
246 if((sc_a2r_struct.t[sc_a2r_struct.tlength - 1] & 0x80)== 0x80)
247 {
248 flag = 1;
249 }
250 else
251 {
252 flag = 0;
253 }
254 buf = sc_a2r_struct.tlength;
255 sc_a2r_struct.tlength = 0;
256
257 for(i = 0; i < 4; i++)
258 {
259 sc_a2r_struct.tlength = sc_a2r_struct.tlength + (((sc_a2r_struct.t[buf - 1] & 0xF0) >> (4 + i)) & 0x1);
260 }
261 for(i = 0; i < sc_a2r_struct.tlength; i++)
262 {
263 sc_a2r_struct.t[buf + i] = card[i + 2 + buf];
264 }
265 sc_a2r_struct.tlength += buf;
266 }
267
268 for(i = 0;i < sc_a2r_struct.hlength; i++)
269 {
270 sc_a2r_struct.h[i] = card[i + 2 + sc_a2r_struct.tlength];
271 }
272
273 return ((uint8_t)protocol);
274}
275
281int main(void)
282{
283 uint32_t index = 0;
284 system_clock_config();
285 at32_board_init();
286 usart_configuration();
287
288 /* loop while no smartcard is detected */
289 while(card_inserted == 0)
290 {
291 }
292
293 /* read smartcard atr response */
294 for(index = 0; index < 40; index++, counter = 0)
295 {
296 while((usart_flag_get(SC_USART, USART_RDBF_FLAG) == RESET) && (counter != SC_RECEIVE_TIMEOUT))
297 {
298 counter++;
299 }
300
301 if(counter != SC_RECEIVE_TIMEOUT)
302 {
303 dst_buffer[index] = usart_data_receive(SC_USART);
304 }
305 }
306
307 /* decode atr */
308 card_protocol = sc_response_decode(dst_buffer);
309
310 /* test if the inserted card is iso7816-3 t=0 compatible */
311 if(card_protocol == 0)
312 {
313 /* inserted card is iso7816-3 t=0 compatible */
314 atr_decode_status = SUCCESS;
315 }
316 else
317 {
318 /* inserted smartcard is not iso7816-3 t=0 compatible */
319 atr_decode_status = ERROR;
320 }
321
322 /* judge whether the result is correct */
323 if(atr_decode_status == SUCCESS)
324 {
325 /* trun on the led */
326 at32_led_on(LED2);
327 at32_led_on(LED3);
328 at32_led_on(LED4);
329 }
330
331 while(1)
332 {
333 }
334}
335
at32f435_437_board.h
SC_RESET_PIN
#define SC_RESET_PIN
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:44
SC_USART_TX_PIN
#define SC_USART_TX_PIN
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:35
SC_RESET_PORT
#define SC_RESET_PORT
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:48
SC_3_5V_PORT
#define SC_3_5V_PORT
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:47
SC_RESET_CLK
#define SC_RESET_CLK
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:52
SC_USART_CLK_PIN
#define SC_USART_CLK_PIN
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:37
SC_OFF_EXINT
#define SC_OFF_EXINT
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:55
SC_USART
#define SC_USART
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:32
SC_OFF_CLK
#define SC_OFF_CLK
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:54
SC_CMDVCC_CLK
#define SC_CMDVCC_CLK
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:53
SC_USART_GPIO_CLK
#define SC_USART_GPIO_CLK
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:34
SC_3_5V_PIN
#define SC_3_5V_PIN
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:43
SC_OFF_PIN
#define SC_OFF_PIN
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:46
SC_CMDVCC_PORT
#define SC_CMDVCC_PORT
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:49
SC_USART_IRQn
#define SC_USART_IRQn
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:39
SC_USART_CLK_PORT
#define SC_USART_CLK_PORT
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:38
SC_3_5V_CLK
#define SC_3_5V_CLK
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:51
SC_USART_TX_PORT
#define SC_USART_TX_PORT
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:36
SC_OFF_PORTSOURCE
#define SC_OFF_PORTSOURCE
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:56
SC_OFF_EXINT_IRQ
#define SC_OFF_EXINT_IRQ
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:58
SC_USART_CLK
#define SC_USART_CLK
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:33
SC_CMDVCC_PIN
#define SC_CMDVCC_PIN
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:45
SC_OFF_PORT
#define SC_OFF_PORT
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:50
SC_OFF_PINSOURCE
#define SC_OFF_PINSOURCE
Definition: at_start_f435/examples/usart/smartcard/inc/smartcard_config.h:57
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usart_configuration
void usart_configuration(void)
config usart
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:53
sc_baud_rate
uint32_t sc_baud_rate
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:59
sc_response_decode
uint8_t sc_response_decode(__IO uint8_t *card)
decode the card atr response.
Definition: project/at_start_f435/examples/usart/smartcard/src/main.c:205
card_protocol
uint32_t card_protocol
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:63
counter
uint32_t counter
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:61
SETUP_LENGTH
#define SETUP_LENGTH
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:40
SC_USART_DIV_VAL
#define SC_USART_DIV_VAL
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:44
sc_a2r_struct
sc_atr_type sc_a2r_struct
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:58
SC_F_DIV_D
#define SC_F_DIV_D
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:45
atr_decode_status
error_status atr_decode_status
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:62
card_inserted
uint32_t card_inserted
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:63
dst_buffer
uint8_t dst_buffer[50]
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:64
SC_RECEIVE_TIMEOUT
#define SC_RECEIVE_TIMEOUT
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:42
sc_clock_freq
uint32_t sc_clock_freq
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:60
HIST_LENGTH
#define HIST_LENGTH
Definition: project/at_start_f437/examples/usart/smartcard/src/main.c:41
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_INPUT
@ GPIO_MODE_INPUT
Definition: at32f435_437_gpio.h:82
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
usart_clock_enable
void usart_clock_enable(usart_type *usart_x, confirm_state new_state)
usart enable the ck pin.
Definition: at32f435_437_usart.c:263
usart_smartcard_nack_set
void usart_smartcard_nack_set(usart_type *usart_x, confirm_state new_state)
enable or disable nack transmission in smartcard mode.
Definition: at32f435_437_usart.c:495
usart_clock_config
void usart_clock_config(usart_type *usart_x, usart_clock_polarity_type clk_pol, usart_clock_phase_type clk_pha, usart_lbcp_type clk_lb)
usart clock config.
Definition: at32f435_437_usart.c:247
usart_parity_selection_config
void usart_parity_selection_config(usart_type *usart_x, usart_parity_selection_type parity)
usart parity selection config.
Definition: at32f435_437_usart.c:168
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_irda_smartcard_division_set
void usart_irda_smartcard_division_set(usart_type *usart_x, uint8_t div_val)
config the irda/smartcard division.
Definition: at32f435_437_usart.c:465
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_smartcard_guard_time_set
void usart_smartcard_guard_time_set(usart_type *usart_x, uint8_t guard_time_val)
config the specified usart smartcard guard time.
Definition: at32f435_437_usart.c:451
usart_interrupt_enable
void usart_interrupt_enable(usart_type *usart_x, uint32_t usart_int, confirm_state new_state)
enable or disable the specified usart interrupts.
Definition: at32f435_437_usart.c:287
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
usart_smartcard_mode_enable
void usart_smartcard_mode_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the usart smart card mode.
Definition: at32f435_437_usart.c:480
USART_CLOCK_POLARITY_LOW
@ USART_CLOCK_POLARITY_LOW
Definition: at32f435_437_usart.h:141
USART_STOP_1_5_BIT
@ USART_STOP_1_5_BIT
Definition: at32f435_437_usart.h:162
USART_DATA_9BITS
@ USART_DATA_9BITS
Definition: at32f435_437_usart.h:115
USART_PARITY_EVEN
@ USART_PARITY_EVEN
Definition: at32f435_437_usart.h:95
USART_CLOCK_LAST_BIT_OUTPUT
@ USART_CLOCK_LAST_BIT_OUTPUT
Definition: at32f435_437_usart.h:151
USART_CLOCK_PHASE_1EDGE
@ USART_CLOCK_PHASE_1EDGE
Definition: at32f435_437_usart.h:132
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART_PERR_INT
#define USART_PERR_INT
Definition: at32f435_437_usart.h:76
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::apb1_freq
uint32_t apb1_freq
Definition: at32f435_437_crm.h:792
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
sc_atr_type
Definition: project/at_start_f435/examples/usart/smartcard/src/main.c:49
sc_atr_type::t
uint8_t t[20]
Definition: project/at_start_f435/examples/usart/smartcard/src/main.c:52
sc_atr_type::h
uint8_t h[20]
Definition: project/at_start_f435/examples/usart/smartcard/src/main.c:53
sc_atr_type::ts
uint8_t ts
Definition: project/at_start_f435/examples/usart/smartcard/src/main.c:50
sc_atr_type::tlength
uint8_t tlength
Definition: project/at_start_f435/examples/usart/smartcard/src/main.c:54
sc_atr_type::hlength
uint8_t hlength
Definition: project/at_start_f435/examples/usart/smartcard/src/main.c:55
sc_atr_type::t0
uint8_t t0
Definition: project/at_start_f435/examples/usart/smartcard/src/main.c:51
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • synchronous
  • inc
project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • synchronous
  • inc
project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • synchronous
  • inc
project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • synchronous
  • src
Functions
project/at_start_f437/examples/usart/synchronous/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/synchronous/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • synchronous
  • src
project/at_start_f437/examples/usart/synchronous/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/synchronous/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • synchronous
  • src
Functions
project/at_start_f437/examples/usart/synchronous/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/synchronous/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • synchronous
  • src
project/at_start_f437/examples/usart/synchronous/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • synchronous
  • src
Macros | Functions | Variables
project/at_start_f437/examples/usart/synchronous/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | COUNTOF(a) (sizeof(a) / sizeof(*(a)))
#define | USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
#define | SPI1_TX_BUFFER_SIZE (COUNTOF(spi1_tx_buffer) - 1)
#define | DYMMY_BYTE 0x00

Functions

void | usart_spi_configuration (void)
config usart and spi More...
uint8_t | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
compares two buffers. More...
int | main (void)
main function. More...

Variables

uint8_t | usart2_tx_buffer [] = "usart synchronous example: usart2 -> spi1"
uint8_t | spi1_tx_buffer [] = "usart synchronous example: spi1 -> usart2"
uint8_t | usart2_rx_buffer [((sizeof(spi1_tx_buffer)/sizeof(*(spi1_tx_buffer))) - 1)]
uint8_t | spi1_rx_buffer [((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
uint8_t | usart2_tx_counter = 0x00
uint8_t | spi1_tx_counter = 0x00
uint8_t | usart2_rx_counter = 0x00
uint8_t | spi1_rx_counter = 0x00
uint8_t | usart2_tx_buffer_size = ((sizeof( usart2_tx_buffer ) / sizeof(*( usart2_tx_buffer ))) - 1)
uint8_t | spi1_tx_buffer_size = ((sizeof( spi1_tx_buffer ) / sizeof(*( spi1_tx_buffer ))) - 1)

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/synchronous/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • synchronous
  • src
project/at_start_f437/examples/usart/synchronous/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define COUNTOF(a) (sizeof(a) / sizeof(*(a)))
39#define USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
40#define SPI1_TX_BUFFER_SIZE (COUNTOF(spi1_tx_buffer) - 1)
41#define DYMMY_BYTE 0x00
42
43uint8_t usart2_tx_buffer[] = "usart synchronous example: usart2 -> spi1";
44uint8_t spi1_tx_buffer[] = "usart synchronous example: spi1 -> usart2";
45uint8_t usart2_rx_buffer[SPI1_TX_BUFFER_SIZE];
46uint8_t spi1_rx_buffer[USART2_TX_BUFFER_SIZE];
47uint8_t usart2_tx_counter = 0x00;
48uint8_t spi1_tx_counter = 0x00;
49uint8_t usart2_rx_counter = 0x00;
50uint8_t spi1_rx_counter = 0x00;
51uint8_t usart2_tx_buffer_size = USART2_TX_BUFFER_SIZE;
52uint8_t spi1_tx_buffer_size = SPI1_TX_BUFFER_SIZE;
53
59void usart_spi_configuration(void)
60{
61 gpio_init_type gpio_init_struct;
62 spi_init_type spi_init_struct;
63
64 /* enable the usart2 and gpio clock */
65 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
66 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
67
68 /* enable the spi1 and gpio clock */
69 crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
70 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
71
72 gpio_default_para_init(&gpio_init_struct);
73
74 /* configure the usart2 tx, rx and ck pin */
75 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
76 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
77 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
78 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3 | GPIO_PINS_4;
79 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
80 gpio_init(GPIOA, &gpio_init_struct);
81 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
82 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7);
83 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE4, GPIO_MUX_7);
84
85 /* configure the spi1 mosi, miso and ck pin */
86 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
87 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
88 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
89 gpio_init_struct.gpio_pins = GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7;
90 gpio_init_struct.gpio_pull = GPIO_PULL_UP;
91 gpio_init(GPIOA, &gpio_init_struct);
92 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE5, GPIO_MUX_5);
93 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_5);
94 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_5);
95
96 /* configure usart2 param */
97 usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
98 usart_clock_config(USART2, USART_CLOCK_POLARITY_HIGH, USART_CLOCK_PHASE_2EDGE, USART_CLOCK_LAST_BIT_OUTPUT);
99 usart_clock_enable(USART2, TRUE);
100 usart_transmitter_enable(USART2, TRUE);
101 usart_receiver_enable(USART2, TRUE);
102 usart_enable(USART2, TRUE);
103
104 /* configure spi1 param */
105 spi_default_para_init(&spi_init_struct);
106 spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
107 spi_init_struct.master_slave_mode =SPI_MODE_SLAVE;
108 spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB;
109 spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
110 spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_HIGH;
111 spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
112 spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
113 spi_init(SPI1, &spi_init_struct);
114 spi_enable(SPI1, TRUE);
115}
116
124uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
125{
126 while(buffer_length--)
127 {
128 if(*pbuffer1 != *pbuffer2)
129 {
130 return 0;
131 }
132 pbuffer1++;
133 pbuffer2++;
134 }
135 return 1;
136}
137
143int main(void)
144{
145 system_clock_config();
146 at32_board_init();
147 usart_spi_configuration();
148
149 /* wait until end of transmission from usart2 to spi1 */
150 while(spi1_rx_counter < usart2_tx_buffer_size)
151 {
152 /* usart transmit data */
153 while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
154 usart_data_transmit(USART2, usart2_tx_buffer[usart2_tx_counter++]);
155
156 /* wait until spi receive data */
157 while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET);
158 spi1_rx_buffer[spi1_rx_counter++] = spi_i2s_data_receive(SPI1);
159
160 /* wait until usart receive data, and clear dummy byte in data register */
161 while(usart_flag_get(USART2, USART_RDBF_FLAG) == RESET);
162 usart_data_receive(USART2);
163 }
164
165 /* wait until end of transmission from spi1 to usart2 */
166 while(usart2_rx_counter < spi1_tx_buffer_size)
167 {
168 /* spi put transmit data in data register */
169 while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
170 spi_i2s_data_transmit(SPI1, spi1_tx_buffer[spi1_tx_counter++]);
171
172 /* usart transmit a dummy byte to generate clock to slave */
173 while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
174 usart_data_transmit(USART2, DYMMY_BYTE);
175
176 /* wait until usart receive data */
177 while(usart_flag_get(USART2, USART_RDBF_FLAG) == RESET);
178 usart2_rx_buffer[usart2_rx_counter++] = usart_data_receive(USART2);
179 }
180
181 while(1)
182 {
183 /* compare data buffer */
184 if(buffer_compare(usart2_tx_buffer, spi1_rx_buffer, USART2_TX_BUFFER_SIZE) && \
185 buffer_compare(spi1_tx_buffer, usart2_rx_buffer, SPI1_TX_BUFFER_SIZE))
186 {
187 at32_led_toggle(LED2);
188 at32_led_toggle(LED3);
189 at32_led_toggle(LED4);
190 delay_sec(1);
191 }
192 }
193}
194
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
spi_init_struct
spi_init_type spi_init_struct
Definition: project/at_start_f435/examples/spi/fullduplex_polling/src/main.c:40
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usart2_tx_counter
uint8_t usart2_tx_counter
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:47
spi1_tx_buffer_size
uint8_t spi1_tx_buffer_size
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:52
usart_spi_configuration
void usart_spi_configuration(void)
config usart and spi
Definition: project/at_start_f435/examples/usart/synchronous/src/main.c:59
SPI1_TX_BUFFER_SIZE
#define SPI1_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:40
DYMMY_BYTE
#define DYMMY_BYTE
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:41
usart2_tx_buffer_size
uint8_t usart2_tx_buffer_size
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:51
spi1_tx_buffer
uint8_t spi1_tx_buffer[]
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:44
usart2_rx_counter
uint8_t usart2_rx_counter
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:49
USART2_TX_BUFFER_SIZE
#define USART2_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:39
spi1_rx_counter
uint8_t spi1_rx_counter
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:50
usart2_rx_buffer
uint8_t usart2_rx_buffer[((sizeof(spi1_tx_buffer)/sizeof(*(spi1_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:45
usart2_tx_buffer
uint8_t usart2_tx_buffer[]
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:43
spi1_rx_buffer
uint8_t spi1_rx_buffer[((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:46
spi1_tx_counter
uint8_t spi1_tx_counter
Definition: project/at_start_f437/examples/usart/synchronous/src/main.c:48
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_SPI1_PERIPH_CLOCK
@ CRM_SPI1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:161
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE7
@ GPIO_PINS_SOURCE7
Definition: at32f435_437_gpio.h:140
GPIO_PINS_SOURCE6
@ GPIO_PINS_SOURCE6
Definition: at32f435_437_gpio.h:139
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE4
@ GPIO_PINS_SOURCE4
Definition: at32f435_437_gpio.h:137
GPIO_PINS_SOURCE5
@ GPIO_PINS_SOURCE5
Definition: at32f435_437_gpio.h:138
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_5
@ GPIO_MUX_5
Definition: at32f435_437_gpio.h:161
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_6
#define GPIO_PINS_6
Definition: at32f435_437_gpio.h:57
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_7
#define GPIO_PINS_7
Definition: at32f435_437_gpio.h:58
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_4
#define GPIO_PINS_4
Definition: at32f435_437_gpio.h:55
GPIO_PINS_5
#define GPIO_PINS_5
Definition: at32f435_437_gpio.h:56
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
SPI_I2S_TDBE_FLAG
#define SPI_I2S_TDBE_FLAG
Definition: at32f435_437_spi.h:54
SPI_I2S_RDBF_FLAG
#define SPI_I2S_RDBF_FLAG
Definition: at32f435_437_spi.h:53
spi_i2s_data_transmit
void spi_i2s_data_transmit(spi_type *spi_x, uint16_t tx_data)
spi/i2s data transmit
Definition: at32f435_437_spi.c:548
spi_i2s_flag_get
flag_status spi_i2s_flag_get(spi_type *spi_x, uint32_t spi_i2s_flag)
get flag of the specified spi/i2s peripheral.
Definition: at32f435_437_spi.c:583
spi_init
void spi_init(spi_type *spi_x, spi_init_type *spi_init_struct)
spi init config with its setting value.
Definition: at32f435_437_spi.c:101
spi_default_para_init
void spi_default_para_init(spi_init_type *spi_init_struct)
spi init config with its default value.
Definition: at32f435_437_spi.c:81
spi_i2s_data_receive
uint16_t spi_i2s_data_receive(spi_type *spi_x)
spi/i2s data receive
Definition: at32f435_437_spi.c:560
spi_enable
void spi_enable(spi_type *spi_x, confirm_state new_state)
enable or disable spi.
Definition: at32f435_437_spi.c:321
SPI_MODE_SLAVE
@ SPI_MODE_SLAVE
Definition: at32f435_437_spi.h:99
SPI_CLOCK_PHASE_2EDGE
@ SPI_CLOCK_PHASE_2EDGE
Definition: at32f435_437_spi.h:118
SPI_CS_SOFTWARE_MODE
@ SPI_CS_SOFTWARE_MODE
Definition: at32f435_437_spi.h:127
SPI_FIRST_BIT_LSB
@ SPI_FIRST_BIT_LSB
Definition: at32f435_437_spi.h:154
SPI_CLOCK_POLARITY_HIGH
@ SPI_CLOCK_POLARITY_HIGH
Definition: at32f435_437_spi.h:109
SPI_TRANSMIT_FULL_DUPLEX
@ SPI_TRANSMIT_FULL_DUPLEX
Definition: at32f435_437_spi.h:162
SPI_FRAME_8BIT
@ SPI_FRAME_8BIT
Definition: at32f435_437_spi.h:90
SPI1
#define SPI1
Definition: at32f435_437_spi.h:453
usart_clock_enable
void usart_clock_enable(usart_type *usart_x, confirm_state new_state)
usart enable the ck pin.
Definition: at32f435_437_usart.c:263
usart_clock_config
void usart_clock_config(usart_type *usart_x, usart_clock_polarity_type clk_pol, usart_clock_phase_type clk_pha, usart_lbcp_type clk_lb)
usart clock config.
Definition: at32f435_437_usart.c:247
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
USART_CLOCK_POLARITY_HIGH
@ USART_CLOCK_POLARITY_HIGH
Definition: at32f435_437_usart.h:142
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_CLOCK_LAST_BIT_OUTPUT
@ USART_CLOCK_LAST_BIT_OUTPUT
Definition: at32f435_437_usart.h:151
USART_CLOCK_PHASE_2EDGE
@ USART_CLOCK_PHASE_2EDGE
Definition: at32f435_437_usart.h:133
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART2
#define USART2
Definition: at32f435_437_usart.h:349
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
spi_init_type
spi init type
Definition: at32f435_437_spi.h:259
spi_init_type::master_slave_mode
spi_master_slave_mode_type master_slave_mode
Definition: at32f435_437_spi.h:261
spi_init_type::first_bit_transmission
spi_first_bit_type first_bit_transmission
Definition: at32f435_437_spi.h:263
spi_init_type::frame_bit_num
spi_frame_bit_num_type frame_bit_num
Definition: at32f435_437_spi.h:264
spi_init_type::clock_polarity
spi_clock_polarity_type clock_polarity
Definition: at32f435_437_spi.h:265
spi_init_type::cs_mode_selection
spi_cs_mode_type cs_mode_selection
Definition: at32f435_437_spi.h:267
spi_init_type::transmission_mode
spi_transmission_mode_type transmission_mode
Definition: at32f435_437_spi.h:260
spi_init_type::clock_phase
spi_clock_phase_type clock_phase
Definition: at32f435_437_spi.h:266
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • transfer_by_dma_interrupt
  • inc
project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • transfer_by_dma_interrupt
  • inc
project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • transfer_by_dma_interrupt
  • inc
project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • transfer_by_dma_interrupt
  • src
Functions
project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • transfer_by_dma_interrupt
  • src
project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • transfer_by_dma_interrupt
  • src
Functions | Variables
project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | DMA1_Channel1_IRQHandler (void)
this function handles dma1 channel1 handler. More...
void | DMA1_Channel2_IRQHandler (void)
this function handles dma1 channel2 handler. More...
void | DMA1_Channel3_IRQHandler (void)
this function handles dma1 channel3 handler. More...
void | DMA1_Channel4_IRQHandler (void)
this function handles dma1 channel4 handler. More...

Variables

uint8_t | usart2_tx_dma_status
uint8_t | usart2_rx_dma_status
uint8_t | usart3_tx_dma_status
uint8_t | usart3_rx_dma_status

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • transfer_by_dma_interrupt
  • src
project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
38extern uint8_t usart2_tx_dma_status;
39extern uint8_t usart2_rx_dma_status;
40extern uint8_t usart3_tx_dma_status;
41extern uint8_t usart3_rx_dma_status;
42
48void NMI_Handler(void)
49{
50}
51
57void HardFault_Handler(void)
58{
59 /* go to infinite loop when hard fault exception occurs */
60 while(1)
61 {
62 }
63}
64
70void MemManage_Handler(void)
71{
72 /* go to infinite loop when memory manage exception occurs */
73 while(1)
74 {
75 }
76}
77
83void BusFault_Handler(void)
84{
85 /* go to infinite loop when bus fault exception occurs */
86 while(1)
87 {
88 }
89}
90
96void UsageFault_Handler(void)
97{
98 /* go to infinite loop when usage fault exception occurs */
99 while(1)
100 {
101 }
102}
103
109void SVC_Handler(void)
110{
111}
112
118void DebugMon_Handler(void)
119{
120}
121
127void PendSV_Handler(void)
128{
129}
130
136void SysTick_Handler(void)
137{
138}
139
145void DMA1_Channel1_IRQHandler(void)
146{
147 if(dma_flag_get(DMA1_FDT1_FLAG))
148 {
149 usart2_tx_dma_status = 1;
150 dma_flag_clear(DMA1_FDT1_FLAG);
151 dma_channel_enable(DMA1_CHANNEL1, FALSE);
152 }
153}
154
160void DMA1_Channel2_IRQHandler(void)
161{
162 if(dma_flag_get(DMA1_FDT2_FLAG))
163 {
164 usart2_rx_dma_status = 1;
165 dma_flag_clear(DMA1_FDT2_FLAG);
166 dma_channel_enable(DMA1_CHANNEL2, FALSE);
167 }
168}
169
175void DMA1_Channel3_IRQHandler(void)
176{
177 if(dma_flag_get(DMA1_FDT3_FLAG))
178 {
179 usart3_tx_dma_status = 1;
180 dma_flag_clear(DMA1_FDT3_FLAG);
181 dma_channel_enable(DMA1_CHANNEL3, FALSE);
182 }
183}
184
190void DMA1_Channel4_IRQHandler(void)
191{
192 if(dma_flag_get(DMA1_FDT4_FLAG))
193 {
194 usart3_rx_dma_status = 1;
195 dma_flag_clear(DMA1_FDT4_FLAG);
196 dma_channel_enable(DMA1_CHANNEL4, FALSE);
197 }
198}
199
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
DMA1_Channel1_IRQHandler
void DMA1_Channel1_IRQHandler(void)
this function handles dma1_channel1 handler.
Definition: project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c:145
DMA1_Channel2_IRQHandler
void DMA1_Channel2_IRQHandler(void)
this function handles dma interrupt request.
Definition: project/at_start_f435/examples/i2c/communication_dma/src/at32f435_437_int.c:149
usart3_rx_dma_status
uint8_t usart3_rx_dma_status
Definition: project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/main.c:49
usart3_tx_dma_status
uint8_t usart3_tx_dma_status
Definition: project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/main.c:48
DMA1_Channel4_IRQHandler
void DMA1_Channel4_IRQHandler(void)
this function handles dma1 channel4 handler.
Definition: project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c:190
DMA1_Channel3_IRQHandler
void DMA1_Channel3_IRQHandler(void)
this function handles dma1 channel3 handler.
Definition: project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c:175
usart2_tx_dma_status
uint8_t usart2_tx_dma_status
Definition: project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/main.c:46
usart2_rx_dma_status
uint8_t usart2_rx_dma_status
Definition: project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/main.c:47
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_flag_clear
void dma_flag_clear(uint32_t dmax_flag)
dma flag clear.
Definition: at32f435_437_dma.c:264
DMA1_FDT4_FLAG
#define DMA1_FDT4_FLAG
Definition: at32f435_437_dma.h:78
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
DMA1_FDT2_FLAG
#define DMA1_FDT2_FLAG
Definition: at32f435_437_dma.h:70
DMA1_FDT3_FLAG
#define DMA1_FDT3_FLAG
Definition: at32f435_437_dma.h:74
DMA1_CHANNEL3
#define DMA1_CHANNEL3
Definition: at32f435_437_dma.h:698
DMA1_CHANNEL4
#define DMA1_CHANNEL4
Definition: at32f435_437_dma.h:699
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1_CHANNEL2
#define DMA1_CHANNEL2
Definition: at32f435_437_dma.h:697
FALSE
@ FALSE
Definition: at32f435_437.h:379
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • transfer_by_dma_interrupt
  • src
Macros | Functions | Variables
project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | COUNTOF(a) (sizeof(a) / sizeof(*(a)))
#define | USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
#define | USART3_TX_BUFFER_SIZE (COUNTOF(usart3_tx_buffer) - 1)

Functions

void | usart_configuration (void)
config usart More...
void | dma_configuration (void)
config dma for usart2 and usart3 More...
uint8_t | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
compares two buffers. More...
int | main (void)
main function. More...

Variables

uint8_t | usart2_tx_buffer [] = "usart transfer by dma interrupt: usart2 -> usart3 using dma"
uint8_t | usart3_tx_buffer [] = "usart transfer by dma interrupt: usart3 -> usart2 using dma"
uint8_t | usart2_rx_buffer [((sizeof(usart3_tx_buffer)/sizeof(*(usart3_tx_buffer))) - 1)]
uint8_t | usart3_rx_buffer [((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
volatile uint8_t | usart2_tx_dma_status = 0
volatile uint8_t | usart2_rx_dma_status = 0
volatile uint8_t | usart3_tx_dma_status = 0
volatile uint8_t | usart3_rx_dma_status = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • transfer_by_dma_interrupt
  • src
project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define COUNTOF(a) (sizeof(a) / sizeof(*(a)))
39#define USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
40#define USART3_TX_BUFFER_SIZE (COUNTOF(usart3_tx_buffer) - 1)
41
42uint8_t usart2_tx_buffer[] = "usart transfer by dma interrupt: usart2 -> usart3 using dma";
43uint8_t usart3_tx_buffer[] = "usart transfer by dma interrupt: usart3 -> usart2 using dma";
44uint8_t usart2_rx_buffer[USART3_TX_BUFFER_SIZE];
45uint8_t usart3_rx_buffer[USART2_TX_BUFFER_SIZE];
46volatile uint8_t usart2_tx_dma_status = 0;
47volatile uint8_t usart2_rx_dma_status = 0;
48volatile uint8_t usart3_tx_dma_status = 0;
49volatile uint8_t usart3_rx_dma_status = 0;
50
56void usart_configuration(void)
57{
58 gpio_init_type gpio_init_struct;
59
60 /* enable the usart2 and gpio clock */
61 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
62 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
63
64 /* enable the usart3 and gpio clock */
65 crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE);
66 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
67
68 gpio_default_para_init(&gpio_init_struct);
69 /* configure the usart2 tx, rx pin */
70 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
71 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
72 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
73 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
74 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
75 gpio_init(GPIOA, &gpio_init_struct);
76 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
77 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7);
78
79 /* configure the usart3 tx, rx pin */
80 gpio_init_struct.gpio_pins = GPIO_PINS_10 | GPIO_PINS_11;
81 gpio_init(GPIOB, &gpio_init_struct);
82 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_7);
83 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_7);
84
85 /* configure usart2 param */
86 usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
87 usart_transmitter_enable(USART2, TRUE);
88 usart_receiver_enable(USART2, TRUE);
89 usart_dma_transmitter_enable(USART2, TRUE);
90 usart_dma_receiver_enable(USART2, TRUE);
91 usart_enable(USART2, TRUE);
92
93 /* configure usart3 param */
94 usart_init(USART3, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
95 usart_transmitter_enable(USART3, TRUE);
96 usart_receiver_enable(USART3, TRUE);
97 usart_dma_transmitter_enable(USART3, TRUE);
98 usart_dma_receiver_enable(USART3, TRUE);
99 usart_enable(USART3, TRUE);
100}
101
107void dma_configuration(void)
108{
109 dma_init_type dma_init_struct;
110
111 /* enable dma1 clock */
112 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
113
114 dmamux_enable(DMA1, TRUE);
115
116 /* dma1 channel1 for usart2 tx configuration */
117 dma_reset(DMA1_CHANNEL1);
118 dma_default_para_init(&dma_init_struct);
119 dma_init_struct.buffer_size = USART2_TX_BUFFER_SIZE;
120 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
121 dma_init_struct.memory_base_addr = (uint32_t)usart2_tx_buffer;
122 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
123 dma_init_struct.memory_inc_enable = TRUE;
124 dma_init_struct.peripheral_base_addr = (uint32_t)&USART2->dt;
125 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
126 dma_init_struct.peripheral_inc_enable = FALSE;
127 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
128 dma_init_struct.loop_mode_enable = FALSE;
129 dma_init(DMA1_CHANNEL1, &dma_init_struct);
130
131 /* enable transfer full data intterrupt */
132 dma_interrupt_enable(DMA1_CHANNEL1, DMA_FDT_INT, TRUE);
133
134 /* dma1 channel1 interrupt nvic init */
135 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
136 nvic_irq_enable(DMA1_Channel1_IRQn, 0, 0);
137
138 /* config flexible dma for usart2 tx */
139 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_USART2_TX);
140
141 /* dma1 channel2 for usart2 rx configuration */
142 dma_reset(DMA1_CHANNEL2);
143 dma_default_para_init(&dma_init_struct);
144 dma_init_struct.buffer_size = USART3_TX_BUFFER_SIZE;
145 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
146 dma_init_struct.memory_base_addr = (uint32_t)usart2_rx_buffer;
147 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
148 dma_init_struct.memory_inc_enable = TRUE;
149 dma_init_struct.peripheral_base_addr = (uint32_t)&USART2->dt;
150 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
151 dma_init_struct.peripheral_inc_enable = FALSE;
152 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
153 dma_init_struct.loop_mode_enable = FALSE;
154 dma_init(DMA1_CHANNEL2, &dma_init_struct);
155
156 /* enable transfer full data intterrupt */
157 dma_interrupt_enable(DMA1_CHANNEL2, DMA_FDT_INT, TRUE);
158
159 /* dma1 channel2 interrupt nvic init */
160 nvic_irq_enable(DMA1_Channel2_IRQn, 0, 0);
161
162 /* config flexible dma for usart2 rx */
163 dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_USART2_RX);
164
165 /* dma1 channel3 for usart3 tx configuration */
166 dma_reset(DMA1_CHANNEL3);
167 dma_default_para_init(&dma_init_struct);
168 dma_init_struct.buffer_size = USART3_TX_BUFFER_SIZE;
169 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
170 dma_init_struct.memory_base_addr = (uint32_t)usart3_tx_buffer;
171 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
172 dma_init_struct.memory_inc_enable = TRUE;
173 dma_init_struct.peripheral_base_addr = (uint32_t)&USART3->dt;
174 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
175 dma_init_struct.peripheral_inc_enable = FALSE;
176 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
177 dma_init_struct.loop_mode_enable = FALSE;
178 dma_init(DMA1_CHANNEL3, &dma_init_struct);
179
180 /* enable transfer full data intterrupt */
181 dma_interrupt_enable(DMA1_CHANNEL3, DMA_FDT_INT, TRUE);
182
183 /* dma1 channel3 interrupt nvic init */
184 nvic_irq_enable(DMA1_Channel3_IRQn, 0, 0);
185
186 /* config flexible dma for usart3 tx */
187 dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_USART3_TX);
188
189 /* dma1 channel4 for usart3 rx configuration */
190 dma_reset(DMA1_CHANNEL4);
191 dma_default_para_init(&dma_init_struct);
192 dma_init_struct.buffer_size = USART2_TX_BUFFER_SIZE;
193 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
194 dma_init_struct.memory_base_addr = (uint32_t)usart3_rx_buffer;
195 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
196 dma_init_struct.memory_inc_enable = TRUE;
197 dma_init_struct.peripheral_base_addr = (uint32_t)&USART3->dt;
198 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
199 dma_init_struct.peripheral_inc_enable = FALSE;
200 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
201 dma_init_struct.loop_mode_enable = FALSE;
202 dma_init(DMA1_CHANNEL4, &dma_init_struct);
203
204 /* enable transfer full data intterrupt */
205 dma_interrupt_enable(DMA1_CHANNEL4, DMA_FDT_INT, TRUE);
206
207 /* dma1 channel4 interrupt nvic init */
208 nvic_irq_enable(DMA1_Channel4_IRQn, 0, 0);
209
210 /* config flexible dma for usart3 rx */
211 dmamux_init(DMA1MUX_CHANNEL4, DMAMUX_DMAREQ_ID_USART3_RX);
212
213 dma_channel_enable(DMA1_CHANNEL2, TRUE); /* usart2 rx begin dma receiving */
214 dma_channel_enable(DMA1_CHANNEL4, TRUE); /* usart3 rx begin dma receiving */
215 dma_channel_enable(DMA1_CHANNEL1, TRUE); /* usart2 tx begin dma transmitting */
216 dma_channel_enable(DMA1_CHANNEL3, TRUE); /* usart3 tx begin dma transmitting */
217}
218
226uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
227{
228 while(buffer_length--)
229 {
230 if(*pbuffer1 != *pbuffer2)
231 {
232 return 0;
233 }
234 pbuffer1++;
235 pbuffer2++;
236 }
237 return 1;
238}
239
245int main(void)
246{
247 system_clock_config();
248 at32_board_init();
249 usart_configuration();
250 dma_configuration();
251
252 /* wait dma transmission complete */
253 while((usart2_tx_dma_status == 0) || (usart2_rx_dma_status == 0) || (usart3_tx_dma_status == 0) || (usart3_rx_dma_status == 0));
254
255 while(1)
256 {
257 /* compare data buffer */
258 if(buffer_compare(usart2_tx_buffer, usart3_rx_buffer, USART2_TX_BUFFER_SIZE) && \
259 buffer_compare(usart3_tx_buffer, usart2_rx_buffer, USART3_TX_BUFFER_SIZE))
260 {
261 at32_led_toggle(LED2);
262 at32_led_toggle(LED3);
263 at32_led_toggle(LED4);
264 delay_sec(1);
265 }
266 }
267}
268
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usart_configuration
void usart_configuration(void)
config usart
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:53
usart3_tx_dma_status
volatile uint8_t usart3_tx_dma_status
Definition: project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c:48
usart2_tx_dma_status
volatile uint8_t usart2_tx_dma_status
Definition: project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c:46
usart3_rx_buffer
uint8_t usart3_rx_buffer[((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c:45
dma_configuration
void dma_configuration(void)
config dma for usart2 and usart3
Definition: project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/main.c:107
USART2_TX_BUFFER_SIZE
#define USART2_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c:39
usart2_rx_dma_status
volatile uint8_t usart2_rx_dma_status
Definition: project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c:47
usart3_rx_dma_status
volatile uint8_t usart3_rx_dma_status
Definition: project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c:49
usart2_tx_buffer
uint8_t usart2_tx_buffer[]
Definition: project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c:42
USART3_TX_BUFFER_SIZE
#define USART3_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c:40
usart3_tx_buffer
uint8_t usart3_tx_buffer[]
Definition: project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c:43
usart2_rx_buffer
uint8_t usart2_rx_buffer[((sizeof(usart3_tx_buffer)/sizeof(*(usart3_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c:44
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART3_PERIPH_CLOCK
@ CRM_USART3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:141
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_interrupt_enable
void dma_interrupt_enable(dma_channel_type *dmax_channely, uint32_t dma_int, confirm_state new_state)
enable or disable dma interrupt.
Definition: at32f435_437_dma.c:164
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_BYTE
@ DMA_PERIPHERAL_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:162
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_BYTE
@ DMA_MEMORY_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:172
DMA_PRIORITY_MEDIUM
@ DMA_PRIORITY_MEDIUM
Definition: at32f435_437_dma.h:183
DMAMUX_DMAREQ_ID_USART3_TX
@ DMAMUX_DMAREQ_ID_USART3_TX
Definition: at32f435_437_dma.h:227
DMAMUX_DMAREQ_ID_USART3_RX
@ DMAMUX_DMAREQ_ID_USART3_RX
Definition: at32f435_437_dma.h:226
DMAMUX_DMAREQ_ID_USART2_TX
@ DMAMUX_DMAREQ_ID_USART2_TX
Definition: at32f435_437_dma.h:225
DMAMUX_DMAREQ_ID_USART2_RX
@ DMAMUX_DMAREQ_ID_USART2_RX
Definition: at32f435_437_dma.h:224
DMA_FDT_INT
#define DMA_FDT_INT
Definition: at32f435_437_dma.h:52
DMA1MUX_CHANNEL2
#define DMA1MUX_CHANNEL2
Definition: at32f435_437_dma.h:705
DMA1MUX_CHANNEL3
#define DMA1MUX_CHANNEL3
Definition: at32f435_437_dma.h:706
DMA1_CHANNEL3
#define DMA1_CHANNEL3
Definition: at32f435_437_dma.h:698
DMA1MUX_CHANNEL4
#define DMA1MUX_CHANNEL4
Definition: at32f435_437_dma.h:707
DMA1_CHANNEL4
#define DMA1_CHANNEL4
Definition: at32f435_437_dma.h:699
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1_CHANNEL2
#define DMA1_CHANNEL2
Definition: at32f435_437_dma.h:697
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_dma_receiver_enable
void usart_dma_receiver_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the usart's dma receiver interface.
Definition: at32f435_437_usart.c:318
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_dma_transmitter_enable
void usart_dma_transmitter_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the usart's dma transmitter interface.
Definition: at32f435_437_usart.c:304
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART3
#define USART3
Definition: at32f435_437_usart.h:350
USART2
#define USART2
Definition: at32f435_437_usart.h:349
DMA1_Channel2_IRQn
@ DMA1_Channel2_IRQn
Definition: at32f435_437.h:205
DMA1_Channel1_IRQn
@ DMA1_Channel1_IRQn
Definition: at32f435_437.h:204
DMA1_Channel3_IRQn
@ DMA1_Channel3_IRQn
Definition: at32f435_437.h:206
DMA1_Channel4_IRQn
@ DMA1_Channel4_IRQn
Definition: at32f435_437.h:207
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • transfer_by_dma_polling
  • inc
project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • transfer_by_dma_polling
  • inc
project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • transfer_by_dma_polling
  • inc
project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • transfer_by_dma_polling
  • src
Functions
project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • transfer_by_dma_polling
  • src
project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • transfer_by_dma_polling
  • src
Functions
project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • transfer_by_dma_polling
  • src
project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • transfer_by_dma_polling
  • src
Macros | Functions | Variables
project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | COUNTOF(a) (sizeof(a) / sizeof(*(a)))
#define | USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
#define | USART3_TX_BUFFER_SIZE (COUNTOF(usart3_tx_buffer) - 1)

Functions

void | usart_configuration (void)
config usart More...
void | dma_configuration (void)
config dma for usart2 and usart3 More...
uint8_t | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
compares two buffers. More...
int | main (void)
main function. More...

Variables

uint8_t | usart2_tx_buffer [] = "usart transfer by dma interrupt: usart2 -> usart3 using dma"
uint8_t | usart3_tx_buffer [] = "usart transfer by dma interrupt: usart3 -> usart2 using dma"
uint8_t | usart2_rx_buffer [((sizeof(usart3_tx_buffer)/sizeof(*(usart3_tx_buffer))) - 1)]
uint8_t | usart3_rx_buffer [((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • transfer_by_dma_polling
  • src
project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define COUNTOF(a) (sizeof(a) / sizeof(*(a)))
39#define USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
40#define USART3_TX_BUFFER_SIZE (COUNTOF(usart3_tx_buffer) - 1)
41
42uint8_t usart2_tx_buffer[] = "usart transfer by dma interrupt: usart2 -> usart3 using dma";
43uint8_t usart3_tx_buffer[] = "usart transfer by dma interrupt: usart3 -> usart2 using dma";
44uint8_t usart2_rx_buffer[USART3_TX_BUFFER_SIZE];
45uint8_t usart3_rx_buffer[USART2_TX_BUFFER_SIZE];
46
52void usart_configuration(void)
53{
54 gpio_init_type gpio_init_struct;
55
56 /* enable the usart2 and gpio clock */
57 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
58 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
59
60 /* enable the usart3 and gpio clock */
61 crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE);
62 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
63
64 gpio_default_para_init(&gpio_init_struct);
65 /* configure the usart2 tx, rx pin */
66 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
67 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
68 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
69 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
70 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
71 gpio_init(GPIOA, &gpio_init_struct);
72 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
73 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7);
74
75 /* configure the usart3 tx, rx pin */
76 gpio_init_struct.gpio_pins = GPIO_PINS_10 | GPIO_PINS_11;
77 gpio_init(GPIOB, &gpio_init_struct);
78 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_7);
79 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_7);
80
81 /* configure usart2 param */
82 usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
83 usart_transmitter_enable(USART2, TRUE);
84 usart_receiver_enable(USART2, TRUE);
85 usart_dma_transmitter_enable(USART2, TRUE);
86 usart_dma_receiver_enable(USART2, TRUE);
87 usart_enable(USART2, TRUE);
88
89 /* configure usart3 param */
90 usart_init(USART3, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
91 usart_transmitter_enable(USART3, TRUE);
92 usart_receiver_enable(USART3, TRUE);
93 usart_dma_transmitter_enable(USART3, TRUE);
94 usart_dma_receiver_enable(USART3, TRUE);
95 usart_enable(USART3, TRUE);
96}
97
103void dma_configuration(void)
104{
105 dma_init_type dma_init_struct;
106
107 /* enable dma1 clock */
108 crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
109
110 dmamux_enable(DMA1, TRUE);
111
112 /* dma1 channel1 for usart2 tx configuration */
113 dma_reset(DMA1_CHANNEL1);
114 dma_default_para_init(&dma_init_struct);
115 dma_init_struct.buffer_size = USART2_TX_BUFFER_SIZE;
116 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
117 dma_init_struct.memory_base_addr = (uint32_t)usart2_tx_buffer;
118 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
119 dma_init_struct.memory_inc_enable = TRUE;
120 dma_init_struct.peripheral_base_addr = (uint32_t)&USART2->dt;
121 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
122 dma_init_struct.peripheral_inc_enable = FALSE;
123 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
124 dma_init_struct.loop_mode_enable = FALSE;
125 dma_init(DMA1_CHANNEL1, &dma_init_struct);
126
127 /* config flexible dma for usart2 tx */
128 dmamux_init(DMA1MUX_CHANNEL1, DMAMUX_DMAREQ_ID_USART2_TX);
129
130 /* dma1 channel2 for usart2 rx configuration */
131 dma_reset(DMA1_CHANNEL2);
132 dma_default_para_init(&dma_init_struct);
133 dma_init_struct.buffer_size = USART3_TX_BUFFER_SIZE;
134 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
135 dma_init_struct.memory_base_addr = (uint32_t)usart2_rx_buffer;
136 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
137 dma_init_struct.memory_inc_enable = TRUE;
138 dma_init_struct.peripheral_base_addr = (uint32_t)&USART2->dt;
139 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
140 dma_init_struct.peripheral_inc_enable = FALSE;
141 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
142 dma_init_struct.loop_mode_enable = FALSE;
143 dma_init(DMA1_CHANNEL2, &dma_init_struct);
144
145 /* config flexible dma for usart2 rx */
146 dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_USART2_RX);
147
148 /* dma1 channel3 for usart3 tx configuration */
149 dma_reset(DMA1_CHANNEL3);
150 dma_default_para_init(&dma_init_struct);
151 dma_init_struct.buffer_size = USART3_TX_BUFFER_SIZE;
152 dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
153 dma_init_struct.memory_base_addr = (uint32_t)usart3_tx_buffer;
154 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
155 dma_init_struct.memory_inc_enable = TRUE;
156 dma_init_struct.peripheral_base_addr = (uint32_t)&USART3->dt;
157 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
158 dma_init_struct.peripheral_inc_enable = FALSE;
159 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
160 dma_init_struct.loop_mode_enable = FALSE;
161 dma_init(DMA1_CHANNEL3, &dma_init_struct);
162
163 /* config flexible dma for usart3 tx */
164 dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_USART3_TX);
165
166 /* dma1 channel4 for usart3 rx configuration */
167 dma_reset(DMA1_CHANNEL4);
168 dma_default_para_init(&dma_init_struct);
169 dma_init_struct.buffer_size = USART2_TX_BUFFER_SIZE;
170 dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
171 dma_init_struct.memory_base_addr = (uint32_t)usart3_rx_buffer;
172 dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
173 dma_init_struct.memory_inc_enable = TRUE;
174 dma_init_struct.peripheral_base_addr = (uint32_t)&USART3->dt;
175 dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
176 dma_init_struct.peripheral_inc_enable = FALSE;
177 dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
178 dma_init_struct.loop_mode_enable = FALSE;
179 dma_init(DMA1_CHANNEL4, &dma_init_struct);
180
181 /* config flexible dma for usart3 rx */
182 dmamux_init(DMA1MUX_CHANNEL4, DMAMUX_DMAREQ_ID_USART3_RX);
183
184 dma_channel_enable(DMA1_CHANNEL2, TRUE); /* usart2 rx begin dma receiving */
185 dma_channel_enable(DMA1_CHANNEL4, TRUE); /* usart3 rx begin dma receiving */
186 dma_channel_enable(DMA1_CHANNEL1, TRUE); /* usart2 tx begin dma transmitting */
187 dma_channel_enable(DMA1_CHANNEL3, TRUE); /* usart3 tx begin dma transmitting */
188}
189
197uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
198{
199 while(buffer_length--)
200 {
201 if(*pbuffer1 != *pbuffer2)
202 {
203 return 0;
204 }
205 pbuffer1++;
206 pbuffer2++;
207 }
208 return 1;
209}
210
216int main(void)
217{
218 system_clock_config();
219 at32_board_init();
220 usart_configuration();
221 dma_configuration();
222
223 /* wait dma transmission complete */
224 while((dma_flag_get(DMA1_FDT1_FLAG) == RESET) || (dma_flag_get(DMA1_FDT2_FLAG) == RESET) || \
225 (dma_flag_get(DMA1_FDT3_FLAG) == RESET) || (dma_flag_get(DMA1_FDT4_FLAG) == RESET));
226
227 while(1)
228 {
229 /* compare data buffer */
230 if(buffer_compare(usart2_tx_buffer, usart3_rx_buffer, USART2_TX_BUFFER_SIZE) && \
231 buffer_compare(usart3_tx_buffer, usart2_rx_buffer, USART3_TX_BUFFER_SIZE))
232 {
233 at32_led_toggle(LED2);
234 at32_led_toggle(LED3);
235 at32_led_toggle(LED4);
236 delay_sec(1);
237 }
238 }
239}
240
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
dma_init_struct
dma_init_type dma_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:39
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usart_configuration
void usart_configuration(void)
config usart
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:53
dma_configuration
void dma_configuration(void)
config dma for usart2 and usart3
Definition: project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/main.c:107
usart3_rx_buffer
uint8_t usart3_rx_buffer[((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c:45
USART2_TX_BUFFER_SIZE
#define USART2_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c:39
usart2_tx_buffer
uint8_t usart2_tx_buffer[]
Definition: project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c:42
USART3_TX_BUFFER_SIZE
#define USART3_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c:40
usart3_tx_buffer
uint8_t usart3_tx_buffer[]
Definition: project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c:43
usart2_rx_buffer
uint8_t usart2_rx_buffer[((sizeof(usart3_tx_buffer)/sizeof(*(usart3_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c:44
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART3_PERIPH_CLOCK
@ CRM_USART3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:141
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_DMA1_PERIPH_CLOCK
@ CRM_DMA1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:115
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
dmamux_enable
void dmamux_enable(dma_type *dma_x, confirm_state new_state)
enable or disable the dmamux.
Definition: at32f435_437_dma.c:391
dma_channel_enable
void dma_channel_enable(dma_channel_type *dmax_channely, confirm_state new_state)
enable or disable dma channel.
Definition: at32f435_437_dma.c:197
dma_default_para_init
void dma_default_para_init(dma_init_type *dma_init_struct)
dma init config with its default value.
Definition: at32f435_437_dma.c:281
dmamux_init
void dmamux_init(dmamux_channel_type *dmamux_channelx, dmamux_requst_id_sel_type dmamux_req_sel)
dmamux init.
Definition: at32f435_437_dma.c:442
dma_flag_get
flag_status dma_flag_get(uint32_t dmax_flag)
dma flag get.
Definition: at32f435_437_dma.c:221
dma_reset
void dma_reset(dma_channel_type *dmax_channely)
reset dmax channely register.
Definition: at32f435_437_dma.c:64
dma_init
void dma_init(dma_channel_type *dmax_channely, dma_init_type *dma_init_struct)
dma init.
Definition: at32f435_437_dma.c:316
DMA_PERIPHERAL_DATA_WIDTH_BYTE
@ DMA_PERIPHERAL_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:162
DMA_DIR_MEMORY_TO_PERIPHERAL
@ DMA_DIR_MEMORY_TO_PERIPHERAL
Definition: at32f435_437_dma.h:153
DMA_DIR_PERIPHERAL_TO_MEMORY
@ DMA_DIR_PERIPHERAL_TO_MEMORY
Definition: at32f435_437_dma.h:152
DMA_MEMORY_DATA_WIDTH_BYTE
@ DMA_MEMORY_DATA_WIDTH_BYTE
Definition: at32f435_437_dma.h:172
DMA_PRIORITY_MEDIUM
@ DMA_PRIORITY_MEDIUM
Definition: at32f435_437_dma.h:183
DMAMUX_DMAREQ_ID_USART3_TX
@ DMAMUX_DMAREQ_ID_USART3_TX
Definition: at32f435_437_dma.h:227
DMAMUX_DMAREQ_ID_USART3_RX
@ DMAMUX_DMAREQ_ID_USART3_RX
Definition: at32f435_437_dma.h:226
DMAMUX_DMAREQ_ID_USART2_TX
@ DMAMUX_DMAREQ_ID_USART2_TX
Definition: at32f435_437_dma.h:225
DMAMUX_DMAREQ_ID_USART2_RX
@ DMAMUX_DMAREQ_ID_USART2_RX
Definition: at32f435_437_dma.h:224
DMA1_FDT4_FLAG
#define DMA1_FDT4_FLAG
Definition: at32f435_437_dma.h:78
DMA1_FDT1_FLAG
#define DMA1_FDT1_FLAG
Definition: at32f435_437_dma.h:66
DMA1_FDT2_FLAG
#define DMA1_FDT2_FLAG
Definition: at32f435_437_dma.h:70
DMA1_FDT3_FLAG
#define DMA1_FDT3_FLAG
Definition: at32f435_437_dma.h:74
DMA1MUX_CHANNEL2
#define DMA1MUX_CHANNEL2
Definition: at32f435_437_dma.h:705
DMA1MUX_CHANNEL3
#define DMA1MUX_CHANNEL3
Definition: at32f435_437_dma.h:706
DMA1_CHANNEL3
#define DMA1_CHANNEL3
Definition: at32f435_437_dma.h:698
DMA1MUX_CHANNEL4
#define DMA1MUX_CHANNEL4
Definition: at32f435_437_dma.h:707
DMA1_CHANNEL4
#define DMA1_CHANNEL4
Definition: at32f435_437_dma.h:699
DMA1_CHANNEL1
#define DMA1_CHANNEL1
Definition: at32f435_437_dma.h:696
DMA1MUX_CHANNEL1
#define DMA1MUX_CHANNEL1
Definition: at32f435_437_dma.h:704
DMA1_CHANNEL2
#define DMA1_CHANNEL2
Definition: at32f435_437_dma.h:697
DMA1
#define DMA1
Definition: at32f435_437_dma.h:695
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_dma_receiver_enable
void usart_dma_receiver_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the usart's dma receiver interface.
Definition: at32f435_437_usart.c:318
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_dma_transmitter_enable
void usart_dma_transmitter_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the usart's dma transmitter interface.
Definition: at32f435_437_usart.c:304
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART3
#define USART3
Definition: at32f435_437_usart.h:350
USART2
#define USART2
Definition: at32f435_437_usart.h:349
dma_init_type
dma init type
Definition: at32f435_437_dma.h:376
dma_init_type::loop_mode_enable
confirm_state loop_mode_enable
Definition: at32f435_437_dma.h:385
dma_init_type::buffer_size
uint16_t buffer_size
Definition: at32f435_437_dma.h:380
dma_init_type::memory_data_width
dma_memory_data_size_type memory_data_width
Definition: at32f435_437_dma.h:384
dma_init_type::priority
dma_priority_level_type priority
Definition: at32f435_437_dma.h:386
dma_init_type::peripheral_inc_enable
confirm_state peripheral_inc_enable
Definition: at32f435_437_dma.h:381
dma_init_type::memory_inc_enable
confirm_state memory_inc_enable
Definition: at32f435_437_dma.h:382
dma_init_type::direction
dma_dir_type direction
Definition: at32f435_437_dma.h:379
dma_init_type::peripheral_base_addr
uint32_t peripheral_base_addr
Definition: at32f435_437_dma.h:377
dma_init_type::memory_base_addr
uint32_t memory_base_addr
Definition: at32f435_437_dma.h:378
dma_init_type::peripheral_data_width
dma_peripheral_data_size_type peripheral_data_width
Definition: at32f435_437_dma.h:383
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usart
  • tx_rx_swap
  • inc
project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usart
  • tx_rx_swap
  • inc
project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usart
  • tx_rx_swap
  • inc
project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usart
  • tx_rx_swap
  • src
Functions
project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usart
  • tx_rx_swap
  • src
project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usart
  • tx_rx_swap
  • src
Functions
project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usart
  • tx_rx_swap
  • src
project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usart
  • tx_rx_swap
  • src
Macros | Functions | Variables
project/at_start_f437/examples/usart/tx_rx_swap/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | COUNTOF(a) (sizeof(a) / sizeof(*(a)))
#define | USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
#define | USART3_TX_BUFFER_SIZE (COUNTOF(usart3_tx_buffer) - 1)

Functions

void | usart_configuration (void)
config usart More...
uint8_t | buffer_compare (uint8_t *pbuffer1, uint8_t *pbuffer2, uint16_t buffer_length)
compares two buffers. More...
int | main (void)
main function. More...

Variables

uint8_t | usart2_tx_buffer [] = "usart transfer by interrupt: usart2 -> usart3 using interrupt"
uint8_t | usart3_tx_buffer [] = "usart transfer by interrupt: usart3 -> usart2 using interrupt"
uint8_t | usart2_rx_buffer [((sizeof(usart3_tx_buffer)/sizeof(*(usart3_tx_buffer))) - 1)]
uint8_t | usart3_rx_buffer [((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
uint8_t | usart2_tx_counter = 0x00
uint8_t | usart3_tx_counter = 0x00
uint8_t | usart2_rx_counter = 0x00
uint8_t | usart3_rx_counter = 0x00
uint8_t | usart2_tx_buffer_size = ((sizeof( usart2_tx_buffer ) / sizeof(*( usart2_tx_buffer ))) - 1)
uint8_t | usart3_tx_buffer_size = ((sizeof( usart3_tx_buffer ) / sizeof(*( usart3_tx_buffer ))) - 1)

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usart/tx_rx_swap/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usart
  • tx_rx_swap
  • src
project/at_start_f437/examples/usart/tx_rx_swap/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define COUNTOF(a) (sizeof(a) / sizeof(*(a)))
39#define USART2_TX_BUFFER_SIZE (COUNTOF(usart2_tx_buffer) - 1)
40#define USART3_TX_BUFFER_SIZE (COUNTOF(usart3_tx_buffer) - 1)
41
42uint8_t usart2_tx_buffer[] = "usart transfer by interrupt: usart2 -> usart3 using interrupt";
43uint8_t usart3_tx_buffer[] = "usart transfer by interrupt: usart3 -> usart2 using interrupt";
44uint8_t usart2_rx_buffer[USART3_TX_BUFFER_SIZE];
45uint8_t usart3_rx_buffer[USART2_TX_BUFFER_SIZE];
46uint8_t usart2_tx_counter = 0x00;
47uint8_t usart3_tx_counter = 0x00;
48uint8_t usart2_rx_counter = 0x00;
49uint8_t usart3_rx_counter = 0x00;
50uint8_t usart2_tx_buffer_size = USART2_TX_BUFFER_SIZE;
51uint8_t usart3_tx_buffer_size = USART3_TX_BUFFER_SIZE;
52
58void usart_configuration(void)
59{
60 gpio_init_type gpio_init_struct;
61
62 /* enable the usart2 and gpio clock */
63 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
64 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
65
66 /* enable the usart3 and gpio clock */
67 crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE);
68 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
69
70 gpio_default_para_init(&gpio_init_struct);
71
72 /* configure the usart2 tx, rx pin */
73 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
74 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
75 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
76 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
77 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
78 gpio_init(GPIOA, &gpio_init_struct);
79 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
80 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7);
81
82 /* configure the usart3 tx, rx pin */
83 gpio_init_struct.gpio_pins = GPIO_PINS_10 | GPIO_PINS_11;
84 gpio_init(GPIOB, &gpio_init_struct);
85 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_7);
86 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_7);
87
88 /* configure usart2 param */
89 usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
90 usart_transmitter_enable(USART2, TRUE);
91 usart_receiver_enable(USART2, TRUE);
92 usart_transmit_receive_pin_swap(USART2, TRUE);
93 usart_enable(USART2, TRUE);
94
95 /* configure usart3 param */
96 usart_init(USART3, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
97 usart_transmitter_enable(USART3, TRUE);
98 usart_receiver_enable(USART3, TRUE);
99 usart_enable(USART3, TRUE);
100}
101
109uint8_t buffer_compare(uint8_t* pbuffer1, uint8_t* pbuffer2, uint16_t buffer_length)
110{
111 while(buffer_length--)
112 {
113 if(*pbuffer1 != *pbuffer2)
114 {
115 return 0;
116 }
117 pbuffer1++;
118 pbuffer2++;
119 }
120 return 1;
121}
122
128int main(void)
129{
130 system_clock_config();
131 at32_board_init();
132 usart_configuration();
133
134 /* wait until end of transmission from usart2 to usart3 */
135 while(usart3_rx_counter < usart2_tx_buffer_size)
136 {
137 while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
138 usart_data_transmit(USART2, usart2_tx_buffer[usart2_tx_counter++]);
139
140 while(usart_flag_get(USART3, USART_RDBF_FLAG) == RESET);
141 usart3_rx_buffer[usart3_rx_counter++] = usart_data_receive(USART3);
142 }
143
144 /* wait until end of transmission from usart3 to usart2 */
145 while(usart2_rx_counter < usart3_tx_buffer_size)
146 {
147 while(usart_flag_get(USART3, USART_TDBE_FLAG) == RESET);
148 usart_data_transmit(USART3, usart3_tx_buffer[usart3_tx_counter++]);
149
150 while(usart_flag_get(USART2, USART_RDBF_FLAG) == RESET);
151 usart2_rx_buffer[usart2_rx_counter++] = usart_data_receive(USART2);
152 }
153
154 while(1)
155 {
156 /* compare data buffer */
157 if(buffer_compare(usart2_tx_buffer, usart3_rx_buffer, USART2_TX_BUFFER_SIZE) && \
158 buffer_compare(usart3_tx_buffer, usart2_rx_buffer, USART3_TX_BUFFER_SIZE))
159 {
160 at32_led_toggle(LED2);
161 at32_led_toggle(LED3);
162 at32_led_toggle(LED4);
163 delay_sec(1);
164 }
165 }
166}
167
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
buffer_compare
error_status buffer_compare(const uint32_t *pbuffer, uint32_t *pbuffer1, uint16_t buffer_length)
compares two buffers.
Definition: project/at_start_f435/examples/dma/flash_to_sram/src/main.c:61
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
usart_configuration
void usart_configuration(void)
config usart
Definition: project/at_start_f435/examples/usart/half_duplex/src/main.c:53
usart3_tx_counter
uint8_t usart3_tx_counter
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/main.c:47
usart2_tx_counter
uint8_t usart2_tx_counter
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/main.c:46
usart2_tx_buffer_size
uint8_t usart2_tx_buffer_size
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/main.c:50
usart3_rx_buffer
uint8_t usart3_rx_buffer[((sizeof(usart2_tx_buffer)/sizeof(*(usart2_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/main.c:45
usart2_rx_counter
uint8_t usart2_rx_counter
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/main.c:48
USART2_TX_BUFFER_SIZE
#define USART2_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/main.c:39
usart3_tx_buffer_size
uint8_t usart3_tx_buffer_size
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/main.c:51
usart2_tx_buffer
uint8_t usart2_tx_buffer[]
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/main.c:42
USART3_TX_BUFFER_SIZE
#define USART3_TX_BUFFER_SIZE
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/main.c:40
usart3_tx_buffer
uint8_t usart3_tx_buffer[]
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/main.c:43
usart3_rx_counter
uint8_t usart3_rx_counter
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/main.c:49
usart2_rx_buffer
uint8_t usart2_rx_buffer[((sizeof(usart3_tx_buffer)/sizeof(*(usart3_tx_buffer))) - 1)]
Definition: project/at_start_f437/examples/usart/tx_rx_swap/src/main.c:44
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_USART3_PERIPH_CLOCK
@ CRM_USART3_PERIPH_CLOCK
Definition: at32f435_437_crm.h:141
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
usart_transmit_receive_pin_swap
void usart_transmit_receive_pin_swap(usart_type *usart_x, confirm_state new_state)
swap the usart's transmit receive pin.
Definition: at32f435_437_usart.c:673
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART3
#define USART3
Definition: at32f435_437_usart.h:350
USART2
#define USART2
Definition: at32f435_437_usart.h:349
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • audio
  • inc
project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • audio
  • inc
project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • audio
  • inc
project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • audio
  • inc
project/at_start_f437/examples/usb_device/audio/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "at32f435_437_board.h"
38
50#define USE_OTG_DEVICE_MODE
51
55/* #define USE_OTG_HOST_MODE */
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65//#define OTG_USB_ID 2
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97#endif
98
99#if (OTG_USB_ID == 2)
100#define USB_ID 1
101#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
102#define OTG_IRQ OTGFS2_IRQn
103#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
104#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
105#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
106#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
107
108#define OTG_PIN_GPIO GPIOB
109#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
110
111#define OTG_PIN_DP GPIO_PINS_15
112#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
113
114#define OTG_PIN_DM GPIO_PINS_14
115#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
116
117#define OTG_PIN_VBUS GPIO_PINS_13
118#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
119
120#define OTG_PIN_ID GPIO_PINS_12
121#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
122
123#define OTG_PIN_SOF_GPIO GPIOA
124#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
125#define OTG_PIN_SOF GPIO_PINS_4
126#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
127
128#define OTG_PIN_MUX GPIO_MUX_12
129#endif
130
134#ifdef USE_OTG_DEVICE_MODE
138 /* otg1 device fifo */
139#define USBD_RX_SIZE 128
140#define USBD_EP0_TX_SIZE 24
141#define USBD_EP1_TX_SIZE 64
142#define USBD_EP2_TX_SIZE 16
143#define USBD_EP3_TX_SIZE 16
144#define USBD_EP4_TX_SIZE 0
145#define USBD_EP5_TX_SIZE 0
146#define USBD_EP6_TX_SIZE 0
147#define USBD_EP7_TX_SIZE 0
148
149/* otg2 device fifo */
150#define USBD2_RX_SIZE 128
151#define USBD2_EP0_TX_SIZE 24
152#define USBD2_EP1_TX_SIZE 64
153#define USBD2_EP2_TX_SIZE 4
154#define USBD2_EP3_TX_SIZE 0
155#define USBD2_EP4_TX_SIZE 0
156#define USBD2_EP5_TX_SIZE 0
157#define USBD2_EP6_TX_SIZE 0
158#define USBD2_EP7_TX_SIZE 0
159
163#ifndef USB_EPT_MAX_NUM
164#define USB_EPT_MAX_NUM 8
165#endif
166#endif
167
171#ifdef USE_OTG_HOST_MODE
172#ifndef USB_HOST_CHANNEL_NUM
173#define USB_HOST_CHANNEL_NUM 16
174#endif
175
179/* otg1 host fifo */
180#define USBH_RX_FIFO_SIZE 128
181#define USBH_NP_TX_FIFO_SIZE 96
182#define USBH_P_TX_FIFO_SIZE 96
183
184/* otg2 host fifo */
185#define USBH2_RX_FIFO_SIZE 128
186#define USBH2_NP_TX_FIFO_SIZE 96
187#define USBH2_P_TX_FIFO_SIZE 96
188#endif
189
193/* #define USB_SOF_OUTPUT_ENABLE */
194
198#define USB_VBUS_IGNORE
199
203/* #define USB_LOW_POWER_WAKUP */
204
205void usb_delay_ms(uint32_t ms);
206void usb_delay_us(uint32_t us);
207
215#ifdef __cplusplus
216}
217#endif
218
219#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_board.h
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • audio
  • src
Functions
project/at_start_f437/examples/usb_device/audio/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/audio/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • audio
  • src
project/at_start_f437/examples/usb_device/audio/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/audio/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • audio
  • src
Functions
project/at_start_f437/examples/usb_device/audio/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/audio/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • audio
  • src
project/at_start_f437/examples/usb_device/audio/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
41void NMI_Handler(void)
42{
43}
44
50void HardFault_Handler(void)
51{
52 /* go to infinite loop when hard fault exception occurs */
53 while(1)
54 {
55 }
56}
57
63void MemManage_Handler(void)
64{
65 /* go to infinite loop when memory manage exception occurs */
66 while(1)
67 {
68 }
69}
70
76void BusFault_Handler(void)
77{
78 /* go to infinite loop when bus fault exception occurs */
79 while(1)
80 {
81 }
82}
83
89void UsageFault_Handler(void)
90{
91 /* go to infinite loop when usage fault exception occurs */
92 while(1)
93 {
94 }
95}
96
102void SVC_Handler(void)
103{
104}
105
111void DebugMon_Handler(void)
112{
113}
114
120void PendSV_Handler(void)
121{
122}
123
129void SysTick_Handler(void)
130{
131}
132
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • audio
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/audio/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "audio_class.h"
#include "audio_desc.h"
#include "audio_codec.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/audio/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • audio
  • src
project/at_start_f437/examples/usb_device/audio/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "audio_class.h"
33#include "audio_desc.h"
34#include "audio_codec.h"
35
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46void usb_clock48m_select(usb_clk48_s clk_s);
47void usb_gpio_config(void);
48void usb_low_power_wakeup_config(void);
49
55int main(void)
56{
57 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
58
59 system_clock_config();
60
61 /* audio codec init */
62 audio_codec_init();
63
64 at32_board_init();
65
66 /* usb gpio config */
67 usb_gpio_config();
68
69#ifdef USB_LOW_POWER_WAKUP
70 usb_low_power_wakeup_config();
71#endif
72
73 /* enable otgfs clock */
74 crm_periph_clock_enable(OTG_CLOCK, TRUE);
75
76 /* select usb 48m clcok source */
77 usb_clock48m_select(USB_CLK_HEXT);
78
79 /* enable otgfs irq */
80 nvic_irq_enable(OTG_IRQ, 0, 0);
81
82 /* init usb */
83 usbd_init(&otg_core_struct,
84 USB_FULL_SPEED_CORE_ID,
85 USB_ID,
86 &audio_class_handler,
87 &audio_desc_handler);
88
89 while(1)
90 {
91 audio_codec_loop();
92 delay_ms(100);
93 }
94}
95
101void usb_clock48m_select(usb_clk48_s clk_s)
102{
103 if(clk_s == USB_CLK_HICK)
104 {
105 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
106
107 /* enable the acc calibration ready interrupt */
108 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
109
110 /* update the c1\c2\c3 value */
111 acc_write_c1(7980);
112 acc_write_c2(8000);
113 acc_write_c3(8020);
114#if (USB_ID == 0)
115 acc_sof_select(ACC_SOF_OTG1);
116#else
117 acc_sof_select(ACC_SOF_OTG2);
118#endif
119 /* open acc calibration */
120 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
121 }
122 else
123 {
124 switch(system_core_clock)
125 {
126 /* 48MHz */
127 case 48000000:
128 crm_usb_clock_div_set(CRM_USB_DIV_1);
129 break;
130
131 /* 72MHz */
132 case 72000000:
133 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
134 break;
135
136 /* 96MHz */
137 case 96000000:
138 crm_usb_clock_div_set(CRM_USB_DIV_2);
139 break;
140
141 /* 120MHz */
142 case 120000000:
143 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
144 break;
145
146 /* 144MHz */
147 case 144000000:
148 crm_usb_clock_div_set(CRM_USB_DIV_3);
149 break;
150
151 /* 168MHz */
152 case 168000000:
153 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
154 break;
155
156 /* 192MHz */
157 case 192000000:
158 crm_usb_clock_div_set(CRM_USB_DIV_4);
159 break;
160
161 /* 216MHz */
162 case 216000000:
163 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
164 break;
165
166 /* 240MHz */
167 case 240000000:
168 crm_usb_clock_div_set(CRM_USB_DIV_5);
169 break;
170
171 /* 264MHz */
172 case 264000000:
173 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
174 break;
175
176 /* 288MHz */
177 case 288000000:
178 crm_usb_clock_div_set(CRM_USB_DIV_6);
179 break;
180
181 default:
182 break;
183
184 }
185 }
186}
187
193void usb_gpio_config(void)
194{
195 gpio_init_type gpio_init_struct;
196
197 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
198 gpio_default_para_init(&gpio_init_struct);
199
200 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
201 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
202 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
203 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
204
205 /* dp and dm */
206 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
207 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
208
209 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
210 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
211
212#ifdef USB_SOF_OUTPUT_ENABLE
213 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
214 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
215 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
216 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
217#endif
218
219 /* otgfs use vbus pin */
220#ifndef USB_VBUS_IGNORE
221 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
222 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
223 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
224 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
225#endif
226
227
228}
229#ifdef USB_LOW_POWER_WAKUP
235void usb_low_power_wakeup_config(void)
236{
237 exint_init_type exint_init_struct;
238
239 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
240 exint_default_para_init(&exint_init_struct);
241
242 exint_init_struct.line_enable = TRUE;
243 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
244 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
245 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
246 exint_init(&exint_init_struct);
247
248 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
249}
250
256void OTG_WKUP_HANDLER(void)
257{
258 exint_flag_clear(OTG_WKUP_EXINT_LINE);
259}
260
261#endif
262
263
269void OTG_IRQ_HANDLER(void)
270{
271 usbd_irq_handler(&otg_core_struct);
272}
273
279void usb_delay_ms(uint32_t ms)
280{
281 /* user can define self delay function */
282 delay_ms(ms);
283}
284
290void usb_delay_us(uint32_t us)
291{
292 delay_us(us);
293}
294
at32f435_437_board.h
audio_class.h
usb audio class file
audio_desc.h
usb audio descriptor header file
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/audio/src/main.c:45
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
audio_class_handler
usbd_class_handler audio_class_handler
Definition: audio_class.c:66
audio_desc_handler
usbd_desc_handler audio_desc_handler
device descriptor handler structure
Definition: audio_desc.c:62
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
audio_codec_loop
error_status audio_codec_loop(void)
audio codec loop
Definition: at_start_f437/examples/usb_device/audio/src/audio_codec.c:870
audio_codec_init
error_status audio_codec_init(void)
audio codec init
Definition: at_start_f437/examples/usb_device/audio/src/audio_codec.c:811
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • composite_audio_hid
  • inc
project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • composite_audio_hid
  • inc
project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • composite_audio_hid
  • inc
project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • composite_audio_hid
  • inc
project/at_start_f437/examples/usb_device/composite_audio_hid/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "at32f435_437_board.h"
38
50#define USE_OTG_DEVICE_MODE
51
55/* #define USE_OTG_HOST_MODE */
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65//#define OTG_USB_ID 2
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97#endif
98
99#if (OTG_USB_ID == 2)
100#define USB_ID 1
101#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
102#define OTG_IRQ OTGFS2_IRQn
103#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
104#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
105#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
106#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
107
108#define OTG_PIN_GPIO GPIOB
109#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
110
111#define OTG_PIN_DP GPIO_PINS_15
112#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
113
114#define OTG_PIN_DM GPIO_PINS_14
115#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
116
117#define OTG_PIN_VBUS GPIO_PINS_13
118#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
119
120#define OTG_PIN_ID GPIO_PINS_12
121#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
122
123#define OTG_PIN_SOF_GPIO GPIOA
124#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
125#define OTG_PIN_SOF GPIO_PINS_4
126#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
127
128#define OTG_PIN_MUX GPIO_MUX_12
129#endif
130
134#ifdef USE_OTG_DEVICE_MODE
138 /* otg1 device fifo */
139#define USBD_RX_SIZE 128
140#define USBD_EP0_TX_SIZE 24
141#define USBD_EP1_TX_SIZE 64
142#define USBD_EP2_TX_SIZE 20
143#define USBD_EP3_TX_SIZE 16
144#define USBD_EP4_TX_SIZE 0
145#define USBD_EP5_TX_SIZE 0
146#define USBD_EP6_TX_SIZE 0
147#define USBD_EP7_TX_SIZE 0
148
149/* otg2 device fifo */
150#define USBD2_RX_SIZE 128
151#define USBD2_EP0_TX_SIZE 24
152#define USBD2_EP1_TX_SIZE 64
153#define USBD2_EP2_TX_SIZE 20
154#define USBD2_EP3_TX_SIZE 16
155#define USBD2_EP4_TX_SIZE 0
156#define USBD2_EP5_TX_SIZE 0
157#define USBD2_EP6_TX_SIZE 0
158#define USBD2_EP7_TX_SIZE 0
159
163#ifndef USB_EPT_MAX_NUM
164#define USB_EPT_MAX_NUM 8
165#endif
166#endif
167
171#ifdef USE_OTG_HOST_MODE
172#ifndef USB_HOST_CHANNEL_NUM
173#define USB_HOST_CHANNEL_NUM 16
174#endif
175
179/* otg1 host fifo */
180#define USBH_RX_FIFO_SIZE 128
181#define USBH_NP_TX_FIFO_SIZE 96
182#define USBH_P_TX_FIFO_SIZE 96
183
184/* otg2 host fifo */
185#define USBH2_RX_FIFO_SIZE 128
186#define USBH2_NP_TX_FIFO_SIZE 96
187#define USBH2_P_TX_FIFO_SIZE 96
188#endif
189
193/* #define USB_SOF_OUTPUT_ENABLE */
194
198#define USB_VBUS_IGNORE
199
203/* #define USB_LOW_POWER_WAKUP */
204
205void usb_delay_ms(uint32_t ms);
206void usb_delay_us(uint32_t us);
207
215#ifdef __cplusplus
216}
217#endif
218
219#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_board.h
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • composite_audio_hid
  • src
Functions
project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • composite_audio_hid
  • src
project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • composite_audio_hid
  • src
Functions
project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • composite_audio_hid
  • src
project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
41void NMI_Handler(void)
42{
43}
44
50void HardFault_Handler(void)
51{
52 /* go to infinite loop when hard fault exception occurs */
53 while(1)
54 {
55 }
56}
57
63void MemManage_Handler(void)
64{
65 /* go to infinite loop when memory manage exception occurs */
66 while(1)
67 {
68 }
69}
70
76void BusFault_Handler(void)
77{
78 /* go to infinite loop when bus fault exception occurs */
79 while(1)
80 {
81 }
82}
83
89void UsageFault_Handler(void)
90{
91 /* go to infinite loop when usage fault exception occurs */
92 while(1)
93 {
94 }
95}
96
102void SVC_Handler(void)
103{
104}
105
111void DebugMon_Handler(void)
112{
113}
114
120void PendSV_Handler(void)
121{
122}
123
129void SysTick_Handler(void)
130{
131}
132
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • composite_audio_hid
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/composite_audio_hid/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "audio_hid_class.h"
#include "audio_hid_desc.h"
#include "audio_codec.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
uint8_t report_buf [USBD_AUHID_IN_MAXPACKET_SIZE]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/composite_audio_hid/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • composite_audio_hid
  • src
project/at_start_f437/examples/usb_device/composite_audio_hid/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "audio_hid_class.h"
33#include "audio_hid_desc.h"
34#include "audio_codec.h"
35
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46void usb_clock48m_select(usb_clk48_s clk_s);
47void usb_gpio_config(void);
48void usb_low_power_wakeup_config(void);
49uint8_t report_buf[USBD_AUHID_IN_MAXPACKET_SIZE];
50
56int main(void)
57{
58 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
59
60 system_clock_config();
61
62 /* audio codec init */
63 audio_codec_init();
64
65 at32_board_init();
66
67 /* usb gpio config */
68 usb_gpio_config();
69
70#ifdef USB_LOW_POWER_WAKUP
71 usb_low_power_wakeup_config();
72#endif
73
74 /* enable otgfs clock */
75 crm_periph_clock_enable(OTG_CLOCK, TRUE);
76
77 /* select usb 48m clcok source */
78 usb_clock48m_select(USB_CLK_HEXT);
79
80 /* enable otgfs irq */
81 nvic_irq_enable(OTG_IRQ, 0, 0);
82
83 /* init usb */
84 usbd_init(&otg_core_struct,
85 USB_FULL_SPEED_CORE_ID,
86 USB_ID,
87 &audio_hid_class_handler,
88 &audio_hid_desc_handler);
89
90 while(1)
91 {
92 audio_codec_loop();
93 if(at32_button_press() == USER_BUTTON)
94 {
95 report_buf[0] = HID_REPORT_ID_5;
96 report_buf[1] = (~report_buf[1]) & 0x1;
97 audio_hid_class_send_report(&otg_core_struct.dev, report_buf, USBD_AUHID_IN_MAXPACKET_SIZE);
98 }
99 delay_ms(100);
100 }
101}
102
108void usb_clock48m_select(usb_clk48_s clk_s)
109{
110 if(clk_s == USB_CLK_HICK)
111 {
112 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
113
114 /* enable the acc calibration ready interrupt */
115 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
116
117 /* update the c1\c2\c3 value */
118 acc_write_c1(7980);
119 acc_write_c2(8000);
120 acc_write_c3(8020);
121#if (USB_ID == 0)
122 acc_sof_select(ACC_SOF_OTG1);
123#else
124 acc_sof_select(ACC_SOF_OTG2);
125#endif
126 /* open acc calibration */
127 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
128 }
129 else
130 {
131 switch(system_core_clock)
132 {
133 /* 48MHz */
134 case 48000000:
135 crm_usb_clock_div_set(CRM_USB_DIV_1);
136 break;
137
138 /* 72MHz */
139 case 72000000:
140 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
141 break;
142
143 /* 96MHz */
144 case 96000000:
145 crm_usb_clock_div_set(CRM_USB_DIV_2);
146 break;
147
148 /* 120MHz */
149 case 120000000:
150 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
151 break;
152
153 /* 144MHz */
154 case 144000000:
155 crm_usb_clock_div_set(CRM_USB_DIV_3);
156 break;
157
158 /* 168MHz */
159 case 168000000:
160 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
161 break;
162
163 /* 192MHz */
164 case 192000000:
165 crm_usb_clock_div_set(CRM_USB_DIV_4);
166 break;
167
168 /* 216MHz */
169 case 216000000:
170 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
171 break;
172
173 /* 240MHz */
174 case 240000000:
175 crm_usb_clock_div_set(CRM_USB_DIV_5);
176 break;
177
178 /* 264MHz */
179 case 264000000:
180 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
181 break;
182
183 /* 288MHz */
184 case 288000000:
185 crm_usb_clock_div_set(CRM_USB_DIV_6);
186 break;
187
188 default:
189 break;
190
191 }
192 }
193}
194
200void usb_gpio_config(void)
201{
202 gpio_init_type gpio_init_struct;
203
204 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
205 gpio_default_para_init(&gpio_init_struct);
206
207 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
208 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
209 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
210 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
211
212 /* dp and dm */
213 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
214 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
215
216 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
217 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
218
219#ifdef USB_SOF_OUTPUT_ENABLE
220 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
221 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
222 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
223 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
224#endif
225
226 /* otgfs use vbus pin */
227#ifndef USB_VBUS_IGNORE
228 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
229 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
230 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
231 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
232#endif
233
234
235}
236#ifdef USB_LOW_POWER_WAKUP
242void usb_low_power_wakeup_config(void)
243{
244 exint_init_type exint_init_struct;
245
246 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
247 exint_default_para_init(&exint_init_struct);
248
249 exint_init_struct.line_enable = TRUE;
250 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
251 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
252 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
253 exint_init(&exint_init_struct);
254
255 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
256}
257
263void OTG_WKUP_HANDLER(void)
264{
265 exint_flag_clear(OTG_WKUP_EXINT_LINE);
266}
267
268#endif
269
270
276void OTG_IRQ_HANDLER(void)
277{
278 usbd_irq_handler(&otg_core_struct);
279}
280
286void usb_delay_ms(uint32_t ms)
287{
288 /* user can define self delay function */
289 delay_ms(ms);
290}
291
297void usb_delay_us(uint32_t us)
298{
299 delay_us(us);
300}
301
at32f435_437_board.h
audio_hid_class.h
audio_hid_desc.h
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
report_buf
uint8_t report_buf[USBD_AUHID_IN_MAXPACKET_SIZE]
Definition: project/at_start_f437/examples/usb_device/composite_audio_hid/src/main.c:49
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/composite_audio_hid/src/main.c:45
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
USBD_AUHID_IN_MAXPACKET_SIZE
#define USBD_AUHID_IN_MAXPACKET_SIZE
usb custom hid in and out max packet size define
Definition: audio_hid_class.h:67
audio_hid_class_send_report
usb_sts_type audio_hid_class_send_report(void *udev, uint8_t *report, uint16_t len)
usb device class send report
Definition: audio_hid_class.c:827
audio_hid_class_handler
usbd_class_handler audio_hid_class_handler
Definition: audio_hid_class.c:66
HID_REPORT_ID_5
#define HID_REPORT_ID_5
Definition: audio_hid_desc.h:226
audio_hid_desc_handler
usbd_desc_handler audio_hid_desc_handler
device descriptor handler structure
Definition: audio_hid_desc.c:62
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
audio_codec_loop
error_status audio_codec_loop(void)
audio codec loop
Definition: at_start_f437/examples/usb_device/audio/src/audio_codec.c:870
audio_codec_init
error_status audio_codec_init(void)
audio codec init
Definition: at_start_f437/examples/usb_device/audio/src/audio_codec.c:811
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • composite_vcp_keyboard
  • inc
project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • composite_vcp_keyboard
  • inc
project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • composite_vcp_keyboard
  • inc
project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_device
  • composite_vcp_keyboard
  • inc
Macros | Functions
project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...
#define | USB_LOW_POWER_WAKUP
usb low power wakeup handler enable More...

Functions

void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • composite_vcp_keyboard
  • inc
project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
39
52#define USE_OTG_DEVICE_MODE
53
57/* #define USE_OTG_HOST_MODE */
58
63/* use otgfs1 */
64#define OTG_USB_ID 1
65
66/* use otgfs2 */
67/* #define OTG_USB_ID 2 */
68
69#if (OTG_USB_ID == 1)
70#define USB_ID 0
71#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
72#define OTG_IRQ OTGFS1_IRQn
73#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
74#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
75#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
76#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
77
78#define OTG_PIN_GPIO GPIOA
79#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
80
81#define OTG_PIN_DP GPIO_PINS_12
82#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
83
84#define OTG_PIN_DM GPIO_PINS_11
85#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
86
87#define OTG_PIN_VBUS GPIO_PINS_9
88#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
89
90#define OTG_PIN_ID GPIO_PINS_10
91#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
92
93#define OTG_PIN_SOF_GPIO GPIOA
94#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
95#define OTG_PIN_SOF GPIO_PINS_8
96#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
97
98#define OTG_PIN_MUX GPIO_MUX_10
99#endif
100
101#if (OTG_USB_ID == 2)
102#define USB_ID 1
103#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
104#define OTG_IRQ OTGFS2_IRQn
105#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
106#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
107#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
108#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
109
110#define OTG_PIN_GPIO GPIOB
111#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
112
113#define OTG_PIN_DP GPIO_PINS_15
114#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
115
116#define OTG_PIN_DM GPIO_PINS_14
117#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
118
119#define OTG_PIN_VBUS GPIO_PINS_13
120#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
121
122#define OTG_PIN_ID GPIO_PINS_12
123#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
124
125#define OTG_PIN_SOF_GPIO GPIOA
126#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
127#define OTG_PIN_SOF GPIO_PINS_4
128#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
129
130#define OTG_PIN_MUX GPIO_MUX_12
131#endif
132
133
137#ifdef USE_OTG_DEVICE_MODE
141/* otg1 device fifo */
142#define USBD_RX_SIZE 128
143#define USBD_EP0_TX_SIZE 24
144#define USBD_EP1_TX_SIZE 20
145#define USBD_EP2_TX_SIZE 20
146#define USBD_EP3_TX_SIZE 20
147#define USBD_EP4_TX_SIZE 20
148#define USBD_EP5_TX_SIZE 20
149#define USBD_EP6_TX_SIZE 20
150#define USBD_EP7_TX_SIZE 20
151
152/* otg2 device fifo */
153#define USBD2_RX_SIZE 128
154#define USBD2_EP0_TX_SIZE 24
155#define USBD2_EP1_TX_SIZE 20
156#define USBD2_EP2_TX_SIZE 20
157#define USBD2_EP3_TX_SIZE 20
158#define USBD2_EP4_TX_SIZE 20
159#define USBD2_EP5_TX_SIZE 20
160#define USBD2_EP6_TX_SIZE 20
161#define USBD2_EP7_TX_SIZE 20
162
166#ifndef USB_EPT_MAX_NUM
167#define USB_EPT_MAX_NUM 8
168#endif
169#endif
170
174#ifdef USE_OTG_HOST_MODE
175#ifndef USB_HOST_CHANNEL_NUM
176#define USB_HOST_CHANNEL_NUM 16
177#endif
178
182/* otg1 host fifo */
183#define USBH_RX_FIFO_SIZE 128
184#define USBH_NP_TX_FIFO_SIZE 96
185#define USBH_P_TX_FIFO_SIZE 96
186
187/* otg2 host fifo */
188#define USBH2_RX_FIFO_SIZE 128
189#define USBH2_NP_TX_FIFO_SIZE 96
190#define USBH2_P_TX_FIFO_SIZE 96
191#endif
192
196/* #define USB_SOF_OUTPUT_ENABLE */
197
201#define USB_VBUS_IGNORE
202
206#define USB_LOW_POWER_WAKUP
207
208void usb_delay_ms(uint32_t ms);
209void usb_delay_us(uint32_t us);
210
218#ifdef __cplusplus
219}
220#endif
221
222#endif
223
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • composite_vcp_keyboard
  • src
Functions
project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • composite_vcp_keyboard
  • src
project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • composite_vcp_keyboard
  • src
Functions
project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • composite_vcp_keyboard
  • src
project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • composite_vcp_keyboard
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "cdc_keyboard_class.h"
#include "cdc_keyboard_desc.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | keyboard_send_string (void *udev, uint8_t *string, uint8_t len)
keyboard send string More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | button_exint_init (void)
configure button exint More...
void | button_isr (void)
button handler function More...
void | EXINT0_IRQHandler (void)
exint0 interrupt handler More...
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
uint8_t | keyboard_send_flag
uint8_t | usb_buffer [256]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • composite_vcp_keyboard
  • src
project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "cdc_keyboard_class.h"
33#include "cdc_keyboard_desc.h"
34
35
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46uint8_t keyboard_send_flag;
47uint8_t usb_buffer[256];
48
49void usb_clock48m_select(usb_clk48_s clk_s);
50void keyboard_send_string(void *udev, uint8_t *string, uint8_t len);
51void usb_gpio_config(void);
52void usb_low_power_wakeup_config(void);
53void button_exint_init(void);
54void button_isr(void);
55
61void button_exint_init(void)
62{
63 exint_init_type exint_init_struct;
64
65 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
66 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
67
68 exint_default_para_init(&exint_init_struct);
69 exint_init_struct.line_enable = TRUE;
70 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
71 exint_init_struct.line_select = EXINT_LINE_0;
72 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
73 exint_init(&exint_init_struct);
74
75 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
76 nvic_irq_enable(EXINT0_IRQn, 0, 0);
77}
78
84void button_isr(void)
85{
86 /* delay 5ms */
87 delay_ms(5);
88
89 /* clear interrupt pending bit */
90 exint_flag_clear(EXINT_LINE_0);
91
92 keyboard_send_flag = 1;
93}
94
100void EXINT0_IRQHandler(void)
101{
102 button_isr();
103}
104
111void keyboard_send_string(void *udev, uint8_t *string, uint8_t len)
112{
113 uint8_t index = 0;
114 usbd_core_type *pudev = (usbd_core_type *)udev;
115 vcp_keyboard_type *vcpkybrd = (vcp_keyboard_type *)pudev->class_handler->pdata;
116 for(index = 0; index < len; index ++)
117 {
118 while(1)
119 {
120 if(vcpkybrd->g_keyboard_tx_completed == 1)
121 {
122 vcpkybrd->g_keyboard_tx_completed = 0;
123 usb_vcpkybrd_keyboard_send_char(&otg_core_struct.dev, string[index]);
124 break;
125 }
126 }
127 /* send 0x00 */
128 while(1)
129 {
130 if(vcpkybrd->g_keyboard_tx_completed == 1)
131 {
132 vcpkybrd->g_keyboard_tx_completed = 0;
133 usb_vcpkybrd_keyboard_send_char(&otg_core_struct.dev, 0x00);
134 break;
135 }
136 }
137 }
138
139}
140
141
147int main(void)
148{
149 uint16_t data_len;
150
151 uint32_t timeout;
152
153 uint8_t send_zero_packet = 0;
154
155 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
156
157 system_clock_config();
158
159 at32_board_init();
160
161 button_exint_init();
162
163 /* usb gpio config */
164 usb_gpio_config();
165
166#ifdef USB_LOW_POWER_WAKUP
167 usb_low_power_wakeup_config();
168#endif
169
170 /* enable otgfs clock */
171 crm_periph_clock_enable(OTG_CLOCK, TRUE);
172
173 /* select usb 48m clcok source */
174 usb_clock48m_select(USB_CLK_HEXT);
175
176 /* enable otgfs irq */
177 nvic_irq_enable(OTG_IRQ, 0, 0);
178
179 /* init usb */
180 usbd_init(&otg_core_struct,
181 USB_FULL_SPEED_CORE_ID,
182 USB_ID,
183 &cdc_keyboard_class_handler,
184 &cdc_keyboard_desc_handler);
185
186 while(1)
187 {
188 /* get usb vcp receive data */
189 data_len = usb_vcpkybrd_vcp_get_rxdata(&otg_core_struct.dev, usb_buffer);
190
191 if(data_len > 0 || send_zero_packet == 1)
192 {
193 /* bulk transfer is complete when the endpoint does one of the following
194 1 has transferred exactly the amount of data expected
195 2 transfers a packet with a payload size less than wMaxPacketSize or transfers a zero-length packet
196 */
197
198 if(data_len > 0)
199 send_zero_packet = 1;
200
201 if(data_len == 0)
202 send_zero_packet = 0;
203
204 timeout = 5000000;
205 do
206 {
207 /* send data to host */
208 if(usb_vcpkybrd_vcp_send_data(&otg_core_struct.dev, usb_buffer, data_len) == SUCCESS)
209 {
210 break;
211 }
212 }while(timeout --);
213 }
214 if(keyboard_send_flag)
215 {
216 keyboard_send_flag = 0;
217 keyboard_send_string(&otg_core_struct.dev, (uint8_t *)" Keyboard Demo\r\n", 16);
218 }
219
220 }
221}
222
228void usb_clock48m_select(usb_clk48_s clk_s)
229{
230 if(clk_s == USB_CLK_HICK)
231 {
232 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
233
234 /* enable the acc calibration ready interrupt */
235 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
236
237 /* update the c1\c2\c3 value */
238 acc_write_c1(7980);
239 acc_write_c2(8000);
240 acc_write_c3(8020);
241#if (USB_ID == 0)
242 acc_sof_select(ACC_SOF_OTG1);
243#else
244 acc_sof_select(ACC_SOF_OTG2);
245#endif
246 /* open acc calibration */
247 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
248 }
249 else
250 {
251 switch(system_core_clock)
252 {
253 /* 48MHz */
254 case 48000000:
255 crm_usb_clock_div_set(CRM_USB_DIV_1);
256 break;
257
258 /* 72MHz */
259 case 72000000:
260 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
261 break;
262
263 /* 96MHz */
264 case 96000000:
265 crm_usb_clock_div_set(CRM_USB_DIV_2);
266 break;
267
268 /* 120MHz */
269 case 120000000:
270 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
271 break;
272
273 /* 144MHz */
274 case 144000000:
275 crm_usb_clock_div_set(CRM_USB_DIV_3);
276 break;
277
278 /* 168MHz */
279 case 168000000:
280 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
281 break;
282
283 /* 192MHz */
284 case 192000000:
285 crm_usb_clock_div_set(CRM_USB_DIV_4);
286 break;
287
288 /* 216MHz */
289 case 216000000:
290 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
291 break;
292
293 /* 240MHz */
294 case 240000000:
295 crm_usb_clock_div_set(CRM_USB_DIV_5);
296 break;
297
298 /* 264MHz */
299 case 264000000:
300 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
301 break;
302
303 /* 288MHz */
304 case 288000000:
305 crm_usb_clock_div_set(CRM_USB_DIV_6);
306 break;
307
308 default:
309 break;
310
311 }
312 }
313}
314
315
321void usb_gpio_config(void)
322{
323 gpio_init_type gpio_init_struct;
324
325 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
326 gpio_default_para_init(&gpio_init_struct);
327
328 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
329 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
330 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
331 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
332
333 /* dp and dm */
334 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
335 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
336
337 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
338 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
339
340#ifdef USB_SOF_OUTPUT_ENABLE
341 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
342 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
343 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
344 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
345#endif
346
347 /* otgfs use vbus pin */
348#ifndef USB_VBUS_IGNORE
349 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
350 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
351 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
352 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
353#endif
354
355
356}
357#ifdef USB_LOW_POWER_WAKUP
363void usb_low_power_wakeup_config(void)
364{
365 exint_init_type exint_init_struct;
366
367 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
368 exint_default_para_init(&exint_init_struct);
369
370 exint_init_struct.line_enable = TRUE;
371 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
372 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
373 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
374 exint_init(&exint_init_struct);
375
376 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
377}
378
384void OTG_WKUP_HANDLER(void)
385{
386 exint_flag_clear(OTG_WKUP_EXINT_LINE);
387}
388
389#endif
390
396void OTG_IRQ_HANDLER(void)
397{
398 usbd_irq_handler(&otg_core_struct);
399}
400
406void usb_delay_ms(uint32_t ms)
407{
408 /* user can define self delay function */
409 delay_ms(ms);
410}
411
417void usb_delay_us(uint32_t us)
418{
419 delay_us(us);
420}
421
at32f435_437_board.h
cdc_keyboard_class.h
usb cdc and keyboard class file
cdc_keyboard_desc.h
usb cdc and keyboard descriptor header file
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/examples/exint/exint_config/src/main.c:70
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
keyboard_send_flag
uint8_t keyboard_send_flag
Definition: project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/main.c:46
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:61
keyboard_send_string
void keyboard_send_string(void *udev, uint8_t *string, uint8_t len)
keyboard send string
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:111
usb_buffer
uint8_t usb_buffer[256]
Definition: project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/main.c:47
button_isr
void button_isr(void)
button handler function
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:84
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/main.c:45
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
data_len
uint16_t data_len
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:47
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
usb_vcpkybrd_vcp_send_data
error_status usb_vcpkybrd_vcp_send_data(void *udev, uint8_t *send_data, uint16_t len)
usb device class send data
Definition: cdc_keyboard_class.c:610
usb_vcpkybrd_keyboard_send_char
void usb_vcpkybrd_keyboard_send_char(void *udev, uint8_t ascii_code)
usb keyoard send char
Definition: cdc_keyboard_class.c:689
cdc_keyboard_class_handler
usbd_class_handler cdc_keyboard_class_handler
Definition: cdc_keyboard_class.c:205
usb_vcpkybrd_vcp_get_rxdata
uint16_t usb_vcpkybrd_vcp_get_rxdata(void *udev, uint8_t *recv_data)
usb device class rx data process
Definition: cdc_keyboard_class.c:580
cdc_keyboard_desc_handler
usbd_desc_handler cdc_keyboard_desc_handler
device descriptor handler structure
Definition: cdc_keyboard_desc.c:62
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
vcp_keyboard_type
Definition: cdc_keyboard_class.h:75
vcp_keyboard_type::g_keyboard_tx_completed
__IO uint8_t g_keyboard_tx_completed
Definition: cdc_keyboard_class.h:88
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • composite_vcp_msc
  • inc
project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • composite_vcp_msc
  • inc
project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • composite_vcp_msc
  • inc
project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_device
  • composite_vcp_msc
  • inc
Macros | Functions
project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...
#define | USB_LOW_POWER_WAKUP
usb low power wakeup handler enable More...

Functions

void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • composite_vcp_msc
  • inc
project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
39
52#define USE_OTG_DEVICE_MODE
53
57/* #define USE_OTG_HOST_MODE */
58
63/* use otgfs1 */
64#define OTG_USB_ID 1
65
66/* use otgfs2 */
67/* #define OTG_USB_ID 2 */
68
69#if (OTG_USB_ID == 1)
70#define USB_ID 0
71#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
72#define OTG_IRQ OTGFS1_IRQn
73#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
74#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
75#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
76#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
77
78#define OTG_PIN_GPIO GPIOA
79#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
80
81#define OTG_PIN_DP GPIO_PINS_12
82#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
83
84#define OTG_PIN_DM GPIO_PINS_11
85#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
86
87#define OTG_PIN_VBUS GPIO_PINS_9
88#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
89
90#define OTG_PIN_ID GPIO_PINS_10
91#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
92
93#define OTG_PIN_SOF_GPIO GPIOA
94#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
95#define OTG_PIN_SOF GPIO_PINS_8
96#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
97
98#define OTG_PIN_MUX GPIO_MUX_10
99#endif
100
101#if (OTG_USB_ID == 2)
102#define USB_ID 1
103#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
104#define OTG_IRQ OTGFS2_IRQn
105#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
106#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
107#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
108#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
109
110#define OTG_PIN_GPIO GPIOB
111#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
112
113#define OTG_PIN_DP GPIO_PINS_15
114#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
115
116#define OTG_PIN_DM GPIO_PINS_14
117#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
118
119#define OTG_PIN_VBUS GPIO_PINS_13
120#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
121
122#define OTG_PIN_ID GPIO_PINS_12
123#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
124
125#define OTG_PIN_SOF_GPIO GPIOA
126#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
127#define OTG_PIN_SOF GPIO_PINS_4
128#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
129
130#define OTG_PIN_MUX GPIO_MUX_12
131#endif
132
133
137#ifdef USE_OTG_DEVICE_MODE
141/* otg1 device fifo */
142#define USBD_RX_SIZE 128
143#define USBD_EP0_TX_SIZE 24
144#define USBD_EP1_TX_SIZE 20
145#define USBD_EP2_TX_SIZE 20
146#define USBD_EP3_TX_SIZE 20
147#define USBD_EP4_TX_SIZE 20
148#define USBD_EP5_TX_SIZE 20
149#define USBD_EP6_TX_SIZE 20
150#define USBD_EP7_TX_SIZE 20
151
152/* otg2 device fifo */
153#define USBD2_RX_SIZE 128
154#define USBD2_EP0_TX_SIZE 24
155#define USBD2_EP1_TX_SIZE 20
156#define USBD2_EP2_TX_SIZE 20
157#define USBD2_EP3_TX_SIZE 20
158#define USBD2_EP4_TX_SIZE 20
159#define USBD2_EP5_TX_SIZE 20
160#define USBD2_EP6_TX_SIZE 20
161#define USBD2_EP7_TX_SIZE 20
162
166#ifndef USB_EPT_MAX_NUM
167#define USB_EPT_MAX_NUM 8
168#endif
169#endif
170
174#ifdef USE_OTG_HOST_MODE
175#ifndef USB_HOST_CHANNEL_NUM
176#define USB_HOST_CHANNEL_NUM 16
177#endif
178
182/* otg1 host fifo */
183#define USBH_RX_FIFO_SIZE 128
184#define USBH_NP_TX_FIFO_SIZE 96
185#define USBH_P_TX_FIFO_SIZE 96
186
187/* otg2 host fifo */
188#define USBH2_RX_FIFO_SIZE 128
189#define USBH2_NP_TX_FIFO_SIZE 96
190#define USBH2_P_TX_FIFO_SIZE 96
191#endif
192
196/* #define USB_SOF_OUTPUT_ENABLE */
197
201#define USB_VBUS_IGNORE
202
206#define USB_LOW_POWER_WAKUP
207
208void usb_delay_ms(uint32_t ms);
209void usb_delay_us(uint32_t us);
210
218#ifdef __cplusplus
219}
220#endif
221
222#endif
223
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • composite_vcp_msc
  • src
Functions
project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • composite_vcp_msc
  • src
project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • composite_vcp_msc
  • src
Functions
project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • composite_vcp_msc
  • src
project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • composite_vcp_msc
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/composite_vcp_msc/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "cdc_msc_class.h"
#include "cdc_msc_desc.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | button_exint_init (void)
configure button exint More...
void | button_isr (void)
button handler function More...
void | EXINT0_IRQHandler (void)
exint0 interrupt handler More...
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
uint8_t usb_buffer [256]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/composite_vcp_msc/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • composite_vcp_msc
  • src
project/at_start_f437/examples/usb_device/composite_vcp_msc/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "cdc_msc_class.h"
33#include "cdc_msc_desc.h"
34
35
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46uint8_t usb_buffer[256];
47
48void usb_clock48m_select(usb_clk48_s clk_s);
49void usb_gpio_config(void);
50void usb_low_power_wakeup_config(void);
51void button_exint_init(void);
52void button_isr(void);
53
59void button_exint_init(void)
60{
61 exint_init_type exint_init_struct;
62
63 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
64 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
65
66 exint_default_para_init(&exint_init_struct);
67 exint_init_struct.line_enable = TRUE;
68 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
69 exint_init_struct.line_select = EXINT_LINE_0;
70 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
71 exint_init(&exint_init_struct);
72
73 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
74 nvic_irq_enable(EXINT0_IRQn, 0, 0);
75}
76
82void button_isr(void)
83{
84 /* delay 5ms */
85 delay_ms(5);
86
87 /* clear interrupt pending bit */
88 exint_flag_clear(EXINT_LINE_0);
89}
90
96void EXINT0_IRQHandler(void)
97{
98 button_isr();
99}
100
101
102
108int main(void)
109{
110 uint16_t data_len;
111
112 uint32_t timeout;
113
114 uint8_t send_zero_packet = 0;
115
116 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
117
118 system_clock_config();
119
120 at32_board_init();
121
122 button_exint_init();
123
124 /* usb gpio config */
125 usb_gpio_config();
126
127#ifdef USB_LOW_POWER_WAKUP
128 usb_low_power_wakeup_config();
129#endif
130
131 /* enable otgfs clock */
132 crm_periph_clock_enable(OTG_CLOCK, TRUE);
133
134 /* select usb 48m clcok source */
135 usb_clock48m_select(USB_CLK_HEXT);
136
137 /* enable otgfs irq */
138 nvic_irq_enable(OTG_IRQ, 0, 0);
139
140 /* init usb */
141 usbd_init(&otg_core_struct,
142 USB_FULL_SPEED_CORE_ID,
143 USB_ID,
144 &cdc_msc_class_handler,
145 &cdc_msc_desc_handler);
146
147 while(1)
148 {
149 /* get usb vcp receive data */
150 data_len = usb_vcp_get_rxdata(&otg_core_struct.dev, usb_buffer);
151
152 if(data_len > 0 || send_zero_packet == 1)
153 {
154 /* bulk transfer is complete when the endpoint does one of the following
155 1 has transferred exactly the amount of data expected
156 2 transfers a packet with a payload size less than wMaxPacketSize or transfers a zero-length packet
157 */
158
159 if(data_len > 0)
160 send_zero_packet = 1;
161
162 if(data_len == 0)
163 send_zero_packet = 0;
164
165 timeout = 5000000;
166 do
167 {
168 /* send data to host */
169 if(usb_vcp_send_data(&otg_core_struct.dev, usb_buffer, data_len) == SUCCESS)
170 {
171 break;
172 }
173 }while(timeout --);
174 }
175
176 }
177}
178
184void usb_clock48m_select(usb_clk48_s clk_s)
185{
186 if(clk_s == USB_CLK_HICK)
187 {
188 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
189
190 /* enable the acc calibration ready interrupt */
191 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
192
193 /* update the c1\c2\c3 value */
194 acc_write_c1(7980);
195 acc_write_c2(8000);
196 acc_write_c3(8020);
197#if (USB_ID == 0)
198 acc_sof_select(ACC_SOF_OTG1);
199#else
200 acc_sof_select(ACC_SOF_OTG2);
201#endif
202 /* open acc calibration */
203 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
204 }
205 else
206 {
207 switch(system_core_clock)
208 {
209 /* 48MHz */
210 case 48000000:
211 crm_usb_clock_div_set(CRM_USB_DIV_1);
212 break;
213
214 /* 72MHz */
215 case 72000000:
216 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
217 break;
218
219 /* 96MHz */
220 case 96000000:
221 crm_usb_clock_div_set(CRM_USB_DIV_2);
222 break;
223
224 /* 120MHz */
225 case 120000000:
226 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
227 break;
228
229 /* 144MHz */
230 case 144000000:
231 crm_usb_clock_div_set(CRM_USB_DIV_3);
232 break;
233
234 /* 168MHz */
235 case 168000000:
236 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
237 break;
238
239 /* 192MHz */
240 case 192000000:
241 crm_usb_clock_div_set(CRM_USB_DIV_4);
242 break;
243
244 /* 216MHz */
245 case 216000000:
246 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
247 break;
248
249 /* 240MHz */
250 case 240000000:
251 crm_usb_clock_div_set(CRM_USB_DIV_5);
252 break;
253
254 /* 264MHz */
255 case 264000000:
256 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
257 break;
258
259 /* 288MHz */
260 case 288000000:
261 crm_usb_clock_div_set(CRM_USB_DIV_6);
262 break;
263
264 default:
265 break;
266
267 }
268 }
269}
270
271
277void usb_gpio_config(void)
278{
279 gpio_init_type gpio_init_struct;
280
281 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
282 gpio_default_para_init(&gpio_init_struct);
283
284 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
285 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
286 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
287 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
288
289 /* dp and dm */
290 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
291 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
292
293 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
294 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
295
296#ifdef USB_SOF_OUTPUT_ENABLE
297 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
298 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
299 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
300 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
301#endif
302
303 /* otgfs use vbus pin */
304#ifndef USB_VBUS_IGNORE
305 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
306 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
307 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
308 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
309#endif
310
311
312}
313#ifdef USB_LOW_POWER_WAKUP
319void usb_low_power_wakeup_config(void)
320{
321 exint_init_type exint_init_struct;
322
323 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
324 exint_default_para_init(&exint_init_struct);
325
326 exint_init_struct.line_enable = TRUE;
327 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
328 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
329 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
330 exint_init(&exint_init_struct);
331
332 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
333}
334
340void OTG_WKUP_HANDLER(void)
341{
342 exint_flag_clear(OTG_WKUP_EXINT_LINE);
343}
344
345#endif
346
352void OTG_IRQ_HANDLER(void)
353{
354 usbd_irq_handler(&otg_core_struct);
355}
356
362void usb_delay_ms(uint32_t ms)
363{
364 /* user can define self delay function */
365 delay_ms(ms);
366}
367
373void usb_delay_us(uint32_t us)
374{
375 delay_us(us);
376}
377
at32f435_437_board.h
cdc_msc_class.h
usb cdc class file
cdc_msc_desc.h
usb cdc descriptor header file
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/examples/exint/exint_config/src/main.c:70
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:61
button_isr
void button_isr(void)
button handler function
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:84
usb_buffer
uint8_t usb_buffer[256]
Definition: project/at_start_f437/examples/usb_device/composite_vcp_msc/src/main.c:46
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/composite_vcp_msc/src/main.c:45
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
data_len
uint16_t data_len
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:47
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
usb_vcp_get_rxdata
uint16_t usb_vcp_get_rxdata(void *udev, uint8_t *recv_data)
usb device class rx data process
Definition: cdc_class.c:339
usb_vcp_send_data
error_status usb_vcp_send_data(void *udev, uint8_t *send_data, uint16_t len)
usb device class send data
Definition: cdc_class.c:369
cdc_msc_class_handler
usbd_class_handler cdc_msc_class_handler
Definition: cdc_msc_class.c:72
cdc_msc_desc_handler
usbd_desc_handler cdc_msc_desc_handler
device descriptor handler structure
Definition: cdc_msc_desc.c:66
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • custom_hid
  • inc
project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • custom_hid
  • inc
project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • custom_hid
  • inc
project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_device
  • custom_hid
  • inc
Macros | Functions
project/at_start_f437/examples/usb_device/custom_hid/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...

Functions

void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/custom_hid/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • custom_hid
  • inc
project/at_start_f437/examples/usb_device/custom_hid/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "at32f435_437_board.h"
38
50#define USE_OTG_DEVICE_MODE
51
55/* #define USE_OTG_HOST_MODE */
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65/* #define OTG_USB_ID 2 */
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97#endif
98
99#if (OTG_USB_ID == 2)
100#define USB_ID 1
101#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
102#define OTG_IRQ OTGFS2_IRQn
103#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
104#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
105#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
106#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
107
108#define OTG_PIN_GPIO GPIOB
109#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
110
111#define OTG_PIN_DP GPIO_PINS_15
112#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
113
114#define OTG_PIN_DM GPIO_PINS_14
115#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
116
117#define OTG_PIN_VBUS GPIO_PINS_13
118#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
119
120#define OTG_PIN_ID GPIO_PINS_12
121#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
122
123#define OTG_PIN_SOF_GPIO GPIOA
124#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
125#define OTG_PIN_SOF GPIO_PINS_4
126#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
127
128#define OTG_PIN_MUX GPIO_MUX_12
129#endif
130
134#ifdef USE_OTG_DEVICE_MODE
138/* otg1 device fifo */
139#define USBD_RX_SIZE 128
140#define USBD_EP0_TX_SIZE 24
141#define USBD_EP1_TX_SIZE 20
142#define USBD_EP2_TX_SIZE 20
143#define USBD_EP3_TX_SIZE 20
144#define USBD_EP4_TX_SIZE 20
145#define USBD_EP5_TX_SIZE 20
146#define USBD_EP6_TX_SIZE 20
147#define USBD_EP7_TX_SIZE 20
148
149/* otg2 device fifo */
150#define USBD2_RX_SIZE 128
151#define USBD2_EP0_TX_SIZE 24
152#define USBD2_EP1_TX_SIZE 20
153#define USBD2_EP2_TX_SIZE 20
154#define USBD2_EP3_TX_SIZE 20
155#define USBD2_EP4_TX_SIZE 20
156#define USBD2_EP5_TX_SIZE 20
157#define USBD2_EP6_TX_SIZE 20
158#define USBD2_EP7_TX_SIZE 20
159
163#ifndef USB_EPT_MAX_NUM
164#define USB_EPT_MAX_NUM 8
165#endif
166#endif
167
171#ifdef USE_OTG_HOST_MODE
172#ifndef USB_HOST_CHANNEL_NUM
173#define USB_HOST_CHANNEL_NUM 16
174#endif
175
179/* otg1 host fifo */
180#define USBH_RX_FIFO_SIZE 128
181#define USBH_NP_TX_FIFO_SIZE 96
182#define USBH_P_TX_FIFO_SIZE 96
183
184/* otg2 host fifo */
185#define USBH2_RX_FIFO_SIZE 128
186#define USBH2_NP_TX_FIFO_SIZE 96
187#define USBH2_P_TX_FIFO_SIZE 96
188#endif
189
193/* #define USB_SOF_OUTPUT_ENABLE */
194
198#define USB_VBUS_IGNORE
199
203/* #define USB_LOW_POWER_WAKUP */
204
205void usb_delay_ms(uint32_t ms);
206void usb_delay_us(uint32_t us);
207
215#ifdef __cplusplus
216}
217#endif
218
219#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_board.h
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • custom_hid
  • src
Functions
project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • custom_hid
  • src
project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • custom_hid
  • src
Functions
project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • custom_hid
  • src
project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • custom_hid
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/custom_hid/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "custom_hid_class.h"
#include "custom_hid_desc.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
uint8_t report_buf [USBD_CUSTOM_IN_MAXPACKET_SIZE]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/custom_hid/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • custom_hid
  • src
project/at_start_f437/examples/usb_device/custom_hid/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "custom_hid_class.h"
33#include "custom_hid_desc.h"
34
43/* usb global struct define */
44 otg_core_type otg_core_struct;
45uint8_t report_buf[USBD_CUSTOM_IN_MAXPACKET_SIZE];
46void usb_clock48m_select(usb_clk48_s clk_s);
47void usb_gpio_config(void);
48void usb_low_power_wakeup_config(void);
49
55int main(void)
56{
57 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
58
59 system_clock_config();
60
61 at32_board_init();
62
63 /* usb gpio config */
64 usb_gpio_config();
65
66#ifdef USB_LOW_POWER_WAKUP
67 usb_low_power_wakeup_config();
68#endif
69
70 /* enable otgfs clock */
71 crm_periph_clock_enable(OTG_CLOCK, TRUE);
72
73 /* select usb 48m clcok source */
74 usb_clock48m_select(USB_CLK_HEXT);
75
76 /* enable otgfs irq */
77 nvic_irq_enable(OTG_IRQ, 0, 0);
78
79 /* init usb */
80 usbd_init(&otg_core_struct,
81 USB_FULL_SPEED_CORE_ID,
82 USB_ID,
83 &custom_hid_class_handler,
84 &custom_hid_desc_handler);
85
86 while(1)
87 {
88 if(at32_button_press() == USER_BUTTON)
89 {
90 report_buf[0] = HID_REPORT_ID_5;
91 report_buf[1] = (~report_buf[1]) & 0x1;
92 custom_hid_class_send_report(&otg_core_struct.dev, report_buf, USBD_CUSTOM_IN_MAXPACKET_SIZE);
93 }
94 }
95}
96
102void usb_clock48m_select(usb_clk48_s clk_s)
103{
104 if(clk_s == USB_CLK_HICK)
105 {
106 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
107
108 /* enable the acc calibration ready interrupt */
109 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
110
111 /* update the c1\c2\c3 value */
112 acc_write_c1(7980);
113 acc_write_c2(8000);
114 acc_write_c3(8020);
115#if (USB_ID == 0)
116 acc_sof_select(ACC_SOF_OTG1);
117#else
118 acc_sof_select(ACC_SOF_OTG2);
119#endif
120 /* open acc calibration */
121 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
122 }
123 else
124 {
125 switch(system_core_clock)
126 {
127 /* 48MHz */
128 case 48000000:
129 crm_usb_clock_div_set(CRM_USB_DIV_1);
130 break;
131
132 /* 72MHz */
133 case 72000000:
134 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
135 break;
136
137 /* 96MHz */
138 case 96000000:
139 crm_usb_clock_div_set(CRM_USB_DIV_2);
140 break;
141
142 /* 120MHz */
143 case 120000000:
144 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
145 break;
146
147 /* 144MHz */
148 case 144000000:
149 crm_usb_clock_div_set(CRM_USB_DIV_3);
150 break;
151
152 /* 168MHz */
153 case 168000000:
154 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
155 break;
156
157 /* 192MHz */
158 case 192000000:
159 crm_usb_clock_div_set(CRM_USB_DIV_4);
160 break;
161
162 /* 216MHz */
163 case 216000000:
164 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
165 break;
166
167 /* 240MHz */
168 case 240000000:
169 crm_usb_clock_div_set(CRM_USB_DIV_5);
170 break;
171
172 /* 264MHz */
173 case 264000000:
174 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
175 break;
176
177 /* 288MHz */
178 case 288000000:
179 crm_usb_clock_div_set(CRM_USB_DIV_6);
180 break;
181
182 default:
183 break;
184
185 }
186 }
187}
188
194void usb_gpio_config(void)
195{
196 gpio_init_type gpio_init_struct;
197
198 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
199 gpio_default_para_init(&gpio_init_struct);
200
201 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
202 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
203 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
204 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
205
206 /* dp and dm */
207 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
208 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
209
210 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
211 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
212
213#ifdef USB_SOF_OUTPUT_ENABLE
214 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
215 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
216 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
217 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
218#endif
219
220 /* otgfs use vbus pin */
221#ifndef USB_VBUS_IGNORE
222 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
223 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
224 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
225 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
226#endif
227
228
229}
230#ifdef USB_LOW_POWER_WAKUP
236void usb_low_power_wakeup_config(void)
237{
238 exint_init_type exint_init_struct;
239
240 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
241 exint_default_para_init(&exint_init_struct);
242
243 exint_init_struct.line_enable = TRUE;
244 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
245 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
246 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
247 exint_init(&exint_init_struct);
248
249 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
250}
251
257void OTG_WKUP_HANDLER(void)
258{
259 exint_flag_clear(OTG_WKUP_EXINT_LINE);
260}
261
262#endif
263
269void OTG_IRQ_HANDLER(void)
270{
271 usbd_irq_handler(&otg_core_struct);
272}
273
279void usb_delay_ms(uint32_t ms)
280{
281 /* user can define self delay function */
282 delay_ms(ms);
283}
284
290void usb_delay_us(uint32_t us)
291{
292 delay_us(us);
293}
at32f435_437_board.h
custom_hid_class.h
usb hid header file
custom_hid_desc.h
usb custom hid descriptor header file
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
report_buf
uint8_t report_buf[USBD_CUSTOM_IN_MAXPACKET_SIZE]
Definition: project/at_start_f437/examples/usb_device/custom_hid/src/main.c:45
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/custom_hid/src/main.c:44
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
HID_REPORT_ID_5
#define HID_REPORT_ID_5
Definition: audio_hid_desc.h:226
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
USBD_CUSTOM_IN_MAXPACKET_SIZE
#define USBD_CUSTOM_IN_MAXPACKET_SIZE
usb custom hid in and out max packet size define
Definition: custom_hid_class.h:59
custom_hid_class_send_report
usb_sts_type custom_hid_class_send_report(void *udev, uint8_t *report, uint16_t len)
usb device class send report
Definition: custom_hid_class.c:316
custom_hid_class_handler
usbd_class_handler custom_hid_class_handler
Definition: custom_hid_class.c:57
custom_hid_desc_handler
usbd_desc_handler custom_hid_desc_handler
custom hid device descriptor handler structure
Definition: custom_hid_desc.c:62
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • keyboard
  • inc
project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • keyboard
  • inc
project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • keyboard
  • inc
project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_device
  • keyboard
  • inc
Macros | Functions
project/at_start_f437/examples/usb_device/keyboard/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...

Functions

void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/keyboard/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • keyboard
  • inc
project/at_start_f437/examples/usb_device/keyboard/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
39
52#define USE_OTG_DEVICE_MODE
53
57/* #define USE_OTG_HOST_MODE */
58
63/* use otgfs1 */
64#define OTG_USB_ID 1
65
66/* use otgfs2 */
67/* #define OTG_USB_ID 2 */
68#if (OTG_USB_ID == 1)
69#define USB_ID 0
70#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
71#define OTG_IRQ OTGFS1_IRQn
72#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
73#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
74#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
75#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
76
77#define OTG_PIN_GPIO GPIOA
78#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
79
80#define OTG_PIN_DP GPIO_PINS_12
81#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
82
83#define OTG_PIN_DM GPIO_PINS_11
84#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
85
86#define OTG_PIN_VBUS GPIO_PINS_9
87#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
88
89#define OTG_PIN_ID GPIO_PINS_10
90#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
91
92#define OTG_PIN_SOF_GPIO GPIOA
93#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
94#define OTG_PIN_SOF GPIO_PINS_8
95#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
96
97#define OTG_PIN_MUX GPIO_MUX_10
98#endif
99
100#if (OTG_USB_ID == 2)
101#define USB_ID 1
102#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
103#define OTG_IRQ OTGFS2_IRQn
104#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
105#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
106#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
107#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
108
109#define OTG_PIN_GPIO GPIOB
110#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
111
112#define OTG_PIN_DP GPIO_PINS_15
113#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
114
115#define OTG_PIN_DM GPIO_PINS_14
116#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
117
118#define OTG_PIN_VBUS GPIO_PINS_13
119#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
120
121#define OTG_PIN_ID GPIO_PINS_12
122#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
123
124#define OTG_PIN_SOF_GPIO GPIOA
125#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
126#define OTG_PIN_SOF GPIO_PINS_4
127#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
128
129#define OTG_PIN_MUX GPIO_MUX_12
130#endif
131
135#ifdef USE_OTG_DEVICE_MODE
139/* otg1 device fifo */
140#define USBD_RX_SIZE 128
141#define USBD_EP0_TX_SIZE 24
142#define USBD_EP1_TX_SIZE 20
143#define USBD_EP2_TX_SIZE 20
144#define USBD_EP3_TX_SIZE 20
145#define USBD_EP4_TX_SIZE 20
146#define USBD_EP5_TX_SIZE 20
147#define USBD_EP6_TX_SIZE 20
148#define USBD_EP7_TX_SIZE 20
149
150/* otg2 device fifo */
151#define USBD2_RX_SIZE 128
152#define USBD2_EP0_TX_SIZE 24
153#define USBD2_EP1_TX_SIZE 20
154#define USBD2_EP2_TX_SIZE 20
155#define USBD2_EP3_TX_SIZE 20
156#define USBD2_EP4_TX_SIZE 20
157#define USBD2_EP5_TX_SIZE 20
158#define USBD2_EP6_TX_SIZE 20
159#define USBD2_EP7_TX_SIZE 20
160
164#ifndef USB_EPT_MAX_NUM
165#define USB_EPT_MAX_NUM 8
166#endif
167#endif
168
172#ifdef USE_OTG_HOST_MODE
173#ifndef USB_HOST_CHANNEL_NUM
174#define USB_HOST_CHANNEL_NUM 16
175#endif
176
180/* otg1 host fifo */
181#define USBH_RX_FIFO_SIZE 128
182#define USBH_NP_TX_FIFO_SIZE 96
183#define USBH_P_TX_FIFO_SIZE 96
184
185/* otg2 host fifo */
186#define USBH2_RX_FIFO_SIZE 128
187#define USBH2_NP_TX_FIFO_SIZE 96
188#define USBH2_P_TX_FIFO_SIZE 96
189#endif
190
194/* #define USB_SOF_OUTPUT_ENABLE */
195
199#define USB_VBUS_IGNORE
200
204//#define USB_LOW_POWER_WAKUP
205
206void usb_delay_ms(uint32_t ms);
207void usb_delay_us(uint32_t us);
208
216#ifdef __cplusplus
217}
218#endif
219
220#endif
221
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • keyboard
  • src
Functions
project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • keyboard
  • src
project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • keyboard
  • src
Functions
project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • keyboard
  • src
project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • keyboard
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/keyboard/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "keyboard_class.h"
#include "keyboard_desc.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | keyboard_send_string (void *udev, uint8_t *string, uint8_t len)
keyboard send string More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | system_clock_recover (void)
system clock recover. More...
void | button_exint_init (void)
configure button exint More...
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
__IO uint8_t hid_suspend_flag

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/keyboard/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • keyboard
  • src
project/at_start_f437/examples/usb_device/keyboard/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "keyboard_class.h"
33#include "keyboard_desc.h"
34
35
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46extern __IO uint8_t hid_suspend_flag;
47void usb_clock48m_select(usb_clk48_s clk_s);
48void keyboard_send_string(void *udev, uint8_t *string, uint8_t len);
49void usb_gpio_config(void);
50void usb_low_power_wakeup_config(void);
51void system_clock_recover(void);
52void button_exint_init(void);
53
60void keyboard_send_string(void *udev, uint8_t *string, uint8_t len)
61{
62 uint8_t index = 0;
63 usbd_core_type *pudev = (usbd_core_type *)udev;
64 keyboard_type *pkeyboard = (keyboard_type *)pudev->class_handler->pdata;
65 for(index = 0; index < len; index ++)
66 {
67 while(1)
68 {
69 if(pkeyboard->g_u8tx_completed == 1)
70 {
71 pkeyboard->g_u8tx_completed = 0;
72 usb_hid_keyboard_send_char(udev, string[index]);
73 break;
74 }
75 }
76 /* send 0x00 */
77 while(1)
78 {
79 if(pkeyboard->g_u8tx_completed == 1)
80 {
81 pkeyboard->g_u8tx_completed = 0;
82 usb_hid_keyboard_send_char(udev, 0x00);
83 break;
84 }
85 }
86 }
87
88}
89
90
96int main(void)
97{
98 __IO uint32_t delay_index = 0;
99 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
100
101 system_clock_config();
102
103 at32_board_init();
104
105 /* usb gpio config */
106 usb_gpio_config();
107
108#ifdef USB_LOW_POWER_WAKUP
109 /* enable pwc and bpr clock */
110 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
111 button_exint_init();
112 usb_low_power_wakeup_config();
113#endif
114
115 /* enable otgfs clock */
116 crm_periph_clock_enable(OTG_CLOCK, TRUE);
117
118 /* select usb 48m clcok source */
119 usb_clock48m_select(USB_CLK_HEXT);
120
121 /* enable otgfs irq */
122 nvic_irq_enable(OTG_IRQ, 0, 0);
123
124 /* init usb */
125 usbd_init(&otg_core_struct,
126 USB_FULL_SPEED_CORE_ID,
127 USB_ID,
128 &keyboard_class_handler,
129 &keyboard_desc_handler);
130 at32_led_on(LED2);
131 at32_led_on(LED3);
132 at32_led_on(LED4);
133 while(1)
134 {
135 if(at32_button_press() == USER_BUTTON)
136 {
137 if(usbd_connect_state_get(&otg_core_struct.dev) == USB_CONN_STATE_CONFIGURED)
138 {
139 keyboard_send_string(&otg_core_struct.dev, (uint8_t *)" Keyboard Demo\r\n", 16);
140 }
141 /* remote wakeup */
142 if(usbd_connect_state_get(&otg_core_struct.dev) == USB_CONN_STATE_SUSPENDED
143 && (otg_core_struct.dev.remote_wakup == 1))
144 {
145 usbd_remote_wakeup(&otg_core_struct.dev);
146 }
147 }
148
149#ifdef USB_LOW_POWER_WAKUP
150 /* enter deep sleep */
151 if(((keyboard_type *)(otg_core_struct.dev.class_handler->pdata))->hid_suspend_flag == 1)
152 {
153 at32_led_off(LED2);
154 at32_led_off(LED3);
155 at32_led_off(LED4);
156 /* congfig the voltage regulator mode */
157 pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER);
158
159 /* enter deep sleep mode */
160 pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI);
161 /* wait clock stable */
162 for(delay_index = 0; delay_index < 600; delay_index++)
163 {
164 __NOP();
165 }
166 system_clock_recover();
167 ((keyboard_type *)(otg_core_struct.dev.class_handler->pdata))->hid_suspend_flag = 0;
168 at32_led_on(LED2);
169 at32_led_on(LED3);
170 at32_led_on(LED4);
171 }
172 #endif
173
174 }
175}
176
182void usb_clock48m_select(usb_clk48_s clk_s)
183{
184 if(clk_s == USB_CLK_HICK)
185 {
186 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
187
188 /* enable the acc calibration ready interrupt */
189 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
190
191 /* update the c1\c2\c3 value */
192 acc_write_c1(7980);
193 acc_write_c2(8000);
194 acc_write_c3(8020);
195#if (USB_ID == 0)
196 acc_sof_select(ACC_SOF_OTG1);
197#else
198 acc_sof_select(ACC_SOF_OTG2);
199#endif
200 /* open acc calibration */
201 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
202 }
203 else
204 {
205 switch(system_core_clock)
206 {
207 /* 48MHz */
208 case 48000000:
209 crm_usb_clock_div_set(CRM_USB_DIV_1);
210 break;
211
212 /* 72MHz */
213 case 72000000:
214 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
215 break;
216
217 /* 96MHz */
218 case 96000000:
219 crm_usb_clock_div_set(CRM_USB_DIV_2);
220 break;
221
222 /* 120MHz */
223 case 120000000:
224 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
225 break;
226
227 /* 144MHz */
228 case 144000000:
229 crm_usb_clock_div_set(CRM_USB_DIV_3);
230 break;
231
232 /* 168MHz */
233 case 168000000:
234 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
235 break;
236
237 /* 192MHz */
238 case 192000000:
239 crm_usb_clock_div_set(CRM_USB_DIV_4);
240 break;
241
242 /* 216MHz */
243 case 216000000:
244 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
245 break;
246
247 /* 240MHz */
248 case 240000000:
249 crm_usb_clock_div_set(CRM_USB_DIV_5);
250 break;
251
252 /* 264MHz */
253 case 264000000:
254 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
255 break;
256
257 /* 288MHz */
258 case 288000000:
259 crm_usb_clock_div_set(CRM_USB_DIV_6);
260 break;
261
262 default:
263 break;
264
265 }
266 }
267}
268
274void usb_gpio_config(void)
275{
276 gpio_init_type gpio_init_struct;
277
278 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
279 gpio_default_para_init(&gpio_init_struct);
280
281 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
282 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
283 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
284 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
285
286 /* dp and dm */
287 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
288 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
289
290 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
291 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
292
293#ifdef USB_SOF_OUTPUT_ENABLE
294 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
295 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
296 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
297 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
298#endif
299
300 /* otgfs use vbus pin */
301#ifndef USB_VBUS_IGNORE
302 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
303 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
304 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
305 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
306#endif
307
308
309}
310#ifdef USB_LOW_POWER_WAKUP
316void usb_low_power_wakeup_config(void)
317{
318 exint_init_type exint_init_struct;
319
320 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
321 exint_default_para_init(&exint_init_struct);
322
323 exint_init_struct.line_enable = TRUE;
324 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
325 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
326 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
327 exint_init(&exint_init_struct);
328
329 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
330}
331
337void system_clock_recover(void)
338{
339 /* enable external high-speed crystal oscillator - hext */
340 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
341
342 /* wait till hext is ready */
343 while(crm_hext_stable_wait() == ERROR);
344
345 /* enable pll */
346 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
347
348 /* wait till pll is ready */
349 while(crm_flag_get(CRM_PLL_STABLE_FLAG) == RESET);
350
351 /* enable auto step mode */
352 crm_auto_step_mode_enable(TRUE);
353
354 /* select pll as system clock source */
355 crm_sysclk_switch(CRM_SCLK_PLL);
356
357 /* wait till pll is used as system clock source */
358 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL);
359}
360
366void button_exint_init(void)
367{
368 exint_init_type exint_init_struct;
369
370 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
371 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
372
373 exint_default_para_init(&exint_init_struct);
374 exint_init_struct.line_enable = TRUE;
375 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
376 exint_init_struct.line_select = EXINT_LINE_0;
377 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
378 exint_init(&exint_init_struct);
379
380 nvic_irq_enable(EXINT0_IRQn, 0, 0);
381}
382
388void OTG_WKUP_HANDLER(void)
389{
390 exint_flag_clear(OTG_WKUP_EXINT_LINE);
391}
392
398void EXINT0_IRQHandler(void)
399{
400 exint_flag_clear(EXINT_LINE_0);
401}
402
403
404#endif
405
411void OTG_IRQ_HANDLER(void)
412{
413 usbd_irq_handler(&otg_core_struct);
414}
415
421void usb_delay_ms(uint32_t ms)
422{
423 /* user can define self delay function */
424 delay_ms(ms);
425}
426
432void usb_delay_us(uint32_t us)
433{
434 delay_us(us);
435}
436
at32f435_437_board.h
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/examples/exint/exint_config/src/main.c:70
system_clock_recover
void system_clock_recover(void)
system clock recover.
Definition: project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c:141
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:61
keyboard_send_string
void keyboard_send_string(void *udev, uint8_t *string, uint8_t len)
keyboard send string
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:111
hid_suspend_flag
__IO uint8_t hid_suspend_flag
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/keyboard/src/main.c:45
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
ERROR
@ ERROR
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_voltage_regulate_set
void pwc_voltage_regulate_set(pwc_regulator_type pwc_regulator)
regulate low power consumption in the deep sleep mode
Definition: at32f435_437_pwc.c:214
pwc_deep_sleep_mode_enter
void pwc_deep_sleep_mode_enter(pwc_deep_sleep_enter_type pwc_deep_sleep_enter)
enter pwc deep-sleep mode
Definition: at32f435_437_pwc.c:190
PWC_REGULATOR_LOW_POWER
@ PWC_REGULATOR_LOW_POWER
Definition: at32f435_437_pwc.h:130
PWC_DEEP_SLEEP_ENTER_WFI
@ PWC_DEEP_SLEEP_ENTER_WFI
Definition: at32f435_437_pwc.h:120
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usb_hid_keyboard_send_char
void usb_hid_keyboard_send_char(void *udev, uint8_t ascii_code)
usb device class report function
Definition: keyboard_class.c:453
keyboard_class_handler
usbd_class_handler keyboard_class_handler
Definition: keyboard_class.c:189
keyboard_desc_handler
usbd_desc_handler keyboard_desc_handler
keyboard device descriptor handler structure
Definition: keyboard_desc.c:63
USB_CONN_STATE_SUSPENDED
@ USB_CONN_STATE_SUSPENDED
Definition: usb_std.h:132
USB_CONN_STATE_CONFIGURED
@ USB_CONN_STATE_CONFIGURED
Definition: usb_std.h:131
usbd_connect_state_get
usbd_conn_state usbd_connect_state_get(usbd_core_type *udev)
get usb connect state
Definition: usbd_core.c:597
usbd_remote_wakeup
void usbd_remote_wakeup(usbd_core_type *udev)
usb device remote wakeup
Definition: usbd_core.c:607
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
keyboard_class.h
usb hid keyboard header file
keyboard_desc.h
usb keyboard descriptor header file
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
keyboard_type
Definition: keyboard_class.h:67
keyboard_type::g_u8tx_completed
__IO uint8_t g_u8tx_completed
Definition: keyboard_class.h:75
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • mouse
  • inc
project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • mouse
  • inc
project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • mouse
  • inc
project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_device
  • mouse
  • inc
Macros | Functions
project/at_start_f437/examples/usb_device/mouse/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...
#define | USB_LOW_POWER_WAKUP
usb low power wakeup handler enable More...

Functions

void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/mouse/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • mouse
  • inc
project/at_start_f437/examples/usb_device/mouse/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
39
52#define USE_OTG_DEVICE_MODE
53
57/* #define USE_OTG_HOST_MODE */
58
63/* use otgfs1 */
64#define OTG_USB_ID 1
65
66/* use otgfs2 */
67/* #define OTG_USB_ID 2 */
68
69#if (OTG_USB_ID == 1)
70#define USB_ID 0
71#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
72#define OTG_IRQ OTGFS1_IRQn
73#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
74#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
75#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
76#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
77
78#define OTG_PIN_GPIO GPIOA
79#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
80
81#define OTG_PIN_DP GPIO_PINS_12
82#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
83
84#define OTG_PIN_DM GPIO_PINS_11
85#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
86
87#define OTG_PIN_VBUS GPIO_PINS_9
88#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
89
90#define OTG_PIN_ID GPIO_PINS_10
91#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
92
93#define OTG_PIN_SOF_GPIO GPIOA
94#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
95#define OTG_PIN_SOF GPIO_PINS_8
96#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
97
98#define OTG_PIN_MUX GPIO_MUX_10
99#endif
100
101#if (OTG_USB_ID == 2)
102#define USB_ID 1
103#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
104#define OTG_IRQ OTGFS2_IRQn
105#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
106#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
107#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
108#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
109
110#define OTG_PIN_GPIO GPIOB
111#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
112
113#define OTG_PIN_DP GPIO_PINS_15
114#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
115
116#define OTG_PIN_DM GPIO_PINS_14
117#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
118
119#define OTG_PIN_VBUS GPIO_PINS_13
120#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
121
122#define OTG_PIN_ID GPIO_PINS_12
123#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
124
125#define OTG_PIN_SOF_GPIO GPIOA
126#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
127#define OTG_PIN_SOF GPIO_PINS_4
128#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
129
130#define OTG_PIN_MUX GPIO_MUX_12
131#endif
132
136#ifdef USE_OTG_DEVICE_MODE
140/* otg1 device fifo */
141#define USBD_RX_SIZE 128
142#define USBD_EP0_TX_SIZE 24
143#define USBD_EP1_TX_SIZE 20
144#define USBD_EP2_TX_SIZE 20
145#define USBD_EP3_TX_SIZE 20
146#define USBD_EP4_TX_SIZE 20
147#define USBD_EP5_TX_SIZE 20
148#define USBD_EP6_TX_SIZE 20
149#define USBD_EP7_TX_SIZE 20
150
151/* otg2 device fifo */
152#define USBD2_RX_SIZE 128
153#define USBD2_EP0_TX_SIZE 24
154#define USBD2_EP1_TX_SIZE 20
155#define USBD2_EP2_TX_SIZE 20
156#define USBD2_EP3_TX_SIZE 20
157#define USBD2_EP4_TX_SIZE 20
158#define USBD2_EP5_TX_SIZE 20
159#define USBD2_EP6_TX_SIZE 20
160#define USBD2_EP7_TX_SIZE 20
161
165#ifndef USB_EPT_MAX_NUM
166#define USB_EPT_MAX_NUM 8
167#endif
168#endif
169
173#ifdef USE_OTG_HOST_MODE
174#ifndef USB_HOST_CHANNEL_NUM
175#define USB_HOST_CHANNEL_NUM 16
176#endif
177
181/* otg1 host fifo */
182#define USBH_RX_FIFO_SIZE 128
183#define USBH_NP_TX_FIFO_SIZE 96
184#define USBH_P_TX_FIFO_SIZE 96
185
186/* otg2 host fifo */
187#define USBH2_RX_FIFO_SIZE 128
188#define USBH2_NP_TX_FIFO_SIZE 96
189#define USBH2_P_TX_FIFO_SIZE 96
190#endif
191
195/* #define USB_SOF_OUTPUT_ENABLE */
196
200#define USB_VBUS_IGNORE
201
205#define USB_LOW_POWER_WAKUP
206
207void usb_delay_ms(uint32_t ms);
208void usb_delay_us(uint32_t us);
209
210
218#ifdef __cplusplus
219}
220#endif
221
222#endif
223
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • mouse
  • src
Functions
project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • mouse
  • src
project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • mouse
  • src
Functions
project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • mouse
  • src
project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • mouse
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/mouse/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "mouse_class.h"
#include "mouse_desc.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | keyboard_send_string (uint8_t *string, uint8_t len)
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | system_clock_recover (void)
system clock recover. More...
void | button_exint_init (void)
configure button exint More...
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
__IO uint8_t press_mouse = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/mouse/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • mouse
  • src
project/at_start_f437/examples/usb_device/mouse/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "mouse_class.h"
33#include "mouse_desc.h"
34
35
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46__IO uint8_t press_mouse = 0;
47void usb_clock48m_select(usb_clk48_s clk_s);
48void keyboard_send_string(uint8_t *string, uint8_t len);
49void usb_gpio_config(void);
50void usb_low_power_wakeup_config(void);
51void system_clock_recover(void);
52void button_exint_init(void);
53
59int main(void)
60{
61 __IO uint32_t delay_index = 0;
62 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
63
64 system_clock_config();
65
66 at32_board_init();
67
68 /* usb gpio config */
69 usb_gpio_config();
70
71#ifdef USB_LOW_POWER_WAKUP
72 /* enable pwc and bpr clock */
73 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
74 button_exint_init();
75 usb_low_power_wakeup_config();
76#endif
77
78 /* enable otgfs clock */
79 crm_periph_clock_enable(OTG_CLOCK, TRUE);
80
81 /* select usb 48m clcok source */
82 usb_clock48m_select(USB_CLK_HEXT);
83
84 /* enable otgfs irq */
85 nvic_irq_enable(OTG_IRQ, 0, 0);
86
87 /* init usb */
88 usbd_init(&otg_core_struct,
89 USB_FULL_SPEED_CORE_ID,
90 USB_ID,
91 &mouse_class_handler,
92 &mouse_desc_handler);
93
94 at32_led_on(LED2);
95 at32_led_on(LED3);
96 at32_led_on(LED4);
97 while(1)
98 {
99 if(at32_button_press() == USER_BUTTON)
100 {
101 if(usbd_connect_state_get(&otg_core_struct.dev) == USB_CONN_STATE_CONFIGURED)
102 {
103 usb_hid_mouse_send(&otg_core_struct.dev, RIGHT_BUTTON);
104 press_mouse = 1;
105 }
106 /* remote wakeup */
107 if(usbd_connect_state_get(&otg_core_struct.dev) == USB_CONN_STATE_SUSPENDED
108 && (otg_core_struct.dev.remote_wakup == 1))
109 {
110 usbd_remote_wakeup(&otg_core_struct.dev);
111 }
112 }
113 else if(press_mouse == 1)
114 {
115 delay_ms(10);
116 usb_hid_mouse_send(&otg_core_struct.dev, BUTTON_RELEASE);
117 press_mouse = 0;
118
119 }
120 #ifdef USB_LOW_POWER_WAKUP
121 /* enter deep sleep */
122 if(((mouse_type *)(otg_core_struct.dev.class_handler->pdata))->hid_suspend_flag == 1)
123 {
124 at32_led_off(LED2);
125 at32_led_off(LED3);
126 at32_led_off(LED4);
127 /* congfig the voltage regulator mode */
128 pwc_voltage_regulate_set(PWC_REGULATOR_LOW_POWER);
129
130 /* enter deep sleep mode */
131 pwc_deep_sleep_mode_enter(PWC_DEEP_SLEEP_ENTER_WFI);
132 /* wait clock stable */
133 for(delay_index = 0; delay_index < 600; delay_index++)
134 {
135 __NOP();
136 }
137 system_clock_recover();
138 ((mouse_type *)(otg_core_struct.dev.class_handler->pdata))->hid_suspend_flag = 0;
139 at32_led_on(LED2);
140 at32_led_on(LED3);
141 at32_led_on(LED4);
142 }
143 #endif
144 }
145}
146
152void usb_clock48m_select(usb_clk48_s clk_s)
153{
154 if(clk_s == USB_CLK_HICK)
155 {
156 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
157
158 /* enable the acc calibration ready interrupt */
159 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
160
161 /* update the c1\c2\c3 value */
162 acc_write_c1(7980);
163 acc_write_c2(8000);
164 acc_write_c3(8020);
165#if (USB_ID == 0)
166 acc_sof_select(ACC_SOF_OTG1);
167#else
168 acc_sof_select(ACC_SOF_OTG2);
169#endif
170 /* open acc calibration */
171 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
172 }
173 else
174 {
175 switch(system_core_clock)
176 {
177 /* 48MHz */
178 case 48000000:
179 crm_usb_clock_div_set(CRM_USB_DIV_1);
180 break;
181
182 /* 72MHz */
183 case 72000000:
184 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
185 break;
186
187 /* 96MHz */
188 case 96000000:
189 crm_usb_clock_div_set(CRM_USB_DIV_2);
190 break;
191
192 /* 120MHz */
193 case 120000000:
194 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
195 break;
196
197 /* 144MHz */
198 case 144000000:
199 crm_usb_clock_div_set(CRM_USB_DIV_3);
200 break;
201
202 /* 168MHz */
203 case 168000000:
204 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
205 break;
206
207 /* 192MHz */
208 case 192000000:
209 crm_usb_clock_div_set(CRM_USB_DIV_4);
210 break;
211
212 /* 216MHz */
213 case 216000000:
214 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
215 break;
216
217 /* 240MHz */
218 case 240000000:
219 crm_usb_clock_div_set(CRM_USB_DIV_5);
220 break;
221
222 /* 264MHz */
223 case 264000000:
224 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
225 break;
226
227 /* 288MHz */
228 case 288000000:
229 crm_usb_clock_div_set(CRM_USB_DIV_6);
230 break;
231
232 default:
233 break;
234
235 }
236 }
237}
238
244void usb_gpio_config(void)
245{
246 gpio_init_type gpio_init_struct;
247
248 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
249 gpio_default_para_init(&gpio_init_struct);
250
251 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
252 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
253 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
254 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
255
256 /* dp and dm */
257 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
258 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
259
260 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
261 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
262
263#ifdef USB_SOF_OUTPUT_ENABLE
264 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
265 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
266 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
267 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
268#endif
269
270 /* otgfs use vbus pin */
271#ifndef USB_VBUS_IGNORE
272 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
273 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
274 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
275 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
276#endif
277
278
279}
280#ifdef USB_LOW_POWER_WAKUP
286void usb_low_power_wakeup_config(void)
287{
288 exint_init_type exint_init_struct;
289
290 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
291 exint_default_para_init(&exint_init_struct);
292
293 exint_init_struct.line_enable = TRUE;
294 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
295 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
296 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
297 exint_init(&exint_init_struct);
298
299 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
300}
301
307void system_clock_recover(void)
308{
309 /* enable external high-speed crystal oscillator - hext */
310 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
311
312 /* wait till hext is ready */
313 while(crm_hext_stable_wait() == ERROR);
314
315 /* enable pll */
316 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
317
318 /* wait till pll is ready */
319 while(crm_flag_get(CRM_PLL_STABLE_FLAG) == RESET);
320
321 /* enable auto step mode */
322 crm_auto_step_mode_enable(TRUE);
323
324 /* select pll as system clock source */
325 crm_sysclk_switch(CRM_SCLK_PLL);
326
327 /* wait till pll is used as system clock source */
328 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL);
329}
330
336void button_exint_init(void)
337{
338 exint_init_type exint_init_struct;
339
340 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
341 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
342
343 exint_default_para_init(&exint_init_struct);
344 exint_init_struct.line_enable = TRUE;
345 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
346 exint_init_struct.line_select = EXINT_LINE_0;
347 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
348 exint_init(&exint_init_struct);
349
350 nvic_irq_enable(EXINT0_IRQn, 0, 0);
351}
352
358void OTG_WKUP_HANDLER(void)
359{
360 exint_flag_clear(OTG_WKUP_EXINT_LINE);
361}
362
368void EXINT0_IRQHandler(void)
369{
370 exint_flag_clear(EXINT_LINE_0);
371}
372
373#endif
374
380void OTG_IRQ_HANDLER(void)
381{
382 usbd_irq_handler(&otg_core_struct);
383}
384
390void usb_delay_ms(uint32_t ms)
391{
392 /* user can define self delay function */
393 delay_ms(ms);
394}
395
401void usb_delay_us(uint32_t us)
402{
403 delay_us(us);
404}
405
at32f435_437_board.h
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/examples/exint/exint_config/src/main.c:70
system_clock_recover
void system_clock_recover(void)
system clock recover.
Definition: project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c:141
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:61
keyboard_send_string
void keyboard_send_string(void *udev, uint8_t *string, uint8_t len)
keyboard send string
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:111
hid_suspend_flag
__IO uint8_t hid_suspend_flag
press_mouse
__IO uint8_t press_mouse
Definition: project/at_start_f437/examples/usb_device/mouse/src/main.c:46
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/mouse/src/main.c:45
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
ERROR
@ ERROR
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
pwc_voltage_regulate_set
void pwc_voltage_regulate_set(pwc_regulator_type pwc_regulator)
regulate low power consumption in the deep sleep mode
Definition: at32f435_437_pwc.c:214
pwc_deep_sleep_mode_enter
void pwc_deep_sleep_mode_enter(pwc_deep_sleep_enter_type pwc_deep_sleep_enter)
enter pwc deep-sleep mode
Definition: at32f435_437_pwc.c:190
PWC_REGULATOR_LOW_POWER
@ PWC_REGULATOR_LOW_POWER
Definition: at32f435_437_pwc.h:130
PWC_DEEP_SLEEP_ENTER_WFI
@ PWC_DEEP_SLEEP_ENTER_WFI
Definition: at32f435_437_pwc.h:120
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
mouse_class_handler
usbd_class_handler mouse_class_handler
Definition: mouse_class.c:56
usb_hid_mouse_send
void usb_hid_mouse_send(void *udev, uint8_t op)
usb device class report function
Definition: mouse_class.c:314
BUTTON_RELEASE
#define BUTTON_RELEASE
Definition: mouse_class.h:74
RIGHT_BUTTON
#define RIGHT_BUTTON
Definition: mouse_class.h:76
mouse_desc_handler
usbd_desc_handler mouse_desc_handler
mouse device descriptor handler structure
Definition: mouse_desc.c:63
USB_CONN_STATE_SUSPENDED
@ USB_CONN_STATE_SUSPENDED
Definition: usb_std.h:132
USB_CONN_STATE_CONFIGURED
@ USB_CONN_STATE_CONFIGURED
Definition: usb_std.h:131
usbd_connect_state_get
usbd_conn_state usbd_connect_state_get(usbd_core_type *udev)
get usb connect state
Definition: usbd_core.c:597
usbd_remote_wakeup
void usbd_remote_wakeup(usbd_core_type *udev)
usb device remote wakeup
Definition: usbd_core.c:607
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
mouse_class.h
usb hid mouse header file
mouse_desc.h
usb mouse descriptor header file
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
mouse_type
Definition: mouse_class.h:83
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • msc
  • inc
project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • msc
  • inc
project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • msc
  • inc
project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_device
  • msc
  • inc
Macros | Functions
project/at_start_f437/examples/usb_device/msc/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...

Functions

void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/msc/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • msc
  • inc
project/at_start_f437/examples/usb_device/msc/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
39
52#define USE_OTG_DEVICE_MODE
53
57/* #define USE_OTG_HOST_MODE */
58
63/* use otgfs1 */
64#define OTG_USB_ID 1
65
66/* use otgfs2 */
67/* #define OTG_USB_ID 2 */
68
69#if (OTG_USB_ID == 1)
70#define USB_ID 0
71#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
72#define OTG_IRQ OTGFS1_IRQn
73#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
74#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
75#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
76#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
77
78#define OTG_PIN_GPIO GPIOA
79#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
80
81#define OTG_PIN_DP GPIO_PINS_12
82#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
83
84#define OTG_PIN_DM GPIO_PINS_11
85#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
86
87#define OTG_PIN_VBUS GPIO_PINS_9
88#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
89
90#define OTG_PIN_ID GPIO_PINS_10
91#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
92
93#define OTG_PIN_SOF_GPIO GPIOA
94#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
95#define OTG_PIN_SOF GPIO_PINS_8
96#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
97
98#define OTG_PIN_MUX GPIO_MUX_10
99#endif
100
101#if (OTG_USB_ID == 2)
102#define USB_ID 1
103#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
104#define OTG_IRQ OTGFS2_IRQn
105#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
106#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
107#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
108#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
109
110#define OTG_PIN_GPIO GPIOB
111#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
112
113#define OTG_PIN_DP GPIO_PINS_15
114#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
115
116#define OTG_PIN_DM GPIO_PINS_14
117#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
118
119#define OTG_PIN_VBUS GPIO_PINS_13
120#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
121
122#define OTG_PIN_ID GPIO_PINS_12
123#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
124
125#define OTG_PIN_SOF_GPIO GPIOA
126#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
127#define OTG_PIN_SOF GPIO_PINS_4
128#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
129
130#define OTG_PIN_MUX GPIO_MUX_12
131#endif
132
136#ifdef USE_OTG_DEVICE_MODE
140/* otg1 device fifo */
141#define USBD_RX_SIZE 128
142#define USBD_EP0_TX_SIZE 24
143#define USBD_EP1_TX_SIZE 20
144#define USBD_EP2_TX_SIZE 20
145#define USBD_EP3_TX_SIZE 20
146#define USBD_EP4_TX_SIZE 20
147#define USBD_EP5_TX_SIZE 20
148#define USBD_EP6_TX_SIZE 20
149#define USBD_EP7_TX_SIZE 20
150
151/* otg2 device fifo */
152#define USBD2_RX_SIZE 128
153#define USBD2_EP0_TX_SIZE 24
154#define USBD2_EP1_TX_SIZE 20
155#define USBD2_EP2_TX_SIZE 20
156#define USBD2_EP3_TX_SIZE 20
157#define USBD2_EP4_TX_SIZE 20
158#define USBD2_EP5_TX_SIZE 20
159#define USBD2_EP6_TX_SIZE 20
160#define USBD2_EP7_TX_SIZE 20
161
165#ifndef USB_EPT_MAX_NUM
166#define USB_EPT_MAX_NUM 8
167#endif
168#endif
169
173#ifdef USE_OTG_HOST_MODE
174#ifndef USB_HOST_CHANNEL_NUM
175#define USB_HOST_CHANNEL_NUM 16
176#endif
177
181/* otg1 host fifo */
182#define USBH_RX_FIFO_SIZE 128
183#define USBH_NP_TX_FIFO_SIZE 96
184#define USBH_P_TX_FIFO_SIZE 96
185
186/* otg2 host fifo */
187#define USBH2_RX_FIFO_SIZE 128
188#define USBH2_NP_TX_FIFO_SIZE 96
189#define USBH2_P_TX_FIFO_SIZE 96
190#endif
191
195/* #define USB_SOF_OUTPUT_ENABLE */
196
200#define USB_VBUS_IGNORE
201
205/* #define USB_LOW_POWER_WAKUP */
206
207void usb_delay_ms(uint32_t ms);
208void usb_delay_us(uint32_t us);
209
217#ifdef __cplusplus
218}
219#endif
220
221#endif
222
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • msc
  • src
Functions
project/at_start_f437/examples/usb_device/msc/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/msc/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • msc
  • src
project/at_start_f437/examples/usb_device/msc/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/msc/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • msc
  • src
Functions
project/at_start_f437/examples/usb_device/msc/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/msc/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • msc
  • src
project/at_start_f437/examples/usb_device/msc/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • msc
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/msc/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "msc_class.h"
#include "msc_desc.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/msc/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • msc
  • src
project/at_start_f437/examples/usb_device/msc/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "msc_class.h"
33#include "msc_desc.h"
34
35
36
45/* usb global struct define */
46 otg_core_type otg_core_struct;
47void usb_clock48m_select(usb_clk48_s clk_s);
48void usb_gpio_config(void);
49void usb_low_power_wakeup_config(void);
50
56int main(void)
57{
58 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
59
60 system_clock_config();
61
62 at32_board_init();
63
64 /* usb gpio config */
65 usb_gpio_config();
66
67#ifdef USB_LOW_POWER_WAKUP
68 usb_low_power_wakeup_config();
69#endif
70
71 /* enable otgfs clock */
72 crm_periph_clock_enable(OTG_CLOCK, TRUE);
73
74 /* select usb 48m clcok source */
75 usb_clock48m_select(USB_CLK_HEXT);
76
77 /* enable otgfs irq */
78 nvic_irq_enable(OTG_IRQ, 0, 0);
79
80 /* init usb */
81 usbd_init(&otg_core_struct,
82 USB_FULL_SPEED_CORE_ID,
83 USB_ID,
84 &msc_class_handler,
85 &msc_desc_handler);
86
87 while(1)
88 {
89
90 }
91}
92
98void usb_clock48m_select(usb_clk48_s clk_s)
99{
100 if(clk_s == USB_CLK_HICK)
101 {
102 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
103
104 /* enable the acc calibration ready interrupt */
105 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
106
107 /* update the c1\c2\c3 value */
108 acc_write_c1(7980);
109 acc_write_c2(8000);
110 acc_write_c3(8020);
111#if (USB_ID == 0)
112 acc_sof_select(ACC_SOF_OTG1);
113#else
114 acc_sof_select(ACC_SOF_OTG2);
115#endif
116 /* open acc calibration */
117 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
118 }
119 else
120 {
121 switch(system_core_clock)
122 {
123 /* 48MHz */
124 case 48000000:
125 crm_usb_clock_div_set(CRM_USB_DIV_1);
126 break;
127
128 /* 72MHz */
129 case 72000000:
130 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
131 break;
132
133 /* 96MHz */
134 case 96000000:
135 crm_usb_clock_div_set(CRM_USB_DIV_2);
136 break;
137
138 /* 120MHz */
139 case 120000000:
140 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
141 break;
142
143 /* 144MHz */
144 case 144000000:
145 crm_usb_clock_div_set(CRM_USB_DIV_3);
146 break;
147
148 /* 168MHz */
149 case 168000000:
150 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
151 break;
152
153 /* 192MHz */
154 case 192000000:
155 crm_usb_clock_div_set(CRM_USB_DIV_4);
156 break;
157
158 /* 216MHz */
159 case 216000000:
160 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
161 break;
162
163 /* 240MHz */
164 case 240000000:
165 crm_usb_clock_div_set(CRM_USB_DIV_5);
166 break;
167
168 /* 264MHz */
169 case 264000000:
170 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
171 break;
172
173 /* 288MHz */
174 case 288000000:
175 crm_usb_clock_div_set(CRM_USB_DIV_6);
176 break;
177
178 default:
179 break;
180
181 }
182 }
183}
184
190void usb_gpio_config(void)
191{
192 gpio_init_type gpio_init_struct;
193
194 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
195 gpio_default_para_init(&gpio_init_struct);
196
197 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
198 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
199 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
200 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
201
202 /* dp and dm */
203 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
204 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
205
206 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
207 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
208
209#ifdef USB_SOF_OUTPUT_ENABLE
210 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
211 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
212 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
213 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
214#endif
215
216 /* otgfs use vbus pin */
217#ifndef USB_VBUS_IGNORE
218 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
219 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
220 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
221 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
222#endif
223
224
225}
226#ifdef USB_LOW_POWER_WAKUP
232void usb_low_power_wakeup_config(void)
233{
234 exint_init_type exint_init_struct;
235
236 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
237 exint_default_para_init(&exint_init_struct);
238
239 exint_init_struct.line_enable = TRUE;
240 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
241 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
242 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
243 exint_init(&exint_init_struct);
244
245 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
246}
247
253void OTG_WKUP_HANDLER(void)
254{
255 exint_flag_clear(OTG_WKUP_EXINT_LINE);
256}
257
258#endif
259
265void OTG_IRQ_HANDLER(void)
266{
267 usbd_irq_handler(&otg_core_struct);
268}
269
275void usb_delay_ms(uint32_t ms)
276{
277 /* user can define self delay function */
278 delay_ms(ms);
279}
280
286void usb_delay_us(uint32_t us)
287{
288 delay_us(us);
289}
290
at32f435_437_board.h
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/msc/src/main.c:46
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
msc_class_handler
usbd_class_handler msc_class_handler
Definition: msc_class.c:57
msc_desc_handler
usbd_desc_handler msc_desc_handler
device descriptor handler structure
Definition: msc_desc.c:64
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
msc_class.h
usb msc class file
msc_desc.h
usb msc descriptor header file
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • otg1_host_otg2_device_demo
  • inc
project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • otg1_host_otg2_device_demo
  • inc
project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • otg1_host_otg2_device_demo
  • inc
project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_device
  • otg1_host_otg2_device_demo
  • inc
Macros | Functions
project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "at32f435_437_board.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | USE_OTG_HOST_MODE
enable usb host mode More...
#define | USB_ID 0
select otgfs1 or otgfs2 define More...
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | OTG_PIN_POWER_SWITCH_GPIO GPIOH
#define | OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOH_PERIPH_CLOCK
#define | OTG_PIN_POWER_SWITCH GPIO_PINS_3
#define | USB2_ID 1
#define | OTG2_CLOCK CRM_OTGFS2_PERIPH_CLOCK
#define | OTG2_IRQ OTGFS2_IRQn
#define | OTG2_IRQ_HANDLER OTGFS2_IRQHandler
#define | OTG2_WKUP_IRQ OTGFS2_WKUP_IRQn
#define | OTG2_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
#define | OTG2_WKUP_EXINT_LINE EXINT_LINE_20
#define | OTG2_PIN_GPIO GPIOB
#define | OTG2_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define | OTG2_PIN_DP GPIO_PINS_15
#define | OTG2_PIN_DP_SOURCE GPIO_PINS_SOURCE15
#define | OTG2_PIN_DM GPIO_PINS_14
#define | OTG2_PIN_DM_SOURCE GPIO_PINS_SOURCE14
#define | OTG2_PIN_VBUS GPIO_PINS_13
#define | OTG2_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
#define | OTG2_PIN_ID GPIO_PINS_12
#define | OTG2_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG2_PIN_SOF_GPIO GPIOA
#define | OTG2_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG2_PIN_SOF GPIO_PINS_4
#define | OTG2_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
#define | OTG2_PIN_MUX GPIO_MUX_12
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USBH_RX_FIFO_SIZE 128
usb endpoint max num define More...
#define | USBH_NP_TX_FIFO_SIZE 96
#define | USBH_P_TX_FIFO_SIZE 96
#define | USBH2_RX_FIFO_SIZE 128
#define | USBH2_NP_TX_FIFO_SIZE 96
#define | USBH2_P_TX_FIFO_SIZE 96
#define | USBH_5V_POWER_SWITCH
#define | USB_VBUS_IGNORE
usb sof output enable More...
#define | USBH_DEBUG_ENABLE
usb low power wakeup handler enable More...
#define | USBH_DEBUG(...)

Functions

void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • otg1_host_otg2_device_demo
  • inc
project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "at32f435_437_board.h"
38#include "stdio.h"
39
51#define USE_OTG_DEVICE_MODE
52
56#define USE_OTG_HOST_MODE
57
62#define USB_ID 0
63#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
64#define OTG_IRQ OTGFS1_IRQn
65#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
66#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
67#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
68#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
69
70#define OTG_PIN_GPIO GPIOA
71#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
72
73#define OTG_PIN_DP GPIO_PINS_12
74#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
75
76#define OTG_PIN_DM GPIO_PINS_11
77#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
78
79#define OTG_PIN_VBUS GPIO_PINS_9
80#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
81
82#define OTG_PIN_ID GPIO_PINS_10
83#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
84
85#define OTG_PIN_SOF_GPIO GPIOA
86#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
87#define OTG_PIN_SOF GPIO_PINS_8
88#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
89
90#define OTG_PIN_MUX GPIO_MUX_10
91#define OTG_PIN_POWER_SWITCH_GPIO GPIOH
92#define OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOH_PERIPH_CLOCK
93#define OTG_PIN_POWER_SWITCH GPIO_PINS_3
94
95
96#define USB2_ID 1
97#define OTG2_CLOCK CRM_OTGFS2_PERIPH_CLOCK
98#define OTG2_IRQ OTGFS2_IRQn
99#define OTG2_IRQ_HANDLER OTGFS2_IRQHandler
100#define OTG2_WKUP_IRQ OTGFS2_WKUP_IRQn
101#define OTG2_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
102#define OTG2_WKUP_EXINT_LINE EXINT_LINE_20
103
104#define OTG2_PIN_GPIO GPIOB
105#define OTG2_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
106
107#define OTG2_PIN_DP GPIO_PINS_15
108#define OTG2_PIN_DP_SOURCE GPIO_PINS_SOURCE15
109
110#define OTG2_PIN_DM GPIO_PINS_14
111#define OTG2_PIN_DM_SOURCE GPIO_PINS_SOURCE14
112
113#define OTG2_PIN_VBUS GPIO_PINS_13
114#define OTG2_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
115
116#define OTG2_PIN_ID GPIO_PINS_12
117#define OTG2_PIN_ID_SOURCE GPIO_PINS_SOURCE10
118
119#define OTG2_PIN_SOF_GPIO GPIOA
120#define OTG2_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
121#define OTG2_PIN_SOF GPIO_PINS_4
122#define OTG2_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
123
124#define OTG2_PIN_MUX GPIO_MUX_12
125
129#ifdef USE_OTG_DEVICE_MODE
133/* otg1 device fifo */
134#define USBD_RX_SIZE 128
135#define USBD_EP0_TX_SIZE 24
136#define USBD_EP1_TX_SIZE 20
137#define USBD_EP2_TX_SIZE 20
138#define USBD_EP3_TX_SIZE 20
139#define USBD_EP4_TX_SIZE 20
140#define USBD_EP5_TX_SIZE 20
141#define USBD_EP6_TX_SIZE 20
142#define USBD_EP7_TX_SIZE 20
143
144/* otg2 device fifo */
145#define USBD2_RX_SIZE 128
146#define USBD2_EP0_TX_SIZE 24
147#define USBD2_EP1_TX_SIZE 20
148#define USBD2_EP2_TX_SIZE 20
149#define USBD2_EP3_TX_SIZE 20
150#define USBD2_EP4_TX_SIZE 20
151#define USBD2_EP5_TX_SIZE 20
152#define USBD2_EP6_TX_SIZE 20
153#define USBD2_EP7_TX_SIZE 20
154
158#ifndef USB_EPT_MAX_NUM
159#define USB_EPT_MAX_NUM 8
160#endif
161#endif
162
166#ifdef USE_OTG_HOST_MODE
167#ifndef USB_HOST_CHANNEL_NUM
168#define USB_HOST_CHANNEL_NUM 16
169#endif
170
174/* otg1 host fifo */
175#define USBH_RX_FIFO_SIZE 128
176#define USBH_NP_TX_FIFO_SIZE 96
177#define USBH_P_TX_FIFO_SIZE 96
178
179/* otg2 host fifo */
180#define USBH2_RX_FIFO_SIZE 128
181#define USBH2_NP_TX_FIFO_SIZE 96
182#define USBH2_P_TX_FIFO_SIZE 96
183
184/* usb host vbus power switch */
185#define USBH_5V_POWER_SWITCH
186#endif
187
191/* #define USB_SOF_OUTPUT_ENABLE */
192
196#define USB_VBUS_IGNORE
197
201/* #define USB_LOW_POWER_WAKUP */
202
203#define USBH_DEBUG_ENABLE
204
205#ifdef USBH_DEBUG_ENABLE
206#define USBH_DEBUG(...) printf(__VA_ARGS__);\
207 printf("\r\n");
208#else
209#define USBH_DEBUG(...)
210#endif
211
212void usb_delay_ms(uint32_t ms);
213void usb_delay_us(uint32_t us);
221#ifdef __cplusplus
222}
223#endif
224
225#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_board.h
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • otg1_host_otg2_device_demo
  • src
Functions
project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • otg1_host_otg2_device_demo
  • src
project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • otg1_host_otg2_device_demo
  • src
Functions
project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • otg1_host_otg2_device_demo
  • src
project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • otg1_host_otg2_device_demo
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "usbh_int.h"
#include "custom_hid_class.h"
#include "custom_hid_desc.h"
#include "usbh_hid_class.h"
#include "usbh_user.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | button_exint_init (void)
configure button exint More...
void | button_isr (void)
button handler function More...
int | main (void)
main function. More...
void | EXINT0_IRQHandler (void)
exint0 interrupt handler More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | OTG2_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
otg_core_type otg2_core_struct
uint8_t | report_buf [USBD_CUSTOM_IN_MAXPACKET_SIZE]
__IO uint8_t | button_press = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • otg1_host_otg2_device_demo
  • src
project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "usbh_int.h"
33#include "custom_hid_class.h"
34#include "custom_hid_desc.h"
35#include "usbh_hid_class.h"
36#include "usbh_user.h"
37
46/* usb global struct define */
47 otg_core_type otg_core_struct;
48 otg_core_type otg2_core_struct;
49uint8_t report_buf[USBD_CUSTOM_IN_MAXPACKET_SIZE];
50__IO uint8_t button_press = 0;
51
52void usb_clock48m_select(usb_clk48_s clk_s);
53void usb_gpio_config(void);
54void usb_low_power_wakeup_config(void);
55void button_exint_init(void);
56void button_isr(void);
57
63int main(void)
64{
65 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
66
67 system_clock_config();
68
69 at32_board_init();
70
71 button_exint_init();
72
73 /* usb gpio config */
74 usb_gpio_config();
75
76 uart_print_init(115200);
77
78#ifdef USB_LOW_POWER_WAKUP
79 usb_low_power_wakeup_config();
80#endif
81
82 /* enable otgfs clock */
83 crm_periph_clock_enable(OTG_CLOCK, TRUE);
84 crm_periph_clock_enable(OTG2_CLOCK, TRUE);
85
86 /* select usb 48m clcok source */
87 usb_clock48m_select(USB_CLK_HEXT);
88
89 /* enable otgfs irq */
90 nvic_irq_enable(OTG_IRQ, 0, 0);
91 nvic_irq_enable(OTG2_IRQ, 0, 0);
92
93 /* init otg1 device */
94 usbh_init(&otg_core_struct,
95 USB_FULL_SPEED_CORE_ID,
96 USB_ID,
97 &uhost_hid_class_handler,
98 &usbh_user_handle);
99
100 /* init otg2 device */
101 usbd_init(&otg2_core_struct,
102 USB_FULL_SPEED_CORE_ID,
103 USB2_ID,
104 &custom_hid_class_handler,
105 &custom_hid_desc_handler);
106 while(1)
107 {
108 usbh_loop_handler(&otg_core_struct.host);
109 /* otg2 custom hid */
110 if(button_press == 1)
111 {
112 report_buf[0] = HID_REPORT_ID_5;
113 report_buf[1] = (~report_buf[1]) & 0x1;
114 custom_hid_class_send_report(&otg2_core_struct.dev, report_buf, USBD_CUSTOM_IN_MAXPACKET_SIZE);
115 button_press = 0;
116 }
117 }
118}
119
125void button_exint_init(void)
126{
127 exint_init_type exint_init_struct;
128
129 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
130 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
131
132 exint_default_para_init(&exint_init_struct);
133 exint_init_struct.line_enable = TRUE;
134 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
135 exint_init_struct.line_select = EXINT_LINE_0;
136 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
137 exint_init(&exint_init_struct);
138
139 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
140 nvic_irq_enable(EXINT0_IRQn, 0, 0);
141}
142
148void button_isr(void)
149{
150 /* delay 5ms */
151 delay_ms(5);
152
153 /* clear interrupt pending bit */
154 exint_flag_clear(EXINT_LINE_0);
155
156 button_press = 1;
157}
158
164void EXINT0_IRQHandler(void)
165{
166 button_isr();
167}
168
174void usb_clock48m_select(usb_clk48_s clk_s)
175{
176 if(clk_s == USB_CLK_HICK)
177 {
178 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
179
180 /* enable the acc calibration ready interrupt */
181 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
182
183 /* update the c1\c2\c3 value */
184 acc_write_c1(7980);
185 acc_write_c2(8000);
186 acc_write_c3(8020);
187
188 acc_sof_select(ACC_SOF_OTG2);
189
190 /* open acc calibration */
191 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
192 }
193 else
194 {
195 switch(system_core_clock)
196 {
197 /* 48MHz */
198 case 48000000:
199 crm_usb_clock_div_set(CRM_USB_DIV_1);
200 break;
201
202 /* 72MHz */
203 case 72000000:
204 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
205 break;
206
207 /* 96MHz */
208 case 96000000:
209 crm_usb_clock_div_set(CRM_USB_DIV_2);
210 break;
211
212 /* 120MHz */
213 case 120000000:
214 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
215 break;
216
217 /* 144MHz */
218 case 144000000:
219 crm_usb_clock_div_set(CRM_USB_DIV_3);
220 break;
221
222 /* 168MHz */
223 case 168000000:
224 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
225 break;
226
227 /* 192MHz */
228 case 192000000:
229 crm_usb_clock_div_set(CRM_USB_DIV_4);
230 break;
231
232 /* 216MHz */
233 case 216000000:
234 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
235 break;
236
237 /* 240MHz */
238 case 240000000:
239 crm_usb_clock_div_set(CRM_USB_DIV_5);
240 break;
241
242 /* 264MHz */
243 case 264000000:
244 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
245 break;
246
247 /* 288MHz */
248 case 288000000:
249 crm_usb_clock_div_set(CRM_USB_DIV_6);
250 break;
251
252 default:
253 break;
254
255 }
256 }
257}
258
264void usb_gpio_config(void)
265{
266 gpio_init_type gpio_init_struct;
267
268 /* otg1 gpio config */
269 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
270 gpio_default_para_init(&gpio_init_struct);
271
272 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
273 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
274 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
275 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
276
277 /* dp and dm */
278 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
279 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
280
281 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
282 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
283
284#ifdef USB_SOF_OUTPUT_ENABLE
285 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
286 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
287 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
288 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
289#endif
290
291 /* otgfs use vbus pin */
292#ifndef USB_VBUS_IGNORE
293 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
294 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
295 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
296 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
297#endif
298
299#ifdef USBH_5V_POWER_SWITCH
300 crm_periph_clock_enable(OTG_PIN_POWER_SWITCH_CLOCK, TRUE);
301 gpio_bits_set(OTG_PIN_POWER_SWITCH_GPIO, OTG_PIN_POWER_SWITCH);
302
303 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
304 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
305 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
306 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
307 gpio_init_struct.gpio_pins = OTG_PIN_POWER_SWITCH;
308 gpio_init(OTG_PIN_POWER_SWITCH_GPIO, &gpio_init_struct);
309#endif
310
311 /* otg2 gpio config */
312 crm_periph_clock_enable(OTG2_PIN_GPIO_CLOCK, TRUE);
313 gpio_default_para_init(&gpio_init_struct);
314
315 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
316 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
317 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
318 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
319
320 /* dp and dm */
321 gpio_init_struct.gpio_pins = OTG2_PIN_DP | OTG2_PIN_DM;
322 gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
323
324 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DP_SOURCE, OTG2_PIN_MUX);
325 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DM_SOURCE, OTG2_PIN_MUX);
326
327#ifdef USB_SOF_OUTPUT_ENABLE
328 crm_periph_clock_enable(OTG2_PIN_SOF_GPIO_CLOCK, TRUE);
329 gpio_init_struct.gpio_pins = OTG2_PIN_SOF;
330 gpio_init(OTG2_PIN_SOF_GPIO, &gpio_init_struct);
331 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_SOF_SOURCE, OTG2_PIN_MUX);
332#endif
333
334 /* otgfs use vbus pin */
335#ifndef USB_VBUS_IGNORE
336 gpio_init_struct.gpio_pins = OTG2_PIN_VBUS;
337 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
338 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_VBUS_SOURCE, OTG2_PIN_MUX);
339 gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
340#endif
341
342
343}
344#ifdef USB_LOW_POWER_WAKUP
350void usb_low_power_wakeup_config(void)
351{
352 exint_init_type exint_init_struct;
353
354 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
355 exint_default_para_init(&exint_init_struct);
356
357 /*otg1*/
358 exint_init_struct.line_enable = TRUE;
359 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
360 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
361 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
362 exint_init(&exint_init_struct);
363
364 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
365
366 /*otg2*/
367 exint_init_struct.line_enable = TRUE;
368 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
369 exint_init_struct.line_select = OTG2_WKUP_EXINT_LINE;
370 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
371 exint_init(&exint_init_struct);
372
373 nvic_irq_enable(OTG2_WKUP_IRQ, 0, 0);
374}
375
381void OTG_WKUP_HANDLER(void)
382{
383 exint_flag_clear(OTG_WKUP_EXINT_LINE);
384}
385
391void OTG2_WKUP_HANDLER(void)
392{
393 exint_flag_clear(OTG2_WKUP_EXINT_LINE);
394}
395
396#endif
397
403void OTG_IRQ_HANDLER(void)
404{
405 usbh_irq_handler(&otg_core_struct);
406}
407
413void OTG2_IRQ_HANDLER(void)
414{
415 usbd_irq_handler(&otg2_core_struct);
416}
417
423void usb_delay_ms(uint32_t ms)
424{
425 /* user can define self delay function */
426 delay_ms(ms);
427}
428
434void usb_delay_us(uint32_t us)
435{
436 delay_us(us);
437}
438
at32f435_437_board.h
usbh_user.h
usb host user header file
custom_hid_class.h
usb hid header file
custom_hid_desc.h
usb custom hid descriptor header file
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/examples/exint/exint_config/src/main.c:70
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:61
button_isr
void button_isr(void)
button handler function
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:84
OTG_PIN_POWER_SWITCH_GPIO
#define OTG_PIN_POWER_SWITCH_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:91
OTG2_PIN_DP_SOURCE
#define OTG2_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:108
OTG_PIN_POWER_SWITCH
#define OTG_PIN_POWER_SWITCH
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:93
OTG2_IRQ
#define OTG2_IRQ
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:98
report_buf
uint8_t report_buf[USBD_CUSTOM_IN_MAXPACKET_SIZE]
Definition: project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:49
OTG2_PIN_VBUS_SOURCE
#define OTG2_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:114
OTG2_PIN_SOF_SOURCE
#define OTG2_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:122
button_press
__IO uint8_t button_press
Definition: project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:50
otg2_core_struct
otg_core_type otg2_core_struct
Definition: project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:48
OTG2_PIN_GPIO_CLOCK
#define OTG2_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:105
OTG2_WKUP_IRQ
#define OTG2_WKUP_IRQ
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:100
OTG2_PIN_GPIO
#define OTG2_PIN_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:104
OTG_PIN_POWER_SWITCH_CLOCK
#define OTG_PIN_POWER_SWITCH_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:92
usbh_user_handle
usbh_user_handler_type usbh_user_handle
Definition: at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c:50
OTG2_PIN_DM
#define OTG2_PIN_DM
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:110
OTG2_PIN_DP
#define OTG2_PIN_DP
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:107
OTG2_PIN_VBUS
#define OTG2_PIN_VBUS
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:113
USB2_ID
#define USB2_ID
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:96
OTG2_PIN_SOF_GPIO_CLOCK
#define OTG2_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:120
OTG2_PIN_SOF_GPIO
#define OTG2_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:119
OTG2_CLOCK
#define OTG2_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:97
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/main.c:47
OTG2_PIN_DM_SOURCE
#define OTG2_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:111
OTG2_WKUP_HANDLER
#define OTG2_WKUP_HANDLER
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:101
OTG2_WKUP_EXINT_LINE
#define OTG2_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:102
OTG2_PIN_SOF
#define OTG2_PIN_SOF
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:121
OTG2_PIN_MUX
#define OTG2_PIN_MUX
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:124
OTG2_IRQ_HANDLER
#define OTG2_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:99
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
HID_REPORT_ID_5
#define HID_REPORT_ID_5
Definition: audio_hid_desc.h:226
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
USBD_CUSTOM_IN_MAXPACKET_SIZE
#define USBD_CUSTOM_IN_MAXPACKET_SIZE
usb custom hid in and out max packet size define
Definition: custom_hid_class.h:59
custom_hid_class_send_report
usb_sts_type custom_hid_class_send_report(void *udev, uint8_t *report, uint16_t len)
usb device class send report
Definition: custom_hid_class.c:316
custom_hid_class_handler
usbd_class_handler custom_hid_class_handler
Definition: custom_hid_class.c:57
custom_hid_desc_handler
usbd_desc_handler custom_hid_desc_handler
custom hid device descriptor handler structure
Definition: custom_hid_desc.c:62
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
usbh_loop_handler
usb_sts_type usbh_loop_handler(usbh_core_type *uhost)
usb host enum loop handler
Definition: usbh_core.c:1142
uhost_hid_class_handler
usbh_class_handler_type uhost_hid_class_handler
Definition: usbh_hid_class.c:52
usbh_irq_handler
void usbh_irq_handler(otg_core_type *hdev)
usb host interrupt handler
Definition: usbh_int.c:47
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
usbh_hid_class.h
usb host hid class header file
usbh_int.h
usb header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • printer
  • inc
project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • printer
  • inc
project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • printer
  • inc
project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_device
  • printer
  • inc
Macros | Functions
project/at_start_f437/examples/usb_device/printer/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...

Functions

void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/printer/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • printer
  • inc
project/at_start_f437/examples/usb_device/printer/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
51#define USE_OTG_DEVICE_MODE
52
56/* #define USE_OTG_HOST_MODE */
57
62/* use otgfs1 */
63#define OTG_USB_ID 1
64
65/* use otgfs2 */
66/* #define OTG_USB_ID 2 */
67
68#if (OTG_USB_ID == 1)
69#define USB_ID 0
70#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
71#define OTG_IRQ OTGFS1_IRQn
72#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
73#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
74#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
75#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
76
77#define OTG_PIN_GPIO GPIOA
78#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
79
80#define OTG_PIN_DP GPIO_PINS_12
81#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
82
83#define OTG_PIN_DM GPIO_PINS_11
84#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
85
86#define OTG_PIN_VBUS GPIO_PINS_9
87#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
88
89#define OTG_PIN_ID GPIO_PINS_10
90#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
91
92#define OTG_PIN_SOF_GPIO GPIOA
93#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
94#define OTG_PIN_SOF GPIO_PINS_8
95#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
96
97#define OTG_PIN_MUX GPIO_MUX_10
98#endif
99
100#if (OTG_USB_ID == 2)
101#define USB_ID 1
102#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
103#define OTG_IRQ OTGFS2_IRQn
104#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
105#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
106#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
107#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
108
109#define OTG_PIN_GPIO GPIOB
110#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
111
112#define OTG_PIN_DP GPIO_PINS_15
113#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
114
115#define OTG_PIN_DM GPIO_PINS_14
116#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
117
118#define OTG_PIN_VBUS GPIO_PINS_13
119#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
120
121#define OTG_PIN_ID GPIO_PINS_12
122#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
123
124#define OTG_PIN_SOF_GPIO GPIOA
125#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
126#define OTG_PIN_SOF GPIO_PINS_4
127#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
128
129#define OTG_PIN_MUX GPIO_MUX_12
130#endif
131
135#ifdef USE_OTG_DEVICE_MODE
139/* otg1 device fifo */
140#define USBD_RX_SIZE 128
141#define USBD_EP0_TX_SIZE 24
142#define USBD_EP1_TX_SIZE 20
143#define USBD_EP2_TX_SIZE 20
144#define USBD_EP3_TX_SIZE 20
145#define USBD_EP4_TX_SIZE 20
146#define USBD_EP5_TX_SIZE 20
147#define USBD_EP6_TX_SIZE 20
148#define USBD_EP7_TX_SIZE 20
149
150/* otg2 device fifo */
151#define USBD2_RX_SIZE 128
152#define USBD2_EP0_TX_SIZE 24
153#define USBD2_EP1_TX_SIZE 20
154#define USBD2_EP2_TX_SIZE 20
155#define USBD2_EP3_TX_SIZE 20
156#define USBD2_EP4_TX_SIZE 20
157#define USBD2_EP5_TX_SIZE 20
158#define USBD2_EP6_TX_SIZE 20
159#define USBD2_EP7_TX_SIZE 20
160
164#ifndef USB_EPT_MAX_NUM
165#define USB_EPT_MAX_NUM 8
166#endif
167#endif
168
172#ifdef USE_OTG_HOST_MODE
173#ifndef USB_HOST_CHANNEL_NUM
174#define USB_HOST_CHANNEL_NUM 16
175#endif
176
180/* otg1 host fifo */
181#define USBH_RX_FIFO_SIZE 128
182#define USBH_NP_TX_FIFO_SIZE 96
183#define USBH_P_TX_FIFO_SIZE 96
184
185/* otg2 host fifo */
186#define USBH2_RX_FIFO_SIZE 128
187#define USBH2_NP_TX_FIFO_SIZE 96
188#define USBH2_P_TX_FIFO_SIZE 96
189#endif
190
194/* #define USB_SOF_OUTPUT_ENABLE */
195
199#define USB_VBUS_IGNORE
200
204/* #define USB_LOW_POWER_WAKUP */
205
206void usb_delay_ms(uint32_t ms);
207void usb_delay_us(uint32_t us);
208
216#ifdef __cplusplus
217}
218#endif
219
220#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • printer
  • src
Functions
project/at_start_f437/examples/usb_device/printer/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/printer/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • printer
  • src
project/at_start_f437/examples/usb_device/printer/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/printer/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • printer
  • src
Functions
project/at_start_f437/examples/usb_device/printer/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/printer/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • printer
  • src
project/at_start_f437/examples/usb_device/printer/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • printer
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/printer/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "printer_class.h"
#include "printer_desc.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/printer/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • printer
  • src
project/at_start_f437/examples/usb_device/printer/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "printer_class.h"
33#include "printer_desc.h"
34
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46void usb_clock48m_select(usb_clk48_s clk_s);
47void usb_gpio_config(void);
48void usb_low_power_wakeup_config(void);
49
55int main(void)
56{
57 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
58
59 system_clock_config();
60
61 at32_board_init();
62
63 /* usb gpio config */
64 usb_gpio_config();
65
66#ifdef USB_LOW_POWER_WAKUP
67 usb_low_power_wakeup_config();
68#endif
69
70 /* enable otgfs clock */
71 crm_periph_clock_enable(OTG_CLOCK, TRUE);
72
73 /* select usb 48m clcok source */
74 usb_clock48m_select(USB_CLK_HEXT);
75
76 /* enable otgfs irq */
77 nvic_irq_enable(OTG_IRQ, 0, 0);
78
79 /* init usb */
80 usbd_init(&otg_core_struct,
81 USB_FULL_SPEED_CORE_ID,
82 USB_ID,
83 &printer_class_handler,
84 &printer_desc_handler);
85
86 while(1)
87 {
88 /* get usb printer receive data */
89 /* usb_printer_get_rxdata(&otg_core_struct.dev, usb_buffer); */
90
91 /* user code ...*/
92 }
93}
94
100void usb_clock48m_select(usb_clk48_s clk_s)
101{
102 if(clk_s == USB_CLK_HICK)
103 {
104 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
105
106 /* enable the acc calibration ready interrupt */
107 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
108
109 /* update the c1\c2\c3 value */
110 acc_write_c1(7980);
111 acc_write_c2(8000);
112 acc_write_c3(8020);
113#if (USB_ID == 0)
114 acc_sof_select(ACC_SOF_OTG1);
115#else
116 acc_sof_select(ACC_SOF_OTG2);
117#endif
118 /* open acc calibration */
119 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
120 }
121 else
122 {
123 switch(system_core_clock)
124 {
125 /* 48MHz */
126 case 48000000:
127 crm_usb_clock_div_set(CRM_USB_DIV_1);
128 break;
129
130 /* 72MHz */
131 case 72000000:
132 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
133 break;
134
135 /* 96MHz */
136 case 96000000:
137 crm_usb_clock_div_set(CRM_USB_DIV_2);
138 break;
139
140 /* 120MHz */
141 case 120000000:
142 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
143 break;
144
145 /* 144MHz */
146 case 144000000:
147 crm_usb_clock_div_set(CRM_USB_DIV_3);
148 break;
149
150 /* 168MHz */
151 case 168000000:
152 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
153 break;
154
155 /* 192MHz */
156 case 192000000:
157 crm_usb_clock_div_set(CRM_USB_DIV_4);
158 break;
159
160 /* 216MHz */
161 case 216000000:
162 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
163 break;
164
165 /* 240MHz */
166 case 240000000:
167 crm_usb_clock_div_set(CRM_USB_DIV_5);
168 break;
169
170 /* 264MHz */
171 case 264000000:
172 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
173 break;
174
175 /* 288MHz */
176 case 288000000:
177 crm_usb_clock_div_set(CRM_USB_DIV_6);
178 break;
179
180 default:
181 break;
182
183 }
184 }
185}
186
192void usb_gpio_config(void)
193{
194 gpio_init_type gpio_init_struct;
195
196 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
197 gpio_default_para_init(&gpio_init_struct);
198
199 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
200 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
201 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
202 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
203
204 /* dp and dm */
205 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
206 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
207
208 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
209 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
210
211#ifdef USB_SOF_OUTPUT_ENABLE
212 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
213 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
214 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
215 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
216#endif
217
218 /* otgfs use vbus pin */
219#ifndef USB_VBUS_IGNORE
220 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
221 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
222 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
223 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
224#endif
225
226
227}
228#ifdef USB_LOW_POWER_WAKUP
234void usb_low_power_wakeup_config(void)
235{
236 exint_init_type exint_init_struct;
237
238 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
239 exint_default_para_init(&exint_init_struct);
240
241 exint_init_struct.line_enable = TRUE;
242 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
243 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
244 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
245 exint_init(&exint_init_struct);
246
247 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
248}
249
255void OTG_WKUP_HANDLER(void)
256{
257 exint_flag_clear(OTG_WKUP_EXINT_LINE);
258}
259
260#endif
261
267void OTG_IRQ_HANDLER(void)
268{
269 usbd_irq_handler(&otg_core_struct);
270}
271
277void usb_delay_ms(uint32_t ms)
278{
279 /* user can define self delay function */
280 delay_ms(ms);
281}
282
288void usb_delay_us(uint32_t us)
289{
290 delay_us(us);
291}
292
at32f435_437_board.h
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/printer/src/main.c:45
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
printer_class_handler
usbd_class_handler printer_class_handler
Definition: printer_class.c:64
printer_desc_handler
usbd_desc_handler printer_desc_handler
device descriptor handler structure
Definition: printer_desc.c:64
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
printer_class.h
usb cdc class file
printer_desc.h
usb printer descriptor header file
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • two_otg_device_demo
  • inc
project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • two_otg_device_demo
  • inc
project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • two_otg_device_demo
  • inc
project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_device
  • two_otg_device_demo
  • inc
Macros | Functions
project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "at32f435_437_board.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | USB_ID 0
enable usb host mode More...
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USB2_ID 1
#define | OTG2_CLOCK CRM_OTGFS2_PERIPH_CLOCK
#define | OTG2_IRQ OTGFS2_IRQn
#define | OTG2_IRQ_HANDLER OTGFS2_IRQHandler
#define | OTG2_WKUP_IRQ OTGFS2_WKUP_IRQn
#define | OTG2_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
#define | OTG2_WKUP_EXINT_LINE EXINT_LINE_20
#define | OTG2_PIN_GPIO GPIOB
#define | OTG2_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define | OTG2_PIN_DP GPIO_PINS_15
#define | OTG2_PIN_DP_SOURCE GPIO_PINS_SOURCE15
#define | OTG2_PIN_DM GPIO_PINS_14
#define | OTG2_PIN_DM_SOURCE GPIO_PINS_SOURCE14
#define | OTG2_PIN_VBUS GPIO_PINS_13
#define | OTG2_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
#define | OTG2_PIN_ID GPIO_PINS_12
#define | OTG2_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG2_PIN_SOF_GPIO GPIOA
#define | OTG2_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG2_PIN_SOF GPIO_PINS_4
#define | OTG2_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
#define | OTG2_PIN_MUX GPIO_MUX_12
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...

Functions

void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • two_otg_device_demo
  • inc
project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "at32f435_437_board.h"
38#include "stdio.h"
39
51#define USE_OTG_DEVICE_MODE
52
56/* #define USE_OTG_HOST_MODE */
57
62#define USB_ID 0
63#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
64#define OTG_IRQ OTGFS1_IRQn
65#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
66#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
67#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
68#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
69
70#define OTG_PIN_GPIO GPIOA
71#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
72
73#define OTG_PIN_DP GPIO_PINS_12
74#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
75
76#define OTG_PIN_DM GPIO_PINS_11
77#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
78
79#define OTG_PIN_VBUS GPIO_PINS_9
80#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
81
82#define OTG_PIN_ID GPIO_PINS_10
83#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
84
85#define OTG_PIN_SOF_GPIO GPIOA
86#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
87#define OTG_PIN_SOF GPIO_PINS_8
88#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
89
90#define OTG_PIN_MUX GPIO_MUX_10
91
92
93#define USB2_ID 1
94#define OTG2_CLOCK CRM_OTGFS2_PERIPH_CLOCK
95#define OTG2_IRQ OTGFS2_IRQn
96#define OTG2_IRQ_HANDLER OTGFS2_IRQHandler
97#define OTG2_WKUP_IRQ OTGFS2_WKUP_IRQn
98#define OTG2_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
99#define OTG2_WKUP_EXINT_LINE EXINT_LINE_20
100
101#define OTG2_PIN_GPIO GPIOB
102#define OTG2_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
103
104#define OTG2_PIN_DP GPIO_PINS_15
105#define OTG2_PIN_DP_SOURCE GPIO_PINS_SOURCE15
106
107#define OTG2_PIN_DM GPIO_PINS_14
108#define OTG2_PIN_DM_SOURCE GPIO_PINS_SOURCE14
109
110#define OTG2_PIN_VBUS GPIO_PINS_13
111#define OTG2_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
112
113#define OTG2_PIN_ID GPIO_PINS_12
114#define OTG2_PIN_ID_SOURCE GPIO_PINS_SOURCE10
115
116#define OTG2_PIN_SOF_GPIO GPIOA
117#define OTG2_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
118#define OTG2_PIN_SOF GPIO_PINS_4
119#define OTG2_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
120
121#define OTG2_PIN_MUX GPIO_MUX_12
122
126#ifdef USE_OTG_DEVICE_MODE
130/* otg1 device fifo */
131#define USBD_RX_SIZE 128
132#define USBD_EP0_TX_SIZE 24
133#define USBD_EP1_TX_SIZE 20
134#define USBD_EP2_TX_SIZE 20
135#define USBD_EP3_TX_SIZE 20
136#define USBD_EP4_TX_SIZE 20
137#define USBD_EP5_TX_SIZE 20
138#define USBD_EP6_TX_SIZE 20
139#define USBD_EP7_TX_SIZE 20
140
141/* otg2 device fifo */
142#define USBD2_RX_SIZE 128
143#define USBD2_EP0_TX_SIZE 24
144#define USBD2_EP1_TX_SIZE 20
145#define USBD2_EP2_TX_SIZE 20
146#define USBD2_EP3_TX_SIZE 20
147#define USBD2_EP4_TX_SIZE 20
148#define USBD2_EP5_TX_SIZE 20
149#define USBD2_EP6_TX_SIZE 20
150#define USBD2_EP7_TX_SIZE 20
151
155#ifndef USB_EPT_MAX_NUM
156#define USB_EPT_MAX_NUM 8
157#endif
158#endif
159
163#ifdef USE_OTG_HOST_MODE
164#ifndef USB_HOST_CHANNEL_NUM
165#define USB_HOST_CHANNEL_NUM 16
166#endif
167
171/* otg1 host fifo */
172#define USBH_RX_FIFO_SIZE 128
173#define USBH_NP_TX_FIFO_SIZE 96
174#define USBH_P_TX_FIFO_SIZE 96
175
176/* otg2 host fifo */
177#define USBH2_RX_FIFO_SIZE 128
178#define USBH2_NP_TX_FIFO_SIZE 96
179#define USBH2_P_TX_FIFO_SIZE 96
180#endif
181
185/* #define USB_SOF_OUTPUT_ENABLE */
186
190#define USB_VBUS_IGNORE
191
195/* #define USB_LOW_POWER_WAKUP */
196
197void usb_delay_ms(uint32_t ms);
198void usb_delay_us(uint32_t us);
206#ifdef __cplusplus
207}
208#endif
209
210#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_board.h
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • two_otg_device_demo
  • src
Functions
project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • two_otg_device_demo
  • src
project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • two_otg_device_demo
  • src
Functions
project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • two_otg_device_demo
  • src
project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • two_otg_device_demo
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/two_otg_device_demo/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "cdc_class.h"
#include "cdc_desc.h"
#include "custom_hid_class.h"
#include "custom_hid_desc.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | button_exint_init (void)
configure button exint More...
void | button_isr (void)
button handler function More...
int | main (void)
main function. More...
void | EXINT0_IRQHandler (void)
exint0 interrupt handler More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | OTG2_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
otg_core_type otg2_core_struct
uint8_t | usb_buffer [256]
uint8_t | report_buf [USBD_CUSTOM_IN_MAXPACKET_SIZE]
__IO uint8_t | button_press = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/two_otg_device_demo/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • two_otg_device_demo
  • src
project/at_start_f437/examples/usb_device/two_otg_device_demo/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "cdc_class.h"
33#include "cdc_desc.h"
34#include "custom_hid_class.h"
35#include "custom_hid_desc.h"
36
45/* usb global struct define */
46 otg_core_type otg_core_struct;
47 otg_core_type otg2_core_struct;
48uint8_t usb_buffer[256];
49uint8_t report_buf[USBD_CUSTOM_IN_MAXPACKET_SIZE];
50__IO uint8_t button_press = 0;
51
52void usb_clock48m_select(usb_clk48_s clk_s);
53void usb_gpio_config(void);
54void usb_low_power_wakeup_config(void);
55void button_exint_init(void);
56void button_isr(void);
57
63int main(void)
64{
65 uint16_t data_len;
66
67 uint32_t timeout;
68
69 uint8_t send_zero_packet = 0;
70
71 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
72
73 system_clock_config();
74
75 at32_board_init();
76
77 button_exint_init();
78
79 /* usb gpio config */
80 usb_gpio_config();
81
82#ifdef USB_LOW_POWER_WAKUP
83 usb_low_power_wakeup_config();
84#endif
85
86 /* enable otgfs clock */
87 crm_periph_clock_enable(OTG_CLOCK, TRUE);
88 crm_periph_clock_enable(OTG2_CLOCK, TRUE);
89
90 /* select usb 48m clcok source */
91 usb_clock48m_select(USB_CLK_HEXT);
92
93 /* enable otgfs irq */
94 nvic_irq_enable(OTG_IRQ, 0, 0);
95 nvic_irq_enable(OTG2_IRQ, 0, 0);
96
97 /* init otg1 device */
98 usbd_init(&otg_core_struct,
99 USB_FULL_SPEED_CORE_ID,
100 USB_ID,
101 &cdc_class_handler,
102 &cdc_desc_handler);
103
104 /* init otg2 device */
105 usbd_init(&otg2_core_struct,
106 USB_FULL_SPEED_CORE_ID,
107 USB2_ID,
108 &custom_hid_class_handler,
109 &custom_hid_desc_handler);
110 while(1)
111 {
112 /* get usb vcp receive data */
113 data_len = usb_vcp_get_rxdata(&otg_core_struct.dev, usb_buffer);
114
115 if(data_len > 0 || send_zero_packet == 1)
116 {
117
118 /* bulk transfer is complete when the endpoint does one of the following
119 1 has transferred exactly the amount of data expected
120 2 transfers a packet with a payload size less than wMaxPacketSize or transfers a zero-length packet
121 */
122 if(data_len > 0)
123 send_zero_packet = 1;
124
125 if(data_len == 0)
126 send_zero_packet = 0;
127
128 timeout = 5000000;
129 do
130 {
131 /* send data to host */
132 if(usb_vcp_send_data(&otg_core_struct.dev, usb_buffer, data_len) == SUCCESS)
133 {
134 break;
135 }
136 }while(timeout --);
137 }
138
139 /* otg2 custom hid */
140 if(button_press == 1)
141 {
142 report_buf[0] = HID_REPORT_ID_5;
143 report_buf[1] = (~report_buf[1]) & 0x1;
144 custom_hid_class_send_report(&otg2_core_struct.dev, report_buf, USBD_CUSTOM_IN_MAXPACKET_SIZE);
145 button_press = 0;
146 }
147 }
148}
149
155void button_exint_init(void)
156{
157 exint_init_type exint_init_struct;
158
159 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
160 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
161
162 exint_default_para_init(&exint_init_struct);
163 exint_init_struct.line_enable = TRUE;
164 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
165 exint_init_struct.line_select = EXINT_LINE_0;
166 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
167 exint_init(&exint_init_struct);
168
169 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
170 nvic_irq_enable(EXINT0_IRQn, 0, 0);
171}
172
178void button_isr(void)
179{
180 /* delay 5ms */
181 delay_ms(5);
182
183 /* clear interrupt pending bit */
184 exint_flag_clear(EXINT_LINE_0);
185
186 button_press = 1;
187}
188
194void EXINT0_IRQHandler(void)
195{
196 button_isr();
197}
198
204void usb_clock48m_select(usb_clk48_s clk_s)
205{
206 if(clk_s == USB_CLK_HICK)
207 {
208 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
209
210 /* enable the acc calibration ready interrupt */
211 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
212
213 /* update the c1\c2\c3 value */
214 acc_write_c1(7980);
215 acc_write_c2(8000);
216 acc_write_c3(8020);
217#if (USB_ID == 0)
218 acc_sof_select(ACC_SOF_OTG1);
219#else
220 acc_sof_select(ACC_SOF_OTG2);
221#endif
222 /* open acc calibration */
223 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
224 }
225 else
226 {
227 switch(system_core_clock)
228 {
229 /* 48MHz */
230 case 48000000:
231 crm_usb_clock_div_set(CRM_USB_DIV_1);
232 break;
233
234 /* 72MHz */
235 case 72000000:
236 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
237 break;
238
239 /* 96MHz */
240 case 96000000:
241 crm_usb_clock_div_set(CRM_USB_DIV_2);
242 break;
243
244 /* 120MHz */
245 case 120000000:
246 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
247 break;
248
249 /* 144MHz */
250 case 144000000:
251 crm_usb_clock_div_set(CRM_USB_DIV_3);
252 break;
253
254 /* 168MHz */
255 case 168000000:
256 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
257 break;
258
259 /* 192MHz */
260 case 192000000:
261 crm_usb_clock_div_set(CRM_USB_DIV_4);
262 break;
263
264 /* 216MHz */
265 case 216000000:
266 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
267 break;
268
269 /* 240MHz */
270 case 240000000:
271 crm_usb_clock_div_set(CRM_USB_DIV_5);
272 break;
273
274 /* 264MHz */
275 case 264000000:
276 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
277 break;
278
279 /* 288MHz */
280 case 288000000:
281 crm_usb_clock_div_set(CRM_USB_DIV_6);
282 break;
283
284 default:
285 break;
286
287 }
288 }
289}
290
296void usb_gpio_config(void)
297{
298 gpio_init_type gpio_init_struct;
299
300 /* otg1 gpio config */
301 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
302 gpio_default_para_init(&gpio_init_struct);
303
304 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
305 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
306 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
307 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
308
309 /* dp and dm */
310 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
311 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
312
313 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
314 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
315
316#ifdef USB_SOF_OUTPUT_ENABLE
317 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
318 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
319 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
320 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
321#endif
322
323 /* otgfs use vbus pin */
324#ifndef USB_VBUS_IGNORE
325 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
326 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
327 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
328 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
329#endif
330
331 /* otg2 gpio config */
332 crm_periph_clock_enable(OTG2_PIN_GPIO_CLOCK, TRUE);
333 gpio_default_para_init(&gpio_init_struct);
334
335 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
336 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
337 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
338 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
339
340 /* dp and dm */
341 gpio_init_struct.gpio_pins = OTG2_PIN_DP | OTG2_PIN_DM;
342 gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
343
344 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DP_SOURCE, OTG2_PIN_MUX);
345 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DM_SOURCE, OTG2_PIN_MUX);
346
347#ifdef USB_SOF_OUTPUT_ENABLE
348 crm_periph_clock_enable(OTG2_PIN_SOF_GPIO_CLOCK, TRUE);
349 gpio_init_struct.gpio_pins = OTG2_PIN_SOF;
350 gpio_init(OTG2_PIN_SOF_GPIO, &gpio_init_struct);
351 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_SOF_SOURCE, OTG2_PIN_MUX);
352#endif
353
354 /* otgfs use vbus pin */
355#ifndef USB_VBUS_IGNORE
356 gpio_init_struct.gpio_pins = OTG2_PIN_VBUS;
357 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
358 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_VBUS_SOURCE, OTG2_PIN_MUX);
359 gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
360#endif
361
362
363}
364#ifdef USB_LOW_POWER_WAKUP
370void usb_low_power_wakeup_config(void)
371{
372 exint_init_type exint_init_struct;
373
374 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
375 exint_default_para_init(&exint_init_struct);
376
377 /*otg1*/
378 exint_init_struct.line_enable = TRUE;
379 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
380 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
381 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
382 exint_init(&exint_init_struct);
383
384 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
385
386 /*otg2*/
387 exint_init_struct.line_enable = TRUE;
388 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
389 exint_init_struct.line_select = OTG2_WKUP_EXINT_LINE;
390 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
391 exint_init(&exint_init_struct);
392
393 nvic_irq_enable(OTG2_WKUP_IRQ, 0, 0);
394}
395
401void OTG_WKUP_HANDLER(void)
402{
403 exint_flag_clear(OTG_WKUP_EXINT_LINE);
404}
405
411void OTG2_WKUP_HANDLER(void)
412{
413 exint_flag_clear(OTG2_WKUP_EXINT_LINE);
414}
415
416#endif
417
423void OTG_IRQ_HANDLER(void)
424{
425 usbd_irq_handler(&otg_core_struct);
426}
427
433void OTG2_IRQ_HANDLER(void)
434{
435 usbd_irq_handler(&otg2_core_struct);
436}
437
443void usb_delay_ms(uint32_t ms)
444{
445 /* user can define self delay function */
446 delay_ms(ms);
447}
448
454void usb_delay_us(uint32_t us)
455{
456 delay_us(us);
457}
458
at32f435_437_board.h
cdc_class.h
usb cdc class file
cdc_desc.h
usb cdc descriptor header file
custom_hid_class.h
usb hid header file
custom_hid_desc.h
usb custom hid descriptor header file
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/examples/exint/exint_config/src/main.c:70
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:61
button_isr
void button_isr(void)
button handler function
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:84
OTG2_PIN_DP_SOURCE
#define OTG2_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:108
OTG2_IRQ
#define OTG2_IRQ
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:98
OTG2_PIN_VBUS_SOURCE
#define OTG2_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:114
OTG2_PIN_SOF_SOURCE
#define OTG2_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:122
OTG2_PIN_GPIO_CLOCK
#define OTG2_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:105
OTG2_WKUP_IRQ
#define OTG2_WKUP_IRQ
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:100
OTG2_PIN_GPIO
#define OTG2_PIN_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:104
OTG2_PIN_DM
#define OTG2_PIN_DM
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:110
OTG2_PIN_DP
#define OTG2_PIN_DP
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:107
OTG2_PIN_VBUS
#define OTG2_PIN_VBUS
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:113
USB2_ID
#define USB2_ID
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:96
OTG2_PIN_SOF_GPIO_CLOCK
#define OTG2_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:120
OTG2_PIN_SOF_GPIO
#define OTG2_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:119
OTG2_CLOCK
#define OTG2_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:97
OTG2_PIN_DM_SOURCE
#define OTG2_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:111
OTG2_WKUP_HANDLER
#define OTG2_WKUP_HANDLER
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:101
OTG2_WKUP_EXINT_LINE
#define OTG2_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:102
OTG2_PIN_SOF
#define OTG2_PIN_SOF
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:121
OTG2_PIN_MUX
#define OTG2_PIN_MUX
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:124
OTG2_IRQ_HANDLER
#define OTG2_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:99
report_buf
uint8_t report_buf[USBD_CUSTOM_IN_MAXPACKET_SIZE]
Definition: project/at_start_f437/examples/usb_device/two_otg_device_demo/src/main.c:49
button_press
__IO uint8_t button_press
Definition: project/at_start_f437/examples/usb_device/two_otg_device_demo/src/main.c:50
otg2_core_struct
otg_core_type otg2_core_struct
Definition: project/at_start_f437/examples/usb_device/two_otg_device_demo/src/main.c:47
usb_buffer
uint8_t usb_buffer[256]
Definition: project/at_start_f437/examples/usb_device/two_otg_device_demo/src/main.c:48
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/two_otg_device_demo/src/main.c:46
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
data_len
uint16_t data_len
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:47
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
HID_REPORT_ID_5
#define HID_REPORT_ID_5
Definition: audio_hid_desc.h:226
usb_vcp_get_rxdata
uint16_t usb_vcp_get_rxdata(void *udev, uint8_t *recv_data)
usb device class rx data process
Definition: cdc_class.c:339
usb_vcp_send_data
error_status usb_vcp_send_data(void *udev, uint8_t *send_data, uint16_t len)
usb device class send data
Definition: cdc_class.c:369
cdc_class_handler
usbd_class_handler cdc_class_handler
Definition: cdc_class.c:69
cdc_desc_handler
usbd_desc_handler cdc_desc_handler
device descriptor handler structure
Definition: cdc_desc.c:64
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
USBD_CUSTOM_IN_MAXPACKET_SIZE
#define USBD_CUSTOM_IN_MAXPACKET_SIZE
usb custom hid in and out max packet size define
Definition: custom_hid_class.h:59
custom_hid_class_send_report
usb_sts_type custom_hid_class_send_report(void *udev, uint8_t *report, uint16_t len)
usb device class send report
Definition: custom_hid_class.c:316
custom_hid_class_handler
usbd_class_handler custom_hid_class_handler
Definition: custom_hid_class.c:57
custom_hid_desc_handler
usbd_desc_handler custom_hid_desc_handler
custom hid device descriptor handler structure
Definition: custom_hid_desc.c:62
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • vcp_loopback
  • inc
project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • vcp_loopback
  • inc
project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • vcp_loopback
  • inc
project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_device
  • vcp_loopback
  • inc
Macros | Functions
project/at_start_f437/examples/usb_device/vcp_loopback/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...

Functions

void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/vcp_loopback/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • vcp_loopback
  • inc
project/at_start_f437/examples/usb_device/vcp_loopback/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
50#define USE_OTG_DEVICE_MODE
51
55/* #define USE_OTG_HOST_MODE */
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65//#define OTG_USB_ID 2
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97#endif
98
99#if (OTG_USB_ID == 2)
100#define USB_ID 1
101#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
102#define OTG_IRQ OTGFS2_IRQn
103#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
104#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
105#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
106#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
107
108#define OTG_PIN_GPIO GPIOB
109#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
110
111#define OTG_PIN_DP GPIO_PINS_15
112#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
113
114#define OTG_PIN_DM GPIO_PINS_14
115#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
116
117#define OTG_PIN_VBUS GPIO_PINS_13
118#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
119
120#define OTG_PIN_ID GPIO_PINS_12
121#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
122
123#define OTG_PIN_SOF_GPIO GPIOA
124#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
125#define OTG_PIN_SOF GPIO_PINS_4
126#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
127
128#define OTG_PIN_MUX GPIO_MUX_12
129#endif
130
134#ifdef USE_OTG_DEVICE_MODE
138/* otg1 device fifo */
139#define USBD_RX_SIZE 128
140#define USBD_EP0_TX_SIZE 24
141#define USBD_EP1_TX_SIZE 20
142#define USBD_EP2_TX_SIZE 20
143#define USBD_EP3_TX_SIZE 20
144#define USBD_EP4_TX_SIZE 20
145#define USBD_EP5_TX_SIZE 20
146#define USBD_EP6_TX_SIZE 20
147#define USBD_EP7_TX_SIZE 20
148
149/* otg2 device fifo */
150#define USBD2_RX_SIZE 128
151#define USBD2_EP0_TX_SIZE 24
152#define USBD2_EP1_TX_SIZE 20
153#define USBD2_EP2_TX_SIZE 20
154#define USBD2_EP3_TX_SIZE 20
155#define USBD2_EP4_TX_SIZE 20
156#define USBD2_EP5_TX_SIZE 20
157#define USBD2_EP6_TX_SIZE 20
158#define USBD2_EP7_TX_SIZE 20
159
163#ifndef USB_EPT_MAX_NUM
164#define USB_EPT_MAX_NUM 8
165#endif
166#endif
167
171#ifdef USE_OTG_HOST_MODE
172#ifndef USB_HOST_CHANNEL_NUM
173#define USB_HOST_CHANNEL_NUM 16
174#endif
175
179/* otg1 host fifo */
180#define USBH_RX_FIFO_SIZE 128
181#define USBH_NP_TX_FIFO_SIZE 96
182#define USBH_P_TX_FIFO_SIZE 96
183
184/* otg2 host fifo */
185#define USBH2_RX_FIFO_SIZE 128
186#define USBH2_NP_TX_FIFO_SIZE 96
187#define USBH2_P_TX_FIFO_SIZE 96
188#endif
189
193/* #define USB_SOF_OUTPUT_ENABLE */
194
198#define USB_VBUS_IGNORE
199
203/* #define USB_LOW_POWER_WAKUP */
204
205void usb_delay_ms(uint32_t ms);
206void usb_delay_us(uint32_t us);
214#ifdef __cplusplus
215}
216#endif
217
218#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • vcp_loopback
  • src
Functions
project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • vcp_loopback
  • src
project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • vcp_loopback
  • src
Functions
project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • vcp_loopback
  • src
project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • vcp_loopback
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/vcp_loopback/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "cdc_class.h"
#include "cdc_desc.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
uint8_t usb_buffer [256]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/vcp_loopback/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • vcp_loopback
  • src
project/at_start_f437/examples/usb_device/vcp_loopback/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "cdc_class.h"
33#include "cdc_desc.h"
34
43/* usb global struct define */
44 otg_core_type otg_core_struct;
45uint8_t usb_buffer[256];
46void usb_clock48m_select(usb_clk48_s clk_s);
47void usb_gpio_config(void);
48void usb_low_power_wakeup_config(void);
49
55int main(void)
56{
57 uint16_t data_len;
58
59 uint32_t timeout;
60
61 uint8_t send_zero_packet = 0;
62
63 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
64
65 system_clock_config();
66
67 at32_board_init();
68
69 /* usb gpio config */
70 usb_gpio_config();
71
72#ifdef USB_LOW_POWER_WAKUP
73 usb_low_power_wakeup_config();
74#endif
75
76 /* enable otgfs clock */
77 crm_periph_clock_enable(OTG_CLOCK, TRUE);
78
79 /* select usb 48m clcok source */
80 usb_clock48m_select(USB_CLK_HEXT);
81
82 /* enable otgfs irq */
83 nvic_irq_enable(OTG_IRQ, 0, 0);
84
85 /* init usb */
86 usbd_init(&otg_core_struct,
87 USB_FULL_SPEED_CORE_ID,
88 USB_ID,
89 &cdc_class_handler,
90 &cdc_desc_handler);
91 while(1)
92 {
93 /* get usb vcp receive data */
94 data_len = usb_vcp_get_rxdata(&otg_core_struct.dev, usb_buffer);
95
96 if(data_len > 0 || send_zero_packet == 1)
97 {
98
99 /* bulk transfer is complete when the endpoint does one of the following
100 1 has transferred exactly the amount of data expected
101 2 transfers a packet with a payload size less than wMaxPacketSize or transfers a zero-length packet
102 */
103 if(data_len > 0)
104 send_zero_packet = 1;
105
106 if(data_len == 0)
107 send_zero_packet = 0;
108
109 timeout = 5000000;
110 do
111 {
112 /* send data to host */
113 if(usb_vcp_send_data(&otg_core_struct.dev, usb_buffer, data_len) == SUCCESS)
114 {
115 break;
116 }
117 }while(timeout --);
118 }
119 }
120}
121
127void usb_clock48m_select(usb_clk48_s clk_s)
128{
129 if(clk_s == USB_CLK_HICK)
130 {
131 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
132
133 /* enable the acc calibration ready interrupt */
134 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
135
136 /* update the c1\c2\c3 value */
137 acc_write_c1(7980);
138 acc_write_c2(8000);
139 acc_write_c3(8020);
140#if (USB_ID == 0)
141 acc_sof_select(ACC_SOF_OTG1);
142#else
143 acc_sof_select(ACC_SOF_OTG2);
144#endif
145 /* open acc calibration */
146 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
147 }
148 else
149 {
150 switch(system_core_clock)
151 {
152 /* 48MHz */
153 case 48000000:
154 crm_usb_clock_div_set(CRM_USB_DIV_1);
155 break;
156
157 /* 72MHz */
158 case 72000000:
159 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
160 break;
161
162 /* 96MHz */
163 case 96000000:
164 crm_usb_clock_div_set(CRM_USB_DIV_2);
165 break;
166
167 /* 120MHz */
168 case 120000000:
169 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
170 break;
171
172 /* 144MHz */
173 case 144000000:
174 crm_usb_clock_div_set(CRM_USB_DIV_3);
175 break;
176
177 /* 168MHz */
178 case 168000000:
179 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
180 break;
181
182 /* 192MHz */
183 case 192000000:
184 crm_usb_clock_div_set(CRM_USB_DIV_4);
185 break;
186
187 /* 216MHz */
188 case 216000000:
189 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
190 break;
191
192 /* 240MHz */
193 case 240000000:
194 crm_usb_clock_div_set(CRM_USB_DIV_5);
195 break;
196
197 /* 264MHz */
198 case 264000000:
199 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
200 break;
201
202 /* 288MHz */
203 case 288000000:
204 crm_usb_clock_div_set(CRM_USB_DIV_6);
205 break;
206
207 default:
208 break;
209
210 }
211 }
212}
213
219void usb_gpio_config(void)
220{
221 gpio_init_type gpio_init_struct;
222
223 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
224 gpio_default_para_init(&gpio_init_struct);
225
226 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
227 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
228 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
229 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
230
231 /* dp and dm */
232 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
233 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
234
235 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
236 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
237
238#ifdef USB_SOF_OUTPUT_ENABLE
239 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
240 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
241 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
242 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
243#endif
244
245 /* otgfs use vbus pin */
246#ifndef USB_VBUS_IGNORE
247 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
248 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
249 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
250 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
251#endif
252
253
254}
255#ifdef USB_LOW_POWER_WAKUP
261void usb_low_power_wakeup_config(void)
262{
263 exint_init_type exint_init_struct;
264
265 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
266 exint_default_para_init(&exint_init_struct);
267
268 exint_init_struct.line_enable = TRUE;
269 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
270 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
271 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
272 exint_init(&exint_init_struct);
273
274 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
275}
276
282void OTG_WKUP_HANDLER(void)
283{
284 exint_flag_clear(OTG_WKUP_EXINT_LINE);
285}
286
287#endif
288
294void OTG_IRQ_HANDLER(void)
295{
296 usbd_irq_handler(&otg_core_struct);
297}
298
304void usb_delay_ms(uint32_t ms)
305{
306 /* user can define self delay function */
307 delay_ms(ms);
308}
309
315void usb_delay_us(uint32_t us)
316{
317 delay_us(us);
318}
319
at32f435_437_board.h
cdc_class.h
usb cdc class file
cdc_desc.h
usb cdc descriptor header file
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
usb_buffer
uint8_t usb_buffer[256]
Definition: project/at_start_f437/examples/usb_device/vcp_loopback/src/main.c:45
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/vcp_loopback/src/main.c:44
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
data_len
uint16_t data_len
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:47
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
usb_vcp_get_rxdata
uint16_t usb_vcp_get_rxdata(void *udev, uint8_t *recv_data)
usb device class rx data process
Definition: cdc_class.c:339
usb_vcp_send_data
error_status usb_vcp_send_data(void *udev, uint8_t *send_data, uint16_t len)
usb device class send data
Definition: cdc_class.c:369
cdc_class_handler
usbd_class_handler cdc_class_handler
Definition: cdc_class.c:69
cdc_desc_handler
usbd_desc_handler cdc_desc_handler
device descriptor handler structure
Definition: cdc_desc.c:64
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • virtual_comport
  • inc
project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • virtual_comport
  • inc
project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • virtual_comport
  • inc
project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_device
  • virtual_comport
  • inc
Macros | Functions
project/at_start_f437/examples/usb_device/virtual_comport/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...
#define | USB_VIRTUAL_COMPORT
usb low power wakeup handler enable More...

Functions

void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/virtual_comport/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • virtual_comport
  • inc
project/at_start_f437/examples/usb_device/virtual_comport/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
50#define USE_OTG_DEVICE_MODE
51
55/* #define USE_OTG_HOST_MODE */
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65//#define OTG_USB_ID 2
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97#endif
98
99#if (OTG_USB_ID == 2)
100#define USB_ID 1
101#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
102#define OTG_IRQ OTGFS2_IRQn
103#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
104#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
105#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
106#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
107
108#define OTG_PIN_GPIO GPIOB
109#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
110
111#define OTG_PIN_DP GPIO_PINS_15
112#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
113
114#define OTG_PIN_DM GPIO_PINS_14
115#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
116
117#define OTG_PIN_VBUS GPIO_PINS_13
118#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
119
120#define OTG_PIN_ID GPIO_PINS_12
121#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
122
123#define OTG_PIN_SOF_GPIO GPIOA
124#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
125#define OTG_PIN_SOF GPIO_PINS_4
126#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
127
128#define OTG_PIN_MUX GPIO_MUX_12
129#endif
130
134#ifdef USE_OTG_DEVICE_MODE
138/* otg1 device fifo */
139#define USBD_RX_SIZE 128
140#define USBD_EP0_TX_SIZE 24
141#define USBD_EP1_TX_SIZE 20
142#define USBD_EP2_TX_SIZE 20
143#define USBD_EP3_TX_SIZE 20
144#define USBD_EP4_TX_SIZE 20
145#define USBD_EP5_TX_SIZE 20
146#define USBD_EP6_TX_SIZE 20
147#define USBD_EP7_TX_SIZE 20
148
149/* otg2 device fifo */
150#define USBD2_RX_SIZE 128
151#define USBD2_EP0_TX_SIZE 24
152#define USBD2_EP1_TX_SIZE 20
153#define USBD2_EP2_TX_SIZE 20
154#define USBD2_EP3_TX_SIZE 20
155#define USBD2_EP4_TX_SIZE 20
156#define USBD2_EP5_TX_SIZE 20
157#define USBD2_EP6_TX_SIZE 20
158#define USBD2_EP7_TX_SIZE 20
159
163#ifndef USB_EPT_MAX_NUM
164#define USB_EPT_MAX_NUM 8
165#endif
166#endif
167
171#ifdef USE_OTG_HOST_MODE
172#ifndef USB_HOST_CHANNEL_NUM
173#define USB_HOST_CHANNEL_NUM 16
174#endif
175
179/* otg1 host fifo */
180#define USBH_RX_FIFO_SIZE 128
181#define USBH_NP_TX_FIFO_SIZE 96
182#define USBH_P_TX_FIFO_SIZE 96
183
184/* otg2 host fifo */
185#define USBH2_RX_FIFO_SIZE 128
186#define USBH2_NP_TX_FIFO_SIZE 96
187#define USBH2_P_TX_FIFO_SIZE 96
188#endif
189
193/* #define USB_SOF_OUTPUT_ENABLE */
194
198#define USB_VBUS_IGNORE
199
203/* #define USB_LOW_POWER_WAKUP */
204
208#define USB_VIRTUAL_COMPORT
209
210void usb_delay_ms(uint32_t ms);
211void usb_delay_us(uint32_t us);
219#ifdef __cplusplus
220}
221#endif
222
223#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • virtual_comport
  • src
Functions
project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • virtual_comport
  • src
project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • virtual_comport
  • src
Functions
project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • virtual_comport
  • src
project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • virtual_comport
  • src
Macros | Functions | Variables
project/at_start_f437/examples/usb_device/virtual_comport/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "cdc_class.h"
#include "cdc_desc.h"

Go to the source code of this file.

Macros

#define usart_buffer_size 2048

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | usb_usart_config (linecoding_type linecoding)
this function handles usart2 and linecoding config. More...
void | usart_gpio_config (void)
this function handles usart2 gpio config. More...
void | usart_send_data (uint8_t *send_data, uint16_t len)
this function handles usart2 send data. More...
uint16_t | usart_receive_data (void)
this function handles usart2 receive data. More...
int | main (void)
main function. More...
void | USART2_IRQHandler (void)
this function handles usart2 handler. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
uint8_t | usb_buffer [256]
uint8_t | usart2_tx_counter = 0
uint16_t | data_len
linecoding_type linecoding
uint8_t | usart_rx_buffer [2048]
uint16_t | hw_usart_rx_index = 0
uint16_t | hw_usart_read_index = 0
uint16_t | usart_rx_data_len = 0
uint16_t | ov_cnt = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/virtual_comport/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • virtual_comport
  • src
project/at_start_f437/examples/usb_device/virtual_comport/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "cdc_class.h"
33#include "cdc_desc.h"
34
43/* usb global struct define */
44 otg_core_type otg_core_struct;
45uint8_t usb_buffer[256];
46uint8_t usart2_tx_counter = 0;
47uint16_t data_len;
48void usb_clock48m_select(usb_clk48_s clk_s);
49void usb_gpio_config(void);
50void usb_low_power_wakeup_config(void);
51
52/* usart global struct define */
53extern linecoding_type linecoding;
54void usb_usart_config(linecoding_type linecoding);
55void usart_gpio_config(void);
56#define usart_buffer_size 2048
57uint8_t usart_rx_buffer[usart_buffer_size];
58uint16_t hw_usart_rx_index = 0;
59uint16_t hw_usart_read_index = 0;
60uint16_t usart_rx_data_len = 0;
61uint16_t ov_cnt = 0;
62void usart_send_data(uint8_t *send_data, uint16_t len);
63uint16_t usart_receive_data(void);
69int main(void)
70{
71 uint32_t timeout;
72
73 uint8_t send_zero_packet = 0;
74
75 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
76
77 system_clock_config();
78
79 at32_board_init();
80
81 /* usart gpio config */
82 usart_gpio_config();
83
84 /* hardware usart config: usart2 */
85 usb_usart_config(linecoding);
86
87 /* usb gpio config */
88 usb_gpio_config();
89
90#ifdef USB_LOW_POWER_WAKUP
91 usb_low_power_wakeup_config();
92#endif
93
94 /* enable otgfs clock */
95 crm_periph_clock_enable(OTG_CLOCK, TRUE);
96
97 /* select usb 48m clcok source */
98 usb_clock48m_select(USB_CLK_HEXT);
99
100 /* enable otgfs irq */
101 nvic_irq_enable(OTG_IRQ, 0, 0);
102
103 /* init usb */
104 usbd_init(&otg_core_struct,
105 USB_FULL_SPEED_CORE_ID,
106 USB_ID,
107 &cdc_class_handler,
108 &cdc_desc_handler);
109 while(1)
110 {
111 /* get usb vcp receive data */
112 data_len = usb_vcp_get_rxdata(&otg_core_struct.dev, usb_buffer);
113
114 /* send data to hardware usart */
115 if(data_len > 0)
116 {
117 usart_send_data(usb_buffer, data_len);
118 }
119
120 /* if hardware usart received data,usb send data to host */
121 usart_rx_data_len = usart_receive_data();
122 if(usart_rx_data_len || send_zero_packet == 1)
123 {
124 if(usart_rx_data_len > 0)
125 send_zero_packet = 1;
126
127 if(usart_rx_data_len == 0)
128 send_zero_packet = 0;
129
130 timeout = 50000;
131
132 if((hw_usart_read_index + usart_rx_data_len) < usart_buffer_size)
133 {
134 do
135 {
136 /* send data to host */
137 if(usb_vcp_send_data(&otg_core_struct.dev, &usart_rx_buffer[hw_usart_read_index], usart_rx_data_len) == SUCCESS)
138 {
139 hw_usart_read_index = hw_usart_read_index + usart_rx_data_len;
140
141 break;
142 }
143 }while(timeout --);
144
145 }
146 /* process the fifo overflow */
147 else
148 {
149 do
150 {
151 /* send data to host */
152 if(usb_vcp_send_data(&otg_core_struct.dev, &usart_rx_buffer[hw_usart_read_index], usart_buffer_size - hw_usart_read_index) == SUCCESS)
153 {
154 /* get fifo overflow data count */
155 ov_cnt = usart_rx_data_len - (usart_buffer_size - hw_usart_read_index);
156 hw_usart_read_index = 0;
157 break;
158 }
159 }while(timeout --);
160 timeout = 50000;
161 do
162 {
163 /* send data to host */
164 if(usb_vcp_send_data(&otg_core_struct.dev, &usart_rx_buffer[hw_usart_read_index], ov_cnt) == SUCCESS)
165 {
166 hw_usart_read_index = ov_cnt;
167 break;
168 }
169 }while(timeout --);
170 }
171 }
172 }
173}
174
181void usart_send_data(uint8_t *send_data, uint16_t len)
182{
183 uint16_t index = 0;
184 for(index = 0; index < len; index++ )
185 {
186 do
187 {
188 ;
189 }while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET);
190
191 usart_data_transmit(USART2, send_data[index]);
192 }
193}
194
200uint16_t usart_receive_data(void)
201{
202 uint16_t usart_data_len;
203 if(hw_usart_read_index == hw_usart_rx_index)
204 {
205 usart_data_len = 0;
206 }
207 else
208 {
209 /* whether to process the fifo overflow or not */
210 if(hw_usart_rx_index > hw_usart_read_index)
211 usart_data_len = hw_usart_rx_index - hw_usart_read_index;
212 else if(hw_usart_rx_index == 0 && hw_usart_rx_index != hw_usart_read_index)
213 usart_data_len = usart_buffer_size - hw_usart_read_index;
214 else
215 usart_data_len = (usart_buffer_size-1) + hw_usart_rx_index - hw_usart_read_index;
216 }
217
218 return usart_data_len;
219}
220
226void USART2_IRQHandler(void)
227{
228 if(usart_flag_get(USART2, USART_RDBF_FLAG) != RESET)
229 {
230 /* read one byte from the receive data register */
231 usart_rx_buffer[hw_usart_rx_index] = usart_data_receive(USART2);
232 hw_usart_rx_index = ( (hw_usart_rx_index+1) & (usart_buffer_size-1) );
233 }
234}
235
241void usb_usart_config( linecoding_type linecoding)
242{
243 usart_stop_bit_num_type usart_stop_bit;
244 usart_data_bit_num_type usart_data_bit;
245 usart_parity_selection_type usart_parity_select;
246
247 /* enable the usart2 and gpio clock */
248 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, FALSE);
249 crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
250
251 /* stop bit */
252 switch(linecoding.format)
253 {
254 case 0x0:
255 usart_stop_bit = USART_STOP_1_BIT;
256 break;
257 /* to be used when transmitting and receiving data in smartcard mode */
258 case 0x1:
259 usart_stop_bit = USART_STOP_1_5_BIT;
260 break;
261 case 0x2:
262 usart_stop_bit = USART_STOP_2_BIT;
263 break;
264 default :
265 break;
266 }
267 /* data bits */
268 switch(linecoding.data)
269 {
270 /* hardware usart not support data bits for 5/6 */
271 case 0x5:
272 case 0x6:
273 break;
274 case 0x7:
275 usart_data_bit = USART_DATA_7BITS;
276 break;
277 case 0x8:
278 usart_data_bit = USART_DATA_8BITS;
279 break;
280 /* hardware usart not support data bits for 16 */
281 case 0x10:
282 break;
283 default :
284 break;
285 }
286 /* parity */
287 switch(linecoding.parity)
288 {
289 case 0x0:
290 usart_parity_select = USART_PARITY_NONE;
291 break;
292 case 0x1:
293 usart_parity_select = USART_PARITY_ODD;
294 break;
295 case 0x2:
296 usart_parity_select = USART_PARITY_EVEN;
297 break;
298 /* hardware usart not support parity for mark and space */
299 case 0x3:
300 case 0x4:
301 break;
302 default :
303 break;
304 }
305
306 nvic_irq_enable(USART2_IRQn, 0, 0);
307
308 /* configure usart2 param */
309 usart_init(USART2, linecoding.bitrate, usart_data_bit, usart_stop_bit);
310 usart_parity_selection_config(USART2, usart_parity_select);
311 usart_transmitter_enable(USART2, TRUE);
312 usart_receiver_enable(USART2, TRUE);
313
314 /* enable usart2 interrupt */
315 usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE);
316 usart_enable(USART2, TRUE);
317}
318
324void usart_gpio_config(void)
325{
326 gpio_init_type gpio_init_struct;
327 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
328
329 /* configure the usart2 tx, rx pin */
330 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
331 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
332 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
333 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
334 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
335 gpio_init(GPIOA, &gpio_init_struct);
336 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
337 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7);
338}
339
345void usb_clock48m_select(usb_clk48_s clk_s)
346{
347 if(clk_s == USB_CLK_HICK)
348 {
349 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
350
351 /* enable the acc calibration ready interrupt */
352 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
353
354 /* update the c1\c2\c3 value */
355 acc_write_c1(7980);
356 acc_write_c2(8000);
357 acc_write_c3(8020);
358#if (USB_ID == 0)
359 acc_sof_select(ACC_SOF_OTG1);
360#else
361 acc_sof_select(ACC_SOF_OTG2);
362#endif
363 /* open acc calibration */
364 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
365 }
366 else
367 {
368 switch(system_core_clock)
369 {
370 /* 48MHz */
371 case 48000000:
372 crm_usb_clock_div_set(CRM_USB_DIV_1);
373 break;
374
375 /* 72MHz */
376 case 72000000:
377 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
378 break;
379
380 /* 96MHz */
381 case 96000000:
382 crm_usb_clock_div_set(CRM_USB_DIV_2);
383 break;
384
385 /* 120MHz */
386 case 120000000:
387 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
388 break;
389
390 /* 144MHz */
391 case 144000000:
392 crm_usb_clock_div_set(CRM_USB_DIV_3);
393 break;
394
395 /* 168MHz */
396 case 168000000:
397 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
398 break;
399
400 /* 192MHz */
401 case 192000000:
402 crm_usb_clock_div_set(CRM_USB_DIV_4);
403 break;
404
405 /* 216MHz */
406 case 216000000:
407 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
408 break;
409
410 /* 240MHz */
411 case 240000000:
412 crm_usb_clock_div_set(CRM_USB_DIV_5);
413 break;
414
415 /* 264MHz */
416 case 264000000:
417 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
418 break;
419
420 /* 288MHz */
421 case 288000000:
422 crm_usb_clock_div_set(CRM_USB_DIV_6);
423 break;
424
425 default:
426 break;
427
428 }
429 }
430}
431
437void usb_gpio_config(void)
438{
439 gpio_init_type gpio_init_struct;
440
441 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
442 gpio_default_para_init(&gpio_init_struct);
443
444 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
445 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
446 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
447 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
448
449 /* dp and dm */
450 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
451 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
452
453 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
454 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
455
456#ifdef USB_SOF_OUTPUT_ENABLE
457 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
458 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
459 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
460 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
461#endif
462
463 /* otgfs use vbus pin */
464#ifndef USB_VBUS_IGNORE
465 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
466 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
467 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
468 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
469#endif
470
471
472}
473#ifdef USB_LOW_POWER_WAKUP
479void usb_low_power_wakeup_config(void)
480{
481 exint_init_type exint_init_struct;
482
483 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
484 exint_default_para_init(&exint_init_struct);
485
486 exint_init_struct.line_enable = TRUE;
487 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
488 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
489 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
490 exint_init(&exint_init_struct);
491
492 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
493}
494
500void OTG_WKUP_HANDLER(void)
501{
502 exint_flag_clear(OTG_WKUP_EXINT_LINE);
503}
504
505#endif
506
512void OTG_IRQ_HANDLER(void)
513{
514 usbd_irq_handler(&otg_core_struct);
515}
516
522void usb_delay_ms(uint32_t ms)
523{
524 /* user can define self delay function */
525 delay_ms(ms);
526}
527
533void usb_delay_us(uint32_t us)
534{
535 delay_us(us);
536}
537
at32f435_437_board.h
cdc_class.h
usb cdc class file
cdc_desc.h
usb cdc descriptor header file
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
USART2_IRQHandler
void USART2_IRQHandler(void)
this function handles usart2 handler.
Definition: project/at_start_f435/examples/usart/idle_detection/src/at32f435_437_int.c:141
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
usart_buffer_size
#define usart_buffer_size
Definition: project/at_start_f437/examples/usb_device/virtual_comport/src/main.c:56
hw_usart_read_index
uint16_t hw_usart_read_index
Definition: project/at_start_f437/examples/usb_device/virtual_comport/src/main.c:59
usart2_tx_counter
uint8_t usart2_tx_counter
Definition: project/at_start_f437/examples/usb_device/virtual_comport/src/main.c:46
usart_rx_data_len
uint16_t usart_rx_data_len
Definition: project/at_start_f437/examples/usb_device/virtual_comport/src/main.c:60
linecoding
linecoding_type linecoding
Definition: cdc_class.c:57
ov_cnt
uint16_t ov_cnt
Definition: project/at_start_f437/examples/usb_device/virtual_comport/src/main.c:61
usart_gpio_config
void usart_gpio_config(void)
this function handles usart2 gpio config.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:324
usart_rx_buffer
uint8_t usart_rx_buffer[2048]
Definition: project/at_start_f437/examples/usb_device/virtual_comport/src/main.c:57
usart_send_data
void usart_send_data(uint8_t *send_data, uint16_t len)
this function handles usart2 send data.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:181
usb_buffer
uint8_t usb_buffer[256]
Definition: project/at_start_f437/examples/usb_device/virtual_comport/src/main.c:45
usart_receive_data
uint16_t usart_receive_data(void)
this function handles usart2 receive data.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:200
data_len
uint16_t data_len
Definition: project/at_start_f437/examples/usb_device/virtual_comport/src/main.c:47
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/virtual_comport/src/main.c:44
hw_usart_rx_index
uint16_t hw_usart_rx_index
Definition: project/at_start_f437/examples/usb_device/virtual_comport/src/main.c:58
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USART2_PERIPH_CLOCK
@ CRM_USART2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:140
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_7
@ GPIO_MUX_7
Definition: at32f435_437_gpio.h:163
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
usart_data_transmit
void usart_data_transmit(usart_type *usart_x, uint16_t data)
transmit single data through the usart peripheral.
Definition: at32f435_437_usart.c:413
usart_parity_selection_config
void usart_parity_selection_config(usart_type *usart_x, usart_parity_selection_type parity)
usart parity selection config.
Definition: at32f435_437_usart.c:168
usart_flag_get
flag_status usart_flag_get(usart_type *usart_x, uint32_t flag)
check whether the specified usart flag is set or not.
Definition: at32f435_437_usart.c:598
usart_transmitter_enable
void usart_transmitter_enable(usart_type *usart_x, confirm_state new_state)
usart transmitter enable.
Definition: at32f435_437_usart.c:209
usart_init
void usart_init(usart_type *usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit)
initialize the usart peripheral according to the specified parameters.
Definition: at32f435_437_usart.c:115
usart_enable
void usart_enable(usart_type *usart_x, confirm_state new_state)
enable or disable the specified usart peripheral.
Definition: at32f435_437_usart.c:196
usart_receiver_enable
void usart_receiver_enable(usart_type *usart_x, confirm_state new_state)
usart receiver enable.
Definition: at32f435_437_usart.c:222
usart_interrupt_enable
void usart_interrupt_enable(usart_type *usart_x, uint32_t usart_int, confirm_state new_state)
enable or disable the specified usart interrupts.
Definition: at32f435_437_usart.c:287
usart_data_receive
uint16_t usart_data_receive(usart_type *usart_x)
return the most recent received data by the usart peripheral.
Definition: at32f435_437_usart.c:425
usart_stop_bit_num_type
usart_stop_bit_num_type
usart stop bit num type
Definition: at32f435_437_usart.h:158
usart_data_bit_num_type
usart_data_bit_num_type
usart data bit num type
Definition: at32f435_437_usart.h:112
usart_parity_selection_type
usart_parity_selection_type
usart parity selection type
Definition: at32f435_437_usart.h:93
USART_STOP_1_5_BIT
@ USART_STOP_1_5_BIT
Definition: at32f435_437_usart.h:162
USART_STOP_1_BIT
@ USART_STOP_1_BIT
Definition: at32f435_437_usart.h:159
USART_STOP_2_BIT
@ USART_STOP_2_BIT
Definition: at32f435_437_usart.h:161
USART_DATA_7BITS
@ USART_DATA_7BITS
Definition: at32f435_437_usart.h:113
USART_DATA_8BITS
@ USART_DATA_8BITS
Definition: at32f435_437_usart.h:114
USART_PARITY_ODD
@ USART_PARITY_ODD
Definition: at32f435_437_usart.h:96
USART_PARITY_EVEN
@ USART_PARITY_EVEN
Definition: at32f435_437_usart.h:95
USART_PARITY_NONE
@ USART_PARITY_NONE
Definition: at32f435_437_usart.h:94
USART_TDBE_FLAG
#define USART_TDBE_FLAG
Definition: at32f435_437_usart.h:59
USART_RDBF_FLAG
#define USART_RDBF_FLAG
Definition: at32f435_437_usart.h:57
USART_RDBF_INT
#define USART_RDBF_INT
Definition: at32f435_437_usart.h:73
USART2
#define USART2
Definition: at32f435_437_usart.h:349
usb_usart_config
void usb_usart_config(linecoding_type linecoding)
this function handles usart2 and linecoding config.
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:241
usb_vcp_get_rxdata
uint16_t usb_vcp_get_rxdata(void *udev, uint8_t *recv_data)
usb device class rx data process
Definition: cdc_class.c:339
usb_vcp_send_data
error_status usb_vcp_send_data(void *udev, uint8_t *send_data, uint16_t len)
usb device class send data
Definition: cdc_class.c:369
cdc_class_handler
usbd_class_handler cdc_class_handler
Definition: cdc_class.c:69
cdc_desc_handler
usbd_desc_handler cdc_desc_handler
device descriptor handler structure
Definition: cdc_desc.c:64
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
USART2_IRQn
@ USART2_IRQn
Definition: at32f435_437.h:186
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
linecoding_type
usb cdc class set line coding struct
Definition: usb_std.h:213
linecoding_type::bitrate
uint32_t bitrate
Definition: usb_std.h:214
linecoding_type::data
uint8_t data
Definition: usb_std.h:217
linecoding_type::parity
uint8_t parity
Definition: usb_std.h:216
linecoding_type::format
uint8_t format
Definition: usb_std.h:215
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_device
  • virtual_msc_iap
  • inc
project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_device
  • virtual_msc_iap
  • inc
project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_device
  • virtual_msc_iap
  • inc
project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_device
  • virtual_msc_iap
  • inc
Macros | Functions
project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...

Functions

void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_device
  • virtual_msc_iap
  • inc
project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
39
52#define USE_OTG_DEVICE_MODE
53
57/* #define USE_OTG_HOST_MODE */
58
63/* use otgfs1 */
64#define OTG_USB_ID 1
65
66/* use otgfs2 */
67/* #define OTG_USB_ID 2 */
68
69#if (OTG_USB_ID == 1)
70#define USB_ID 0
71#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
72#define OTG_IRQ OTGFS1_IRQn
73#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
74#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
75#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
76#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
77
78#define OTG_PIN_GPIO GPIOA
79#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
80
81#define OTG_PIN_DP GPIO_PINS_12
82#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
83
84#define OTG_PIN_DM GPIO_PINS_11
85#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
86
87#define OTG_PIN_VBUS GPIO_PINS_9
88#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
89
90#define OTG_PIN_ID GPIO_PINS_10
91#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
92
93#define OTG_PIN_SOF_GPIO GPIOA
94#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
95#define OTG_PIN_SOF GPIO_PINS_8
96#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
97
98#define OTG_PIN_MUX GPIO_MUX_10
99#endif
100
101#if (OTG_USB_ID == 2)
102#define USB_ID 1
103#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
104#define OTG_IRQ OTGFS2_IRQn
105#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
106#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
107#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
108#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
109
110#define OTG_PIN_GPIO GPIOB
111#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
112
113#define OTG_PIN_DP GPIO_PINS_15
114#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
115
116#define OTG_PIN_DM GPIO_PINS_14
117#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
118
119#define OTG_PIN_VBUS GPIO_PINS_13
120#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
121
122#define OTG_PIN_ID GPIO_PINS_12
123#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
124
125#define OTG_PIN_SOF_GPIO GPIOA
126#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
127#define OTG_PIN_SOF GPIO_PINS_4
128#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
129
130#define OTG_PIN_MUX GPIO_MUX_12
131#endif
135#ifdef USE_OTG_DEVICE_MODE
139/* otg1 device fifo */
140#define USBD_RX_SIZE 128
141#define USBD_EP0_TX_SIZE 24
142#define USBD_EP1_TX_SIZE 20
143#define USBD_EP2_TX_SIZE 20
144#define USBD_EP3_TX_SIZE 20
145#define USBD_EP4_TX_SIZE 20
146#define USBD_EP5_TX_SIZE 20
147#define USBD_EP6_TX_SIZE 20
148#define USBD_EP7_TX_SIZE 20
149
150/* otg2 device fifo */
151#define USBD2_RX_SIZE 128
152#define USBD2_EP0_TX_SIZE 24
153#define USBD2_EP1_TX_SIZE 20
154#define USBD2_EP2_TX_SIZE 20
155#define USBD2_EP3_TX_SIZE 20
156#define USBD2_EP4_TX_SIZE 20
157#define USBD2_EP5_TX_SIZE 20
158#define USBD2_EP6_TX_SIZE 20
159#define USBD2_EP7_TX_SIZE 20
160
164#ifndef USB_EPT_MAX_NUM
165#define USB_EPT_MAX_NUM 8
166#endif
167#endif
168
172#ifdef USE_OTG_HOST_MODE
173#ifndef USB_HOST_CHANNEL_NUM
174#define USB_HOST_CHANNEL_NUM 16
175#endif
176
180/* otg1 host fifo */
181#define USBH_RX_FIFO_SIZE 128
182#define USBH_NP_TX_FIFO_SIZE 96
183#define USBH_P_TX_FIFO_SIZE 96
184
185/* otg2 host fifo */
186#define USBH2_RX_FIFO_SIZE 128
187#define USBH2_NP_TX_FIFO_SIZE 96
188#define USBH2_P_TX_FIFO_SIZE 96
189#endif
190
194/* #define USB_SOF_OUTPUT_ENABLE */
195
199#define USB_VBUS_IGNORE
200
204/* #define USB_LOW_POWER_WAKUP */
205
206void usb_delay_ms(uint32_t ms);
207void usb_delay_us(uint32_t us);
208
209
217#ifdef __cplusplus
218}
219#endif
220
221#endif
222
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_device
  • virtual_msc_iap
  • src
Functions
project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_device
  • virtual_msc_iap
  • src
project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_device
  • virtual_msc_iap
  • src
Functions
project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_device
  • virtual_msc_iap
  • src
project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_device
  • virtual_msc_iap
  • src
Functions | Variables
project/at_start_f437/examples/usb_device/virtual_msc_iap/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "msc_class.h"
#include "msc_desc.h"
#include "flash_fat16.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | button_exint_init (button_type button)
void | button_isr (void)
button handler function More...
void | jump_to_app (uint32_t address)
jump to app More...
void | usb_re_connect (void)
int | main (void)
main function. More...
void | usb_reset ()
usb re-connect More...
void | flash_fat16_loop_status (void)
loop status More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
void(* pftarget )(void)

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_device/virtual_msc_iap/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_device
  • virtual_msc_iap
  • src
project/at_start_f437/examples/usb_device/virtual_msc_iap/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "msc_class.h"
33#include "msc_desc.h"
34#include "flash_fat16.h"
35
36
37
46/* usb global struct define */
47 otg_core_type otg_core_struct;
48void (*pftarget)(void);
49void usb_clock48m_select(usb_clk48_s clk_s);
50void usb_gpio_config(void);
51void usb_low_power_wakeup_config(void);
52void button_exint_init(button_type button);
53void button_isr(void);
54void jump_to_app(uint32_t address);
55void usb_re_connect(void);
56
57
63int main(void)
64{
65 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
66
67 system_clock_config();
68
69 flash_fat16_init();
70
71 at32_board_init();
72
73 if(flash_fat16_get_upgrade_flag() == IAP_SUCCESS &&
74 (at32_button_press() == NO_BUTTON))
75 {
76 jump_to_app(flash_iap.flash_app_addr);
77 }
78
79 /* usb gpio config */
80 usb_gpio_config();
81
82#ifdef USB_LOW_POWER_WAKUP
83 usb_low_power_wakeup_config();
84#endif
85
86 /* enable otgfs clock */
87 crm_periph_clock_enable(OTG_CLOCK, TRUE);
88
89 /* select usb 48m clcok source */
90 usb_clock48m_select(USB_CLK_HEXT);
91
92 /* enable otgfs irq */
93 nvic_irq_enable(OTG_IRQ, 0, 0);
94
95 /* init usb */
96 usbd_init(&otg_core_struct,
97 USB_FULL_SPEED_CORE_ID,
98 USB_ID,
99 &msc_class_handler,
100 &msc_desc_handler);
101
102 while(1)
103 {
104 flash_fat16_loop_status();
105 }
106}
107
113void usb_clock48m_select(usb_clk48_s clk_s)
114{
115 if(clk_s == USB_CLK_HICK)
116 {
117 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
118
119 /* enable the acc calibration ready interrupt */
120 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
121
122 /* update the c1\c2\c3 value */
123 acc_write_c1(7980);
124 acc_write_c2(8000);
125 acc_write_c3(8020);
126#if (USB_ID == 0)
127 acc_sof_select(ACC_SOF_OTG1);
128#else
129 acc_sof_select(ACC_SOF_OTG2);
130#endif
131 /* open acc calibration */
132 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
133 }
134 else
135 {
136 switch(system_core_clock)
137 {
138 /* 48MHz */
139 case 48000000:
140 crm_usb_clock_div_set(CRM_USB_DIV_1);
141 break;
142
143 /* 72MHz */
144 case 72000000:
145 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
146 break;
147
148 /* 96MHz */
149 case 96000000:
150 crm_usb_clock_div_set(CRM_USB_DIV_2);
151 break;
152
153 /* 120MHz */
154 case 120000000:
155 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
156 break;
157
158 /* 144MHz */
159 case 144000000:
160 crm_usb_clock_div_set(CRM_USB_DIV_3);
161 break;
162
163 /* 168MHz */
164 case 168000000:
165 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
166 break;
167
168 /* 192MHz */
169 case 192000000:
170 crm_usb_clock_div_set(CRM_USB_DIV_4);
171 break;
172
173 /* 216MHz */
174 case 216000000:
175 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
176 break;
177
178 /* 240MHz */
179 case 240000000:
180 crm_usb_clock_div_set(CRM_USB_DIV_5);
181 break;
182
183 /* 264MHz */
184 case 264000000:
185 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
186 break;
187
188 /* 288MHz */
189 case 288000000:
190 crm_usb_clock_div_set(CRM_USB_DIV_6);
191 break;
192
193 default:
194 break;
195
196 }
197 }
198}
199
205void usb_gpio_config(void)
206{
207 gpio_init_type gpio_init_struct;
208
209 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
210 gpio_default_para_init(&gpio_init_struct);
211
212 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
213 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
214 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
215 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
216
217 /* dp and dm */
218 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
219 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
220
221 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
222 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
223
224#ifdef USB_SOF_OUTPUT_ENABLE
225 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
226 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
227 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
228 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
229#endif
230
231 /* otgfs use vbus pin */
232#ifndef USB_VBUS_IGNORE
233 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
234 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
235 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
236 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
237#endif
238
239
240}
241#ifdef USB_LOW_POWER_WAKUP
247void usb_low_power_wakeup_config(void)
248{
249 exint_init_type exint_init_struct;
250
251 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
252 exint_default_para_init(&exint_init_struct);
253
254 exint_init_struct.line_enable = TRUE;
255 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
256 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
257 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
258 exint_init(&exint_init_struct);
259
260 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
261}
262
268void OTG_WKUP_HANDLER(void)
269{
270 exint_flag_clear(OTG_WKUP_EXINT_LINE);
271}
272
273#endif
274
275
281void usb_reset()
282{
283 delay_ms(1000);
284 usbd_disconnect(&otg_core_struct.dev);
285 delay_ms(1000);
286 usbd_connect(&otg_core_struct.dev);
287}
288
294void flash_fat16_loop_status(void)
295{
296 static uint8_t status = UPGRADE_READY;
297 if(status == flash_iap.msc_up_status)
298 {
299 return;
300 }
301 else
302 {
303 status = flash_iap.msc_up_status;
304 }
305
306 switch(flash_iap.msc_up_status)
307 {
308 case UPGRADE_READY:
309 flash_fat16_set_name((const uint8_t *)"Ready", 5);
310 break;
311 case UPGRAGE_ONGOING:
312 break;
313 case UPGRADE_SUCCESS:
314 flash_fat16_set_name((const uint8_t *)"Success", 7);
315 flash_iap.msc_up_status = UPGRADE_DONE;
316 usb_reset();
317 break;
318 case UPGRADE_FAILED:
319 flash_fat16_set_name((const uint8_t *)"Failed", 6);
320 flash_iap.msc_up_status = UPGRADE_DONE;
321 usb_reset();
322 break;
323 case UPGRADE_LARGE:
324 flash_fat16_set_name((const uint8_t *)"Large", 5);
325 flash_iap.msc_up_status = UPGRADE_DONE;
326 usb_reset();
327 break;
328 case UPGRADE_UNKNOWN:
329 flash_fat16_set_name((const uint8_t *)"Unkown", 6);
330 break;
331 case UPGRADE_DONE:
332 break;
333 case UPGRADE_JUMP:
334 flash_fat16_set_name((const uint8_t *)"Jump", 6);
335 delay_ms(1000);
336 jump_to_app(flash_iap.write_addr);
337 break;
338 default:
339 break;
340 }
341
342}
343
344
350void jump_to_app(uint32_t address)
351{
352 uint32_t stkptr, jumpaddr;
353 stkptr = *(uint32_t *)address;
354 jumpaddr = *(uint32_t *)(address + sizeof(uint32_t));
355
356 /* disable nvic irq and periph clock, clear pending */
357 nvic_irq_disable(OTGFS1_IRQn);
358 nvic_irq_disable(OTGFS2_IRQn);
359
360 __NVIC_ClearPendingIRQ(OTGFS1_IRQn);
361 __NVIC_ClearPendingIRQ(OTGFS2_IRQn);
362
363 crm_periph_clock_enable(CRM_OTGFS1_PERIPH_CLOCK, FALSE);
364 crm_periph_clock_enable(CRM_OTGFS2_PERIPH_CLOCK, FALSE);
365
366 crm_periph_reset(CRM_OTGFS1_PERIPH_RESET, TRUE);
367 crm_periph_reset(CRM_OTGFS1_PERIPH_RESET, FALSE);
368
369 crm_periph_reset(CRM_OTGFS2_PERIPH_RESET, TRUE);
370 crm_periph_reset(CRM_OTGFS2_PERIPH_RESET, FALSE);
371
372 __set_MSP(stkptr);
373 pftarget = (void (*) (void))jumpaddr;
374 pftarget();
375}
376
382void OTG_IRQ_HANDLER(void)
383{
384 usbd_irq_handler(&otg_core_struct);
385}
386
392void usb_delay_ms(uint32_t ms)
393{
394 /* user can define self delay function */
395 delay_ms(ms);
396}
397
403void usb_delay_us(uint32_t us)
404{
405 delay_us(us);
406}
407
at32f435_437_board.h
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:61
button_isr
void button_isr(void)
button handler function
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:84
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
usb_reset
void usb_reset()
usb re-connect
Definition: project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c:281
pftarget
void(* pftarget)(void)
Definition: project/at_start_f437/examples/usb_device/virtual_msc_iap/src/main.c:48
jump_to_app
iapfun jump_to_app
jump to app
Definition: at32f435_437_usart_iap_demo/source_code/bootloader/src/iap.c:46
usb_re_connect
void usb_re_connect(void)
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_device/virtual_msc_iap/src/main.c:47
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
button_type
button_type
Definition: at32f435_437_board.h:97
NO_BUTTON
@ NO_BUTTON
Definition: at32f435_437_board.h:99
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_reset
void crm_periph_reset(crm_periph_reset_type value, confirm_state new_state)
enable or disable the peripheral reset
Definition: at32f435_437_crm.c:251
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_OTGFS1_PERIPH_CLOCK
@ CRM_OTGFS1_PERIPH_CLOCK
Definition: at32f435_437_crm.h:120
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_OTGFS2_PERIPH_CLOCK
@ CRM_OTGFS2_PERIPH_CLOCK
Definition: at32f435_437_crm.h:117
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
CRM_OTGFS1_PERIPH_RESET
@ CRM_OTGFS1_PERIPH_RESET
Definition: at32f435_437_crm.h:267
CRM_OTGFS2_PERIPH_RESET
@ CRM_OTGFS2_PERIPH_RESET
Definition: at32f435_437_crm.h:264
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_irq_disable
void nvic_irq_disable(IRQn_Type irqn)
disable nvic irq number
Definition: at32f435_437_misc.c:81
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
flash_fat16_set_name
uint32_t flash_fat16_set_name(const uint8_t *file_name, uint8_t len)
set file name
Definition: at_start_f437/examples/usb_device/virtual_msc_iap/src/flash_fat16.c:360
flash_fat16_get_upgrade_flag
uint8_t flash_fat16_get_upgrade_flag(void)
get iap upgrade complete flag
Definition: at_start_f437/examples/usb_device/virtual_msc_iap/src/flash_fat16.c:270
flash_fat16_loop_status
void flash_fat16_loop_status(void)
loop status
Definition: project/at_start_f437/examples/usb_device/virtual_msc_iap/src/main.c:294
flash_iap
flash_iap_type flash_iap
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/src/flash_fat16.c:173
flash_fat16_init
void flash_fat16_init(void)
flash fat16 iap init
Definition: at_start_f437/examples/usb_device/virtual_msc_iap/src/flash_fat16.c:712
UPGRADE_LARGE
@ UPGRADE_LARGE
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:86
UPGRADE_UNKNOWN
@ UPGRADE_UNKNOWN
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:87
UPGRADE_JUMP
@ UPGRADE_JUMP
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:89
UPGRADE_FAILED
@ UPGRADE_FAILED
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:85
UPGRADE_SUCCESS
@ UPGRADE_SUCCESS
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:84
UPGRADE_READY
@ UPGRADE_READY
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:82
UPGRAGE_ONGOING
@ UPGRAGE_ONGOING
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:83
UPGRADE_DONE
@ UPGRADE_DONE
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:88
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
IAP_SUCCESS
@ IAP_SUCCESS
Definition: hid_iap_class.h:87
msc_class_handler
usbd_class_handler msc_class_handler
Definition: msc_class.c:57
msc_desc_handler
usbd_desc_handler msc_desc_handler
device descriptor handler structure
Definition: msc_desc.c:64
usbd_connect
void usbd_connect(usbd_core_type *udev)
usb device connect to host
Definition: usbd_core.c:369
usbd_disconnect
void usbd_disconnect(usbd_core_type *udev)
usb device disconnect to host
Definition: usbd_core.c:379
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
OTGFS2_IRQn
@ OTGFS2_IRQn
Definition: at32f435_437.h:220
OTGFS1_IRQn
@ OTGFS1_IRQn
Definition: at32f435_437.h:213
msc_class.h
usb msc class file
msc_desc.h
usb msc descriptor header file
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
flash_iap_type::msc_up_status
upgrade_status_type msc_up_status
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:122
flash_iap_type::write_addr
uint32_t write_addr
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:120
flash_iap_type::flash_app_addr
uint32_t flash_app_addr
Definition: at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h:111
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_host
  • hid_demo
  • inc
project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_host
  • hid_demo
  • inc
project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_host
  • hid_demo
  • inc
project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_host
  • hid_demo
  • inc
Macros | Functions
project/at_start_f437/examples/usb_host/hid_demo/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_HOST_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
select otgfs1 or otgfs2 define More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | OTG_PIN_POWER_SWITCH_GPIO GPIOH
#define | OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOH_PERIPH_CLOCK
#define | OTG_PIN_POWER_SWITCH GPIO_PINS_3
#define | USBH_RX_FIFO_SIZE 128
usb device mode config More...
#define | USBH_NP_TX_FIFO_SIZE 96
#define | USBH_P_TX_FIFO_SIZE 96
#define | USBH2_RX_FIFO_SIZE 128
#define | USBH2_NP_TX_FIFO_SIZE 96
#define | USBH2_P_TX_FIFO_SIZE 96
#define | USBH_5V_POWER_SWITCH
#define | USB_VBUS_IGNORE
usb sof output enable More...
#define | USBH_DEBUG_ENABLE
usb low power wakeup handler enable More...
#define | USBH_DEBUG(...)

Functions

void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_host/hid_demo/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_host
  • hid_demo
  • inc
project/at_start_f437/examples/usb_host/hid_demo/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "stdio.h"
38
50/* #define USE_OTG_DEVICE_MODE */
51
55#define USE_OTG_HOST_MODE
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65/* #define OTG_USB_ID 2 */
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97
98#define OTG_PIN_POWER_SWITCH_GPIO GPIOH
99#define OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOH_PERIPH_CLOCK
100#define OTG_PIN_POWER_SWITCH GPIO_PINS_3
101#endif
102
103#if (OTG_USB_ID == 2)
104#define USB_ID 1
105#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
106#define OTG_IRQ OTGFS2_IRQn
107#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
108#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
109#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
110#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
111
112#define OTG_PIN_GPIO GPIOB
113#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
114
115#define OTG_PIN_DP GPIO_PINS_15
116#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
117
118#define OTG_PIN_DM GPIO_PINS_14
119#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
120
121#define OTG_PIN_VBUS GPIO_PINS_13
122#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
123
124#define OTG_PIN_ID GPIO_PINS_12
125#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
126
127#define OTG_PIN_SOF_GPIO GPIOA
128#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
129#define OTG_PIN_SOF GPIO_PINS_4
130#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
131
132#define OTG_PIN_MUX GPIO_MUX_12
133
134#define OTG_PIN_POWER_SWITCH_GPIO GPIOB
135#define OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOB_PERIPH_CLOCK
136#define OTG_PIN_POWER_SWITCH GPIO_PINS_10
137#endif
138
142#ifdef USE_OTG_DEVICE_MODE
146/* otg1 device fifo */
147#define USBD_RX_SIZE 128
148#define USBD_EP0_TX_SIZE 24
149#define USBD_EP1_TX_SIZE 20
150#define USBD_EP2_TX_SIZE 20
151#define USBD_EP3_TX_SIZE 20
152#define USBD_EP4_TX_SIZE 20
153#define USBD_EP5_TX_SIZE 20
154#define USBD_EP6_TX_SIZE 20
155#define USBD_EP7_TX_SIZE 20
156
157/* otg2 device fifo */
158#define USBD2_RX_SIZE 128
159#define USBD2_EP0_TX_SIZE 24
160#define USBD2_EP1_TX_SIZE 20
161#define USBD2_EP2_TX_SIZE 20
162#define USBD2_EP3_TX_SIZE 20
163#define USBD2_EP4_TX_SIZE 20
164#define USBD2_EP5_TX_SIZE 20
165#define USBD2_EP6_TX_SIZE 20
166#define USBD2_EP7_TX_SIZE 20
167
171#ifndef USB_EPT_MAX_NUM
172#define USB_EPT_MAX_NUM 8
173#endif
174#endif
175
179#ifdef USE_OTG_HOST_MODE
180
181#ifndef USB_HOST_CHANNEL_NUM
182#define USB_HOST_CHANNEL_NUM 16
183#endif
184
188/* otg1 host fifo */
189#define USBH_RX_FIFO_SIZE 128
190#define USBH_NP_TX_FIFO_SIZE 96
191#define USBH_P_TX_FIFO_SIZE 96
192
193/* otg2 host fifo */
194#define USBH2_RX_FIFO_SIZE 128
195#define USBH2_NP_TX_FIFO_SIZE 96
196#define USBH2_P_TX_FIFO_SIZE 96
197
198/* usb host vbus power switch */
199#define USBH_5V_POWER_SWITCH
200
201#endif
202
206/* #define USB_SOF_OUTPUT_ENABLE */
207
211#define USB_VBUS_IGNORE
212
216/* #define USB_LOW_POWER_WAKUP */
217
218#define USBH_DEBUG_ENABLE
219
220#ifdef USBH_DEBUG_ENABLE
221#define USBH_DEBUG(...) printf(__VA_ARGS__);\
222 printf("\r\n");
223#else
224#define USBH_DEBUG(...)
225#endif
226
227void usb_delay_ms(uint32_t ms);
228void usb_delay_us(uint32_t us);
236#ifdef __cplusplus
237}
238#endif
239
240#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_host
  • hid_demo
  • src
Functions
project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_host
  • hid_demo
  • src
project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_host
  • hid_demo
  • src
Functions
project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_host
  • hid_demo
  • src
project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_host
  • hid_demo
  • src
Functions | Variables
project/at_start_f437/examples/usb_host/hid_demo/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbh_int.h"
#include "usbh_hid_class.h"
#include "usbh_user.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
void | button_exint_init (void)
configure button exint More...
void | button_isr (void)
button handler function More...
void | EXINT0_IRQHandler (void)
exint0 interrupt handler More...
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_host/hid_demo/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_host
  • hid_demo
  • src
project/at_start_f437/examples/usb_host/hid_demo/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbh_int.h"
32#include "usbh_hid_class.h"
33#include "usbh_user.h"
34
43/* usb global struct define */
44 otg_core_type otg_core_struct;
45void usb_clock48m_select(usb_clk48_s clk_s);
46void usb_gpio_config(void);
47void usb_low_power_wakeup_config(void);
48void button_exint_init(void);
49void button_isr(void);
50
56void button_exint_init(void)
57{
58 exint_init_type exint_init_struct;
59
60 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
61 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
62
63 exint_default_para_init(&exint_init_struct);
64 exint_init_struct.line_enable = TRUE;
65 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
66 exint_init_struct.line_select = EXINT_LINE_0;
67 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
68 exint_init(&exint_init_struct);
69
70 nvic_irq_enable(EXINT0_IRQn, 0, 0);
71}
72
78void EXINT0_IRQHandler(void)
79{
80 delay_ms(50);
81 exint_flag_clear(EXINT_LINE_0);
82 if(USBH_CLASS == otg_core_struct.host.global_state)
83 {
84 otg_core_struct.host.global_state = USBH_SUSPEND;
85 USBH_DEBUG("Host Start Enter Suspend Mode");
86 }
87 else if(USBH_SUSPENDED == otg_core_struct.host.global_state)
88 {
89 otg_core_struct.host.global_state = USBH_WAKEUP;
90 USBH_DEBUG("Host Start Wakeup");
91 }
92}
93
99int main(void)
100{
101 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
102
103 system_clock_config();
104
105 at32_board_init();
106
107 button_exint_init();
108
109 /* usb gpio config */
110 usb_gpio_config();
111
112 uart_print_init(115200);
113
114#ifdef USB_LOW_POWER_WAKUP
115 usb_low_power_wakeup_config();
116#endif
117
118 /* enable otgfs clock */
119 crm_periph_clock_enable(OTG_CLOCK, TRUE);
120
121 /* select usb 48m clcok source */
122 usb_clock48m_select(USB_CLK_HEXT);
123
124 /* enable otgfs irq */
125 nvic_irq_enable(OTG_IRQ, 0, 0);
126
127 /* init usb */
128 usbh_init(&otg_core_struct,
129 USB_FULL_SPEED_CORE_ID,
130 USB_ID,
131 &uhost_hid_class_handler,
132 &usbh_user_handle);
133 while(1)
134 {
135 usbh_loop_handler(&otg_core_struct.host);
136 }
137}
138
144void usb_clock48m_select(usb_clk48_s clk_s)
145{
146 if(clk_s == USB_CLK_HICK)
147 {
148 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
149
150 /* enable the acc calibration ready interrupt */
151 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
152
153 /* update the c1\c2\c3 value */
154 acc_write_c1(7980);
155 acc_write_c2(8000);
156 acc_write_c3(8020);
157
158 /* open acc calibration */
159 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
160 }
161 else
162 {
163 switch(system_core_clock)
164 {
165 /* 48MHz */
166 case 48000000:
167 crm_usb_clock_div_set(CRM_USB_DIV_1);
168 break;
169
170 /* 72MHz */
171 case 72000000:
172 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
173 break;
174
175 /* 96MHz */
176 case 96000000:
177 crm_usb_clock_div_set(CRM_USB_DIV_2);
178 break;
179
180 /* 120MHz */
181 case 120000000:
182 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
183 break;
184
185 /* 144MHz */
186 case 144000000:
187 crm_usb_clock_div_set(CRM_USB_DIV_3);
188 break;
189
190 /* 168MHz */
191 case 168000000:
192 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
193 break;
194
195 /* 192MHz */
196 case 192000000:
197 crm_usb_clock_div_set(CRM_USB_DIV_4);
198 break;
199
200 /* 216MHz */
201 case 216000000:
202 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
203 break;
204
205 /* 240MHz */
206 case 240000000:
207 crm_usb_clock_div_set(CRM_USB_DIV_5);
208 break;
209
210 /* 264MHz */
211 case 264000000:
212 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
213 break;
214
215 /* 288MHz */
216 case 288000000:
217 crm_usb_clock_div_set(CRM_USB_DIV_6);
218 break;
219
220 default:
221 break;
222
223 }
224 }
225}
226
232void usb_gpio_config(void)
233{
234 gpio_init_type gpio_init_struct;
235
236 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
237 gpio_default_para_init(&gpio_init_struct);
238
239 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
240 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
241 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
242 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
243
244 /* dp and dm */
245 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
246 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
247
248 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
249 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
250
251#ifdef USB_SOF_OUTPUT_ENABLE
252 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
253 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
254 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
255 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
256#endif
257
258 /* otgfs use vbus pin */
259#ifndef USB_VBUS_IGNORE
260 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
261 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
262 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
263 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
264#endif
265
266#ifdef USBH_5V_POWER_SWITCH
267 crm_periph_clock_enable(OTG_PIN_POWER_SWITCH_CLOCK, TRUE);
268 gpio_bits_set(OTG_PIN_POWER_SWITCH_GPIO, OTG_PIN_POWER_SWITCH);
269
270 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
271 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
272 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
273 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
274 gpio_init_struct.gpio_pins = OTG_PIN_POWER_SWITCH;
275 gpio_init(OTG_PIN_POWER_SWITCH_GPIO, &gpio_init_struct);
276#endif
277
278
279}
280#ifdef USB_LOW_POWER_WAKUP
286void usb_low_power_wakeup_config(void)
287{
288 exint_init_type exint_init_struct;
289
290 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
291 exint_default_para_init(&exint_init_struct);
292
293 exint_init_struct.line_enable = TRUE;
294 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
295 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
296 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
297 exint_init(&exint_init_struct);
298
299 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
300}
301
307void OTG_WKUP_HANDLER(void)
308{
309 exint_flag_clear(OTG_WKUP_EXINT_LINE);
310}
311
312#endif
313
319void OTG_IRQ_HANDLER(void)
320{
321 usbh_irq_handler(&otg_core_struct);
322}
323
329void usb_delay_ms(uint32_t ms)
330{
331 /* user can define self delay function */
332 delay_ms(ms);
333}
334
340void usb_delay_us(uint32_t us)
341{
342 delay_us(us);
343}
at32f435_437_board.h
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/examples/exint/exint_config/src/main.c:70
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:61
button_isr
void button_isr(void)
button handler function
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:84
OTG_PIN_POWER_SWITCH_GPIO
#define OTG_PIN_POWER_SWITCH_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:91
OTG_PIN_POWER_SWITCH
#define OTG_PIN_POWER_SWITCH
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:93
OTG_PIN_POWER_SWITCH_CLOCK
#define OTG_PIN_POWER_SWITCH_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:92
usbh_user_handle
usbh_user_handler_type usbh_user_handle
Definition: at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c:50
USBH_DEBUG
#define USBH_DEBUG(...)
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:206
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_host/hid_demo/src/main.c:44
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbh_loop_handler
usb_sts_type usbh_loop_handler(usbh_core_type *uhost)
usb host enum loop handler
Definition: usbh_core.c:1142
uhost_hid_class_handler
usbh_class_handler_type uhost_hid_class_handler
Definition: usbh_hid_class.c:52
usbh_irq_handler
void usbh_irq_handler(otg_core_type *hdev)
usb host interrupt handler
Definition: usbh_int.c:47
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbh_hid_class.h
usb host hid class header file
usbh_int.h
usb header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_host
  • msc_only_fat32
  • inc
project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_host
  • msc_only_fat32
  • inc
project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_host
  • msc_only_fat32
  • inc
project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_host
  • msc_only_fat32
  • inc
Macros | Functions
project/at_start_f437/examples/usb_host/msc_only_fat32/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_HOST_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
select otgfs1 or otgfs2 define More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | OTG_PIN_POWER_SWITCH_GPIO GPIOH
#define | OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOH_PERIPH_CLOCK
#define | OTG_PIN_POWER_SWITCH GPIO_PINS_3
#define | USBH_RX_FIFO_SIZE 128
usb device mode config More...
#define | USBH_NP_TX_FIFO_SIZE 96
#define | USBH_P_TX_FIFO_SIZE 96
#define | USBH2_RX_FIFO_SIZE 128
#define | USBH2_NP_TX_FIFO_SIZE 96
#define | USBH2_P_TX_FIFO_SIZE 96
#define | USBH_5V_POWER_SWITCH
#define | USB_VBUS_IGNORE
usb sof output enable More...
#define | USBH_DEBUG_ENABLE
usb low power wakeup handler enable More...
#define | USBH_DEBUG(...)

Functions

void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_host/msc_only_fat32/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_host
  • msc_only_fat32
  • inc
project/at_start_f437/examples/usb_host/msc_only_fat32/inc/usb_conf.h
Go to the documentation of this file.
1
26/* define to prevent recursive inclusion -------------------------------------*/
27#ifndef __USB_CONF_H
28#define __USB_CONF_H
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#include "at32f435_437_usb.h"
35#include "at32f435_437.h"
36#include "stdio.h"
37
49/* #define USE_OTG_DEVICE_MODE */
50
54#define USE_OTG_HOST_MODE
55
60/* use otgfs1 */
61#define OTG_USB_ID 1
62
63/* use otgfs2 */
64/* #define OTG_USB_ID 2 */
65
66#if (OTG_USB_ID == 1)
67#define USB_ID 0
68#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
69#define OTG_IRQ OTGFS1_IRQn
70#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
71#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
72#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
73#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
74
75#define OTG_PIN_GPIO GPIOA
76#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
77
78#define OTG_PIN_DP GPIO_PINS_12
79#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
80
81#define OTG_PIN_DM GPIO_PINS_11
82#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
83
84#define OTG_PIN_VBUS GPIO_PINS_9
85#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
86
87#define OTG_PIN_ID GPIO_PINS_10
88#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
89
90#define OTG_PIN_SOF_GPIO GPIOA
91#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
92#define OTG_PIN_SOF GPIO_PINS_8
93#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
94
95#define OTG_PIN_MUX GPIO_MUX_10
96
97#define OTG_PIN_POWER_SWITCH_GPIO GPIOH
98#define OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOH_PERIPH_CLOCK
99#define OTG_PIN_POWER_SWITCH GPIO_PINS_3
100#endif
101
102#if (OTG_USB_ID == 2)
103#define USB_ID 1
104#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
105#define OTG_IRQ OTGFS2_IRQn
106#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
107#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
108#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
109#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
110
111#define OTG_PIN_GPIO GPIOB
112#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
113
114#define OTG_PIN_DP GPIO_PINS_15
115#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
116
117#define OTG_PIN_DM GPIO_PINS_14
118#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
119
120#define OTG_PIN_VBUS GPIO_PINS_13
121#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
122
123#define OTG_PIN_ID GPIO_PINS_12
124#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
125
126#define OTG_PIN_SOF_GPIO GPIOA
127#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
128#define OTG_PIN_SOF GPIO_PINS_4
129#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
130
131#define OTG_PIN_MUX GPIO_MUX_12
132
133#define OTG_PIN_POWER_SWITCH_GPIO GPIOB
134#define OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOB_PERIPH_CLOCK
135#define OTG_PIN_POWER_SWITCH GPIO_PINS_10
136#endif
137
141#ifdef USE_OTG_DEVICE_MODE
145/* otg1 device fifo */
146#define USBD_RX_SIZE 128
147#define USBD_EP0_TX_SIZE 24
148#define USBD_EP1_TX_SIZE 20
149#define USBD_EP2_TX_SIZE 20
150#define USBD_EP3_TX_SIZE 20
151#define USBD_EP4_TX_SIZE 20
152#define USBD_EP5_TX_SIZE 20
153#define USBD_EP6_TX_SIZE 20
154#define USBD_EP7_TX_SIZE 20
155
156/* otg2 device fifo */
157#define USBD2_RX_SIZE 128
158#define USBD2_EP0_TX_SIZE 24
159#define USBD2_EP1_TX_SIZE 20
160#define USBD2_EP2_TX_SIZE 20
161#define USBD2_EP3_TX_SIZE 20
162#define USBD2_EP4_TX_SIZE 20
163#define USBD2_EP5_TX_SIZE 20
164#define USBD2_EP6_TX_SIZE 20
165#define USBD2_EP7_TX_SIZE 20
166
170#ifndef USB_EPT_MAX_NUM
171#define USB_EPT_MAX_NUM 8
172#endif
173#endif
174
178#ifdef USE_OTG_HOST_MODE
179#ifndef USB_HOST_CHANNEL_NUM
180#define USB_HOST_CHANNEL_NUM 16
181#endif
182
186/* otg1 host fifo */
187#define USBH_RX_FIFO_SIZE 128
188#define USBH_NP_TX_FIFO_SIZE 96
189#define USBH_P_TX_FIFO_SIZE 96
190
191/* otg2 host fifo */
192#define USBH2_RX_FIFO_SIZE 128
193#define USBH2_NP_TX_FIFO_SIZE 96
194#define USBH2_P_TX_FIFO_SIZE 96
195
196/* usb host vbus power switch */
197#define USBH_5V_POWER_SWITCH
198#endif
199
203/* #define USB_SOF_OUTPUT_ENABLE */
204
208#define USB_VBUS_IGNORE
209
213/* #define USB_LOW_POWER_WAKUP */
214
215#define USBH_DEBUG_ENABLE
216
217#ifdef USBH_DEBUG_ENABLE
218#define USBH_DEBUG(...) printf(__VA_ARGS__);\
219 printf("\r\n");
220#else
221#define USBH_DEBUG(...)
222#endif
223
224void usb_delay_ms(uint32_t ms);
225void usb_delay_us(uint32_t us);
226
234#ifdef __cplusplus
235}
236#endif
237
238#endif
239
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_host
  • msc_only_fat32
  • src
Functions
project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_host
  • msc_only_fat32
  • src
project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_host
  • msc_only_fat32
  • src
Functions
project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_host
  • msc_only_fat32
  • src
project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c
Go to the documentation of this file.
1
26/* includes ------------------------------------------------------------------*/
27#include "at32f435_437_int.h"
40void NMI_Handler(void)
41{
42}
43
49void HardFault_Handler(void)
50{
51 /* go to infinite loop when hard fault exception occurs */
52 while (1)
53 {
54 }
55}
56
62void MemManage_Handler(void)
63{
64 /* go to infinite loop when memory manage exception occurs */
65 while (1)
66 {
67 }
68}
69
75void BusFault_Handler(void)
76{
77 /* go to infinite loop when bus fault exception occurs */
78 while (1)
79 {
80 }
81}
82
88void UsageFault_Handler(void)
89{
90 /* go to infinite loop when usage fault exception occurs */
91 while (1)
92 {
93 }
94}
95
101void SVC_Handler(void)
102{
103}
104
110void DebugMon_Handler(void)
111{
112}
113
119void PendSV_Handler(void)
120{
121}
122
128void SysTick_Handler(void)
129{
130}
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_host
  • msc_only_fat32
  • src
Functions | Variables
project/at_start_f437/examples/usb_host/msc_only_fat32/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbh_int.h"
#include "usbh_user.h"
#include "usbh_msc_class.h"
#include "ff.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_host/msc_only_fat32/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_host
  • msc_only_fat32
  • src
project/at_start_f437/examples/usb_host/msc_only_fat32/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbh_int.h"
32#include "usbh_user.h"
33#include "usbh_msc_class.h"
34#include "ff.h"
35
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46void usb_clock48m_select(usb_clk48_s clk_s);
47void usb_gpio_config(void);
48void usb_low_power_wakeup_config(void);
49
55int main(void)
56{
57 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
58
59 system_clock_config();
60
61 at32_board_init();
62
63 /* usb gpio config */
64 usb_gpio_config();
65
66#ifdef USB_LOW_POWER_WAKUP
67 usb_low_power_wakeup_config();
68#endif
69
70 uart_print_init(115200);
71
72 /* enable otgfs clock */
73 crm_periph_clock_enable(OTG_CLOCK, TRUE);
74
75 /* select usb 48m clcok source */
76 usb_clock48m_select(USB_CLK_HEXT);
77
78 /* enable otgfs irq */
79 nvic_irq_enable(OTG_IRQ, 0, 0);
80
81 /* init usb */
82 usbh_init(&otg_core_struct,
83 USB_FULL_SPEED_CORE_ID,
84 USB_ID,
85 &uhost_msc_class_handler,
86 &usbh_user_handle);
87 while(1)
88 {
89 usbh_loop_handler(&otg_core_struct.host);
90 }
91}
92
98void usb_clock48m_select(usb_clk48_s clk_s)
99{
100 if(clk_s == USB_CLK_HICK)
101 {
102 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
103
104 /* enable the acc calibration ready interrupt */
105 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
106
107 /* update the c1\c2\c3 value */
108 acc_write_c1(7980);
109 acc_write_c2(8000);
110 acc_write_c3(8020);
111
112 /* open acc calibration */
113 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
114 }
115 else
116 {
117 switch(system_core_clock)
118 {
119 /* 48MHz */
120 case 48000000:
121 crm_usb_clock_div_set(CRM_USB_DIV_1);
122 break;
123
124 /* 72MHz */
125 case 72000000:
126 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
127 break;
128
129 /* 96MHz */
130 case 96000000:
131 crm_usb_clock_div_set(CRM_USB_DIV_2);
132 break;
133
134 /* 120MHz */
135 case 120000000:
136 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
137 break;
138
139 /* 144MHz */
140 case 144000000:
141 crm_usb_clock_div_set(CRM_USB_DIV_3);
142 break;
143
144 /* 168MHz */
145 case 168000000:
146 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
147 break;
148
149 /* 192MHz */
150 case 192000000:
151 crm_usb_clock_div_set(CRM_USB_DIV_4);
152 break;
153
154 /* 216MHz */
155 case 216000000:
156 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
157 break;
158
159 /* 240MHz */
160 case 240000000:
161 crm_usb_clock_div_set(CRM_USB_DIV_5);
162 break;
163
164 /* 264MHz */
165 case 264000000:
166 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
167 break;
168
169 /* 288MHz */
170 case 288000000:
171 crm_usb_clock_div_set(CRM_USB_DIV_6);
172 break;
173
174 default:
175 break;
176
177 }
178 }
179}
180
186void usb_gpio_config(void)
187{
188 gpio_init_type gpio_init_struct;
189
190 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
191 gpio_default_para_init(&gpio_init_struct);
192
193 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
194 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
195 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
196 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
197
198 /* dp and dm */
199 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
200 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
201
202 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
203 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
204
205#ifdef USB_SOF_OUTPUT_ENABLE
206 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
207 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
208 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
209 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
210#endif
211
212 /* otgfs use vbus pin */
213#ifndef USB_VBUS_IGNORE
214 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
215 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
216 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
217 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
218#endif
219
220#ifdef USBH_5V_POWER_SWITCH
221 crm_periph_clock_enable(OTG_PIN_POWER_SWITCH_CLOCK, TRUE);
222 gpio_bits_set(OTG_PIN_POWER_SWITCH_GPIO, OTG_PIN_POWER_SWITCH);
223
224 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
225 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
226 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
227 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
228 gpio_init_struct.gpio_pins = OTG_PIN_POWER_SWITCH;
229 gpio_init(OTG_PIN_POWER_SWITCH_GPIO, &gpio_init_struct);
230#endif
231
232
233}
234#ifdef USB_LOW_POWER_WAKUP
240void usb_low_power_wakeup_config(void)
241{
242 exint_init_type exint_init_struct;
243
244 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
245 exint_default_para_init(&exint_init_struct);
246
247 exint_init_struct.line_enable = TRUE;
248 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
249 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
250 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
251 exint_init(&exint_init_struct);
252
253 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
254}
255
261void OTG_WKUP_HANDLER(void)
262{
263 exint_flag_clear(OTG_WKUP_EXINT_LINE);
264}
265
266#endif
267
273void OTG_IRQ_HANDLER(void)
274{
275 usbh_irq_handler(&otg_core_struct);
276}
277
283void usb_delay_ms(uint32_t ms)
284{
285 /* user can define self delay function */
286 delay_ms(ms);
287}
288
294void usb_delay_us(uint32_t us)
295{
296 delay_us(us);
297}
298
at32f435_437_board.h
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
OTG_PIN_POWER_SWITCH_GPIO
#define OTG_PIN_POWER_SWITCH_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:91
OTG_PIN_POWER_SWITCH
#define OTG_PIN_POWER_SWITCH
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:93
OTG_PIN_POWER_SWITCH_CLOCK
#define OTG_PIN_POWER_SWITCH_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:92
usbh_user_handle
usbh_user_handler_type usbh_user_handle
Definition: at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c:50
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_host/msc_only_fat32/src/main.c:45
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbh_loop_handler
usb_sts_type usbh_loop_handler(usbh_core_type *uhost)
usb host enum loop handler
Definition: usbh_core.c:1142
usbh_irq_handler
void usbh_irq_handler(otg_core_type *hdev)
usb host interrupt handler
Definition: usbh_int.c:47
uhost_msc_class_handler
usbh_class_handler_type uhost_msc_class_handler
Definition: usbh_msc_class.c:55
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbh_int.h
usb header file
usbh_msc_class.h
usb host msc class header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • usb_host
  • two_otg_host_demo
  • inc
project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • usb_host
  • two_otg_host_demo
  • inc
project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • usb_host
  • two_otg_host_demo
  • inc
project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • usb_host
  • two_otg_host_demo
  • inc
Macros | Functions
project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "stdio.h"

Go to the source code of this file.

Macros

#define | USE_OTG_HOST_MODE
enable usb device mode More...
#define | USB_ID 0
select otgfs1 or otgfs2 define More...
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | OTG_PIN_POWER_SWITCH_GPIO GPIOH
#define | OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOH_PERIPH_CLOCK
#define | OTG_PIN_POWER_SWITCH GPIO_PINS_3
#define | USB2_ID 1
#define | OTG2_CLOCK CRM_OTGFS2_PERIPH_CLOCK
#define | OTG2_IRQ OTGFS2_IRQn
#define | OTG2_IRQ_HANDLER OTGFS2_IRQHandler
#define | OTG2_WKUP_IRQ OTGFS2_WKUP_IRQn
#define | OTG2_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
#define | OTG2_WKUP_EXINT_LINE EXINT_LINE_20
#define | OTG2_PIN_GPIO GPIOB
#define | OTG2_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define | OTG2_PIN_DP GPIO_PINS_15
#define | OTG2_PIN_DP_SOURCE GPIO_PINS_SOURCE15
#define | OTG2_PIN_DM GPIO_PINS_14
#define | OTG2_PIN_DM_SOURCE GPIO_PINS_SOURCE14
#define | OTG2_PIN_VBUS GPIO_PINS_13
#define | OTG2_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
#define | OTG2_PIN_ID GPIO_PINS_12
#define | OTG2_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG2_PIN_SOF_GPIO GPIOA
#define | OTG2_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG2_PIN_SOF GPIO_PINS_4
#define | OTG2_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
#define | OTG2_PIN_MUX GPIO_MUX_12
#define | OTG2_PIN_POWER_SWITCH_GPIO GPIOB
#define | OTG2_PIN_POWER_SWITCH_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define | OTG2_PIN_POWER_SWITCH GPIO_PINS_10
#define | USBH_RX_FIFO_SIZE 128
usb device mode config More...
#define | USBH_NP_TX_FIFO_SIZE 96
#define | USBH_P_TX_FIFO_SIZE 96
#define | USBH2_RX_FIFO_SIZE 128
#define | USBH2_NP_TX_FIFO_SIZE 96
#define | USBH2_P_TX_FIFO_SIZE 96
#define | USBH_5V_POWER_SWITCH
#define | USB_VBUS_IGNORE
usb sof output enable More...
#define | USBH_DEBUG_ENABLE
usb low power wakeup handler enable More...
#define | USBH_DEBUG(...)

Functions

void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • usb_host
  • two_otg_host_demo
  • inc
project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/usb_conf.h
Go to the documentation of this file.
1
26/* define to prevent recursive inclusion -------------------------------------*/
27#ifndef __USB_CONF_H
28#define __USB_CONF_H
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#include "at32f435_437_usb.h"
35#include "at32f435_437.h"
36#include "stdio.h"
37
49/* #define USE_OTG_DEVICE_MODE */
50
54#define USE_OTG_HOST_MODE
55
61#define USB_ID 0
62#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
63#define OTG_IRQ OTGFS1_IRQn
64#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
65#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
66#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
67#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
68
69#define OTG_PIN_GPIO GPIOA
70#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
71
72#define OTG_PIN_DP GPIO_PINS_12
73#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
74
75#define OTG_PIN_DM GPIO_PINS_11
76#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
77
78#define OTG_PIN_VBUS GPIO_PINS_9
79#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
80
81#define OTG_PIN_ID GPIO_PINS_10
82#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
83
84#define OTG_PIN_SOF_GPIO GPIOA
85#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
86#define OTG_PIN_SOF GPIO_PINS_8
87#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
88
89#define OTG_PIN_MUX GPIO_MUX_10
90
91#define OTG_PIN_POWER_SWITCH_GPIO GPIOH
92#define OTG_PIN_POWER_SWITCH_CLOCK CRM_GPIOH_PERIPH_CLOCK
93#define OTG_PIN_POWER_SWITCH GPIO_PINS_3
94
95
96#define USB2_ID 1
97#define OTG2_CLOCK CRM_OTGFS2_PERIPH_CLOCK
98#define OTG2_IRQ OTGFS2_IRQn
99#define OTG2_IRQ_HANDLER OTGFS2_IRQHandler
100#define OTG2_WKUP_IRQ OTGFS2_WKUP_IRQn
101#define OTG2_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
102#define OTG2_WKUP_EXINT_LINE EXINT_LINE_20
103
104#define OTG2_PIN_GPIO GPIOB
105#define OTG2_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
106
107#define OTG2_PIN_DP GPIO_PINS_15
108#define OTG2_PIN_DP_SOURCE GPIO_PINS_SOURCE15
109
110#define OTG2_PIN_DM GPIO_PINS_14
111#define OTG2_PIN_DM_SOURCE GPIO_PINS_SOURCE14
112
113#define OTG2_PIN_VBUS GPIO_PINS_13
114#define OTG2_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
115
116#define OTG2_PIN_ID GPIO_PINS_12
117#define OTG2_PIN_ID_SOURCE GPIO_PINS_SOURCE10
118
119#define OTG2_PIN_SOF_GPIO GPIOA
120#define OTG2_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
121#define OTG2_PIN_SOF GPIO_PINS_4
122#define OTG2_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
123
124#define OTG2_PIN_MUX GPIO_MUX_12
125
126
127#define OTG2_PIN_POWER_SWITCH_GPIO GPIOB
128#define OTG2_PIN_POWER_SWITCH_CLOCK CRM_GPIOB_PERIPH_CLOCK
129#define OTG2_PIN_POWER_SWITCH GPIO_PINS_10
130
131
135#ifdef USE_OTG_DEVICE_MODE
139/* otg1 device fifo */
140#define USBD_RX_SIZE 128
141#define USBD_EP0_TX_SIZE 24
142#define USBD_EP1_TX_SIZE 20
143#define USBD_EP2_TX_SIZE 20
144#define USBD_EP3_TX_SIZE 20
145#define USBD_EP4_TX_SIZE 20
146#define USBD_EP5_TX_SIZE 20
147#define USBD_EP6_TX_SIZE 20
148#define USBD_EP7_TX_SIZE 20
149
150/* otg2 device fifo */
151#define USBD2_RX_SIZE 128
152#define USBD2_EP0_TX_SIZE 24
153#define USBD2_EP1_TX_SIZE 20
154#define USBD2_EP2_TX_SIZE 20
155#define USBD2_EP3_TX_SIZE 20
156#define USBD2_EP4_TX_SIZE 20
157#define USBD2_EP5_TX_SIZE 20
158#define USBD2_EP6_TX_SIZE 20
159#define USBD2_EP7_TX_SIZE 20
160
164#ifndef USB_EPT_MAX_NUM
165#define USB_EPT_MAX_NUM 8
166#endif
167#endif
168
172#ifdef USE_OTG_HOST_MODE
173#ifndef USB_HOST_CHANNEL_NUM
174#define USB_HOST_CHANNEL_NUM 16
175#endif
176
180/* otg1 host fifo */
181#define USBH_RX_FIFO_SIZE 128
182#define USBH_NP_TX_FIFO_SIZE 96
183#define USBH_P_TX_FIFO_SIZE 96
184
185/* otg2 host fifo */
186#define USBH2_RX_FIFO_SIZE 128
187#define USBH2_NP_TX_FIFO_SIZE 96
188#define USBH2_P_TX_FIFO_SIZE 96
189
190/* usb host vbus power switch */
191#define USBH_5V_POWER_SWITCH
192#endif
193
197/* #define USB_SOF_OUTPUT_ENABLE */
198
202#define USB_VBUS_IGNORE
203
207/* #define USB_LOW_POWER_WAKUP */
208
209#define USBH_DEBUG_ENABLE
210
211#ifdef USBH_DEBUG_ENABLE
212#define USBH_DEBUG(...) printf(__VA_ARGS__);\
213 printf("\r\n");
214#else
215#define USBH_DEBUG(...)
216#endif
217
218void usb_delay_ms(uint32_t ms);
219void usb_delay_us(uint32_t us);
220
228#ifdef __cplusplus
229}
230#endif
231
232#endif
233
at32f435_437.h
at32f435_437 header file
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • usb_host
  • two_otg_host_demo
  • src
Functions
project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • usb_host
  • two_otg_host_demo
  • src
project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • usb_host
  • two_otg_host_demo
  • src
Functions
project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • usb_host
  • two_otg_host_demo
  • src
project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c
Go to the documentation of this file.
1
26/* includes ------------------------------------------------------------------*/
27#include "at32f435_437_int.h"
40void NMI_Handler(void)
41{
42}
43
49void HardFault_Handler(void)
50{
51 /* go to infinite loop when hard fault exception occurs */
52 while (1)
53 {
54 }
55}
56
62void MemManage_Handler(void)
63{
64 /* go to infinite loop when memory manage exception occurs */
65 while (1)
66 {
67 }
68}
69
75void BusFault_Handler(void)
76{
77 /* go to infinite loop when bus fault exception occurs */
78 while (1)
79 {
80 }
81}
82
88void UsageFault_Handler(void)
89{
90 /* go to infinite loop when usage fault exception occurs */
91 while (1)
92 {
93 }
94}
95
101void SVC_Handler(void)
102{
103}
104
110void DebugMon_Handler(void)
111{
112}
113
119void PendSV_Handler(void)
120{
121}
122
128void SysTick_Handler(void)
129{
130}
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • usb_host
  • two_otg_host_demo
  • src
Functions | Variables
project/at_start_f437/examples/usb_host/two_otg_host_demo/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbh_int.h"
#include "usbh_user.h"
#include "usbh_msc_class.h"
#include "usbh_hid_class.h"
#include "ff.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | OTG2_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct
otg_core_type otg2_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/usb_host/two_otg_host_demo/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • usb_host
  • two_otg_host_demo
  • src
project/at_start_f437/examples/usb_host/two_otg_host_demo/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbh_int.h"
32#include "usbh_user.h"
33#include "usbh_msc_class.h"
34#include "usbh_hid_class.h"
35#include "ff.h"
36
45/* usb global struct define */
46 otg_core_type otg_core_struct;
47 otg_core_type otg2_core_struct;
48void usb_clock48m_select(usb_clk48_s clk_s);
49void usb_gpio_config(void);
50void usb_low_power_wakeup_config(void);
51
57int main(void)
58{
59 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
60
61 system_clock_config();
62
63 at32_board_init();
64
65 /* usb gpio config */
66 usb_gpio_config();
67
68#ifdef USB_LOW_POWER_WAKUP
69 usb_low_power_wakeup_config();
70#endif
71
72 uart_print_init(115200);
73
74 /* enable otgfs clock */
75 crm_periph_clock_enable(OTG_CLOCK, TRUE);
76 crm_periph_clock_enable(OTG2_CLOCK, TRUE);
77
78 /* select usb 48m clcok source */
79 usb_clock48m_select(USB_CLK_HEXT);
80
81 /* enable otgfs irq */
82 nvic_irq_enable(OTG_IRQ, 0, 0);
83 nvic_irq_enable(OTG2_IRQ, 0, 0);
84
85 /* init otg1 host */
86 usbh_init(&otg_core_struct,
87 USB_FULL_SPEED_CORE_ID,
88 USB_ID,
89 &uhost_msc_class_handler,
90 &usbh_user_handle);
91 /* init otg2 host */
92 usbh_init(&otg2_core_struct,
93 USB_FULL_SPEED_CORE_ID,
94 USB2_ID,
95 &uhost_hid_class_handler,
96 &usbh_user_handle);
97 while(1)
98 {
99 usbh_loop_handler(&otg_core_struct.host);
100 usbh_loop_handler(&otg2_core_struct.host);
101 }
102}
103
109void usb_clock48m_select(usb_clk48_s clk_s)
110{
111 if(clk_s == USB_CLK_HICK)
112 {
113 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
114
115 /* enable the acc calibration ready interrupt */
116 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
117
118 /* update the c1\c2\c3 value */
119 acc_write_c1(7980);
120 acc_write_c2(8000);
121 acc_write_c3(8020);
122
123 /* open acc calibration */
124 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
125 }
126 else
127 {
128 switch(system_core_clock)
129 {
130 /* 48MHz */
131 case 48000000:
132 crm_usb_clock_div_set(CRM_USB_DIV_1);
133 break;
134
135 /* 72MHz */
136 case 72000000:
137 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
138 break;
139
140 /* 96MHz */
141 case 96000000:
142 crm_usb_clock_div_set(CRM_USB_DIV_2);
143 break;
144
145 /* 120MHz */
146 case 120000000:
147 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
148 break;
149
150 /* 144MHz */
151 case 144000000:
152 crm_usb_clock_div_set(CRM_USB_DIV_3);
153 break;
154
155 /* 168MHz */
156 case 168000000:
157 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
158 break;
159
160 /* 192MHz */
161 case 192000000:
162 crm_usb_clock_div_set(CRM_USB_DIV_4);
163 break;
164
165 /* 216MHz */
166 case 216000000:
167 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
168 break;
169
170 /* 240MHz */
171 case 240000000:
172 crm_usb_clock_div_set(CRM_USB_DIV_5);
173 break;
174
175 /* 264MHz */
176 case 264000000:
177 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
178 break;
179
180 /* 288MHz */
181 case 288000000:
182 crm_usb_clock_div_set(CRM_USB_DIV_6);
183 break;
184
185 default:
186 break;
187
188 }
189 }
190}
191
197void usb_gpio_config(void)
198{
199 gpio_init_type gpio_init_struct;
200
201 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
202 gpio_default_para_init(&gpio_init_struct);
203
204 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
205 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
206 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
207 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
208
209 /* dp and dm */
210 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
211 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
212
213 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
214 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
215
216#ifdef USB_SOF_OUTPUT_ENABLE
217 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
218 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
219 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
220 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
221#endif
222
223 /* otgfs use vbus pin */
224#ifndef USB_VBUS_IGNORE
225 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
226 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
227 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
228 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
229#endif
230
231#ifdef USBH_5V_POWER_SWITCH
232 crm_periph_clock_enable(OTG_PIN_POWER_SWITCH_CLOCK, TRUE);
233 gpio_bits_set(OTG_PIN_POWER_SWITCH_GPIO, OTG_PIN_POWER_SWITCH);
234
235 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
236 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
237 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
238 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
239 gpio_init_struct.gpio_pins = OTG_PIN_POWER_SWITCH;
240 gpio_init(OTG_PIN_POWER_SWITCH_GPIO, &gpio_init_struct);
241#endif
242
243/* otg2 gpio config */
244 crm_periph_clock_enable(OTG2_PIN_GPIO_CLOCK, TRUE);
245 gpio_default_para_init(&gpio_init_struct);
246
247 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
248 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
249 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
250 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
251
252 /* dp and dm */
253 gpio_init_struct.gpio_pins = OTG2_PIN_DP | OTG2_PIN_DM;
254 gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
255
256 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DP_SOURCE, OTG2_PIN_MUX);
257 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_DM_SOURCE, OTG2_PIN_MUX);
258
259#ifdef USB_SOF_OUTPUT_ENABLE
260 crm_periph_clock_enable(OTG2_PIN_SOF_GPIO_CLOCK, TRUE);
261 gpio_init_struct.gpio_pins = OTG2_PIN_SOF;
262 gpio_init(OTG2_PIN_SOF_GPIO, &gpio_init_struct);
263 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_SOF_SOURCE, OTG2_PIN_MUX);
264#endif
265
266 /* otgfs use vbus pin */
267#ifndef USB_VBUS_IGNORE
268 gpio_init_struct.gpio_pins = OTG2_PIN_VBUS;
269 gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
270 gpio_pin_mux_config(OTG2_PIN_GPIO, OTG2_PIN_VBUS_SOURCE, OTG2_PIN_MUX);
271 gpio_init(OTG2_PIN_GPIO, &gpio_init_struct);
272#endif
273
274#ifdef USBH_5V_POWER_SWITCH
275 crm_periph_clock_enable(OTG2_PIN_POWER_SWITCH_CLOCK, TRUE);
276 gpio_bits_set(OTG2_PIN_POWER_SWITCH_GPIO, OTG2_PIN_POWER_SWITCH);
277
278 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
279 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
280 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
281 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
282 gpio_init_struct.gpio_pins = OTG2_PIN_POWER_SWITCH;
283 gpio_init(OTG2_PIN_POWER_SWITCH_GPIO, &gpio_init_struct);
284#endif
285
286
287}
288#ifdef USB_LOW_POWER_WAKUP
294void usb_low_power_wakeup_config(void)
295{
296 exint_init_type exint_init_struct;
297
298 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
299 exint_default_para_init(&exint_init_struct);
300
301 exint_init_struct.line_enable = TRUE;
302 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
303 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
304 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
305 exint_init(&exint_init_struct);
306
307 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
308
309 /*otg2*/
310 exint_init_struct.line_enable = TRUE;
311 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
312 exint_init_struct.line_select = OTG2_WKUP_EXINT_LINE;
313 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
314 exint_init(&exint_init_struct);
315
316 nvic_irq_enable(OTG2_WKUP_IRQ, 0, 0);
317}
318
324void OTG_WKUP_HANDLER(void)
325{
326 exint_flag_clear(OTG_WKUP_EXINT_LINE);
327}
328
334void OTG2_WKUP_HANDLER(void)
335{
336 exint_flag_clear(OTG2_WKUP_EXINT_LINE);
337}
338
339#endif
340
346void OTG_IRQ_HANDLER(void)
347{
348 usbh_irq_handler(&otg_core_struct);
349}
350
356void OTG2_IRQ_HANDLER(void)
357{
358 usbh_irq_handler(&otg2_core_struct);
359}
360
366void usb_delay_ms(uint32_t ms)
367{
368 /* user can define self delay function */
369 delay_ms(ms);
370}
371
377void usb_delay_us(uint32_t us)
378{
379 delay_us(us);
380}
381
at32f435_437_board.h
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:276
OTG_IRQ_HANDLER
#define OTG_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:71
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:62
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
OTG_PIN_POWER_SWITCH_GPIO
#define OTG_PIN_POWER_SWITCH_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:91
OTG2_PIN_DP_SOURCE
#define OTG2_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:108
OTG_PIN_POWER_SWITCH
#define OTG_PIN_POWER_SWITCH
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:93
OTG2_IRQ
#define OTG2_IRQ
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:98
OTG2_PIN_VBUS_SOURCE
#define OTG2_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:114
OTG2_PIN_SOF_SOURCE
#define OTG2_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:122
OTG2_PIN_GPIO_CLOCK
#define OTG2_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:105
OTG2_WKUP_IRQ
#define OTG2_WKUP_IRQ
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:100
OTG2_PIN_GPIO
#define OTG2_PIN_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:104
OTG_PIN_POWER_SWITCH_CLOCK
#define OTG_PIN_POWER_SWITCH_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:92
usbh_user_handle
usbh_user_handler_type usbh_user_handle
Definition: at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c:50
OTG2_PIN_DM
#define OTG2_PIN_DM
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:110
OTG2_PIN_DP
#define OTG2_PIN_DP
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:107
OTG2_PIN_VBUS
#define OTG2_PIN_VBUS
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:113
USB2_ID
#define USB2_ID
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:96
OTG2_PIN_SOF_GPIO_CLOCK
#define OTG2_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:120
OTG2_PIN_SOF_GPIO
#define OTG2_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:119
OTG2_CLOCK
#define OTG2_CLOCK
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:97
OTG2_PIN_DM_SOURCE
#define OTG2_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:111
OTG2_WKUP_HANDLER
#define OTG2_WKUP_HANDLER
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:101
OTG2_WKUP_EXINT_LINE
#define OTG2_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:102
OTG2_PIN_SOF
#define OTG2_PIN_SOF
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:121
OTG2_PIN_MUX
#define OTG2_PIN_MUX
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:124
OTG2_IRQ_HANDLER
#define OTG2_IRQ_HANDLER
this function handles otgfs interrupt.
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:99
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
OTG2_PIN_POWER_SWITCH
#define OTG2_PIN_POWER_SWITCH
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usb_conf.h:129
OTG2_PIN_POWER_SWITCH_GPIO
#define OTG2_PIN_POWER_SWITCH_GPIO
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usb_conf.h:127
otg2_core_struct
otg_core_type otg2_core_struct
Definition: project/at_start_f437/examples/usb_host/two_otg_host_demo/src/main.c:47
OTG2_PIN_POWER_SWITCH_CLOCK
#define OTG2_PIN_POWER_SWITCH_CLOCK
Definition: project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usb_conf.h:128
otg_core_struct
otg_core_type otg_core_struct
Definition: project/at_start_f437/examples/usb_host/two_otg_host_demo/src/main.c:46
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_DOWN
@ GPIO_PULL_DOWN
Definition: at32f435_437_gpio.h:113
GPIO_OUTPUT_OPEN_DRAIN
@ GPIO_OUTPUT_OPEN_DRAIN
Definition: at32f435_437_gpio.h:103
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
usbh_loop_handler
usb_sts_type usbh_loop_handler(usbh_core_type *uhost)
usb host enum loop handler
Definition: usbh_core.c:1142
uhost_hid_class_handler
usbh_class_handler_type uhost_hid_class_handler
Definition: usbh_hid_class.c:52
usbh_irq_handler
void usbh_irq_handler(otg_core_type *hdev)
usb host interrupt handler
Definition: usbh_int.c:47
uhost_msc_class_handler
usbh_class_handler_type uhost_msc_class_handler
Definition: usbh_msc_class.c:55
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbh_hid_class.h
usb host hid class header file
usbh_int.h
usb header file
usbh_msc_class.h
usb host msc class header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • wdt
  • wdt_reset
  • inc
project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • wdt
  • wdt_reset
  • inc
project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • wdt
  • wdt_reset
  • inc
project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • wdt
  • wdt_reset
  • src
Functions
project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • wdt
  • wdt_reset
  • src
project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • wdt
  • wdt_reset
  • src
Functions
project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • wdt
  • wdt_reset
  • src
project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • wdt
  • wdt_reset
  • src
Functions
project/at_start_f437/examples/wdt/wdt_reset/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/wdt/wdt_reset/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • wdt
  • wdt_reset
  • src
project/at_start_f437/examples/wdt/wdt_reset/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43int main(void)
44{
45 system_clock_config();
46
47 at32_board_init();
48
49 if(crm_flag_get(CRM_WDT_RESET_FLAG) != RESET)
50 {
51 /* reset from wdt */
52 crm_flag_clear(CRM_WDT_RESET_FLAG);
53
54 at32_led_on(LED4);
55 }
56 else
57 {
58 /* reset from other mode */
59 at32_led_off(LED4);
60 }
61
62 /* disable register write protection */
63 wdt_register_write_enable(TRUE);
64
65 /* set the wdt divider value */
66 wdt_divider_set(WDT_CLK_DIV_4);
67
68 /* set reload value
69
70 timeout = reload_value * (divider / lick_freq ) (s)
71
72 lick_freq = 40000 Hz
73 divider = 4
74 reload_value = 3000
75
76 timeout = 3000 * (4 / 40000 ) = 0.3s = 300ms
77 */
78 wdt_reload_value_set(3000 - 1);
79
80 /* enable wdt */
81 wdt_enable();
82
83 while(1)
84 {
85 /* reload wdt counter */
86 wdt_counter_reload();
87
88 at32_led_toggle(LED3);
89
90 delay_ms(200);
91
92 if(at32_button_press() == USER_BUTTON)
93 {
94 while(1);
95 }
96 }
97}
98
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED4
@ LED4
Definition: at32f435_437_board.h:67
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_flag_clear
void crm_flag_clear(uint32_t flag)
clear the crm reset flags
Definition: at32f435_437_crm.c:358
CRM_WDT_RESET_FLAG
#define CRM_WDT_RESET_FLAG
Definition: at32f435_437_crm.h:64
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
wdt_register_write_enable
void wdt_register_write_enable(confirm_state new_state)
enable or disable wdt cmd register write
Definition: at32f435_437_wdt.c:97
wdt_enable
void wdt_enable(void)
wdt enable ,the reload value will be sent to the counter
Definition: at32f435_437_wdt.c:49
wdt_counter_reload
void wdt_counter_reload(void)
reload wdt counter
Definition: at32f435_437_wdt.c:59
wdt_reload_value_set
void wdt_reload_value_set(uint16_t reload_value)
set wdt counter reload value
Definition: at32f435_437_wdt.c:69
wdt_divider_set
void wdt_divider_set(wdt_division_type division)
set wdt division divider
Definition: at32f435_437_wdt.c:87
WDT_CLK_DIV_4
@ WDT_CLK_DIV_4
Definition: at32f435_437_wdt.h:70
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • wdt
  • wdt_standby
  • inc
project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • wdt
  • wdt_standby
  • inc
project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • wdt
  • wdt_standby
  • inc
project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • wdt
  • wdt_standby
  • src
Functions
project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • wdt
  • wdt_standby
  • src
project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • wdt
  • wdt_standby
  • src
Functions
project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • wdt
  • wdt_standby
  • src
project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • wdt
  • wdt_standby
  • src
Functions
project/at_start_f437/examples/wdt/wdt_standby/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/wdt/wdt_standby/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • wdt
  • wdt_standby
  • src
project/at_start_f437/examples/wdt/wdt_standby/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43int main(void)
44{
45 system_clock_config();
46
47 at32_board_init();
48
49 /* enable the pwc clock */
50 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
51
52 if(crm_flag_get(CRM_WDT_RESET_FLAG) != RESET)
53 {
54 /* reset from wdt */
55 crm_flag_clear(CRM_WDT_RESET_FLAG);
56
57 at32_led_on(LED4);
58 }
59 else
60 {
61 /* reset from other mode */
62 at32_led_off(LED4);
63 }
64
65 delay_ms(100);
66
67 /* disable register write protection */
68 wdt_register_write_enable(TRUE);
69
70 /* set the wdt divider value */
71 wdt_divider_set(WDT_CLK_DIV_4);
72
73 /* set reload value
74
75 timeout = reload_value * (divider / lick_freq ) (s)
76
77 lick_freq = 40000 Hz
78 divider = 4
79 reload_value = 3000
80
81 timeout = 3000 * (4 / 40000 ) = 0.3s = 300ms
82 */
83 wdt_reload_value_set(3000 - 1);
84
85 /* enable wdt */
86 wdt_enable();
87
88 /* enter standby mode */
89 pwc_standby_mode_enter();
90
91 while(1)
92 {
93
94 }
95}
96
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_flag_clear
void crm_flag_clear(uint32_t flag)
clear the crm reset flags
Definition: at32f435_437_crm.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_WDT_RESET_FLAG
#define CRM_WDT_RESET_FLAG
Definition: at32f435_437_crm.h:64
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
pwc_standby_mode_enter
void pwc_standby_mode_enter(void)
enter pwc standby mode
Definition: at32f435_437_pwc.c:224
wdt_register_write_enable
void wdt_register_write_enable(confirm_state new_state)
enable or disable wdt cmd register write
Definition: at32f435_437_wdt.c:97
wdt_enable
void wdt_enable(void)
wdt enable ,the reload value will be sent to the counter
Definition: at32f435_437_wdt.c:49
wdt_reload_value_set
void wdt_reload_value_set(uint16_t reload_value)
set wdt counter reload value
Definition: at32f435_437_wdt.c:69
wdt_divider_set
void wdt_divider_set(wdt_division_type division)
set wdt division divider
Definition: at32f435_437_wdt.c:87
WDT_CLK_DIV_4
@ WDT_CLK_DIV_4
Definition: at32f435_437_wdt.h:70
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • wwdt
  • wwdt_reset
  • inc
project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • wwdt
  • wwdt_reset
  • inc
project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • wwdt
  • wwdt_reset
  • inc
project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • wwdt
  • wwdt_reset
  • src
Functions
project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • wwdt
  • wwdt_reset
  • src
project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • wwdt
  • wwdt_reset
  • src
Functions
project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • wwdt
  • wwdt_reset
  • src
project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • wwdt
  • wwdt_reset
  • src
Functions
project/at_start_f437/examples/wwdt/wwdt_reset/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/wwdt/wwdt_reset/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • wwdt
  • wwdt_reset
  • src
project/at_start_f437/examples/wwdt/wwdt_reset/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
43int main(void)
44{
45 system_clock_config();
46
47 at32_board_init();
48
49 if(crm_flag_get(CRM_WWDT_RESET_FLAG) != RESET)
50 {
51 /* reset from wwdt */
52 crm_flag_clear(CRM_WWDT_RESET_FLAG);
53
54 at32_led_on(LED4);
55 }
56 else
57 {
58 /* reset from other mode */
59 at32_led_off(LED4);
60 }
61
62 /* enable the wwdt clock */
63 crm_periph_clock_enable(CRM_WWDT_PERIPH_CLOCK, TRUE);
64
65 /* set the wwdt divider value */
66 wwdt_divider_set(WWDT_PCLK1_DIV_32768);
67
68 /* set the wwdt window counter value */
69 wwdt_window_counter_set(0x6F);
70
71 /* enable wwdt
72
73 window_value: (0x7F - 0x6F)
74 timeout_value: (0x7F - 0x40) + 1
75
76 timeout = timeout_value * (divider / pclk1_freq ) (s)
77 window = window_value * (divider / pclk1_freq ) (s)
78
79 pclk1_freq = 120 MHz
80 divider = 32768
81 reload_value = 0x40 = 64
82 window_value = 0x10 = 16
83
84 timeout = 64 * (32768 / 120000000 ) = 0.0174s = 17.4ms
85 window = 16 * (32768 / 120000000 ) = 0.0044s = 4.4ms
86
87 */
88 wwdt_enable(0x7F);
89
90 while(1)
91 {
92 at32_led_toggle(LED3);
93
94 /* the reload time must within the window (6ms > 4.4ms) */
95 delay_ms(6);
96
97 /* update the wwdt window counter */
98 wwdt_counter_set(0x7F);
99
100 if(at32_button_press() == USER_BUTTON)
101 {
102 while(1);
103 }
104 }
105}
106
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED4
@ LED4
Definition: at32f435_437_board.h:67
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_flag_clear
void crm_flag_clear(uint32_t flag)
clear the crm reset flags
Definition: at32f435_437_crm.c:358
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_WWDT_PERIPH_CLOCK
@ CRM_WWDT_PERIPH_CLOCK
Definition: at32f435_437_crm.h:137
CRM_WWDT_RESET_FLAG
#define CRM_WWDT_RESET_FLAG
Definition: at32f435_437_crm.h:65
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
wwdt_counter_set
void wwdt_counter_set(uint8_t wwdt_cnt)
wwdt counter value set
Definition: at32f435_437_wwdt.c:114
wwdt_divider_set
void wwdt_divider_set(wwdt_division_type division)
wwdt division set
Definition: at32f435_437_wwdt.c:64
wwdt_window_counter_set
void wwdt_window_counter_set(uint8_t window_cnt)
wwdt window counter value set
Definition: at32f435_437_wwdt.c:124
wwdt_enable
void wwdt_enable(uint8_t wwdt_cnt)
wwdt enable and the counter value load
Definition: at32f435_437_wwdt.c:84
WWDT_PCLK1_DIV_32768
@ WWDT_PCLK1_DIV_32768
Definition: at32f435_437_wwdt.h:70
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • xmc
  • lcd_8bit
  • inc
project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • xmc
  • lcd_8bit
  • inc
project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • xmc
  • lcd_8bit
  • inc
project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • xmc
  • lcd_8bit
  • src
Functions
project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • xmc
  • lcd_8bit
  • src
project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • xmc
  • lcd_8bit
  • src
Functions
project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • xmc
  • lcd_8bit
  • src
project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • xmc
  • lcd_8bit
  • src
Functions | Variables
project/at_start_f437/examples/xmc/lcd_8bit/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_lcd.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

uint16_t point_color

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/lcd_8bit/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • xmc
  • lcd_8bit
  • src
project/at_start_f437/examples/xmc/lcd_8bit/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_lcd.h"
30
39uint16_t point_color;
40
46int main(void)
47{
48 system_clock_config();
49
50 at32_board_init();
51
52 /* turn led2/led3/led4 on */
53 at32_led_on(LED2);
54 at32_led_on(LED3);
55 at32_led_on(LED4);
56
57 /* configures xmc&lcd */
58 lcd_init();
59
60 /* clear the lcd */
61 point_color = WHITE;
62 lcd_clear(point_color);
63
64 while(1)
65 {
66 /* display number on lcd */
67 lcd_display_number();
68 }
69}
70
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
lcd_init
void lcd_init(void)
configures the lcd. this function must be called before any write/read operation on the lcd.
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:165
WHITE
#define WHITE
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:84
lcd_clear
void lcd_clear(uint16_t color)
this function is clear the lcd.
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:379
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
point_color
uint16_t point_color
Definition: project/at_start_f437/examples/xmc/lcd_8bit/src/main.c:39
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
lcd_display_number
void lcd_display_number(void)
this function is display number on the lcd.
Definition: at_start_f437/examples/xmc/lcd_8bit/src/xmc_lcd.c:347
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • xmc
  • lcd_touch_16bit
  • inc
project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • xmc
  • lcd_touch_16bit
  • inc
project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • xmc
  • lcd_touch_16bit
  • inc
project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • xmc
  • lcd_touch_16bit
  • src
Functions
project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • xmc
  • lcd_touch_16bit
  • src
project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • xmc
  • lcd_touch_16bit
  • src
Functions
project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • xmc
  • lcd_touch_16bit
  • src
project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • xmc
  • lcd_touch_16bit
  • src
Functions | Variables
project/at_start_f437/examples/xmc/lcd_touch_16bit/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_lcd.h"
#include "touch.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

uint16_t point_color

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/lcd_touch_16bit/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • xmc
  • lcd_touch_16bit
  • src
project/at_start_f437/examples/xmc/lcd_touch_16bit/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_lcd.h"
30#include "touch.h"
31
40uint16_t point_color;
41
47int main(void)
48{
49 touch_struct = &touch_dev_struct;
50 lcd_struct = &lcd_dev_struct;
51 system_clock_config();
52 at32_board_init();
53
54 lcd_struct->lcd_init();
55 point_color = GBLUE;
56 lcd_struct->lcd_clear(point_color);
57
58 touch_struct->init();
59
60 while(1)
61 {
62 touch_struct->touch_scan();
63 }
64}
65
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
GBLUE
#define GBLUE
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:89
lcd_dev_struct
lcd_dev_type lcd_dev_struct
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:38
lcd_struct
lcd_dev_type * lcd_struct
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c:48
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
touch_struct
touch_dev_type * touch_struct
Definition: at_start_f435/examples/xmc/lcd_touch_16bit/src/touch.c:51
touch_dev_struct
touch_dev_type touch_dev_struct
Definition: at_start_f435/examples/xmc/lcd_touch_16bit/src/touch.c:38
point_color
uint16_t point_color
Definition: project/at_start_f437/examples/xmc/lcd_touch_16bit/src/main.c:40
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
lcd_dev_type::lcd_clear
void(* lcd_clear)(uint16_t color)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:50
lcd_dev_type::lcd_init
void(* lcd_init)(void)
Definition: at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h:47
touch_dev_type::init
void(* init)(void)
Definition: at_start_f435/examples/xmc/lcd_touch_16bit/inc/touch.h:48
touch_dev_type::touch_scan
void(* touch_scan)(void)
Definition: at_start_f435/examples/xmc/lcd_touch_16bit/inc/touch.h:50
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • xmc
  • nand_flash
  • ecc
  • inc
project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • xmc
  • nand_flash
  • ecc
  • inc
project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • xmc
  • nand_flash
  • ecc
  • inc
project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • xmc
  • nand_flash
  • ecc
  • src
Functions
project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • xmc
  • nand_flash
  • ecc
  • src
project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • xmc
  • nand_flash
  • ecc
  • src
Functions
project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • xmc
  • nand_flash
  • ecc
  • src
project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • xmc
  • nand_flash
  • ecc
  • src
Functions | Variables
project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c File Reference

main program More...

#include "xmc_ecc.h"
#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | fill_buffer (uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer. More...
void | nand_ecc_correction (uint8_t *pbuffer, uint32_t tx_ecc_value,uint32_t rx_ecc_value)
ecc correct 1 bit error More...
int | main (void)
main function. More...

Variables

crm_clocks_freq_type | crm_clocks_freq_struct = {0}
nand_id_type nand_id_struct
nand_address_type write_read_addr_struct
uint8_t | tx_buffer [BUFFER_SIZE]
uint8_t | rx_buffer [BUFFER_SIZE]
uint32_t | page_number = 1
uint32_t | status = 0
uint32_t | j = 0
uint32_t | ecc_value_write = 0
uint32_t | ecc_value_read = 0
uint32_t | ecc_value_write_last = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • xmc
  • nand_flash
  • ecc
  • src
project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c
Go to the documentation of this file.
1
27#include "xmc_ecc.h"
28#include "at32f435_437_board.h"
29#include "at32f435_437_clock.h"
30
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40 nand_id_type nand_id_struct;
41 nand_address_type write_read_addr_struct;
42uint8_t tx_buffer[BUFFER_SIZE], rx_buffer[BUFFER_SIZE];
43uint32_t page_number = 1, status = 0;
44uint32_t j = 0, ecc_value_write = 0, ecc_value_read = 0, ecc_value_write_last = 0;
45
46void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset);
47void nand_ecc_correction(uint8_t *pbuffer, uint32_t tx_ecc_value, uint32_t rx_ecc_value);
48
55void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
56{
57 uint16_t indextmp = 0;
58
59 /* Put in global buffer same values */
60 for(indextmp = 0; indextmp < bufferlenght; indextmp++ )
61 {
62 pbuffer[indextmp] = indextmp + offset;
63 }
64}
65
72void nand_ecc_correction(uint8_t *pbuffer,uint32_t tx_ecc_value ,uint32_t rx_ecc_value)
73{
74 uint32_t ecc_value=0, position=0 ,byte_position=0;
75 uint8_t i,compare_data;
76
77 /* check ecc value */
78 if(tx_ecc_value!=rx_ecc_value)
79 {
80 /* 2048 byte -- 28bit ecc valid value; 8192 byte -- 32bit ecc valid value */
81#ifdef H27U1G8F2CTR
82 ecc_value =(tx_ecc_value^rx_ecc_value) & (uint32_t)0x0FFFFFFF;
83#elif defined K9GAG08U0E
84 ecc_value =(tx_ecc_value^rx_ecc_value) & (uint32_t)0xFFFFFFFF;
85#endif
86 /* 1 bit error correction */
87#ifdef H27U1G8F2CTR
88 for(i=0;i<(28/2);i++)
89#elif defined K9GAG08U0E
90 for(i=0;i<(32/2);i++)
91#endif
92 {
93 compare_data = (ecc_value>>(i*2))&0x3;
94
95 /* find position */
96 if(compare_data == 0x2)
97 {
98 position |= (1<<i);
99 }
100 /* more than 1 bit erroc */
101 else if(compare_data != 0x1)
102 {
103 return;
104 }
105 }
106
107 /* correct receive value */
108 byte_position = (uint32_t)(position/8);
109 pbuffer[byte_position] ^= 1 << (position % 8);
110 }
111}
112
118int main(void)
119{
120 /* configure the system clock */
121 system_clock_config();
122
123 /* led initalization */
124 at32_board_init();
125
126 /* usart1 initalization */
127 uart_print_init(115200);
128
129 /* get system clock */
130 crm_clocks_freq_get(&crm_clocks_freq_struct);
131
132 /* xmc initialization */
133 nand_init();
134
135 /* nand reset command */
136 nand_reset();
137 delay_us(10);
138
139 /* nand read id command */
140 nand_read_id(&nand_id_struct);
141
142 /* verify the nand id */
143 /* nand support:samsung:k9gag08u0e hynix:h27u1g8f2ctr
144 id :0xecd58472 id :0xadf1801d
145 */
146 if((nand_id_struct.maker_id == NAND_AT_MakerID) && (nand_id_struct.device_id == NAND_AT_DeviceID))
147 {
148 /* nand memory address to write to */
149 write_read_addr_struct.zone = 0x00;
150 write_read_addr_struct.block = 0x00;
151 write_read_addr_struct.page = 0x00;
152 write_read_addr_struct.byte = 0x00;
153
154 /* erase the nand first block */
155 status = nand_erase_block(write_read_addr_struct);
156
157 /* write data to xmc nand memory */
158 /* fill the buffer to send */
159 fill_buffer(tx_buffer, BUFFER_SIZE , 0x0);
160
161 /* change the regular to make ecc value isn't 0 */
162 tx_buffer[10]=0x03;
163
164 /* calculate ecc value while transmiting */
165 xmc_nand_ecc_enable(XMC_BANK2_NAND, TRUE);
166 status = nand_write_small_page(tx_buffer, write_read_addr_struct, page_number);
167
168 /* save the right ecc_value (in this case ,we suppose it as the true value) */
169 ecc_value_write_last = ecc_value_write;
170
171 /* change the 85 data like there is a 1 bit error happened */
172 status = nand_erase_block(write_read_addr_struct);
173 tx_buffer[10]=0x23;
174 status = nand_write_small_page(tx_buffer, write_read_addr_struct, page_number);
175
176 /* calculate ecc value while transmiting */
177 xmc_nand_ecc_enable(XMC_BANK2_NAND, TRUE);
178
179 /* read back the written data */
180 status = nand_read_small_page (rx_buffer, write_read_addr_struct, page_number);
181
182 /* ecc check and correct 1 bit error */
183 nand_ecc_correction(rx_buffer ,ecc_value_write_last ,ecc_value_read);
184
185 if(rx_buffer[10]==0x03)
186 {
187 /* pass : printf "ecc is work" */
188 printf("ecc is work\r\n");
189 }
190 else
191 {
192 /* fail: printf "ecc is not work" */
193 printf("ecc is not work\r\n");
194 }
195 }
196
197 /* printf to indicate that whether there is an device error (id not correct) */
198 else
199 {
200 printf("the id is error\r\n");
201 }
202
203 while(1)
204 {
205 }
206}
207
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f435/examples/crc/calculation/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
write_read_addr_struct
nand_address_type write_read_addr_struct
Definition: project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c:41
j
uint32_t j
Definition: project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c:44
nand_ecc_correction
void nand_ecc_correction(uint8_t *pbuffer, uint32_t tx_ecc_value, uint32_t rx_ecc_value)
ecc correct 1 bit error
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:72
rx_buffer
uint8_t rx_buffer[BUFFER_SIZE]
Definition: project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c:42
page_number
uint32_t page_number
Definition: project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c:43
ecc_value_read
uint32_t ecc_value_read
Definition: project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c:44
ecc_value_write_last
uint32_t ecc_value_write_last
Definition: project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c:44
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c:39
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
nand_id_struct
nand_id_type nand_id_struct
Definition: project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c:40
ecc_value_write
uint32_t ecc_value_write
Definition: project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c:44
status
uint32_t status
Definition: project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c:43
tx_buffer
uint8_t tx_buffer[BUFFER_SIZE]
Definition: project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c:42
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
TRUE
@ TRUE
Definition: at32f435_437.h:379
xmc_nand_ecc_enable
void xmc_nand_ecc_enable(xmc_class_bank_type xmc_bank, confirm_state new_state)
enable or disable the xmc nand ecc feature.
Definition: at32f435_437_xmc.c:407
XMC_BANK2_NAND
@ XMC_BANK2_NAND
Definition: at32f435_437_xmc.h:157
nand_read_small_page
uint32_t nand_read_small_page(uint8_t *pbuffer, nand_address_type address_struct, uint32_t num_page_to_read)
this routine is for sequential read from one or several 512 bytes page size.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:228
nand_read_id
void nand_read_id(nand_id_type *nand_id_struct)
reads nand memory's id.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:120
nand_init
void nand_init(void)
configures the xmc and gpios to interface with the nand memory. this function must be called before a...
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:44
nand_reset
uint32_t nand_reset(void)
this routine reset the nand flash.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:426
nand_erase_block
uint32_t nand_erase_block(nand_address_type address_struct)
this routine erase complete block from nand flash
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:403
nand_write_small_page
uint32_t nand_write_small_page(uint8_t *pbuffer, nand_address_type address_struct, uint32_t num_page_to_write)
this routine is for writing one or several 512 bytes page size.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:161
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
nand_address_type
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:63
nand_address_type::byte
uint16_t byte
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:67
nand_address_type::page
uint16_t page
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:66
nand_address_type::block
uint16_t block
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:65
nand_address_type::zone
uint16_t zone
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:64
nand_id_type
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:45
nand_id_type::device_id
uint8_t device_id
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:47
nand_id_type::maker_id
uint8_t maker_id
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:46
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • xmc
  • nand_flash
  • nand
  • inc
project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • xmc
  • nand_flash
  • nand
  • inc
project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • xmc
  • nand_flash
  • nand
  • inc
project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • xmc
  • nand_flash
  • nand
  • src
Functions
project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • xmc
  • nand_flash
  • nand
  • src
project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • xmc
  • nand_flash
  • nand
  • src
Functions
project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • xmc
  • nand_flash
  • nand
  • src
project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
135
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • xmc
  • nand_flash
  • nand
  • src
Functions | Variables
project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c File Reference

main program More...

#include "xmc_nand.h"
#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void | fill_buffer (uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
fill the global buffer More...
int | main (void)
main function. More...

Variables

crm_clocks_freq_type | crm_clocks_freq_struct = {0}
nand_id_type | nand_id_struct = {0}
nand_address_type write_read_addr_struct
uint8_t | txbuffer [BUFFER_SIZE]
uint8_t | rxbuffer [BUFFER_SIZE+NAND_SPARE_AREA_SIZE]
uint32_t | pagenumber = BUFFER_SIZE / NAND_PAGE_SIZE
uint32_t | writereadstatus = 0
uint32_t | status = 0
uint32_t | j = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • xmc
  • nand_flash
  • nand
  • src
project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c
Go to the documentation of this file.
1
27#include "xmc_nand.h"
28#include "at32f435_437_board.h"
29#include "at32f435_437_clock.h"
30
39 crm_clocks_freq_type crm_clocks_freq_struct = {0};
40 nand_id_type nand_id_struct = {0};
41 nand_address_type write_read_addr_struct;
42uint8_t txbuffer[BUFFER_SIZE], rxbuffer[BUFFER_SIZE + NAND_SPARE_AREA_SIZE];
43uint32_t pagenumber = BUFFER_SIZE / NAND_PAGE_SIZE, writereadstatus = 0, status= 0;
44uint32_t j = 0;
45
46void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset);
47
53int main(void)
54{
55 /* configure the system clock */
56 system_clock_config();
57
58 /* led initalization */
59 at32_board_init();
60
61 /* usart1 initalization */
62 uart_print_init(115200);
63
64 /* get system clock */
65 crm_clocks_freq_get(&crm_clocks_freq_struct);
66
67 /* xmc initialization */
68 nand_init();
69
70
71 /* nand reset command */
72 nand_reset();
73 delay_us(10);
74
75 /* nand read id command */
76 nand_read_id(&nand_id_struct);
77
78 /* verify the nand id */
79 /* nand support:samsung:k9gag08u0e hynix:h27u1g8f2ctr
80 id :0xecd58472 id :0xadf1801d
81 */
82 if((nand_id_struct.maker_id == NAND_AT_MakerID) && (nand_id_struct.device_id == NAND_AT_DeviceID))
83 {
84 /* nand memory address to write to */
85 write_read_addr_struct.zone = 0x00;
86 write_read_addr_struct.block = 0x00;
87 write_read_addr_struct.page = 0x00;
88 write_read_addr_struct.byte = 0x00;
89
90 /* erase the nand first block */
91 status = nand_erase_block(write_read_addr_struct);
92
93 /* fill the buffer to send */
94 fill_buffer(txbuffer, BUFFER_SIZE , 0x66);
95
96 /* write data to xmc nand memory */
97 status = nand_write_small_page(txbuffer, write_read_addr_struct, pagenumber);
98
99 /* read back the written data */
100 status = nand_read_small_page (rxbuffer, write_read_addr_struct, pagenumber);
101
102 /* verify the written data */
103 for(j = 0; j < BUFFER_SIZE; j++)
104 {
105 if(txbuffer[j] != rxbuffer[j])
106 {
107 writereadstatus++;
108 }
109 }
110
111 if(writereadstatus == 0)
112 {
113 /* pass : printf "data is right" */
114 printf("data is right\r\n");
115 }
116 else
117 {
118 /* fail: printf "data is error" */
119 printf("data is error\r\n");
120 }
121 }
122
123 /* printf to indicate that whether there is an device error (id not correct) */
124 else
125 {
126 printf("the id is error\r\n");
127 }
128
129 while(1)
130 {
131 }
132}
133
140void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
141{
142 uint16_t indextmp = 0;
143
144 /* put in global buffer same values */
145 for(indextmp = 0; indextmp < bufferlenght; indextmp++ )
146 {
147 pbuffer[indextmp] = indextmp + offset;
148 }
149}
150
151
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
BUFFER_SIZE
#define BUFFER_SIZE
Definition: project/at_start_f435/examples/crc/calculation/src/main.c:38
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
write_read_addr_struct
nand_address_type write_read_addr_struct
Definition: project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c:41
txbuffer
uint8_t txbuffer[BUFFER_SIZE]
Definition: project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c:42
j
uint32_t j
Definition: project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c:44
rxbuffer
uint8_t rxbuffer[BUFFER_SIZE+NAND_SPARE_AREA_SIZE]
Definition: project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c:42
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c:39
nand_id_struct
nand_id_type nand_id_struct
Definition: project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c:40
writereadstatus
uint32_t writereadstatus
Definition: project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c:43
pagenumber
uint32_t pagenumber
Definition: project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c:43
status
uint32_t status
Definition: project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c:43
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
nand_read_small_page
uint32_t nand_read_small_page(uint8_t *pbuffer, nand_address_type address_struct, uint32_t num_page_to_read)
this routine is for sequential read from one or several 512 bytes page size.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:228
nand_read_id
void nand_read_id(nand_id_type *nand_id_struct)
reads nand memory's id.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:120
nand_init
void nand_init(void)
configures the xmc and gpios to interface with the nand memory. this function must be called before a...
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:44
nand_reset
uint32_t nand_reset(void)
this routine reset the nand flash.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:426
nand_erase_block
uint32_t nand_erase_block(nand_address_type address_struct)
this routine erase complete block from nand flash
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:403
nand_write_small_page
uint32_t nand_write_small_page(uint8_t *pbuffer, nand_address_type address_struct, uint32_t num_page_to_write)
this routine is for writing one or several 512 bytes page size.
Definition: at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c:161
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
nand_address_type
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:63
nand_address_type::byte
uint16_t byte
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:67
nand_address_type::page
uint16_t page
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:66
nand_address_type::block
uint16_t block
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:65
nand_address_type::zone
uint16_t zone
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:64
nand_id_type
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:45
nand_id_type::device_id
uint8_t device_id
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:47
nand_id_type::maker_id
uint8_t maker_id
Definition: at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h:46
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • xmc
  • nor_flash
  • inc
project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • xmc
  • nor_flash
  • inc
project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • xmc
  • nor_flash
  • inc
project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • xmc
  • nor_flash
  • src
Functions
project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • xmc
  • nor_flash
  • src
project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • xmc
  • nor_flash
  • src
Functions
project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • xmc
  • nor_flash
  • src
project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • xmc
  • nor_flash
  • src
Macros | Functions | Variables
project/at_start_f437/examples/xmc/nor_flash/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_nor.h"

Go to the source code of this file.

Macros

#define | buffer_size 0x400
#define | write_read_addr 0x8000

Functions

int main (void)
main function. More...

Variables

uint16_t | txbuffer [0x400]
uint16_t | rxbuffer [0x400]
uint32_t | writereadstatus = 0
uint32_t | number = 0
nor_idtype nor_id

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/nor_flash/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • xmc
  • nor_flash
  • src
project/at_start_f437/examples/xmc/nor_flash/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_nor.h"
30
39#define buffer_size 0x400
40#define write_read_addr 0x8000
41
42uint16_t txbuffer[buffer_size];
43uint16_t rxbuffer[buffer_size];
44uint32_t writereadstatus = 0, number = 0;
45 nor_idtype nor_id;
46
52int main(void)
53{
54 system_clock_config();
55
56 at32_board_init();
57
58 uart_print_init(115200);
59
60 /* nor flash interface confoig */
61 nor_init();
62
63 /* read nor memory id */
64 nor_readid(&nor_id);
65
66 nor_returntoreadmode();
67
68 /* erase the nor memory block to write on */
69 nor_eraseblock(write_read_addr);
70
71 /* write data to xmc nor memory */
72 /* fill the buffer to send */
73 fill_buffer(txbuffer, buffer_size, 0x3210);
74 nor_writebuffer(txbuffer, write_read_addr, buffer_size);
75
76 /* read data from xmc nor memory */
77 nor_readbuffer(rxbuffer, write_read_addr, buffer_size);
78
79 /* read back sram memory and check content correctness */
80 for(number = 0x00; (number < buffer_size) && (writereadstatus == 0); number++)
81 {
82 if (rxbuffer[number] != txbuffer[number])
83 {
84 writereadstatus = number + 1;
85 }
86 }
87
88 if(writereadstatus == 0)
89 {
90 /* pass : printf "data is right" */
91 printf("data is right\r\n");
92 }
93 else
94 {
95 /* fail: printf "data is error" */
96 printf("data is error\r\n");
97 }
98 while(1)
99 {
100 }
101}
102
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
rxbuffer
uint16_t rxbuffer[0x400]
Definition: project/at_start_f437/examples/xmc/nor_flash/src/main.c:43
nor_eraseblock
nor_status nor_eraseblock(uint32_t blockaddr)
erases the specified nor memory block.
Definition: at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c:266
nor_writebuffer
nor_status nor_writebuffer(uint16_t *pbuffer, uint32_t writeaddr, uint32_t numhalfwordtowrite)
writes a half-word buffer to the xmc nor memory.
Definition: at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c:322
nor_readid
void nor_readid(nor_idtype *nor_id)
reads nor memory's manufacturer and device code.
Definition: at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c:248
nor_id
nor_idtype nor_id
Definition: project/at_start_f437/examples/xmc/nor_flash/src/main.c:45
nor_init
void nor_init(void)
init nor flash interface
Definition: at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c:51
write_read_addr
#define write_read_addr
Definition: project/at_start_f437/examples/xmc/nor_flash/src/main.c:40
buffer_size
#define buffer_size
Definition: project/at_start_f437/examples/xmc/nor_flash/src/main.c:39
writereadstatus
uint32_t writereadstatus
Definition: project/at_start_f437/examples/xmc/nor_flash/src/main.c:44
nor_returntoreadmode
nor_status nor_returntoreadmode(void)
returns the nor memory to read mode.
Definition: at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c:425
number
uint32_t number
Definition: project/at_start_f437/examples/xmc/nor_flash/src/main.c:44
nor_readbuffer
void nor_readbuffer(uint16_t *pbuffer, uint32_t readaddr, uint32_t numhalfwordtoread)
reads a block of data from the xmc nor memory.
Definition: at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c:406
txbuffer
uint16_t txbuffer[0x400]
Definition: project/at_start_f437/examples/xmc/nor_flash/src/main.c:42
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
nor_idtype
Definition: at_start_f435/examples/xmc/nor_flash/inc/xmc_nor.h:33
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • xmc
  • psram
  • inc
project/at_start_f437/examples/xmc/psram/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • xmc
  • psram
  • inc
project/at_start_f437/examples/xmc/psram/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • xmc
  • psram
  • inc
project/at_start_f437/examples/xmc/psram/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • xmc
  • psram
  • src
Functions
project/at_start_f437/examples/xmc/psram/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/psram/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • xmc
  • psram
  • src
project/at_start_f437/examples/xmc/psram/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/xmc/psram/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • xmc
  • psram
  • src
Functions
project/at_start_f437/examples/xmc/psram/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/psram/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • xmc
  • psram
  • src
project/at_start_f437/examples/xmc/psram/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • xmc
  • psram
  • src
Macros | Functions | Variables
project/at_start_f437/examples/xmc/psram/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_psram.h"

Go to the source code of this file.

Macros

#define | buffer_size (uint16_t)0x400
#define | write_read_addr (uint32_t)0x8000

Functions

int main (void)
main function. More...

Variables

uint16_t | txbuffer [(uint16_t) 0x400]
uint16_t | rxbuffer [(uint16_t) 0x400]
uint32_t | writereadstatus = 0
uint32_t | number = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/psram/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • xmc
  • psram
  • src
project/at_start_f437/examples/xmc/psram/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_psram.h"
30
39#define buffer_size (uint16_t)0x400
40#define write_read_addr (uint32_t)0x8000
41
42uint16_t txbuffer[buffer_size];
43uint16_t rxbuffer[buffer_size];
44uint32_t writereadstatus = 0, number = 0;
45
46
52int main(void)
53{
54 system_clock_config();
55
56 at32_board_init();
57
58 uart_print_init(115200);
59
60 /* psram interface config */
61 psram_init();
62
63 /* write data to xmc psram memory */
64 /* fill the buffer to send */
65 fill_buffer(txbuffer, buffer_size, 0x3212);
66 psram_writebuffer(txbuffer, write_read_addr, buffer_size);
67
68 /* read data from xmc psram memory */
69 psram_readbuffer(rxbuffer, write_read_addr, buffer_size);
70
71 /* read back psram memory and check content correctness */
72 for(number = 0x00; (number < buffer_size) && (writereadstatus == 0); number++)
73 {
74 if (rxbuffer[number] != txbuffer[number])
75 {
76 writereadstatus = number + 1;
77 }
78 }
79
80 if(writereadstatus == 0)
81 {
82 /* pass : printf "data is right" */
83 printf("data is right\r\n");
84 }
85 else
86 {
87 /* fail: printf "data is error" */
88 printf("data is error\r\n");
89 }
90 while(1)
91 {
92 }
93}
94
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
psram_init
void psram_init(void)
init psram interface
Definition: at_start_f437/examples/xmc/psram/src/xmc_psram.c:44
rxbuffer
uint16_t rxbuffer[(uint16_t) 0x400]
Definition: project/at_start_f437/examples/xmc/psram/src/main.c:43
psram_readbuffer
void psram_readbuffer(uint16_t *pbuffer, uint32_t readaddr, uint32_t numhalfwordtoread)
reads a block of data from the xmc psram memory.
Definition: at_start_f437/examples/xmc/psram/src/xmc_psram.c:235
psram_writebuffer
void psram_writebuffer(uint16_t *pbuffer, uint32_t writeaddr, uint32_t numhalfwordtowrite)
writes a half-word buffer to the xmc psram memory.
Definition: at_start_f437/examples/xmc/psram/src/xmc_psram.c:215
write_read_addr
#define write_read_addr
Definition: project/at_start_f437/examples/xmc/psram/src/main.c:40
txbuffer
uint16_t txbuffer[(uint16_t) 0x400]
Definition: project/at_start_f437/examples/xmc/psram/src/main.c:42
buffer_size
#define buffer_size
Definition: project/at_start_f437/examples/xmc/psram/src/main.c:39
writereadstatus
uint32_t writereadstatus
Definition: project/at_start_f437/examples/xmc/psram/src/main.c:44
number
uint32_t number
Definition: project/at_start_f437/examples/xmc/psram/src/main.c:44
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • xmc
  • sdram_basic
  • inc
project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • xmc
  • sdram_basic
  • inc
project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • xmc
  • sdram_basic
  • inc
project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • xmc
  • sdram_basic
  • src
Functions
project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • xmc
  • sdram_basic
  • src
project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • xmc
  • sdram_basic
  • src
Functions
project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • xmc
  • sdram_basic
  • src
project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • xmc
  • sdram_basic
  • src
Macros | Functions | Variables
project/at_start_f437/examples/xmc/sdram_basic/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_sdram.h"

Go to the source code of this file.

Macros

#define | buffer_size 0x400
#define | write_read_addr 0x8000

Functions

int main (void)
main function. More...

Variables

uint16_t | txbuffer [0x400]
uint16_t | rxbuffer [0x400]
uint32_t | writereadstatus = 0
uint32_t | number = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/sdram_basic/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • xmc
  • sdram_basic
  • src
project/at_start_f437/examples/xmc/sdram_basic/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_sdram.h"
30
39#define buffer_size 0x400
40#define write_read_addr 0x8000
41
42uint16_t txbuffer[buffer_size];
43uint16_t rxbuffer[buffer_size];
44uint32_t writereadstatus = 0, number = 0;
45
46
52int main(void)
53{
54 system_clock_config();
55
56 at32_board_init();
57
58 /* sdram interface config */
59 sdram_init();
60
61 /* write data to xmc sdram memory */
62 /* fill the buffer to send */
63 fill_buffer(txbuffer, buffer_size, 0x3212);
64 sdram_writebuffer(txbuffer, write_read_addr, buffer_size);
65
66 /* read data from xmc sdram memory */
67 sdram_readbuffer(rxbuffer, write_read_addr, buffer_size);
68
69 /* read back sdram memory and check content correctness */
70 for(number = 0x00; (number < buffer_size) && (writereadstatus == 0); number++)
71 {
72 if(rxbuffer[number] != txbuffer[number])
73 {
74 writereadstatus = number + 1;
75 }
76 }
77
78 if(writereadstatus == 0)
79 {
80 /* pass :turn led2/led3/led4 on */
81 at32_led_on(LED2);
82 at32_led_on(LED3);
83 at32_led_on(LED4);
84 }
85 else
86 {
87 /* fail: turn led2/led3/led4 off */
88 at32_led_off(LED2);
89 at32_led_off(LED3);
90 at32_led_off(LED4);
91 }
92 while(1)
93 {
94 }
95}
96
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
rxbuffer
uint16_t rxbuffer[0x400]
Definition: project/at_start_f437/examples/xmc/sdram_basic/src/main.c:43
sdram_writebuffer
void sdram_writebuffer(uint16_t *pbuffer, uint32_t writeaddr, uint32_t numhalfwordtowrite)
writes a half-word buffer to the sdram memory.
Definition: at_start_f437/examples/xmc/sdram_basic/src/xmc_sdram.c:248
sdram_init
void sdram_init(void)
init sdram interface
Definition: at_start_f437/examples/xmc/sdram_basic/src/xmc_sdram.c:46
write_read_addr
#define write_read_addr
Definition: project/at_start_f437/examples/xmc/sdram_basic/src/main.c:40
sdram_readbuffer
void sdram_readbuffer(uint16_t *pbuffer, uint32_t readaddr, uint32_t numhalfwordtoread)
reads a block of data from the sdram.
Definition: at_start_f437/examples/xmc/sdram_basic/src/xmc_sdram.c:268
buffer_size
#define buffer_size
Definition: project/at_start_f437/examples/xmc/sdram_basic/src/main.c:39
writereadstatus
uint32_t writereadstatus
Definition: project/at_start_f437/examples/xmc/sdram_basic/src/main.c:44
number
uint32_t number
Definition: project/at_start_f437/examples/xmc/sdram_basic/src/main.c:44
txbuffer
uint16_t txbuffer[0x400]
Definition: project/at_start_f437/examples/xmc/sdram_basic/src/main.c:42
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • xmc
  • sdram_dma
  • inc
project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • xmc
  • sdram_dma
  • inc
project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • xmc
  • sdram_dma
  • inc
project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • xmc
  • sdram_dma
  • src
Functions
project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • xmc
  • sdram_dma
  • src
project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • xmc
  • sdram_dma
  • src
Functions
project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • xmc
  • sdram_dma
  • src
project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • xmc
  • sdram_dma
  • src
Macros | Functions | Variables
project/at_start_f437/examples/xmc/sdram_dma/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_sdram.h"

Go to the source code of this file.

Macros

#define | buffer_size 0x400
#define | write_read_addr 0x0000

Functions

int main (void)
main function. More...

Variables

uint16_t | txbuffer [0x400]
uint16_t | rxbuffer [0x400]
uint32_t | writereadstatus = 0
uint32_t | number = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/sdram_dma/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • xmc
  • sdram_dma
  • src
project/at_start_f437/examples/xmc/sdram_dma/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_sdram.h"
30
39#define buffer_size 0x400
40#define write_read_addr 0x0000
41
42uint16_t txbuffer[buffer_size];
43uint16_t rxbuffer[buffer_size];
44uint32_t writereadstatus = 0, number = 0;
45
46
52int main(void)
53{
54 system_clock_config();
55
56 at32_board_init();
57
58 /* sdram interface config */
59 sdram_init();
60
61 /* write data to xmc sdram memory */
62 /* fill the buffer to send */
63 fill_buffer(txbuffer, buffer_size, 0x2512);
64
65 sram_copy_to_sdram_dma(txbuffer, buffer_size);
66
67 sdram_copy_to_sram_dma(rxbuffer, buffer_size);
68
69 /* read back sdram memory and check content correctness */
70 for(number = 0x00; (number < buffer_size) && (writereadstatus == 0); number++)
71 {
72 if(rxbuffer[number] != txbuffer[number])
73 {
74 writereadstatus = number + 1;
75 }
76 }
77
78 if(writereadstatus == 0)
79 {
80 /* pass :turn led2/led3/led4 on */
81 at32_led_on(LED2);
82 at32_led_on(LED3);
83 at32_led_on(LED4);
84 }
85 else
86 {
87 /* fail: turn led2/led3/led4 off */
88 at32_led_off(LED2);
89 at32_led_off(LED3);
90 at32_led_off(LED4);
91 }
92 while(1)
93 {
94 }
95}
96
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
sdram_init
void sdram_init(void)
init sdram interface
Definition: at_start_f437/examples/xmc/sdram_basic/src/xmc_sdram.c:46
rxbuffer
uint16_t rxbuffer[0x400]
Definition: project/at_start_f437/examples/xmc/sdram_dma/src/main.c:43
sram_copy_to_sdram_dma
void sram_copy_to_sdram_dma(uint16_t *buffer, uint32_t length)
copy sram data copy to sdram
Definition: at_start_f437/examples/xmc/sdram_dma/src/xmc_sdram.c:336
sdram_copy_to_sram_dma
void sdram_copy_to_sram_dma(uint16_t *buffer, uint32_t length)
copy sdram data to sram
Definition: at_start_f437/examples/xmc/sdram_dma/src/xmc_sdram.c:305
buffer_size
#define buffer_size
Definition: project/at_start_f437/examples/xmc/sdram_dma/src/main.c:39
writereadstatus
uint32_t writereadstatus
Definition: project/at_start_f437/examples/xmc/sdram_dma/src/main.c:44
number
uint32_t number
Definition: project/at_start_f437/examples/xmc/sdram_dma/src/main.c:44
txbuffer
uint16_t txbuffer[0x400]
Definition: project/at_start_f437/examples/xmc/sdram_dma/src/main.c:42
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • xmc
  • sram
  • inc
project/at_start_f437/examples/xmc/sram/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • xmc
  • sram
  • inc
project/at_start_f437/examples/xmc/sram/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • xmc
  • sram
  • inc
project/at_start_f437/examples/xmc/sram/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • xmc
  • sram
  • src
Functions
project/at_start_f437/examples/xmc/sram/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/sram/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • xmc
  • sram
  • src
project/at_start_f437/examples/xmc/sram/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource
71 common frequency config list: pll source selected hick or hext(8mhz)
72 _______________________________________________________________________________________
73 | | | | | | | | | |
74 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
75 |________|_________|_________|_________|_________|_________|_________|_________________|
76 | | | | | | | | | |
77 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
78 | | | | | | | | | |
79 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
80 | | | | | | | | | |
81 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
82 |________|_________|_________|_________|_________|_________|_________|________|________|
83
84 if pll clock source selects hext with other frequency values, or configure pll to other
85 frequency values, please use the at32 new clock configuration tool for configuration. */
86 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
87
88 /* enable pll */
89 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
90
91 /* wait till pll is ready */
92 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
93 {
94 }
95
96 /* config ahbclk */
97 crm_ahb_div_set(CRM_AHB_DIV_1);
98
99 /* config apb2clk */
100 crm_apb2_div_set(CRM_APB2_DIV_2);
101
102 /* config apb1clk */
103 crm_apb1_div_set(CRM_APB1_DIV_2);
104
105 /* enable auto step mode */
106 crm_auto_step_mode_enable(TRUE);
107
108 /* select pll as system clock source */
109 crm_sysclk_switch(CRM_SCLK_PLL);
110
111 /* wait till pll is used as system clock source */
112 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
113 {
114 }
115
116 /* disable auto step mode */
117 crm_auto_step_mode_enable(FALSE);
118
119 /* update system_core_clock global variable */
120 system_core_clock_update();
121}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f437/examples/xmc/sram/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • xmc
  • sram
  • src
Functions
project/at_start_f437/examples/xmc/sram/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/sram/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • xmc
  • sram
  • src
project/at_start_f437/examples/xmc/sram/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while (1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while (1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while (1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while (1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • xmc
  • sram
  • src
Macros | Functions | Variables
project/at_start_f437/examples/xmc/sram/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "xmc_sram.h"

Go to the source code of this file.

Macros

#define | buffer_size (uint16_t)0x400
#define | write_read_addr (uint32_t)0x8000

Functions

int main (void)
main function. More...

Variables

uint16_t | txbuffer [(uint16_t) 0x400]
uint16_t | rxbuffer [(uint16_t) 0x400]
uint32_t | writereadstatus = 0
uint32_t | number = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/examples/xmc/sram/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • xmc
  • sram
  • src
project/at_start_f437/examples/xmc/sram/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "xmc_sram.h"
30
39#define buffer_size (uint16_t)0x400
40#define write_read_addr (uint32_t)0x8000
41
42uint16_t txbuffer[buffer_size];
43uint16_t rxbuffer[buffer_size];
44uint32_t writereadstatus = 0, number = 0;
45
51int main(void)
52{
53 system_clock_config();
54
55 at32_board_init();
56
57 uart_print_init(115200);
58
59 /* sram interface config */
60 sram_init();
61
62 /* write data to xmc sram memory */
63 /* fill the buffer to send */
64 fill_buffer(txbuffer, buffer_size, 0x3212);
65 sram_writebuffer(txbuffer, write_read_addr, buffer_size);
66
67 /* read data from xmc sram memory */
68 sram_readbuffer(rxbuffer, write_read_addr, buffer_size);
69
70 /* read back sram memory and check content correctness */
71 for(number = 0x00; (number < buffer_size) && (writereadstatus == 0); number++)
72 {
73 if(rxbuffer[number] != txbuffer[number])
74 {
75 writereadstatus = number + 1;
76 }
77 }
78
79 if(writereadstatus == 0)
80 {
81 /* pass : printf "data is right" */
82 printf("data is right\r\n");
83 }
84 else
85 {
86 /* fail: printf "data is error" */
87 printf("data is error\r\n");
88 }
89 while(1)
90 {
91 }
92}
93
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
fill_buffer
void fill_buffer(uint8_t *pbuffer, uint16_t bufferlenght, uint32_t offset)
Fill the global buffer.
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:55
rxbuffer
uint16_t rxbuffer[(uint16_t) 0x400]
Definition: project/at_start_f437/examples/xmc/sram/src/main.c:43
write_read_addr
#define write_read_addr
Definition: project/at_start_f437/examples/xmc/sram/src/main.c:40
sram_init
void sram_init(void)
init sram interface
Definition: at_start_f437/examples/xmc/sram/src/xmc_sram.c:44
txbuffer
uint16_t txbuffer[(uint16_t) 0x400]
Definition: project/at_start_f437/examples/xmc/sram/src/main.c:42
buffer_size
#define buffer_size
Definition: project/at_start_f437/examples/xmc/sram/src/main.c:39
sram_readbuffer
void sram_readbuffer(uint16_t *pbuffer, uint32_t readaddr, uint32_t numhalfwordtoread)
reads a block of data from the xmc sram memory.
Definition: at_start_f437/examples/xmc/sram/src/xmc_sram.c:249
writereadstatus
uint32_t writereadstatus
Definition: project/at_start_f437/examples/xmc/sram/src/main.c:44
number
uint32_t number
Definition: project/at_start_f437/examples/xmc/sram/src/main.c:44
sram_writebuffer
void sram_writebuffer(uint16_t *pbuffer, uint32_t writeaddr, uint32_t numhalfwordtowrite)
writes a half-word buffer to the xmc sram memory.
Definition: at_start_f437/examples/xmc/sram/src/xmc_sram.c:229
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • templates
  • inc
project/at_start_f437/templates/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • templates
  • inc
project/at_start_f437/templates/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
52#if !defined HEXT_VALUE
53#define HEXT_VALUE ((uint32_t)8000000)
54#endif
55
60#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
61#define HICK_VALUE ((uint32_t)8000000)
63/* module define -------------------------------------------------------------*/
64#define CRM_MODULE_ENABLED
65#define TMR_MODULE_ENABLED
66#define ERTC_MODULE_ENABLED
67#define GPIO_MODULE_ENABLED
68#define I2C_MODULE_ENABLED
69#define USART_MODULE_ENABLED
70#define PWC_MODULE_ENABLED
71#define CAN_MODULE_ENABLED
72#define ADC_MODULE_ENABLED
73#define DAC_MODULE_ENABLED
74#define SPI_MODULE_ENABLED
75#define EDMA_MODULE_ENABLED
76#define DMA_MODULE_ENABLED
77#define DEBUG_MODULE_ENABLED
78#define FLASH_MODULE_ENABLED
79#define CRC_MODULE_ENABLED
80#define WWDT_MODULE_ENABLED
81#define WDT_MODULE_ENABLED
82#define EXINT_MODULE_ENABLED
83#define SDIO_MODULE_ENABLED
84#define XMC_MODULE_ENABLED
85#define USB_MODULE_ENABLED
86#define ACC_MODULE_ENABLED
87#define MISC_MODULE_ENABLED
88#define QSPI_MODULE_ENABLED
89#define DVP_MODULE_ENABLED
90#define SCFG_MODULE_ENABLED
91#define EMAC_MODULE_ENABLED
92
93/* includes ------------------------------------------------------------------*/
94#ifdef CRM_MODULE_ENABLED
95#include "at32f435_437_crm.h"
96#endif
97#ifdef TMR_MODULE_ENABLED
98#include "at32f435_437_tmr.h"
99#endif
100#ifdef ERTC_MODULE_ENABLED
101#include "at32f435_437_ertc.h"
102#endif
103#ifdef GPIO_MODULE_ENABLED
104#include "at32f435_437_gpio.h"
105#endif
106#ifdef I2C_MODULE_ENABLED
107#include "at32f435_437_i2c.h"
108#endif
109#ifdef USART_MODULE_ENABLED
110#include "at32f435_437_usart.h"
111#endif
112#ifdef PWC_MODULE_ENABLED
113#include "at32f435_437_pwc.h"
114#endif
115#ifdef CAN_MODULE_ENABLED
116#include "at32f435_437_can.h"
117#endif
118#ifdef ADC_MODULE_ENABLED
119#include "at32f435_437_adc.h"
120#endif
121#ifdef DAC_MODULE_ENABLED
122#include "at32f435_437_dac.h"
123#endif
124#ifdef SPI_MODULE_ENABLED
125#include "at32f435_437_spi.h"
126#endif
127#ifdef DMA_MODULE_ENABLED
128#include "at32f435_437_dma.h"
129#endif
130#ifdef DEBUG_MODULE_ENABLED
131#include "at32f435_437_debug.h"
132#endif
133#ifdef FLASH_MODULE_ENABLED
134#include "at32f435_437_flash.h"
135#endif
136#ifdef CRC_MODULE_ENABLED
137#include "at32f435_437_crc.h"
138#endif
139#ifdef WWDT_MODULE_ENABLED
140#include "at32f435_437_wwdt.h"
141#endif
142#ifdef WDT_MODULE_ENABLED
143#include "at32f435_437_wdt.h"
144#endif
145#ifdef EXINT_MODULE_ENABLED
146#include "at32f435_437_exint.h"
147#endif
148#ifdef SDIO_MODULE_ENABLED
149#include "at32f435_437_sdio.h"
150#endif
151#ifdef XMC_MODULE_ENABLED
152#include "at32f435_437_xmc.h"
153#endif
154#ifdef ACC_MODULE_ENABLED
155#include "at32f435_437_acc.h"
156#endif
157#ifdef MISC_MODULE_ENABLED
158#include "at32f435_437_misc.h"
159#endif
160#ifdef EDMA_MODULE_ENABLED
161#include "at32f435_437_edma.h"
162#endif
163#ifdef QSPI_MODULE_ENABLED
164#include "at32f435_437_qspi.h"
165#endif
166#ifdef SCFG_MODULE_ENABLED
167#include "at32f435_437_scfg.h"
168#endif
169#ifdef EMAC_MODULE_ENABLED
170#include "at32f435_437_emac.h"
171#endif
172#ifdef DVP_MODULE_ENABLED
173#include "at32f435_437_dvp.h"
174#endif
175#ifdef USB_MODULE_ENABLED
176#include "at32f435_437_usb.h"
177#endif
178
187#ifdef __cplusplus
188}
189#endif
190
191#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • templates
  • inc
project/at_start_f437/templates/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • templates
  • src
Functions
project/at_start_f437/templates/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/templates/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • templates
  • src
project/at_start_f437/templates/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
57void system_clock_config(void)
58{
59 /* enable pwc periph clock */
60 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
61
62 /* config ldo voltage */
63 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
64
65 /* set the flash clock divider */
66 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
67
68 /* reset crm */
69 crm_reset();
70
71 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
72
73 /* wait till hext is ready */
74 while(crm_hext_stable_wait() == ERROR)
75 {
76 }
77
78 /* config pll clock resource
79 common frequency config list: pll source selected hick or hext(8mhz)
80 _______________________________________________________________________________________
81 | | | | | | | | | |
82 |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 |
83 |________|_________|_________|_________|_________|_________|_________|_________________|
84 | | | | | | | | | |
85 |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 |
86 | | | | | | | | | |
87 |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
88 | | | | | | | | | |
89 |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16|
90 |________|_________|_________|_________|_________|_________|_________|________|________|
91
92 if pll clock source selects hext with other frequency values, or configure pll to other
93 frequency values, please use the at32 new clock configuration tool for configuration. */
94 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
95
96 /* enable pll */
97 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
98
99 /* wait till pll is ready */
100 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
101 {
102 }
103
104 /* config ahbclk */
105 crm_ahb_div_set(CRM_AHB_DIV_1);
106
107 /* config apb2clk */
108 crm_apb2_div_set(CRM_APB2_DIV_2);
109
110 /* config apb1clk */
111 crm_apb1_div_set(CRM_APB1_DIV_2);
112
113 /* enable auto step mode */
114 crm_auto_step_mode_enable(TRUE);
115
116 /* select pll as system clock source */
117 crm_sysclk_switch(CRM_SCLK_PLL);
118
119 /* wait till pll is used as system clock source */
120 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
121 {
122 }
123
124 /* disable auto step mode */
125 crm_auto_step_mode_enable(FALSE);
126
127 /* update system_core_clock global variable */
128 system_core_clock_update();
129}
130
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • templates
  • src
Functions
project/at_start_f437/templates/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/templates/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • templates
  • src
project/at_start_f437/templates/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • templates
  • src
Macros | Functions | Variables
project/at_start_f437/templates/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"

Go to the source code of this file.

Macros

#define | DELAY 100
#define | FAST 1
#define | SLOW 4

Functions

void | button_exint_init (void)
configure button exint More...
void | button_isr (void)
button handler function More...
void | EXINT0_IRQHandler (void)
exint0 interrupt handler More...
int | main (void)
main function. More...

Variables

uint8_t g_speed = 1

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file project/at_start_f437/templates/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • templates
  • src
project/at_start_f437/templates/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29
38#define DELAY 100
39#define FAST 1
40#define SLOW 4
41
42uint8_t g_speed = FAST;
43
44void button_exint_init(void);
45void button_isr(void);
46
52void button_exint_init(void)
53{
54 exint_init_type exint_init_struct;
55
56 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
57 scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0);
58
59 exint_default_para_init(&exint_init_struct);
60 exint_init_struct.line_enable = TRUE;
61 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
62 exint_init_struct.line_select = EXINT_LINE_0;
63 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
64 exint_init(&exint_init_struct);
65
66 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
67 nvic_irq_enable(EXINT0_IRQn, 0, 0);
68}
69
75void button_isr(void)
76{
77 /* delay 5ms */
78 delay_ms(5);
79
80 /* clear interrupt pending bit */
81 exint_flag_clear(EXINT_LINE_0);
82
83 /* check input pin state */
84 if(SET == gpio_input_data_bit_read(USER_BUTTON_PORT, USER_BUTTON_PIN))
85 {
86 if(g_speed == SLOW)
87 g_speed = FAST;
88 else
89 g_speed = SLOW;
90 }
91}
92
98void EXINT0_IRQHandler(void)
99{
100 button_isr();
101}
102
108int main(void)
109{
110 system_clock_config();
111
112 at32_board_init();
113
114 button_exint_init();
115
116 while(1)
117 {
118 at32_led_toggle(LED2);
119 delay_ms(g_speed * DELAY);
120 at32_led_toggle(LED3);
121 delay_ms(g_speed * DELAY);
122 at32_led_toggle(LED4);
123 delay_ms(g_speed * DELAY);
124 }
125}
126
at32f435_437_board.h
main
int main(void)
main function.
Definition: project/at_start_f435/examples/acc/calibration/src/main.c:167
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
EXINT0_IRQHandler
void EXINT0_IRQHandler(void)
exint0 interrupt handler
Definition: project/at_start_f435/examples/exint/exint_config/src/main.c:70
SLOW
#define SLOW
Definition: project/at_start_f437/templates/src/main.c:40
DELAY
#define DELAY
Definition: project/at_start_f437/templates/src/main.c:38
FAST
#define FAST
Definition: project/at_start_f437/templates/src/main.c:39
g_speed
uint8_t g_speed
Definition: project/at_start_f437/templates/src/main.c:42
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
button_exint_init
void button_exint_init(void)
configure button exint
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:61
button_isr
void button_isr(void)
button handler function
Definition: project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c:84
USER_BUTTON_PORT
#define USER_BUTTON_PORT
Definition: at32f435_437_board.h:103
USER_BUTTON_PIN
#define USER_BUTTON_PIN
Definition: at32f435_437_board.h:102
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
EXINT_LINE_0
#define EXINT_LINE_0
Definition: at32f435_437_exint.h:52
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_input_data_bit_read
flag_status gpio_input_data_bit_read(gpio_type *gpio_x, uint16_t pins)
read the specified input port pin.
Definition: at32f435_437_gpio.c:170
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_exint_line_config
void scfg_exint_line_config(scfg_port_source_type port_source, scfg_pins_source_type pin_source)
select the gpio pin used as exint line.
Definition: at32f435_437_scfg.c:152
SCFG_PINS_SOURCE0
@ SCFG_PINS_SOURCE0
Definition: at32f435_437_scfg.h:101
SCFG_PORT_SOURCE_GPIOA
@ SCFG_PORT_SOURCE_GPIOA
Definition: at32f435_437_scfg.h:124
EXINT0_IRQn
@ EXINT0_IRQn
Definition: at32f435_437.h:152
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: fir_filter.h File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • inc
Functions
project_l0/inc/fir_filter.h File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_fir_init_f32 (arm_fir_instance_f32 *S, uint16_t numTaps, const float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR filter. More...
void | arm_fir_f32 (const arm_fir_instance_f32 *S, const float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | FIR_lowpass_filter (float32_t *pSrc, float32_t *pDst, uint32_t testlengthsamples)

Function Documentation

◆ arm_fir_f32()

void arm_fir_f32 | ( | const arm_fir_instance_f32 * | S,
 |  | const float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Referenced by FIR_lowpass_filter().

◆ arm_fir_init_f32()

void arm_fir_init_f32 | ( | arm_fir_instance_f32 * | S,
 |  | uint16_t | numTaps,
 |  | const float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the floating-point FIR filter.

File : Step1-ST_Customer_level_n/Inc/fir_filter.h Version: V1.3.0 Date : 2021-03-18 Brief : This file contains the headers of FIR filter IP-Code.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. may be used to endorse or promote products derived from this software without specific prior written permission.

AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Parameters
[in,out] | S | points to an instance of the floating-point FIR filter structure
[in] | numTaps | number of filter coefficients in the filter
[in] | pCoeffs | points to the filter coefficients buffer
[in] | pState | points to the state buffer
[in] | blockSize | number of samples processed per call
Returns
none
Details
pCoeffs points to the array of filter coefficients stored in time reversed order:
    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().
Initialization of Helium version
For Helium version the array of coefficients must be a multiple of 16 even if less then 16 coefficients are used. The additional coefficients must be set to 0. It does not mean that all the coefficients will be used in the filter (numTaps is still set to its right value in the init function.) It just means that the implementation may require to read more coefficients due to the vectorization and to avoid having to manage too many different cases in the code.

Definition at line 59 of file arm_fir_init_f32.c.

Referenced by FIR_lowpass_filter().

◆ FIR_lowpass_filter()

void FIR_lowpass_filter | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | testlengthsamples
 | ) |  |

Definition at line 76 of file fir_filter.c.

Referenced by main().


AT32F435/437 Firmwary Library: fir_filter.h Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • inc
project_l0/inc/fir_filter.h
Go to the documentation of this file.
1
30/* Define to prevent recursive inclusion -------------------------------------*/
31#ifndef __FIR_FILTER_H
32#define __FIR_FILTER_H
33
34
35
36/* Includes ------------------------------------------------------------------*/
37#include "arm_math.h"
38
39/* Exported types ------------------------------------------------------------*/
40/* Exported constants --------------------------------------------------------*/
41/* Exported macro ------------------------------------------------------------*/
42/* Exported functions ------------------------------------------------------- */
43void arm_fir_init_f32(
44 arm_fir_instance_f32 * S,
45 uint16_t numTaps,
46 const float32_t * pCoeffs,
47 float32_t * pState,
48 uint32_t blockSize);
49
50void arm_fir_f32(
51const arm_fir_instance_f32 * S,
52const float32_t * pSrc,
53float32_t * pDst,
54uint32_t blockSize);
55
56void FIR_lowpass_filter(float32_t * pSrc, float32_t * pDst, uint32_t testlengthsamples);
57
58#endif /* __FIR_FILTER_H */
59
arm_fir_f32
void arm_fir_f32(const arm_fir_instance_f32 *S, const float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
arm_fir_init_f32
void arm_fir_init_f32(arm_fir_instance_f32 *S, uint16_t numTaps, const float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR filter.
Definition: arm_fir_init_f32.c:59
FIR_lowpass_filter
void FIR_lowpass_filter(float32_t *pSrc, float32_t *pDst, uint32_t testlengthsamples)
Definition: fir_filter.c:76


AT32F435/437 Firmwary Library: math_helper.h File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • inc
Functions
project_l0/inc/math_helper.h File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

float | arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
Caluclation of SNR. More...
void | arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed in q12.20 format. More...
void | arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer. More...
void | arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer. More...
void | arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
Converts float to fixed q14. More...
void | arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format. More...
void | arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q28 format. More...
void | arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format. More...
void | arm_clip_f32 (float *pIn, uint32_t numSamples)
Clip the float values to +/- 1. More...
uint32_t | arm_calc_guard_bits (uint32_t num_adds)
Caluclates number of guard bits. More...
void | arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
Apply guard bits to buffer. More...
uint32_t | arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output. More...
uint32_t | arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output. More...
uint32_t | arm_calc_2pow (uint32_t guard_bits)
Calculates pow(2, numShifts) More...

Function Documentation

◆ arm_apply_guard_bits()

void arm_apply_guard_bits | ( | float32_t * | pIn,
 |  | uint32_t | numSamples,
 |  | uint32_t | guard_bits
 | ) |  |

Apply guard bits to buffer.

Parameters
[in,out] | pIn | pointer to input buffer
[in] | numSamples | number of samples in the input buffer
[in] | guard_bits | guard bits
Returns
none

Definition at line 293 of file project_l0/src/math_helper.c.

◆ arm_calc_2pow()

uint32_t arm_calc_2pow ( uint32_t numShifts )

Calculates pow(2, numShifts)

Parameters
[in] numShifts number of shifts
Returns
pow(2, numShifts)

Definition at line 310 of file project_l0/src/math_helper.c.

◆ arm_calc_guard_bits()

uint32_t arm_calc_guard_bits ( uint32_t num_adds )

Caluclates number of guard bits.

Parameters
[in] num_adds number of additions
Returns
guard bits The function Caluclates the number of guard bits depending on the numtaps

Definition at line 267 of file project_l0/src/math_helper.c.

◆ arm_clip_f32()

void arm_clip_f32 | ( | float * | pIn,
 |  | uint32_t | numSamples
 | ) |  |

Clip the float values to +/- 1.

Parameters
[in,out] | pIn | input buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 445 of file project_l0/src/math_helper.c.

◆ arm_compare_fixed_q15()

uint32_t arm_compare_fixed_q15 | ( | q15_t * | pIn,
 |  | q15_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Compare MATLAB Reference Output and ARM Test output.

Parameters
[in] | pIn | Pointer to Ref buffer
[in] | pOut | Pointer to Test buffer
[in] | numSamples | number of samples in the buffer
Returns
maximum difference

Definition at line 165 of file project_l0/src/math_helper.c.

◆ arm_compare_fixed_q31()

uint32_t arm_compare_fixed_q31 | ( | q31_t * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Compare MATLAB Reference Output and ARM Test output.

Parameters
[in] | pIn | Pointer to Ref buffer
[in] | pOut | Pointer to Test buffer
[in] | numSamples | number of samples in the buffer
Returns
maximum difference

Definition at line 193 of file project_l0/src/math_helper.c.

◆ arm_float_to_q12_20()

void arm_float_to_q12_20 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed in q12.20 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to outputbuffer
[in] | numSamples | number of samples in the input buffer
Returns
none The function converts floating point values to fixed point(q12.20) values

Definition at line 139 of file project_l0/src/math_helper.c.

◆ arm_float_to_q14()

void arm_float_to_q14 | ( | float * | pIn,
 |  | q15_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q14.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 334 of file project_l0/src/math_helper.c.

◆ arm_float_to_q28()

void arm_float_to_q28 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q28 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 419 of file project_l0/src/math_helper.c.

◆ arm_float_to_q29()

void arm_float_to_q29 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q30 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 391 of file project_l0/src/math_helper.c.

◆ arm_float_to_q30()

void arm_float_to_q30 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q30 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 364 of file project_l0/src/math_helper.c.

◆ arm_provide_guard_bits_q15()

void arm_provide_guard_bits_q15 | ( | q15_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters
[in,out] | input_buf | Pointer to input buffer
[in] | blockSize | block Size
[in] | guard_bits | guard bits
Returns
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 119 of file project_l0/src/math_helper.c.

◆ arm_provide_guard_bits_q31()

void arm_provide_guard_bits_q31 | ( | q31_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters
[in,out] | input_buf | Pointer to input buffer
[in] | blockSize | block Size
[in] | guard_bits | guard bits
Returns
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 223 of file project_l0/src/math_helper.c.

◆ arm_snr_f32()

float arm_snr_f32 | ( | float * | pRef,
 |  | float * | pTest,
 |  | uint32_t | buffSize
 | ) |  |

Caluclation of SNR.

Parameters
[in] | pRef | Pointer to the reference buffer
[in] | pTest | Pointer to the test buffer
[in] | buffSize | total number of samples
Returns
SNR The function Caluclates signal to noise ratio for the reference output and test output

Definition at line 61 of file project_l0/src/math_helper.c.

Referenced by main().


AT32F435/437 Firmwary Library: math_helper.h Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • inc
project_l0/inc/math_helper.h
Go to the documentation of this file.
1/* ----------------------------------------------------------------------
2* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3*
4* $Date: 17. January 2013
5* $Revision: V1.4.0
6*
7* Project: CMSIS DSP Library
8*
9* Title: math_helper.h
10*
11* Description: Prototypes of all helper functions required.
12*
13* Target Processor: Cortex-M4/Cortex-M3
14*
15* Redistribution and use in source and binary forms, with or without
16* modification, are permitted provided that the following conditions
17* are met:
18* - Redistributions of source code must retain the above copyright
19* notice, this list of conditions and the following disclaimer.
20* - Redistributions in binary form must reproduce the above copyright
21* notice, this list of conditions and the following disclaimer in
22* the documentation and/or other materials provided with the
23* distribution.
24* - Neither the name of ARM LIMITED nor the names of its contributors
25* may be used to endorse or promote products derived from this
26* software without specific prior written permission.
27*
28* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39* POSSIBILITY OF SUCH DAMAGE.
40* -------------------------------------------------------------------- */
41
42
43#include "arm_math.h"
44
45#ifndef MATH_HELPER_H
46#define MATH_HELPER_H
47
48float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
49void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
50void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
51void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
52void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
53void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
54void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
55void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
56void arm_clip_f32(float *pIn, uint32_t numSamples);
57uint32_t arm_calc_guard_bits(uint32_t num_adds);
58void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
59uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
60uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
61uint32_t arm_calc_2pow(uint32_t guard_bits);
62#endif
63
arm_float_to_q29
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format.
Definition: project_l0/src/math_helper.c:391
arm_apply_guard_bits
void arm_apply_guard_bits(float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
Apply guard bits to buffer.
Definition: project_l0/src/math_helper.c:293
arm_float_to_q30
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format.
Definition: project_l0/src/math_helper.c:364
arm_float_to_q14
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples)
Converts float to fixed q14.
Definition: project_l0/src/math_helper.c:334
arm_float_to_q12_20
void arm_float_to_q12_20(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed in q12.20 format.
Definition: project_l0/src/math_helper.c:139
arm_compare_fixed_q31
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output.
Definition: project_l0/src/math_helper.c:193
arm_calc_guard_bits
uint32_t arm_calc_guard_bits(uint32_t num_adds)
Caluclates number of guard bits.
Definition: project_l0/src/math_helper.c:267
arm_compare_fixed_q15
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output.
Definition: project_l0/src/math_helper.c:165
arm_calc_2pow
uint32_t arm_calc_2pow(uint32_t guard_bits)
Calculates pow(2, numShifts)
Definition: project_l0/src/math_helper.c:310
arm_float_to_q28
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q28 format.
Definition: project_l0/src/math_helper.c:419
arm_clip_f32
void arm_clip_f32(float *pIn, uint32_t numSamples)
Clip the float values to +/- 1.
Definition: project_l0/src/math_helper.c:445
arm_provide_guard_bits_q15
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
Definition: project_l0/src/math_helper.c:119
arm_provide_guard_bits_q31
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
Definition: project_l0/src/math_helper.c:223
arm_snr_f32
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
Caluclation of SNR.
Definition: project_l0/src/math_helper.c:61


AT32F435/437 Firmwary Library: arm_fir_data.c File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • src
Variables
project_l0/src/arm_fir_data.c File Reference
#include "at32f435_437.h"
#include "arm_math.h"

Go to the source code of this file.

Variables

float32_t | testInput_f32_1kHz_15kHz [320]
float32_t | refOutput [320]

Variable Documentation

◆ refOutput

float32_t refOutput[320]

Definition at line 96 of file project_l0/src/arm_fir_data.c.

◆ testInput_f32_1kHz_15kHz

float32_t testInput_f32_1kHz_15kHz[320]

Definition at line 48 of file project_l0/src/arm_fir_data.c.


AT32F435/437 Firmwary Library: arm_fir_data.c Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • src
project_l0/src/arm_fir_data.c
Go to the documentation of this file.
1/* ----------------------------------------------------------------------
2* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
3*
4* $Date: 17. January 2013
5* $Revision: V1.4.0
6*
7* Project: CMSIS DSP Library
8* Title: arm_fir_data.c
9*
10* Description: Data file used for example code
11*
12* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13*
14* Redistribution and use in source and binary forms, with or without
15* modification, are permitted provided that the following conditions
16* are met:
17* - Redistributions of source code must retain the above copyright
18* notice, this list of conditions and the following disclaimer.
19* - Redistributions in binary form must reproduce the above copyright
20* notice, this list of conditions and the following disclaimer in
21* the documentation and/or other materials provided with the
22* distribution.
23* - Neither the name of ARM LIMITED nor the names of its contributors
24* may be used to endorse or promote products derived from this
25* software without specific prior written permission.
26*
27* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38* POSSIBILITY OF SUCH DAMAGE.
39* -------------------------------------------------------------------- */
40
41#include "at32f435_437.h"
42#include "arm_math.h"
43
44/* ----------------------------------------------------------------------
45** Test input signal contains 1000Hz + 15000 Hz
46** ------------------------------------------------------------------- */
47
48float32_t testInput_f32_1kHz_15kHz[320] =
49{
50+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
51+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
52+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
53-0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
54-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
55-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
56+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
57+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
58+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
59+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
60-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
61-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
62+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
63+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
64+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
65+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
66-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
67-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
68-0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
69+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
70+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
71-0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
72-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
73-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
74+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
75+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
76+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
77+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
78-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
79-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
80-0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
81+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
82+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
83+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
84-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
85-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
86-0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
87+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
88+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
89+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
90};
91
92/* ----------------------------------------------------------------------
93** Reference output signal computed with MATLAB
94** ------------------------------------------------------------------- */
95
96float32_t refOutput[320] =
97{
98+0.0000000000f, -0.0010797829f, -0.0007681386f, -0.0001982932f, +0.0000644313f, +0.0020854271f, +0.0036891871f, +0.0015855941f,
99-0.0026280805f, -0.0075907658f, -0.0119390538f, -0.0086665968f, +0.0088981202f, +0.0430539279f, +0.0974468742f, +0.1740405600f,
100+0.2681416601f, +0.3747720089f, +0.4893362230f, +0.6024154672f, +0.7058740791f, +0.7968348987f, +0.8715901940f, +0.9277881093f,
101+0.9682182661f, +0.9934674267f, +1.0012052245f, +0.9925859371f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
102+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f,
103-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
104-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
105-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
106+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
107+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
108+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f,
109-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
110-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
111-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
112+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
113+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
114+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f,
115-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
116-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
117-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
118+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
119+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
120+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f,
121-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
122-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
123-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
124+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
125+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
126+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f,
127-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
128-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
129-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, -0.0000000000f, +0.1309866321f,
130+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
131+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
132+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f,
133-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
134-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
135-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
136+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
137+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f
138};
139
at32f435_437.h
at32f435_437 header file
testInput_f32_1kHz_15kHz
float32_t testInput_f32_1kHz_15kHz[320]
Definition: project_l0/src/arm_fir_data.c:48
refOutput
float32_t refOutput[320]
Definition: project_l0/src/arm_fir_data.c:96


AT32F435/437 Firmwary Library: math_helper.c File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • src
Functions
project_l0/src/math_helper.c File Reference
#include <math.h>
#include "math_helper.h"

Go to the source code of this file.

Functions

float | arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
Caluclation of SNR. More...
void | arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer. More...
void | arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed in q12.20 format. More...
uint32_t | arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output. More...
uint32_t | arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output. More...
void | arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer. More...
void | arm_provide_guard_bits_q7 (q7_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer. More...
uint32_t | arm_calc_guard_bits (uint32_t num_adds)
Caluclates number of guard bits. More...
void | arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
Apply guard bits to buffer. More...
uint32_t | arm_calc_2pow (uint32_t numShifts)
Calculates pow(2, numShifts) More...
void | arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
Converts float to fixed q14. More...
void | arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format. More...
void | arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format. More...
void | arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q28 format. More...
void | arm_clip_f32 (float *pIn, uint32_t numSamples)
Clip the float values to +/- 1. More...

Function Documentation

◆ arm_apply_guard_bits()

void arm_apply_guard_bits | ( | float32_t * | pIn,
 |  | uint32_t | numSamples,
 |  | uint32_t | guard_bits
 | ) |  |

Apply guard bits to buffer.

Parameters
[in,out] | pIn | pointer to input buffer
[in] | numSamples | number of samples in the input buffer
[in] | guard_bits | guard bits
Returns
none

Definition at line 293 of file project_l0/src/math_helper.c.

◆ arm_calc_2pow()

uint32_t arm_calc_2pow ( uint32_t numShifts )

Calculates pow(2, numShifts)

Parameters
[in] numShifts number of shifts
Returns
pow(2, numShifts)

Definition at line 310 of file project_l0/src/math_helper.c.

Referenced by arm_apply_guard_bits().

◆ arm_calc_guard_bits()

uint32_t arm_calc_guard_bits ( uint32_t num_adds )

Caluclates number of guard bits.

Parameters
[in] num_adds number of additions
Returns
guard bits The function Caluclates the number of guard bits depending on the numtaps

Definition at line 267 of file project_l0/src/math_helper.c.

◆ arm_clip_f32()

void arm_clip_f32 | ( | float * | pIn,
 |  | uint32_t | numSamples
 | ) |  |

Clip the float values to +/- 1.

Parameters
[in,out] | pIn | input buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 445 of file project_l0/src/math_helper.c.

◆ arm_compare_fixed_q15()

uint32_t arm_compare_fixed_q15 | ( | q15_t * | pIn,
 |  | q15_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Compare MATLAB Reference Output and ARM Test output.

Parameters
[in] | pIn | Pointer to Ref buffer
[in] | pOut | Pointer to Test buffer
[in] | numSamples | number of samples in the buffer
Returns
maximum difference

Definition at line 165 of file project_l0/src/math_helper.c.

◆ arm_compare_fixed_q31()

uint32_t arm_compare_fixed_q31 | ( | q31_t * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Compare MATLAB Reference Output and ARM Test output.

Parameters
[in] | pIn | Pointer to Ref buffer
[in] | pOut | Pointer to Test buffer
[in] | numSamples | number of samples in the buffer
Returns
maximum difference

Definition at line 193 of file project_l0/src/math_helper.c.

◆ arm_float_to_q12_20()

void arm_float_to_q12_20 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed in q12.20 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to outputbuffer
[in] | numSamples | number of samples in the input buffer
Returns
none The function converts floating point values to fixed point(q12.20) values

Definition at line 139 of file project_l0/src/math_helper.c.

◆ arm_float_to_q14()

void arm_float_to_q14 | ( | float * | pIn,
 |  | q15_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q14.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 334 of file project_l0/src/math_helper.c.

◆ arm_float_to_q28()

void arm_float_to_q28 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q28 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 419 of file project_l0/src/math_helper.c.

◆ arm_float_to_q29()

void arm_float_to_q29 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q30 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 391 of file project_l0/src/math_helper.c.

◆ arm_float_to_q30()

void arm_float_to_q30 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q30 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 364 of file project_l0/src/math_helper.c.

◆ arm_provide_guard_bits_q15()

void arm_provide_guard_bits_q15 | ( | q15_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters
[in,out] | input_buf | Pointer to input buffer
[in] | blockSize | block Size
[in] | guard_bits | guard bits
Returns
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 119 of file project_l0/src/math_helper.c.

◆ arm_provide_guard_bits_q31()

void arm_provide_guard_bits_q31 | ( | q31_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters
[in,out] | input_buf | Pointer to input buffer
[in] | blockSize | block Size
[in] | guard_bits | guard bits
Returns
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 223 of file project_l0/src/math_helper.c.

◆ arm_provide_guard_bits_q7()

void arm_provide_guard_bits_q7 | ( | q7_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters
[in,out] | input_buf | Pointer to input buffer
[in] | blockSize | block Size
[in] | guard_bits | guard bits
Returns
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 245 of file project_l0/src/math_helper.c.

◆ arm_snr_f32()

float arm_snr_f32 | ( | float * | pRef,
 |  | float * | pTest,
 |  | uint32_t | buffSize
 | ) |  |

Caluclation of SNR.

Parameters
[in] | pRef | Pointer to the reference buffer
[in] | pTest | Pointer to the test buffer
[in] | buffSize | total number of samples
Returns
SNR The function Caluclates signal to noise ratio for the reference output and test output

Definition at line 61 of file project_l0/src/math_helper.c.


AT32F435/437 Firmwary Library: math_helper.c Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • src
project_l0/src/math_helper.c
Go to the documentation of this file.
1/* ----------------------------------------------------------------------
2* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
3*
4* $Date: 17. January 2013
5* $Revision: V1.4.0 b
6*
7* Project: CMSIS DSP Library
8*
9* Title: math_helper.c
10*
11* Description: Definition of all helper functions required.
12*
13* Target Processor: Cortex-M4/Cortex-M3
14*
15* Redistribution and use in source and binary forms, with or without
16* modification, are permitted provided that the following conditions
17* are met:
18* - Redistributions of source code must retain the above copyright
19* notice, this list of conditions and the following disclaimer.
20* - Redistributions in binary form must reproduce the above copyright
21* notice, this list of conditions and the following disclaimer in
22* the documentation and/or other materials provided with the
23* distribution.
24* - Neither the name of ARM LIMITED nor the names of its contributors
25* may be used to endorse or promote products derived from this
26* software without specific prior written permission.
27*
28* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39* POSSIBILITY OF SUCH DAMAGE.
40* -------------------------------------------------------------------- */
41/* ----------------------------------------------------------------------
42* Include standard header files
43* -------------------------------------------------------------------- */
44#include<math.h>
45
46/* ----------------------------------------------------------------------
47* Include project header files
48* -------------------------------------------------------------------- */
49#include "math_helper.h"
50
61float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
62{
63 float EnergySignal = 0.0, EnergyError = 0.0;
64 uint32_t i;
65 float SNR;
66 int temp;
67 int *test;
68
69 for (i = 0; i < buffSize; i++)
70 {
71 /* Checking for a NAN value in pRef array */
72 test = (int *)(&pRef[i]);
73 temp = *test;
74
75 if (temp == 0x7FC00000)
76 {
77 return(0);
78 }
79
80 /* Checking for a NAN value in pTest array */
81 test = (int *)(&pTest[i]);
82 temp = *test;
83
84 if (temp == 0x7FC00000)
85 {
86 return(0);
87 }
88 EnergySignal += pRef[i] * pRef[i];
89 EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
90 }
91
92 /* Checking for a NAN value in EnergyError */
93 test = (int *)(&EnergyError);
94 temp = *test;
95
96 if (temp == 0x7FC00000)
97 {
98 return(0);
99 }
100
101
102 SNR = 10 * log10 (EnergySignal / EnergyError);
103
104 return (SNR);
105
106}
107
108
119void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
120 uint32_t guard_bits)
121{
122 uint32_t i;
123
124 for (i = 0; i < blockSize; i++)
125 {
126 input_buf[i] = input_buf[i] >> guard_bits;
127 }
128}
129
139void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
140{
141 uint32_t i;
142
143 for (i = 0; i < numSamples; i++)
144 {
145 /* 1048576.0f corresponds to pow(2, 20) */
146 pOut[i] = (q31_t) (pIn[i] * 1048576.0f);
147
148 pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
149
150 if (pIn[i] == (float) 1.0)
151 {
152 pOut[i] = 0x000FFFFF;
153 }
154 }
155}
156
165uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
166{
167 uint32_t i;
168 int32_t diff, diffCrnt = 0;
169 uint32_t maxDiff = 0;
170
171 for (i = 0; i < numSamples; i++)
172 {
173 diff = pIn[i] - pOut[i];
174 diffCrnt = (diff > 0) ? diff : -diff;
175
176 if (diffCrnt > maxDiff)
177 {
178 maxDiff = diffCrnt;
179 }
180 }
181
182 return(maxDiff);
183}
184
193uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
194{
195 uint32_t i;
196 int32_t diff, diffCrnt = 0;
197 uint32_t maxDiff = 0;
198
199 for (i = 0; i < numSamples; i++)
200 {
201 diff = pIn[i] - pOut[i];
202 diffCrnt = (diff > 0) ? diff : -diff;
203
204 if (diffCrnt > maxDiff)
205 {
206 maxDiff = diffCrnt;
207 }
208 }
209
210 return(maxDiff);
211}
212
223void arm_provide_guard_bits_q31 (q31_t * input_buf,
224 uint32_t blockSize,
225 uint32_t guard_bits)
226{
227 uint32_t i;
228
229 for (i = 0; i < blockSize; i++)
230 {
231 input_buf[i] = input_buf[i] >> guard_bits;
232 }
233}
234
245void arm_provide_guard_bits_q7 (q7_t * input_buf,
246 uint32_t blockSize,
247 uint32_t guard_bits)
248{
249 uint32_t i;
250
251 for (i = 0; i < blockSize; i++)
252 {
253 input_buf[i] = input_buf[i] >> guard_bits;
254 }
255}
256
257
258
267uint32_t arm_calc_guard_bits (uint32_t num_adds)
268{
269 uint32_t i = 1, j = 0;
270
271 if (num_adds == 1)
272 {
273 return (0);
274 }
275
276 while (i < num_adds)
277 {
278 i = i * 2;
279 j++;
280 }
281
282 return (j);
283}
284
293void arm_apply_guard_bits (float32_t *pIn,
294 uint32_t numSamples,
295 uint32_t guard_bits)
296{
297 uint32_t i;
298
299 for (i = 0; i < numSamples; i++)
300 {
301 pIn[i] = pIn[i] * arm_calc_2pow(guard_bits);
302 }
303}
304
310uint32_t arm_calc_2pow(uint32_t numShifts)
311{
312
313 uint32_t i, val = 1;
314
315 for (i = 0; i < numShifts; i++)
316 {
317 val = val * 2;
318 }
319
320 return(val);
321}
322
323
324
334void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
335{
336 uint32_t i;
337
338 for (i = 0; i < numSamples; i++)
339 {
340 /* 16384.0f corresponds to pow(2, 14) */
341 pOut[i] = (q15_t) (pIn[i] * 16384.0f);
342
343 pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
344
345 if (pIn[i] == (float) 2.0)
346 {
347 pOut[i] = 0x7FFF;
348 }
349
350 }
351
352}
353
354
364void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples)
365{
366 uint32_t i;
367
368 for (i = 0; i < numSamples; i++)
369 {
370 /* 1073741824.0f corresponds to pow(2, 30) */
371 pOut[i] = (q31_t) (pIn[i] * 1073741824.0f);
372
373 pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
374
375 if (pIn[i] == (float) 2.0)
376 {
377 pOut[i] = 0x7FFFFFFF;
378 }
379 }
380}
381
391void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
392{
393 uint32_t i;
394
395 for (i = 0; i < numSamples; i++)
396 {
397 /* 1073741824.0f corresponds to pow(2, 30) */
398 pOut[i] = (q31_t) (pIn[i] * 536870912.0f);
399
400 pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
401
402 if (pIn[i] == (float) 4.0)
403 {
404 pOut[i] = 0x7FFFFFFF;
405 }
406 }
407}
408
409
419void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
420{
421 uint32_t i;
422
423 for (i = 0; i < numSamples; i++)
424 {
425 /* 268435456.0f corresponds to pow(2, 28) */
426 pOut[i] = (q31_t) (pIn[i] * 268435456.0f);
427
428 pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
429
430 if (pIn[i] == (float) 8.0)
431 {
432 pOut[i] = 0x7FFFFFFF;
433 }
434 }
435}
436
445void arm_clip_f32 (float *pIn, uint32_t numSamples)
446{
447 uint32_t i;
448
449 for (i = 0; i < numSamples; i++)
450 {
451 if (pIn[i] > 1.0f)
452 {
453 pIn[i] = 1.0;
454 }
455 else if ( pIn[i] < -1.0f)
456 {
457 pIn[i] = -1.0;
458 }
459
460 }
461}
462
463
464
465
j
uint32_t j
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:44
arm_float_to_q29
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format.
Definition: project_l0/src/math_helper.c:391
arm_apply_guard_bits
void arm_apply_guard_bits(float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
Apply guard bits to buffer.
Definition: project_l0/src/math_helper.c:293
arm_float_to_q30
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format.
Definition: project_l0/src/math_helper.c:364
arm_float_to_q14
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples)
Converts float to fixed q14.
Definition: project_l0/src/math_helper.c:334
arm_float_to_q12_20
void arm_float_to_q12_20(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed in q12.20 format.
Definition: project_l0/src/math_helper.c:139
arm_compare_fixed_q31
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output.
Definition: project_l0/src/math_helper.c:193
arm_provide_guard_bits_q7
void arm_provide_guard_bits_q7(q7_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
Definition: project_l0/src/math_helper.c:245
arm_calc_guard_bits
uint32_t arm_calc_guard_bits(uint32_t num_adds)
Caluclates number of guard bits.
Definition: project_l0/src/math_helper.c:267
arm_compare_fixed_q15
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output.
Definition: project_l0/src/math_helper.c:165
arm_float_to_q28
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q28 format.
Definition: project_l0/src/math_helper.c:419
arm_clip_f32
void arm_clip_f32(float *pIn, uint32_t numSamples)
Clip the float values to +/- 1.
Definition: project_l0/src/math_helper.c:445
arm_provide_guard_bits_q15
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
Definition: project_l0/src/math_helper.c:119
arm_calc_2pow
uint32_t arm_calc_2pow(uint32_t numShifts)
Calculates pow(2, numShifts)
Definition: project_l0/src/math_helper.c:310
arm_provide_guard_bits_q31
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
Definition: project_l0/src/math_helper.c:223
arm_snr_f32
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
Caluclation of SNR.
Definition: project_l0/src/math_helper.c:61


AT32F435/437 Firmwary Library: fir_filter.h File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • inc
Functions
project_l1/inc/fir_filter.h File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_fir_init_f32 (arm_fir_instance_f32 *S, uint16_t numTaps, const float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR filter. More...
void | arm_fir_f32 (const arm_fir_instance_f32 *S, const float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | FIR_lowpass_filter (float32_t *pSrc, float32_t *pDst, uint32_t testlengthsamples)

Function Documentation

◆ arm_fir_f32()

void arm_fir_f32 | ( | const arm_fir_instance_f32 * | S,
 |  | const float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

◆ arm_fir_init_f32()

void arm_fir_init_f32 | ( | arm_fir_instance_f32 * | S,
 |  | uint16_t | numTaps,
 |  | const float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the floating-point FIR filter.

File : Step1-ST_Customer_level_n/Inc/fir_filter.h Version: V1.3.0 Date : 2021-03-18 Brief : This file contains the headers of FIR filter IP-Code.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. may be used to endorse or promote products derived from this software without specific prior written permission.

AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Parameters
[in,out] | S | points to an instance of the floating-point FIR filter structure
[in] | numTaps | number of filter coefficients in the filter
[in] | pCoeffs | points to the filter coefficients buffer
[in] | pState | points to the state buffer
[in] | blockSize | number of samples processed per call
Returns
none
Details
pCoeffs points to the array of filter coefficients stored in time reversed order:
    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().
Initialization of Helium version
For Helium version the array of coefficients must be a multiple of 16 even if less then 16 coefficients are used. The additional coefficients must be set to 0. It does not mean that all the coefficients will be used in the filter (numTaps is still set to its right value in the init function.) It just means that the implementation may require to read more coefficients due to the vectorization and to avoid having to manage too many different cases in the code.

Definition at line 59 of file arm_fir_init_f32.c.

◆ FIR_lowpass_filter()

void FIR_lowpass_filter | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | testlengthsamples
 | ) |  |

Definition at line 76 of file fir_filter.c.


AT32F435/437 Firmwary Library: fir_filter.h Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • inc
project_l1/inc/fir_filter.h
Go to the documentation of this file.
1
30/* Define to prevent recursive inclusion -------------------------------------*/
31#ifndef __FIR_FILTER_H
32#define __FIR_FILTER_H
33
34
35
36/* Includes ------------------------------------------------------------------*/
37#include "arm_math.h"
38
39/* Exported types ------------------------------------------------------------*/
40/* Exported constants --------------------------------------------------------*/
41/* Exported macro ------------------------------------------------------------*/
42/* Exported functions ------------------------------------------------------- */
43void arm_fir_init_f32(
44 arm_fir_instance_f32 * S,
45 uint16_t numTaps,
46 const float32_t * pCoeffs,
47 float32_t * pState,
48 uint32_t blockSize);
49
50void arm_fir_f32(
51const arm_fir_instance_f32 * S,
52const float32_t * pSrc,
53float32_t * pDst,
54uint32_t blockSize);
55
56void FIR_lowpass_filter(float32_t * pSrc, float32_t * pDst, uint32_t testlengthsamples);
57
58#endif /* __FIR_FILTER_H */
59
arm_fir_f32
void arm_fir_f32(const arm_fir_instance_f32 *S, const float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
arm_fir_init_f32
void arm_fir_init_f32(arm_fir_instance_f32 *S, uint16_t numTaps, const float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR filter.
Definition: arm_fir_init_f32.c:59
FIR_lowpass_filter
void FIR_lowpass_filter(float32_t *pSrc, float32_t *pDst, uint32_t testlengthsamples)
Definition: fir_filter.c:76


AT32F435/437 Firmwary Library: math_helper.h File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • inc
Functions
project_l1/inc/math_helper.h File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

float | arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
Caluclation of SNR. More...
void | arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed in q12.20 format. More...
void | arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer. More...
void | arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer. More...
void | arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
Converts float to fixed q14. More...
void | arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format. More...
void | arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q28 format. More...
void | arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format. More...
void | arm_clip_f32 (float *pIn, uint32_t numSamples)
Clip the float values to +/- 1. More...
uint32_t | arm_calc_guard_bits (uint32_t num_adds)
Caluclates number of guard bits. More...
void | arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
Apply guard bits to buffer. More...
uint32_t | arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output. More...
uint32_t | arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output. More...
uint32_t | arm_calc_2pow (uint32_t guard_bits)
Calculates pow(2, numShifts) More...

Function Documentation

◆ arm_apply_guard_bits()

void arm_apply_guard_bits | ( | float32_t * | pIn,
 |  | uint32_t | numSamples,
 |  | uint32_t | guard_bits
 | ) |  |

Apply guard bits to buffer.

Parameters
[in,out] | pIn | pointer to input buffer
[in] | numSamples | number of samples in the input buffer
[in] | guard_bits | guard bits
Returns
none

Definition at line 293 of file project_l0/src/math_helper.c.

◆ arm_calc_2pow()

uint32_t arm_calc_2pow ( uint32_t numShifts )

Calculates pow(2, numShifts)

Parameters
[in] numShifts number of shifts
Returns
pow(2, numShifts)

Definition at line 310 of file project_l0/src/math_helper.c.

Referenced by arm_apply_guard_bits().

◆ arm_calc_guard_bits()

uint32_t arm_calc_guard_bits ( uint32_t num_adds )

Caluclates number of guard bits.

Parameters
[in] num_adds number of additions
Returns
guard bits The function Caluclates the number of guard bits depending on the numtaps

Definition at line 267 of file project_l0/src/math_helper.c.

◆ arm_clip_f32()

void arm_clip_f32 | ( | float * | pIn,
 |  | uint32_t | numSamples
 | ) |  |

Clip the float values to +/- 1.

Parameters
[in,out] | pIn | input buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 445 of file project_l0/src/math_helper.c.

◆ arm_compare_fixed_q15()

uint32_t arm_compare_fixed_q15 | ( | q15_t * | pIn,
 |  | q15_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Compare MATLAB Reference Output and ARM Test output.

Parameters
[in] | pIn | Pointer to Ref buffer
[in] | pOut | Pointer to Test buffer
[in] | numSamples | number of samples in the buffer
Returns
maximum difference

Definition at line 165 of file project_l0/src/math_helper.c.

◆ arm_compare_fixed_q31()

uint32_t arm_compare_fixed_q31 | ( | q31_t * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Compare MATLAB Reference Output and ARM Test output.

Parameters
[in] | pIn | Pointer to Ref buffer
[in] | pOut | Pointer to Test buffer
[in] | numSamples | number of samples in the buffer
Returns
maximum difference

Definition at line 193 of file project_l0/src/math_helper.c.

◆ arm_float_to_q12_20()

void arm_float_to_q12_20 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed in q12.20 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to outputbuffer
[in] | numSamples | number of samples in the input buffer
Returns
none The function converts floating point values to fixed point(q12.20) values

Definition at line 139 of file project_l0/src/math_helper.c.

◆ arm_float_to_q14()

void arm_float_to_q14 | ( | float * | pIn,
 |  | q15_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q14.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 334 of file project_l0/src/math_helper.c.

◆ arm_float_to_q28()

void arm_float_to_q28 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q28 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 419 of file project_l0/src/math_helper.c.

◆ arm_float_to_q29()

void arm_float_to_q29 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q30 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 391 of file project_l0/src/math_helper.c.

◆ arm_float_to_q30()

void arm_float_to_q30 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q30 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 364 of file project_l0/src/math_helper.c.

◆ arm_provide_guard_bits_q15()

void arm_provide_guard_bits_q15 | ( | q15_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters
[in,out] | input_buf | Pointer to input buffer
[in] | blockSize | block Size
[in] | guard_bits | guard bits
Returns
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 119 of file project_l0/src/math_helper.c.

◆ arm_provide_guard_bits_q31()

void arm_provide_guard_bits_q31 | ( | q31_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters
[in,out] | input_buf | Pointer to input buffer
[in] | blockSize | block Size
[in] | guard_bits | guard bits
Returns
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 223 of file project_l0/src/math_helper.c.

◆ arm_snr_f32()

float arm_snr_f32 | ( | float * | pRef,
 |  | float * | pTest,
 |  | uint32_t | buffSize
 | ) |  |

Caluclation of SNR.

Parameters
[in] | pRef | Pointer to the reference buffer
[in] | pTest | Pointer to the test buffer
[in] | buffSize | total number of samples
Returns
SNR The function Caluclates signal to noise ratio for the reference output and test output

Definition at line 61 of file project_l0/src/math_helper.c.


AT32F435/437 Firmwary Library: math_helper.h Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • inc
project_l1/inc/math_helper.h
Go to the documentation of this file.
1/* ----------------------------------------------------------------------
2* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3*
4* $Date: 17. January 2013
5* $Revision: V1.4.0
6*
7* Project: CMSIS DSP Library
8*
9* Title: math_helper.h
10*
11* Description: Prototypes of all helper functions required.
12*
13* Target Processor: Cortex-M4/Cortex-M3
14*
15* Redistribution and use in source and binary forms, with or without
16* modification, are permitted provided that the following conditions
17* are met:
18* - Redistributions of source code must retain the above copyright
19* notice, this list of conditions and the following disclaimer.
20* - Redistributions in binary form must reproduce the above copyright
21* notice, this list of conditions and the following disclaimer in
22* the documentation and/or other materials provided with the
23* distribution.
24* - Neither the name of ARM LIMITED nor the names of its contributors
25* may be used to endorse or promote products derived from this
26* software without specific prior written permission.
27*
28* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39* POSSIBILITY OF SUCH DAMAGE.
40* -------------------------------------------------------------------- */
41
42
43#include "arm_math.h"
44
45#ifndef MATH_HELPER_H
46#define MATH_HELPER_H
47
48float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
49void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
50void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
51void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
52void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
53void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
54void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
55void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
56void arm_clip_f32(float *pIn, uint32_t numSamples);
57uint32_t arm_calc_guard_bits(uint32_t num_adds);
58void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
59uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
60uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
61uint32_t arm_calc_2pow(uint32_t guard_bits);
62#endif
63
arm_float_to_q29
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format.
Definition: project_l0/src/math_helper.c:391
arm_apply_guard_bits
void arm_apply_guard_bits(float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
Apply guard bits to buffer.
Definition: project_l0/src/math_helper.c:293
arm_float_to_q30
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format.
Definition: project_l0/src/math_helper.c:364
arm_float_to_q14
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples)
Converts float to fixed q14.
Definition: project_l0/src/math_helper.c:334
arm_float_to_q12_20
void arm_float_to_q12_20(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed in q12.20 format.
Definition: project_l0/src/math_helper.c:139
arm_compare_fixed_q31
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output.
Definition: project_l0/src/math_helper.c:193
arm_calc_guard_bits
uint32_t arm_calc_guard_bits(uint32_t num_adds)
Caluclates number of guard bits.
Definition: project_l0/src/math_helper.c:267
arm_compare_fixed_q15
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output.
Definition: project_l0/src/math_helper.c:165
arm_calc_2pow
uint32_t arm_calc_2pow(uint32_t guard_bits)
Calculates pow(2, numShifts)
Definition: project_l0/src/math_helper.c:310
arm_float_to_q28
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q28 format.
Definition: project_l0/src/math_helper.c:419
arm_clip_f32
void arm_clip_f32(float *pIn, uint32_t numSamples)
Clip the float values to +/- 1.
Definition: project_l0/src/math_helper.c:445
arm_provide_guard_bits_q15
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
Definition: project_l0/src/math_helper.c:119
arm_provide_guard_bits_q31
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
Definition: project_l0/src/math_helper.c:223
arm_snr_f32
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
Caluclation of SNR.
Definition: project_l0/src/math_helper.c:61


AT32F435/437 Firmwary Library: arm_fir_data.c File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • src
Variables
project_l1/src/arm_fir_data.c File Reference
#include "at32f435_437.h"
#include "arm_math.h"

Go to the source code of this file.

Variables

float32_t | testInput_f32_1kHz_15kHz [320]
float32_t | refOutput [320]

Variable Documentation

◆ refOutput

float32_t refOutput[320]

Definition at line 96 of file project_l1/src/arm_fir_data.c.

Referenced by main().

◆ testInput_f32_1kHz_15kHz

float32_t testInput_f32_1kHz_15kHz[320]

Definition at line 48 of file project_l1/src/arm_fir_data.c.

Referenced by main().


AT32F435/437 Firmwary Library: arm_fir_data.c Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • src
project_l1/src/arm_fir_data.c
Go to the documentation of this file.
1/* ----------------------------------------------------------------------
2* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
3*
4* $Date: 17. January 2013
5* $Revision: V1.4.0
6*
7* Project: CMSIS DSP Library
8* Title: arm_fir_data.c
9*
10* Description: Data file used for example code
11*
12* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13*
14* Redistribution and use in source and binary forms, with or without
15* modification, are permitted provided that the following conditions
16* are met:
17* - Redistributions of source code must retain the above copyright
18* notice, this list of conditions and the following disclaimer.
19* - Redistributions in binary form must reproduce the above copyright
20* notice, this list of conditions and the following disclaimer in
21* the documentation and/or other materials provided with the
22* distribution.
23* - Neither the name of ARM LIMITED nor the names of its contributors
24* may be used to endorse or promote products derived from this
25* software without specific prior written permission.
26*
27* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38* POSSIBILITY OF SUCH DAMAGE.
39* -------------------------------------------------------------------- */
40
41#include "at32f435_437.h"
42#include "arm_math.h"
43
44/* ----------------------------------------------------------------------
45** Test input signal contains 1000Hz + 15000 Hz
46** ------------------------------------------------------------------- */
47
48float32_t testInput_f32_1kHz_15kHz[320] =
49{
50+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
51+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
52+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
53-0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
54-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
55-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
56+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
57+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
58+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
59+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
60-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
61-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
62+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
63+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
64+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
65+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
66-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
67-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
68-0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
69+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
70+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
71-0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
72-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
73-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
74+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
75+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
76+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
77+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
78-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
79-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
80-0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
81+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
82+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
83+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
84-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
85-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
86-0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
87+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
88+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
89+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
90};
91
92/* ----------------------------------------------------------------------
93** Reference output signal computed with MATLAB
94** ------------------------------------------------------------------- */
95
96float32_t refOutput[320] =
97{
98+0.0000000000f, -0.0010797829f, -0.0007681386f, -0.0001982932f, +0.0000644313f, +0.0020854271f, +0.0036891871f, +0.0015855941f,
99-0.0026280805f, -0.0075907658f, -0.0119390538f, -0.0086665968f, +0.0088981202f, +0.0430539279f, +0.0974468742f, +0.1740405600f,
100+0.2681416601f, +0.3747720089f, +0.4893362230f, +0.6024154672f, +0.7058740791f, +0.7968348987f, +0.8715901940f, +0.9277881093f,
101+0.9682182661f, +0.9934674267f, +1.0012052245f, +0.9925859371f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
102+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f,
103-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
104-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
105-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
106+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
107+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
108+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f,
109-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
110-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
111-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
112+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
113+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
114+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f,
115-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
116-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
117-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
118+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
119+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
120+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f,
121-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
122-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
123-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
124+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
125+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
126+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f,
127-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
128-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
129-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, -0.0000000000f, +0.1309866321f,
130+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
131+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
132+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f,
133-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
134-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
135-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
136+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
137+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f
138};
139
at32f435_437.h
at32f435_437 header file
testInput_f32_1kHz_15kHz
float32_t testInput_f32_1kHz_15kHz[320]
Definition: project_l1/src/arm_fir_data.c:48
refOutput
float32_t refOutput[320]
Definition: project_l1/src/arm_fir_data.c:96


AT32F435/437 Firmwary Library: math_helper.c File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • src
Functions
project_l1/src/math_helper.c File Reference
#include <math.h>
#include "math_helper.h"

Go to the source code of this file.

Functions

float | arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
Caluclation of SNR. More...
void | arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer. More...
void | arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed in q12.20 format. More...
uint32_t | arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output. More...
uint32_t | arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output. More...
void | arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer. More...
void | arm_provide_guard_bits_q7 (q7_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer. More...
uint32_t | arm_calc_guard_bits (uint32_t num_adds)
Caluclates number of guard bits. More...
void | arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
Apply guard bits to buffer. More...
uint32_t | arm_calc_2pow (uint32_t numShifts)
Calculates pow(2, numShifts) More...
void | arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
Converts float to fixed q14. More...
void | arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format. More...
void | arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format. More...
void | arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q28 format. More...
void | arm_clip_f32 (float *pIn, uint32_t numSamples)
Clip the float values to +/- 1. More...

Function Documentation

◆ arm_apply_guard_bits()

void arm_apply_guard_bits | ( | float32_t * | pIn,
 |  | uint32_t | numSamples,
 |  | uint32_t | guard_bits
 | ) |  |

Apply guard bits to buffer.

Parameters
[in,out] | pIn | pointer to input buffer
[in] | numSamples | number of samples in the input buffer
[in] | guard_bits | guard bits
Returns
none

Definition at line 293 of file project_l1/src/math_helper.c.

◆ arm_calc_2pow()

uint32_t arm_calc_2pow ( uint32_t numShifts )

Calculates pow(2, numShifts)

Parameters
[in] numShifts number of shifts
Returns
pow(2, numShifts)

Definition at line 310 of file project_l1/src/math_helper.c.

Referenced by arm_apply_guard_bits().

◆ arm_calc_guard_bits()

uint32_t arm_calc_guard_bits ( uint32_t num_adds )

Caluclates number of guard bits.

Parameters
[in] num_adds number of additions
Returns
guard bits The function Caluclates the number of guard bits depending on the numtaps

Definition at line 267 of file project_l1/src/math_helper.c.

◆ arm_clip_f32()

void arm_clip_f32 | ( | float * | pIn,
 |  | uint32_t | numSamples
 | ) |  |

Clip the float values to +/- 1.

Parameters
[in,out] | pIn | input buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 445 of file project_l1/src/math_helper.c.

◆ arm_compare_fixed_q15()

uint32_t arm_compare_fixed_q15 | ( | q15_t * | pIn,
 |  | q15_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Compare MATLAB Reference Output and ARM Test output.

Parameters
[in] | pIn | Pointer to Ref buffer
[in] | pOut | Pointer to Test buffer
[in] | numSamples | number of samples in the buffer
Returns
maximum difference

Definition at line 165 of file project_l1/src/math_helper.c.

◆ arm_compare_fixed_q31()

uint32_t arm_compare_fixed_q31 | ( | q31_t * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Compare MATLAB Reference Output and ARM Test output.

Parameters
[in] | pIn | Pointer to Ref buffer
[in] | pOut | Pointer to Test buffer
[in] | numSamples | number of samples in the buffer
Returns
maximum difference

Definition at line 193 of file project_l1/src/math_helper.c.

◆ arm_float_to_q12_20()

void arm_float_to_q12_20 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed in q12.20 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to outputbuffer
[in] | numSamples | number of samples in the input buffer
Returns
none The function converts floating point values to fixed point(q12.20) values

Definition at line 139 of file project_l1/src/math_helper.c.

◆ arm_float_to_q14()

void arm_float_to_q14 | ( | float * | pIn,
 |  | q15_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q14.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 334 of file project_l1/src/math_helper.c.

◆ arm_float_to_q28()

void arm_float_to_q28 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q28 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 419 of file project_l1/src/math_helper.c.

◆ arm_float_to_q29()

void arm_float_to_q29 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q30 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 391 of file project_l1/src/math_helper.c.

◆ arm_float_to_q30()

void arm_float_to_q30 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q30 format.

Parameters
[in] | pIn | pointer to input buffer
[out] | pOut | pointer to output buffer
[in] | numSamples | number of samples in the buffer
Returns
none The function converts floating point values to fixed point values

Definition at line 364 of file project_l1/src/math_helper.c.

◆ arm_provide_guard_bits_q15()

void arm_provide_guard_bits_q15 | ( | q15_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters
[in,out] | input_buf | Pointer to input buffer
[in] | blockSize | block Size
[in] | guard_bits | guard bits
Returns
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 119 of file project_l1/src/math_helper.c.

◆ arm_provide_guard_bits_q31()

void arm_provide_guard_bits_q31 | ( | q31_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters
[in,out] | input_buf | Pointer to input buffer
[in] | blockSize | block Size
[in] | guard_bits | guard bits
Returns
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 223 of file project_l1/src/math_helper.c.

◆ arm_provide_guard_bits_q7()

void arm_provide_guard_bits_q7 | ( | q7_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters
[in,out] | input_buf | Pointer to input buffer
[in] | blockSize | block Size
[in] | guard_bits | guard bits
Returns
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 245 of file project_l1/src/math_helper.c.

◆ arm_snr_f32()

float arm_snr_f32 | ( | float * | pRef,
 |  | float * | pTest,
 |  | uint32_t | buffSize
 | ) |  |

Caluclation of SNR.

Parameters
[in] | pRef | Pointer to the reference buffer
[in] | pTest | Pointer to the test buffer
[in] | buffSize | total number of samples
Returns
SNR The function Caluclates signal to noise ratio for the reference output and test output

Definition at line 61 of file project_l1/src/math_helper.c.

Referenced by main().


AT32F435/437 Firmwary Library: math_helper.c Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • src
project_l1/src/math_helper.c
Go to the documentation of this file.
1/* ----------------------------------------------------------------------
2* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
3*
4* $Date: 17. January 2013
5* $Revision: V1.4.0 b
6*
7* Project: CMSIS DSP Library
8*
9* Title: math_helper.c
10*
11* Description: Definition of all helper functions required.
12*
13* Target Processor: Cortex-M4/Cortex-M3
14*
15* Redistribution and use in source and binary forms, with or without
16* modification, are permitted provided that the following conditions
17* are met:
18* - Redistributions of source code must retain the above copyright
19* notice, this list of conditions and the following disclaimer.
20* - Redistributions in binary form must reproduce the above copyright
21* notice, this list of conditions and the following disclaimer in
22* the documentation and/or other materials provided with the
23* distribution.
24* - Neither the name of ARM LIMITED nor the names of its contributors
25* may be used to endorse or promote products derived from this
26* software without specific prior written permission.
27*
28* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39* POSSIBILITY OF SUCH DAMAGE.
40* -------------------------------------------------------------------- */
41/* ----------------------------------------------------------------------
42* Include standard header files
43* -------------------------------------------------------------------- */
44#include<math.h>
45
46/* ----------------------------------------------------------------------
47* Include project header files
48* -------------------------------------------------------------------- */
49#include "math_helper.h"
50
61float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
62{
63 float EnergySignal = 0.0, EnergyError = 0.0;
64 uint32_t i;
65 float SNR;
66 int temp;
67 int *test;
68
69 for (i = 0; i < buffSize; i++)
70 {
71 /* Checking for a NAN value in pRef array */
72 test = (int *)(&pRef[i]);
73 temp = *test;
74
75 if (temp == 0x7FC00000)
76 {
77 return(0);
78 }
79
80 /* Checking for a NAN value in pTest array */
81 test = (int *)(&pTest[i]);
82 temp = *test;
83
84 if (temp == 0x7FC00000)
85 {
86 return(0);
87 }
88 EnergySignal += pRef[i] * pRef[i];
89 EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
90 }
91
92 /* Checking for a NAN value in EnergyError */
93 test = (int *)(&EnergyError);
94 temp = *test;
95
96 if (temp == 0x7FC00000)
97 {
98 return(0);
99 }
100
101
102 SNR = 10 * log10 (EnergySignal / EnergyError);
103
104 return (SNR);
105
106}
107
108
119void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
120 uint32_t guard_bits)
121{
122 uint32_t i;
123
124 for (i = 0; i < blockSize; i++)
125 {
126 input_buf[i] = input_buf[i] >> guard_bits;
127 }
128}
129
139void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
140{
141 uint32_t i;
142
143 for (i = 0; i < numSamples; i++)
144 {
145 /* 1048576.0f corresponds to pow(2, 20) */
146 pOut[i] = (q31_t) (pIn[i] * 1048576.0f);
147
148 pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
149
150 if (pIn[i] == (float) 1.0)
151 {
152 pOut[i] = 0x000FFFFF;
153 }
154 }
155}
156
165uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
166{
167 uint32_t i;
168 int32_t diff, diffCrnt = 0;
169 uint32_t maxDiff = 0;
170
171 for (i = 0; i < numSamples; i++)
172 {
173 diff = pIn[i] - pOut[i];
174 diffCrnt = (diff > 0) ? diff : -diff;
175
176 if (diffCrnt > maxDiff)
177 {
178 maxDiff = diffCrnt;
179 }
180 }
181
182 return(maxDiff);
183}
184
193uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
194{
195 uint32_t i;
196 int32_t diff, diffCrnt = 0;
197 uint32_t maxDiff = 0;
198
199 for (i = 0; i < numSamples; i++)
200 {
201 diff = pIn[i] - pOut[i];
202 diffCrnt = (diff > 0) ? diff : -diff;
203
204 if (diffCrnt > maxDiff)
205 {
206 maxDiff = diffCrnt;
207 }
208 }
209
210 return(maxDiff);
211}
212
223void arm_provide_guard_bits_q31 (q31_t * input_buf,
224 uint32_t blockSize,
225 uint32_t guard_bits)
226{
227 uint32_t i;
228
229 for (i = 0; i < blockSize; i++)
230 {
231 input_buf[i] = input_buf[i] >> guard_bits;
232 }
233}
234
245void arm_provide_guard_bits_q7 (q7_t * input_buf,
246 uint32_t blockSize,
247 uint32_t guard_bits)
248{
249 uint32_t i;
250
251 for (i = 0; i < blockSize; i++)
252 {
253 input_buf[i] = input_buf[i] >> guard_bits;
254 }
255}
256
257
258
267uint32_t arm_calc_guard_bits (uint32_t num_adds)
268{
269 uint32_t i = 1, j = 0;
270
271 if (num_adds == 1)
272 {
273 return (0);
274 }
275
276 while (i < num_adds)
277 {
278 i = i * 2;
279 j++;
280 }
281
282 return (j);
283}
284
293void arm_apply_guard_bits (float32_t *pIn,
294 uint32_t numSamples,
295 uint32_t guard_bits)
296{
297 uint32_t i;
298
299 for (i = 0; i < numSamples; i++)
300 {
301 pIn[i] = pIn[i] * arm_calc_2pow(guard_bits);
302 }
303}
304
310uint32_t arm_calc_2pow(uint32_t numShifts)
311{
312
313 uint32_t i, val = 1;
314
315 for (i = 0; i < numShifts; i++)
316 {
317 val = val * 2;
318 }
319
320 return(val);
321}
322
323
324
334void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
335{
336 uint32_t i;
337
338 for (i = 0; i < numSamples; i++)
339 {
340 /* 16384.0f corresponds to pow(2, 14) */
341 pOut[i] = (q15_t) (pIn[i] * 16384.0f);
342
343 pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
344
345 if (pIn[i] == (float) 2.0)
346 {
347 pOut[i] = 0x7FFF;
348 }
349
350 }
351
352}
353
354
364void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples)
365{
366 uint32_t i;
367
368 for (i = 0; i < numSamples; i++)
369 {
370 /* 1073741824.0f corresponds to pow(2, 30) */
371 pOut[i] = (q31_t) (pIn[i] * 1073741824.0f);
372
373 pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
374
375 if (pIn[i] == (float) 2.0)
376 {
377 pOut[i] = 0x7FFFFFFF;
378 }
379 }
380}
381
391void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
392{
393 uint32_t i;
394
395 for (i = 0; i < numSamples; i++)
396 {
397 /* 1073741824.0f corresponds to pow(2, 30) */
398 pOut[i] = (q31_t) (pIn[i] * 536870912.0f);
399
400 pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
401
402 if (pIn[i] == (float) 4.0)
403 {
404 pOut[i] = 0x7FFFFFFF;
405 }
406 }
407}
408
409
419void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
420{
421 uint32_t i;
422
423 for (i = 0; i < numSamples; i++)
424 {
425 /* 268435456.0f corresponds to pow(2, 28) */
426 pOut[i] = (q31_t) (pIn[i] * 268435456.0f);
427
428 pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
429
430 if (pIn[i] == (float) 8.0)
431 {
432 pOut[i] = 0x7FFFFFFF;
433 }
434 }
435}
436
445void arm_clip_f32 (float *pIn, uint32_t numSamples)
446{
447 uint32_t i;
448
449 for (i = 0; i < numSamples; i++)
450 {
451 if (pIn[i] > 1.0f)
452 {
453 pIn[i] = 1.0;
454 }
455 else if ( pIn[i] < -1.0f)
456 {
457 pIn[i] = -1.0;
458 }
459
460 }
461}
462
463
464
465
j
uint32_t j
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:44
arm_float_to_q29
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format.
Definition: project_l1/src/math_helper.c:391
arm_apply_guard_bits
void arm_apply_guard_bits(float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
Apply guard bits to buffer.
Definition: project_l1/src/math_helper.c:293
arm_float_to_q30
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format.
Definition: project_l1/src/math_helper.c:364
arm_float_to_q14
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples)
Converts float to fixed q14.
Definition: project_l1/src/math_helper.c:334
arm_float_to_q12_20
void arm_float_to_q12_20(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed in q12.20 format.
Definition: project_l1/src/math_helper.c:139
arm_compare_fixed_q31
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output.
Definition: project_l1/src/math_helper.c:193
arm_provide_guard_bits_q7
void arm_provide_guard_bits_q7(q7_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
Definition: project_l1/src/math_helper.c:245
arm_calc_guard_bits
uint32_t arm_calc_guard_bits(uint32_t num_adds)
Caluclates number of guard bits.
Definition: project_l1/src/math_helper.c:267
arm_compare_fixed_q15
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output.
Definition: project_l1/src/math_helper.c:165
arm_float_to_q28
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q28 format.
Definition: project_l1/src/math_helper.c:419
arm_clip_f32
void arm_clip_f32(float *pIn, uint32_t numSamples)
Clip the float values to +/- 1.
Definition: project_l1/src/math_helper.c:445
arm_provide_guard_bits_q15
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
Definition: project_l1/src/math_helper.c:119
arm_calc_2pow
uint32_t arm_calc_2pow(uint32_t numShifts)
Calculates pow(2, numShifts)
Definition: project_l1/src/math_helper.c:310
arm_provide_guard_bits_q31
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
Definition: project_l1/src/math_helper.c:223
arm_snr_f32
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
Caluclation of SNR.
Definition: project_l1/src/math_helper.c:61


AT32F435/437 Firmwary Library: qspi_algorithm.c File Reference

  • utilities
  • at32f435_437_qspi_algorithm_demo
  • iar_out
  • src
Macros | Functions
qspi_algorithm.c File Reference
#include "flash_loader.h"
#include "flash_loader_extra.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "at32f435_437.h"

Go to the source code of this file.

Macros

#define FLASH_PAGE_PROGRAM_SIZE 256

Functions

void | custom_qspi_xip_enable (confirm_state new_state)
qspi xip mode enable or disable More...
void | custom_xip_enable_config (void)
qspi xip mode enable config More...
void | custom_qspi_rstqpi (void)
esmt32m rstqpi command More...
void | custom_qspi_rsten (void)
esmt32m rsten command More...
void | custom_qspi_rst (void)
esmt32m rst command More...
void | custom_qspi_write_enable (void)
esmt32m write enable command More...
void | custom_qspi_busy_check (void)
esmt32m check busy command More...
void | custom_qspi_sector_erase (uint32_t adr)
esmt32m sector erase command More...
void | custom_qspi_chip_erase (void)
esmt32m chip erase command More...
void | init_clk (void)
sysclk set to pll 96mhz More...
void | uninit_clk (void)
sysclk uninit More...
void | qspi_gpio_init (void)
qspi gpio initilize More...
void | qspi_cmd_init (void)
qspi command port init flow More...
uint32_t | FlashInit (void *base_of_flash, uint32_t image_size, uint32_t link_address, uint32_t flags)
uint32_t | FlashWrite (void *block_start, uint32_t offset_into_block, uint32_t count, char const *buffer)
uint32_t | FlashErase (void *block_start, uint32_t block_size)
OPTIONAL_SIGNOFF uint32_t | FlashSignoff (void)


AT32F435/437 Firmwary Library: qspi_algorithm.c Source File

  • utilities
  • at32f435_437_qspi_algorithm_demo
  • iar_out
  • src
qspi_algorithm.c
Go to the documentation of this file.
1/**************************************************
2 * Copyright 2004-2005 IAR Systems. All rights reserved.
3 *
4 * $Revision: 3259 $
5 **************************************************/
6#include "flash_loader.h"
7#include "flash_loader_extra.h"
8#include <stdio.h>
9#include <stdlib.h>
10#include <string.h>
11#include "at32f435_437.h"
12
21#define FLASH_PAGE_PROGRAM_SIZE 256
22
28void custom_qspi_xip_enable(confirm_state new_state)
29{
30 if(new_state == TRUE)
31 {
32 QSPI1->ctrl_bit.xipsel = TRUE;
33 while(QSPI1->xip_cmd_w3_bit.csts != RESET);
34 while(QSPI1->ctrl_bit.xipidle == RESET);
35 }
36 else
37 {
38 while(QSPI1->fifosts_bit.txfifordy == RESET);
39 while((QSPI1->ctrl_bit.abort != RESET) && (QSPI1->ctrl_bit.xipidle == RESET));
40 QSPI1->ctrl_bit.xiprcmdf = TRUE;
41 while(QSPI1->ctrl_bit.abort != RESET || QSPI1->ctrl_bit.xipidle == RESET);
42 QSPI1->ctrl_bit.xipsel = FALSE;
43 }
44}
45
51void custom_xip_enable_config(void)
52{
53 uint32_t xc0_val = 0, xc1_val = 0, xc2_val = 0;
54 qspi_xip_type *custom_xip_config = NULL;
55
56 custom_xip_config->read_instruction_code = 0xEB;
57 custom_xip_config->read_address_length = QSPI_XIP_ADDRLEN_3_BYTE;
58 custom_xip_config->read_operation_mode = QSPI_OPERATE_MODE_144;
59 custom_xip_config->read_second_dummy_cycle_num = 6;
60 custom_xip_config->read_select_mode = QSPI_XIPR_SEL_MODED;
61 custom_xip_config->read_time_counter = 0xF;
62 custom_xip_config->read_data_counter = 32;
63
64 /* config analyse xip_cmd_w0 register */
65 xc0_val = (uint32_t)custom_xip_config->read_second_dummy_cycle_num;
66 xc0_val |= (uint32_t)(custom_xip_config->read_operation_mode << 8);
67 xc0_val |= (uint32_t)(custom_xip_config->read_address_length << 11);
68 xc0_val |= (uint32_t)(custom_xip_config->read_instruction_code << 12);
69 QSPI1->xip_cmd_w0 = xc0_val;
70
71 /* config analyse xip_cmd_w1 register */
72 xc1_val = (uint32_t)custom_xip_config->write_second_dummy_cycle_num;
73 xc1_val |= (uint32_t)(custom_xip_config->write_operation_mode << 8);
74 xc1_val |= (uint32_t)(custom_xip_config->write_address_length << 11);
75 xc1_val |= (uint32_t)(custom_xip_config->write_instruction_code << 12);
76 QSPI1->xip_cmd_w1 = xc1_val;
77
78 /* config analyse xip_cmd_w2 register */
79 xc2_val = (uint32_t)custom_xip_config->read_data_counter;
80 xc2_val |= (uint32_t)(custom_xip_config->read_time_counter << 8);
81 xc2_val |= (uint32_t)(custom_xip_config->read_select_mode << 15);
82 xc2_val |= (uint32_t)(custom_xip_config->write_data_counter << 16);
83 xc2_val |= (uint32_t)(custom_xip_config->write_time_counter << 24);
84 xc2_val |= (uint32_t)(custom_xip_config->write_select_mode << 31);
85 QSPI1->xip_cmd_w2 = xc2_val;
86
87 custom_qspi_xip_enable(TRUE);
88}
89
95void custom_qspi_rstqpi(void)
96{
97 QSPI1->cmd_w0 = 0;
98 QSPI1->cmd_w1 = 0x01000000;
99 QSPI1->cmd_w2 = 0;
100 QSPI1->cmd_w3 = 0xFF0000C2;
101 while((flag_status)(QSPI1->cmdsts_bit.cmdsts) == RESET);
102 QSPI1->cmdsts_bit.cmdsts = TRUE;
103}
104
110void custom_qspi_rsten(void)
111{
112 QSPI1->cmd_w0 = 0;
113 QSPI1->cmd_w1 = 0x01000000;
114 QSPI1->cmd_w2 = 0;
115 QSPI1->cmd_w3 = 0x66000002;
116 while((flag_status)(QSPI1->cmdsts_bit.cmdsts) == RESET);
117 QSPI1->cmdsts_bit.cmdsts = TRUE;
118}
119
125void custom_qspi_rst(void)
126{
127 QSPI1->cmd_w0 = 0;
128 QSPI1->cmd_w1 = 0x01000000;
129 QSPI1->cmd_w2 = 0;
130 QSPI1->cmd_w3 = 0x99000002;
131 while((flag_status)(QSPI1->cmdsts_bit.cmdsts) == RESET);
132 QSPI1->cmdsts_bit.cmdsts = TRUE;
133}
134
140void custom_qspi_write_enable(void)
141{
142 QSPI1->cmd_w0 = 0;
143 QSPI1->cmd_w1 = 0x01000000;
144 QSPI1->cmd_w2 = 0;
145 QSPI1->cmd_w3 = 0x06000002;
146 while((flag_status)(QSPI1->cmdsts_bit.cmdsts) == RESET);
147 QSPI1->cmdsts_bit.cmdsts = TRUE;
148}
149
155void custom_qspi_busy_check(void)
156{
157 QSPI1->cmd_w0 = 0;
158 QSPI1->cmd_w1 = 0x01000000;
159 QSPI1->cmd_w2 = 0;
160 QSPI1->cmd_w3 = 0x05000004;
161 while((flag_status)(QSPI1->cmdsts_bit.cmdsts) == RESET);
162 QSPI1->cmdsts_bit.cmdsts = TRUE;
163}
164
170void custom_qspi_sector_erase(uint32_t adr)
171{
172 QSPI1->cmd_w0 = adr;
173 QSPI1->cmd_w1 = 0x01000003;
174 QSPI1->cmd_w2 = 0;
175 QSPI1->cmd_w3 = 0x20000002;
176 while((flag_status)(QSPI1->cmdsts_bit.cmdsts) == RESET);
177 QSPI1->cmdsts_bit.cmdsts = TRUE;
178}
179
185void custom_qspi_chip_erase(void)
186{
187 QSPI1->cmd_w0 = 0;
188 QSPI1->cmd_w1 = 0x01000000;
189 QSPI1->cmd_w2 = 0;
190 QSPI1->cmd_w3 = 0x60000002;
191 while((flag_status)(QSPI1->cmdsts_bit.cmdsts) == RESET);
192 QSPI1->cmdsts_bit.cmdsts = TRUE;
193}
194
200void init_clk(void)
201{
202 /* pll configuration: 96 mhz */
203 CRM->pllcfg = 0x00031801;
204
205 /* enable pll */
206 CRM->ctrl_bit.pllen = TRUE;
207
208 /* wait till pll is ready */
209 while(CRM->ctrl_bit.pllstbl == RESET);
210
211 /* select pll as system clock source */
212 CRM->cfg_bit.sclksel = CRM_SCLK_PLL;
213
214 /* wait till pll is used as system clock source */
215 while (CRM->cfg_bit.sclksts != CRM_SCLK_PLL);
216}
217
223void uninit_clk(void)
224{
225 CRM->cfg_bit.sclksel = CRM_SCLK_HICK;
226 CRM->ctrl_bit.pllen = FALSE;
227 CRM->pllcfg = 0x00033002; /* default */
228}
229
235void qspi_gpio_init(void)
236{
237 /* enable the qspi clock */
238 CRM->ahben3 |= 0x02;
239
240 /* enable the gpio pin clock */
241 CRM->ahben1 |= 0x60;
242
243 /* configure the gpio */
244 GPIOF->cfgr = 0x002AA000;
245 GPIOF->odrvr = 0x00155000;
246 GPIOF->muxl = 0x99000000;
247 GPIOF->muxh = 0x000009AA;
248
249 GPIOG->cfgr = 0x00002000;
250 GPIOG->odrvr = 0x00001000;
251 GPIOG->muxl = 0x0A000000;
252}
253
259void qspi_cmd_init(void)
260{
261 __IO uint32_t num;
262 /* xip disable */
263 custom_qspi_xip_enable(FALSE);
264
265 /* clk mode 0 */
266 QSPI1->ctrl_bit.sckmode = QSPI_SCK_MODE_0;
267
268 /* busy offset 0 */
269 QSPI1->ctrl_bit.busy = QSPI_BUSY_OFFSET_0;
270
271 /* clk div2 */
272 QSPI1->ctrl_bit.clkdiv = QSPI_CLK_DIV_2;
273
274 /* reset qpi mode and reset the device */
275 custom_qspi_rstqpi();
276 custom_qspi_rsten();
277 custom_qspi_rst();
278
279 /* wait about 30us */
280 num = 600;
281 while(num--)
282 {
283 __NOP();
284 }
285}
286
287#if USE_ARGC_ARGV
288uint32_t FlashInit(void *base_of_flash, uint32_t image_size,
289 uint32_t link_address, uint32_t flags,
290 int argc, char const *argv[])
291#else
292uint32_t FlashInit(void *base_of_flash, uint32_t image_size,
293 uint32_t link_address, uint32_t flags)
294#endif
295{
296 // Modify next
297 init_clk();
298 qspi_gpio_init();
299 qspi_cmd_init();
300 custom_xip_enable_config();
301 return RESULT_OK;
302}
303
304uint32_t FlashWrite(void *block_start,
305 uint32_t offset_into_block,
306 uint32_t count,
307 char const *buffer)
308{
309 uint32_t i, len = count;
310 uint32_t adr = ((uint32_t)block_start + offset_into_block);
311
312 adr -= QSPI1_MEM_BASE;
313
314 custom_qspi_xip_enable(FALSE);
315 do
316 {
317 if(count >= FLASH_PAGE_PROGRAM_SIZE)
318 {
319 len = FLASH_PAGE_PROGRAM_SIZE;
320 }
321 else
322 {
323 len = count;
324 }
325
326 /* qspi write enable */
327 custom_qspi_write_enable();
328
329 /* qspi program */
330 QSPI1->cmd_w0 = adr;
331 QSPI1->cmd_w1 = 0x01000003;
332 QSPI1->cmd_w2 = len;
333 QSPI1->cmd_w3 = 0x32000042;
334 for(i = 0; i < len; ++i)
335 {
336 while((flag_status)(QSPI1->fifosts_bit.txfifordy) == RESET);
337 QSPI1->dt_u8 = *buffer++;
338 }
339
340 /* wait command completed */
341 while((flag_status)(QSPI1->cmdsts_bit.cmdsts) == RESET);
342 QSPI1->cmdsts_bit.cmdsts = TRUE;
343
344 /* qspi check busy */
345 custom_qspi_busy_check();
346
347 count -= len;
348 adr += len;
349 }while(count);
350
351 custom_xip_enable_config();
352 return RESULT_OK;
353}
354
355uint32_t FlashErase(void *block_start,
356 uint32_t block_size)
357{
358 uint32_t adr = (uint32_t)block_start;
359
360 adr -= QSPI1_MEM_BASE;
361 custom_qspi_xip_enable(FALSE);
362
363 /* qspi write enable */
364 custom_qspi_write_enable();
365
366 /* qspi sector erase */
367 custom_qspi_sector_erase(adr);
368
369 /* qspi check busy */
370 custom_qspi_busy_check();
371
372 custom_xip_enable_config();
373 return RESULT_OK;
374}
375
376
377
378 OPTIONAL_SIGNOFF
379
380uint32_t FlashSignoff(void)
381{
382 // Modify next
383 return RESULT_OK;
384}
385
at32f435_437.h
at32f435_437 header file
flash_loader.h
OPTIONAL_SIGNOFF
#define OPTIONAL_SIGNOFF
Definition: flash_loader.h:70
RESULT_OK
#define RESULT_OK
Definition: flash_loader.h:5
flash_loader_extra.h
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
CRM_SCLK_HICK
@ CRM_SCLK_HICK
Definition: at32f435_437_crm.h:680
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM
#define CRM
Definition: at32f435_437_crm.h:1506
confirm_state
confirm_state
Definition: at32f435_437.h:379
flag_status
flag_status
Definition: at32f435_437.h:378
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOF
#define GPIOF
Definition: at32f435_437_gpio.h:526
QSPI1_MEM_BASE
#define QSPI1_MEM_BASE
Definition: at32f435_437.h:418
QSPI_XIP_ADDRLEN_3_BYTE
@ QSPI_XIP_ADDRLEN_3_BYTE
Definition: at32f435_437_qspi.h:162
QSPI_BUSY_OFFSET_0
@ QSPI_BUSY_OFFSET_0
Definition: at32f435_437_qspi.h:87
QSPI_SCK_MODE_0
@ QSPI_SCK_MODE_0
Definition: at32f435_437_qspi.h:171
QSPI_OPERATE_MODE_144
@ QSPI_OPERATE_MODE_144
Definition: at32f435_437_qspi.h:115
QSPI_CLK_DIV_2
@ QSPI_CLK_DIV_2
Definition: at32f435_437_qspi.h:125
QSPI_XIPR_SEL_MODED
@ QSPI_XIPR_SEL_MODED
Definition: at32f435_437_qspi.h:69
custom_qspi_sector_erase
void custom_qspi_sector_erase(uint32_t adr)
esmt32m sector erase command
Definition: qspi_algorithm.c:170
custom_qspi_rstqpi
void custom_qspi_rstqpi(void)
esmt32m rstqpi command
Definition: qspi_algorithm.c:95
custom_xip_enable_config
void custom_xip_enable_config(void)
qspi xip mode enable config
Definition: qspi_algorithm.c:51
FlashInit
uint32_t FlashInit(void *base_of_flash, uint32_t image_size, uint32_t link_address, uint32_t flags)
Definition: qspi_algorithm.c:292
custom_qspi_rst
void custom_qspi_rst(void)
esmt32m rst command
Definition: qspi_algorithm.c:125
FLASH_PAGE_PROGRAM_SIZE
#define FLASH_PAGE_PROGRAM_SIZE
Definition: qspi_algorithm.c:21
qspi_cmd_init
void qspi_cmd_init(void)
qspi command port init flow
Definition: qspi_algorithm.c:259
FlashWrite
uint32_t FlashWrite(void *block_start, uint32_t offset_into_block, uint32_t count, char const *buffer)
Definition: qspi_algorithm.c:304
custom_qspi_chip_erase
void custom_qspi_chip_erase(void)
esmt32m chip erase command
Definition: qspi_algorithm.c:185
FlashSignoff
OPTIONAL_SIGNOFF uint32_t FlashSignoff(void)
Definition: qspi_algorithm.c:380
qspi_gpio_init
void qspi_gpio_init(void)
qspi gpio initilize
Definition: qspi_algorithm.c:235
custom_qspi_rsten
void custom_qspi_rsten(void)
esmt32m rsten command
Definition: qspi_algorithm.c:110
custom_qspi_xip_enable
void custom_qspi_xip_enable(confirm_state new_state)
qspi xip mode enable or disable
Definition: qspi_algorithm.c:28
custom_qspi_busy_check
void custom_qspi_busy_check(void)
esmt32m check busy command
Definition: qspi_algorithm.c:155
custom_qspi_write_enable
void custom_qspi_write_enable(void)
esmt32m write enable command
Definition: qspi_algorithm.c:140
init_clk
void init_clk(void)
sysclk set to pll 96mhz
Definition: qspi_algorithm.c:200
uninit_clk
void uninit_clk(void)
sysclk uninit
Definition: qspi_algorithm.c:223
FlashErase
uint32_t FlashErase(void *block_start, uint32_t block_size)
Definition: qspi_algorithm.c:355
QSPI1
#define QSPI1
Definition: at32f435_437_qspi.h:512
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
qspi_xip_type
qspi xip type
Definition: at32f435_437_qspi.h:208
qspi_xip_type::write_operation_mode
qspi_operate_mode_type write_operation_mode
Definition: at32f435_437_qspi.h:215
qspi_xip_type::read_second_dummy_cycle_num
uint8_t read_second_dummy_cycle_num
Definition: at32f435_437_qspi.h:212
qspi_xip_type::write_address_length
qspi_xip_addrlen_type write_address_length
Definition: at32f435_437_qspi.h:214
qspi_xip_type::write_instruction_code
uint8_t write_instruction_code
Definition: at32f435_437_qspi.h:213
qspi_xip_type::write_data_counter
uint8_t write_data_counter
Definition: at32f435_437_qspi.h:219
qspi_xip_type::read_select_mode
qspi_xip_read_sel_type read_select_mode
Definition: at32f435_437_qspi.h:220
qspi_xip_type::write_time_counter
uint8_t write_time_counter
Definition: at32f435_437_qspi.h:218
qspi_xip_type::read_operation_mode
qspi_operate_mode_type read_operation_mode
Definition: at32f435_437_qspi.h:211
qspi_xip_type::read_address_length
qspi_xip_addrlen_type read_address_length
Definition: at32f435_437_qspi.h:210
qspi_xip_type::read_data_counter
uint8_t read_data_counter
Definition: at32f435_437_qspi.h:222
qspi_xip_type::read_time_counter
uint8_t read_time_counter
Definition: at32f435_437_qspi.h:221
qspi_xip_type::write_select_mode
qspi_xip_write_sel_type write_select_mode
Definition: at32f435_437_qspi.h:217
qspi_xip_type::write_second_dummy_cycle_num
uint8_t write_second_dummy_cycle_num
Definition: at32f435_437_qspi.h:216
qspi_xip_type::read_instruction_code
uint8_t read_instruction_code
Definition: at32f435_437_qspi.h:209


AT32F435/437 Firmwary Library: random.c File Reference

  • utilities
  • at32f435_437_gen_random_number_demo
  • src
Macros | Functions | Variables
random.c File Reference

set of firmware functions to random function More...

#include "at32f435_437_board.h"
#include "random.h"
#include <stdlib.h>

Go to the source code of this file.

Macros

#define DEVICE_ID_ADDR1 0x1FFFF7E8

Functions

int | get_uid_for_seed (void)
get uid value as seed More...
void | randnum_test (void)
enable ertc as seed More...

Variables

ertc_time_type * time
uint16_t | ertc_clk_div_a = 0
uint16_t | ertc_clk_div_b = 0

Detailed Description

set of firmware functions to random function

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file random.c.


AT32F435/437 Firmwary Library: random.c Source File

  • utilities
  • at32f435_437_gen_random_number_demo
  • src
random.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "random.h"
29#include <stdlib.h>
30
39/* define at32 mcu uid address */
40#define DEVICE_ID_ADDR1 0x1FFFF7E8
41 ertc_time_type *time;
42
43uint16_t ertc_clk_div_a = 0;
44uint16_t ertc_clk_div_b = 0;
45
51int get_uid_for_seed (void)
52{
53 uint32_t id[3] = {0};
54 uint32_t uid_one_word;
55
56 /* get uid */
57 id[0] = *(int*)DEVICE_ID_ADDR1;
58 id[2] = *(int*)(DEVICE_ID_ADDR1+8);
59 uid_one_word=id[0]&0x7fffffff+((id[2]&(~0x7fffffff))<<16);
60 return uid_one_word;
61}
62
68#if ENABLE_ERTC_ASSEED
69void ertc_init_for_seed (void)
70{
71 /* enable the pwc clock interface */
72 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
73
74 /* allow access to ertc */
75 pwc_battery_powered_domain_access(TRUE);
76
77 /* reset ertc domain */
78 crm_battery_powered_domain_reset(TRUE);
79 crm_battery_powered_domain_reset(FALSE);
80
81
82 /* the ertc clock may varies due to lick frequency dispersion. */
83 /* enable the lick osc */
84 crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE);
85
86 /* wait till lick is ready */
87 while(crm_flag_get(CRM_LICK_STABLE_FLAG) == RESET)
88 {
89 }
90
91 /* select the ertc clock source */
92 crm_ertc_clock_select(CRM_ERTC_CLOCK_LICK);
93
94 /* ck_spre(1hz) = ertcclk(lick) /(ertc_clk_div_a + 1)*(ertc_clk_div_b + 1)*/
95 ertc_clk_div_b = 0xFF;
96 ertc_clk_div_a = 0x7F;
97
98
99 /* enable the ertc clock */
100 crm_ertc_clock_enable(TRUE);
101
102 /* deinitializes the ertc registers */
103 ertc_reset();
104
105 /* wait for ertc apb registers synchronisation */
106 ertc_wait_update();
107
108 /* configure the ertc data register and ertc prescaler */
109 ertc_divider_set(ertc_clk_div_a, ertc_clk_div_b);
110 ertc_hour_mode_set(ERTC_HOUR_MODE_24);
111
112 /* set the alarm 05h:20min:30s */
113 ertc_alarm_mask_set(ERTC_ALA, ERTC_ALARM_MASK_DATE_WEEK);
114 ertc_alarm_week_date_select(ERTC_ALA, ERTC_SLECT_DATE);
115 ertc_alarm_set(ERTC_ALA, 31, 5, 20, 30, ERTC_AM);
116
117 /* enable ertc alarm a interrupt */
118 ertc_interrupt_enable(ERTC_ALA_INT, TRUE);
119
120 /* enable the alarm */
121 ertc_alarm_enable(ERTC_ALA, TRUE);
122
123 ertc_flag_clear(ERTC_ALAF_FLAG);
124
125 /* set the date: friday january 11th 2013 */
126 ertc_date_set(13, 1, 11, 5);
127
128 /* set the time to 05h 20mn 00s am */
129 ertc_time_set(5, 20, 0, ERTC_AM);
130
131 /* indicator for the ertc configuration */
132 ertc_bpr_data_write(ERTC_DT1, 0x32F1);
133}
134
135#endif
136
142void randnum_test( void)
143{
144#if ENABLE_ERTC_ASSEED
145
146 if (ertc_bpr_data_read(ERTC_DT1) != 0x32F1)
147 {
148 ertc_init_for_seed();
149 }
150 ertc_calendar_get(time);
151 /* set uid and ertc as seed for random */
152 srand(ERTC->time + get_uid_for_seed());
153#else
154 /* set only uid as seed for random */
155 srand(get_uid_for_seed());
156#endif
157 while(1)
158 {
159 delay_ms(500);
160 printf("%d\r\n",rand());
161 }
162}
163
at32f435_437_board.h
ERTC
#define ERTC
Definition: at32f435_437_ertc.h:1130
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_ertc_clock_select
void crm_ertc_clock_select(crm_ertc_clock_type value)
select ertc clock
Definition: at32f435_437_crm.c:434
crm_ertc_clock_enable
void crm_ertc_clock_enable(confirm_state new_state)
enable or disable ertc
Definition: at32f435_437_crm.c:445
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_battery_powered_domain_reset
void crm_battery_powered_domain_reset(confirm_state new_state)
battery powered domain software reset
Definition: at32f435_437_crm.c:541
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_CLOCK_SOURCE_LICK
@ CRM_CLOCK_SOURCE_LICK
Definition: at32f435_437_crm.h:563
CRM_ERTC_CLOCK_LICK
@ CRM_ERTC_CLOCK_LICK
Definition: at32f435_437_crm.h:633
CRM_LICK_STABLE_FLAG
#define CRM_LICK_STABLE_FLAG
Definition: at32f435_437_crm.h:59
ertc_hour_mode_set
error_status ertc_hour_mode_set(ertc_hour_mode_set_type mode)
ertc hour mode set.
Definition: at32f435_437_ertc.c:283
ertc_wait_update
error_status ertc_wait_update(void)
ertc wait register update finish.
Definition: at32f435_437_ertc.c:97
ertc_time_set
error_status ertc_time_set(uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set time.
Definition: at32f435_437_ertc.c:363
ertc_reset
error_status ertc_reset(void)
ertc reset all register.
Definition: at32f435_437_ertc.c:207
ertc_alarm_mask_set
void ertc_alarm_mask_set(ertc_alarm_type alarm_x, uint32_t mask)
set which bits are irrelevant to the alarm match.
Definition: at32f435_437_ertc.c:458
ertc_interrupt_enable
void ertc_interrupt_enable(uint32_t source, confirm_state new_state)
enable or disable interrupt.
Definition: at32f435_437_ertc.c:1386
ertc_alarm_week_date_select
void ertc_alarm_week_date_select(ertc_alarm_type alarm_x, ertc_week_date_select_type wk)
alarm week or date mode select.
Definition: at32f435_437_ertc.c:500
ertc_date_set
error_status ertc_date_set(uint8_t year, uint8_t month, uint8_t date, uint8_t week)
set date.
Definition: at32f435_437_ertc.c:314
ertc_flag_clear
void ertc_flag_clear(uint32_t flag)
clear flag status
Definition: at32f435_437_ertc.c:1507
ertc_bpr_data_read
uint32_t ertc_bpr_data_read(ertc_dt_type dt)
read data from bpr register.
Definition: at32f435_437_ertc.c:1550
ertc_alarm_set
void ertc_alarm_set(ertc_alarm_type alarm_x, uint8_t week_date, uint8_t hour, uint8_t min, uint8_t sec, ertc_am_pm_type ampm)
set alarm.
Definition: at32f435_437_ertc.c:538
ertc_calendar_get
void ertc_calendar_get(ertc_time_type *time)
get calendar
Definition: at32f435_437_ertc.c:404
ertc_divider_set
error_status ertc_divider_set(uint16_t div_a, uint16_t div_b)
ertc division set.
Definition: at32f435_437_ertc.c:251
ertc_bpr_data_write
void ertc_bpr_data_write(ertc_dt_type dt, uint32_t data)
write data to the bpr register.
Definition: at32f435_437_ertc.c:1524
ertc_alarm_enable
error_status ertc_alarm_enable(ertc_alarm_type alarm_x, confirm_state new_state)
enable or disable alarm clock.
Definition: at32f435_437_ertc.c:629
ERTC_SLECT_DATE
@ ERTC_SLECT_DATE
Definition: at32f435_437_ertc.h:135
ERTC_HOUR_MODE_24
@ ERTC_HOUR_MODE_24
Definition: at32f435_437_ertc.h:116
ERTC_DT1
@ ERTC_DT1
Definition: at32f435_437_ertc.h:357
ERTC_ALA
@ ERTC_ALA
Definition: at32f435_437_ertc.h:144
ERTC_AM
@ ERTC_AM
Definition: at32f435_437_ertc.h:126
ERTC_ALARM_MASK_DATE_WEEK
#define ERTC_ALARM_MASK_DATE_WEEK
Definition: at32f435_437_ertc.h:90
ERTC_ALAF_FLAG
#define ERTC_ALAF_FLAG
Definition: at32f435_437_ertc.h:74
ERTC_ALA_INT
#define ERTC_ALA_INT
Definition: at32f435_437_ertc.h:53
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
ertc_clk_div_b
uint16_t ertc_clk_div_b
Definition: random.c:44
get_uid_for_seed
int get_uid_for_seed(void)
get uid value as seed
Definition: random.c:51
DEVICE_ID_ADDR1
#define DEVICE_ID_ADDR1
Definition: random.c:40
ertc_clk_div_a
uint16_t ertc_clk_div_a
Definition: random.c:43
randnum_test
void randnum_test(void)
enable ertc as seed
Definition: random.c:142
time
ertc_time_type * time
Definition: random.c:41
pwc_battery_powered_domain_access
void pwc_battery_powered_domain_access(confirm_state new_state)
enable or disable access to the battery powered domain.
Definition: at32f435_437_pwc.c:61
random.h
at32f435_437 random header file
ertc_time_type
ertc time
Definition: at32f435_437_ertc.h:383


AT32F435/437 Firmwary Library: random.h File Reference

  • utilities
  • at32f435_437_gen_random_number_demo
  • inc
Macros | Functions
random.h File Reference

at32f435_437 random header file More...

#include "at32f435_437.h"

Go to the source code of this file.

Macros

#define ENABLE_ERTC_ASSEED (1)

Functions

void randnum_test (void)
enable ertc as seed More...

Detailed Description

at32f435_437 random header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file random.h.


AT32F435/437 Firmwary Library: random.h Source File

  • utilities
  • at32f435_437_gen_random_number_demo
  • inc
random.h
Go to the documentation of this file.
1
27#ifndef __RANDOM_H
28#define __RANDOM_H
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#include "at32f435_437.h"
35
48/* this define ertc seed for random number gen,*/
49#define ENABLE_ERTC_ASSEED (1)
50
59void randnum_test( void);
60
73#ifdef __cplusplus
74}
75#endif
76
77#endif
at32f435_437.h
at32f435_437 header file
randnum_test
void randnum_test(void)
enable ertc as seed
Definition: random.c:142


AT32F435/437 Firmwary Library: system_at32f435_437.c Source File

  • libraries
  • cmsis
  • cm4
  • device_support
system_at32f435_437.c
Go to the documentation of this file.
1
35#include "at32f435_437.h"
36
40#define VECT_TAB_OFFSET 0x0
48unsigned int system_core_clock = HICK_VALUE;
64void SystemInit (void)
65{
66#if defined (__FPU_USED) && (__FPU_USED == 1U)
67 SCB->CPACR |= ((3U << 10U * 2U) | /* set cp10 full access */
68 (3U << 11U * 2U) ); /* set cp11 full access */
69#endif
70
71 /* reset the crm clock configuration to the default reset state(for debug purpose) */
72 /* set hicken bit */
73 CRM->ctrl_bit.hicken = TRUE;
74
75 /* wait hick stable */
76 while(CRM->ctrl_bit.hickstbl != SET);
77
78 /* hick used as system clock */
79 CRM->cfg_bit.sclksel = CRM_SCLK_HICK;
80
81 /* wait sclk switch status */
82 while(CRM->cfg_bit.sclksts != CRM_SCLK_HICK);
83
84 /* reset hexten, hextbyps, cfden and pllen bits */
85 CRM->ctrl &= ~(0x010D0000U);
86
87 /* reset cfg register, include sclk switch, ahbdiv, apb1div, apb2div, adcdiv, clkout bits */
88 CRM->cfg = 0;
89
90 /* reset pllms pllns pllfr pllrcs bits */
91 CRM->pllcfg = 0x00033002U;
92
93 /* reset clkout[3], usbbufs, hickdiv, clkoutdiv */
94 CRM->misc1 = 0;
95
96 /* disable all interrupts enable and clear pending bits */
97 CRM->clkint = 0x009F0000U;
98
99#ifdef VECT_TAB_SRAM
100 SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* vector table relocation in internal sram. */
101#else
102 SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* vector table relocation in internal flash. */
103#endif
104}
105
114void system_core_clock_update(void)
115{
116 uint32_t pll_ns = 0, pll_ms = 0, pll_fr = 0, pll_clock_source = 0, pllrcsfreq = 0;
117 uint32_t temp = 0, div_value = 0;
118 crm_sclk_type sclk_source;
119
120 static const uint8_t sys_ahb_div_table[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
121 static const uint8_t pll_fr_table[6] = {1, 2, 4, 8, 16, 32};
122
123 /* get sclk source */
124 sclk_source = crm_sysclk_switch_status_get();
125
126 switch(sclk_source)
127 {
128 case CRM_SCLK_HICK:
129 if(((CRM->misc1_bit.hick_to_sclk) != RESET) && ((CRM->misc1_bit.hickdiv) != RESET))
130 system_core_clock = HICK_VALUE * 6;
131 else
132 system_core_clock = HICK_VALUE;
133 break;
134 case CRM_SCLK_HEXT:
135 system_core_clock = HEXT_VALUE;
136 break;
137 case CRM_SCLK_PLL:
138 /* get pll clock source */
139 pll_clock_source = CRM->pllcfg_bit.pllrcs;
140
141 /* get multiplication factor */
142 pll_ns = CRM->pllcfg_bit.pllns;
143 pll_ms = CRM->pllcfg_bit.pllms;
144 pll_fr = pll_fr_table[CRM->pllcfg_bit.pllfr];
145
146 if (pll_clock_source == CRM_PLL_SOURCE_HICK)
147 {
148 /* hick selected as pll clock entry */
149 pllrcsfreq = HICK_VALUE;
150 }
151 else
152 {
153 /* hext selected as pll clock entry */
154 pllrcsfreq = HEXT_VALUE;
155 }
156
157 system_core_clock = (uint32_t)(((uint64_t)pllrcsfreq * pll_ns) / (pll_ms * pll_fr));
158 break;
159 default:
160 system_core_clock = HICK_VALUE;
161 break;
162 }
163
164 /* compute sclk, ahbclk frequency */
165 /* get ahb division */
166 temp = CRM->cfg_bit.ahbdiv;
167 div_value = sys_ahb_div_table[temp];
168 /* ahbclk frequency */
169 system_core_clock = system_core_clock >> div_value;
170}
at32f435_437.h
at32f435_437 header file
VECT_TAB_OFFSET
#define VECT_TAB_OFFSET
Definition: system_at32f435_437.c:40
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
SystemInit
void SystemInit(void)
setup the microcontroller system initialize the flash interface.
Definition: system_at32f435_437.c:64
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_sclk_type
crm_sclk_type
crm sclk select
Definition: at32f435_437_crm.h:679
CRM_PLL_SOURCE_HICK
@ CRM_PLL_SOURCE_HICK
Definition: at32f435_437_crm.h:537
CRM_SCLK_HICK
@ CRM_SCLK_HICK
Definition: at32f435_437_crm.h:680
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_SCLK_HEXT
@ CRM_SCLK_HEXT
Definition: at32f435_437_crm.h:681
CRM
#define CRM
Definition: at32f435_437_crm.h:1506
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
SET
@ SET
Definition: at32f435_437.h:378
SRAM_BASE
#define SRAM_BASE
Definition: at32f435_437.h:423
FLASH_BASE
#define FLASH_BASE
Definition: at32f435_437.h:425
HEXT_VALUE
#define HEXT_VALUE
in the following line adjust the value of high speed exernal crystal (hext) used in your application
Definition: project/at_start_f435/examples/acc/calibration/inc/at32f435_437_conf.h:44
HICK_VALUE
#define HICK_VALUE
Definition: project/at_start_f435/examples/acc/calibration/inc/at32f435_437_conf.h:52


AT32F435/437 Firmwary Library: system_at32f435_437.h Source File

  • libraries
  • cmsis
  • cm4
  • device_support
system_at32f435_437.h
Go to the documentation of this file.
1
27#ifndef __SYSTEM_AT32F435_437_H
28#define __SYSTEM_AT32F435_437_H
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
42#define SystemCoreClock system_core_clock
43
47extern unsigned int system_core_clock;
57extern void SystemInit(void);
58extern void system_core_clock_update(void);
59
72#ifdef __cplusplus
73}
74#endif
75
76#endif
77
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
SystemInit
void SystemInit(void)
setup the microcontroller system initialize the flash interface.
Definition: system_at32f435_437.c:64
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48


AT32F435/437 Firmwary Library: tcp_client.c File Reference

  • emac
  • tcp_client
  • src
Functions | Variables
tcp_client.c File Reference

implement tcp client More...

#include "tcp_client.h"
#include "lwip/tcp.h"

Go to the source code of this file.

Functions

void | Delay_s (unsigned long ulVal)
generate delay More...
err_t | tcp_client_send_data (struct tcp_pcb *cpcb, unsigned char *buff, unsigned int length)
tcp client send data More...
struct tcp_pcb * | check_tcp_connect (void)
check connection More...
err_t | tcp_connected (void *arg, struct tcp_pcb *pcb, err_t err)
report connection is establish More...
err_t | tcp_client_recv (void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
receiving callback funtion for TCP client More...
void | tcp_client_init (uint16_t local_port, uint16_t remote_port, unsigned char a, unsigned char b, unsigned char c, unsigned char d)
initialize tcp client More...

Variables

struct tcp_pcb * | tcp_active_pcbs
unsigned char | connect_flag = 0

Detailed Description

implement tcp client

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file tcp_client.c.


AT32F435/437 Firmwary Library: tcp_client.c Source File

  • emac
  • tcp_client
  • src
tcp_client.c
Go to the documentation of this file.
1
27#include "tcp_client.h"
28#include "lwip/tcp.h"
29
38extern struct tcp_pcb *tcp_active_pcbs;
39/* Gloable functions ---------------------------------------------------------*/
40unsigned char connect_flag = 0;
41
47void Delay_s(unsigned long ulVal)
48{
49 while ( --ulVal != 0 );
50}
51
59err_t tcp_client_send_data(struct tcp_pcb *cpcb,unsigned char *buff,unsigned int length)
60{
61 err_t err;
62
63 err = tcp_write(cpcb,buff,length,TCP_WRITE_FLAG_COPY); //send data
64 tcp_output(cpcb);
65 //tcp_close(cpcb);
66 return err;
67}
68
74struct tcp_pcb *check_tcp_connect(void)
75{
76 struct tcp_pcb *cpcb = 0;
77 connect_flag = 0;
78 for(cpcb = tcp_active_pcbs;cpcb != NULL; cpcb = cpcb->next)
79 {
80 if(cpcb -> state == ESTABLISHED)
81 {
82 connect_flag = 1;
83 break;
84 }
85 }
86
87 if(connect_flag == 0)
88 {
89 tcp_client_init(TCP_LOCAL_PORT,TCP_SERVER_PORT,TCP_SERVER_IP);
90 cpcb = 0;
91 }
92 return cpcb;
93}
94
102err_t tcp_connected(void *arg,struct tcp_pcb *pcb,err_t err)
103{
104 //tcp_client_pcb = pcb;
105 return ERR_OK;
106}
107
116err_t tcp_client_recv(void *arg, struct tcp_pcb *pcb,struct pbuf *p,err_t err)
117{
118
119 if(p != NULL)
120 {
121 tcp_recved(pcb, p->tot_len);
122 tcp_write(pcb,p->payload,p->tot_len,TCP_WRITE_FLAG_COPY);
123 tcp_output(pcb);
124 }
125 else
126 {
127 tcp_close(pcb);
128 }
129 pbuf_free(p);
130 err = ERR_OK;
131 return err;
132}
133
144void tcp_client_init(uint16_t local_port,uint16_t remote_port,unsigned char a,unsigned char b,unsigned char c,unsigned char d)
145{
146
147 ip_addr_t ipaddr;
148 struct tcp_pcb *tcp_client_pcb;
149 err_t err;
150 IP4_ADDR(&ipaddr,a,b,c,d);
151 tcp_client_pcb = tcp_new();
152 if (!tcp_client_pcb)
153 {
154 return ;
155 }
156 err = tcp_bind(tcp_client_pcb,IP_ADDR_ANY,local_port);
157 if(err != ERR_OK)
158 {
159 return ;
160 }
161 tcp_connect(tcp_client_pcb, &ipaddr, remote_port, tcp_connected);
162 tcp_recv(tcp_client_pcb, tcp_client_recv);
163}
164
tcp_connected
err_t tcp_connected(void *arg, struct tcp_pcb *pcb, err_t err)
report connection is establish
Definition: tcp_client.c:102
tcp_client_recv
err_t tcp_client_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
receiving callback funtion for TCP client
Definition: tcp_client.c:116
connect_flag
unsigned char connect_flag
Definition: tcp_client.c:40
check_tcp_connect
struct tcp_pcb * check_tcp_connect(void)
check connection
Definition: tcp_client.c:74
tcp_active_pcbs
struct tcp_pcb * tcp_active_pcbs
tcp_client_pcb
struct tcp_pcb * tcp_client_pcb
tcp_client_send_data
err_t tcp_client_send_data(struct tcp_pcb *cpcb, unsigned char *buff, unsigned int length)
tcp client send data
Definition: tcp_client.c:59
tcp_client_init
void tcp_client_init(uint16_t local_port, uint16_t remote_port, unsigned char a, unsigned char b, unsigned char c, unsigned char d)
initialize tcp client
Definition: tcp_client.c:144
Delay_s
void Delay_s(unsigned long ulVal)
generate delay
Definition: tcp_client.c:47
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
TCP_LOCAL_PORT
#define TCP_LOCAL_PORT
Definition: tcp_client.h:50
TCP_SERVER_PORT
#define TCP_SERVER_PORT
Definition: tcp_client.h:51
TCP_SERVER_IP
#define TCP_SERVER_IP
Definition: tcp_client.h:53
pcb
struct tcp_pcb * pcb
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:63
tcp_client.h
tcp client header


AT32F435/437 Firmwary Library: tcp_client.h File Reference

  • emac
  • tcp_client
  • inc
Macros | Functions | Variables
tcp_client.h File Reference

tcp client header More...

#include "stdint.h"
#include "lwip/err.h"

Go to the source code of this file.

Macros

#define | TCP_LOCAL_PORT (1030)
#define | TCP_SERVER_PORT (1031)
#define | TCP_SERVER_IP 192,168,81,19

Functions

void | tcp_client_init (uint16_t local_port, uint16_t remote_port, unsigned char a, unsigned char b, unsigned char c, unsigned char d)
initialize tcp client More...
err_t | tcp_client_send_data (struct tcp_pcb *cpcb, unsigned char *buff, unsigned int length)
tcp client send data More...
struct tcp_pcb * | check_tcp_connect (void)
check connection More...

Variables

struct tcp_pcb * tcp_client_pcb

Detailed Description

tcp client header

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file tcp_client.h.


AT32F435/437 Firmwary Library: tcp_client.h Source File

  • emac
  • tcp_client
  • inc
tcp_client.h
Go to the documentation of this file.
1
27#include "stdint.h"
28#include "lwip/err.h"
29
30#ifndef _TCP_CLIENT_H_
31#define _TCP_CLIENT_H_
32
33#ifdef __cplusplus
34 extern "C" {
35#endif
36
49/* TCP server and client configuration*/
50#define TCP_LOCAL_PORT (1030)
51#define TCP_SERVER_PORT (1031)
52
53#define TCP_SERVER_IP 192,168,81,19
54
59extern struct tcp_pcb *tcp_client_pcb;
60
64void tcp_client_init(uint16_t local_port,uint16_t remote_port,unsigned char a,unsigned char b,unsigned char c,unsigned char d);
65err_t tcp_client_send_data(struct tcp_pcb *cpcb,unsigned char *buff,unsigned int length);
66struct tcp_pcb *check_tcp_connect(void);
67
80#ifdef __cplusplus
81}
82#endif
83
84#endif
tcp_client_pcb
struct tcp_pcb * tcp_client_pcb
check_tcp_connect
struct tcp_pcb * check_tcp_connect(void)
check connection
Definition: tcp_client.c:74
tcp_client_send_data
err_t tcp_client_send_data(struct tcp_pcb *cpcb, unsigned char *buff, unsigned int length)
tcp client send data
Definition: tcp_client.c:59
tcp_client_init
void tcp_client_init(uint16_t local_port, uint16_t remote_port, unsigned char a, unsigned char b, unsigned char c, unsigned char d)
initialize tcp client
Definition: tcp_client.c:144


AT32F435/437 Firmwary Library: tcp_server.c File Reference

  • emac
  • tcp_server
  • src
Functions
tcp_server.c File Reference

implement tcp server More...

#include "tcp_server.h"
#include "lwip/err.h"
#include "lwip/tcp.h"
#include "string.h"

Go to the source code of this file.

Functions

static err_t | tcp_server_recv (void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
receive and transmit tcp data More...
static err_t | tcp_server_accept (void *arg, struct tcp_pcb *pcb, err_t err)
callback function for receiving data More...
void | tcp_server_init (void)
initialize tcp server More...

Detailed Description

implement tcp server

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file tcp_server.c.


AT32F435/437 Firmwary Library: tcp_server.c Source File

  • emac
  • tcp_server
  • src
tcp_server.c
Go to the documentation of this file.
1
27#include "tcp_server.h"
28#include "lwip/err.h"
29#include "lwip/tcp.h"
30#include "string.h"
31
48static err_t tcp_server_recv(void *arg, struct tcp_pcb *pcb,struct pbuf *p,err_t err)
49{
50 char* pPrintBuf;
51 if(p != NULL)
52 {
53 pPrintBuf = (char*)malloc(p->tot_len * sizeof(char));
54 memset(pPrintBuf, 0, p->tot_len * sizeof(char));
55 strncpy(pPrintBuf, p->payload, p->tot_len);
56 tcp_recved(pcb, p->tot_len); /* Get data length; tot_len: length of tcp data block */
57 tcp_write(pcb,p->payload,p->tot_len,TCP_WRITE_FLAG_COPY); /* payload is starting position of TCP data block */
58 tcp_output(pcb);
59 tcp_write(pcb, QUIZ_MESSAGE, strlen(QUIZ_MESSAGE), 1);
60 }
61 else
62 {
63 tcp_close(pcb); /* TCP server shouldn't close this session actively */
64 }
65 pbuf_free(p); /* free the TCP segment */
66 free(pPrintBuf);
67 err = ERR_OK;
68 return err;
69}
70
78static err_t tcp_server_accept(void *arg,struct tcp_pcb *pcb,err_t err)
79{
80 tcp_setprio(pcb, TCP_PRIO_MIN); /* set the priority of callback function, if there are multiple session exist, this function must be called */
81 tcp_recv(pcb,tcp_server_recv); /* set callbacl function for TCP segments come in */
82
83 tcp_write(pcb, QUIZ_MESSAGE, strlen(QUIZ_MESSAGE), 1);
84 err = ERR_OK;
85 return err;
86}
87
93void tcp_server_init(void)
94{
95 struct tcp_pcb *pcb;
96 err_t err;
97 /*****************************************************/
98 pcb = tcp_new(); /* create TCP protocol control block for communication */
99 if (!pcb)
100 {
101 return ;
102 }
103 err = tcp_bind(pcb,IP_ADDR_ANY,TCP_LOCAL_PORT); /* bind local IP and port for TCP server */
104 if(err != ERR_OK)
105 {
106 return ;
107 }
108 pcb = tcp_listen(pcb); /* entering listening status */
109 tcp_accept(pcb,tcp_server_accept); /* set callback function for connection requestion */
110
111}
112
tcp_server_init
void tcp_server_init(void)
initialize tcp server
Definition: tcp_server.c:93
tcp_server_recv
static err_t tcp_server_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
receive and transmit tcp data
Definition: tcp_server.c:48
tcp_server_accept
static err_t tcp_server_accept(void *arg, struct tcp_pcb *pcb, err_t err)
callback function for receiving data
Definition: tcp_server.c:78
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
TCP_LOCAL_PORT
#define TCP_LOCAL_PORT
Definition: tcp_client.h:50
QUIZ_MESSAGE
#define QUIZ_MESSAGE
Definition: tcp_server.h:48
pcb
struct tcp_pcb * pcb
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:63
tcp_server.h
tcp server header


AT32F435/437 Firmwary Library: tcp_server.h File Reference

  • emac
  • tcp_server
  • inc
Macros | Functions
tcp_server.h File Reference

tcp server header More...

Go to the source code of this file.

Macros

#define | TCP_LOCAL_PORT (1030)
#define | QUIZ_MESSAGE "\r\nHello. 8+9 = ?\r\n"

Functions

void tcp_server_init (void)
initialize tcp server More...

Detailed Description

tcp server header

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file tcp_server.h.


AT32F435/437 Firmwary Library: tcp_server.h Source File

  • emac
  • tcp_server
  • inc
tcp_server.h
Go to the documentation of this file.
1
27#ifndef _TCP_SERVER_H_
28#define _TCP_SERVER_H_
29
30#ifdef __cplusplus
31 extern "C" {
32#endif
33
46/*TCP server port*/
47#define TCP_LOCAL_PORT (1030)
48#define QUIZ_MESSAGE "\r\nHello. 8+9 = ?\r\n"
49
57void tcp_server_init(void);
58
71#ifdef __cplusplus
72}
73#endif
74
75#endif
tcp_server_init
void tcp_server_init(void)
initialize tcp server
Definition: tcp_server.c:93


AT32F435/437 Firmwary Library: telnet.c File Reference

  • emac
  • telnet
  • src
Data Structures | Macros | Functions
telnet.c File Reference

telnet implement header file More...

#include "telnet.h"
#include "lwip/tcp.h"
#include <string.h>
#include <stdio.h>

Go to the source code of this file.

Data Structures

struct name

Macros

#define | GREETING "Hello. What is your name?\r\n"
#define | HELLO "Nice to meet you, "
#define | MAX_NAME_SIZE (32)

Functions

static err_t | helloworld_recv (void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
called when a data is received on the telnet connection More...
static err_t | helloworld_accept (void *arg, struct tcp_pcb *pcb, err_t err)
this function when the telnet connection is established More...
static void | helloworld_conn_err (void *arg, err_t err)
this function is called when an error occurs on the connection More...
void | helloworld_init (void)
initialize the hello application More...

Detailed Description

telnet implement header file

telnet implement

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file telnet.c.


AT32F435/437 Firmwary Library: telnet.c Source File

  • emac
  • telnet
  • src
telnet.c
Go to the documentation of this file.
1
27/* Includes ------------------------------------------------------------------*/
28#include "telnet.h"
29#include "lwip/tcp.h"
30#include <string.h>
31#include <stdio.h>
32
41/* Private typedef -----------------------------------------------------------*/
42/* Private define ------------------------------------------------------------*/
43#define GREETING "Hello. What is your name?\r\n"
44#define HELLO "Nice to meet you, "
45#define MAX_NAME_SIZE (32)
46
47/* Private macro -------------------------------------------------------------*/
48/* Private variables ---------------------------------------------------------*/
49struct name
50{
51 int length;
52 char bytes[MAX_NAME_SIZE];
53};
54
55/* Private function prototypes -----------------------------------------------*/
56static err_t helloworld_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err);
57static err_t helloworld_accept(void *arg, struct tcp_pcb *pcb, err_t err);
58static void helloworld_conn_err(void *arg, err_t err);
59
60/* Private functions ---------------------------------------------------------*/
61
70static err_t helloworld_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
71{
72 struct pbuf *q;
73 struct name *name = (struct name *)arg;
74 int done;
75 char *c;
76 int i;
77
78
79 /* We perform here any necessary processing on the pbuf */
80 if (p != NULL)
81 {
82 /* We call this function to tell the LwIp that we have processed the data */
83 /* This lets the stack advertise a larger window, so more data can be received*/
84 tcp_recved(pcb, p->tot_len);
85
86 /* Check the name if NULL, no data success, return withh illegal argument error */
87 if(!name)
88 {
89 pbuf_free(p);
90 return ERR_ARG;
91 }
92
93 done = 0;
94 for(q=p; q != NULL; q = q->next)
95 {
96 c = q->payload;
97 for(i=0; i<q->len && !done; i++)
98 {
99 done = ((c[i] == '\r') || (c[i] == '\n'));
100 if(name->length < MAX_NAME_SIZE)
101 {
102 name->bytes[name->length++] = c[i];
103 }
104 }
105 }
106 if(done)
107 {
108 if(name->bytes[name->length-2] != '\r' || name->bytes[name->length-1] != '\n')
109 {
110 if((name->bytes[name->length-1] == '\r' || name->bytes[name->length-1] == '\n') && (name->length+1 <= MAX_NAME_SIZE))
111 {
112 name->length += 1;
113 }
114 else if(name->length+2 <= MAX_NAME_SIZE)
115 {
116 name->length += 2;
117 }
118 else
119 {
120 name->length = MAX_NAME_SIZE;
121 }
122
123 name->bytes[name->length-2] = '\r';
124 name->bytes[name->length-1] = '\n';
125 }
126 tcp_write(pcb, HELLO, strlen(HELLO), 1);
127
128 tcp_write(pcb, name->bytes, name->length, TCP_WRITE_FLAG_COPY);
129 name->length = 0;
130
131 /* for next prompt */
132 tcp_write(pcb, GREETING, strlen(GREETING), 1);
133 }
134
135 /* End of processing, we free the pbuf */
136 pbuf_free(p);
137 }
138 else if (err == ERR_OK)
139 {
140 /* When the pbuf is NULL and the err is ERR_OK, the remote end is closing the connection. */
141 /* We free the allocated memory and we close the connection */
142 mem_free(name);
143 return tcp_close(pcb);
144 }
145 return ERR_OK;
146
147
148}
149
157static err_t helloworld_accept(void *arg, struct tcp_pcb *pcb, err_t err)
158{
159
160 /* Tell LwIP to associate this structure with this connection. */
161 tcp_arg(pcb, mem_calloc(sizeof(struct name), 1));
162
163 /* Configure LwIP to use our call back functions. */
164 tcp_err(pcb, helloworld_conn_err);
165 tcp_recv(pcb, helloworld_recv);
166
167 /* Send out the first message */
168 tcp_write(pcb, GREETING, strlen(GREETING), 1);
169 return ERR_OK;
170}
171
177void helloworld_init(void)
178{
179 struct tcp_pcb *pcb;
180 ip_addr_t src;
181
182 IP4_ADDR(&src,TELNET_IP_ADDR_0,TELNET_IP_ADDR_1,TELNET_IP_ADDR_2,TELNET_IP_ADDR_3); //assign a specific IP
183
184 /* Create a new TCP control block */
185 pcb = tcp_new();
186
187 /* Assign to the new pcb a local IP address and a port number */
188 /* Using IP_ADDR_ANY allow the pcb to be used by any local interface */
189 tcp_bind(pcb, &src, 23);
190
191 /* Set the connection to the LISTEN state */
192 pcb = tcp_listen(pcb);
193
194 /* Specify the function to be called when a connection is established */
195 tcp_accept(pcb, helloworld_accept);
196}
197
204static void helloworld_conn_err(void *arg, err_t err)
205{
206 struct name *name;
207 name = (struct name *)arg;
208
209 mem_free(name);
210}
211
helloworld_init
void helloworld_init(void)
initialize the hello application
Definition: telnet.c:177
GREETING
#define GREETING
Definition: telnet.c:43
helloworld_accept
static err_t helloworld_accept(void *arg, struct tcp_pcb *pcb, err_t err)
this function when the telnet connection is established
Definition: telnet.c:157
HELLO
#define HELLO
Definition: telnet.c:44
MAX_NAME_SIZE
#define MAX_NAME_SIZE
Definition: telnet.c:45
helloworld_recv
static err_t helloworld_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
called when a data is received on the telnet connection
Definition: telnet.c:70
helloworld_conn_err
static void helloworld_conn_err(void *arg, err_t err)
this function is called when an error occurs on the connection
Definition: telnet.c:204
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
TELNET_IP_ADDR_1
#define TELNET_IP_ADDR_1
Definition: telnet.h:47
TELNET_IP_ADDR_0
#define TELNET_IP_ADDR_0
Definition: telnet.h:46
TELNET_IP_ADDR_2
#define TELNET_IP_ADDR_2
Definition: telnet.h:48
TELNET_IP_ADDR_3
#define TELNET_IP_ADDR_3
Definition: telnet.h:49
pcb
struct tcp_pcb * pcb
Definition: project/at_start_f437/examples/emac/mqtt_client/src/netconf.c:63
name
Definition: telnet.c:50
name::bytes
char bytes[(32)]
Definition: telnet.c:52
name::length
int length
Definition: telnet.c:51
telnet.h


AT32F435/437 Firmwary Library: telnet.h File Reference

  • emac
  • telnet
  • inc
Macros | Functions
telnet.h File Reference

Go to the source code of this file.

Macros

#define | TELNET_IP_ADDR_0 (192)
#define | TELNET_IP_ADDR_1 (168)
#define | TELNET_IP_ADDR_2 (81)
#define | TELNET_IP_ADDR_3 (37)

Functions

void | helloworld_init (void)
initialize the hello application More...
void | httpd_init (void)


AT32F435/437 Firmwary Library: telnet.h Source File

  • emac
  • telnet
  • inc
telnet.h
Go to the documentation of this file.
1
27/* Define to prevent recursive inclusion -------------------------------------*/
28#ifndef __HELLOWERLOD_H
29#define __HELLOWERLOD_H
30
39#ifdef __cplusplus
40 extern "C" {
41#endif
42
46#define TELNET_IP_ADDR_0 (192)
47#define TELNET_IP_ADDR_1 (168)
48#define TELNET_IP_ADDR_2 (81)
49#define TELNET_IP_ADDR_3 (37)
50
58void helloworld_init(void);
59void httpd_init(void);
64#ifdef __cplusplus
65}
66#endif
67
75#endif /* __HELLOWERLOD_H */
helloworld_init
void helloworld_init(void)
initialize the hello application
Definition: telnet.c:177
httpd_init
void httpd_init(void)
Definition: httpd.c:2244


AT32F435/437 Firmwary Library: tftpserver.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
tftpserver.c File Reference

basic tftp server implementation for IAP (only Write Req supported) More...

#include "tftpserver.h"
#include "flash.h"
#include "string.h"
#include "stdio.h"
#include "iap.h"

Go to the source code of this file.

Detailed Description

basic tftp server implementation for IAP (only Write Req supported)

                  Copyright notice & Disclaimer

The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file tftpserver.c.


AT32F435/437 Firmwary Library: tftpserver.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
tftpserver.c
Go to the documentation of this file.
1
25/* Includes ------------------------------------------------------------------*/
26#include "tftpserver.h"
27#include "flash.h"
28#include "string.h"
29#include "stdio.h"
30#include "iap.h"
31
32#ifdef USE_IAP_TFTP
33
34/* Private variables ---------------------------------------------------------*/
35static uint32_t flash_write_address;
36static struct udp_pcb *udppcb;
37static __IO uint32_t total_count=0;
38 flag_status tftp_iap_flag = RESET;
39
40/* Private function prototypes -----------------------------------------------*/
41
42static void iap_wrq_recv_callback(void *_args, struct udp_pcb *upcb, struct pbuf *pkt_buf,
43 ip_addr_t *addr, u16_t port);
44
45static int iap_tftp_process_write(struct udp_pcb *upcb, ip_addr_t *to, int to_port);
46
47static void iap_tftp_recv_callback(void *arg, struct udp_pcb *Upcb, struct pbuf *pkt_buf,
48 ip_addr_t *addr, u16_t port);
49
50static void iap_tftp_cleanup_wr(struct udp_pcb *upcb, tftp_connection_args *args);
51static tftp_opcode iap_tftp_decode_op(char *buf);
52static u16_t iap_tftp_extract_block(char *buf);
53static void iap_tftp_set_opcode(char *buffer, tftp_opcode opcode);
54static void iap_tftp_set_block(char* packet, u16_t block);
55static err_t iap_tftp_send_ack_packet(struct udp_pcb *upcb, ip_addr_t *to, int to_port, int block);
56
57/* Private functions ---------------------------------------------------------*/
58
59
65static tftp_opcode iap_tftp_decode_op(char *buf)
66{
67 return (tftp_opcode)(buf[1]);
68}
69
75static u16_t iap_tftp_extract_block(char *buf)
76{
77 u16_t *b = (u16_t*)buf;
78 return ntohs(b[1]);
79}
80
87static void iap_tftp_set_opcode(char *buffer, tftp_opcode opcode)
88{
89 buffer[0] = 0;
90 buffer[1] = (u8_t)opcode;
91}
92
99static void iap_tftp_set_block(char* packet, u16_t block)
100{
101 u16_t *p = (u16_t *)packet;
102 p[1] = htons(block);
103}
104
113static err_t iap_tftp_send_ack_packet(struct udp_pcb *upcb, ip_addr_t *to, int to_port, int block)
114{
115 err_t err;
116 struct pbuf *pkt_buf; /* chain of pbuf's to be sent */
117
118 /* create the maximum possible size packet that a tftp ack packet can be */
119 char packet[TFTP_ACK_PKT_LEN];
120
121 /* define the first two bytes of the packet */
122 iap_tftp_set_opcode(packet, TFTP_ACK);
123
124 /* specify the block number being ack'd.
125 * if we are ack'ing a data pkt then the block number echoes that of the data pkt being ack'd (duh)
126 * if we are ack'ing a wrq pkt then the block number is always 0
127 * rrq packets are never sent ack pkts by the server, instead the server sends data pkts to the
128 * host which are, obviously, used as the "acknowledgement". this saves from having to sendtransferboth
129 * an ack packet and a data packet for rrqs - see rfc1350 for more info. */
130 iap_tftp_set_block(packet, block);
131
132 /* pbuf_transport - specifies the transport layer */
133 pkt_buf = pbuf_alloc(PBUF_TRANSPORT, TFTP_ACK_PKT_LEN, PBUF_POOL);
134
135 if (!pkt_buf) /*if the packet pbuf == null exit and endtransfertransmission */
136 {
137 return ERR_MEM;
138 }
139
140 /* copy the original data buffer over to the packet buffer's payload */
141 memcpy(pkt_buf->payload, packet, TFTP_ACK_PKT_LEN);
142
143 /* sending packet by udp protocol */
144 err = udp_sendto(upcb, pkt_buf, to, to_port);
145
146 /* free the buffer pbuf */
147 pbuf_free(pkt_buf);
148
149 return err;
150}
151
161static void iap_wrq_recv_callback(void *_args, struct udp_pcb *upcb, struct pbuf *pkt_buf, ip_addr_t *addr, u16_t port)
162{
163 tftp_connection_args *args = (tftp_connection_args *)_args;
164 uint32_t data_buffer[128];
165 u16 count=0;
166
167 if (pkt_buf->len != pkt_buf->tot_len)
168 {
169 return;
170 }
171
172 /* does this packet have any valid data to write? */
173 if ((pkt_buf->len > TFTP_DATA_PKT_HDR_LEN) &&
174 (iap_tftp_extract_block(pkt_buf->payload) == (args->block + 1)))
175 {
176 /* copy packet payload to data_buffer */
177 pbuf_copy_partial(pkt_buf, data_buffer, pkt_buf->len - TFTP_DATA_PKT_HDR_LEN,
178 TFTP_DATA_PKT_HDR_LEN);
179
180 total_count += pkt_buf->len - TFTP_DATA_PKT_HDR_LEN;
181
182 count = (pkt_buf->len - TFTP_DATA_PKT_HDR_LEN)/4;
183 if (((pkt_buf->len - TFTP_DATA_PKT_HDR_LEN)%4)!=0)
184 count++;
185
186 /* write received data in flash */
187 flash_if_write(&flash_write_address, data_buffer ,count);
188
189 /* update our block number to match the block number just received */
190 args->block++;
191 /* update total bytes */
192 (args->tot_bytes) += (pkt_buf->len - TFTP_DATA_PKT_HDR_LEN);
193
194 /* this is a valid pkt but it has no data. this would occur if the file being
195 written is an exact multiple of 512 bytes. in this case, the args->block
196 value must still be updated, but we can skip everything else. */
197 }
198 else if (iap_tftp_extract_block(pkt_buf->payload) == (args->block + 1))
199 {
200 /* update our block number to match the block number just received */
201 args->block++;
202 }
203
204 /* send the appropriate ack pkt*/
205 iap_tftp_send_ack_packet(upcb, addr, port, args->block);
206
207 /* if the last write returned less than the maximum tftp data pkt length,
208 * then we've received the whole file and so we can quit (this is how tftp
209 * signals the endtransferof a transfer!)
210 */
211 if (pkt_buf->len < TFTP_DATA_PKT_LEN_MAX)
212 {
213 iap_init();
214 iap_tftp_cleanup_wr(upcb, args);
215 pbuf_free(pkt_buf);
216 tftp_iap_flag = RESET;
217 }
218 else
219 {
220 pbuf_free(pkt_buf);
221 return;
222 }
223}
224
225
232static int iap_tftp_process_write(struct udp_pcb *upcb, ip_addr_t *to, int to_port)
233{
234 tftp_connection_args *args = NULL;
235 /* this function is called from a callback,
236 * therefore interrupts are disabled,
237 * therefore we can use regular malloc */
238 args = mem_malloc(sizeof *args);
239 if (!args)
240 {
241 iap_tftp_cleanup_wr(upcb, args);
242 return 0;
243 }
244
245 args->op = TFTP_WRQ;
246 args->to_ip.addr = to->addr;
247 args->to_port = to_port;
248 /* the block # used as a positive response to a wrq is _always_ 0!!! (see rfc1350) */
249 args->block = 0;
250 args->tot_bytes = 0;
251
252 /* set callback for receives on this udp pcb (protocol control block) */
253 udp_recv(upcb, (udp_recv_fn)iap_wrq_recv_callback, args);
254
255 total_count =0;
256
257 /* init flash */
258 flash_unlock();
259
260 flash_write_address = APP_START_SECTOR_ADDR;
261 /* initiate the write transaction by sending the first ack */
262 iap_tftp_send_ack_packet(upcb, to, to_port, args->block);
263
264 return 0;
265}
266
267
277static void iap_tftp_recv_callback(void *arg, struct udp_pcb *upcb, struct pbuf *pkt_buf,
278 ip_addr_t *addr, u16_t port)
279{
280 tftp_opcode op;
281 struct udp_pcb *upcb_tftp_data;
282 err_t err;
283
284 /* create new udp pcb structure */
285 upcb_tftp_data = udp_new();
286 if (!upcb_tftp_data)
287 {
288 /* error creating pcb. out of memory */
289 return;
290 }
291
292 /* bind to port 0 to receive next available free port */
293 /* note: this is how tftp works. there is a udp pcb for the standard port
294 * 69 which al transactions begin communication on, however, _all_ subsequent
295 * transactions for a given "stream" occur on another port */
296 err = udp_bind(upcb_tftp_data, IP_ADDR_ANY, 0);
297 if (err != ERR_OK)
298 {
299 /* unable to bind to port */
300 return;
301 }
302
303 op = iap_tftp_decode_op(pkt_buf->payload);
304 if (op != TFTP_WRQ)
305 {
306 /* remove pcb */
307 udp_remove(upcb_tftp_data);
308 }
309 else
310 {
311 /* start the tftp write mode*/
312 tftp_iap_flag = SET;
313 iap_tftp_process_write(upcb_tftp_data, addr, port);
314 }
315 pbuf_free(pkt_buf);
316}
317
318
325static void iap_tftp_cleanup_wr(struct udp_pcb *upcb, tftp_connection_args *args)
326{
327 /* Free the tftp_connection_args structure */
328 mem_free(args);
329
330 /* Disconnect the udp_pcb */
331 udp_disconnect(upcb);
332
333 /* close the connection */
334 udp_remove(upcb);
335
336 /* reset the callback function */
337 udp_recv(udppcb, (udp_recv_fn)iap_tftp_recv_callback, NULL);
338
339}
340
341/* Global functions ---------------------------------------------------------*/
342
348void iap_tftpd_init(void)
349{
350 err_t err;
351 unsigned port = 69; /* 69 is the port used for tftp protocol initial transaction */
352
353 /* create a new UDP PCB structure */
354 udppcb = udp_new();
355 if (!udppcb)
356 {
357 /* error creating pcb. out of memory */
358 return ;
359 }
360
361 /* bind this pcb to port 69 */
362 err = udp_bind(udppcb, IP_ADDR_ANY, port);
363 if (err == ERR_OK)
364 {
365 /* initialize receive callback function */
366 udp_recv(udppcb, (udp_recv_fn)iap_tftp_recv_callback, NULL);
367 }
368}
369
370#endif /* USE_IAP_TFTP */
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
data_buffer
static const uint32_t data_buffer[120]
Definition: project/at_start_f435/examples/crc/calculation/src/main.c:40
flag_status
flag_status
Definition: at32f435_437.h:378
u16
uint16_t u16
Definition: at32f435_437.h:363
RESET
@ RESET
Definition: at32f435_437.h:378
SET
@ SET
Definition: at32f435_437.h:378
flash_unlock
void flash_unlock(void)
unlock the flash controller.
Definition: at32f435_437_flash.c:290
iap_init
void iap_init(void)
iap init.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/iap.c:61
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
flash_if_write
uint32_t flash_if_write(__IO uint32_t *flash_address, uint32_t *data, uint16_t data_length)
this function writes a data buffer in flash (data are 32-bit aligned).
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/flash.c:83
APP_START_SECTOR_ADDR
#define APP_START_SECTOR_ADDR
Definition: at32f437_emac_iap_demo/source_code/bootloader/inc/iap.h:52
tftp_connection_args
Definition: tftpserver.h:22
tftp_connection_args::block
int block
Definition: tftpserver.h:31
tftp_connection_args::to_ip
ip_addr_t to_ip
Definition: tftpserver.h:28
tftp_connection_args::op
int op
Definition: tftpserver.h:23
tftp_connection_args::tot_bytes
int tot_bytes
Definition: tftpserver.h:33
tftp_connection_args::to_port
int to_port
Definition: tftpserver.h:29
tftpserver.h
tftp_opcode
tftp_opcode
Definition: tftpserver.h:41
TFTP_WRQ
@ TFTP_WRQ
Definition: tftpserver.h:43
TFTP_ACK
@ TFTP_ACK
Definition: tftpserver.h:45
TFTP_ACK_PKT_LEN
#define TFTP_ACK_PKT_LEN
Definition: tftpserver.h:16
TFTP_DATA_PKT_HDR_LEN
#define TFTP_DATA_PKT_HDR_LEN
Definition: tftpserver.h:14
iap_tftpd_init
void iap_tftpd_init(void)
TFTP_DATA_PKT_LEN_MAX
#define TFTP_DATA_PKT_LEN_MAX
Definition: tftpserver.h:17
tftp_iap_flag
flag_status tftp_iap_flag


AT32F435/437 Firmwary Library: tftpserver.h File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
Data Structures | Macros | Enumerations | Functions
tftpserver.h File Reference
#include "lwip/mem.h"
#include "lwip/udp.h"

Go to the source code of this file.

Data Structures

struct tftp_connection_args

Macros

#define | TFTP_OPCODE_LEN 2
#define | TFTP_BLKNUM_LEN 2
#define | TFTP_DATA_LEN_MAX 512
#define | TFTP_DATA_PKT_HDR_LEN (TFTP_OPCODE_LEN + TFTP_BLKNUM_LEN)
#define | TFTP_ERR_PKT_HDR_LEN (TFTP_OPCODE_LEN + TFTP_ERRCODE_LEN)
#define | TFTP_ACK_PKT_LEN (TFTP_OPCODE_LEN + TFTP_BLKNUM_LEN)
#define | TFTP_DATA_PKT_LEN_MAX (TFTP_DATA_PKT_HDR_LEN + TFTP_DATA_LEN_MAX)
#define | TFTP_MAX_RETRIES 3
#define | TFTP_TIMEOUT_INTERVAL 5

Enumerations

enum tftp_opcode {
TFTP_RRQ = 1 , TFTP_WRQ = 2 , TFTP_DATA = 3 , TFTP_ACK = 4 ,
TFTP_ERROR = 5
}
enum tftp_errorcode {
TFTP_ERR_NOTDEFINED , TFTP_ERR_FILE_NOT_FOUND , TFTP_ERR_ACCESS_VIOLATION , TFTP_ERR_DISKFULL ,
TFTP_ERR_ILLEGALOP , TFTP_ERR_UKNOWN_TRANSFER_ID , TFTP_ERR_FILE_ALREADY_EXISTS , TFTP_ERR_NO_SUCH_USER
}

Functions

void iap_tftpd_init (void)

Macro Definition Documentation

◆ TFTP_ACK_PKT_LEN

#define TFTP_ACK_PKT_LEN (TFTP_OPCODE_LEN + TFTP_BLKNUM_LEN)

Definition at line 16 of file tftpserver.h.

◆ TFTP_BLKNUM_LEN

#define TFTP_BLKNUM_LEN 2

Definition at line 12 of file tftpserver.h.

◆ TFTP_DATA_LEN_MAX

#define TFTP_DATA_LEN_MAX 512

Definition at line 13 of file tftpserver.h.

◆ TFTP_DATA_PKT_HDR_LEN

#define TFTP_DATA_PKT_HDR_LEN (TFTP_OPCODE_LEN + TFTP_BLKNUM_LEN)

Definition at line 14 of file tftpserver.h.

◆ TFTP_DATA_PKT_LEN_MAX

#define TFTP_DATA_PKT_LEN_MAX (TFTP_DATA_PKT_HDR_LEN + TFTP_DATA_LEN_MAX)

Definition at line 17 of file tftpserver.h.

◆ TFTP_ERR_PKT_HDR_LEN

#define TFTP_ERR_PKT_HDR_LEN (TFTP_OPCODE_LEN + TFTP_ERRCODE_LEN)

Definition at line 15 of file tftpserver.h.

◆ TFTP_MAX_RETRIES

#define TFTP_MAX_RETRIES 3

Definition at line 18 of file tftpserver.h.

◆ TFTP_OPCODE_LEN

#define TFTP_OPCODE_LEN 2

Definition at line 11 of file tftpserver.h.

◆ TFTP_TIMEOUT_INTERVAL

#define TFTP_TIMEOUT_INTERVAL 5

Definition at line 19 of file tftpserver.h.

Enumeration Type Documentation

◆ tftp_errorcode

enum tftp_errorcode
Enumerator
TFTP_ERR_NOTDEFINED
TFTP_ERR_FILE_NOT_FOUND
TFTP_ERR_ACCESS_VIOLATION
TFTP_ERR_DISKFULL
TFTP_ERR_ILLEGALOP
TFTP_ERR_UKNOWN_TRANSFER_ID
TFTP_ERR_FILE_ALREADY_EXISTS
TFTP_ERR_NO_SUCH_USER

Definition at line 50 of file tftpserver.h.

◆ tftp_opcode

enum tftp_opcode
Enumerator
TFTP_RRQ
TFTP_WRQ
TFTP_DATA
TFTP_ACK
TFTP_ERROR

Definition at line 41 of file tftpserver.h.

Function Documentation

◆ iap_tftpd_init()

void iap_tftpd_init ( void )

Referenced by main().


AT32F435/437 Firmwary Library: tftpserver.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
tftpserver.h
Go to the documentation of this file.
1#ifndef __TFTPSERVER_H_
2#define __TFTPSERVER_H_
3
4#ifdef __cplusplus
5 extern "C" {
6#endif
7
8#include "lwip/mem.h"
9#include "lwip/udp.h"
10
11#define TFTP_OPCODE_LEN 2
12#define TFTP_BLKNUM_LEN 2
13#define TFTP_DATA_LEN_MAX 512
14#define TFTP_DATA_PKT_HDR_LEN (TFTP_OPCODE_LEN + TFTP_BLKNUM_LEN)
15#define TFTP_ERR_PKT_HDR_LEN (TFTP_OPCODE_LEN + TFTP_ERRCODE_LEN)
16#define TFTP_ACK_PKT_LEN (TFTP_OPCODE_LEN + TFTP_BLKNUM_LEN)
17#define TFTP_DATA_PKT_LEN_MAX (TFTP_DATA_PKT_HDR_LEN + TFTP_DATA_LEN_MAX)
18#define TFTP_MAX_RETRIES 3
19#define TFTP_TIMEOUT_INTERVAL 5
20
21typedef struct
22{
23 int op; /*wrq */
24 /* last block read */
25 char data[TFTP_DATA_PKT_LEN_MAX];
26 int data_len;
27 /* destination ip:port */
28 ip_addr_t to_ip;
29 int to_port;
30 /* next block number */
31 int block;
32 /* total number of bytes transferred */
33 int tot_bytes;
34 /* timer interrupt count when last packet was sent */
35 /* this should be used to resend packets on timeout */
36 unsigned long long last_time;
37
38}tftp_connection_args;
39
40/* tftp opcodes as specified in rfc1350 */
41typedef enum {
42 TFTP_RRQ = 1,
43 TFTP_WRQ = 2,
44 TFTP_DATA = 3,
45 TFTP_ACK = 4,
46 TFTP_ERROR = 5
47} tftp_opcode;
48
49/* tftp error codes as specified in rfc1350 */
50typedef enum {
51 TFTP_ERR_NOTDEFINED,
52 TFTP_ERR_FILE_NOT_FOUND,
53 TFTP_ERR_ACCESS_VIOLATION,
54 TFTP_ERR_DISKFULL,
55 TFTP_ERR_ILLEGALOP,
56 TFTP_ERR_UKNOWN_TRANSFER_ID,
57 TFTP_ERR_FILE_ALREADY_EXISTS,
58 TFTP_ERR_NO_SUCH_USER,
59} tftp_errorcode;
60
61void iap_tftpd_init(void);
62
63#ifdef __cplusplus
64}
65#endif
66
67#endif
tftp_connection_args
Definition: tftpserver.h:22
tftp_connection_args::data_len
int data_len
Definition: tftpserver.h:26
tftp_connection_args::last_time
unsigned long long last_time
Definition: tftpserver.h:36
tftp_connection_args::block
int block
Definition: tftpserver.h:31
tftp_connection_args::to_ip
ip_addr_t to_ip
Definition: tftpserver.h:28
tftp_connection_args::op
int op
Definition: tftpserver.h:23
tftp_connection_args::tot_bytes
int tot_bytes
Definition: tftpserver.h:33
tftp_connection_args::to_port
int to_port
Definition: tftpserver.h:29
tftp_opcode
tftp_opcode
Definition: tftpserver.h:41
TFTP_ERROR
@ TFTP_ERROR
Definition: tftpserver.h:46
TFTP_DATA
@ TFTP_DATA
Definition: tftpserver.h:44
TFTP_RRQ
@ TFTP_RRQ
Definition: tftpserver.h:42
TFTP_WRQ
@ TFTP_WRQ
Definition: tftpserver.h:43
TFTP_ACK
@ TFTP_ACK
Definition: tftpserver.h:45
iap_tftpd_init
void iap_tftpd_init(void)
tftp_errorcode
tftp_errorcode
Definition: tftpserver.h:50
TFTP_ERR_NOTDEFINED
@ TFTP_ERR_NOTDEFINED
Definition: tftpserver.h:51
TFTP_ERR_UKNOWN_TRANSFER_ID
@ TFTP_ERR_UKNOWN_TRANSFER_ID
Definition: tftpserver.h:56
TFTP_ERR_NO_SUCH_USER
@ TFTP_ERR_NO_SUCH_USER
Definition: tftpserver.h:58
TFTP_ERR_FILE_ALREADY_EXISTS
@ TFTP_ERR_FILE_ALREADY_EXISTS
Definition: tftpserver.h:57
TFTP_ERR_ILLEGALOP
@ TFTP_ERR_ILLEGALOP
Definition: tftpserver.h:55
TFTP_ERR_DISKFULL
@ TFTP_ERR_DISKFULL
Definition: tftpserver.h:54
TFTP_ERR_FILE_NOT_FOUND
@ TFTP_ERR_FILE_NOT_FOUND
Definition: tftpserver.h:52
TFTP_ERR_ACCESS_VIOLATION
@ TFTP_ERR_ACCESS_VIOLATION
Definition: tftpserver.h:53
TFTP_DATA_PKT_LEN_MAX
#define TFTP_DATA_PKT_LEN_MAX
Definition: tftpserver.h:17


AT32F435/437 Firmwary Library: usb_core.c Source File

  • middlewares
  • usb_drivers
  • src
usb_core.c
Go to the documentation of this file.
1
26#include "usb_core.h"
27
41 usb_sts_type usb_core_config(otg_core_type *udev, uint8_t core_id);
42
49 usb_sts_type usb_core_config(otg_core_type *otgdev, uint8_t core_id)
50{
51 /* set usb speed and core id */
52 otgdev->cfg.speed = core_id;
53 otgdev->cfg.core_id = core_id;
54
55 /* default sof out and vbus ignore */
56 otgdev->cfg.sof_out = FALSE;
57 otgdev->cfg.vbusig = FALSE;
58
59 /* set max size */
60 otgdev->cfg.max_size = 64;
61
62 /* set support number of channel and endpoint */
63#ifdef USE_OTG_HOST_MODE
64 otgdev->cfg.hc_num = USB_HOST_CHANNEL_NUM;
65#endif
66#ifdef USE_OTG_DEVICE_MODE
67 otgdev->cfg.ept_num = USB_EPT_MAX_NUM;
68#endif
69 otgdev->cfg.fifo_size = OTG_FIFO_SIZE;
70 if(core_id == USB_FULL_SPEED_CORE_ID)
71 {
72 otgdev->cfg.phy_itface = 2;
73 }
74#ifdef USB_SOF_OUTPUT_ENABLE
75 otgdev->cfg.sof_out = TRUE;
76#endif
77
78#ifdef USB_VBUS_IGNORE
79 otgdev->cfg.vbusig = TRUE;
80#endif
81
82 return USB_OK;
83}
84
85#ifdef USE_OTG_DEVICE_MODE
98 usb_sts_type usbd_init(otg_core_type *otgdev,
99 uint8_t core_id, uint8_t usb_id,
100 usbd_class_handler *class_handler,
101 usbd_desc_handler *desc_handler)
102{
103 usb_sts_type usb_sts = USB_OK;
104
105 /* select use OTG1 or OTG2 */
106 otgdev->usb_reg = usb_global_select_core(usb_id);
107
108 /* usb device core config */
109 usb_core_config(otgdev, core_id);
110
111 if(otgdev->cfg.sof_out)
112 {
113 otgdev->usb_reg->gccfg_bit.sofouten = TRUE;
114 }
115
116 if(otgdev->cfg.vbusig)
117 {
118 otgdev->usb_reg->gccfg_bit.vbusig = TRUE;
119 }
120
121 /* usb device core init */
122 usbd_core_init(&(otgdev->dev), otgdev->usb_reg,
123 class_handler,
124 desc_handler,
125 core_id);
126
127 return usb_sts;
128}
129#endif
130
131#ifdef USE_OTG_HOST_MODE
132
145 usb_sts_type usbh_init(otg_core_type *otgdev,
146 uint8_t core_id, uint8_t usb_id,
147 usbh_class_handler_type *class_handler,
148 usbh_user_handler_type *user_handler)
149{
150 usb_sts_type status = USB_OK;
151
152 /* select use otg1 or otg2 */
153 otgdev->usb_reg = usb_global_select_core(usb_id);
154
155 /* usb core config */
156 usb_core_config(otgdev, core_id);
157
158 if(otgdev->cfg.sof_out)
159 {
160 otgdev->usb_reg->gccfg_bit.sofouten = TRUE;
161 }
162
163 if(otgdev->cfg.vbusig)
164 {
165 otgdev->usb_reg->gccfg_bit.vbusig = TRUE;
166 }
167
168 /* usb host core init */
169 usbh_core_init(&otgdev->host, otgdev->usb_reg,
170 class_handler,
171 user_handler,
172 core_id);
173
174 return status;
175}
176#endif
177
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_core_config
usb_sts_type usb_core_config(otg_core_type *udev, uint8_t core_id)
usb core config
Definition: usb_core.c:49
usb_global_select_core
otg_global_type * usb_global_select_core(uint8_t usb_id)
usb global select usb core (otg1 or otg2).
Definition: at32f435_437_usb.c:100
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
USB_OK
@ USB_OK
Definition: usb_std.h:268
usbd_core_init
usb_sts_type usbd_core_init(usbd_core_type *udev, usb_reg_type *usb_reg, usbd_class_handler *class_handler, usbd_desc_handler *desc_handler, uint8_t core_id)
usb device core initialization
Definition: usbd_core.c:744
usbh_core_init
usb_sts_type usbh_core_init(usbh_core_type *uhost, usb_reg_type *usb_reg, usbh_class_handler_type *class_handler, usbh_user_handler_type *user_handler, uint8_t core_id)
usb host core initialize
Definition: usbh_core.c:501
OTG_FIFO_SIZE
#define OTG_FIFO_SIZE
otg fifo size (word)
Definition: at32f435_437_usb.h:316
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
otg_core_type::cfg
usb_core_cfg cfg
Definition: usb_core.h:102
otg_core_type::usb_reg
usb_reg_type * usb_reg
Definition: usb_core.h:93
otg_global_type::vbusig
__IO uint32_t vbusig
Definition: at32f435_437_usb.h:728
otg_global_type::sofouten
__IO uint32_t sofouten
Definition: at32f435_437_usb.h:727
otg_global_type::gccfg_bit
struct otg_global_type::@1173::@1193 gccfg_bit
usb_core_cfg::sof_out
uint8_t sof_out
Definition: usb_core.h:83
usb_core_cfg::fifo_size
uint16_t fifo_size
Definition: usb_core.h:79
usb_core_cfg::hc_num
uint8_t hc_num
Definition: usb_core.h:75
usb_core_cfg::vbusig
uint8_t vbusig
Definition: usb_core.h:85
usb_core_cfg::phy_itface
uint8_t phy_itface
Definition: usb_core.h:80
usb_core_cfg::core_id
uint8_t core_id
Definition: usb_core.h:81
usb_core_cfg::speed
uint8_t speed
Definition: usb_core.h:73
usb_core_cfg::max_size
uint16_t max_size
Definition: usb_core.h:78
usb_core_cfg::ept_num
uint8_t ept_num
Definition: usb_core.h:76
usb_core.h
usb core header file


AT32F435/437 Firmwary Library: usb_core.h Source File

  • middlewares
  • usb_drivers
  • inc
usb_core.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CORE_H
29#define __USB_CORE_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
36#include "usb_std.h"
37#include "usb_conf.h"
38
39#ifdef USE_OTG_DEVICE_MODE
40#include "usbd_core.h"
41#endif
42#ifdef USE_OTG_HOST_MODE
43#include "usbh_core.h"
44#endif
45
61typedef enum
62{
63 USB_LOW_SPEED_CORE_ID,
64 USB_FULL_SPEED_CORE_ID,
65 USB_HIGH_SPEED_CORE_ID,
66} usb_speed_type;
67
71typedef struct
72{
73 uint8_t speed;
74 uint8_t dma_en;
75 uint8_t hc_num;
76 uint8_t ept_num;
78 uint16_t max_size;
79 uint16_t fifo_size;
80 uint8_t phy_itface;
81 uint8_t core_id;
82 uint8_t low_power;
83 uint8_t sof_out;
84 uint8_t usb_id;
85 uint8_t vbusig;
86} usb_core_cfg;
87
91typedef struct
92{
93 usb_reg_type *usb_reg;
94#ifdef USE_OTG_DEVICE_MODE
95 usbd_core_type dev;
96#endif
97
98#ifdef USE_OTG_HOST_MODE
99 usbh_core_type host;
100#endif
101
102 usb_core_cfg cfg;
104} otg_core_type;
105
106 usb_sts_type usb_core_config(otg_core_type *otgdev, uint8_t core_id);
107#ifdef USE_OTG_DEVICE_MODE
108 usb_sts_type usbd_init(otg_core_type *udev,
109 uint8_t core_id, uint8_t usb_id,
110 usbd_class_handler *class_handler,
111 usbd_desc_handler *desc_handler);
112#endif
113
114#ifdef USE_OTG_HOST_MODE
115 usb_sts_type usbh_init(otg_core_type *hdev,
116 uint8_t core_id, uint8_t usb_id,
117 usbh_class_handler_type *class_handler,
118 usbh_user_handler_type *user_handler);
119#endif
131#ifdef __cplusplus
132}
133#endif
134
135#endif
136
usb_speed_type
usb_speed_type
usb core speed select
Definition: usb_core.h:62
usb_core_config
usb_sts_type usb_core_config(otg_core_type *otgdev, uint8_t core_id)
usb core config
Definition: usb_core.c:49
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
USB_HIGH_SPEED_CORE_ID
@ USB_HIGH_SPEED_CORE_ID
Definition: usb_core.h:65
USB_LOW_SPEED_CORE_ID
@ USB_LOW_SPEED_CORE_ID
Definition: usb_core.h:63
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
otg_core_type::cfg
usb_core_cfg cfg
Definition: usb_core.h:102
otg_core_type::usb_reg
usb_reg_type * usb_reg
Definition: usb_core.h:93
otg_global_type
Definition: at32f435_437_usb.h:474
usb_core_cfg
usb core cofig struct
Definition: usb_core.h:72
usb_core_cfg::sof_out
uint8_t sof_out
Definition: usb_core.h:83
usb_core_cfg::fifo_size
uint16_t fifo_size
Definition: usb_core.h:79
usb_core_cfg::hc_num
uint8_t hc_num
Definition: usb_core.h:75
usb_core_cfg::usb_id
uint8_t usb_id
Definition: usb_core.h:84
usb_core_cfg::vbusig
uint8_t vbusig
Definition: usb_core.h:85
usb_core_cfg::phy_itface
uint8_t phy_itface
Definition: usb_core.h:80
usb_core_cfg::core_id
uint8_t core_id
Definition: usb_core.h:81
usb_core_cfg::speed
uint8_t speed
Definition: usb_core.h:73
usb_core_cfg::max_size
uint16_t max_size
Definition: usb_core.h:78
usb_core_cfg::ept_num
uint8_t ept_num
Definition: usb_core.h:76
usb_core_cfg::low_power
uint8_t low_power
Definition: usb_core.h:82
usb_core_cfg::dma_en
uint8_t dma_en
Definition: usb_core.h:74
usb_std.h
usb standard header file
usbd_core.h
usb device core header file
usbh_core.h
usb host core header file


AT32F435/437 Firmwary Library: usb_std.h Source File

  • middlewares
  • usb_drivers
  • inc
usb_std.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_STD_H
29#define __USB_STD_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
36/* includes ------------------------------------------------------------------*/
37#include "usb_conf.h"
38
54#define USB_REQ_RECIPIENT_DEVICE 0x00
55#define USB_REQ_RECIPIENT_INTERFACE 0x01
56#define USB_REQ_RECIPIENT_ENDPOINT 0x02
57#define USB_REQ_RECIPIENT_OTHER 0x03
58#define USB_REQ_RECIPIENT_MASK 0x1F
63#define USB_REQ_TYPE_STANDARD 0x00
64#define USB_REQ_TYPE_CLASS 0x20
65#define USB_REQ_TYPE_VENDOR 0x40
66#define USB_REQ_TYPE_RESERVED 0x60
71#define USB_REQ_DIR_HTD 0x00
72#define USB_REQ_DIR_DTH 0x80
77#define USB_STD_REQ_GET_STATUS 0
78#define USB_STD_REQ_CLEAR_FEATURE 1
79#define USB_STD_REQ_SET_FEATURE 3
80#define USB_STD_REQ_SET_ADDRESS 5
81#define USB_STD_REQ_GET_DESCRIPTOR 6
82#define USB_STD_REQ_SET_DESCRIPTOR 7
83#define USB_STD_REQ_GET_CONFIGURATION 8
84#define USB_STD_REQ_SET_CONFIGURATION 9
85#define USB_STD_REQ_GET_INTERFACE 10
86#define USB_STD_REQ_SET_INTERFACE 11
87#define USB_STD_REQ_SYNCH_FRAME 12
92#define USB_DESCIPTOR_TYPE_DEVICE 1
93#define USB_DESCIPTOR_TYPE_CONFIGURATION 2
94#define USB_DESCIPTOR_TYPE_STRING 3
95#define USB_DESCIPTOR_TYPE_INTERFACE 4
96#define USB_DESCIPTOR_TYPE_ENDPOINT 5
97#define USB_DESCIPTOR_TYPE_DEVICE_QUALIFIER 6
98#define USB_DESCIPTOR_TYPE_OTHER_SPEED 7
99#define USB_DESCIPTOR_TYPE_INTERFACE_POWER 8
104#define USB_LANGID_STRING 0
105#define USB_MFC_STRING 1
106#define USB_PRODUCT_STRING 2
107#define USB_SERIAL_STRING 3
108#define USB_CONFIG_STRING 4
109#define USB_INTERFACE_STRING 5
114#define USB_CONF_REMOTE_WAKEUP 2
115#define USB_CONF_SELF_POWERED 1
120#define USB_FEATURE_EPT_HALT 0
121#define USB_FEATURE_REMOTE_WAKEUP 1
122#define USB_FEATURE_TEST_MODE 2
127typedef enum
128{
129 USB_CONN_STATE_DEFAULT =1,
130 USB_CONN_STATE_ADDRESSED,
131 USB_CONN_STATE_CONFIGURED,
132 USB_CONN_STATE_SUSPENDED
133}usbd_conn_state;
134
138#define USB_EPT0_IDLE 0
139#define USB_EPT0_SETUP 1
140#define USB_EPT0_DATA_IN 2
141#define USB_EPT0_DATA_OUT 3
142#define USB_EPT0_STATUS_IN 4
143#define USB_EPT0_STATUS_OUT 5
144#define USB_EPT0_STALL 6
149#define USB_DEVICE_QUALIFIER_DESC_LEN 0x0A
150#define USB_DEVICE_DESC_LEN 0x12
151#define USB_DEVICE_CFG_DESC_LEN 0x09
152#define USB_DEVICE_IF_DESC_LEN 0x09
153#define USB_DEVICE_EPT_LEN 0x07
154#define USB_DEVICE_OTG_DESC_LEN 0x03
155#define USB_DEVICE_LANGID_STR_DESC_LEN 0x04
156#define USB_DEVICE_OTHER_SPEED_DESC_SIZ_LEN 0x09
161#define USB_CLASS_CODE_AUDIO 0x01
162#define USB_CLASS_CODE_CDC 0x02
163#define USB_CLASS_CODE_HID 0x03
164#define USB_CLASS_CODE_PRINTER 0x07
165#define USB_CLASS_CODE_MSC 0x08
166#define USB_CLASS_CODE_HUB 0x09
167#define USB_CLASS_CODE_CDCDATA 0x0A
168#define USB_CLASS_CODE_CCID 0x0B
169#define USB_CLASS_CODE_VIDEO 0x0E
170#define USB_CLASS_CODE_VENDOR 0xFF
175#define USB_EPT_DESC_CONTROL 0x00
176#define USB_EPT_DESC_ISO 0x01
177#define USB_EPT_DESC_BULK 0x02
178#define USB_EPT_DESC_INTERRUPT 0x03
180#define USB_EPT_DESC_NSYNC 0x00
181#define USB_ETP_DESC_ASYNC 0x04
182#define USB_ETP_DESC_ADAPTIVE 0x08
183#define USB_ETP_DESC_SYNC 0x0C
185#define USB_EPT_DESC_DATA_EPT 0x00
186#define USB_EPT_DESC_FD_EPT 0x10
187#define USB_EPT_DESC_FDDATA_EPT 0x20
192#define USBD_CDC_CS_INTERFACE 0x24
193#define USBD_CDC_CS_ENDPOINT 0x25
194
198#define USBD_CDC_SUBTYPE_HEADER 0x00
199#define USBD_CDC_SUBTYPE_CMF 0x01
200#define USBD_CDC_SUBTYPE_ACM 0x02
201#define USBD_CDC_SUBTYPE_UFD 0x06
202
206#define SET_LINE_CODING 0x20
207#define GET_LINE_CODING 0x21
208
212typedef struct
213{
214 uint32_t bitrate; /* line coding baud rate */
215 uint8_t format; /* line coding foramt */
216 uint8_t parity; /* line coding parity */
217 uint8_t data; /* line coding data bit */
218}linecoding_type;
219
223#define HID_CLASS_DESC_HID 0x21
224#define HID_CLASS_DESC_REPORT 0x22
225#define HID_CLASS_DESC_PHYSICAL 0x23
226
230#define HID_REQ_SET_PROTOCOL 0x0B
231#define HID_REQ_GET_PROTOCOL 0x03
232#define HID_REQ_SET_IDLE 0x0A
233#define HID_REQ_GET_IDLE 0x02
234#define HID_REQ_SET_REPORT 0x09
235#define HID_REQ_GET_REPORT 0x01
236#define HID_DESCRIPTOR_TYPE 0x21
237#define HID_REPORT_DESC 0x22
238
242#define USB_MAX_EP0_SIZE 64
247#define SWAPBYTE(addr) (uint16_t)(((uint16_t)(*((uint8_t *)(addr)))) + \
248 (((uint16_t)(*(((uint8_t *)(addr)) + 1))) << 8))
253#define MIN(a, b) (uint16_t)(((a) < (b)) ? (a) : (b))
254#define MAX(a, b) (uint16_t)(((a) > (b)) ? (a) : (b))
259#define LBYTE(x) ((uint8_t)(x & 0x00FF))
260#define HBYTE(x) ((uint8_t)((x & 0xFF00) >>8))
265typedef enum
266{
267 USB_OK,
268 USB_FAIL,
269 USB_WAIT,
270 USB_NOT_SUPPORT,
271 USB_ERROR,
272}usb_sts_type;
273
274
278typedef struct
279{
280 uint8_t bmRequestType;
281 uint8_t bRequest;
282 uint16_t wValue;
283 uint16_t wIndex;
285 uint16_t wLength;
286} usb_setup_type;
287
291typedef struct
292{
293 uint8_t bLength;
294 uint8_t bDescriptorType;
295 uint16_t bcdUSB;
296 uint8_t bDeviceClass;
297 uint8_t bDeviceSubClass;
298 uint8_t bDeviceProtocol;
299 uint8_t bMaxPacketSize0;
300 uint16_t idVendor;
301 uint16_t idProduct;
302 uint16_t bcdDevice;
303 uint8_t iManufacturer;
304 uint8_t iProduct;
305 uint8_t iSerialNumber;
306 uint8_t bNumConfigurations;
307} usb_device_desc_type;
308
312typedef struct
313{
314 uint8_t bLength;
315 uint8_t bDescriptorType;
316 uint16_t wTotalLength;
317 uint8_t bNumInterfaces;
318 uint8_t bConfigurationValue;
319 uint8_t iConfiguration;
320 uint8_t bmAttributes;
325 uint8_t bMaxPower;
328}usb_configuration_desc_type;
329
333typedef struct
334{
335 uint8_t bLength;
336 uint8_t bDescriptorType;
337 uint8_t bInterfaceNumber;
338 uint8_t bAlternateSetting;
339 uint8_t bNumEndpoints;
340 uint8_t bInterfaceClass;
341 uint8_t bInterfaceSubClass;
342 uint8_t bInterfaceProtocol;
343 uint8_t iInterface;
344} usb_interface_desc_type;
345
349typedef struct
350{
351 uint8_t bLength;
352 uint8_t bDescriptorType;
353 uint8_t bEndpointAddress;
354 uint8_t bmAttributes;
355 uint16_t wMaxPacketSize;
356 uint8_t bInterval;
357} usb_endpoint_desc_type;
358
362typedef struct
363{
364 uint8_t bLength;
365 uint8_t bDescriptorType;
366} usb_header_desc_type;
367
368
380#ifdef __cplusplus
381}
382#endif
383
384#endif
385
usbd_conn_state
usbd_conn_state
usb device connect state
Definition: usb_std.h:128
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
USB_CONN_STATE_SUSPENDED
@ USB_CONN_STATE_SUSPENDED
Definition: usb_std.h:132
USB_CONN_STATE_DEFAULT
@ USB_CONN_STATE_DEFAULT
Definition: usb_std.h:129
USB_CONN_STATE_CONFIGURED
@ USB_CONN_STATE_CONFIGURED
Definition: usb_std.h:131
USB_CONN_STATE_ADDRESSED
@ USB_CONN_STATE_ADDRESSED
Definition: usb_std.h:130
USB_OK
@ USB_OK
Definition: usb_std.h:268
USB_WAIT
@ USB_WAIT
Definition: usb_std.h:270
USB_ERROR
@ USB_ERROR
Definition: usb_std.h:272
USB_NOT_SUPPORT
@ USB_NOT_SUPPORT
Definition: usb_std.h:271
USB_FAIL
@ USB_FAIL
Definition: usb_std.h:269
linecoding_type
usb cdc class set line coding struct
Definition: usb_std.h:213
linecoding_type::bitrate
uint32_t bitrate
Definition: usb_std.h:214
linecoding_type::data
uint8_t data
Definition: usb_std.h:217
linecoding_type::parity
uint8_t parity
Definition: usb_std.h:216
linecoding_type::format
uint8_t format
Definition: usb_std.h:215
usb_configuration_desc_type
format of standard configuration descriptor
Definition: usb_std.h:314
usb_device_desc_type
format of standard device descriptor
Definition: usb_std.h:293
usb_endpoint_desc_type
format of standard endpoint descriptor
Definition: usb_std.h:351
usb_header_desc_type
format of header
Definition: usb_std.h:364
usb_interface_desc_type
format of standard interface descriptor
Definition: usb_std.h:335
usb_setup_type
format of usb setup data
Definition: usb_std.h:280


AT32F435/437 Firmwary Library: usbd_core.c Source File

  • middlewares
  • usb_drivers
  • src
usbd_core.c
Go to the documentation of this file.
1
27#include "usb_core.h"
28#include "usbd_core.h"
29#include "usbd_sdr.h"
30
50void usbd_core_in_handler(usbd_core_type *udev, uint8_t ept_addr)
51{
52 /* get endpoint info*/
53 usb_ept_info *ept_info = &udev->ept_in[ept_addr & 0x7F];
54
55 if(ept_addr == 0)
56 {
57 if(udev->ept0_sts == USB_EPT0_DATA_IN)
58 {
59 if(ept_info->rem0_len > ept_info->maxpacket)
60 {
61 ept_info->rem0_len -= ept_info->maxpacket;
62 usbd_ept_send(udev, 0, ept_info->trans_buf,
63 MIN(ept_info->rem0_len, ept_info->maxpacket));
64 }
65 /* endpoint 0 */
66 else if(ept_info->last_len == ept_info->maxpacket
67 && ept_info->ept0_slen >= ept_info->maxpacket
68 && ept_info->ept0_slen < udev->ept0_wlength)
69 {
70 ept_info->last_len = 0;
71 usbd_ept_send(udev, 0, 0, 0);
72 usbd_ept_recv(udev, ept_addr, 0, 0);
73 }
74 else
75 {
76
77 if(udev->class_handler->ept0_tx_handler != 0 &&
78 udev->conn_state == USB_CONN_STATE_CONFIGURED)
79 {
80 udev->class_handler->ept0_tx_handler(udev);
81 }
82 usbd_ctrl_recv_status(udev);
83
84 }
85 }
86 }
87 else if(udev->class_handler->in_handler != 0 &&
88 udev->conn_state == USB_CONN_STATE_CONFIGURED)
89 {
90 /* other user define endpoint */
91 udev->class_handler->in_handler(udev, ept_addr);
92 }
93}
94
101void usbd_core_out_handler(usbd_core_type *udev, uint8_t ept_addr)
102{
103 /* get endpoint info*/
104 usb_ept_info *ept_info = &udev->ept_out[ept_addr & 0x7F];
105
106 if(ept_addr == 0)
107 {
108 /* endpoint 0 */
109 if(udev->ept0_sts == USB_EPT0_DATA_OUT)
110 {
111 if(ept_info->rem0_len > ept_info->maxpacket)
112 {
113 ept_info->rem0_len -= ept_info->maxpacket;
114 usbd_ept_recv(udev, ept_addr, ept_info->trans_buf,
115 MIN(ept_info->rem0_len, ept_info->maxpacket));
116 }
117 else
118 {
119 if(udev->class_handler->ept0_rx_handler != 0)
120 {
121 udev->class_handler->ept0_rx_handler(udev);
122 }
123 usbd_ctrl_send_status(udev);
124 }
125 }
126 }
127 else if(udev->class_handler->out_handler != 0 &&
128 udev->conn_state == USB_CONN_STATE_CONFIGURED)
129 {
130 /* other user define endpoint */
131 udev->class_handler->out_handler(udev, ept_addr);
132 }
133}
134
141void usbd_core_setup_handler(usbd_core_type *udev, uint8_t ept_num)
142{
143 /* setup parse */
144 usbd_setup_request_parse(&udev->setup, udev->setup_buffer);
145
146 /* set ept0 status */
147 udev->ept0_sts = USB_EPT0_SETUP;
148 udev->ept0_wlength = udev->setup.wLength;
149
150 switch(udev->setup.bmRequestType & USB_REQ_RECIPIENT_MASK)
151 {
152 case USB_REQ_RECIPIENT_DEVICE:
153 /* recipient device request */
154 usbd_device_request(udev);
155 break;
156 case USB_REQ_RECIPIENT_INTERFACE:
157 /* recipient interface request */
158 usbd_interface_request(udev);
159 break;
160 case USB_REQ_RECIPIENT_ENDPOINT:
161 /* recipient endpoint request */
162 usbd_endpoint_request(udev);
163 break;
164 default:
165 break;
166 }
167}
168
177void usbd_ctrl_send(usbd_core_type *udev, uint8_t *buffer, uint16_t len)
178{
179 usb_ept_info *ept_info = &udev->ept_in[0];
180
181 ept_info->ept0_slen = len;
182 ept_info->rem0_len = len;
183 udev->ept0_sts = USB_EPT0_DATA_IN;
184
185 usbd_ept_send(udev, 0, buffer, len);
186}
187
196void usbd_ctrl_recv(usbd_core_type *udev, uint8_t *buffer, uint16_t len)
197{
198 usb_ept_info *ept_info = &udev->ept_out[0];
199
200 ept_info->ept0_slen = len;
201 ept_info->rem0_len = len;
202 udev->ept0_sts = USB_EPT0_DATA_OUT;
203
204 usbd_ept_recv(udev, 0, buffer, len);
205}
206
212void usbd_ctrl_send_status(usbd_core_type *udev)
213{
214 udev->ept0_sts = USB_EPT0_STATUS_IN;
215
216 usbd_ept_send(udev, 0, 0, 0);
217}
218
224void usbd_ctrl_recv_status(usbd_core_type *udev)
225{
226 udev->ept0_sts = USB_EPT0_STATUS_OUT;
227
228 usbd_ept_recv(udev, 0, 0, 0);
229}
230
237void usbd_clear_stall(usbd_core_type *udev, uint8_t ept_addr)
238{
239 usb_ept_info *ept_info;
240 usb_reg_type *usbx = udev->usb_reg;
241
242 if(ept_addr & 0x80)
243 {
244 /* in endpoint */
245 ept_info = &udev->ept_in[ept_addr & 0x7F];
246 }
247 else
248 {
249 /* out endpoint */
250 ept_info = &udev->ept_out[ept_addr & 0x7F];
251 }
252 usb_ept_clear_stall(usbx, ept_info);
253 ept_info->stall = 0;
254}
255
262void usbd_set_stall(usbd_core_type *udev, uint8_t ept_addr)
263{
264 usb_ept_info *ept_info;
265 usb_reg_type *usbx = udev->usb_reg;
266
267 if(ept_addr & 0x80)
268 {
269 /* in endpoint */
270 ept_info = &udev->ept_in[ept_addr & 0x7F];
271 }
272 else
273 {
274 /* out endpoint */
275 ept_info = &udev->ept_out[ept_addr & 0x7F];
276 }
277 usb_ept_stall(usbx, ept_info);
278
279 ept_info->stall = 1;
280}
281
287void usbd_ctrl_unsupport(usbd_core_type *udev)
288{
289 /* return stall status */
290 usbd_set_stall(udev, 0x00);
291 usbd_set_stall(udev, 0x80);
292}
293
300uint32_t usbd_get_recv_len(usbd_core_type *udev, uint8_t ept_addr)
301{
302 usb_ept_info *ept = &udev->ept_out[ept_addr & 0x7F];
303 return ept->trans_len;
304}
305
314void usbd_ept_open(usbd_core_type *udev, uint8_t ept_addr, uint8_t ept_type, uint16_t maxpacket)
315{
316 usb_reg_type *usbx = udev->usb_reg;
317 usb_ept_info *ept_info;
318
319 if((ept_addr & 0x80) == 0)
320 {
321 /* out endpoint info */
322 ept_info = &udev->ept_out[ept_addr & 0x7F];
323 ept_info->inout = EPT_DIR_OUT;
324 }
325 else
326 {
327 /* in endpoint info */
328 ept_info = &udev->ept_in[ept_addr & 0x7F];
329 ept_info->inout = EPT_DIR_IN;
330 }
331
332 /* set endpoint maxpacket and type */
333 ept_info->maxpacket = maxpacket;
334 ept_info->trans_type = ept_type;
335
336 /* open endpoint */
337 usb_ept_open(usbx, ept_info);
338}
339
346void usbd_ept_close(usbd_core_type *udev, uint8_t ept_addr)
347{
348 usb_ept_info *ept_info;
349 if(ept_addr & 0x80)
350 {
351 /* in endpoint */
352 ept_info = &udev->ept_in[ept_addr & 0x7F];
353 }
354 else
355 {
356 /* out endpoint */
357 ept_info = &udev->ept_out[ept_addr & 0x7F];
358 }
359
360 /* close endpoint */
361 usb_ept_close(udev->usb_reg, ept_info);
362}
363
369void usbd_connect(usbd_core_type *udev)
370{
371 usb_connect(udev->usb_reg);
372}
373
379void usbd_disconnect(usbd_core_type *udev)
380{
381 usb_disconnect(udev->usb_reg);
382}
383
390void usbd_set_device_addr(usbd_core_type *udev, uint8_t address)
391{
392 usb_set_address(udev->usb_reg, address);
393}
394
400void usb_ept_default_init(usbd_core_type *udev)
401{
402 uint8_t i_index = 0;
403 /* init in endpoint info structure */
404 for(i_index = 0; i_index < USB_EPT_MAX_NUM; i_index ++)
405 {
406 udev->ept_in[i_index].eptn = i_index;
407 udev->ept_in[i_index].ept_address = i_index;
408 udev->ept_in[i_index].inout = EPT_DIR_IN;
409 udev->ept_in[i_index].maxpacket = 0;
410 udev->ept_in[i_index].trans_buf = 0;
411 udev->ept_in[i_index].total_len = 0;
412 }
413
414 /* init out endpoint info structure */
415 for(i_index = 0; i_index < USB_EPT_MAX_NUM; i_index ++)
416 {
417 udev->ept_out[i_index].eptn = i_index;
418 udev->ept_out[i_index].ept_address = i_index;
419 udev->ept_out[i_index].inout = EPT_DIR_OUT;
420 udev->ept_out[i_index].maxpacket = 0;
421 udev->ept_out[i_index].trans_buf = 0;
422 udev->ept_out[i_index].total_len = 0;
423 }
424}
425
434void usbd_ept_send(usbd_core_type *udev, uint8_t ept_addr, uint8_t *buffer, uint16_t len)
435{
436 /* get endpoint info struct and register */
437 usb_reg_type *usbx = udev->usb_reg;
438 usb_ept_info *ept_info = &udev->ept_in[ept_addr & 0x7F];
439 otg_eptin_type *ept_in = USB_INEPT(usbx, ept_info->eptn);
440 otg_device_type *dev = OTG_DEVICE(usbx);
441 uint32_t pktcnt;
442
443 /* set send data buffer and length */
444 ept_info->trans_buf = buffer;
445 ept_info->total_len = len;
446 ept_info->trans_len = 0;
447
448 /* transfer data len is zero */
449 if(ept_info->total_len == 0)
450 {
451 ept_in->dieptsiz_bit.pktcnt = 1;
452 ept_in->dieptsiz_bit.xfersize = 0;
453 }
454 else
455 {
456 if((ept_addr & 0x7F) == 0) // endpoint 0
457 {
458 /* endpoint 0 */
459 if(ept_info->total_len > ept_info->maxpacket)
460 {
461 ept_info->total_len = ept_info->maxpacket;
462 }
463
464 /* set transfer size */
465 ept_in->dieptsiz_bit.xfersize = ept_info->total_len;
466
467 /* set packet count */
468 ept_in->dieptsiz_bit.pktcnt = 1;
469
470 ept_info->last_len = ept_info->total_len;
471 }
472 else
473 {
474 /* other endpoint */
475
476 /* packet count */
477 pktcnt = (ept_info->total_len + ept_info->maxpacket - 1) / ept_info->maxpacket;
478
479 /* set transfer size */
480 ept_in->dieptsiz_bit.xfersize = ept_info->total_len;
481
482 /* set packet count */
483 ept_in->dieptsiz_bit.pktcnt = pktcnt;
484
485 if(ept_info->trans_type == EPT_ISO_TYPE)
486 {
487 ept_in->dieptsiz_bit.mc = 1;
488 }
489 }
490 }
491
492 if(ept_info->trans_type != EPT_ISO_TYPE)
493 {
494 if(ept_info->total_len > 0)
495 {
496 /* set in endpoint tx fifo empty interrupt mask */
497 dev->diepempmsk |= 1 << ept_info->eptn;
498 }
499 }
500
501 if(ept_info->trans_type == EPT_ISO_TYPE)
502 {
503 if((dev->dsts_bit.soffn & 0x1) == 0)
504 {
505 ept_in->diepctl_bit.setd1pid = TRUE;
506 }
507 else
508 {
509 ept_in->diepctl_bit.setd0pid = TRUE;
510 }
511 }
512
513 /* clear endpoint nak */
514 ept_in->diepctl_bit.cnak = TRUE;
515
516 /* endpoint enable */
517 ept_in->diepctl_bit.eptena = TRUE;
518
519 if(ept_info->trans_type == EPT_ISO_TYPE)
520 {
521 /* write data to fifo */
522 usb_write_packet(usbx, ept_info->trans_buf, ept_info->eptn, ept_info->total_len);
523 }
524}
525
534void usbd_ept_recv(usbd_core_type *udev, uint8_t ept_addr, uint8_t *buffer, uint16_t len)
535{
536 /* get endpoint info struct and register */
537 usb_reg_type *usbx = udev->usb_reg;
538 usb_ept_info *ept_info = &udev->ept_out[ept_addr & 0x7F];
539 otg_eptout_type *ept_out = USB_OUTEPT(usbx, ept_info->eptn);
540 otg_device_type *dev = OTG_DEVICE(usbx);
541 uint32_t pktcnt;
542
543 /* set receive data buffer and length */
544 ept_info->trans_buf = buffer;
545 ept_info->total_len = len;
546 ept_info->trans_len = 0;
547
548 if((ept_addr & 0x7F) == 0)
549 {
550 /* endpoint 0 */
551 ept_info->total_len = ept_info->maxpacket;
552 }
553
554 if(ept_info->total_len == 0 || ((ept_addr & 0x7F) == 0))
555 {
556 /* set transfer size */
557 ept_out->doeptsiz_bit.xfersize = ept_info->maxpacket;
558
559 /* set packet count */
560 ept_out->doeptsiz_bit.pktcnt = 1;
561 }
562 else
563 {
564 pktcnt = (ept_info->total_len + ept_info->maxpacket - 1) / ept_info->maxpacket;
565
566 /* set transfer size */
567 ept_out->doeptsiz_bit.xfersize = ept_info->maxpacket * pktcnt;
568
569 /* set packet count */
570 ept_out->doeptsiz_bit.pktcnt = pktcnt;
571 }
572
573 if(ept_info->trans_type == EPT_ISO_TYPE)
574 {
575 if((dev->dsts_bit.soffn & 0x01) == 0)
576 {
577 ept_out->doepctl_bit.setd1pid = TRUE;
578 }
579 else
580 {
581 ept_out->doepctl_bit.setd0pid = TRUE;
582 }
583 }
584
585 /* clear endpoint nak */
586 ept_out->doepctl_bit.cnak = TRUE;
587
588 /* endpoint enable */
589 ept_out->doepctl_bit.eptena = TRUE;
590}
591
597 usbd_conn_state usbd_connect_state_get(usbd_core_type *udev)
598{
599 return udev->conn_state;
600}
601
607void usbd_remote_wakeup(usbd_core_type *udev)
608{
609 /* check device is in suspend mode */
610 if(usb_suspend_status_get(udev->usb_reg) == 1)
611 {
612 /* set connect state */
613 udev->conn_state = udev->old_conn_state;
614
615 /* open phy clock */
616 usb_open_phy_clk(udev->usb_reg);
617
618 /* set remote wakeup */
619 usb_remote_wkup_set(udev->usb_reg);
620
621 /* delay 10 ms */
622 usb_delay_ms(10);
623
624 /* clear remote wakup */
625 usb_remote_wkup_clear(udev->usb_reg);
626 }
627}
628
634void usbd_enter_suspend(usbd_core_type *udev)
635{
636 /* check device is in suspend mode */
637 if(usb_suspend_status_get(udev->usb_reg) == 1)
638 {
639 /* stop phy clk */
640 usb_stop_phy_clk(udev->usb_reg);
641 }
642}
643
650void usbd_flush_tx_fifo(usbd_core_type *udev, uint8_t ept_num)
651{
652 /* flush endpoint tx fifo */
653 usb_flush_tx_fifo(udev->usb_reg, ept_num & 0x1F);
654}
655
661void usbd_fifo_alloc(usbd_core_type *udev)
662{
663 usb_reg_type *usbx = udev->usb_reg;
664
665 if(usbx == OTG1_GLOBAL)
666 {
667 /* set receive fifo size */
668 usb_set_rx_fifo(usbx, USBD_RX_SIZE);
669
670 /* set endpoint0 tx fifo size */
671 usb_set_tx_fifo(usbx, USB_EPT0, USBD_EP0_TX_SIZE);
672
673 /* set endpoint1 tx fifo size */
674 usb_set_tx_fifo(usbx, USB_EPT1, USBD_EP1_TX_SIZE);
675
676 /* set endpoint2 tx fifo size */
677 usb_set_tx_fifo(usbx, USB_EPT2, USBD_EP2_TX_SIZE);
678
679 /* set endpoint3 tx fifo size */
680 usb_set_tx_fifo(usbx, USB_EPT3, USBD_EP3_TX_SIZE);
681
682 if(USB_EPT_MAX_NUM == 8)
683 {
684 /* set endpoint4 tx fifo size */
685 usb_set_tx_fifo(usbx, USB_EPT4, USBD_EP4_TX_SIZE);
686
687 /* set endpoint5 tx fifo size */
688 usb_set_tx_fifo(usbx, USB_EPT5, USBD_EP5_TX_SIZE);
689
690 /* set endpoint6 tx fifo size */
691 usb_set_tx_fifo(usbx, USB_EPT6, USBD_EP6_TX_SIZE);
692
693 /* set endpoint7 tx fifo size */
694 usb_set_tx_fifo(usbx, USB_EPT7, USBD_EP7_TX_SIZE);
695 }
696 }
697#ifdef OTG2_GLOBAL
698 if(usbx == OTG2_GLOBAL)
699 {
700 /* set receive fifo size */
701 usb_set_rx_fifo(usbx, USBD2_RX_SIZE);
702
703 /* set endpoint0 tx fifo size */
704 usb_set_tx_fifo(usbx, USB_EPT0, USBD2_EP0_TX_SIZE);
705
706 /* set endpoint1 tx fifo size */
707 usb_set_tx_fifo(usbx, USB_EPT1, USBD2_EP1_TX_SIZE);
708
709 /* set endpoint2 tx fifo size */
710 usb_set_tx_fifo(usbx, USB_EPT2, USBD2_EP2_TX_SIZE);
711
712 /* set endpoint3 tx fifo size */
713 usb_set_tx_fifo(usbx, USB_EPT3, USBD2_EP3_TX_SIZE);
714
715 if(USB_EPT_MAX_NUM == 8)
716 {
717 /* set endpoint4 tx fifo size */
718 usb_set_tx_fifo(usbx, USB_EPT4, USBD2_EP4_TX_SIZE);
719
720 /* set endpoint5 tx fifo size */
721 usb_set_tx_fifo(usbx, USB_EPT5, USBD2_EP5_TX_SIZE);
722
723 /* set endpoint6 tx fifo size */
724 usb_set_tx_fifo(usbx, USB_EPT6, USBD2_EP6_TX_SIZE);
725
726 /* set endpoint7 tx fifo size */
727 usb_set_tx_fifo(usbx, USB_EPT7, USBD2_EP7_TX_SIZE);
728 }
729 }
730#endif
731}
732
744 usb_sts_type usbd_core_init(usbd_core_type *udev,
745 usb_reg_type *usb_reg,
746 usbd_class_handler *class_handler,
747 usbd_desc_handler *desc_handler,
748 uint8_t core_id)
749{
750 usb_reg_type *usbx;
751 otg_device_type *dev;
752 otg_eptin_type *ept_in;
753 otg_eptout_type *ept_out;
754 uint32_t i_index;
755
756 udev->usb_reg = usb_reg;
757 usbx = usb_reg;
758 dev = OTG_DEVICE(usbx);
759
760 /* set connect state */
761 udev->conn_state = USB_CONN_STATE_DEFAULT;
762
763 /* device class config */
764 udev->device_addr = 0;
765 udev->class_handler = class_handler;
766 udev->desc_handler = desc_handler;
767 /* set device disconnect */
768 usbd_disconnect(udev);
769
770 /* set endpoint to default status */
771 usb_ept_default_init(udev);
772
773 /* disable usb global interrupt */
774 usb_interrupt_disable(usbx);
775
776 /* init global register */
777 usb_global_init(usbx);
778
779 /* set device mode */
780 usb_global_set_mode(usbx, OTG_DEVICE_MODE);
781
782 /* open phy clock */
783 usb_open_phy_clk(udev->usb_reg);
784
785 /* set periodic frame interval */
786 dev->dcfg_bit.perfrint = DCFG_PERFRINT_80;
787
788 /* set device speed to full-speed */
789 dev->dcfg_bit.devspd = USB_DCFG_FULL_SPEED;
790
791 /* flush all tx fifo */
792 usb_flush_tx_fifo(usbx, 16);
793
794 /* flush share rx fifo */
795 usb_flush_rx_fifo(usbx);
796
797 /* clear all endpoint interrupt flag and mask */
798 dev->daint = 0xFFFFFFFF;
799 dev->daintmsk = 0;
800 dev->diepmsk = 0;
801 dev->doepmsk = 0;
802
803 for(i_index = 0; i_index < USB_EPT_MAX_NUM; i_index ++)
804 {
805 usbx->dieptxfn[i_index] = 0;
806 }
807
808 /* endpoint fifo alloc */
809 usbd_fifo_alloc(udev);
810
811 /* disable all in endpoint */
812 for(i_index = 0; i_index < USB_EPT_MAX_NUM; i_index ++)
813 {
814 ept_in = USB_INEPT(usbx, i_index);
815 if(ept_in->diepctl_bit.eptena)
816 {
817 ept_in->diepctl = 0;
818 ept_in->diepctl_bit.eptdis = TRUE;
819 ept_in->diepctl_bit.snak = TRUE;
820 }
821 else
822 {
823 ept_in->diepctl = 0;
824 }
825 ept_in->dieptsiz = 0;
826 ept_in->diepint = 0xFF;
827 }
828
829 /* disable all out endpoint */
830 for(i_index = 0; i_index < USB_EPT_MAX_NUM; i_index ++)
831 {
832 ept_out = USB_OUTEPT(usbx, i_index);
833 if(ept_out->doepctl_bit.eptena)
834 {
835 ept_out->doepctl = 0;
836 ept_out->doepctl_bit.eptdis = TRUE;
837 ept_out->doepctl_bit.snak = TRUE;
838 }
839 else
840 {
841 ept_out->doepctl = 0;
842 }
843 ept_out->doeptsiz = 0;
844 ept_out->doepint = 0xFF;
845 }
846 dev->diepmsk_bit.txfifoudrmsk = TRUE;
847
848 /* clear global interrupt and mask */
849 usbx->gintmsk = 0;
850 usbx->gintsts = 0xBFFFFFFF;
851
852 /* enable global interrupt mask */
853 usbx->gintmsk = USB_OTG_SOF_INT | USB_OTG_RXFLVL_INT |
854 USB_OTG_USBSUSP_INT | USB_OTG_USBRST_INT |
855 USB_OTG_ENUMDONE_INT | USB_OTG_IEPT_INT |
856 USB_OTG_OEPT_INT | USB_OTG_INCOMISOIN_INT |
857 USB_OTG_INCOMPIP_INCOMPISOOUT_INT | USB_OTG_WKUP_INT |
858 USB_OTG_OTGINT_INT;
859
860 /* usb connect */
861 usbd_connect(udev);
862
863 /* enable global interrupt */
864 usb_interrupt_enable(usbx);
865
866 return USB_OK;
867
868}
869
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
USBD_EP2_TX_SIZE
#define USBD_EP2_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:142
USBD2_EP4_TX_SIZE
#define USBD2_EP4_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:155
USBD2_EP7_TX_SIZE
#define USBD2_EP7_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:158
USBD2_EP0_TX_SIZE
#define USBD2_EP0_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:151
USBD_EP6_TX_SIZE
#define USBD_EP6_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:146
USBD_EP4_TX_SIZE
#define USBD_EP4_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:144
USBD2_EP5_TX_SIZE
#define USBD2_EP5_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:156
USBD2_RX_SIZE
#define USBD2_RX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:150
USBD_EP5_TX_SIZE
#define USBD_EP5_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:145
USBD_EP3_TX_SIZE
#define USBD_EP3_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:143
USBD_EP1_TX_SIZE
#define USBD_EP1_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:141
USBD2_EP3_TX_SIZE
#define USBD2_EP3_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:154
USBD2_EP1_TX_SIZE
#define USBD2_EP1_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:152
USBD_EP7_TX_SIZE
#define USBD_EP7_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:147
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
USBD_EP0_TX_SIZE
#define USBD_EP0_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:140
USBD_RX_SIZE
#define USBD_RX_SIZE
usb device mode config
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:139
USBD2_EP6_TX_SIZE
#define USBD2_EP6_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:157
USBD2_EP2_TX_SIZE
#define USBD2_EP2_TX_SIZE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:153
TRUE
@ TRUE
Definition: at32f435_437.h:379
USB_DCFG_FULL_SPEED
#define USB_DCFG_FULL_SPEED
usb device full speed
Definition: at32f435_437_usb.h:262
DCFG_PERFRINT_80
@ DCFG_PERFRINT_80
Definition: at32f435_437_usb.h:252
EPT_ISO_TYPE
@ EPT_ISO_TYPE
Definition: at32f435_437_usb.h:347
USB_EPT4
@ USB_EPT4
Definition: at32f435_437_usb.h:361
USB_EPT6
@ USB_EPT6
Definition: at32f435_437_usb.h:363
USB_EPT5
@ USB_EPT5
Definition: at32f435_437_usb.h:362
USB_EPT7
@ USB_EPT7
Definition: at32f435_437_usb.h:364
USB_EPT0
@ USB_EPT0
Definition: at32f435_437_usb.h:357
USB_EPT2
@ USB_EPT2
Definition: at32f435_437_usb.h:359
USB_EPT1
@ USB_EPT1
Definition: at32f435_437_usb.h:358
USB_EPT3
@ USB_EPT3
Definition: at32f435_437_usb.h:360
OTG_DEVICE_MODE
@ OTG_DEVICE_MODE
Definition: at32f435_437_usb.h:336
EPT_DIR_IN
@ EPT_DIR_IN
Definition: at32f435_437_usb.h:385
EPT_DIR_OUT
@ EPT_DIR_OUT
Definition: at32f435_437_usb.h:386
usb_ept_open
void usb_ept_open(otg_global_type *usbx, usb_ept_info *ept_info)
open usb endpoint
Definition: at32f435_437_usb.c:473
usb_connect
void usb_connect(otg_global_type *usbx)
connect usb device by enable pull-up
Definition: at32f435_437_usb.c:771
usb_remote_wkup_clear
void usb_remote_wkup_clear(otg_global_type *usbx)
usb remote wakeup clear
Definition: at32f435_437_usb.c:813
usb_set_rx_fifo
void usb_set_rx_fifo(otg_global_type *usbx, uint16_t size)
usb set rx fifo size
Definition: at32f435_437_usb.c:294
usb_write_packet
void usb_write_packet(otg_global_type *usbx, uint8_t *pusr_buf, uint16_t num, uint16_t nbytes)
write data from user memory to usb buffer
Definition: at32f435_437_usb.c:422
usb_disconnect
void usb_disconnect(otg_global_type *usbx)
disconnect usb device by disable pull-up
Definition: at32f435_437_usb.c:785
usb_remote_wkup_set
void usb_remote_wkup_set(otg_global_type *usbx)
usb remote wakeup set
Definition: at32f435_437_usb.c:800
usb_global_set_mode
void usb_global_set_mode(otg_global_type *usbx, uint32_t mode)
set otg mode(device or host mode)
Definition: at32f435_437_usb.c:344
usb_set_tx_fifo
void usb_set_tx_fifo(otg_global_type *usbx, uint8_t txfifo, uint16_t size)
usb set tx fifo size
Definition: at32f435_437_usb.c:309
usb_flush_rx_fifo
void usb_flush_rx_fifo(otg_global_type *usbx)
flush rx fifo
Definition: at32f435_437_usb.c:150
usb_suspend_status_get
uint8_t usb_suspend_status_get(otg_global_type *usbx)
usb suspend status get
Definition: at32f435_437_usb.c:826
usb_ept_clear_stall
void usb_ept_clear_stall(otg_global_type *usbx, usb_ept_info *ept_info)
clear endpoint tx or rx status to stall
Definition: at32f435_437_usb.c:592
usb_set_address
void usb_set_address(otg_global_type *usbx, uint8_t address)
set the host assignment address
Definition: at32f435_437_usb.c:726
usb_flush_tx_fifo
void usb_flush_tx_fifo(otg_global_type *usbx, uint32_t fifo_num)
flush tx fifo
Definition: at32f435_437_usb.c:124
OTG_DEVICE
#define OTG_DEVICE(usbx)
Definition: at32f435_437_usb.h:1331
usb_interrupt_disable
void usb_interrupt_disable(otg_global_type *usbx)
usb global interrupt disable
Definition: at32f435_437_usb.c:280
usb_ept_close
void usb_ept_close(otg_global_type *usbx, usb_ept_info *ept_info)
close usb endpoint
Definition: at32f435_437_usb.c:539
usb_stop_phy_clk
void usb_stop_phy_clk(otg_global_type *usbx)
usb stop phy clock
Definition: at32f435_437_usb.c:396
OTG2_GLOBAL
#define OTG2_GLOBAL
Definition: at32f435_437_usb.h:1329
usb_interrupt_enable
void usb_interrupt_enable(otg_global_type *usbx)
usb global interrupt enable
Definition: at32f435_437_usb.c:267
USB_OUTEPT
#define USB_OUTEPT(usbx, eptn)
Definition: at32f435_437_usb.h:1335
OTG1_GLOBAL
#define OTG1_GLOBAL
usb host and device register define
Definition: at32f435_437_usb.h:1328
USB_INEPT
#define USB_INEPT(usbx, eptn)
Definition: at32f435_437_usb.h:1334
usb_open_phy_clk
void usb_open_phy_clk(otg_global_type *usbx)
usb open phy clock
Definition: at32f435_437_usb.c:409
usb_ept_stall
void usb_ept_stall(otg_global_type *usbx, usb_ept_info *ept_info)
set endpoint tx or rx status to stall
Definition: at32f435_437_usb.c:563
usb_global_init
void usb_global_init(otg_global_type *usbx)
usb global initialization
Definition: at32f435_437_usb.c:83
USB_OTG_INCOMISOIN_INT
#define USB_OTG_INCOMISOIN_INT
Definition: at32f435_437_usb.h:67
USB_OTG_ENUMDONE_INT
#define USB_OTG_ENUMDONE_INT
Definition: at32f435_437_usb.h:62
USB_OTG_WKUP_INT
#define USB_OTG_WKUP_INT
Definition: at32f435_437_usb.h:74
USB_OTG_USBRST_INT
#define USB_OTG_USBRST_INT
Definition: at32f435_437_usb.h:61
USB_OTG_RXFLVL_INT
#define USB_OTG_RXFLVL_INT
Definition: at32f435_437_usb.h:55
USB_OTG_OEPT_INT
#define USB_OTG_OEPT_INT
Definition: at32f435_437_usb.h:66
USB_OTG_IEPT_INT
#define USB_OTG_IEPT_INT
Definition: at32f435_437_usb.h:65
USB_OTG_USBSUSP_INT
#define USB_OTG_USBSUSP_INT
Definition: at32f435_437_usb.h:60
USB_OTG_INCOMPIP_INCOMPISOOUT_INT
#define USB_OTG_INCOMPIP_INCOMPISOOUT_INT
Definition: at32f435_437_usb.h:68
USB_OTG_OTGINT_INT
#define USB_OTG_OTGINT_INT
Definition: at32f435_437_usb.h:53
USB_OTG_SOF_INT
#define USB_OTG_SOF_INT
Definition: at32f435_437_usb.h:54
USB_EPT0_STATUS_OUT
#define USB_EPT0_STATUS_OUT
Definition: usb_std.h:143
usbd_conn_state
usbd_conn_state
usb device connect state
Definition: usb_std.h:128
MIN
#define MIN(a, b)
min and max define
Definition: usb_std.h:254
USB_EPT0_DATA_IN
#define USB_EPT0_DATA_IN
Definition: usb_std.h:140
USB_REQ_RECIPIENT_DEVICE
#define USB_REQ_RECIPIENT_DEVICE
usb request recipient
Definition: usb_std.h:54
USB_REQ_RECIPIENT_MASK
#define USB_REQ_RECIPIENT_MASK
Definition: usb_std.h:58
USB_EPT0_DATA_OUT
#define USB_EPT0_DATA_OUT
Definition: usb_std.h:141
USB_EPT0_SETUP
#define USB_EPT0_SETUP
Definition: usb_std.h:139
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
USB_REQ_RECIPIENT_ENDPOINT
#define USB_REQ_RECIPIENT_ENDPOINT
Definition: usb_std.h:56
USB_EPT0_STATUS_IN
#define USB_EPT0_STATUS_IN
Definition: usb_std.h:142
USB_REQ_RECIPIENT_INTERFACE
#define USB_REQ_RECIPIENT_INTERFACE
Definition: usb_std.h:55
USB_CONN_STATE_DEFAULT
@ USB_CONN_STATE_DEFAULT
Definition: usb_std.h:129
USB_CONN_STATE_CONFIGURED
@ USB_CONN_STATE_CONFIGURED
Definition: usb_std.h:131
USB_OK
@ USB_OK
Definition: usb_std.h:268
usbd_connect_state_get
usbd_conn_state usbd_connect_state_get(usbd_core_type *udev)
get usb connect state
Definition: usbd_core.c:597
usbd_set_stall
void usbd_set_stall(usbd_core_type *udev, uint8_t ept_addr)
usb set endpoint to stall status
Definition: usbd_core.c:262
usbd_ept_close
void usbd_ept_close(usbd_core_type *udev, uint8_t ept_addr)
usb close endpoint
Definition: usbd_core.c:346
usbd_ctrl_send_status
void usbd_ctrl_send_status(usbd_core_type *udev)
usb control endpoint send in status
Definition: usbd_core.c:212
usbd_set_device_addr
void usbd_set_device_addr(usbd_core_type *udev, uint8_t address)
usb device set device address.
Definition: usbd_core.c:390
usbd_ept_recv
void usbd_ept_recv(usbd_core_type *udev, uint8_t ept_addr, uint8_t *buffer, uint16_t len)
endpoint receive data
Definition: usbd_core.c:534
usbd_flush_tx_fifo
void usbd_flush_tx_fifo(usbd_core_type *udev, uint8_t ept_num)
usb device flush in endpoint fifo
Definition: usbd_core.c:650
usbd_fifo_alloc
void usbd_fifo_alloc(usbd_core_type *udev)
usb device endpoint fifo alloc
Definition: usbd_core.c:661
usbd_core_out_handler
void usbd_core_out_handler(usbd_core_type *udev, uint8_t ept_addr)
usb core out transfer complete handler
Definition: usbd_core.c:101
usbd_ept_open
void usbd_ept_open(usbd_core_type *udev, uint8_t ept_addr, uint8_t ept_type, uint16_t maxpacket)
usb open endpoint
Definition: usbd_core.c:314
usbd_core_init
usb_sts_type usbd_core_init(usbd_core_type *udev, usb_reg_type *usb_reg, usbd_class_handler *class_handler, usbd_desc_handler *desc_handler, uint8_t core_id)
usb device core initialization
Definition: usbd_core.c:744
usbd_ctrl_recv_status
void usbd_ctrl_recv_status(usbd_core_type *udev)
usb control endpoint send out status
Definition: usbd_core.c:224
usbd_ctrl_send
void usbd_ctrl_send(usbd_core_type *udev, uint8_t *buffer, uint16_t len)
usb control endpoint send data
Definition: usbd_core.c:177
usb_ept_default_init
void usb_ept_default_init(usbd_core_type *udev)
usb endpoint structure initialization
Definition: usbd_core.c:400
usbd_core_in_handler
void usbd_core_in_handler(usbd_core_type *udev, uint8_t ept_addr)
usb core in transfer complete handler
Definition: usbd_core.c:50
usbd_ept_send
void usbd_ept_send(usbd_core_type *udev, uint8_t ept_addr, uint8_t *buffer, uint16_t len)
endpoint send data
Definition: usbd_core.c:434
usbd_clear_stall
void usbd_clear_stall(usbd_core_type *udev, uint8_t ept_addr)
clear endpoint stall
Definition: usbd_core.c:237
usbd_get_recv_len
uint32_t usbd_get_recv_len(usbd_core_type *udev, uint8_t ept_addr)
get endpoint receive data length
Definition: usbd_core.c:300
usbd_remote_wakeup
void usbd_remote_wakeup(usbd_core_type *udev)
usb device remote wakeup
Definition: usbd_core.c:607
usbd_connect
void usbd_connect(usbd_core_type *udev)
usb device connect to host
Definition: usbd_core.c:369
usbd_ctrl_recv
void usbd_ctrl_recv(usbd_core_type *udev, uint8_t *buffer, uint16_t len)
usb control endpoint recv data
Definition: usbd_core.c:196
usbd_ctrl_unsupport
void usbd_ctrl_unsupport(usbd_core_type *udev)
un-support device request
Definition: usbd_core.c:287
usbd_enter_suspend
void usbd_enter_suspend(usbd_core_type *udev)
usb device enter suspend mode
Definition: usbd_core.c:634
usbd_disconnect
void usbd_disconnect(usbd_core_type *udev)
usb device disconnect to host
Definition: usbd_core.c:379
usbd_core_setup_handler
void usbd_core_setup_handler(usbd_core_type *udev, uint8_t ept_num)
usb core setup transfer complete handler
Definition: usbd_core.c:141
usbd_endpoint_request
usb_sts_type usbd_endpoint_request(usbd_core_type *udev)
standard usb endpoint requests
Definition: usbd_sdr.c:419
usbd_setup_request_parse
void usbd_setup_request_parse(usb_setup_type *setup, uint8_t *buf)
usb parse standard setup request
Definition: usbd_sdr.c:55
usbd_device_request
usb_sts_type usbd_device_request(usbd_core_type *udev)
standard usb device requests
Definition: usbd_sdr.c:350
usbd_interface_request
usb_sts_type usbd_interface_request(usbd_core_type *udev)
standard usb interface requests
Definition: usbd_sdr.c:394
otg_device_type
Definition: at32f435_437_usb.h:996
otg_device_type::diepempmsk
__IO uint32_t diepempmsk
Definition: at32f435_437_usb.h:1131
otg_device_type::txfifoudrmsk
__IO uint32_t txfifoudrmsk
Definition: at32f435_437_usb.h:1070
otg_device_type::devspd
__IO uint32_t devspd
Definition: at32f435_437_usb.h:1005
otg_device_type::perfrint
__IO uint32_t perfrint
Definition: at32f435_437_usb.h:1009
otg_device_type::dcfg_bit
struct otg_device_type::@1233::@1249 dcfg_bit
otg_device_type::dsts_bit
struct otg_device_type::@1237::@1251 dsts_bit
otg_device_type::diepmsk_bit
struct otg_device_type::@1239::@1252 diepmsk_bit
otg_device_type::soffn
__IO uint32_t soffn
Definition: at32f435_437_usb.h:1048
otg_device_type::doepmsk
__IO uint32_t doepmsk
Definition: at32f435_437_usb.h:1081
otg_device_type::daintmsk
__IO uint32_t daintmsk
Definition: at32f435_437_usb.h:1116
otg_device_type::diepmsk
__IO uint32_t diepmsk
Definition: at32f435_437_usb.h:1059
otg_device_type::daint
__IO uint32_t daint
Definition: at32f435_437_usb.h:1103
otg_eptin_type
Definition: at32f435_437_usb.h:1142
otg_eptin_type::xfersize
__IO uint32_t xfersize
Definition: at32f435_437_usb.h:1199
otg_eptin_type::snak
__IO uint32_t snak
Definition: at32f435_437_usb.h:1161
otg_eptin_type::eptena
__IO uint32_t eptena
Definition: at32f435_437_usb.h:1165
otg_eptin_type::setd1pid
__IO uint32_t setd1pid
Definition: at32f435_437_usb.h:1163
otg_eptin_type::dieptsiz
__IO uint32_t dieptsiz
Definition: at32f435_437_usb.h:1196
otg_eptin_type::diepint
__IO uint32_t diepint
Definition: at32f435_437_usb.h:1175
otg_eptin_type::setd0pid
__IO uint32_t setd0pid
Definition: at32f435_437_usb.h:1162
otg_eptin_type::diepctl
__IO uint32_t diepctl
Definition: at32f435_437_usb.h:1148
otg_eptin_type::dieptsiz_bit
struct otg_eptin_type::@1261::@1267 dieptsiz_bit
otg_eptin_type::cnak
__IO uint32_t cnak
Definition: at32f435_437_usb.h:1160
otg_eptin_type::pktcnt
__IO uint32_t pktcnt
Definition: at32f435_437_usb.h:1200
otg_eptin_type::eptdis
__IO uint32_t eptdis
Definition: at32f435_437_usb.h:1164
otg_eptin_type::mc
__IO uint32_t mc
Definition: at32f435_437_usb.h:1201
otg_eptin_type::diepctl_bit
struct otg_eptin_type::@1257::@1265 diepctl_bit
otg_eptout_type
Definition: at32f435_437_usb.h:1224
otg_eptout_type::doeptsiz_bit
struct otg_eptout_type::@1273::@1277 doeptsiz_bit
otg_eptout_type::eptdis
__IO uint32_t eptdis
Definition: at32f435_437_usb.h:1246
otg_eptout_type::pktcnt
__IO uint32_t pktcnt
Definition: at32f435_437_usb.h:1281
otg_eptout_type::setd1pid
__IO uint32_t setd1pid
Definition: at32f435_437_usb.h:1245
otg_eptout_type::eptena
__IO uint32_t eptena
Definition: at32f435_437_usb.h:1247
otg_eptout_type::setd0pid
__IO uint32_t setd0pid
Definition: at32f435_437_usb.h:1244
otg_eptout_type::cnak
__IO uint32_t cnak
Definition: at32f435_437_usb.h:1242
otg_eptout_type::doeptsiz
__IO uint32_t doeptsiz
Definition: at32f435_437_usb.h:1277
otg_eptout_type::snak
__IO uint32_t snak
Definition: at32f435_437_usb.h:1243
otg_eptout_type::doepint
__IO uint32_t doepint
Definition: at32f435_437_usb.h:1257
otg_eptout_type::doepctl_bit
struct otg_eptout_type::@1269::@1275 doepctl_bit
otg_eptout_type::doepctl
__IO uint32_t doepctl
Definition: at32f435_437_usb.h:1230
otg_eptout_type::xfersize
__IO uint32_t xfersize
Definition: at32f435_437_usb.h:1280
otg_global_type
Definition: at32f435_437_usb.h:474
otg_global_type::dieptxfn
__IO uint32_t dieptxfn[7]
Definition: at32f435_437_usb.h:765
otg_global_type::gintsts
__IO uint32_t gintsts
Definition: at32f435_437_usb.h:565
otg_global_type::gintmsk
__IO uint32_t gintmsk
Definition: at32f435_437_usb.h:605
usb_ept_info
usb endpoint infomation structure definition
Definition: at32f435_437_usb.h:421
usb_ept_info::ept0_slen
uint32_t ept0_slen
Definition: at32f435_437_usb.h:441
usb_ept_info::inout
uint8_t inout
Definition: at32f435_437_usb.h:424
usb_ept_info::maxpacket
uint32_t maxpacket
Definition: at32f435_437_usb.h:429
usb_ept_info::total_len
uint32_t total_len
Definition: at32f435_437_usb.h:436
usb_ept_info::trans_buf
uint8_t * trans_buf
Definition: at32f435_437_usb.h:435
usb_ept_info::stall
uint8_t stall
Definition: at32f435_437_usb.h:431
usb_ept_info::rem0_len
uint32_t rem0_len
Definition: at32f435_437_usb.h:440
usb_ept_info::trans_len
uint32_t trans_len
Definition: at32f435_437_usb.h:437
usb_ept_info::last_len
uint32_t last_len
Definition: at32f435_437_usb.h:439
usb_ept_info::eptn
uint8_t eptn
Definition: at32f435_437_usb.h:422
usb_ept_info::trans_type
uint8_t trans_type
Definition: at32f435_437_usb.h:425
usb_core.h
usb core header file
usbd_core.h
usb device core header file
usbd_sdr.h


AT32F435/437 Firmwary Library: usbd_core.h Source File

  • middlewares
  • usb_drivers
  • inc
usbd_core.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USBD_CORE_H
29#define __USBD_CORE_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
36#include "usb_conf.h"
37#include "usb_std.h"
38
51#ifdef USE_OTG_DEVICE_MODE
52
56typedef enum
57{
58 USBD_NOP_EVENT,
59 USBD_RESET_EVENT,
60 USBD_SUSPEND_EVENT,
61 USBD_WAKEUP_EVENT,
62 USBD_DISCONNECT_EVNET,
63 USBD_INISOINCOM_EVENT,
64 USBD_OUTISOINCOM_EVENT,
65 USBD_ERR_EVENT
66}usbd_event_type;
67
71typedef struct
72{
73 uint16_t length;
74 uint8_t *descriptor;
75}usbd_desc_t;
76
80typedef struct
81{
82 usbd_desc_t *(*get_device_descriptor)(void);
83 usbd_desc_t *(*get_device_qualifier)(void);
84 usbd_desc_t *(*get_device_configuration)(void);
85 usbd_desc_t *(*get_device_other_speed)(void);
86 usbd_desc_t *(*get_device_lang_id)(void);
87 usbd_desc_t *(*get_device_manufacturer_string)(void);
88 usbd_desc_t *(*get_device_product_string)(void);
89 usbd_desc_t *(*get_device_serial_string)(void);
90 usbd_desc_t *(*get_device_interface_string)(void);
91 usbd_desc_t *(*get_device_config_string)(void);
92}usbd_desc_handler;
93
97typedef struct
98{
99 usb_sts_type (*init_handler)(void *udev);
100 usb_sts_type (*clear_handler)(void *udev);
101 usb_sts_type (*setup_handler)(void *udev, usb_setup_type *setup);
102 usb_sts_type (*ept0_tx_handler)(void *udev);
103 usb_sts_type (*ept0_rx_handler)(void *udev);
104 usb_sts_type (*in_handler)(void *udev, uint8_t ept_num);
105 usb_sts_type (*out_handler)(void *udev, uint8_t ept_num);
106 usb_sts_type (*sof_handler)(void *udev);
107 usb_sts_type (*event_handler)(void *udev, usbd_event_type event);
108 void *pdata;
109}usbd_class_handler;
110
114typedef struct
115{
116 usb_reg_type *usb_reg;
118 usbd_class_handler *class_handler;
119 usbd_desc_handler *desc_handler;
121 usb_ept_info ept_in[USB_EPT_MAX_NUM];
122 usb_ept_info ept_out[USB_EPT_MAX_NUM];
124 usb_setup_type setup;
125 uint8_t setup_buffer[12];
127 uint8_t ept0_sts;
128 uint8_t speed;
129 uint16_t ept0_wlength;
131 usbd_conn_state conn_state;
132 usbd_conn_state old_conn_state;
134 uint8_t device_addr;
135 uint8_t remote_wakup;
136 uint8_t default_config;
137 uint8_t dev_config;
138 uint32_t config_status;
139}usbd_core_type;
140
141void usbd_core_in_handler(usbd_core_type *udev, uint8_t ept_num);
142void usbd_core_out_handler(usbd_core_type *udev, uint8_t ept_num);
143void usbd_core_setup_handler(usbd_core_type *udev, uint8_t ept_num);
144void usbd_ctrl_unsupport(usbd_core_type *udev);
145void usbd_ctrl_send(usbd_core_type *udev, uint8_t *buffer, uint16_t len);
146void usbd_ctrl_recv(usbd_core_type *udev, uint8_t *buffer, uint16_t len);
147void usbd_ctrl_send_status(usbd_core_type *udev);
148void usbd_ctrl_recv_status(usbd_core_type *udev);
149void usbd_set_stall(usbd_core_type *udev, uint8_t ept_addr);
150void usbd_clear_stall(usbd_core_type *udev, uint8_t ept_addr);
151void usbd_ept_open(usbd_core_type *udev, uint8_t ept_addr, uint8_t ept_type, uint16_t maxpacket);
152void usbd_ept_close(usbd_core_type *udev, uint8_t ept_addr);
153void usbd_ept_send(usbd_core_type *udev, uint8_t ept_num, uint8_t *buffer, uint16_t len);
154void usbd_ept_recv(usbd_core_type *udev, uint8_t ept_num, uint8_t *buffer, uint16_t len);
155void usbd_connect(usbd_core_type *udev);
156void usbd_disconnect(usbd_core_type *udev);
157void usbd_set_device_addr(usbd_core_type *udev, uint8_t address);
158uint32_t usbd_get_recv_len(usbd_core_type *udev, uint8_t ept_addr);
159void usb_ept_defaut_init(usbd_core_type *udev);
160 usbd_conn_state usbd_connect_state_get(usbd_core_type *udev);
161void usbd_remote_wakeup(usbd_core_type *udev);
162void usbd_enter_suspend(usbd_core_type *udev);
163void usbd_flush_tx_fifo(usbd_core_type *udev, uint8_t ept_num);
164void usbd_fifo_alloc(usbd_core_type *udev);
165 usb_sts_type usbd_core_init(usbd_core_type *udev,
166 usb_reg_type *usb_reg,
167 usbd_class_handler *class_handler,
168 usbd_desc_handler *desc_handler,
169 uint8_t core_id);
170#endif
171
183#ifdef __cplusplus
184}
185#endif
186
187#endif
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
usbd_conn_state
usbd_conn_state
usb device connect state
Definition: usb_std.h:128
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
usbd_connect_state_get
usbd_conn_state usbd_connect_state_get(usbd_core_type *udev)
get usb connect state
Definition: usbd_core.c:597
usbd_set_stall
void usbd_set_stall(usbd_core_type *udev, uint8_t ept_addr)
usb set endpoint to stall status
Definition: usbd_core.c:262
usbd_ept_close
void usbd_ept_close(usbd_core_type *udev, uint8_t ept_addr)
usb close endpoint
Definition: usbd_core.c:346
usbd_ctrl_send_status
void usbd_ctrl_send_status(usbd_core_type *udev)
usb control endpoint send in status
Definition: usbd_core.c:212
usbd_set_device_addr
void usbd_set_device_addr(usbd_core_type *udev, uint8_t address)
usb device set device address.
Definition: usbd_core.c:390
usbd_ept_recv
void usbd_ept_recv(usbd_core_type *udev, uint8_t ept_addr, uint8_t *buffer, uint16_t len)
endpoint receive data
Definition: usbd_core.c:534
usbd_flush_tx_fifo
void usbd_flush_tx_fifo(usbd_core_type *udev, uint8_t ept_num)
usb device flush in endpoint fifo
Definition: usbd_core.c:650
usbd_fifo_alloc
void usbd_fifo_alloc(usbd_core_type *udev)
usb device endpoint fifo alloc
Definition: usbd_core.c:661
usbd_core_out_handler
void usbd_core_out_handler(usbd_core_type *udev, uint8_t ept_addr)
usb core out transfer complete handler
Definition: usbd_core.c:101
usbd_ept_open
void usbd_ept_open(usbd_core_type *udev, uint8_t ept_addr, uint8_t ept_type, uint16_t maxpacket)
usb open endpoint
Definition: usbd_core.c:314
usbd_core_init
usb_sts_type usbd_core_init(usbd_core_type *udev, usb_reg_type *usb_reg, usbd_class_handler *class_handler, usbd_desc_handler *desc_handler, uint8_t core_id)
usb device core initialization
Definition: usbd_core.c:744
usbd_ctrl_recv_status
void usbd_ctrl_recv_status(usbd_core_type *udev)
usb control endpoint send out status
Definition: usbd_core.c:224
usbd_ctrl_send
void usbd_ctrl_send(usbd_core_type *udev, uint8_t *buffer, uint16_t len)
usb control endpoint send data
Definition: usbd_core.c:177
usbd_core_in_handler
void usbd_core_in_handler(usbd_core_type *udev, uint8_t ept_addr)
usb core in transfer complete handler
Definition: usbd_core.c:50
usbd_ept_send
void usbd_ept_send(usbd_core_type *udev, uint8_t ept_addr, uint8_t *buffer, uint16_t len)
endpoint send data
Definition: usbd_core.c:434
usbd_clear_stall
void usbd_clear_stall(usbd_core_type *udev, uint8_t ept_addr)
clear endpoint stall
Definition: usbd_core.c:237
usbd_get_recv_len
uint32_t usbd_get_recv_len(usbd_core_type *udev, uint8_t ept_addr)
get endpoint receive data length
Definition: usbd_core.c:300
usbd_remote_wakeup
void usbd_remote_wakeup(usbd_core_type *udev)
usb device remote wakeup
Definition: usbd_core.c:607
usbd_connect
void usbd_connect(usbd_core_type *udev)
usb device connect to host
Definition: usbd_core.c:369
usbd_ctrl_recv
void usbd_ctrl_recv(usbd_core_type *udev, uint8_t *buffer, uint16_t len)
usb control endpoint recv data
Definition: usbd_core.c:196
usbd_ctrl_unsupport
void usbd_ctrl_unsupport(usbd_core_type *udev)
un-support device request
Definition: usbd_core.c:287
usbd_enter_suspend
void usbd_enter_suspend(usbd_core_type *udev)
usb device enter suspend mode
Definition: usbd_core.c:634
usbd_disconnect
void usbd_disconnect(usbd_core_type *udev)
usb device disconnect to host
Definition: usbd_core.c:379
usbd_core_setup_handler
void usbd_core_setup_handler(usbd_core_type *udev, uint8_t ept_num)
usb core setup transfer complete handler
Definition: usbd_core.c:141
otg_global_type
Definition: at32f435_437_usb.h:474
usb_ept_info
usb endpoint infomation structure definition
Definition: at32f435_437_usb.h:421
usb_setup_type
format of usb setup data
Definition: usb_std.h:280
usb_std.h
usb standard header file


AT32F435/437 Firmwary Library: usbd_int.c Source File

  • middlewares
  • usb_drivers
  • src
usbd_int.c
Go to the documentation of this file.
1
26#include "usbd_int.h"
27
46void usbd_irq_handler(otg_core_type *otgdev)
47{
48 otg_global_type *usbx = otgdev->usb_reg;
49 usbd_core_type *udev = &otgdev->dev;
50 uint32_t intsts = usb_global_get_all_interrupt(usbx);
51
52 /* check current device mode */
53 if(usbx->gintsts_bit.curmode == 0)
54 {
55 /* mode mismatch interrupt */
56 if(intsts & USB_OTG_MODEMIS_FLAG)
57 {
58 usb_global_clear_interrupt(usbx, USB_OTG_MODEMIS_FLAG);
59 }
60
61 /* in endpoint interrupt */
62 if(intsts & USB_OTG_IEPT_FLAG)
63 {
64 usbd_inept_handler(udev);
65 }
66
67 /* out endpoint interrupt */
68 if(intsts & USB_OTG_OEPT_FLAG)
69 {
70 usbd_outept_handler(udev);
71 }
72
73 /* usb reset interrupt */
74 if(intsts & USB_OTG_USBRST_FLAG)
75 {
76 usbd_reset_handler(udev);
77 usb_global_clear_interrupt(usbx, USB_OTG_USBRST_FLAG);
78 }
79
80 /* sof interrupt */
81 if(intsts & USB_OTG_SOF_FLAG)
82 {
83 usbd_sof_handler(udev);
84 usb_global_clear_interrupt(usbx, USB_OTG_SOF_FLAG);
85 }
86
87 /* enumeration done interrupt */
88 if(intsts & USB_OTG_ENUMDONE_FLAG)
89 {
90 usbd_enumdone_handler(udev);
91 usb_global_clear_interrupt(usbx, USB_OTG_ENUMDONE_FLAG);
92 }
93
94 /* rx non-empty interrupt, indicates that there is at least one
95 data packet pending to be read in rx fifo */
96 if(intsts & USB_OTG_RXFLVL_FLAG)
97 {
98 usbd_rxflvl_handler(udev);
99 }
100
101 /* incomplete isochronous in transfer interrupt */
102 if(intsts & USB_OTG_INCOMISOIN_FLAG)
103 {
104 usbd_incomisioin_handler(udev);
105 usb_global_clear_interrupt(usbx, USB_OTG_INCOMISOIN_FLAG);
106 }
107 #ifndef USB_VBUS_IGNORE
108 /* disconnect detected interrupt */
109 if(intsts & USB_OTG_OTGINT_FLAG)
110 {
111 uint32_t tmp = udev->usb_reg->gotgint;
112 if(udev->usb_reg->gotgint_bit.sesenddet)
113 usbd_discon_handler(udev);
114 udev->usb_reg->gotgint = tmp;
115 usb_global_clear_interrupt(usbx, USB_OTG_OTGINT_FLAG);
116 }
117#endif
118 /* incomplete isochronous out transfer interrupt */
119 if(intsts & USB_OTG_INCOMPIP_INCOMPISOOUT_FLAG)
120 {
121 usbd_incomisoout_handler(udev);
122 usb_global_clear_interrupt(usbx, USB_OTG_INCOMPIP_INCOMPISOOUT_FLAG);
123 }
124
125 /* resume/remote wakeup interrupt */
126 if(intsts & USB_OTG_WKUP_FLAG)
127 {
128 usbd_wakeup_handler(udev);
129 usb_global_clear_interrupt(usbx, USB_OTG_WKUP_FLAG);
130 }
131
132 /* usb suspend interrupt */
133 if(intsts & USB_OTG_USBSUSP_FLAG)
134 {
135 usbd_suspend_handler(udev);
136 usb_global_clear_interrupt(usbx, USB_OTG_USBSUSP_FLAG);
137 }
138 }
139}
140
147void usb_write_empty_txfifo(usbd_core_type *udev, uint32_t ept_num)
148{
149 otg_global_type *usbx = udev->usb_reg;
150 usb_ept_info *ept_info = &udev->ept_in[ept_num];
151 uint32_t length = ept_info->total_len - ept_info->trans_len;
152 uint32_t wlen = 0;
153
154 if(length > ept_info->maxpacket)
155 {
156 length = ept_info->maxpacket;
157 }
158 wlen = (length + 3) / 4;
159
160 while((USB_INEPT(usbx, ept_num)->dtxfsts & USB_OTG_DTXFSTS_INEPTFSAV) > wlen &&
161 (ept_info->trans_len < ept_info->total_len) && (ept_info->total_len != 0))
162 {
163 length = ept_info->total_len - ept_info->trans_len;
164 if(length > ept_info->maxpacket)
165 {
166 length = ept_info->maxpacket;
167 }
168 wlen = (length + 3) / 4;
169 usb_write_packet(usbx, ept_info->trans_buf, ept_num, length);
170
171 ept_info->trans_buf += length;
172 ept_info->trans_len += length;
173
174 }
175 if(length <= 0)
176 {
177 OTG_DEVICE(usbx)->diepempmsk &= ~(0x1 << ept_num);
178 }
179}
180
181
187void usbd_inept_handler(usbd_core_type *udev)
188{
189 otg_global_type *usbx = udev->usb_reg;
190 uint32_t ept_num = 0, ept_int;
191 uint32_t intsts;
192
193 /*get all endpoint interrut */
194 intsts = usb_get_all_in_interrupt(usbx);
195 while(intsts)
196 {
197 if(intsts & 0x1)
198 {
199 /* get endpoint interrupt flag */
200 ept_int = usb_ept_in_interrupt(usbx, ept_num);
201
202 /* transfer completed interrupt */
203 if(ept_int & USB_OTG_DIEPINT_XFERC_FLAG)
204 {
205 OTG_DEVICE(usbx)->diepempmsk &= ~(1 << ept_num);
206 usb_ept_in_clear(usbx, ept_num , USB_OTG_DIEPINT_XFERC_FLAG);
207 usbd_core_in_handler(udev, ept_num);
208 }
209
210 /* timeout condition interrupt */
211 if(ept_int & USB_OTG_DIEPINT_TIMEOUT_FLAG)
212 {
213 usb_ept_in_clear(usbx, ept_num , USB_OTG_DIEPINT_TIMEOUT_FLAG);
214 }
215
216 /* in token received when tx fifo is empty */
217 if(ept_int & USB_OTG_DIEPINT_INTKNTXFEMP_FLAG)
218 {
219 usb_ept_in_clear(usbx, ept_num , USB_OTG_DIEPINT_INTKNTXFEMP_FLAG);
220 }
221
222 /* in endpoint nak effective */
223 if(ept_int & USB_OTG_DIEPINT_INEPTNAK_FLAG)
224 {
225 usb_ept_in_clear(usbx, ept_num , USB_OTG_DIEPINT_INEPTNAK_FLAG);
226 }
227
228 /* endpoint disable interrupt */
229 if(ept_int & USB_OTG_DIEPINT_EPTDISD_FLAG)
230 {
231 usb_ept_in_clear(usbx, ept_num , USB_OTG_DIEPINT_EPTDISD_FLAG);
232 }
233
234 /* transmit fifo empty interrupt */
235 if(ept_int & USB_OTG_DIEPINT_TXFEMP_FLAG)
236 {
237 usb_write_empty_txfifo(udev, ept_num);
238 }
239 }
240 ept_num ++;
241 intsts >>= 1;
242 }
243}
244
250void usbd_outept_handler(usbd_core_type *udev)
251{
252 otg_global_type *usbx = udev->usb_reg;
253 uint32_t ept_num = 0, ept_int;
254 uint32_t intsts;
255
256 /* get all out endpoint interrupt */
257 intsts = usb_get_all_out_interrupt(usbx);
258
259 while(intsts)
260 {
261 if(intsts & 0x1)
262 {
263 /* get out endpoint interrupt */
264 ept_int = usb_ept_out_interrupt(usbx, ept_num);
265
266 /* transfer completed interrupt */
267 if(ept_int & USB_OTG_DOEPINT_XFERC_FLAG)
268 {
269 usb_ept_out_clear(usbx, ept_num , USB_OTG_DOEPINT_XFERC_FLAG);
270 usbd_core_out_handler(udev, ept_num);
271 }
272
273 /* setup phase done interrupt */
274 if(ept_int & USB_OTG_DOEPINT_SETUP_FLAG)
275 {
276 usb_ept_out_clear(usbx, ept_num , USB_OTG_DOEPINT_SETUP_FLAG);
277 usbd_core_setup_handler(udev, ept_num);
278 if(udev->device_addr != 0)
279 {
280 OTG_DEVICE(udev->usb_reg)->dcfg_bit.devaddr = udev->device_addr;
281 udev->device_addr = 0;
282 }
283 }
284
285 /* endpoint disable interrupt */
286 if(ept_int & USB_OTG_DOEPINT_OUTTEPD_FLAG)
287 {
288 usb_ept_out_clear(usbx, ept_num , USB_OTG_DOEPINT_OUTTEPD_FLAG);
289 }
290 }
291 ept_num ++;
292 intsts >>= 1;
293 }
294}
295
301void usbd_enumdone_handler(usbd_core_type *udev)
302{
303 otg_global_type *usbx = udev->usb_reg;
304
305 usb_ept0_setup(usbx);
306
307 usbx->gusbcfg_bit.usbtrdtim = USB_TRDTIM_16;
308
309 /* open endpoint 0 out */
310 usbd_ept_open(udev, 0x00, EPT_CONTROL_TYPE, 0x40);
311
312 /* open endpoint 0 in */
313 usbd_ept_open(udev, 0x80, EPT_CONTROL_TYPE, 0x40);
314
315 /* usb connect state set to default */
316 udev->conn_state = USB_CONN_STATE_DEFAULT;
317
318 /* clear callback */
319 if(udev->class_handler->clear_handler != 0)
320 udev->class_handler->clear_handler(udev);
321}
322
328void usbd_rxflvl_handler(usbd_core_type *udev)
329{
330 otg_global_type *usbx = udev->usb_reg;
331 uint32_t stsp;
332 uint32_t count;
333 uint32_t pktsts;
334 usb_ept_info *ept_info;
335
336 /* disable rxflvl interrupt */
337 usb_global_interrupt_enable(usbx, USB_OTG_RXFLVL_INT, FALSE);
338
339 /* get rx status */
340 stsp = usbx->grxstsp;
341
342 /*get the byte count of receive */
343 count = (stsp & USB_OTG_GRXSTSP_BCNT) >> 4;
344
345 /* get packet status */
346 pktsts = (stsp &USB_OTG_GRXSTSP_PKTSTS) >> 17;
347
348 /* get endpoint infomation struct */
349 ept_info = &udev->ept_out[stsp & USB_OTG_GRXSTSP_EPTNUM];
350
351 /* received out data packet */
352 if(pktsts == USB_OUT_STS_DATA)
353 {
354 if(count != 0)
355 {
356 /* read packet to buffer */
357 usb_read_packet(usbx, ept_info->trans_buf, (stsp & USB_OTG_GRXSTSP_EPTNUM), count);
358 ept_info->trans_buf += count;
359 ept_info->trans_len += count;
360
361 }
362 }
363 /* setup data received */
364 else if ( pktsts == USB_SETUP_STS_DATA)
365 {
366 /* read packet to buffer */
367 usb_read_packet(usbx, udev->setup_buffer, (stsp & USB_OTG_GRXSTSP_EPTNUM), count);
368 ept_info->trans_len += count;
369 }
370
371 /* enable rxflvl interrupt */
372 usb_global_interrupt_enable(usbx, USB_OTG_RXFLVL_INT, TRUE);
373
374}
375
381void usbd_discon_handler(usbd_core_type *udev)
382{
383 /* disconnect callback handler */
384 if(udev->class_handler->event_handler != 0)
385 udev->class_handler->event_handler(udev, USBD_DISCONNECT_EVNET);
386}
387
388
394void usbd_incomisoout_handler(usbd_core_type *udev)
395{
396 if(udev->class_handler->event_handler != 0)
397 udev->class_handler->event_handler(udev, USBD_OUTISOINCOM_EVENT);
398}
399
405void usbd_incomisioin_handler(usbd_core_type *udev)
406{
407 if(udev->class_handler->event_handler != 0)
408 udev->class_handler->event_handler(udev, USBD_INISOINCOM_EVENT);
409}
410
416void usbd_reset_handler(usbd_core_type *udev)
417{
418 otg_global_type *usbx = udev->usb_reg;
419 otg_device_type *dev = OTG_DEVICE(usbx);
420 uint32_t i_index = 0;
421
422 /* disable remote wakeup singal */
423 dev->dctl_bit.rwkupsig = FALSE;
424
425 /* endpoint fifo alloc */
426 usbd_fifo_alloc(udev);
427
428 /* flush all tx fifo */
429 usb_flush_tx_fifo(usbx, 0x10);
430
431 /* clear in and out endpoint interrupt flag */
432 for(i_index = 0; i_index < USB_EPT_MAX_NUM; i_index ++)
433 {
434 USB_INEPT(usbx, i_index)->diepint = 0xFF;
435 USB_OUTEPT(usbx, i_index)->doepint = 0xFF;
436 }
437
438 /* clear endpoint flag */
439 dev->daint = 0xFFFFFFFF;
440
441 /*clear endpoint interrupt mask */
442 dev->daintmsk = 0x10001;
443
444 /* enable out endpoint xfer, eptdis, setup interrupt mask */
445 dev->doepmsk_bit.xfercmsk = TRUE;
446 dev->doepmsk_bit.eptdismsk = TRUE;
447 dev->doepmsk_bit.setupmsk = TRUE;
448
449 /* enable in endpoint xfer, eptdis, timeout interrupt mask */
450 dev->diepmsk_bit.xfercmsk = TRUE;
451 dev->diepmsk_bit.eptdismsk = TRUE;
452 dev->diepmsk_bit.timeoutmsk = TRUE;
453
454 /* set device address to 0 */
455 usb_set_address(usbx, 0);
456
457 /* enable endpoint 0 */
458 usb_ept0_start(usbx);
459
460 /* usb connect state set to default */
461 udev->conn_state = USB_CONN_STATE_DEFAULT;
462
463 /* user define reset event */
464 if(udev->class_handler->event_handler)
465 udev->class_handler->event_handler(udev, USBD_RESET_EVENT);
466}
467
473void usbd_sof_handler(usbd_core_type *udev)
474{
475 /* user sof handler in class define */
476 if(udev->class_handler->sof_handler)
477 udev->class_handler->sof_handler(udev);
478}
479
485void usbd_suspend_handler(usbd_core_type *udev)
486{
487 otg_global_type *usbx = udev->usb_reg;
488
489 if(OTG_DEVICE(usbx)->dsts_bit.suspsts)
490 {
491 /* save connect state */
492 udev->old_conn_state = udev->conn_state;
493
494 /* set current state to suspend */
495 udev->conn_state = USB_CONN_STATE_SUSPENDED;
496
497 /* enter suspend mode */
498 usbd_enter_suspend(udev);
499
500 /* user suspend handler */
501 if(udev->class_handler->event_handler != 0)
502 udev->class_handler->event_handler(udev, USBD_SUSPEND_EVENT);
503 }
504}
505
511void usbd_wakeup_handler(usbd_core_type *udev)
512{
513 otg_global_type *usbx = udev->usb_reg;
514
515 /* clear remote wakeup bit */
516 OTG_DEVICE(usbx)->dctl_bit.rwkupsig = FALSE;
517
518 /* exit suspend mode */
519 usb_open_phy_clk(udev->usb_reg);
520
521 /* restore connect state */
522 udev->conn_state = udev->old_conn_state;
523
524 /* user suspend handler */
525 if(udev->class_handler->event_handler != 0)
526 udev->class_handler->event_handler(udev, USBD_WAKEUP_EVENT);
527}
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
USB_OTG_DIEPINT_TIMEOUT_FLAG
#define USB_OTG_DIEPINT_TIMEOUT_FLAG
Definition: at32f435_437_usb.h:282
USB_OTG_DIEPINT_XFERC_FLAG
#define USB_OTG_DIEPINT_XFERC_FLAG
usb device in endpoint flag
Definition: at32f435_437_usb.h:280
USB_OTG_DIEPINT_EPTDISD_FLAG
#define USB_OTG_DIEPINT_EPTDISD_FLAG
Definition: at32f435_437_usb.h:281
USB_OTG_DOEPINT_SETUP_FLAG
#define USB_OTG_DOEPINT_SETUP_FLAG
Definition: at32f435_437_usb.h:292
USB_OTG_DOEPINT_XFERC_FLAG
#define USB_OTG_DOEPINT_XFERC_FLAG
usb device out endpoint flag
Definition: at32f435_437_usb.h:290
USB_OTG_DIEPINT_INTKNTXFEMP_FLAG
#define USB_OTG_DIEPINT_INTKNTXFEMP_FLAG
Definition: at32f435_437_usb.h:283
USB_OTG_DIEPINT_TXFEMP_FLAG
#define USB_OTG_DIEPINT_TXFEMP_FLAG
Definition: at32f435_437_usb.h:285
USB_OTG_DIEPINT_INEPTNAK_FLAG
#define USB_OTG_DIEPINT_INEPTNAK_FLAG
Definition: at32f435_437_usb.h:284
USB_OTG_DTXFSTS_INEPTFSAV
#define USB_OTG_DTXFSTS_INEPTFSAV
usb device in endpoint fifo space mask
Definition: at32f435_437_usb.h:299
USB_OTG_DOEPINT_OUTTEPD_FLAG
#define USB_OTG_DOEPINT_OUTTEPD_FLAG
Definition: at32f435_437_usb.h:293
EPT_CONTROL_TYPE
@ EPT_CONTROL_TYPE
Definition: at32f435_437_usb.h:346
usb_ept_out_clear
void usb_ept_out_clear(otg_global_type *usbx, uint32_t eptn, uint32_t flag)
clear out endpoint interrupt flag
Definition: at32f435_437_usb.c:690
usb_ept0_setup
void usb_ept0_setup(otg_global_type *usbx)
endpoint 0 start setup
Definition: at32f435_437_usb.c:757
usb_ept_in_clear
void usb_ept_in_clear(otg_global_type *usbx, uint32_t eptn, uint32_t flag)
clear in endpoint interrupt flag
Definition: at32f435_437_usb.c:711
usb_write_packet
void usb_write_packet(otg_global_type *usbx, uint8_t *pusr_buf, uint16_t num, uint16_t nbytes)
write data from user memory to usb buffer
Definition: at32f435_437_usb.c:422
usb_global_interrupt_enable
void usb_global_interrupt_enable(otg_global_type *usbx, uint16_t interrupt, confirm_state new_state)
usb interrupt mask enable
Definition: at32f435_437_usb.c:196
usb_global_clear_interrupt
void usb_global_clear_interrupt(otg_global_type *usbx, uint32_t flag)
clear the global interrupt flag
Definition: at32f435_437_usb.c:255
usb_ept0_start
void usb_ept0_start(otg_global_type *usbx)
enable endpoint 0 out
Definition: at32f435_437_usb.c:739
usb_set_address
void usb_set_address(otg_global_type *usbx, uint8_t address)
set the host assignment address
Definition: at32f435_437_usb.c:726
usb_flush_tx_fifo
void usb_flush_tx_fifo(otg_global_type *usbx, uint32_t fifo_num)
flush tx fifo
Definition: at32f435_437_usb.c:124
OTG_DEVICE
#define OTG_DEVICE(usbx)
Definition: at32f435_437_usb.h:1331
usb_ept_out_interrupt
uint32_t usb_ept_out_interrupt(otg_global_type *usbx, uint32_t eptn)
get out endpoint interrupt flag
Definition: at32f435_437_usb.c:650
usb_global_get_all_interrupt
uint32_t usb_global_get_all_interrupt(otg_global_type *usbx)
get all global core interrupt flag
Definition: at32f435_437_usb.c:216
USB_OUTEPT
#define USB_OUTEPT(usbx, eptn)
Definition: at32f435_437_usb.h:1335
usb_get_all_out_interrupt
uint32_t usb_get_all_out_interrupt(otg_global_type *usbx)
get all out endpoint interrupt bits
Definition: at32f435_437_usb.c:620
usb_ept_in_interrupt
uint32_t usb_ept_in_interrupt(otg_global_type *usbx, uint32_t eptn)
get in endpoint interrupt flag
Definition: at32f435_437_usb.c:665
usb_get_all_in_interrupt
uint32_t usb_get_all_in_interrupt(otg_global_type *usbx)
get all in endpoint interrupt bits
Definition: at32f435_437_usb.c:634
USB_INEPT
#define USB_INEPT(usbx, eptn)
Definition: at32f435_437_usb.h:1334
usb_open_phy_clk
void usb_open_phy_clk(otg_global_type *usbx)
usb open phy clock
Definition: at32f435_437_usb.c:409
usb_read_packet
void usb_read_packet(otg_global_type *usbx, uint8_t *pusr_buf, uint16_t num, uint16_t nbytes)
read data from usb buffer to user buffer
Definition: at32f435_437_usb.c:445
USB_OTG_OEPT_FLAG
#define USB_OTG_OEPT_FLAG
Definition: at32f435_437_usb.h:100
USB_OTG_OTGINT_FLAG
#define USB_OTG_OTGINT_FLAG
Definition: at32f435_437_usb.h:87
USB_OTG_MODEMIS_FLAG
#define USB_OTG_MODEMIS_FLAG
Definition: at32f435_437_usb.h:86
USB_OTG_WKUP_FLAG
#define USB_OTG_WKUP_FLAG
Definition: at32f435_437_usb.h:108
USB_OTG_USBSUSP_FLAG
#define USB_OTG_USBSUSP_FLAG
Definition: at32f435_437_usb.h:94
USB_OTG_INCOMISOIN_FLAG
#define USB_OTG_INCOMISOIN_FLAG
Definition: at32f435_437_usb.h:101
USB_OTG_ENUMDONE_FLAG
#define USB_OTG_ENUMDONE_FLAG
Definition: at32f435_437_usb.h:96
USB_OTG_RXFLVL_FLAG
#define USB_OTG_RXFLVL_FLAG
Definition: at32f435_437_usb.h:89
USB_OTG_USBRST_FLAG
#define USB_OTG_USBRST_FLAG
Definition: at32f435_437_usb.h:95
USB_OTG_INCOMPIP_INCOMPISOOUT_FLAG
#define USB_OTG_INCOMPIP_INCOMPISOOUT_FLAG
Definition: at32f435_437_usb.h:102
USB_OTG_IEPT_FLAG
#define USB_OTG_IEPT_FLAG
Definition: at32f435_437_usb.h:99
USB_OTG_SOF_FLAG
#define USB_OTG_SOF_FLAG
Definition: at32f435_437_usb.h:88
USB_OTG_RXFLVL_INT
#define USB_OTG_RXFLVL_INT
Definition: at32f435_437_usb.h:55
USB_TRDTIM_16
#define USB_TRDTIM_16
Definition: at32f435_437_usb.h:124
USB_OUT_STS_DATA
#define USB_OUT_STS_DATA
Definition: at32f435_437_usb.h:147
USB_SETUP_STS_DATA
#define USB_SETUP_STS_DATA
Definition: at32f435_437_usb.h:150
USB_OTG_GRXSTSP_PKTSTS
#define USB_OTG_GRXSTSP_PKTSTS
Definition: at32f435_437_usb.h:133
USB_OTG_GRXSTSP_BCNT
#define USB_OTG_GRXSTSP_BCNT
Definition: at32f435_437_usb.h:131
USB_OTG_GRXSTSP_EPTNUM
#define USB_OTG_GRXSTSP_EPTNUM
usb receive status
Definition: at32f435_437_usb.h:129
USB_CONN_STATE_SUSPENDED
@ USB_CONN_STATE_SUSPENDED
Definition: usb_std.h:132
USB_CONN_STATE_DEFAULT
@ USB_CONN_STATE_DEFAULT
Definition: usb_std.h:129
usbd_fifo_alloc
void usbd_fifo_alloc(usbd_core_type *udev)
usb device endpoint fifo alloc
Definition: usbd_core.c:661
usbd_core_out_handler
void usbd_core_out_handler(usbd_core_type *udev, uint8_t ept_addr)
usb core out transfer complete handler
Definition: usbd_core.c:101
usbd_ept_open
void usbd_ept_open(usbd_core_type *udev, uint8_t ept_addr, uint8_t ept_type, uint16_t maxpacket)
usb open endpoint
Definition: usbd_core.c:314
usbd_core_in_handler
void usbd_core_in_handler(usbd_core_type *udev, uint8_t ept_addr)
usb core in transfer complete handler
Definition: usbd_core.c:50
usbd_enter_suspend
void usbd_enter_suspend(usbd_core_type *udev)
usb device enter suspend mode
Definition: usbd_core.c:634
usbd_core_setup_handler
void usbd_core_setup_handler(usbd_core_type *udev, uint8_t ept_num)
usb core setup transfer complete handler
Definition: usbd_core.c:141
usbd_inept_handler
void usbd_inept_handler(usbd_core_type *udev)
usb in endpoint handler
Definition: usbd_int.c:187
usbd_outept_handler
void usbd_outept_handler(usbd_core_type *udev)
usb out endpoint handler
Definition: usbd_int.c:250
usbd_sof_handler
void usbd_sof_handler(usbd_core_type *udev)
usb device sof interrupt request handler.
Definition: usbd_int.c:473
usb_write_empty_txfifo
void usb_write_empty_txfifo(usbd_core_type *udev, uint32_t ept_num)
usb write tx fifo.
Definition: usbd_int.c:147
usbd_incomisioin_handler
void usbd_incomisioin_handler(usbd_core_type *udev)
usb incomplete in handler
Definition: usbd_int.c:405
usbd_enumdone_handler
void usbd_enumdone_handler(usbd_core_type *udev)
usb enumeration done handler
Definition: usbd_int.c:301
usbd_reset_handler
void usbd_reset_handler(usbd_core_type *udev)
usb device reset interrupt request handler.
Definition: usbd_int.c:416
usbd_irq_handler
void usbd_irq_handler(otg_core_type *otgdev)
usb device interrput request handler.
Definition: usbd_int.c:46
usbd_incomisoout_handler
void usbd_incomisoout_handler(usbd_core_type *udev)
usb incomplete out handler
Definition: usbd_int.c:394
usbd_rxflvl_handler
void usbd_rxflvl_handler(usbd_core_type *udev)
usb rx non-empty handler
Definition: usbd_int.c:328
usbd_wakeup_handler
void usbd_wakeup_handler(usbd_core_type *udev)
usb device wakup interrupt request handler.
Definition: usbd_int.c:511
usbd_discon_handler
void usbd_discon_handler(usbd_core_type *udev)
usb disconnect handler
Definition: usbd_int.c:381
usbd_suspend_handler
void usbd_suspend_handler(usbd_core_type *udev)
usb device suspend interrupt request handler.
Definition: usbd_int.c:485
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
otg_core_type::usb_reg
usb_reg_type * usb_reg
Definition: usb_core.h:93
otg_device_type
Definition: at32f435_437_usb.h:996
otg_device_type::timeoutmsk
__IO uint32_t timeoutmsk
Definition: at32f435_437_usb.h:1065
otg_device_type::eptdismsk
__IO uint32_t eptdismsk
Definition: at32f435_437_usb.h:1063
otg_device_type::xfercmsk
__IO uint32_t xfercmsk
Definition: at32f435_437_usb.h:1062
otg_device_type::doepmsk_bit
struct otg_device_type::@1241::@1253 doepmsk_bit
otg_device_type::dctl_bit
struct otg_device_type::@1235::@1250 dctl_bit
otg_device_type::rwkupsig
__IO uint32_t rwkupsig
Definition: at32f435_437_usb.h:1022
otg_device_type::diepmsk_bit
struct otg_device_type::@1239::@1252 diepmsk_bit
otg_device_type::setupmsk
__IO uint32_t setupmsk
Definition: at32f435_437_usb.h:1087
otg_device_type::daintmsk
__IO uint32_t daintmsk
Definition: at32f435_437_usb.h:1116
otg_device_type::daint
__IO uint32_t daint
Definition: at32f435_437_usb.h:1103
otg_global_type
Definition: at32f435_437_usb.h:474
otg_global_type::curmode
__IO uint32_t curmode
Definition: at32f435_437_usb.h:568
otg_global_type::usbtrdtim
__IO uint32_t usbtrdtim
Definition: at32f435_437_usb.h:532
otg_global_type::gusbcfg_bit
struct otg_global_type::@1155::@1184 gusbcfg_bit
otg_global_type::gintsts_bit
struct otg_global_type::@1159::@1186 gintsts_bit
otg_global_type::grxstsp
__IO uint32_t grxstsp
Definition: at32f435_437_usb.h:662
usb_ept_info
usb endpoint infomation structure definition
Definition: at32f435_437_usb.h:421
usb_ept_info::maxpacket
uint32_t maxpacket
Definition: at32f435_437_usb.h:429
usb_ept_info::total_len
uint32_t total_len
Definition: at32f435_437_usb.h:436
usb_ept_info::trans_buf
uint8_t * trans_buf
Definition: at32f435_437_usb.h:435
usb_ept_info::trans_len
uint32_t trans_len
Definition: at32f435_437_usb.h:437
usbd_int.h
usb interrupt header file


AT32F435/437 Firmwary Library: usbd_int.h Source File

  • middlewares
  • usb_drivers
  • inc
usbd_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USBD_INT_H
29#define __USBD_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
46/* includes ------------------------------------------------------------------*/
47#include "usbd_core.h"
48#include "usb_core.h"
49
50void usbd_irq_handler(otg_core_type *udev);
51void usbd_ept_handler(usbd_core_type *udev);
52void usbd_reset_handler(usbd_core_type *udev);
53void usbd_sof_handler(usbd_core_type *udev);
54void usbd_suspend_handler(usbd_core_type *udev);
55void usbd_wakeup_handler(usbd_core_type *udev);
56void usbd_inept_handler(usbd_core_type *udev);
57void usbd_outept_handler(usbd_core_type *udev);
58void usbd_enumdone_handler(usbd_core_type *udev);
59void usbd_rxflvl_handler(usbd_core_type *udev);
60void usbd_incomisioin_handler(usbd_core_type *udev);
61void usbd_discon_handler(usbd_core_type *udev);
62void usbd_incomisoout_handler(usbd_core_type *udev);
63void usb_write_empty_txfifo(usbd_core_type *udev, uint32_t ept_num);
64
77#ifdef __cplusplus
78}
79#endif
80
81#endif
82
usbd_inept_handler
void usbd_inept_handler(usbd_core_type *udev)
usb in endpoint handler
Definition: usbd_int.c:187
usbd_outept_handler
void usbd_outept_handler(usbd_core_type *udev)
usb out endpoint handler
Definition: usbd_int.c:250
usbd_sof_handler
void usbd_sof_handler(usbd_core_type *udev)
usb device sof interrupt request handler.
Definition: usbd_int.c:473
usb_write_empty_txfifo
void usb_write_empty_txfifo(usbd_core_type *udev, uint32_t ept_num)
usb write tx fifo.
Definition: usbd_int.c:147
usbd_incomisioin_handler
void usbd_incomisioin_handler(usbd_core_type *udev)
usb incomplete in handler
Definition: usbd_int.c:405
usbd_ept_handler
void usbd_ept_handler(usbd_core_type *udev)
usbd_enumdone_handler
void usbd_enumdone_handler(usbd_core_type *udev)
usb enumeration done handler
Definition: usbd_int.c:301
usbd_reset_handler
void usbd_reset_handler(usbd_core_type *udev)
usb device reset interrupt request handler.
Definition: usbd_int.c:416
usbd_incomisoout_handler
void usbd_incomisoout_handler(usbd_core_type *udev)
usb incomplete out handler
Definition: usbd_int.c:394
usbd_rxflvl_handler
void usbd_rxflvl_handler(usbd_core_type *udev)
usb rx non-empty handler
Definition: usbd_int.c:328
usbd_wakeup_handler
void usbd_wakeup_handler(usbd_core_type *udev)
usb device wakup interrupt request handler.
Definition: usbd_int.c:511
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
usbd_discon_handler
void usbd_discon_handler(usbd_core_type *udev)
usb disconnect handler
Definition: usbd_int.c:381
usbd_suspend_handler
void usbd_suspend_handler(usbd_core_type *udev)
usb device suspend interrupt request handler.
Definition: usbd_int.c:485
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_core.h
usb device core header file


AT32F435/437 Firmwary Library: usbd_sdr.c Source File

  • middlewares
  • usb_drivers
  • src
usbd_sdr.c
Go to the documentation of this file.
1
26#include "usbd_sdr.h"
27
41static usb_sts_type usbd_get_descriptor(usbd_core_type *udev);
42static usb_sts_type usbd_set_address(usbd_core_type *udev);
43static usb_sts_type usbd_get_status(usbd_core_type *udev);
44static usb_sts_type usbd_clear_feature(usbd_core_type *udev);
45static usb_sts_type usbd_set_feature(usbd_core_type *udev);
46static usb_sts_type usbd_get_configuration(usbd_core_type *udev);
47static usb_sts_type usbd_set_configuration(usbd_core_type *udev);
48
55void usbd_setup_request_parse(usb_setup_type *setup, uint8_t *buf)
56{
57 setup->bmRequestType = *(uint8_t *) buf;
58 setup->bRequest = *(uint8_t *) (buf + 1);
59 setup->wValue = SWAPBYTE(buf + 2);
60 setup->wIndex = SWAPBYTE(buf + 4);
61 setup->wLength = SWAPBYTE(buf + 6);
62}
63
69static usb_sts_type usbd_get_descriptor(usbd_core_type *udev)
70{
71 usb_sts_type ret = USB_OK;
72 uint16_t len = 0;
73 usbd_desc_t *desc = NULL;
74 uint8_t desc_type = udev->setup.wValue >> 8;
75 switch(desc_type)
76 {
77 case USB_DESCIPTOR_TYPE_DEVICE:
78 desc = udev->desc_handler->get_device_descriptor();
79 break;
80 case USB_DESCIPTOR_TYPE_CONFIGURATION:
81 desc = udev->desc_handler->get_device_configuration();
82 break;
83 case USB_DESCIPTOR_TYPE_STRING:
84 {
85 uint8_t str_desc = (uint8_t)udev->setup.wValue;
86 switch(str_desc)
87 {
88 case USB_LANGID_STRING:
89 desc = udev->desc_handler->get_device_lang_id();
90 break;
91 case USB_MFC_STRING:
92 desc = udev->desc_handler->get_device_manufacturer_string();
93 break;
94 case USB_PRODUCT_STRING:
95 desc = udev->desc_handler->get_device_product_string();
96 break;
97 case USB_SERIAL_STRING:
98 desc = udev->desc_handler->get_device_serial_string();
99 break;
100 case USB_CONFIG_STRING:
101 desc = udev->desc_handler->get_device_config_string();
102 break;
103 case USB_INTERFACE_STRING:
104 desc = udev->desc_handler->get_device_interface_string();
105 break;
106 default:
107 udev->class_handler->setup_handler(udev, &udev->setup);
108 return ret;
109 }
110 break;
111 }
112 case USB_DESCIPTOR_TYPE_DEVICE_QUALIFIER:
113 usbd_ctrl_unsupport(udev);
114 break;
115 case USB_DESCIPTOR_TYPE_OTHER_SPEED:
116 usbd_ctrl_unsupport(udev);
117 return ret;
118 default:
119 usbd_ctrl_unsupport(udev);
120 return ret;
121 }
122
123 if(desc != NULL)
124 {
125 if((desc->length != 0) && (udev->setup.wLength != 0))
126 {
127 len = MIN(desc->length , udev->setup.wLength);
128 usbd_ctrl_send(udev, desc->descriptor, len);
129 }
130 }
131 return ret;
132}
133
139static usb_sts_type usbd_set_address(usbd_core_type *udev)
140{
141 usb_sts_type ret = USB_OK;
142 usb_setup_type *setup = &udev->setup;
143 uint8_t dev_addr;
144
145 /* if wIndex or wLength are non-zero, then the behavior of
146 the device is not specified
147 */
148 if(setup->wIndex == 0 && setup->wLength == 0)
149 {
150 dev_addr = (uint8_t)(setup->wValue) & 0x7f;
151
152 /* device behavior when this request is received
153 while the device is in the configured state is not specified.*/
154 if(udev->conn_state == USB_CONN_STATE_CONFIGURED )
155 {
156 usbd_ctrl_unsupport(udev);
157 }
158 else
159 {
160 udev->device_addr = dev_addr;
161
162 if(dev_addr != 0)
163 {
164 udev->conn_state = USB_CONN_STATE_ADDRESSED;
165 }
166 else
167 {
168 udev->conn_state = USB_CONN_STATE_DEFAULT;
169 }
170 usbd_ctrl_send_status(udev);
171 }
172 }
173 else
174 {
175 usbd_ctrl_unsupport(udev);
176 }
177 return ret;
178}
179
185static usb_sts_type usbd_get_status(usbd_core_type *udev)
186{
187 usb_sts_type ret = USB_OK;
188 switch(udev->conn_state)
189 {
190 case USB_CONN_STATE_ADDRESSED:
191 case USB_CONN_STATE_CONFIGURED:
192 if(udev->remote_wakup)
193 {
194 udev->config_status |= USB_CONF_REMOTE_WAKEUP;
195 }
196 usbd_ctrl_send(udev, (uint8_t *)(&udev->config_status), 2);
197 break;
198 default:
199 usbd_ctrl_unsupport(udev);
200 break;
201 }
202 return ret;
203}
204
210static usb_sts_type usbd_clear_feature(usbd_core_type *udev)
211{
212 usb_sts_type ret = USB_OK;
213 usb_setup_type *setup = &udev->setup;
214 switch(udev->conn_state)
215 {
216 case USB_CONN_STATE_ADDRESSED:
217 case USB_CONN_STATE_CONFIGURED:
218 if(setup->wValue == USB_FEATURE_REMOTE_WAKEUP)
219 {
220 udev->remote_wakup = 0;
221 udev->config_status &= ~USB_CONF_REMOTE_WAKEUP;
222 udev->class_handler->setup_handler(udev, &udev->setup);
223 usbd_ctrl_send_status(udev);
224 }
225 break;
226 default:
227 usbd_ctrl_unsupport(udev);
228 break;
229 }
230 return ret;
231}
232
238static usb_sts_type usbd_set_feature(usbd_core_type *udev)
239{
240 usb_sts_type ret = USB_OK;
241 usb_setup_type *setup = &udev->setup;
242 if(setup->wValue == USB_FEATURE_REMOTE_WAKEUP)
243 {
244 udev->remote_wakup = 1;
245 udev->class_handler->setup_handler(udev, &udev->setup);
246 usbd_ctrl_send_status(udev);
247 }
248 return ret;
249}
250
256static usb_sts_type usbd_get_configuration(usbd_core_type *udev)
257{
258 usb_sts_type ret = USB_OK;
259 usb_setup_type *setup = &udev->setup;
260 if(setup->wLength != 1)
261 {
262 usbd_ctrl_unsupport(udev);
263 }
264 else
265 {
266 switch(udev->conn_state)
267 {
268 case USB_CONN_STATE_ADDRESSED:
269 udev->default_config = 0;
270 usbd_ctrl_send(udev, (uint8_t *)(&udev->default_config), 1);
271 break;
272 case USB_CONN_STATE_CONFIGURED:
273 usbd_ctrl_send(udev, (uint8_t *)(&udev->dev_config), 1);
274 break;
275 default:
276 usbd_ctrl_unsupport(udev);
277 break;
278 }
279 }
280 return ret;
281}
282
288static usb_sts_type usbd_set_configuration(usbd_core_type *udev)
289{
290 usb_sts_type ret = USB_OK;
291 static uint8_t config_value;
292 usb_setup_type *setup = &udev->setup;
293 config_value = (uint8_t)setup->wValue;
294
295 if(setup->wIndex == 0 && setup->wLength == 0)
296 {
297 switch(udev->conn_state)
298 {
299 case USB_CONN_STATE_ADDRESSED:
300 if(config_value)
301 {
302 udev->dev_config = config_value;
303 udev->conn_state = USB_CONN_STATE_CONFIGURED;
304 udev->class_handler->init_handler(udev);
305 usbd_ctrl_send_status(udev);
306 }
307 else
308 {
309 usbd_ctrl_send_status(udev);
310 }
311
312 break;
313 case USB_CONN_STATE_CONFIGURED:
314 if(config_value == 0)
315 {
316 udev->conn_state = USB_CONN_STATE_ADDRESSED;
317 udev->dev_config = config_value;
318 udev->class_handler->clear_handler(udev);
319 usbd_ctrl_send_status(udev);
320 }
321 else if(config_value == udev->dev_config)
322 {
323 udev->class_handler->clear_handler(udev);
324 udev->dev_config = config_value;
325 udev->class_handler->init_handler(udev);
326 usbd_ctrl_send_status(udev);
327 }
328 else
329 {
330 usbd_ctrl_send_status(udev);
331 }
332 break;
333 default:
334 usbd_ctrl_unsupport(udev);
335 break;
336 }
337 }
338 else
339 {
340 usbd_ctrl_unsupport(udev);
341 }
342 return ret;
343}
344
350 usb_sts_type usbd_device_request(usbd_core_type *udev)
351{
352 usb_sts_type ret = USB_OK;
353 usb_setup_type *setup = &udev->setup;
354 if((setup->bmRequestType & USB_REQ_TYPE_RESERVED) != USB_REQ_TYPE_STANDARD)
355 {
356 udev->class_handler->setup_handler(udev, &udev->setup);
357 return ret;
358 }
359 switch(udev->setup.bRequest)
360 {
361 case USB_STD_REQ_GET_STATUS:
362 usbd_get_status(udev);
363 break;
364 case USB_STD_REQ_CLEAR_FEATURE:
365 usbd_clear_feature(udev);
366 break;
367 case USB_STD_REQ_SET_FEATURE:
368 usbd_set_feature(udev);
369 break;
370 case USB_STD_REQ_SET_ADDRESS:
371 usbd_set_address(udev);
372 break;
373 case USB_STD_REQ_GET_DESCRIPTOR:
374 usbd_get_descriptor(udev);
375 break;
376 case USB_STD_REQ_GET_CONFIGURATION:
377 usbd_get_configuration(udev);
378 break;
379 case USB_STD_REQ_SET_CONFIGURATION:
380 usbd_set_configuration(udev);
381 break;
382 default:
383 usbd_ctrl_unsupport(udev);
384 break;
385 }
386 return ret;
387}
388
394 usb_sts_type usbd_interface_request(usbd_core_type *udev)
395{
396 usb_sts_type ret = USB_OK;
397 usb_setup_type *setup = &udev->setup;
398 switch(udev->conn_state)
399 {
400 case USB_CONN_STATE_CONFIGURED:
401 udev->class_handler->setup_handler(udev, &udev->setup);
402 if(setup->wLength == 0)
403 {
404 usbd_ctrl_send_status(udev);
405 }
406 break;
407 default:
408 usbd_ctrl_unsupport(udev);
409 break;
410 }
411 return ret;
412}
413
419 usb_sts_type usbd_endpoint_request(usbd_core_type *udev)
420{
421 usb_sts_type ret = USB_OK;
422 usb_setup_type *setup = &udev->setup;
423 uint8_t ept_addr = LBYTE(setup->wIndex);
424 usb_ept_info *ept_info;
425
426 if((setup->bmRequestType & USB_REQ_TYPE_RESERVED) == USB_REQ_TYPE_CLASS)
427 {
428 udev->class_handler->setup_handler(udev, &udev->setup);
429 }
430 switch(setup->bRequest)
431 {
432 case USB_STD_REQ_GET_STATUS:
433 switch(udev->conn_state)
434 {
435 case USB_CONN_STATE_ADDRESSED:
436 if((ept_addr & 0x7F) != 0)
437 {
438 usbd_set_stall(udev, ept_addr);
439 }
440 break;
441 case USB_CONN_STATE_CONFIGURED:
442 {
443 if((ept_addr & 0x80) != 0)
444 {
445 ept_info = &udev->ept_in[ept_addr & 0x7F];
446 }
447 else
448 {
449 ept_info = &udev->ept_out[ept_addr & 0x7F];
450 }
451 if(ept_info->stall == 1)
452 {
453 ept_info->status = 0x0001;
454 }
455 else
456 {
457 ept_info->status = 0x0000;
458 }
459 usbd_ctrl_send(udev, (uint8_t *)(&ept_info->status), 2);
460 }
461 break;
462 default:
463 usbd_ctrl_unsupport(udev);
464 break;
465 }
466 break;
467 case USB_STD_REQ_CLEAR_FEATURE:
468 switch(udev->conn_state)
469 {
470 case USB_CONN_STATE_ADDRESSED:
471 if((ept_addr != 0x00) && (ept_addr != 0x80))
472 {
473 usbd_set_stall(udev, ept_addr);
474 }
475 break;
476 case USB_CONN_STATE_CONFIGURED:
477 if(setup->wValue == USB_FEATURE_EPT_HALT)
478 {
479 if((ept_addr & 0x7F) != 0x00 )
480 {
481 usbd_clear_stall(udev, ept_addr);
482 udev->class_handler->setup_handler(udev, &udev->setup);
483 }
484 usbd_ctrl_send_status(udev);
485 }
486 break;
487 default:
488 usbd_ctrl_unsupport(udev);
489 break;
490 }
491 break;
492 case USB_STD_REQ_SET_FEATURE:
493 switch(udev->conn_state)
494 {
495 case USB_CONN_STATE_ADDRESSED:
496 if((ept_addr != 0x00) && (ept_addr != 0x80))
497 {
498 usbd_set_stall(udev, ept_addr);
499 }
500 break;
501 case USB_CONN_STATE_CONFIGURED:
502 if(setup->wValue == USB_FEATURE_EPT_HALT)
503 {
504 if((ept_addr != 0x00) && (ept_addr != 0x80))
505 {
506 usbd_set_stall(udev, ept_addr);
507 }
508 }
509 udev->class_handler->setup_handler(udev, &udev->setup);
510 usbd_ctrl_send_status(udev);
511 break;
512 default:
513 usbd_ctrl_unsupport(udev);
514 break;
515 }
516 break;
517 default:
518 usbd_ctrl_unsupport(udev);
519 break;
520 }
521 return ret;
522}
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
USB_STD_REQ_CLEAR_FEATURE
#define USB_STD_REQ_CLEAR_FEATURE
Definition: usb_std.h:78
USB_DESCIPTOR_TYPE_OTHER_SPEED
#define USB_DESCIPTOR_TYPE_OTHER_SPEED
Definition: usb_std.h:98
USB_INTERFACE_STRING
#define USB_INTERFACE_STRING
Definition: usb_std.h:109
USB_STD_REQ_SET_CONFIGURATION
#define USB_STD_REQ_SET_CONFIGURATION
Definition: usb_std.h:84
USB_FEATURE_REMOTE_WAKEUP
#define USB_FEATURE_REMOTE_WAKEUP
Definition: usb_std.h:121
USB_PRODUCT_STRING
#define USB_PRODUCT_STRING
Definition: usb_std.h:106
MIN
#define MIN(a, b)
min and max define
Definition: usb_std.h:254
USB_REQ_TYPE_STANDARD
#define USB_REQ_TYPE_STANDARD
usb request type
Definition: usb_std.h:63
USB_DESCIPTOR_TYPE_CONFIGURATION
#define USB_DESCIPTOR_TYPE_CONFIGURATION
Definition: usb_std.h:93
USB_STD_REQ_GET_DESCRIPTOR
#define USB_STD_REQ_GET_DESCRIPTOR
Definition: usb_std.h:81
USB_STD_REQ_SET_ADDRESS
#define USB_STD_REQ_SET_ADDRESS
Definition: usb_std.h:80
LBYTE
#define LBYTE(x)
low byte and high byte define
Definition: usb_std.h:260
USB_STD_REQ_SET_FEATURE
#define USB_STD_REQ_SET_FEATURE
Definition: usb_std.h:79
USB_CONF_REMOTE_WAKEUP
#define USB_CONF_REMOTE_WAKEUP
usb configuration attributes
Definition: usb_std.h:114
SWAPBYTE
#define SWAPBYTE(addr)
usb swap address
Definition: usb_std.h:247
USB_MFC_STRING
#define USB_MFC_STRING
Definition: usb_std.h:105
USB_STD_REQ_GET_STATUS
#define USB_STD_REQ_GET_STATUS
usb standard device requests codes
Definition: usb_std.h:77
USB_SERIAL_STRING
#define USB_SERIAL_STRING
Definition: usb_std.h:107
USB_DESCIPTOR_TYPE_DEVICE
#define USB_DESCIPTOR_TYPE_DEVICE
usb standard device type
Definition: usb_std.h:92
USB_FEATURE_EPT_HALT
#define USB_FEATURE_EPT_HALT
usb standard feature selectors
Definition: usb_std.h:120
USB_STD_REQ_GET_CONFIGURATION
#define USB_STD_REQ_GET_CONFIGURATION
Definition: usb_std.h:83
USB_DESCIPTOR_TYPE_STRING
#define USB_DESCIPTOR_TYPE_STRING
Definition: usb_std.h:94
USB_REQ_TYPE_RESERVED
#define USB_REQ_TYPE_RESERVED
Definition: usb_std.h:66
USB_LANGID_STRING
#define USB_LANGID_STRING
usb standard string type
Definition: usb_std.h:104
USB_DESCIPTOR_TYPE_DEVICE_QUALIFIER
#define USB_DESCIPTOR_TYPE_DEVICE_QUALIFIER
Definition: usb_std.h:97
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
USB_CONFIG_STRING
#define USB_CONFIG_STRING
Definition: usb_std.h:108
USB_REQ_TYPE_CLASS
#define USB_REQ_TYPE_CLASS
Definition: usb_std.h:64
USB_CONN_STATE_DEFAULT
@ USB_CONN_STATE_DEFAULT
Definition: usb_std.h:129
USB_CONN_STATE_CONFIGURED
@ USB_CONN_STATE_CONFIGURED
Definition: usb_std.h:131
USB_CONN_STATE_ADDRESSED
@ USB_CONN_STATE_ADDRESSED
Definition: usb_std.h:130
USB_OK
@ USB_OK
Definition: usb_std.h:268
usbd_set_stall
void usbd_set_stall(usbd_core_type *udev, uint8_t ept_addr)
usb set endpoint to stall status
Definition: usbd_core.c:262
usbd_ctrl_send_status
void usbd_ctrl_send_status(usbd_core_type *udev)
usb control endpoint send in status
Definition: usbd_core.c:212
usbd_ctrl_send
void usbd_ctrl_send(usbd_core_type *udev, uint8_t *buffer, uint16_t len)
usb control endpoint send data
Definition: usbd_core.c:177
usbd_clear_stall
void usbd_clear_stall(usbd_core_type *udev, uint8_t ept_addr)
clear endpoint stall
Definition: usbd_core.c:237
usbd_ctrl_unsupport
void usbd_ctrl_unsupport(usbd_core_type *udev)
un-support device request
Definition: usbd_core.c:287
usbd_set_feature
static usb_sts_type usbd_set_feature(usbd_core_type *udev)
set usb feature request
Definition: usbd_sdr.c:238
usbd_endpoint_request
usb_sts_type usbd_endpoint_request(usbd_core_type *udev)
standard usb endpoint requests
Definition: usbd_sdr.c:419
usbd_get_status
static usb_sts_type usbd_get_status(usbd_core_type *udev)
get usb status request
Definition: usbd_sdr.c:185
usbd_get_configuration
static usb_sts_type usbd_get_configuration(usbd_core_type *udev)
get usb configuration request
Definition: usbd_sdr.c:256
usbd_get_descriptor
static usb_sts_type usbd_get_descriptor(usbd_core_type *udev)
get usb standard device description request
Definition: usbd_sdr.c:69
usbd_setup_request_parse
void usbd_setup_request_parse(usb_setup_type *setup, uint8_t *buf)
usb parse standard setup request
Definition: usbd_sdr.c:55
usbd_device_request
usb_sts_type usbd_device_request(usbd_core_type *udev)
standard usb device requests
Definition: usbd_sdr.c:350
usbd_set_address
static usb_sts_type usbd_set_address(usbd_core_type *udev)
this request sets the device address
Definition: usbd_sdr.c:139
usbd_interface_request
usb_sts_type usbd_interface_request(usbd_core_type *udev)
standard usb interface requests
Definition: usbd_sdr.c:394
usbd_set_configuration
static usb_sts_type usbd_set_configuration(usbd_core_type *udev)
sets the usb device configuration request
Definition: usbd_sdr.c:288
usbd_clear_feature
static usb_sts_type usbd_clear_feature(usbd_core_type *udev)
clear usb feature request
Definition: usbd_sdr.c:210
usb_ept_info
usb endpoint infomation structure definition
Definition: at32f435_437_usb.h:421
usb_ept_info::stall
uint8_t stall
Definition: at32f435_437_usb.h:431
usb_ept_info::status
uint32_t status
Definition: at32f435_437_usb.h:432
usb_setup_type
format of usb setup data
Definition: usb_std.h:280
usb_setup_type::wValue
uint16_t wValue
Definition: usb_std.h:283
usb_setup_type::wLength
uint16_t wLength
Definition: usb_std.h:286
usb_setup_type::bmRequestType
uint8_t bmRequestType
Definition: usb_std.h:281
usb_setup_type::wIndex
uint16_t wIndex
Definition: usb_std.h:284
usb_setup_type::bRequest
uint8_t bRequest
Definition: usb_std.h:282
usbd_sdr.h


AT32F435/437 Firmwary Library: usbd_sdr.h Source File

  • middlewares
  • usb_drivers
  • inc
usbd_sdr.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_SDR_H
29#define __USB_SDR_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
36/* includes ------------------------------------------------------------------*/
37#include "usb_conf.h"
38#include "usb_core.h"
52void usbd_setup_request_parse(usb_setup_type *setup, uint8_t *buf);
53 usb_sts_type usbd_device_request(usbd_core_type *udev);
54 usb_sts_type usbd_interface_request(usbd_core_type *udev);
55 usb_sts_type usbd_endpoint_request(usbd_core_type *udev);
56
57
69#ifdef __cplusplus
70}
71#endif
72
73#endif
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
usbd_endpoint_request
usb_sts_type usbd_endpoint_request(usbd_core_type *udev)
standard usb endpoint requests
Definition: usbd_sdr.c:419
usbd_setup_request_parse
void usbd_setup_request_parse(usb_setup_type *setup, uint8_t *buf)
usb parse standard setup request
Definition: usbd_sdr.c:55
usbd_device_request
usb_sts_type usbd_device_request(usbd_core_type *udev)
standard usb device requests
Definition: usbd_sdr.c:350
usbd_interface_request
usb_sts_type usbd_interface_request(usbd_core_type *udev)
standard usb interface requests
Definition: usbd_sdr.c:394
usb_setup_type
format of usb setup data
Definition: usb_std.h:280
usb_core.h
usb core header file


AT32F435/437 Firmwary Library: usbh_core.c Source File

  • middlewares
  • usb_drivers
  • src
usbh_core.c
Go to the documentation of this file.
1
26#include "usbh_core.h"
27#include "usb_core.h"
28#include "usbh_ctrl.h"
29#include "usb_conf.h"
30
44static void usbh_attached(usbh_core_type *uhost);
45static void usbh_enumeration(usbh_core_type *uhost);
46static void usbh_class_request(usbh_core_type *uhost);
47static void usbh_class(usbh_core_type *uhost);
48static void usbh_suspend(usbh_core_type *uhost);
49static void usbh_wakeup(usbh_core_type *uhost);
50static void usbh_disconnect(usbh_core_type *uhost);
57void usbh_free_channel(usbh_core_type *uhost, uint8_t index)
58{
59 if(index < USB_HOST_CHANNEL_NUM)
60 {
61 /* free host channel */
62 uhost->channel[index] = 0x0;
63 }
64}
65
71uint16_t usbh_get_free_channel(usbh_core_type *uhost)
72{
73 uint16_t i_index = 0;
74 for(i_index = 0; i_index < USB_HOST_CHANNEL_NUM; i_index ++)
75 {
76 /* find unuse channel */
77 if((uhost->channel[i_index] & HCH_USED) == 0)
78 {
79 /* return channel index */
80 return i_index;
81 }
82 }
83 return HCH_ERROR;
84}
85
86
94 usb_sts_type usbh_set_toggle(usbh_core_type *uhost, uint8_t hc_num, uint8_t toggle)
95{
96 if(uhost->hch[hc_num].dir)
97 {
98 /* direction in */
99 uhost->hch[hc_num].toggle_in = toggle;
100 }
101 else
102 {
103 /* direction out */
104 uhost->hch[hc_num].toggle_out = toggle;
105 }
106 return USB_OK;
107}
108
115 usb_sts_type usbh_in_out_request(usbh_core_type *uhost, uint8_t hc_num)
116{
117 usb_sts_type status = USB_OK;
118 uint32_t n_packet = 0;
119 uint32_t num_words = 0;
120 uint32_t tmp;
121 otg_global_type *usbx = uhost->usb_reg;
122 otg_hchannel_type *ch = USB_CHL(uhost->usb_reg, hc_num);
123
124 /* set usb request block to idle */
125 uhost->urb_state[hc_num] = URB_IDLE;
126 uhost->hch[hc_num].state = HCH_IDLE;
127
128 /* set usb channel transmit count to zero */
129 uhost->hch[hc_num].trans_count = 0;
130
131 /* check transmit data len */
132 if(uhost->hch[hc_num].trans_len > 0)
133 {
134 /* count how many packet need to send */
135 n_packet = (uhost->hch[hc_num].trans_len + \
136 uhost->hch[hc_num].maxpacket - 1) / \
137 uhost->hch[hc_num].maxpacket;
138
139 /* packet count max 256 */
140 if(n_packet > 256)
141 {
142 n_packet = 256;
143 uhost->hch[hc_num].trans_len = n_packet * uhost->hch[hc_num].maxpacket;
144 }
145 }
146 else
147 {
148 /* zero data len */
149 n_packet = 1;
150 }
151
152 /* direction is in */
153 if(uhost->hch[hc_num].dir)
154 {
155 uhost->hch[hc_num].trans_len = n_packet * uhost->hch[hc_num].maxpacket;
156 }
157
158 /* set transfer information to channel register */
159 ch->hctsiz = (uhost->hch[hc_num].trans_len & USB_OTG_HCTSIZ_XFERSIZE) |
160 ((n_packet << 19) & USB_OTG_HCTSIZ_PKTCNT) |
161 ((uhost->hch[hc_num].data_pid << 29) & USB_OTG_HCTSIZ_PID);
162
163 /* set odd frame */
164 ch->hcchar_bit.oddfrm = !(OTG_HOST(uhost->usb_reg)->hfnum & 0x1);
165
166 /* clear channel disable bit and enable channel */
167 tmp = ch->hcchar;
168 tmp &= ~(USB_OTG_HCCHAR_CHDIS);
169 tmp |= USB_OTG_HCCHAR_CHENA;
170 ch->hcchar = tmp;
171
172 /* channel direction is out and transfer len > 0 */
173 if((uhost->hch[hc_num].dir == 0) &&
174 (uhost->hch[hc_num].trans_len > 0 ))
175 {
176 switch(uhost->hch[hc_num].ept_type)
177 {
178 case EPT_CONTROL_TYPE:
179 case EPT_BULK_TYPE:
180 num_words = (uhost->hch[hc_num].trans_len + 3) / 4;
181
182 /* non-periodic transfer */
183 if(num_words > usbx->gnptxsts_bit.nptxfspcavail)
184 {
185 usbx->gintmsk_bit.nptxfempmsk = 1;
186 }
187 break;
188 case EPT_ISO_TYPE:
189 case EPT_INT_TYPE:
190 num_words = (uhost->hch[hc_num].trans_len + 3) / 4;
191
192 /* periodic transfer */
193 if(num_words > OTG_HOST(usbx)->hptxsts_bit.ptxfspcavil)
194 {
195 usbx->gintmsk_bit.ptxfempmsk = 1;
196 }
197 break;
198 default:
199 break;
200 }
201 /* write data to fifo */
202 usb_write_packet(usbx, uhost->hch[hc_num].trans_buf,
203 hc_num, uhost->hch[hc_num].trans_len);
204 }
205
206 return status;
207}
208
217 usb_sts_type usbh_interrupt_recv(usbh_core_type *uhost, uint8_t hc_num,
218 uint8_t *buffer, uint16_t length)
219{
220 /* set direction is in */
221 uhost->hch[hc_num].dir = 1;
222
223 /* set transfer buffer */
224 uhost->hch[hc_num].trans_buf = buffer;
225
226 /* set transfer len*/
227 uhost->hch[hc_num].trans_len = length;
228
229 if(uhost->hch[hc_num].toggle_in == 0)
230 {
231 /* pid: data0 */
232 uhost->hch[hc_num].data_pid = HCH_PID_DATA0;
233 }
234 else
235 {
236 /* pid: data1 */
237 uhost->hch[hc_num].data_pid = HCH_PID_DATA1;
238 }
239
240 return usbh_in_out_request(uhost, hc_num);
241}
242
251 usb_sts_type usbh_interrupt_send(usbh_core_type *uhost, uint8_t hc_num,
252 uint8_t *buffer, uint16_t length)
253{
254 /* set direction is out */
255 uhost->hch[hc_num].dir = 0;
256
257 /* set transfer buffer */
258 uhost->hch[hc_num].trans_buf = buffer;
259
260 /* set transfer len*/
261 uhost->hch[hc_num].trans_len = length;
262
263 if(uhost->hch[hc_num].toggle_out == 0)
264 {
265 /* pid: data0 */
266 uhost->hch[hc_num].data_pid = HCH_PID_DATA0;
267 }
268 else
269 {
270 /* pid: data1 */
271 uhost->hch[hc_num].data_pid = HCH_PID_DATA1;
272 }
273
274 return usbh_in_out_request(uhost, hc_num);
275}
276
277
286 usb_sts_type usbh_bulk_recv(usbh_core_type *uhost, uint8_t hc_num,
287 uint8_t *buffer, uint16_t length)
288{
289 /* set direction is in */
290 uhost->hch[hc_num].dir = 1;
291
292 /* set transfer buffer */
293 uhost->hch[hc_num].trans_buf = buffer;
294
295 /* set transfer len*/
296 uhost->hch[hc_num].trans_len = length;
297
298 if(uhost->hch[hc_num].toggle_in == 0)
299 {
300 /* pid: data0 */
301 uhost->hch[hc_num].data_pid = HCH_PID_DATA0;
302 }
303 else
304 {
305 /* pid: data1 */
306 uhost->hch[hc_num].data_pid = HCH_PID_DATA1;
307 }
308
309 return usbh_in_out_request(uhost, hc_num);
310}
311
312
321 usb_sts_type usbh_bulk_send(usbh_core_type *uhost, uint8_t hc_num,
322 uint8_t *buffer, uint16_t length)
323{
324 /* set direction is out */
325 uhost->hch[hc_num].dir = 0;
326
327 /* set transfer buffer */
328 uhost->hch[hc_num].trans_buf = buffer;
329
330 /* set transfer len*/
331 uhost->hch[hc_num].trans_len = length;
332
333 if(uhost->hch[hc_num].toggle_out == 0)
334 {
335 /* pid: data0 */
336 uhost->hch[hc_num].data_pid = HCH_PID_DATA0;
337 }
338 else
339 {
340 /* pid: data1 */
341 uhost->hch[hc_num].data_pid = HCH_PID_DATA1;
342 }
343
344 return usbh_in_out_request(uhost, hc_num);
345}
346
347
356 usb_sts_type usbh_isoc_send(usbh_core_type *uhost, uint8_t hc_num,
357 uint8_t *buffer, uint16_t length)
358{
359 /* set direction is out */
360 uhost->hch[hc_num].dir = 0;
361
362 /* set transfer buffer */
363 uhost->hch[hc_num].trans_buf = buffer;
364
365 /* set transfer len*/
366 uhost->hch[hc_num].trans_len = length;
367
368 /* pid: data0 */
369 uhost->hch[hc_num].data_pid = HCH_PID_DATA0;
370
371 return usbh_in_out_request(uhost, hc_num);
372}
373
382 usb_sts_type usbh_isoc_recv(usbh_core_type *uhost, uint8_t hc_num,
383 uint8_t *buffer, uint16_t length)
384{
385 /* set direction is in */
386 uhost->hch[hc_num].dir = 1;
387
388 /* set transfer buffer */
389 uhost->hch[hc_num].trans_buf = buffer;
390
391 /* set transfer len*/
392 uhost->hch[hc_num].trans_len = length;
393
394 /* pid: data0 */
395 uhost->hch[hc_num].data_pid = HCH_PID_DATA0;
396
397 return usbh_in_out_request(uhost, hc_num);
398}
399
405 usb_sts_type usbh_cfg_default_init(usbh_core_type *uhost)
406{
407 /* set global state to idle */
408 uhost->global_state = USBH_IDLE;
409
410 /* enumeration state to get description */
411 uhost->enum_state = ENUM_GET_MIN_DESC;
412
413 /* request state send */
414 uhost->req_state = CMD_SEND;
415
416 /* control transfer state is idle*/
417 uhost->ctrl.state = CONTROL_IDLE;
418
419 /* defaut endpoint 0 max size is 8byte */
420 uhost->ctrl.ept0_size = 8;
421
422 /* default device address is 0 */
423 uhost->dev.address = 0;
424
425 /* default speed is full speed */
426 uhost->dev.speed = USB_FULL_SPEED_CORE_ID;
427
428 uhost->timer = 0;
429
430 uhost->ctrl.err_cnt = 0;
431
432 /* free all channel */
433 usbh_free_channel(uhost, uhost->ctrl.hch_in);
434 usbh_free_channel(uhost, uhost->ctrl.hch_out);
435 return USB_OK;
436}
437
443void usbh_enter_suspend(usbh_core_type *uhost)
444{
445 otg_host_type *host = OTG_HOST(uhost->usb_reg);
446 uint32_t hprt_val = host->hprt;
447
448 hprt_val &= ~(USB_OTG_HPRT_PRTENA | USB_OTG_HPRT_PRTENCHNG |
449 USB_OTG_HPRT_PRTOVRCACT | USB_OTG_HPRT_PRTCONDET);
450
451 /* set port suspend */
452 host->hprt = hprt_val | USB_OTG_HPRT_PRTSUSP;
453
454 /* stop phy clock */
455 usb_stop_phy_clk(uhost->usb_reg);
456
457}
458
464void usbh_resume(usbh_core_type *uhost)
465{
466 otg_host_type *host = OTG_HOST(uhost->usb_reg);
467 uint32_t temp = host->hprt;
468
469 /* open phy clock */
470 usb_open_phy_clk(uhost->usb_reg);
471
472 /* clear port suspend and set port resume*/
473 temp &= ~(USB_OTG_HPRT_PRTENA | USB_OTG_HPRT_PRTENCHNG |
474 USB_OTG_HPRT_PRTOVRCACT | USB_OTG_HPRT_PRTCONDET
475 | USB_OTG_HPRT_PRTSUSP);
476 host->hprt = temp | USB_OTG_HPRT_PRTRES;
477
478 /* delay 20 ms */
479 usb_delay_ms(20);
480
481 /*clear port resume */
482 temp = host->hprt;
483 temp &= ~(USB_OTG_HPRT_PRTENA | USB_OTG_HPRT_PRTENCHNG |
484 USB_OTG_HPRT_PRTOVRCACT | USB_OTG_HPRT_PRTCONDET
485 | USB_OTG_HPRT_PRTRES);
486 host->hprt = temp;
487 usb_delay_ms(5);
488}
489
501 usb_sts_type usbh_core_init(usbh_core_type *uhost,
502 usb_reg_type *usb_reg,
503 usbh_class_handler_type *class_handler,
504 usbh_user_handler_type *user_handler,
505 uint8_t core_id)
506{
507 usb_sts_type status = USB_OK;
508 uint32_t i_index;
509 otg_global_type *usbx = usb_reg;
510 otg_host_type *host = OTG_HOST(usbx);
511 uhost->usb_reg = usb_reg;
512
513 /* host class handler */
514 uhost->class_handler = class_handler;
515 uhost->user_handler = user_handler;
516
517 /* host user handler */
518 uhost->user_handler->user_init();
519
520 uhost->timer = 0;
521
522 /* usb host cfg default init */
523 usbh_cfg_default_init(uhost);
524
525 /* clear host config to default value */
526 for(i_index = 0; i_index < USB_HOST_CHANNEL_NUM; i_index ++)
527 {
528 uhost->err_cnt[i_index] = 0;
529 uhost->xfer_cnt[i_index] = 0;
530 uhost->hch_state[i_index] = HCH_IDLE;
531 uhost->hch[0].maxpacket = 8;
532 }
533
534 /* no device connect */
535 uhost->conn_sts = 0;
536
537 /* disable usb interrupt */
538 usb_interrupt_disable(usbx);
539
540 /* usb global init */
541 usb_global_init(usbx);
542
543 /* set usb host mode */
544 usb_global_set_mode(usbx, OTG_HOST_MODE);
545
546 /* open usb phy clock*/
547 usb_open_phy_clk(usbx);
548
549 /* clock select */
550 usbh_fsls_clksel(usbx, USB_HCFG_CLK_48M);
551
552 /* set support ls and fs device */
553 host->hcfg_bit.fslssupp = 0;
554
555 if(usbx == OTG1_GLOBAL)
556 {
557 /* set receive fifo size */
558 usbx->grxfsiz = USBH_RX_FIFO_SIZE;
559
560 /* set non-periodic transmit fifo start address and depth */
561 usbx->gnptxfsiz_ept0tx_bit.nptxfstaddr = USBH_RX_FIFO_SIZE;
562 usbx->gnptxfsiz_ept0tx_bit.nptxfdep = USBH_NP_TX_FIFO_SIZE;
563
564 /* set periodic transmit fifo start address and depth */
565 usbx->hptxfsiz_bit.ptxfstaddr = USBH_RX_FIFO_SIZE + USBH_NP_TX_FIFO_SIZE;
566 usbx->hptxfsiz_bit.ptxfsize = USBH_P_TX_FIFO_SIZE;
567 }
568#ifdef OTG2_GLOBAL
569 if(usbx == OTG2_GLOBAL)
570 {
571 /* set receive fifo size */
572 usbx->grxfsiz = USBH2_RX_FIFO_SIZE;
573
574 /* set non-periodic transmit fifo start address and depth */
575 usbx->gnptxfsiz_ept0tx_bit.nptxfstaddr = USBH2_RX_FIFO_SIZE;
576 usbx->gnptxfsiz_ept0tx_bit.nptxfdep = USBH2_NP_TX_FIFO_SIZE;
577
578 /* set periodic transmit fifo start address and depth */
579 usbx->hptxfsiz_bit.ptxfstaddr = USBH2_RX_FIFO_SIZE + USBH2_NP_TX_FIFO_SIZE;
580 usbx->hptxfsiz_bit.ptxfsize = USBH2_P_TX_FIFO_SIZE;
581 }
582#endif
583 /* flush tx fifo */
584 usb_flush_tx_fifo(usbx, 16);
585
586 /* flush rx fifo */
587 usb_flush_rx_fifo(usbx);
588
589 /* clear host channel interrut mask and status */
590 for(i_index = 0; i_index < USB_HOST_CHANNEL_NUM; i_index ++)
591 {
592 USB_CHL(usbx, i_index)->hcintmsk = 0;
593 USB_CHL(usbx, i_index)->hcint = 0xFFFFFFFF;
594 }
595
596 /* power on to this port */
597 usb_port_power_on(usbx, TRUE);
598
599 /* clear global interrupt mask and status */
600 usbx->gintmsk = 0;
601 usbx->gintsts = 0xBFFFFFFF;
602
603 /* set global interrut mask */
604 usbx->gintmsk = USB_OTG_SOF_INT | USB_OTG_RXFLVL_INT |
605 USB_OTG_USBSUSP_INT | USB_OTG_PRT_INT |
606 USB_OTG_HCH_INT | USB_OTG_INCOMISOIN_INT |
607 USB_OTG_INCOMPIP_INCOMPISOOUT_INT | USB_OTG_WKUP_INT |
608 USB_OTG_DISCON_INT;
609
610 /* enable usb global interrupt */
611 usb_interrupt_enable(usbx);
612
613 /* active vbus */
614 usbh_active_vbus(uhost, TRUE);
615 return status;
616}
617
638void usbh_hc_open(usbh_core_type *uhost,
639 uint8_t chn,
640 uint8_t ept_num,
641 uint8_t dev_address,
642 uint8_t type,
643 uint16_t maxpacket,
644 uint8_t speed)
645{
646 /* device address */
647 uhost->hch[chn].address = dev_address;
648
649 /* device speed */
650 uhost->hch[chn].speed = speed;
651
652 /* endpoint transfer type */
653 uhost->hch[chn].ept_type = type;
654
655 /* endpoint support maxpacket */
656 uhost->hch[chn].maxpacket = maxpacket;
657
658 /* endpoint direction in or out */
659 uhost->hch[chn].dir = (ept_num & 0x80)?1:0;;
660
661 /* host channel number */
662 uhost->hch[chn].ch_num = chn;
663
664 /* device endpoint number */
665 uhost->hch[chn].ept_num = ept_num;
666
667 /* enable channel */
668 usb_hc_enable(uhost->usb_reg, chn,
669 ept_num, dev_address,
670 type, maxpacket, speed
671 );
672}
673
683void usbh_ch_disable(usbh_core_type *uhost, uint8_t chn)
684{
685 usb_hch_halt(uhost->usb_reg, chn);
686}
687
694uint16_t usbh_alloc_channel(usbh_core_type *uhost, uint8_t ept_addr)
695{
696 /* get one free channel */
697 uint16_t ch_num = usbh_get_free_channel(uhost);
698
699 if(ch_num == HCH_ERROR)
700 return USB_FAIL;
701
702 /* set channel to used */
703 uhost->channel[ch_num] = HCH_USED | ept_addr;
704 return ch_num;
705}
706
713urb_sts_type usbh_get_urb_status(usbh_core_type *uhost, uint8_t ch_num)
714{
715 return uhost->urb_state[ch_num];
716}
724 usb_sts_type usbh_ctrl_result_check(usbh_core_type *uhost, ctrl_ept0_sts_type next_ctrl_state, uint8_t next_enum_state)
725{
726 usb_sts_type status;
727
728 /* control transfer loop */
729 status = usbh_ctrl_transfer_loop(uhost);
730
731 if(status == USB_OK)
732 {
733 uhost->ctrl.state = next_ctrl_state;
734 uhost->enum_state = next_enum_state;
735 uhost->req_state = CMD_SEND;
736 }
737 else if(status == USB_ERROR)
738 {
739 uhost->ctrl.state = CONTROL_IDLE;
740 uhost->req_state = CMD_SEND;
741 }
742 else if(status == USB_NOT_SUPPORT)
743 {
744 uhost->ctrl.state = next_ctrl_state;
745 uhost->enum_state = next_enum_state;
746 uhost->req_state = CMD_SEND;
747 }
748 return status;
749}
750
756uint8_t usbh_alloc_address(void)
757{
758 static uint8_t address = 1;
759 if(address == 20)
760 address = 1;
761 return address ++;
762}
763
764
770 usb_sts_type usbh_enum_handler(usbh_core_type *uhost)
771{
772 usb_sts_type status = USB_WAIT;
773 switch(uhost->enum_state)
774 {
775 case ENUM_IDLE:
776 break;
777 case ENUM_GET_MIN_DESC:
778 /* get description */
779 if(uhost->ctrl.state == CONTROL_IDLE)
780 {
781 usbh_get_device_descriptor(uhost, 8);
782 }
783 if(usbh_ctrl_result_check(uhost, CONTROL_IDLE, ENUM_GET_FULL_DESC) == USB_OK)
784 {
785 usbh_parse_dev_desc(uhost, uhost->rx_buffer, 8);
786
787 /* set new control endpoint maxpacket size */
788 uhost->ctrl.ept0_size = (uhost->dev).dev_desc.bMaxPacketSize0;
789
790 /* enable channel */
791 usbh_hc_open(uhost, uhost->ctrl.hch_in,0x80,
792 uhost->dev.address, EPT_CONTROL_TYPE,
793 uhost->ctrl.ept0_size,
794 uhost->dev.speed);
795
796 /* enable channel */
797 usbh_hc_open(uhost, uhost->ctrl.hch_out,0x00,
798 uhost->dev.address, EPT_CONTROL_TYPE,
799 uhost->ctrl.ept0_size,
800 uhost->dev.speed);
801 }
802 break;
803
804 case ENUM_GET_FULL_DESC:
805 /* get description */
806 if(uhost->ctrl.state == CONTROL_IDLE)
807 {
808 usbh_get_device_descriptor(uhost, 18);
809 }
810 if(usbh_ctrl_result_check(uhost, CONTROL_IDLE, ENUM_SET_ADDR) == USB_OK)
811 {
812 usbh_parse_dev_desc(uhost, uhost->rx_buffer, 18);
813 USBH_DEBUG("VID: %xh", uhost->dev.dev_desc.idVendor);
814 USBH_DEBUG("PID: %xh", uhost->dev.dev_desc.idProduct);
815 }
816 break;
817
818 case ENUM_SET_ADDR:
819 /* set device address */
820 if(uhost->ctrl.state == CONTROL_IDLE)
821 {
822 uhost->dev.address = usbh_alloc_address();
823 USBH_DEBUG("Set Address: %d", uhost->dev.address);
824 usbh_set_address(uhost, uhost->dev.address);
825 }
826 if (usbh_ctrl_result_check(uhost, CONTROL_IDLE, ENUM_GET_CFG) == USB_OK)
827 {
828 /* enable channel */
829 usbh_hc_open(uhost, uhost->ctrl.hch_in,0x80,
830 uhost->dev.address, EPT_CONTROL_TYPE,
831 uhost->ctrl.ept0_size,
832 uhost->dev.speed);
833
834 /* enable channel */
835 usbh_hc_open(uhost, uhost->ctrl.hch_out,0x00,
836 uhost->dev.address, EPT_CONTROL_TYPE,
837 uhost->ctrl.ept0_size,
838 uhost->dev.speed);
839 }
840 break;
841
842 case ENUM_GET_CFG:
843 /* get device confiuration */
844 if(uhost->ctrl.state == CONTROL_IDLE)
845 {
846 usbh_get_configure_descriptor(uhost, 9);
847 }
848
849 if(usbh_ctrl_result_check(uhost, CONTROL_IDLE, ENUM_GET_FULL_CFG) == USB_OK)
850 {
851 usbh_parse_configure_desc(uhost, uhost->rx_buffer, 9);
852 }
853 break;
854
855 case ENUM_GET_FULL_CFG:
856 /* get device confiuration */
857 if(uhost->ctrl.state == CONTROL_IDLE)
858 {
859 usbh_get_configure_descriptor(uhost, uhost->dev.cfg_desc.cfg.wTotalLength);
860 }
861
862 if(usbh_ctrl_result_check(uhost, CONTROL_IDLE, ENUM_GET_MFC_STRING) == USB_OK)
863 {
864 usbh_parse_configure_desc(uhost, uhost->rx_buffer, uhost->dev.cfg_desc.cfg.wTotalLength);
865 }
866 break;
867
868 case ENUM_GET_MFC_STRING:
869 /* get device mfc string */
870 if(uhost->ctrl.state == CONTROL_IDLE)
871 {
872 usbh_get_sting_descriptor(uhost, uhost->dev.dev_desc.iManufacturer,
873 uhost->rx_buffer, 0xFF);
874 }
875
876 if(usbh_ctrl_result_check(uhost, CONTROL_IDLE, ENUM_GET_PRODUCT_STRING) == USB_OK)
877 {
878 usbh_parse_string_desc(uhost->rx_buffer, uhost->rx_buffer, 0xFF);
879 uhost->user_handler->user_mfc_string(uhost->rx_buffer);
880 }
881 break;
882
883 case ENUM_GET_PRODUCT_STRING:
884 /* get device product string */
885 if(uhost->ctrl.state == CONTROL_IDLE)
886 {
887 usbh_get_sting_descriptor(uhost, uhost->dev.dev_desc.iProduct,
888 uhost->rx_buffer, 0xFF);
889 }
890
891 if(usbh_ctrl_result_check(uhost, CONTROL_IDLE, ENUM_GET_SERIALNUM_STRING) == USB_OK)
892 {
893 usbh_parse_string_desc(uhost->rx_buffer, uhost->rx_buffer, 0xFF);
894 uhost->user_handler->user_product_string(uhost->rx_buffer);
895 }
896 break;
897
898 case ENUM_GET_SERIALNUM_STRING:
899 /* get device serial string */
900 if(uhost->ctrl.state == CONTROL_IDLE)
901 {
902 usbh_get_sting_descriptor(uhost, uhost->dev.dev_desc.iSerialNumber,
903 uhost->rx_buffer, 0xFF);
904 }
905
906 if(usbh_ctrl_result_check(uhost, CONTROL_IDLE, ENUM_SET_CONFIG) == USB_OK)
907 {
908 usbh_parse_string_desc(uhost->rx_buffer, uhost->rx_buffer, 0xFF);
909 uhost->user_handler->user_serial_string(uhost->rx_buffer);
910 }
911 break;
912
913 case ENUM_SET_CONFIG:
914 /* set device config */
915 if(uhost->ctrl.state == CONTROL_IDLE)
916 {
917 usbh_set_configuration(uhost, uhost->dev.cfg_desc.cfg.bConfigurationValue);
918 }
919 usbh_ctrl_result_check(uhost, CONTROL_IDLE, ENUM_COMPLETE);
920
921 break;
922
923 case ENUM_COMPLETE:
924 /* enum complete */
925 status = USB_OK;
926 break;
927 default:
928 break;
929 }
930 return status;
931}
932
939void usbh_active_vbus(usbh_core_type *uhost, confirm_state state)
940{
941 uhost->user_handler->user_active_vbus(uhost, state);
942}
943
949void usbh_reset_port(usbh_core_type *uhost)
950{
951 otg_host_type *usb_host = OTG_HOST(uhost->usb_reg);
952 uint32_t hprt_val = usb_host->hprt;
953
954 hprt_val &= ~(USB_OTG_HPRT_PRTENA | USB_OTG_HPRT_PRTENCHNG |
955 USB_OTG_HPRT_PRTOVRCACT | USB_OTG_HPRT_PRTCONDET);
956
957 /* set port reset */
958 usb_host->hprt = hprt_val | USB_OTG_HPRT_PRTRST;
959
960 usb_delay_ms(100);
961
962 /* clear port reset */
963 usb_host->hprt = hprt_val & (~USB_OTG_HPRT_PRTRST);
964
965 usb_delay_ms(20);
966
967}
968
974static void usbh_attached(usbh_core_type *uhost)
975{
976 /* get free channel */
977 uhost->ctrl.hch_in = usbh_alloc_channel(uhost, 0x80);
978 uhost->ctrl.hch_out = usbh_alloc_channel(uhost, 0x00);
979
980 /* user reset callback handler */
981 uhost->user_handler->user_reset();
982
983 /* get device speed */
984 uhost->dev.speed = OTG_HOST(uhost->usb_reg)->hprt_bit.prtspd;
985 uhost->global_state = USBH_ENUMERATION;
986 uhost->user_handler->user_speed(uhost->dev.speed);
987
988 /* enable channel */
989 usbh_hc_open(uhost, uhost->ctrl.hch_in,0x80,
990 uhost->dev.address, EPT_CONTROL_TYPE,
991 uhost->ctrl.ept0_size,
992 uhost->dev.speed);
993
994 /* enable channel */
995 usbh_hc_open(uhost, uhost->ctrl.hch_out,0x00,
996 uhost->dev.address, EPT_CONTROL_TYPE,
997 uhost->ctrl.ept0_size,
998 uhost->dev.speed);
999
1000 usb_flush_tx_fifo(uhost->usb_reg, 0x10);
1001 usb_flush_rx_fifo(uhost->usb_reg);
1002
1003 /* user attached callback */
1004 uhost->user_handler->user_attached();
1005}
1006
1007
1013static void usbh_enumeration(usbh_core_type *uhost)
1014{
1015 /* enumeration process */
1016 if(usbh_enum_handler(uhost) == USB_OK)
1017 {
1018 /* user enumeration done callback */
1019 uhost->user_handler->user_enumeration_done();
1020 uhost->global_state = USBH_USER_HANDLER;
1021 }
1022}
1023
1029static void usbh_class_request(usbh_core_type *uhost)
1030{
1031 usb_sts_type status;
1032
1033 /* class request callback */
1034 status = uhost->class_handler->request_handler((void *)uhost);
1035 if(status == USB_OK)
1036 {
1037 uhost->global_state = USBH_CLASS;
1038 }
1039 else if(status == USB_ERROR || status == USB_FAIL)
1040 {
1041 uhost->global_state = USBH_ERROR_STATE;
1042 }
1043 else if(status == USB_NOT_SUPPORT)
1044 {
1045 uhost->global_state = USBH_ERROR_STATE;
1046 }
1047}
1048
1054static void usbh_class(usbh_core_type *uhost)
1055{
1056 /* process handler */
1057 if(uhost->class_handler->process_handler((void *)uhost) == USB_OK)
1058 {
1059 }
1060}
1061
1067static void usbh_suspend(usbh_core_type *uhost)
1068{
1069 /* set device feature */
1070 if(uhost->ctrl.state == CONTROL_IDLE)
1071 {
1072 usbh_set_feature(uhost, 0x01, 0);
1073 }
1074 if(usbh_ctrl_result_check(uhost, CONTROL_IDLE, ENUM_IDLE) == USB_OK)
1075 {
1076 /* enter suspend mode */
1077 usb_delay_ms(3);
1078 usbh_enter_suspend(uhost);
1079 uhost->global_state = USBH_SUSPENDED;
1080
1081 }
1082}
1083
1089static void usbh_wakeup(usbh_core_type *uhost)
1090{
1091 /* clear device feature */
1092 if(uhost->ctrl.state == CONTROL_IDLE)
1093 {
1094 /* usb host resume */
1095 usbh_resume(uhost);
1096 usbh_clear_dev_feature(uhost, 0x01, 0);
1097 }
1098 if(usbh_ctrl_result_check(uhost, CONTROL_IDLE, ENUM_IDLE) == USB_OK)
1099 {
1100 uhost->global_state = USBH_CLASS_REQUEST;
1101 USBH_DEBUG("Remote Wakeup");
1102 }
1103}
1104
1110static void usbh_disconnect(usbh_core_type *uhost)
1111{
1112 uint8_t i_index = 0;
1113
1114 /* set host to default state */
1115 usbh_cfg_default_init(uhost);
1116
1117 /* free host channel */
1118 for(i_index = 0; i_index < USB_HOST_CHANNEL_NUM; i_index ++)
1119 {
1120 usbh_free_channel(uhost, i_index);
1121 }
1122
1123 /* call class reset handler */
1124 if(uhost->class_handler->reset_handler != NULL)
1125 {
1126 uhost->class_handler->reset_handler(uhost);
1127 }
1128
1129 /* set global state to idle */
1130 uhost->global_state = USBH_IDLE;
1131
1132 /*call user disconnect function */
1133 uhost->user_handler->user_disconnect();
1134}
1135
1136
1142 usb_sts_type usbh_loop_handler(usbh_core_type *uhost)
1143{
1144 usb_sts_type status = USB_FAIL;
1145
1146 if(uhost->conn_sts == 0 &&
1147 uhost->global_state != USBH_IDLE &&
1148 uhost->global_state != USBH_DISCONNECT)
1149 {
1150 uhost->global_state = USBH_IDLE;
1151 }
1152 switch(uhost->global_state)
1153 {
1154 case USBH_IDLE:
1155 if(uhost->conn_sts == 1)
1156 {
1157 uhost->global_state = USBH_PORT_EN;
1158
1159 /* wait stable */
1160 usb_delay_ms(200);
1161
1162 /* port reset */
1163 usbh_reset_port(uhost);
1164
1165 /* user reset */
1166 uhost->user_handler->user_reset();
1167 }
1168 break;
1169
1170 case USBH_PORT_EN:
1171 if(uhost->port_enable)
1172 {
1173 uhost->global_state = USBH_ATTACHED;
1174 usb_delay_ms(50);
1175 }
1176 break;
1177
1178 case USBH_ATTACHED:
1179 usbh_attached(uhost);
1180 break;
1181
1182 case USBH_ENUMERATION:
1183 usbh_enumeration(uhost);
1184 break;
1185
1186 case USBH_USER_HANDLER:
1187 uhost->global_state = USBH_CLASS_REQUEST;
1188 if( uhost->class_handler->init_handler(uhost) == USB_NOT_SUPPORT)
1189 {
1190 uhost->global_state = USBH_UNSUPPORT;
1191 }
1192 break;
1193
1194 case USBH_CLASS_REQUEST:
1195 usbh_class_request(uhost);
1196 break;
1197
1198 case USBH_CLASS:
1199 usbh_class(uhost);
1200 break;
1201
1202 case USBH_SUSPEND:
1203 usbh_suspend(uhost);
1204 break;
1205
1206 case USBH_SUSPENDED:
1207 break;
1208
1209 case USBH_WAKEUP:
1210 usbh_wakeup(uhost);
1211 break;
1212
1213 case USBH_DISCONNECT:
1214 usbh_disconnect(uhost);
1215 break;
1216
1217 case USBH_ERROR_STATE:
1218 usbh_cfg_default_init(uhost);
1219 uhost->class_handler->reset_handler(uhost);
1220 uhost->user_handler->user_reset();
1221 break;
1222 case USBH_UNSUPPORT:
1223 break;
1224 default:
1225 break;
1226 }
1227
1228 return status;
1229}
1230
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
USBH_P_TX_FIFO_SIZE
#define USBH_P_TX_FIFO_SIZE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:177
USBH2_NP_TX_FIFO_SIZE
#define USBH2_NP_TX_FIFO_SIZE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:181
USBH2_RX_FIFO_SIZE
#define USBH2_RX_FIFO_SIZE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:180
USBH_NP_TX_FIFO_SIZE
#define USBH_NP_TX_FIFO_SIZE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:176
USBH2_P_TX_FIFO_SIZE
#define USBH2_P_TX_FIFO_SIZE
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:182
USBH_RX_FIFO_SIZE
#define USBH_RX_FIFO_SIZE
usb endpoint max num define
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:175
USBH_DEBUG
#define USBH_DEBUG(...)
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:206
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
confirm_state
confirm_state
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
EPT_ISO_TYPE
@ EPT_ISO_TYPE
Definition: at32f435_437_usb.h:347
EPT_INT_TYPE
@ EPT_INT_TYPE
Definition: at32f435_437_usb.h:349
EPT_CONTROL_TYPE
@ EPT_CONTROL_TYPE
Definition: at32f435_437_usb.h:346
EPT_BULK_TYPE
@ EPT_BULK_TYPE
Definition: at32f435_437_usb.h:348
OTG_HOST_MODE
@ OTG_HOST_MODE
Definition: at32f435_437_usb.h:337
OTG_HOST
#define OTG_HOST(usbx)
Definition: at32f435_437_usb.h:1332
usb_port_power_on
void usb_port_power_on(otg_global_type *usbx, confirm_state state)
usb port power on
Definition: at32f435_437_usb.c:842
USB_CHL
#define USB_CHL(usbx, n)
Definition: at32f435_437_usb.h:1333
usb_write_packet
void usb_write_packet(otg_global_type *usbx, uint8_t *pusr_buf, uint16_t num, uint16_t nbytes)
write data from user memory to usb buffer
Definition: at32f435_437_usb.c:422
usb_global_set_mode
void usb_global_set_mode(otg_global_type *usbx, uint32_t mode)
set otg mode(device or host mode)
Definition: at32f435_437_usb.c:344
usb_flush_rx_fifo
void usb_flush_rx_fifo(otg_global_type *usbx)
flush rx fifo
Definition: at32f435_437_usb.c:150
usb_flush_tx_fifo
void usb_flush_tx_fifo(otg_global_type *usbx, uint32_t fifo_num)
flush tx fifo
Definition: at32f435_437_usb.c:124
usbh_fsls_clksel
void usbh_fsls_clksel(otg_global_type *usbx, uint8_t clk)
select full or low speed clock
Definition: at32f435_437_usb.c:1068
usb_interrupt_disable
void usb_interrupt_disable(otg_global_type *usbx)
usb global interrupt disable
Definition: at32f435_437_usb.c:280
usb_hc_enable
void usb_hc_enable(otg_global_type *usbx, uint8_t chn, uint8_t ept_num, uint8_t dev_address, uint8_t type, uint16_t maxpacket, uint8_t speed)
enable one host channel
Definition: at32f435_437_usb.c:896
usb_stop_phy_clk
void usb_stop_phy_clk(otg_global_type *usbx)
usb stop phy clock
Definition: at32f435_437_usb.c:396
OTG2_GLOBAL
#define OTG2_GLOBAL
Definition: at32f435_437_usb.h:1329
usb_interrupt_enable
void usb_interrupt_enable(otg_global_type *usbx)
usb global interrupt enable
Definition: at32f435_437_usb.c:267
OTG1_GLOBAL
#define OTG1_GLOBAL
usb host and device register define
Definition: at32f435_437_usb.h:1328
usb_open_phy_clk
void usb_open_phy_clk(otg_global_type *usbx)
usb open phy clock
Definition: at32f435_437_usb.c:409
usb_hch_halt
void usb_hch_halt(otg_global_type *usbx, uint8_t chn)
halt channel
Definition: at32f435_437_usb.c:1012
usb_global_init
void usb_global_init(otg_global_type *usbx)
usb global initialization
Definition: at32f435_437_usb.c:83
USB_OTG_INCOMISOIN_INT
#define USB_OTG_INCOMISOIN_INT
Definition: at32f435_437_usb.h:67
USB_OTG_WKUP_INT
#define USB_OTG_WKUP_INT
Definition: at32f435_437_usb.h:74
USB_OTG_RXFLVL_INT
#define USB_OTG_RXFLVL_INT
Definition: at32f435_437_usb.h:55
USB_OTG_USBSUSP_INT
#define USB_OTG_USBSUSP_INT
Definition: at32f435_437_usb.h:60
USB_OTG_PRT_INT
#define USB_OTG_PRT_INT
Definition: at32f435_437_usb.h:69
USB_OTG_INCOMPIP_INCOMPISOOUT_INT
#define USB_OTG_INCOMPIP_INCOMPISOOUT_INT
Definition: at32f435_437_usb.h:68
USB_OTG_DISCON_INT
#define USB_OTG_DISCON_INT
Definition: at32f435_437_usb.h:73
USB_OTG_SOF_INT
#define USB_OTG_SOF_INT
Definition: at32f435_437_usb.h:54
USB_OTG_HCH_INT
#define USB_OTG_HCH_INT
Definition: at32f435_437_usb.h:70
USB_OTG_HCTSIZ_PID
#define USB_OTG_HCTSIZ_PID
Definition: at32f435_437_usb.h:209
USB_OTG_HCCHAR_CHENA
#define USB_OTG_HCCHAR_CHENA
Definition: at32f435_437_usb.h:202
USB_OTG_HCTSIZ_XFERSIZE
#define USB_OTG_HCTSIZ_XFERSIZE
usb host register hctsiz bit define
Definition: at32f435_437_usb.h:207
USB_OTG_HCCHAR_CHDIS
#define USB_OTG_HCCHAR_CHDIS
Definition: at32f435_437_usb.h:201
USB_OTG_HPRT_PRTENA
#define USB_OTG_HPRT_PRTENA
Definition: at32f435_437_usb.h:172
USB_OTG_HPRT_PRTRES
#define USB_OTG_HPRT_PRTRES
Definition: at32f435_437_usb.h:176
USB_HCFG_CLK_48M
#define USB_HCFG_CLK_48M
Definition: at32f435_437_usb.h:164
USB_OTG_HCTSIZ_PKTCNT
#define USB_OTG_HCTSIZ_PKTCNT
Definition: at32f435_437_usb.h:208
USB_OTG_HPRT_PRTSUSP
#define USB_OTG_HPRT_PRTSUSP
Definition: at32f435_437_usb.h:177
USB_OTG_HPRT_PRTOVRCACT
#define USB_OTG_HPRT_PRTOVRCACT
Definition: at32f435_437_usb.h:174
USB_OTG_HPRT_PRTENCHNG
#define USB_OTG_HPRT_PRTENCHNG
Definition: at32f435_437_usb.h:173
USB_OTG_HPRT_PRTCONDET
#define USB_OTG_HPRT_PRTCONDET
Definition: at32f435_437_usb.h:171
USB_OTG_HPRT_PRTRST
#define USB_OTG_HPRT_PRTRST
Definition: at32f435_437_usb.h:178
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
USB_OK
@ USB_OK
Definition: usb_std.h:268
USB_WAIT
@ USB_WAIT
Definition: usb_std.h:270
USB_ERROR
@ USB_ERROR
Definition: usb_std.h:272
USB_NOT_SUPPORT
@ USB_NOT_SUPPORT
Definition: usb_std.h:271
USB_FAIL
@ USB_FAIL
Definition: usb_std.h:269
usbh_class_request
static void usbh_class_request(usbh_core_type *uhost)
usb host class request
Definition: usbh_core.c:1029
usbh_loop_handler
usb_sts_type usbh_loop_handler(usbh_core_type *uhost)
usb host enum loop handler
Definition: usbh_core.c:1142
usbh_core_init
usb_sts_type usbh_core_init(usbh_core_type *uhost, usb_reg_type *usb_reg, usbh_class_handler_type *class_handler, usbh_user_handler_type *user_handler, uint8_t core_id)
usb host core initialize
Definition: usbh_core.c:501
usbh_enumeration
static void usbh_enumeration(usbh_core_type *uhost)
usb host enumeration
Definition: usbh_core.c:1013
usbh_interrupt_recv
usb_sts_type usbh_interrupt_recv(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host interrupt receive request
Definition: usbh_core.c:217
usbh_get_free_channel
uint16_t usbh_get_free_channel(usbh_core_type *uhost)
get usb host free channel
Definition: usbh_core.c:71
usbh_free_channel
void usbh_free_channel(usbh_core_type *uhost, uint8_t index)
usb host free channel
Definition: usbh_core.c:57
usbh_set_toggle
usb_sts_type usbh_set_toggle(usbh_core_type *uhost, uint8_t hc_num, uint8_t toggle)
usb host set toggle
Definition: usbh_core.c:94
usbh_alloc_address
uint8_t usbh_alloc_address(void)
auto alloc address (1...20)
Definition: usbh_core.c:756
usbh_attached
static void usbh_attached(usbh_core_type *uhost)
usb host attached
Definition: usbh_core.c:974
usbh_bulk_recv
usb_sts_type usbh_bulk_recv(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host bulk receive request
Definition: usbh_core.c:286
usbh_resume
void usbh_resume(usbh_core_type *uhost)
usb host resume
Definition: usbh_core.c:464
usbh_ctrl_result_check
usb_sts_type usbh_ctrl_result_check(usbh_core_type *uhost, ctrl_ept0_sts_type next_ctrl_state, uint8_t next_enum_state)
usb wait control setup complete
Definition: usbh_core.c:724
usbh_active_vbus
void usbh_active_vbus(usbh_core_type *uhost, confirm_state state)
active vbus.
Definition: usbh_core.c:939
usbh_cfg_default_init
usb_sts_type usbh_cfg_default_init(usbh_core_type *uhost)
usb host cfg default init
Definition: usbh_core.c:405
usbh_interrupt_send
usb_sts_type usbh_interrupt_send(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host interrupt send request
Definition: usbh_core.c:251
usbh_isoc_recv
usb_sts_type usbh_isoc_recv(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host iso receive request
Definition: usbh_core.c:382
usbh_wakeup
static void usbh_wakeup(usbh_core_type *uhost)
usb host wakeup
Definition: usbh_core.c:1089
usbh_alloc_channel
uint16_t usbh_alloc_channel(usbh_core_type *uhost, uint8_t ept_addr)
usb host alloc channel
Definition: usbh_core.c:694
usbh_ch_disable
void usbh_ch_disable(usbh_core_type *uhost, uint8_t chn)
disable host channel
Definition: usbh_core.c:683
usbh_enter_suspend
void usbh_enter_suspend(usbh_core_type *uhost)
usb host enter suspend
Definition: usbh_core.c:443
usbh_suspend
static void usbh_suspend(usbh_core_type *uhost)
usb host suspend
Definition: usbh_core.c:1067
usbh_hc_open
void usbh_hc_open(usbh_core_type *uhost, uint8_t chn, uint8_t ept_num, uint8_t dev_address, uint8_t type, uint16_t maxpacket, uint8_t speed)
usb host open channel
Definition: usbh_core.c:638
usbh_disconnect
static void usbh_disconnect(usbh_core_type *uhost)
usb host disconnect
Definition: usbh_core.c:1110
usbh_bulk_send
usb_sts_type usbh_bulk_send(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host bulk send request
Definition: usbh_core.c:321
usbh_in_out_request
usb_sts_type usbh_in_out_request(usbh_core_type *uhost, uint8_t hc_num)
usb host in out request
Definition: usbh_core.c:115
usbh_get_urb_status
urb_sts_type usbh_get_urb_status(usbh_core_type *uhost, uint8_t ch_num)
usb host get urb status
Definition: usbh_core.c:713
usbh_reset_port
void usbh_reset_port(usbh_core_type *uhost)
reset usb port
Definition: usbh_core.c:949
usbh_class
static void usbh_class(usbh_core_type *uhost)
usb host class handler
Definition: usbh_core.c:1054
usbh_enum_handler
usb_sts_type usbh_enum_handler(usbh_core_type *uhost)
usb host enumeration handler
Definition: usbh_core.c:770
usbh_isoc_send
usb_sts_type usbh_isoc_send(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host iso send request
Definition: usbh_core.c:356
usbh_set_configuration
usb_sts_type usbh_set_configuration(usbh_core_type *uhost, uint16_t config)
usb host set configurtion
Definition: usbh_ctrl.c:834
usbh_ctrl_transfer_loop
usb_sts_type usbh_ctrl_transfer_loop(usbh_core_type *uhost)
usb host control transfer loop function
Definition: usbh_ctrl.c:454
usbh_clear_dev_feature
usb_sts_type usbh_clear_dev_feature(usbh_core_type *uhost, uint8_t feature, uint16_t index)
usb host clear device feature
Definition: usbh_ctrl.c:922
usbh_get_device_descriptor
usb_sts_type usbh_get_device_descriptor(usbh_core_type *uhost, uint16_t length)
usb host get device descriptor
Definition: usbh_ctrl.c:769
usbh_parse_string_desc
void usbh_parse_string_desc(uint8_t *src, uint8_t *dest, uint16_t length)
usbh parse string descriptor
Definition: usbh_ctrl.c:745
usbh_parse_dev_desc
void usbh_parse_dev_desc(usbh_core_type *uhost, uint8_t *buffer, uint16_t length)
usb host parse device descriptor
Definition: usbh_ctrl.c:582
usbh_parse_configure_desc
usb_sts_type usbh_parse_configure_desc(usbh_core_type *uhost, uint8_t *buffer, uint16_t length)
usb host parse configure descriptor
Definition: usbh_ctrl.c:661
usbh_get_configure_descriptor
usb_sts_type usbh_get_configure_descriptor(usbh_core_type *uhost, uint16_t length)
usb host get configure descriptor
Definition: usbh_ctrl.c:789
usbh_set_address
usb_sts_type usbh_set_address(usbh_core_type *uhost, uint8_t address)
usb host set device address
Definition: usbh_ctrl.c:855
usbh_get_sting_descriptor
usb_sts_type usbh_get_sting_descriptor(usbh_core_type *uhost, uint8_t string_id, uint8_t *buffer, uint16_t length)
usb host get string descriptor
Definition: usbh_ctrl.c:812
usbh_set_feature
usb_sts_type usbh_set_feature(usbh_core_type *uhost, uint8_t feature, uint16_t index)
usb host set feature
Definition: usbh_ctrl.c:899
otg_global_type
Definition: at32f435_437_usb.h:474
otg_global_type::ptxfsize
__IO uint32_t ptxfsize
Definition: at32f435_437_usb.h:756
otg_global_type::nptxfempmsk
__IO uint32_t nptxfempmsk
Definition: at32f435_437_usb.h:613
otg_global_type::nptxfdep
__IO uint32_t nptxfdep
Definition: at32f435_437_usb.h:695
otg_global_type::nptxfspcavail
__IO uint32_t nptxfspcavail
Definition: at32f435_437_usb.h:707
otg_global_type::ptxfempmsk
__IO uint32_t ptxfempmsk
Definition: at32f435_437_usb.h:631
otg_global_type::hptxfsiz_bit
struct otg_global_type::@1177::@1195 hptxfsiz_bit
otg_global_type::grxfsiz
__IO uint32_t grxfsiz
Definition: at32f435_437_usb.h:678
otg_global_type::nptxfstaddr
__IO uint32_t nptxfstaddr
Definition: at32f435_437_usb.h:694
otg_global_type::ptxfstaddr
__IO uint32_t ptxfstaddr
Definition: at32f435_437_usb.h:755
otg_global_type::gnptxsts_bit
struct otg_global_type::@1171::@1192 gnptxsts_bit
otg_global_type::gintsts
__IO uint32_t gintsts
Definition: at32f435_437_usb.h:565
otg_global_type::gnptxfsiz_ept0tx_bit
struct otg_global_type::@1169::@1191 gnptxfsiz_ept0tx_bit
otg_global_type::gintmsk_bit
struct otg_global_type::@1161::@1187 gintmsk_bit
otg_global_type::gintmsk
__IO uint32_t gintmsk
Definition: at32f435_437_usb.h:605
otg_hchannel_type
Definition: at32f435_437_usb.h:890
otg_hchannel_type::oddfrm
__IO uint32_t oddfrm
Definition: at32f435_437_usb.h:907
otg_hchannel_type::hctsiz
__IO uint32_t hctsiz
Definition: at32f435_437_usb.h:981
otg_hchannel_type::hcchar
__IO uint32_t hcchar
Definition: at32f435_437_usb.h:896
otg_hchannel_type::hcchar_bit
struct otg_hchannel_type::@1218::@1228 hcchar_bit
otg_host_type
Definition: at32f435_437_usb.h:776
otg_host_type::hprt
__IO uint32_t hprt
Definition: at32f435_437_usb.h:866
otg_host_type::hcfg_bit
struct otg_host_type::@1197::@1211 hcfg_bit
otg_host_type::fslssupp
__IO uint32_t fslssupp
Definition: at32f435_437_usb.h:786
usb_core.h
usb core header file
usbh_core.h
usb host core header file
usbh_ctrl.h
usb header file


AT32F435/437 Firmwary Library: usbh_core.h Source File

  • middlewares
  • usb_drivers
  • inc
usbh_core.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USBH_CORE_H
29#define __USBH_CORE_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "usb_conf.h"
36#include "usb_std.h"
37
51#ifdef USE_OTG_HOST_MODE
52
56typedef enum
57{
58 HCH_IDLE,
59 HCH_XFRC,
60 HCH_HALTED,
61 HCH_NAK,
62 HCH_NYET,
63 HCH_STALL,
64 HCH_XACTERR,
65 HCH_BBLERR,
66 HCH_DATATGLERR
67} hch_sts_type;
68
72typedef enum
73{
74 URB_IDLE = 0,
75 URB_DONE,
76 URB_NOTREADY,
77 URB_NYET,
78 URB_ERROR,
79 URB_STALL
80} urb_sts_type;
81
85typedef enum
86{
87 CTRL_START = 0,
88 CTRL_XFERC,
89 CTRL_HALTED,
90 CTRL_NAK,
91 CTRL_STALL,
92 CTRL_XACTERR,
93 CTRL_BBLERR,
94 CTRL_DATATGLERR,
95 CTRL_FAIL
96} ctrl_sts_type;
97
101typedef enum
102{
103 CONTROL_IDLE,
104 CONTROL_SETUP,
105 CONTROL_SETUP_WAIT,
106 CONTROL_DATA_IN,
107 CONTROL_DATA_IN_WAIT,
108 CONTROL_DATA_OUT,
109 CONTROL_DATA_OUT_WAIT,
110 CONTROL_STATUS_IN,
111 CONTROL_STATUS_IN_WAIT,
112 CONTROL_STATUS_OUT,
113 CONTROL_STATUS_OUT_WAIT,
114 CONTROL_ERROR,
115 CONTROL_STALL,
116 CONTROL_COMPLETE
117} ctrl_ept0_sts_type;
118
122typedef enum
123{
124 ENUM_IDLE,
125 ENUM_GET_MIN_DESC,
126 ENUM_GET_FULL_DESC,
127 ENUM_SET_ADDR,
128 ENUM_GET_CFG,
129 ENUM_GET_FULL_CFG,
130 ENUM_GET_MFC_STRING,
131 ENUM_GET_PRODUCT_STRING,
132 ENUM_GET_SERIALNUM_STRING,
133 ENUM_SET_CONFIG,
134 ENUM_COMPLETE,
135} usbh_enum_sts_type;
136
140typedef enum
141{
142 USBH_IDLE,
143 USBH_PORT_EN,
144 USBH_ATTACHED,
145 USBH_DISCONNECT,
146 USBH_DEV_SPEED,
147 USBH_ENUMERATION,
148 USBH_CLASS_REQUEST,
149 USBH_CLASS,
150 USBH_CTRL_XFER,
151 USBH_USER_HANDLER,
152 USBH_SUSPEND,
153 USBH_SUSPENDED,
154 USBH_WAKEUP,
155 USBH_UNSUPPORT,
156 USBH_ERROR_STATE,
157} usbh_gstate_type;
158
162typedef enum
163{
164 CMD_IDLE,
165 CMD_SEND,
166 CMD_WAIT
167} cmd_sts_type;
168
172#define HCH_OK 0x0000
173#define HCH_USED 0x8000
174#define HCH_ERROR 0xFFFF
175#define HCH_USED_MASK 0x7FFF
180#define HCH_PID_DATA0 0
181#define HCH_PID_DATA2 1
182#define HCH_PID_DATA1 2
183#define HCH_PID_SETUP 3
188#define USB_REQUEST_DIR_MASK 0x80
189#define USB_DIR_H2D USB_REQ_DIR_HTD
190#define USB_DIR_D2H USB_REQ_DIR_DTH
195#define DATA_STAGE_TIMEOUT 5000
196#define NODATA_STAGE_TIMEOUT 50
201#define USBH_MAX_ERROR_COUNT 2
202#define USBH_MAX_INTERFACE 5
203#define USBH_MAX_ENDPOINT 5
208typedef struct
209{
210 usb_interface_desc_type interface;
211 usb_endpoint_desc_type endpoint[USBH_MAX_ENDPOINT];
212} usb_itf_desc_type;
213
217typedef struct
218{
219 usb_configuration_desc_type cfg;
220 usb_itf_desc_type interface[USBH_MAX_INTERFACE];
221} usb_cfg_desc_type;
222
226typedef struct
227{
228 uint8_t address;
229 uint8_t speed;
230 usb_device_desc_type dev_desc;
231 usb_cfg_desc_type cfg_desc;
232} usbh_dev_desc_type;
233
237typedef struct
238{
239 uint8_t hch_in;
240 uint8_t hch_out;
241 uint8_t ept0_size;
242 uint8_t *buffer;
243 usb_setup_type setup;
244 uint16_t len;
245 uint8_t err_cnt;
246 uint32_t timer;
247 ctrl_sts_type sts;
248 ctrl_ept0_sts_type state;
249} usbh_ctrl_type;
250
254typedef struct
255{
256 usb_sts_type (*init_handler)(void *uhost);
257 usb_sts_type (*reset_handler)(void *uhost);
258 usb_sts_type (*request_handler)(void *uhost);
259 usb_sts_type (*process_handler)(void *uhost);
260 void *pdata;
261} usbh_class_handler_type;
262
266typedef struct
267{
268 usb_sts_type (*user_init)(void);
269 usb_sts_type (*user_reset)(void);
270 usb_sts_type (*user_attached)(void);
271 usb_sts_type (*user_disconnect)(void);
272 usb_sts_type (*user_speed)(uint8_t speed);
273 usb_sts_type (*user_mfc_string)(void *);
274 usb_sts_type (*user_product_string)(void *);
275 usb_sts_type (*user_serial_string)(void *);
276 usb_sts_type (*user_enumeration_done)(void);
277 usb_sts_type (*user_application)(void);
278 usb_sts_type (*user_active_vbus)(void *uhost, confirm_state state);
279 usb_sts_type (*user_not_support)(void);
280} usbh_user_handler_type;
281
285typedef struct
286{
287 usb_reg_type *usb_reg;
289 uint8_t global_state;
290 uint8_t enum_state;
291 uint8_t req_state;
293 usbh_dev_desc_type dev;
294 usbh_ctrl_type ctrl;
296 usbh_class_handler_type *class_handler;
297 usbh_user_handler_type *user_handler;
299 usb_hch_type hch[USB_HOST_CHANNEL_NUM];
300 uint8_t rx_buffer[USB_MAX_DATA_LENGTH];
302 uint32_t conn_sts;
303 uint32_t port_enable;
304 uint32_t timer;
306 uint32_t err_cnt[USB_HOST_CHANNEL_NUM];
307 uint32_t xfer_cnt[USB_HOST_CHANNEL_NUM];
308 hch_sts_type hch_state[USB_HOST_CHANNEL_NUM];
309 urb_sts_type urb_state[USB_HOST_CHANNEL_NUM];
310 uint16_t channel[USB_HOST_CHANNEL_NUM];
311} usbh_core_type;
312
313
314void usbh_free_channel(usbh_core_type *uhost, uint8_t index);
315uint16_t usbh_get_free_channel(usbh_core_type *uhost);
316 usb_sts_type usbh_set_toggle(usbh_core_type *uhost, uint8_t hc_num, uint8_t toggle);
317 usb_sts_type usbh_in_out_request(usbh_core_type *uhost, uint8_t hc_num);
318 usb_sts_type usbh_interrupt_recv(usbh_core_type *uhost, uint8_t hc_num,
319 uint8_t *buffer, uint16_t length);
320 usb_sts_type usbh_interrupt_send(usbh_core_type *uhost, uint8_t hc_num,
321 uint8_t *buffer, uint16_t length);
322 usb_sts_type usbh_bulk_recv(usbh_core_type *uhost, uint8_t hc_num,
323 uint8_t *buffer, uint16_t length);
324 usb_sts_type usbh_bulk_send(usbh_core_type *uhost, uint8_t hc_num,
325 uint8_t *buffer, uint16_t length);
326 usb_sts_type usbh_isoc_send(usbh_core_type *uhost, uint8_t hc_num,
327 uint8_t *buffer, uint16_t length);
328 usb_sts_type usbh_isoc_recv(usbh_core_type *uhost, uint8_t hc_num,
329 uint8_t *buffer, uint16_t length);
330 usb_sts_type usbh_cfg_default_init(usbh_core_type *uhost);
331void usbh_enter_suspend(usbh_core_type *uhost);
332void usbh_resume(usbh_core_type *uhost);
333
334uint16_t usbh_alloc_channel(usbh_core_type *uhost, uint8_t ept_addr);
335urb_sts_type usbh_get_urb_status(usbh_core_type *uhost, uint8_t ch_num);
336 usb_sts_type usbh_ctrl_result_check(usbh_core_type *uhost,
337 ctrl_ept0_sts_type next_ctrl_state,
338 uint8_t next_enum_state);
339uint8_t usbh_alloc_address(void);
340void usbh_reset_port(usbh_core_type *uhost);
341 usb_sts_type usbh_loop_handler(usbh_core_type *uhost);
342void usbh_ch_disable(usbh_core_type *uhost, uint8_t chn);
343void usbh_hc_open(usbh_core_type *uhost,
344 uint8_t chn,
345 uint8_t ept_num,
346 uint8_t dev_address,
347 uint8_t type,
348 uint16_t maxpacket,
349 uint8_t speed);
350void usbh_active_vbus(usbh_core_type *uhost, confirm_state state);
351
352 usb_sts_type usbh_core_init(usbh_core_type *uhost,
353 usb_reg_type *usb_reg,
354 usbh_class_handler_type *class_handler,
355 usbh_user_handler_type *user_handler,
356 uint8_t core_id);
357#endif
358
359
371#ifdef __cplusplus
372}
373#endif
374
375#endif
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
rx_buffer
uint8_t rx_buffer[16]
Definition: project/at_start_f435/examples/usart/hw_flow_control/src/main.c:40
confirm_state
confirm_state
Definition: at32f435_437.h:379
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
usbh_loop_handler
usb_sts_type usbh_loop_handler(usbh_core_type *uhost)
usb host enum loop handler
Definition: usbh_core.c:1142
usbh_core_init
usb_sts_type usbh_core_init(usbh_core_type *uhost, usb_reg_type *usb_reg, usbh_class_handler_type *class_handler, usbh_user_handler_type *user_handler, uint8_t core_id)
usb host core initialize
Definition: usbh_core.c:501
usbh_interrupt_recv
usb_sts_type usbh_interrupt_recv(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host interrupt receive request
Definition: usbh_core.c:217
usbh_get_free_channel
uint16_t usbh_get_free_channel(usbh_core_type *uhost)
get usb host free channel
Definition: usbh_core.c:71
usbh_free_channel
void usbh_free_channel(usbh_core_type *uhost, uint8_t index)
usb host free channel
Definition: usbh_core.c:57
usbh_set_toggle
usb_sts_type usbh_set_toggle(usbh_core_type *uhost, uint8_t hc_num, uint8_t toggle)
usb host set toggle
Definition: usbh_core.c:94
usbh_alloc_address
uint8_t usbh_alloc_address(void)
auto alloc address (1...20)
Definition: usbh_core.c:756
usbh_bulk_recv
usb_sts_type usbh_bulk_recv(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host bulk receive request
Definition: usbh_core.c:286
usbh_resume
void usbh_resume(usbh_core_type *uhost)
usb host resume
Definition: usbh_core.c:464
usbh_ctrl_result_check
usb_sts_type usbh_ctrl_result_check(usbh_core_type *uhost, ctrl_ept0_sts_type next_ctrl_state, uint8_t next_enum_state)
usb wait control setup complete
Definition: usbh_core.c:724
usbh_active_vbus
void usbh_active_vbus(usbh_core_type *uhost, confirm_state state)
active vbus.
Definition: usbh_core.c:939
usbh_cfg_default_init
usb_sts_type usbh_cfg_default_init(usbh_core_type *uhost)
usb host cfg default init
Definition: usbh_core.c:405
usbh_interrupt_send
usb_sts_type usbh_interrupt_send(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host interrupt send request
Definition: usbh_core.c:251
usbh_isoc_recv
usb_sts_type usbh_isoc_recv(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host iso receive request
Definition: usbh_core.c:382
usbh_alloc_channel
uint16_t usbh_alloc_channel(usbh_core_type *uhost, uint8_t ept_addr)
usb host alloc channel
Definition: usbh_core.c:694
usbh_ch_disable
void usbh_ch_disable(usbh_core_type *uhost, uint8_t chn)
disable host channel
Definition: usbh_core.c:683
usbh_enter_suspend
void usbh_enter_suspend(usbh_core_type *uhost)
usb host enter suspend
Definition: usbh_core.c:443
usbh_hc_open
void usbh_hc_open(usbh_core_type *uhost, uint8_t chn, uint8_t ept_num, uint8_t dev_address, uint8_t type, uint16_t maxpacket, uint8_t speed)
usb host open channel
Definition: usbh_core.c:638
usbh_bulk_send
usb_sts_type usbh_bulk_send(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host bulk send request
Definition: usbh_core.c:321
usbh_in_out_request
usb_sts_type usbh_in_out_request(usbh_core_type *uhost, uint8_t hc_num)
usb host in out request
Definition: usbh_core.c:115
usbh_get_urb_status
urb_sts_type usbh_get_urb_status(usbh_core_type *uhost, uint8_t ch_num)
usb host get urb status
Definition: usbh_core.c:713
usbh_reset_port
void usbh_reset_port(usbh_core_type *uhost)
reset usb port
Definition: usbh_core.c:949
usbh_isoc_send
usb_sts_type usbh_isoc_send(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host iso send request
Definition: usbh_core.c:356
USB_MAX_DATA_LENGTH
#define USB_MAX_DATA_LENGTH
otg host max buffer length (byte)
Definition: at32f435_437_usb.h:321
otg_global_type
Definition: at32f435_437_usb.h:474
usb_configuration_desc_type
format of standard configuration descriptor
Definition: usb_std.h:314
usb_device_desc_type
format of standard device descriptor
Definition: usb_std.h:293
usb_endpoint_desc_type
format of standard endpoint descriptor
Definition: usb_std.h:351
usb_hch_type
usb host channel infomation structure definition
Definition: at32f435_437_usb.h:449
usb_interface_desc_type
format of standard interface descriptor
Definition: usb_std.h:335
usb_setup_type
format of usb setup data
Definition: usb_std.h:280
usb_std.h
usb standard header file


AT32F435/437 Firmwary Library: usbh_ctrl.c Source File

  • middlewares
  • usb_drivers
  • src
usbh_ctrl.c
Go to the documentation of this file.
1
26#include "usbh_ctrl.h"
27#include "usbh_core.h"
28#include "usb_std.h"
29
43/* control timeout 5s */
44#define CTRL_TIMEOUT 5000
45
53 usb_sts_type usbh_ctrl_send_setup(usbh_core_type *uhost, uint8_t *buffer, uint8_t hc_num)
54{
55 uhost->hch[hc_num].dir = 0;
56 uhost->hch[hc_num].data_pid = HCH_PID_SETUP;
57 uhost->hch[hc_num].trans_buf = buffer;
58 uhost->hch[hc_num].trans_len = 8; /*setup */
59
60 return usbh_in_out_request(uhost, hc_num);
61}
62
71 usb_sts_type usbh_ctrl_recv_data(usbh_core_type *uhost, uint8_t *buffer,
72 uint8_t length, uint16_t hc_num)
73{
74 uhost->hch[hc_num].dir = 1;
75 uhost->hch[hc_num].data_pid = HCH_PID_DATA1;
76 uhost->hch[hc_num].trans_buf = buffer;
77 uhost->hch[hc_num].trans_len = length;
78
79 return usbh_in_out_request(uhost, hc_num);
80}
81
90 usb_sts_type usbh_ctrl_send_data(usbh_core_type *uhost, uint8_t *buffer,
91 uint8_t length, uint16_t hc_num)
92{
93 uhost->hch[hc_num].dir = 0;
94 uhost->hch[hc_num].trans_buf = buffer;
95 uhost->hch[hc_num].trans_len = length;
96
97 if(length == 0)
98 {
99 uhost->hch[uhost->ctrl.hch_out].toggle_out = 1;
100 }
101 if(uhost->hch[uhost->ctrl.hch_out].toggle_out == 0)
102 {
103 uhost->hch[hc_num].data_pid = HCH_PID_DATA0;
104 }
105 else
106 {
107 uhost->hch[hc_num].data_pid = HCH_PID_DATA1;
108 }
109 return usbh_in_out_request(uhost, hc_num);
110}
111
117 usb_sts_type usbh_ctrl_setup_handler(usbh_core_type *uhost)
118{
119 usbh_ctrl_send_setup(uhost, (uint8_t *)(&uhost->ctrl.setup),
120 uhost->ctrl.hch_out);
121 uhost->ctrl.state = CONTROL_SETUP_WAIT;
122 return USB_OK;
123}
124
131 usb_sts_type usbh_ctrl_setup_wait_handler(usbh_core_type *uhost, uint32_t *timeout)
132{
133 urb_sts_type urb_state;
134 usb_sts_type status = USB_WAIT;
135 uint8_t dir;
136 urb_state = uhost->urb_state[uhost->ctrl.hch_out];
137 if(urb_state == URB_DONE)
138 {
139 dir = uhost->ctrl.setup.bmRequestType & USB_REQUEST_DIR_MASK;
140 if(uhost->ctrl.setup.wLength != 0)
141 {
142 *timeout = DATA_STAGE_TIMEOUT;
143 if(dir == USB_DIR_D2H) //in
144 {
145 uhost->ctrl.state = CONTROL_DATA_IN;
146 }
147 else //out
148 {
149 uhost->ctrl.state = CONTROL_DATA_OUT;
150 }
151 }
152 else
153 {
154 *timeout = NODATA_STAGE_TIMEOUT;
155 if(dir == USB_DIR_D2H) //no data, send status
156 {
157 uhost->ctrl.state = CONTROL_STATUS_OUT;
158 }
159 else //out
160 {
161 uhost->ctrl.state = CONTROL_STATUS_IN;
162 }
163 }
164 status = USB_OK;
165 }
166 else if(urb_state == URB_ERROR || urb_state == URB_NOTREADY)
167 {
168 uhost->ctrl.state = CONTROL_ERROR;
169 uhost->ctrl.sts = CTRL_XACTERR;
170 status = USB_ERROR;
171 }
172 else
173 {
174 /* wait nak timeout 5s*/
175 if(uhost->timer - uhost->ctrl.timer > CTRL_TIMEOUT)
176 {
177 uhost->ctrl.state = CONTROL_ERROR;
178 uhost->ctrl.sts = CTRL_XACTERR;
179 status = USB_ERROR;
180 }
181 }
182 return status;
183}
184
190 usb_sts_type usbh_ctrl_data_in_handler(usbh_core_type *uhost)
191{
192 usb_sts_type status = USB_OK;
193 usbh_ctrl_recv_data(uhost, uhost->ctrl.buffer,
194 uhost->ctrl.len,
195 uhost->ctrl.hch_in);
196 uhost->ctrl.state = CONTROL_DATA_IN_WAIT;
197
198 return status;
199}
200
207 usb_sts_type usbh_ctrl_data_in_wait_handler(usbh_core_type *uhost, uint32_t timeout)
208{
209 usb_sts_type status = USB_OK;
210 urb_sts_type urb_state;
211 urb_state = uhost->urb_state[uhost->ctrl.hch_in];
212
213 if(urb_state == URB_DONE)
214 {
215 uhost->ctrl.state = CONTROL_STATUS_OUT;
216 }
217 else if(urb_state == URB_STALL)
218 {
219 uhost->ctrl.state = CONTROL_STALL;
220 }
221 else if(urb_state == URB_ERROR)
222 {
223 uhost->ctrl.state = CONTROL_ERROR;
224 }
225 else
226 {
227 /* wait nak timeout 5s*/
228 if(uhost->timer - uhost->ctrl.timer > CTRL_TIMEOUT)
229 {
230 uhost->ctrl.state = CONTROL_ERROR;
231 uhost->ctrl.sts = CTRL_XACTERR;
232 status = USB_ERROR;
233 }
234
235 }
236 return status;
237}
238
244 usb_sts_type usbh_ctrl_data_out_handler(usbh_core_type *uhost)
245{
246 usb_sts_type status = USB_OK;
247 uhost->hch[uhost->ctrl.hch_out].toggle_out = 1;
248
249 usbh_ctrl_send_data(uhost, uhost->ctrl.buffer,
250 uhost->ctrl.len,
251 uhost->ctrl.hch_out);
252 uhost->ctrl.state = CONTROL_DATA_OUT_WAIT;
253
254 return status;
255}
256
263 usb_sts_type usbh_ctrl_data_out_wait_handler(usbh_core_type *uhost, uint32_t timeout)
264{
265 usb_sts_type status = USB_OK;
266 urb_sts_type urb_state;
267 urb_state = uhost->urb_state[uhost->ctrl.hch_out];
268 if(urb_state == URB_DONE)
269 {
270 uhost->ctrl.state = CONTROL_STATUS_IN;
271 }
272 else if(urb_state == URB_STALL)
273 {
274 uhost->ctrl.state = CONTROL_STALL;
275 }
276 else if(urb_state == URB_ERROR)
277 {
278 uhost->ctrl.state = CONTROL_ERROR;
279 }
280 else if(urb_state == URB_NOTREADY)
281 {
282 uhost->ctrl.state = CONTROL_DATA_OUT;
283 }
284 else
285 {
286 /* wait nak timeout 5s*/
287 if(uhost->timer - uhost->ctrl.timer > CTRL_TIMEOUT)
288 {
289 uhost->ctrl.state = CONTROL_ERROR;
290 uhost->ctrl.sts = CTRL_XACTERR;
291 status = USB_ERROR;
292 }
293 }
294 return status;
295}
296
302 usb_sts_type usbh_ctrl_status_in_handler(usbh_core_type *uhost)
303{
304 usb_sts_type status = USB_OK;
305 usbh_ctrl_recv_data(uhost, 0, 0,
306 uhost->ctrl.hch_in);
307 uhost->ctrl.state = CONTROL_STATUS_IN_WAIT;
308
309
310 return status;
311}
312
319 usb_sts_type usbh_ctrl_status_in_wait_handler(usbh_core_type *uhost, uint32_t timeout)
320{
321 usb_sts_type status = USB_OK;
322 urb_sts_type urb_state;
323 urb_state = uhost->urb_state[uhost->ctrl.hch_in];
324 if(urb_state == URB_DONE)
325 {
326 uhost->ctrl.state = CONTROL_COMPLETE;
327 }
328 else if(urb_state == URB_STALL)
329 {
330 uhost->ctrl.state = CONTROL_STALL;
331 status = USB_NOT_SUPPORT;
332 }
333 else if(urb_state == URB_ERROR)
334 {
335 uhost->ctrl.state = CONTROL_ERROR;
336 }
337 else
338 {
339 /* wait nak timeout 5s*/
340 if(uhost->timer - uhost->ctrl.timer > CTRL_TIMEOUT)
341 {
342 uhost->ctrl.state = CONTROL_ERROR;
343 uhost->ctrl.sts = CTRL_XACTERR;
344 status = USB_ERROR;
345 }
346 }
347 return status;
348}
349
355 usb_sts_type usbh_ctrl_status_out_handler(usbh_core_type *uhost)
356{
357 usb_sts_type status = USB_OK;
358 uhost->hch[uhost->ctrl.hch_out].toggle_out ^= 1;
359
360 usbh_ctrl_send_data(uhost, 0, 0, uhost->ctrl.hch_out);
361 uhost->ctrl.state = CONTROL_STATUS_OUT_WAIT;
362
363 return status;
364}
365
372 usb_sts_type usbh_ctrl_status_out_wait_handler(usbh_core_type *uhost, uint32_t timeout)
373{
374 usb_sts_type status = USB_OK;
375 urb_sts_type urb_state;
376 urb_state = uhost->urb_state[uhost->ctrl.hch_out];
377 if(urb_state == URB_DONE)
378 {
379 uhost->ctrl.state = CONTROL_COMPLETE;
380 }
381 else if(urb_state == URB_STALL)
382 {
383 uhost->ctrl.state = CONTROL_STALL;
384 }
385 else if(urb_state == URB_ERROR)
386 {
387 uhost->ctrl.state = CONTROL_ERROR;
388 }
389 else if(urb_state == URB_NOTREADY)
390 {
391 uhost->ctrl.state = CONTROL_STATUS_OUT;
392 }
393 else
394 {
395 /* wait nak timeout 5s*/
396 if(uhost->timer - uhost->ctrl.timer > CTRL_TIMEOUT)
397 {
398 uhost->ctrl.state = CONTROL_ERROR;
399 uhost->ctrl.sts = CTRL_XACTERR;
400 status = USB_ERROR;
401 }
402 }
403 return status;
404}
405
411 usb_sts_type usbh_ctrl_error_handler(usbh_core_type *uhost)
412{
413 usb_sts_type status = USB_WAIT;
414 if(++ uhost->ctrl.err_cnt <= USBH_MAX_ERROR_COUNT)
415 {
416 uhost->ctrl.state = CONTROL_SETUP;
417 }
418 else
419 {
420 uhost->ctrl.sts = CTRL_FAIL;
421 uhost->global_state = USBH_ERROR_STATE;
422 uhost->ctrl.err_cnt = 0;
423 USBH_DEBUG("control error: **** Device No Response ****");
424 status = USB_ERROR;
425 }
426 return status;
427}
428
434 usb_sts_type usbh_ctrl_stall_handler(usbh_core_type *uhost)
435{
436 return USB_NOT_SUPPORT;
437}
438
444 usb_sts_type usbh_ctrl_complete_handler(usbh_core_type *uhost)
445{
446 return USB_OK;
447}
448
454 usb_sts_type usbh_ctrl_transfer_loop(usbh_core_type *uhost)
455{
456 usb_sts_type status = USB_WAIT;
457 static uint32_t timeout = 0;
458 uhost->ctrl.sts = CTRL_START;
459
460 switch(uhost->ctrl.state)
461 {
462 case CONTROL_SETUP:
463 usbh_ctrl_setup_handler(uhost);
464 uhost->ctrl.timer = uhost->timer;
465 break;
466
467 case CONTROL_SETUP_WAIT:
468 usbh_ctrl_setup_wait_handler(uhost, &timeout);
469 break;
470
471 case CONTROL_DATA_IN:
472 usbh_ctrl_data_in_handler(uhost);
473 uhost->ctrl.timer = uhost->timer;
474 break;
475
476 case CONTROL_DATA_IN_WAIT:
477 usbh_ctrl_data_in_wait_handler(uhost, timeout);
478 break;
479
480 case CONTROL_DATA_OUT:
481 usbh_ctrl_data_out_handler(uhost);
482 uhost->ctrl.timer = uhost->timer;
483 break;
484
485 case CONTROL_DATA_OUT_WAIT:
486 usbh_ctrl_data_out_wait_handler(uhost, timeout);
487 break;
488
489 case CONTROL_STATUS_IN:
490 usbh_ctrl_status_in_handler(uhost);
491 uhost->ctrl.timer = uhost->timer;
492 break;
493
494 case CONTROL_STATUS_IN_WAIT:
495 usbh_ctrl_status_in_wait_handler(uhost, timeout);
496 break;
497
498 case CONTROL_STATUS_OUT:
499 usbh_ctrl_status_out_handler(uhost);
500 uhost->ctrl.timer = uhost->timer;
501 break;
502
503 case CONTROL_STATUS_OUT_WAIT:
504 usbh_ctrl_status_out_wait_handler(uhost, timeout);
505 break;
506 case CONTROL_STALL:
507 status = usbh_ctrl_stall_handler(uhost);
508 break;
509 case CONTROL_ERROR:
510 status = usbh_ctrl_error_handler(uhost);
511 break;
512 case CONTROL_COMPLETE:
513 status = usbh_ctrl_complete_handler(uhost);
514 break;
515
516 default:
517 break;
518 }
519
520 return status;
521}
522
530 usb_sts_type usbh_ctrl_request(usbh_core_type *uhost, uint8_t *buffer, uint16_t length)
531{
532 usb_sts_type status = USB_OK;
533 if(uhost->req_state == CMD_SEND)
534 {
535 uhost->req_state = CMD_WAIT;
536 uhost->ctrl.buffer = buffer;
537 uhost->ctrl.len = length;
538 uhost->ctrl.state = CONTROL_SETUP;
539 }
540 return status;
541}
542
552 usb_sts_type usbh_get_descriptor(usbh_core_type *uhost, uint16_t length,
553 uint8_t req_type, uint16_t wvalue,
554 uint8_t *buffer)
555{
556 usb_sts_type status;
557 uhost->ctrl.setup.bmRequestType = USB_DIR_D2H | req_type;
558 uhost->ctrl.setup.bRequest = USB_STD_REQ_GET_DESCRIPTOR;
559 uhost->ctrl.setup.wValue = wvalue;
560 uhost->ctrl.setup.wLength = length;
561
562 if((wvalue & 0xFF00) == ((USB_DESCIPTOR_TYPE_STRING << 8) & 0xFF00))
563 {
564 uhost->ctrl.setup.wIndex = 0x0409;
565 }
566 else
567 {
568 uhost->ctrl.setup.wIndex = 0;
569 }
570
571 status = usbh_ctrl_request(uhost, buffer, length);
572 return status;
573}
574
582void usbh_parse_dev_desc(usbh_core_type *uhost, uint8_t *buffer, uint16_t length)
583{
584 usbh_dev_desc_type *desc = &(uhost->dev);
585
586 desc->dev_desc.bLength = *(uint8_t *)(buffer + 0);
587 desc->dev_desc.bDescriptorType = *(uint8_t *)(buffer + 1);
588 desc->dev_desc.bcdUSB = SWAPBYTE(buffer + 2);
589 desc->dev_desc.bDeviceClass = *(uint8_t *)(buffer + 4);
590 desc->dev_desc.bDeviceSubClass = *(uint8_t *)(buffer + 5);
591 desc->dev_desc.bDeviceProtocol = *(uint8_t *)(buffer + 6);
592 desc->dev_desc.bMaxPacketSize0 = *(uint8_t *)(buffer + 7);
593
594 if(length > 8)
595 {
596 desc->dev_desc.idVendor = SWAPBYTE(buffer + 8);
597 desc->dev_desc.idProduct = SWAPBYTE(buffer + 10);
598 desc->dev_desc.bcdDevice = SWAPBYTE(buffer + 12);
599 desc->dev_desc.iManufacturer = *(uint8_t *)(buffer + 14);
600 desc->dev_desc.iProduct = *(uint8_t *)(buffer + 15);
601 desc->dev_desc.iSerialNumber = *(uint8_t *)(buffer + 16);
602 desc->dev_desc.bNumConfigurations = *(uint8_t *)(buffer + 17);
603 }
604}
605
612 usb_header_desc_type *usbh_get_next_header(uint8_t *buf, uint16_t *index_len)
613{
614 *index_len += ((usb_header_desc_type *)buf)->bLength;
615 return (usb_header_desc_type *)
616 ((uint8_t *)buf + ((usb_header_desc_type *)buf)->bLength);
617}
618
625void usbh_parse_interface_desc(usb_interface_desc_type *intf, uint8_t *buf)
626{
627 intf->bLength = *(uint8_t *)buf;
628 intf->bDescriptorType = *(uint8_t *)(buf + 1);
629 intf->bInterfaceNumber = *(uint8_t *)(buf + 2);
630 intf->bAlternateSetting = *(uint8_t *)(buf + 3);
631 intf->bNumEndpoints = *(uint8_t *)(buf + 4);
632 intf->bInterfaceClass = *(uint8_t *)(buf + 5);
633 intf->bInterfaceSubClass = *(uint8_t *)(buf + 6);
634 intf->bInterfaceProtocol = *(uint8_t *)(buf + 7);
635 intf->iInterface = *(uint8_t *)(buf + 8);
636}
637
644void usbh_parse_endpoint_desc(usb_endpoint_desc_type *ept_desc, uint8_t *buf)
645{
646 ept_desc->bLength = *(uint8_t *)(buf + 0);
647 ept_desc->bDescriptorType = *(uint8_t *)(buf + 1);
648 ept_desc->bEndpointAddress = *(uint8_t *)(buf + 2);
649 ept_desc->bmAttributes = *(uint8_t *)(buf + 3);
650 ept_desc->wMaxPacketSize = SWAPBYTE(buf + 4);
651 ept_desc->bInterval = *(uint8_t *)(buf + 6);
652}
653
661 usb_sts_type usbh_parse_configure_desc(usbh_core_type *uhost,
662 uint8_t *buffer, uint16_t length)
663{
664 usb_cfg_desc_type *cfg_desc = &(uhost->dev.cfg_desc);
665 usb_interface_desc_type *intf_desc;
666 usb_endpoint_desc_type *ept_desc;
667 usb_header_desc_type *desc;
668 uint16_t index_len;
669 uint8_t index_intf = 0;
670 uint8_t index_ept = 0;
671
672 desc = (usb_header_desc_type *)buffer;
673 cfg_desc->cfg.bLength = *(uint8_t *)buffer;
674 cfg_desc->cfg.bDescriptorType = *(uint8_t *)(buffer + 1);
675 cfg_desc->cfg.wTotalLength = SWAPBYTE(buffer + 2);
676 cfg_desc->cfg.bNumInterfaces = *(uint8_t *)(buffer + 4);
677 cfg_desc->cfg.bConfigurationValue = *(uint8_t *)(buffer + 5);
678 cfg_desc->cfg.iConfiguration = *(uint8_t *)(buffer + 6);
679 cfg_desc->cfg.bmAttributes = *(uint8_t *)(buffer + 7);
680 cfg_desc->cfg.bMaxPower = *(uint8_t *)(buffer + 8);
681
682 if(length > USB_DEVICE_CFG_DESC_LEN)
683 {
684 index_len = USB_DEVICE_CFG_DESC_LEN;
685
686 while((index_intf < USBH_MAX_INTERFACE) && index_len < cfg_desc->cfg.wTotalLength)
687 {
688 desc = usbh_get_next_header((uint8_t *)desc, &index_len);
689 if(desc->bDescriptorType == USB_DESCIPTOR_TYPE_INTERFACE)
690 {
691 index_ept = 0;
692 intf_desc = &cfg_desc->interface[index_intf].interface;
693 usbh_parse_interface_desc(intf_desc, (uint8_t *)desc);
694
695 while(index_ept < intf_desc->bNumEndpoints && index_len < cfg_desc->cfg.wTotalLength)
696 {
697 desc = usbh_get_next_header((uint8_t *)desc, &index_len);
698 if(desc->bDescriptorType == USB_DESCIPTOR_TYPE_ENDPOINT)
699 {
700 ept_desc = &(cfg_desc->interface[index_intf].endpoint[index_ept]);
701 usbh_parse_endpoint_desc(ept_desc, (uint8_t *)desc);
702 index_ept ++;
703 }
704 }
705 index_intf ++;
706 }
707 }
708 }
709 return USB_OK;
710}
711
720uint8_t usbh_find_interface(usbh_core_type *uhost, uint8_t class_code, uint8_t sub_class, uint8_t protocol)
721{
722 uint8_t idx = 0;
723 usb_itf_desc_type *usbitf;
724 for(idx = 0; idx < uhost->dev.cfg_desc.cfg.bNumInterfaces; idx ++)
725 {
726 usbitf = &uhost->dev.cfg_desc.interface[idx];
727 if(((usbitf->interface.bInterfaceClass == class_code) || (class_code == 0xFF)) &&
728 ((usbitf->interface.bInterfaceSubClass == sub_class) || (sub_class == 0xFF)) &&
729 ((usbitf->interface.bInterfaceProtocol == protocol) || (protocol == 0xFF))
730 )
731 {
732 return idx;
733 }
734 }
735 return 0xFF;
736}
737
745void usbh_parse_string_desc(uint8_t *src, uint8_t *dest, uint16_t length)
746{
747 uint16_t len;
748 uint16_t i_index;
749
750 if(src[1] == USB_DESCIPTOR_TYPE_STRING)
751 {
752 len = ((src[0] - 2) <= length ? (src[0] - 2) : length);
753 src += 2;
754 for(i_index = 0; i_index < len; i_index += 2)
755 {
756 *dest = src[i_index];
757 dest ++;
758 }
759 *dest = 0;
760 }
761}
762
769 usb_sts_type usbh_get_device_descriptor(usbh_core_type *uhost, uint16_t length)
770{
771 usb_sts_type status = USB_WAIT;
772 uint8_t bm_req;
773 uint16_t wvalue;
774
775 bm_req = USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD;
776 wvalue = (USB_DESCIPTOR_TYPE_DEVICE << 8) & 0xFF00;
777
778 status = usbh_get_descriptor(uhost, length, bm_req,
779 wvalue, uhost->rx_buffer);
780 return status;
781}
782
789 usb_sts_type usbh_get_configure_descriptor(usbh_core_type *uhost, uint16_t length)
790{
791 usb_sts_type status = USB_WAIT;
792 uint8_t bm_req;
793 uint16_t wvalue;
794
795 bm_req = USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD;
796 wvalue = (USB_DESCIPTOR_TYPE_CONFIGURATION << 8) & 0xFF00;
797
798 status = usbh_get_descriptor(uhost, length, bm_req,
799 wvalue, uhost->rx_buffer);
800
801 return status;
802}
803
812 usb_sts_type usbh_get_sting_descriptor(usbh_core_type *uhost, uint8_t string_id,
813 uint8_t *buffer, uint16_t length)
814{
815 usb_sts_type status = USB_WAIT;
816 uint8_t bm_req;
817 uint16_t wvalue;
818
819 bm_req = USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD;
820 wvalue = (USB_DESCIPTOR_TYPE_STRING << 8) | string_id;
821
822 status = usbh_get_descriptor(uhost, length, bm_req,
823 wvalue, uhost->rx_buffer);
824
825 return status;
826}
827
834 usb_sts_type usbh_set_configuration(usbh_core_type *uhost, uint16_t config)
835{
836 usb_sts_type status = USB_WAIT;
837 uint8_t bm_req;
838 bm_req = USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD;
839
840 uhost->ctrl.setup.bmRequestType = USB_DIR_H2D | bm_req;
841 uhost->ctrl.setup.bRequest = USB_STD_REQ_SET_CONFIGURATION;
842 uhost->ctrl.setup.wValue = config;
843 uhost->ctrl.setup.wLength = 0;
844 uhost->ctrl.setup.wIndex = 0;
845 status = usbh_ctrl_request(uhost, 0, 0);
846 return status;
847}
848
855 usb_sts_type usbh_set_address(usbh_core_type *uhost, uint8_t address)
856{
857 usb_sts_type status = USB_WAIT;
858 uint8_t bm_req;
859 bm_req = USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD;
860
861 uhost->ctrl.setup.bmRequestType = USB_DIR_H2D | bm_req;
862 uhost->ctrl.setup.bRequest = USB_STD_REQ_SET_ADDRESS;
863 uhost->ctrl.setup.wValue = (uint16_t)address;
864 uhost->ctrl.setup.wLength = 0;
865 uhost->ctrl.setup.wIndex = 0;
866 status = usbh_ctrl_request(uhost, 0, 0);
867 return status;
868}
869
877 usb_sts_type usbh_set_interface(usbh_core_type *uhost, uint8_t ept_num, uint8_t altsetting)
878{
879 usb_sts_type status = USB_WAIT;
880 uint8_t bm_req;
881 bm_req = USB_REQ_RECIPIENT_INTERFACE | USB_REQ_TYPE_STANDARD;
882
883 uhost->ctrl.setup.bmRequestType = USB_DIR_H2D | bm_req;
884 uhost->ctrl.setup.bRequest = USB_STD_REQ_SET_INTERFACE;
885 uhost->ctrl.setup.wValue = (uint16_t)altsetting;
886 uhost->ctrl.setup.wLength = 0;
887 uhost->ctrl.setup.wIndex = ept_num;
888 status = usbh_ctrl_request(uhost, 0, 0);
889 return status;
890}
891
899 usb_sts_type usbh_set_feature(usbh_core_type *uhost, uint8_t feature, uint16_t index)
900{
901 usb_sts_type status = USB_WAIT;
902 uint8_t bm_req;
903 bm_req = USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD;
904
905 uhost->ctrl.setup.bmRequestType = USB_DIR_H2D | bm_req;
906 uhost->ctrl.setup.bRequest = USB_STD_REQ_SET_FEATURE;
907 uhost->ctrl.setup.wValue = (uint16_t)feature;
908 uhost->ctrl.setup.wLength = 0;
909 uhost->ctrl.setup.wIndex = index;
910 status = usbh_ctrl_request(uhost, 0, 0);
911 return status;
912}
913
914
922 usb_sts_type usbh_clear_dev_feature(usbh_core_type *uhost, uint8_t feature, uint16_t index)
923{
924 usb_sts_type status = USB_WAIT;
925 uint8_t bm_req;
926 bm_req = USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD;
927
928 uhost->ctrl.setup.bmRequestType = USB_DIR_H2D | bm_req;
929 uhost->ctrl.setup.bRequest = USB_STD_REQ_CLEAR_FEATURE;
930 uhost->ctrl.setup.wValue = (uint16_t)feature;
931 uhost->ctrl.setup.wLength = 0;
932 uhost->ctrl.setup.wIndex = index;
933 status = usbh_ctrl_request(uhost, 0, 0);
934 return status;
935}
936
944 usb_sts_type usbh_clear_ept_feature(usbh_core_type *uhost, uint8_t ept_num, uint8_t hc_num)
945{
946 usb_sts_type status = USB_WAIT;
947 uint8_t bm_req;
948 if(uhost->ctrl.state == CONTROL_IDLE )
949 {
950 bm_req = USB_REQ_RECIPIENT_ENDPOINT | USB_REQ_TYPE_STANDARD;
951
952 uhost->ctrl.setup.bmRequestType = USB_DIR_H2D | bm_req;
953 uhost->ctrl.setup.bRequest = USB_STD_REQ_CLEAR_FEATURE;
954 uhost->ctrl.setup.wValue = USB_FEATURE_EPT_HALT;
955 uhost->ctrl.setup.wLength = 0;
956 uhost->ctrl.setup.wIndex = ept_num;
957 usbh_ctrl_request(uhost, 0, 0);
958 }
959 if(usbh_ctrl_result_check(uhost, CONTROL_IDLE, ENUM_IDLE) == USB_OK)
960 {
961 status = USB_OK;
962 }
963 return status;
964}
965
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
idx
uint32_t idx
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:46
USBH_DEBUG
#define USBH_DEBUG(...)
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:206
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
USB_STD_REQ_CLEAR_FEATURE
#define USB_STD_REQ_CLEAR_FEATURE
Definition: usb_std.h:78
USB_STD_REQ_SET_CONFIGURATION
#define USB_STD_REQ_SET_CONFIGURATION
Definition: usb_std.h:84
USB_REQ_TYPE_STANDARD
#define USB_REQ_TYPE_STANDARD
usb request type
Definition: usb_std.h:63
USB_DESCIPTOR_TYPE_CONFIGURATION
#define USB_DESCIPTOR_TYPE_CONFIGURATION
Definition: usb_std.h:93
USB_STD_REQ_GET_DESCRIPTOR
#define USB_STD_REQ_GET_DESCRIPTOR
Definition: usb_std.h:81
USB_STD_REQ_SET_ADDRESS
#define USB_STD_REQ_SET_ADDRESS
Definition: usb_std.h:80
USB_STD_REQ_SET_FEATURE
#define USB_STD_REQ_SET_FEATURE
Definition: usb_std.h:79
USB_DESCIPTOR_TYPE_ENDPOINT
#define USB_DESCIPTOR_TYPE_ENDPOINT
Definition: usb_std.h:96
SWAPBYTE
#define SWAPBYTE(addr)
usb swap address
Definition: usb_std.h:247
USB_DEVICE_CFG_DESC_LEN
#define USB_DEVICE_CFG_DESC_LEN
Definition: usb_std.h:151
USB_DESCIPTOR_TYPE_DEVICE
#define USB_DESCIPTOR_TYPE_DEVICE
usb standard device type
Definition: usb_std.h:92
USB_REQ_RECIPIENT_DEVICE
#define USB_REQ_RECIPIENT_DEVICE
usb request recipient
Definition: usb_std.h:54
USB_FEATURE_EPT_HALT
#define USB_FEATURE_EPT_HALT
usb standard feature selectors
Definition: usb_std.h:120
USB_DESCIPTOR_TYPE_STRING
#define USB_DESCIPTOR_TYPE_STRING
Definition: usb_std.h:94
USB_STD_REQ_SET_INTERFACE
#define USB_STD_REQ_SET_INTERFACE
Definition: usb_std.h:86
USB_DESCIPTOR_TYPE_INTERFACE
#define USB_DESCIPTOR_TYPE_INTERFACE
Definition: usb_std.h:95
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
USB_REQ_RECIPIENT_ENDPOINT
#define USB_REQ_RECIPIENT_ENDPOINT
Definition: usb_std.h:56
USB_REQ_RECIPIENT_INTERFACE
#define USB_REQ_RECIPIENT_INTERFACE
Definition: usb_std.h:55
USB_OK
@ USB_OK
Definition: usb_std.h:268
USB_WAIT
@ USB_WAIT
Definition: usb_std.h:270
USB_ERROR
@ USB_ERROR
Definition: usb_std.h:272
USB_NOT_SUPPORT
@ USB_NOT_SUPPORT
Definition: usb_std.h:271
usbh_ctrl_result_check
usb_sts_type usbh_ctrl_result_check(usbh_core_type *uhost, ctrl_ept0_sts_type next_ctrl_state, uint8_t next_enum_state)
usb wait control setup complete
Definition: usbh_core.c:724
usbh_in_out_request
usb_sts_type usbh_in_out_request(usbh_core_type *uhost, uint8_t hc_num)
usb host in out request
Definition: usbh_core.c:115
usbh_set_configuration
usb_sts_type usbh_set_configuration(usbh_core_type *uhost, uint16_t config)
usb host set configurtion
Definition: usbh_ctrl.c:834
usbh_ctrl_stall_handler
usb_sts_type usbh_ctrl_stall_handler(usbh_core_type *uhost)
usb host control stall handler
Definition: usbh_ctrl.c:434
usbh_get_next_header
usb_header_desc_type * usbh_get_next_header(uint8_t *buf, uint16_t *index_len)
usb host get next header
Definition: usbh_ctrl.c:612
usbh_ctrl_data_out_wait_handler
usb_sts_type usbh_ctrl_data_out_wait_handler(usbh_core_type *uhost, uint32_t timeout)
usb host control data out wait handler
Definition: usbh_ctrl.c:263
usbh_ctrl_data_in_handler
usb_sts_type usbh_ctrl_data_in_handler(usbh_core_type *uhost)
usb host control data in request handler
Definition: usbh_ctrl.c:190
usbh_ctrl_setup_handler
usb_sts_type usbh_ctrl_setup_handler(usbh_core_type *uhost)
usb host control setup request handler
Definition: usbh_ctrl.c:117
usbh_ctrl_transfer_loop
usb_sts_type usbh_ctrl_transfer_loop(usbh_core_type *uhost)
usb host control transfer loop function
Definition: usbh_ctrl.c:454
usbh_clear_dev_feature
usb_sts_type usbh_clear_dev_feature(usbh_core_type *uhost, uint8_t feature, uint16_t index)
usb host clear device feature
Definition: usbh_ctrl.c:922
usbh_get_device_descriptor
usb_sts_type usbh_get_device_descriptor(usbh_core_type *uhost, uint16_t length)
usb host get device descriptor
Definition: usbh_ctrl.c:769
usbh_ctrl_request
usb_sts_type usbh_ctrl_request(usbh_core_type *uhost, uint8_t *buffer, uint16_t length)
usb host control request
Definition: usbh_ctrl.c:530
usbh_parse_string_desc
void usbh_parse_string_desc(uint8_t *src, uint8_t *dest, uint16_t length)
usbh parse string descriptor
Definition: usbh_ctrl.c:745
usbh_get_descriptor
usb_sts_type usbh_get_descriptor(usbh_core_type *uhost, uint16_t length, uint8_t req_type, uint16_t wvalue, uint8_t *buffer)
usb host get device descriptor
Definition: usbh_ctrl.c:552
usbh_ctrl_send_data
usb_sts_type usbh_ctrl_send_data(usbh_core_type *uhost, uint8_t *buffer, uint8_t length, uint16_t hc_num)
usb host control send data packet
Definition: usbh_ctrl.c:90
usbh_parse_interface_desc
void usbh_parse_interface_desc(usb_interface_desc_type *intf, uint8_t *buf)
usb host parse interface descriptor
Definition: usbh_ctrl.c:625
usbh_ctrl_send_setup
usb_sts_type usbh_ctrl_send_setup(usbh_core_type *uhost, uint8_t *buffer, uint8_t hc_num)
usb host control send setup packet
Definition: usbh_ctrl.c:53
usbh_ctrl_data_out_handler
usb_sts_type usbh_ctrl_data_out_handler(usbh_core_type *uhost)
usb host control data out request handler
Definition: usbh_ctrl.c:244
usbh_ctrl_recv_data
usb_sts_type usbh_ctrl_recv_data(usbh_core_type *uhost, uint8_t *buffer, uint8_t length, uint16_t hc_num)
usb host control receive data from device
Definition: usbh_ctrl.c:71
usbh_find_interface
uint8_t usbh_find_interface(usbh_core_type *uhost, uint8_t class_code, uint8_t sub_class, uint8_t protocol)
usb host find interface
Definition: usbh_ctrl.c:720
usbh_clear_ept_feature
usb_sts_type usbh_clear_ept_feature(usbh_core_type *uhost, uint8_t ept_num, uint8_t hc_num)
usb host clear endpoint feature
Definition: usbh_ctrl.c:944
usbh_ctrl_status_in_wait_handler
usb_sts_type usbh_ctrl_status_in_wait_handler(usbh_core_type *uhost, uint32_t timeout)
usb host control status data in wait handler
Definition: usbh_ctrl.c:319
usbh_set_interface
usb_sts_type usbh_set_interface(usbh_core_type *uhost, uint8_t ept_num, uint8_t altsetting)
usb host set interface
Definition: usbh_ctrl.c:877
usbh_ctrl_error_handler
usb_sts_type usbh_ctrl_error_handler(usbh_core_type *uhost)
usb host control error handler
Definition: usbh_ctrl.c:411
usbh_parse_dev_desc
void usbh_parse_dev_desc(usbh_core_type *uhost, uint8_t *buffer, uint16_t length)
usb host parse device descriptor
Definition: usbh_ctrl.c:582
usbh_ctrl_status_in_handler
usb_sts_type usbh_ctrl_status_in_handler(usbh_core_type *uhost)
usb host control status data in handler
Definition: usbh_ctrl.c:302
usbh_ctrl_status_out_wait_handler
usb_sts_type usbh_ctrl_status_out_wait_handler(usbh_core_type *uhost, uint32_t timeout)
usb host control status data out wait handler
Definition: usbh_ctrl.c:372
usbh_parse_configure_desc
usb_sts_type usbh_parse_configure_desc(usbh_core_type *uhost, uint8_t *buffer, uint16_t length)
usb host parse configure descriptor
Definition: usbh_ctrl.c:661
usbh_ctrl_complete_handler
usb_sts_type usbh_ctrl_complete_handler(usbh_core_type *uhost)
usb host control complete handler
Definition: usbh_ctrl.c:444
usbh_get_configure_descriptor
usb_sts_type usbh_get_configure_descriptor(usbh_core_type *uhost, uint16_t length)
usb host get configure descriptor
Definition: usbh_ctrl.c:789
CTRL_TIMEOUT
#define CTRL_TIMEOUT
Definition: usbh_ctrl.c:44
usbh_set_address
usb_sts_type usbh_set_address(usbh_core_type *uhost, uint8_t address)
usb host set device address
Definition: usbh_ctrl.c:855
usbh_parse_endpoint_desc
void usbh_parse_endpoint_desc(usb_endpoint_desc_type *ept_desc, uint8_t *buf)
usb host parse endpoint descriptor
Definition: usbh_ctrl.c:644
usbh_ctrl_status_out_handler
usb_sts_type usbh_ctrl_status_out_handler(usbh_core_type *uhost)
usb host control status data out wait handler
Definition: usbh_ctrl.c:355
usbh_get_sting_descriptor
usb_sts_type usbh_get_sting_descriptor(usbh_core_type *uhost, uint8_t string_id, uint8_t *buffer, uint16_t length)
usb host get string descriptor
Definition: usbh_ctrl.c:812
usbh_ctrl_data_in_wait_handler
usb_sts_type usbh_ctrl_data_in_wait_handler(usbh_core_type *uhost, uint32_t timeout)
usb host control data in wait handler
Definition: usbh_ctrl.c:207
usbh_set_feature
usb_sts_type usbh_set_feature(usbh_core_type *uhost, uint8_t feature, uint16_t index)
usb host set feature
Definition: usbh_ctrl.c:899
usbh_ctrl_setup_wait_handler
usb_sts_type usbh_ctrl_setup_wait_handler(usbh_core_type *uhost, uint32_t *timeout)
usb host control setup request wait handler
Definition: usbh_ctrl.c:131
usb_endpoint_desc_type
format of standard endpoint descriptor
Definition: usb_std.h:351
usb_endpoint_desc_type::bDescriptorType
uint8_t bDescriptorType
Definition: usb_std.h:353
usb_endpoint_desc_type::bInterval
uint8_t bInterval
Definition: usb_std.h:357
usb_endpoint_desc_type::bEndpointAddress
uint8_t bEndpointAddress
Definition: usb_std.h:354
usb_endpoint_desc_type::bmAttributes
uint8_t bmAttributes
Definition: usb_std.h:355
usb_endpoint_desc_type::wMaxPacketSize
uint16_t wMaxPacketSize
Definition: usb_std.h:356
usb_endpoint_desc_type::bLength
uint8_t bLength
Definition: usb_std.h:352
usb_header_desc_type
format of header
Definition: usb_std.h:364
usb_header_desc_type::bLength
uint8_t bLength
Definition: usb_std.h:365
usb_interface_desc_type
format of standard interface descriptor
Definition: usb_std.h:335
usb_interface_desc_type::bInterfaceNumber
uint8_t bInterfaceNumber
Definition: usb_std.h:338
usb_interface_desc_type::bAlternateSetting
uint8_t bAlternateSetting
Definition: usb_std.h:339
usb_interface_desc_type::bNumEndpoints
uint8_t bNumEndpoints
Definition: usb_std.h:340
usb_interface_desc_type::bInterfaceProtocol
uint8_t bInterfaceProtocol
Definition: usb_std.h:343
usb_interface_desc_type::bInterfaceClass
uint8_t bInterfaceClass
Definition: usb_std.h:341
usb_interface_desc_type::bInterfaceSubClass
uint8_t bInterfaceSubClass
Definition: usb_std.h:342
usb_interface_desc_type::bLength
uint8_t bLength
Definition: usb_std.h:336
usb_interface_desc_type::iInterface
uint8_t iInterface
Definition: usb_std.h:344
usb_interface_desc_type::bDescriptorType
uint8_t bDescriptorType
Definition: usb_std.h:337
usb_std.h
usb standard header file
usbh_core.h
usb host core header file
usbh_ctrl.h
usb header file


AT32F435/437 Firmwary Library: usbh_ctrl.h Source File

  • middlewares
  • usb_drivers
  • inc
usbh_ctrl.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USBH_CTRL_H
29#define __USBH_CTRL_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
36/* includes ------------------------------------------------------------------*/
37#include "usb_conf.h"
38#include "usbh_core.h"
39
52 usb_sts_type usbh_ctrl_send_setup(usbh_core_type *uhost, uint8_t *buffer, uint8_t hc_num);
53 usb_sts_type usbh_ctrl_recv_data(usbh_core_type *uhost, uint8_t *buffer,
54 uint8_t length, uint16_t hc_num);
55 usb_sts_type usbh_ctrl_send_data(usbh_core_type *uhost, uint8_t *buffer,
56 uint8_t length, uint16_t hc_num);
57 usb_sts_type usbh_ctrl_setup_handler(usbh_core_type *uhost);
58 usb_sts_type usbh_ctrl_setup_wait_handler(usbh_core_type *uhost, uint32_t *timeout);
59 usb_sts_type usbh_ctrl_data_in_handler(usbh_core_type *uhost);
60 usb_sts_type usbh_ctrl_data_in_wait_handler(usbh_core_type *uhost, uint32_t timeout);
61 usb_sts_type usbh_ctrl_data_out_handler(usbh_core_type *uhost);
62 usb_sts_type usbh_ctrl_data_out_wait_handler(usbh_core_type *uhost, uint32_t timeout);
63 usb_sts_type usbh_ctrl_status_in_handler(usbh_core_type *uhost);
64 usb_sts_type usbh_ctrl_status_in_wait_handler(usbh_core_type *uhost, uint32_t timeout);
65 usb_sts_type usbh_ctrl_status_out_handler(usbh_core_type *uhost);
66 usb_sts_type usbh_ctrl_status_out_wait_handler(usbh_core_type *uhost, uint32_t timeout);
67 usb_sts_type usbh_ctrl_error_handler(usbh_core_type *uhost);
68 usb_sts_type usbh_ctrl_stall_handler(usbh_core_type *uhost);
69 usb_sts_type usbh_ctrl_complete_handler(usbh_core_type *uhost);
70 usb_sts_type usbh_ctrl_transfer_loop(usbh_core_type *uhost);
71 usb_sts_type usbh_ctrl_request(usbh_core_type *uhost, uint8_t *buffer, uint16_t length);
72 usb_sts_type usbh_get_descriptor(usbh_core_type *uhost, uint16_t length,
73 uint8_t req_type, uint16_t wvalue,
74 uint8_t *buffer);
75void usbh_parse_dev_desc(usbh_core_type *uhost, uint8_t *buffer, uint16_t length);
76 usb_header_desc_type *usbh_get_next_header(uint8_t *buf, uint16_t *index_len);
77void usbh_parse_interface_desc(usb_interface_desc_type *intf, uint8_t *buf);
78void usbh_parse_endpoint_desc(usb_endpoint_desc_type *ept_desc, uint8_t *buf);
79 usb_sts_type usbh_parse_configure_desc(usbh_core_type *uhost,
80 uint8_t *buffer, uint16_t length);
81uint8_t usbh_find_interface(usbh_core_type *uhost, uint8_t class_code, uint8_t sub_class, uint8_t protocol);
82void usbh_parse_string_desc(uint8_t *src, uint8_t *dest, uint16_t length);
83 usb_sts_type usbh_get_device_descriptor(usbh_core_type *uhost, uint16_t length);
84 usb_sts_type usbh_get_configure_descriptor(usbh_core_type *uhost, uint16_t length);
85 usb_sts_type usbh_get_sting_descriptor(usbh_core_type *uhost, uint8_t string_id,
86 uint8_t *buffer, uint16_t length);
87 usb_sts_type usbh_set_configuration(usbh_core_type *uhost, uint16_t config);
88 usb_sts_type usbh_set_address(usbh_core_type *uhost, uint8_t address);
89 usb_sts_type usbh_set_interface(usbh_core_type *uhost, uint8_t ept_num, uint8_t altsetting);
90 usb_sts_type usbh_set_feature(usbh_core_type *uhost, uint8_t feature, uint16_t index);
91 usb_sts_type usbh_clear_dev_feature(usbh_core_type *uhost, uint8_t feature, uint16_t index);
92 usb_sts_type usbh_clear_ept_feature(usbh_core_type *uhost, uint8_t ept_num, uint8_t hc_num);
93
105#ifdef __cplusplus
106}
107#endif
108
109#endif
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
usbh_set_configuration
usb_sts_type usbh_set_configuration(usbh_core_type *uhost, uint16_t config)
usb host set configurtion
Definition: usbh_ctrl.c:834
usbh_ctrl_stall_handler
usb_sts_type usbh_ctrl_stall_handler(usbh_core_type *uhost)
usb host control stall handler
Definition: usbh_ctrl.c:434
usbh_get_next_header
usb_header_desc_type * usbh_get_next_header(uint8_t *buf, uint16_t *index_len)
usb host get next header
Definition: usbh_ctrl.c:612
usbh_ctrl_data_out_wait_handler
usb_sts_type usbh_ctrl_data_out_wait_handler(usbh_core_type *uhost, uint32_t timeout)
usb host control data out wait handler
Definition: usbh_ctrl.c:263
usbh_ctrl_data_in_handler
usb_sts_type usbh_ctrl_data_in_handler(usbh_core_type *uhost)
usb host control data in request handler
Definition: usbh_ctrl.c:190
usbh_ctrl_setup_handler
usb_sts_type usbh_ctrl_setup_handler(usbh_core_type *uhost)
usb host control setup request handler
Definition: usbh_ctrl.c:117
usbh_ctrl_transfer_loop
usb_sts_type usbh_ctrl_transfer_loop(usbh_core_type *uhost)
usb host control transfer loop function
Definition: usbh_ctrl.c:454
usbh_clear_dev_feature
usb_sts_type usbh_clear_dev_feature(usbh_core_type *uhost, uint8_t feature, uint16_t index)
usb host clear device feature
Definition: usbh_ctrl.c:922
usbh_get_device_descriptor
usb_sts_type usbh_get_device_descriptor(usbh_core_type *uhost, uint16_t length)
usb host get device descriptor
Definition: usbh_ctrl.c:769
usbh_ctrl_request
usb_sts_type usbh_ctrl_request(usbh_core_type *uhost, uint8_t *buffer, uint16_t length)
usb host control request
Definition: usbh_ctrl.c:530
usbh_parse_string_desc
void usbh_parse_string_desc(uint8_t *src, uint8_t *dest, uint16_t length)
usbh parse string descriptor
Definition: usbh_ctrl.c:745
usbh_get_descriptor
usb_sts_type usbh_get_descriptor(usbh_core_type *uhost, uint16_t length, uint8_t req_type, uint16_t wvalue, uint8_t *buffer)
usb host get device descriptor
Definition: usbh_ctrl.c:552
usbh_ctrl_send_data
usb_sts_type usbh_ctrl_send_data(usbh_core_type *uhost, uint8_t *buffer, uint8_t length, uint16_t hc_num)
usb host control send data packet
Definition: usbh_ctrl.c:90
usbh_parse_interface_desc
void usbh_parse_interface_desc(usb_interface_desc_type *intf, uint8_t *buf)
usb host parse interface descriptor
Definition: usbh_ctrl.c:625
usbh_ctrl_send_setup
usb_sts_type usbh_ctrl_send_setup(usbh_core_type *uhost, uint8_t *buffer, uint8_t hc_num)
usb host control send setup packet
Definition: usbh_ctrl.c:53
usbh_ctrl_data_out_handler
usb_sts_type usbh_ctrl_data_out_handler(usbh_core_type *uhost)
usb host control data out request handler
Definition: usbh_ctrl.c:244
usbh_ctrl_recv_data
usb_sts_type usbh_ctrl_recv_data(usbh_core_type *uhost, uint8_t *buffer, uint8_t length, uint16_t hc_num)
usb host control receive data from device
Definition: usbh_ctrl.c:71
usbh_find_interface
uint8_t usbh_find_interface(usbh_core_type *uhost, uint8_t class_code, uint8_t sub_class, uint8_t protocol)
usb host find interface
Definition: usbh_ctrl.c:720
usbh_clear_ept_feature
usb_sts_type usbh_clear_ept_feature(usbh_core_type *uhost, uint8_t ept_num, uint8_t hc_num)
usb host clear endpoint feature
Definition: usbh_ctrl.c:944
usbh_ctrl_status_in_wait_handler
usb_sts_type usbh_ctrl_status_in_wait_handler(usbh_core_type *uhost, uint32_t timeout)
usb host control status data in wait handler
Definition: usbh_ctrl.c:319
usbh_set_interface
usb_sts_type usbh_set_interface(usbh_core_type *uhost, uint8_t ept_num, uint8_t altsetting)
usb host set interface
Definition: usbh_ctrl.c:877
usbh_ctrl_error_handler
usb_sts_type usbh_ctrl_error_handler(usbh_core_type *uhost)
usb host control error handler
Definition: usbh_ctrl.c:411
usbh_parse_dev_desc
void usbh_parse_dev_desc(usbh_core_type *uhost, uint8_t *buffer, uint16_t length)
usb host parse device descriptor
Definition: usbh_ctrl.c:582
usbh_ctrl_status_in_handler
usb_sts_type usbh_ctrl_status_in_handler(usbh_core_type *uhost)
usb host control status data in handler
Definition: usbh_ctrl.c:302
usbh_ctrl_status_out_wait_handler
usb_sts_type usbh_ctrl_status_out_wait_handler(usbh_core_type *uhost, uint32_t timeout)
usb host control status data out wait handler
Definition: usbh_ctrl.c:372
usbh_parse_configure_desc
usb_sts_type usbh_parse_configure_desc(usbh_core_type *uhost, uint8_t *buffer, uint16_t length)
usb host parse configure descriptor
Definition: usbh_ctrl.c:661
usbh_ctrl_complete_handler
usb_sts_type usbh_ctrl_complete_handler(usbh_core_type *uhost)
usb host control complete handler
Definition: usbh_ctrl.c:444
usbh_get_configure_descriptor
usb_sts_type usbh_get_configure_descriptor(usbh_core_type *uhost, uint16_t length)
usb host get configure descriptor
Definition: usbh_ctrl.c:789
usbh_set_address
usb_sts_type usbh_set_address(usbh_core_type *uhost, uint8_t address)
usb host set device address
Definition: usbh_ctrl.c:855
usbh_parse_endpoint_desc
void usbh_parse_endpoint_desc(usb_endpoint_desc_type *ept_desc, uint8_t *buf)
usb host parse endpoint descriptor
Definition: usbh_ctrl.c:644
usbh_ctrl_status_out_handler
usb_sts_type usbh_ctrl_status_out_handler(usbh_core_type *uhost)
usb host control status data out wait handler
Definition: usbh_ctrl.c:355
usbh_get_sting_descriptor
usb_sts_type usbh_get_sting_descriptor(usbh_core_type *uhost, uint8_t string_id, uint8_t *buffer, uint16_t length)
usb host get string descriptor
Definition: usbh_ctrl.c:812
usbh_ctrl_data_in_wait_handler
usb_sts_type usbh_ctrl_data_in_wait_handler(usbh_core_type *uhost, uint32_t timeout)
usb host control data in wait handler
Definition: usbh_ctrl.c:207
usbh_set_feature
usb_sts_type usbh_set_feature(usbh_core_type *uhost, uint8_t feature, uint16_t index)
usb host set feature
Definition: usbh_ctrl.c:899
usbh_ctrl_setup_wait_handler
usb_sts_type usbh_ctrl_setup_wait_handler(usbh_core_type *uhost, uint32_t *timeout)
usb host control setup request wait handler
Definition: usbh_ctrl.c:131
usb_endpoint_desc_type
format of standard endpoint descriptor
Definition: usb_std.h:351
usb_header_desc_type
format of header
Definition: usb_std.h:364
usb_interface_desc_type
format of standard interface descriptor
Definition: usb_std.h:335
usbh_core.h
usb host core header file


AT32F435/437 Firmwary Library: usbh_hid_class.c Source File

  • middlewares
  • usbh_class
  • usbh_hid
usbh_hid_class.c
Go to the documentation of this file.
1
26 #include "usbh_hid_class.h"
27 #include "usb_conf.h"
28 #include "usbh_core.h"
29 #include "usbh_ctrl.h"
30 #include "usbh_hid_mouse.h"
31 #include "usbh_hid_keyboard.h"
32
46 static usb_sts_type uhost_init_handler(void *uhost);
47 static usb_sts_type uhost_reset_handler(void *uhost);
48 static usb_sts_type uhost_request_handler(void *uhost);
49 static usb_sts_type uhost_process_handler(void *uhost);
50
51 usbh_hid_type usbh_hid;
52 usbh_class_handler_type uhost_hid_class_handler =
53 {
54 uhost_init_handler,
55 uhost_reset_handler,
56 uhost_request_handler,
57 uhost_process_handler,
58 &usbh_hid
59 };
60
66static usb_sts_type uhost_init_handler(void *uhost)
67{
68 usbh_core_type *puhost = (usbh_core_type *)uhost;
69 usb_sts_type status = USB_OK;
70 uint8_t hidx, eptidx = 0;
71 usbh_hid_type *phid = &usbh_hid;
72
73 puhost->class_handler->pdata = &usbh_hid;
74
75 /* get hid interface */
76 hidx = usbh_find_interface(puhost, USB_CLASS_CODE_HID, 0x01, 0xFF);
77 if(hidx == 0xFF)
78 {
79 USBH_DEBUG("Unsupport Device!");
80 return USB_NOT_SUPPORT;
81 }
82
83 /* get hid protocol */
84 phid->protocol = puhost->dev.cfg_desc.interface[hidx].interface.bInterfaceProtocol;
85
86 if(phid->protocol == USB_HID_MOUSE_PROTOCOL_CODE)
87 {
88 USBH_DEBUG("Mouse Device!");
89 }
90 else if(phid->protocol == USB_HID_KEYBOARD_PROTOCOL_CODE)
91 {
92 USBH_DEBUG("Keyboard Device!");
93 }
94
95 for(eptidx = 0; eptidx < puhost->dev.cfg_desc.interface[hidx].interface.bNumEndpoints; eptidx ++)
96 {
97 if(puhost->dev.cfg_desc.interface[hidx].endpoint[eptidx].bEndpointAddress & 0x80)
98 {
99 /* find interface out endpoint information */
100 phid->eptin = puhost->dev.cfg_desc.interface[hidx].endpoint[eptidx].bEndpointAddress;
101 phid->in_maxpacket = puhost->dev.cfg_desc.interface[hidx].endpoint[eptidx].wMaxPacketSize;
102 phid->in_poll = puhost->dev.cfg_desc.interface[hidx].endpoint[eptidx].bInterval;
103
104 phid->chin = usbh_alloc_channel(puhost, phid->eptin);
105 /* enable channel */
106 usbh_hc_open(puhost, phid->chin,phid->eptin,
107 puhost->dev.address, EPT_INT_TYPE,
108 phid->in_maxpacket,
109 puhost->dev.speed);
110 usbh_set_toggle(puhost, phid->chin, 0);
111 }
112 else
113 {
114 /* get interface out endpoint information */
115 phid->eptout = puhost->dev.cfg_desc.interface[hidx].endpoint[eptidx].bEndpointAddress;
116 phid->out_maxpacket = puhost->dev.cfg_desc.interface[hidx].endpoint[eptidx].wMaxPacketSize;
117 phid->out_poll = puhost->dev.cfg_desc.interface[hidx].endpoint[eptidx].bInterval;
118
119 phid->chout = usbh_alloc_channel(puhost, usbh_hid.eptout);
120 /* enable channel */
121 usbh_hc_open(puhost, phid->chout, phid->eptout,
122 puhost->dev.address, EPT_INT_TYPE,
123 phid->out_maxpacket,
124 puhost->dev.speed);
125 usbh_set_toggle(puhost, phid->chout, 0);
126 }
127 }
128 phid->ctrl_state = USB_HID_STATE_IDLE;
129 return status;
130}
131
137static usb_sts_type uhost_reset_handler(void *uhost)
138{
139 usbh_core_type *puhost = (usbh_core_type *)uhost;
140 usbh_hid_type *phid = (usbh_hid_type *)puhost->class_handler->pdata;
141 usb_sts_type status = USB_OK;
142 if(puhost->class_handler->pdata == NULL)
143 {
144 return status;
145 }
146
147 if(phid->chin != 0)
148 {
149 /* free in channel */
150 usbh_free_channel(puhost, phid->chin);
151 usbh_ch_disable(puhost, phid->chin);
152 phid->chin = 0;
153 }
154
155 if(phid->chout != 0)
156 {
157 /* free out channel */
158 usbh_free_channel(puhost, phid->chout);
159 usbh_ch_disable(puhost, phid->chout);
160 phid->chout = 0;
161 }
162
163 return status;
164}
165
172 usb_sts_type usbh_hid_get_desc(void *uhost, uint16_t length)
173{
174 usbh_core_type *puhost = (usbh_core_type *)uhost;
175 usbh_hid_type *phid = (usbh_hid_type *)puhost->class_handler->pdata;
176 usb_sts_type status = USB_WAIT;
177 uint8_t bm_req;
178 uint16_t wvalue;
179 if(puhost->ctrl.state == CONTROL_IDLE)
180 {
181 bm_req = USB_REQ_RECIPIENT_INTERFACE | USB_REQ_TYPE_STANDARD;
182 wvalue = (0x21 << 8) & 0xFF00;
183
184 usbh_get_descriptor(puhost, length, bm_req,
185 wvalue, puhost->rx_buffer);
186 }
187 else
188 {
189 if(usbh_ctrl_result_check(puhost, CONTROL_IDLE, ENUM_IDLE) == USB_OK)
190 {
191 phid->hid_desc.bLength = puhost->rx_buffer[0];
192 phid->hid_desc.bDescriptorType = puhost->rx_buffer[1];
193 phid->hid_desc.bcdHID = SWAPBYTE(puhost->rx_buffer+2);
194 phid->hid_desc.bCountryCode = puhost->rx_buffer[4];
195 phid->hid_desc.bNumDescriptors = puhost->rx_buffer[5];
196 phid->hid_desc.bReportDescriptorType = puhost->rx_buffer[6];
197 phid->hid_desc.wItemLength = SWAPBYTE(puhost->rx_buffer+7);
198 status = USB_OK;
199 }
200 }
201 return status;
202}
203
204
211 usb_sts_type usbh_hid_get_report(void *uhost, uint16_t length)
212{
213 usbh_core_type *puhost = (usbh_core_type *)uhost;
214 usb_sts_type status = USB_WAIT;
215 uint8_t bm_req;
216 uint16_t wvalue;
217 if(puhost->ctrl.state == CONTROL_IDLE)
218 {
219 bm_req = USB_REQ_RECIPIENT_INTERFACE | USB_REQ_TYPE_STANDARD;
220 wvalue = (0x22 << 8) & 0xFF00;
221
222 usbh_get_descriptor(puhost, length, bm_req,
223 wvalue, puhost->rx_buffer);
224 }
225 else
226 {
227 if(usbh_ctrl_result_check(puhost, CONTROL_IDLE, ENUM_IDLE) == USB_OK)
228 {
229 status = USB_OK;
230 }
231 }
232 return status;
233}
234
242 usb_sts_type usbh_hid_set_idle(void *uhost, uint8_t id, uint8_t dr)
243{
244 usbh_core_type *puhost = (usbh_core_type *)uhost;
245 usb_sts_type status = USB_WAIT;
246 if(puhost->ctrl.state == CONTROL_IDLE)
247 {
248 puhost->ctrl.setup.bmRequestType = USB_DIR_H2D | USB_REQ_RECIPIENT_INTERFACE | USB_REQ_TYPE_CLASS;
249 puhost->ctrl.setup.bRequest = USB_HID_SET_IDLE;
250 puhost->ctrl.setup.wValue = (dr << 8) | id;
251 puhost->ctrl.setup.wIndex = 0;
252 puhost->ctrl.setup.wLength = 0;
253 usbh_ctrl_request(puhost, 0, 0);
254 }
255 else
256 {
257 status = usbh_ctrl_result_check(puhost, CONTROL_IDLE, ENUM_IDLE);
258 if(status == USB_OK || status == USB_NOT_SUPPORT)
259 {
260 status = USB_OK;
261 }
262 }
263 return status;
264}
265
272 usb_sts_type usbh_hid_set_protocol(void *uhost, uint8_t protocol)
273{
274 usbh_core_type *puhost = (usbh_core_type *)uhost;
275 usb_sts_type status = USB_WAIT;
276 if(puhost->ctrl.state == CONTROL_IDLE)
277 {
278 puhost->ctrl.setup.bmRequestType = USB_DIR_H2D | USB_REQ_RECIPIENT_INTERFACE | USB_REQ_TYPE_CLASS;
279 puhost->ctrl.setup.bRequest = USB_HID_SET_PROTOCOL;
280 puhost->ctrl.setup.wValue = protocol;
281 puhost->ctrl.setup.wIndex = 0;
282 puhost->ctrl.setup.wLength = 0;
283 usbh_ctrl_request(puhost, 0, 0);
284 }
285 else
286 {
287 status = usbh_ctrl_result_check(puhost, CONTROL_IDLE, ENUM_IDLE);
288 if(status == USB_OK || status == USB_NOT_SUPPORT)
289 {
290 status = USB_OK;
291 }
292 }
293 return status;
294}
295
303 usb_sts_type usbh_clear_endpoint_feature(usbh_core_type *uhost, uint8_t ept_num, uint8_t hc_num)
304{
305 usb_sts_type status = USB_WAIT;
306 usbh_core_type *puhost = (usbh_core_type *)uhost;
307 uint8_t bm_req;
308 bm_req = USB_REQ_RECIPIENT_ENDPOINT | USB_REQ_TYPE_STANDARD;
309 if(puhost->ctrl.state == CONTROL_IDLE)
310 {
311 puhost->ctrl.setup.bmRequestType = USB_DIR_H2D | bm_req;
312 puhost->ctrl.setup.bRequest = USB_STD_REQ_CLEAR_FEATURE;
313 puhost->ctrl.setup.wValue = 0x00;
314 puhost->ctrl.setup.wLength = 0;
315 puhost->ctrl.setup.wIndex = ept_num;
316 if((ept_num & 0x80) == USB_DIR_D2H)
317 {
318 puhost->hch[hc_num].toggle_in = 0;
319 }
320 else
321 {
322 puhost->hch[hc_num].toggle_out = 0;
323 }
324 status = usbh_ctrl_request(puhost, 0, 0);
325 }
326 if(usbh_ctrl_result_check(puhost, CONTROL_IDLE, ENUM_IDLE) == USB_OK)
327 {
328 status = USB_OK;
329 }
330 return status;
331}
332
338static usb_sts_type uhost_request_handler(void *uhost)
339{
340 usb_sts_type status = USB_WAIT;
341 usbh_core_type *puhost = (usbh_core_type *)uhost;
342 usbh_hid_type *phid = (usbh_hid_type *)puhost->class_handler->pdata;
343
344 switch(phid->ctrl_state)
345 {
346 case USB_HID_STATE_IDLE:
347 phid->ctrl_state = USB_HID_STATE_GET_DESC;
348 break;
349 case USB_HID_STATE_GET_DESC:
350 if(usbh_hid_get_desc(puhost, 9) == USB_OK)
351 {
352 phid->ctrl_state = USB_HID_STATE_GET_REPORT;
353 }
354 break;
355 case USB_HID_STATE_GET_REPORT:
356 if(usbh_hid_get_report(puhost, phid->hid_desc.wItemLength) == USB_OK)
357 {
358 phid->ctrl_state = USB_HID_STATE_SET_IDLE;
359 }
360 break;
361 case USB_HID_STATE_SET_IDLE:
362 if(usbh_hid_set_idle(puhost, 0, 0) == USB_OK)
363 {
364 phid->ctrl_state = USB_HID_STATE_SET_PROTOCOL;
365 }
366 break;
367 case USB_HID_STATE_SET_PROTOCOL:
368 if(usbh_hid_set_protocol(puhost, 0) == USB_OK)
369 {
370 phid->ctrl_state = USB_HID_STATE_COMPLETE;
371 }
372 break;
373 case USB_HID_STATE_COMPLETE:
374 phid->state = USB_HID_INIT;
375 status = USB_OK;
376 break;
377 default:
378 break;
379 }
380
381 return status;
382}
383
389static usb_sts_type uhost_process_handler(void *uhost)
390{
391 usbh_core_type *puhost = (usbh_core_type *)uhost;
392 usbh_hid_type *phid = (usbh_hid_type *)puhost->class_handler->pdata;
393 urb_sts_type urb_status;
394 switch(phid->state)
395 {
396 case USB_HID_INIT:
397 phid->state = USB_HID_GET;
398 break;
399
400 case USB_HID_GET:
401 usbh_interrupt_recv(puhost, phid->chin, (uint8_t *)phid->buffer, phid->in_maxpacket);
402 phid->state = USB_HID_POLL;
403 phid->poll_timer = usbh_get_frame(puhost->usb_reg);
404 break;
405
406 case USB_HID_POLL:
407 if((usbh_get_frame(puhost->usb_reg) - phid->poll_timer) >= phid->in_poll )
408 {
409 phid->state = USB_HID_GET;
410 }
411 else
412 {
413 urb_status = usbh_get_urb_status(puhost, phid->chin);
414 if(urb_status == URB_DONE)
415 {
416 puhost->urb_state[phid->chin] = URB_IDLE;
417 if(phid->protocol == USB_HID_MOUSE_PROTOCOL_CODE)
418 {
419 usbh_hid_mouse_decode((uint8_t *)phid->buffer);
420 }
421 else if(phid->protocol == USB_HID_KEYBOARD_PROTOCOL_CODE)
422 {
423 usbh_hid_keyboard_decode((uint8_t *)phid->buffer);
424 }
425
426 }
427 else if(urb_status == URB_STALL)
428 {
429 if(usbh_clear_endpoint_feature(puhost, phid->eptin, phid->chin) == USB_OK)
430 {
431 phid->state = USB_HID_GET;
432 }
433 }
434 }
435 break;
436
437 default:
438 break;
439 }
440 return USB_OK;
441}
442
USBH_DEBUG
#define USBH_DEBUG(...)
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:206
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
EPT_INT_TYPE
@ EPT_INT_TYPE
Definition: at32f435_437_usb.h:349
usbh_get_frame
uint32_t usbh_get_frame(otg_global_type *usbx)
get current frame number
Definition: at32f435_437_usb.c:868
USB_STD_REQ_CLEAR_FEATURE
#define USB_STD_REQ_CLEAR_FEATURE
Definition: usb_std.h:78
USB_REQ_TYPE_STANDARD
#define USB_REQ_TYPE_STANDARD
usb request type
Definition: usb_std.h:63
SWAPBYTE
#define SWAPBYTE(addr)
usb swap address
Definition: usb_std.h:247
USB_CLASS_CODE_HID
#define USB_CLASS_CODE_HID
Definition: usb_std.h:163
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
USB_REQ_RECIPIENT_ENDPOINT
#define USB_REQ_RECIPIENT_ENDPOINT
Definition: usb_std.h:56
USB_REQ_RECIPIENT_INTERFACE
#define USB_REQ_RECIPIENT_INTERFACE
Definition: usb_std.h:55
USB_REQ_TYPE_CLASS
#define USB_REQ_TYPE_CLASS
Definition: usb_std.h:64
USB_OK
@ USB_OK
Definition: usb_std.h:268
USB_WAIT
@ USB_WAIT
Definition: usb_std.h:270
USB_NOT_SUPPORT
@ USB_NOT_SUPPORT
Definition: usb_std.h:271
usbh_interrupt_recv
usb_sts_type usbh_interrupt_recv(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host interrupt receive request
Definition: usbh_core.c:217
usbh_free_channel
void usbh_free_channel(usbh_core_type *uhost, uint8_t index)
usb host free channel
Definition: usbh_core.c:57
usbh_set_toggle
usb_sts_type usbh_set_toggle(usbh_core_type *uhost, uint8_t hc_num, uint8_t toggle)
usb host set toggle
Definition: usbh_core.c:94
usbh_ctrl_result_check
usb_sts_type usbh_ctrl_result_check(usbh_core_type *uhost, ctrl_ept0_sts_type next_ctrl_state, uint8_t next_enum_state)
usb wait control setup complete
Definition: usbh_core.c:724
usbh_alloc_channel
uint16_t usbh_alloc_channel(usbh_core_type *uhost, uint8_t ept_addr)
usb host alloc channel
Definition: usbh_core.c:694
usbh_ch_disable
void usbh_ch_disable(usbh_core_type *uhost, uint8_t chn)
disable host channel
Definition: usbh_core.c:683
usbh_hc_open
void usbh_hc_open(usbh_core_type *uhost, uint8_t chn, uint8_t ept_num, uint8_t dev_address, uint8_t type, uint16_t maxpacket, uint8_t speed)
usb host open channel
Definition: usbh_core.c:638
usbh_get_urb_status
urb_sts_type usbh_get_urb_status(usbh_core_type *uhost, uint8_t ch_num)
usb host get urb status
Definition: usbh_core.c:713
usbh_ctrl_request
usb_sts_type usbh_ctrl_request(usbh_core_type *uhost, uint8_t *buffer, uint16_t length)
usb host control request
Definition: usbh_ctrl.c:530
usbh_get_descriptor
usb_sts_type usbh_get_descriptor(usbh_core_type *uhost, uint16_t length, uint8_t req_type, uint16_t wvalue, uint8_t *buffer)
usb host get device descriptor
Definition: usbh_ctrl.c:552
usbh_find_interface
uint8_t usbh_find_interface(usbh_core_type *uhost, uint8_t class_code, uint8_t sub_class, uint8_t protocol)
usb host find interface
Definition: usbh_ctrl.c:720
USB_HID_SET_IDLE
#define USB_HID_SET_IDLE
Definition: usbh_hid_class.h:63
USB_HID_SET_PROTOCOL
#define USB_HID_SET_PROTOCOL
Definition: usbh_hid_class.h:64
USB_HID_MOUSE_PROTOCOL_CODE
#define USB_HID_MOUSE_PROTOCOL_CODE
Definition: usbh_hid_class.h:54
USB_HID_KEYBOARD_PROTOCOL_CODE
#define USB_HID_KEYBOARD_PROTOCOL_CODE
Definition: usbh_hid_class.h:53
USB_HID_STATE_COMPLETE
@ USB_HID_STATE_COMPLETE
Definition: usbh_hid_class.h:76
USB_HID_STATE_GET_REPORT
@ USB_HID_STATE_GET_REPORT
Definition: usbh_hid_class.h:73
USB_HID_STATE_SET_IDLE
@ USB_HID_STATE_SET_IDLE
Definition: usbh_hid_class.h:74
USB_HID_STATE_SET_PROTOCOL
@ USB_HID_STATE_SET_PROTOCOL
Definition: usbh_hid_class.h:75
USB_HID_STATE_GET_DESC
@ USB_HID_STATE_GET_DESC
Definition: usbh_hid_class.h:72
USB_HID_STATE_IDLE
@ USB_HID_STATE_IDLE
Definition: usbh_hid_class.h:71
USB_HID_GET
@ USB_HID_GET
Definition: usbh_hid_class.h:85
USB_HID_INIT
@ USB_HID_INIT
Definition: usbh_hid_class.h:84
USB_HID_POLL
@ USB_HID_POLL
Definition: usbh_hid_class.h:87
usbh_hid_keyboard_decode
void usbh_hid_keyboard_decode(uint8_t *data)
usb host hid keyboard decode
Definition: usbh_hid_keyboard.c:145
usbh_hid_mouse_decode
void usbh_hid_mouse_decode(uint8_t *mouse_data)
usb host hid mouse decode
Definition: usbh_hid_mouse.c:167
uhost_hid_class_handler
usbh_class_handler_type uhost_hid_class_handler
Definition: usbh_hid_class.c:52
usbh_hid_set_protocol
usb_sts_type usbh_hid_set_protocol(void *uhost, uint8_t protocol)
usb host hid class set protocol
Definition: usbh_hid_class.c:272
usbh_hid
usbh_hid_type usbh_hid
Definition: usbh_hid_class.c:51
usbh_hid_set_idle
usb_sts_type usbh_hid_set_idle(void *uhost, uint8_t id, uint8_t dr)
usb host hid class set idle
Definition: usbh_hid_class.c:242
uhost_request_handler
static usb_sts_type uhost_request_handler(void *uhost)
usb host hid class request handler
Definition: usbh_hid_class.c:338
usbh_clear_endpoint_feature
usb_sts_type usbh_clear_endpoint_feature(usbh_core_type *uhost, uint8_t ept_num, uint8_t hc_num)
usb host clear feature
Definition: usbh_hid_class.c:303
usbh_hid_get_report
usb_sts_type usbh_hid_get_report(void *uhost, uint16_t length)
usb host hid class get report
Definition: usbh_hid_class.c:211
uhost_process_handler
static usb_sts_type uhost_process_handler(void *uhost)
usb host hid class process handler
Definition: usbh_hid_class.c:389
uhost_reset_handler
static usb_sts_type uhost_reset_handler(void *uhost)
usb host class reset handler
Definition: usbh_hid_class.c:137
uhost_init_handler
static usb_sts_type uhost_init_handler(void *uhost)
usb host class init handler
Definition: usbh_hid_class.c:66
usbh_hid_get_desc
usb_sts_type usbh_hid_get_desc(void *uhost, uint16_t length)
usb host hid class get descriptor
Definition: usbh_hid_class.c:172
usb_hid_desc_type::bCountryCode
uint8_t bCountryCode
Definition: usbh_hid_class.h:100
usb_hid_desc_type::bNumDescriptors
uint8_t bNumDescriptors
Definition: usbh_hid_class.h:101
usb_hid_desc_type::wItemLength
uint16_t wItemLength
Definition: usbh_hid_class.h:103
usb_hid_desc_type::bReportDescriptorType
uint8_t bReportDescriptorType
Definition: usbh_hid_class.h:102
usb_hid_desc_type::bLength
uint8_t bLength
Definition: usbh_hid_class.h:97
usb_hid_desc_type::bcdHID
uint16_t bcdHID
Definition: usbh_hid_class.h:99
usb_hid_desc_type::bDescriptorType
uint8_t bDescriptorType
Definition: usbh_hid_class.h:98
usbh_hid_type
usb hid struct
Definition: usbh_hid_class.h:110
usbh_hid_type::eptout
uint8_t eptout
Definition: usbh_hid_class.h:117
usbh_hid_type::out_maxpacket
uint16_t out_maxpacket
Definition: usbh_hid_class.h:118
usbh_hid_type::in_maxpacket
uint16_t in_maxpacket
Definition: usbh_hid_class.h:113
usbh_hid_type::state
usb_hid_state_type state
Definition: usbh_hid_class.h:125
usbh_hid_type::out_poll
uint8_t out_poll
Definition: usbh_hid_class.h:119
usbh_hid_type::protocol
uint8_t protocol
Definition: usbh_hid_class.h:120
usbh_hid_type::eptin
uint8_t eptin
Definition: usbh_hid_class.h:112
usbh_hid_type::ctrl_state
usb_hid_ctrl_state_type ctrl_state
Definition: usbh_hid_class.h:124
usbh_hid_type::in_poll
uint8_t in_poll
Definition: usbh_hid_class.h:114
usbh_hid_type::hid_desc
usb_hid_desc_type hid_desc
Definition: usbh_hid_class.h:123
usbh_hid_type::chin
uint8_t chin
Definition: usbh_hid_class.h:111
usbh_hid_type::buffer
uint32_t buffer[16]
Definition: usbh_hid_class.h:127
usbh_hid_type::poll_timer
uint16_t poll_timer
Definition: usbh_hid_class.h:126
usbh_hid_type::chout
uint8_t chout
Definition: usbh_hid_class.h:116
usbh_core.h
usb host core header file
usbh_ctrl.h
usb header file
usbh_hid_class.h
usb host hid class header file
usbh_hid_keyboard.h
usb host hid keyboard header file
usbh_hid_mouse.h
usb host hid mouse header file


AT32F435/437 Firmwary Library: usbh_hid_class.h Source File

  • middlewares
  • usbh_class
  • usbh_hid
usbh_hid_class.h
Go to the documentation of this file.
1
26/* Define to prevent recursive inclusion -------------------------------------*/
27#ifndef __USBH_HID_CLASS_H
28#define __USBH_HID_CLASS_H
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#include "usbh_core.h"
35#include "usb_conf.h"
36
52#define USB_HID_NONE_PROTOCOL_CODE 0x00
53#define USB_HID_KEYBOARD_PROTOCOL_CODE 0x01
54#define USB_HID_MOUSE_PROTOCOL_CODE 0x02
55
59#define USB_HID_GET_REPORT 0x01
60#define USB_HID_GET_IDLE 0x02
61#define USB_HID_GET_PROTOCOL 0x03
62#define USB_HID_SET_REPORT 0x09
63#define USB_HID_SET_IDLE 0x0A
64#define USB_HID_SET_PROTOCOL 0x0B
65
69typedef enum
70{
71 USB_HID_STATE_IDLE,
72 USB_HID_STATE_GET_DESC,
73 USB_HID_STATE_GET_REPORT,
74 USB_HID_STATE_SET_IDLE,
75 USB_HID_STATE_SET_PROTOCOL,
76 USB_HID_STATE_COMPLETE,
77}usb_hid_ctrl_state_type;
78
82typedef enum
83{
84 USB_HID_INIT,
85 USB_HID_GET,
86 USB_HID_SEND,
87 USB_HID_POLL,
88 USB_HID_BUSY,
89 USB_HID_ERROR,
90}usb_hid_state_type;
91
95typedef struct
96{
97 uint8_t bLength;
98 uint8_t bDescriptorType;
99 uint16_t bcdHID;
100 uint8_t bCountryCode;
101 uint8_t bNumDescriptors;
102 uint8_t bReportDescriptorType;
103 uint16_t wItemLength;
104}usb_hid_desc_type;
105
109typedef struct
110{
111 uint8_t chin;
112 uint8_t eptin;
113 uint16_t in_maxpacket;
114 uint8_t in_poll;
115
116 uint8_t chout;
117 uint8_t eptout;
118 uint16_t out_maxpacket;
119 uint8_t out_poll;
120 uint8_t protocol;
121
122
123 usb_hid_desc_type hid_desc;
124 usb_hid_ctrl_state_type ctrl_state;
125 usb_hid_state_type state;
126 uint16_t poll_timer;
127 uint32_t buffer[16];
128}usbh_hid_type;
129
130extern usbh_class_handler_type uhost_hid_class_handler;
131
132
144#ifdef __cplusplus
145}
146#endif
147
148#endif
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
uhost_hid_class_handler
usbh_class_handler_type uhost_hid_class_handler
Definition: usbh_hid_class.c:52
usb_hid_ctrl_state_type
usb_hid_ctrl_state_type
usb hid request state
Definition: usbh_hid_class.h:70
usb_hid_state_type
usb_hid_state_type
usb hid process state
Definition: usbh_hid_class.h:83
USB_HID_STATE_COMPLETE
@ USB_HID_STATE_COMPLETE
Definition: usbh_hid_class.h:76
USB_HID_STATE_GET_REPORT
@ USB_HID_STATE_GET_REPORT
Definition: usbh_hid_class.h:73
USB_HID_STATE_SET_IDLE
@ USB_HID_STATE_SET_IDLE
Definition: usbh_hid_class.h:74
USB_HID_STATE_SET_PROTOCOL
@ USB_HID_STATE_SET_PROTOCOL
Definition: usbh_hid_class.h:75
USB_HID_STATE_GET_DESC
@ USB_HID_STATE_GET_DESC
Definition: usbh_hid_class.h:72
USB_HID_STATE_IDLE
@ USB_HID_STATE_IDLE
Definition: usbh_hid_class.h:71
USB_HID_GET
@ USB_HID_GET
Definition: usbh_hid_class.h:85
USB_HID_ERROR
@ USB_HID_ERROR
Definition: usbh_hid_class.h:89
USB_HID_SEND
@ USB_HID_SEND
Definition: usbh_hid_class.h:86
USB_HID_INIT
@ USB_HID_INIT
Definition: usbh_hid_class.h:84
USB_HID_POLL
@ USB_HID_POLL
Definition: usbh_hid_class.h:87
USB_HID_BUSY
@ USB_HID_BUSY
Definition: usbh_hid_class.h:88
usb_hid_desc_type
usb hid descriptor type
Definition: usbh_hid_class.h:96
usb_hid_desc_type::bCountryCode
uint8_t bCountryCode
Definition: usbh_hid_class.h:100
usb_hid_desc_type::bNumDescriptors
uint8_t bNumDescriptors
Definition: usbh_hid_class.h:101
usb_hid_desc_type::wItemLength
uint16_t wItemLength
Definition: usbh_hid_class.h:103
usb_hid_desc_type::bReportDescriptorType
uint8_t bReportDescriptorType
Definition: usbh_hid_class.h:102
usb_hid_desc_type::bLength
uint8_t bLength
Definition: usbh_hid_class.h:97
usb_hid_desc_type::bcdHID
uint16_t bcdHID
Definition: usbh_hid_class.h:99
usb_hid_desc_type::bDescriptorType
uint8_t bDescriptorType
Definition: usbh_hid_class.h:98
usbh_hid_type
usb hid struct
Definition: usbh_hid_class.h:110
usbh_hid_type::eptout
uint8_t eptout
Definition: usbh_hid_class.h:117
usbh_hid_type::out_maxpacket
uint16_t out_maxpacket
Definition: usbh_hid_class.h:118
usbh_hid_type::in_maxpacket
uint16_t in_maxpacket
Definition: usbh_hid_class.h:113
usbh_hid_type::state
usb_hid_state_type state
Definition: usbh_hid_class.h:125
usbh_hid_type::out_poll
uint8_t out_poll
Definition: usbh_hid_class.h:119
usbh_hid_type::protocol
uint8_t protocol
Definition: usbh_hid_class.h:120
usbh_hid_type::eptin
uint8_t eptin
Definition: usbh_hid_class.h:112
usbh_hid_type::ctrl_state
usb_hid_ctrl_state_type ctrl_state
Definition: usbh_hid_class.h:124
usbh_hid_type::in_poll
uint8_t in_poll
Definition: usbh_hid_class.h:114
usbh_hid_type::hid_desc
usb_hid_desc_type hid_desc
Definition: usbh_hid_class.h:123
usbh_hid_type::chin
uint8_t chin
Definition: usbh_hid_class.h:111
usbh_hid_type::poll_timer
uint16_t poll_timer
Definition: usbh_hid_class.h:126
usbh_hid_type::chout
uint8_t chout
Definition: usbh_hid_class.h:116
usbh_core.h
usb host core header file


AT32F435/437 Firmwary Library: usbh_hid_keyboard.c Source File

  • middlewares
  • usbh_class
  • usbh_hid
usbh_hid_keyboard.c
Go to the documentation of this file.
1
26 #include "usbh_hid_keyboard.h"
27
41static const uint8_t hid_keyboard_codes[] =
42{
43 0, 0, 0, 0, 31, 50, 48, 33,
44 19, 34, 35, 36, 24, 37, 38, 39,
45 52, 51, 25, 26, 17, 20, 32, 21,
46 23, 49, 18, 47, 22, 46, 2, 3,
47 4, 5, 6, 7, 8, 9, 10, 11,
48 43, 110, 15, 16, 61, 12, 13, 27,
49 28, 29, 42, 40, 41, 1, 53, 54,
50 55, 30, 112, 113, 114, 115, 116, 117,
51 118, 119, 120, 121, 122, 123, 124, 125,
52 126, 75, 80, 85, 76, 81, 86, 89,
53 79, 84, 83, 90, 95, 100, 105, 106,
54 108, 93, 98, 103, 92, 97, 102, 91,
55 96, 101, 99, 104, 45, 129, 0, 0,
56 0, 0, 0, 0, 0, 0, 0, 0,
57 0, 0, 0, 0, 0, 0, 0, 0,
58 0, 0, 0, 0, 0, 0, 0, 0,
59 0, 0, 0, 0, 0, 107, 0, 56,
60 0, 0, 0, 0, 0, 0, 0, 0,
61 0, 0, 0, 0, 0, 0, 0, 0,
62 0, 0, 0, 0, 0, 0, 0, 0,
63 0, 0, 0, 0, 0, 0, 0, 0,
64 0, 0, 0, 0, 0, 0, 0, 0,
65 0, 0, 0, 0, 0, 0, 0, 0,
66 0, 0, 0, 0, 0, 0, 0, 0,
67 0, 0, 0, 0, 0, 0, 0, 0,
68 0, 0, 0, 0, 0, 0, 0, 0,
69 0, 0, 0, 0, 0, 0, 0, 0,
70 0, 0, 0, 0, 0, 0, 0, 0,
71 58, 44, 60, 127, 64, 57, 62, 128,
72};
73
74#ifdef QWERTY_KEYBOARD
75
76static const int8_t hid_keyboard_key[] = {
77 '\0', '`', '1', '2', '3', '4', '5', '6',
78 '7', '8', '9', '0', '-', '=', '\0', '\r',
79 '\t', 'q', 'w', 'e', 'r', 't', 'y', 'u',
80 'i', 'o', 'p', '[', ']', '\\',
81 '\0', 'a', 's', 'd', 'f', 'g', 'h', 'j',
82 'k', 'l', ';', '\'', '\0', '\n',
83 '\0', '\0', 'z', 'x', 'c', 'v', 'b', 'n',
84 'm', ',', '.', '/', '\0', '\0',
85 '\0', '\0', '\0', ' ', '\0', '\0', '\0', '\0',
86 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0',
87 '\0', '\0', '\0', '\0', '\0', '\r', '\0', '\0',
88 '\0', '\0', '\0', '\0', '\0', '\0',
89 '\0', '\0', '7', '4', '1',
90 '\0', '/', '8', '5', '2',
91 '0', '*', '9', '6', '3',
92 '.', '-', '+', '\0', '\n', '\0', '\0', '\0', '\0', '\0', '\0',
93 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0',
94 '\0', '\0', '\0', '\0'
95};
96
97static const int8_t hid_keyboard_key_shift[] = {
98 '\0', '~', '!', '@', '#', '$', '%', '^', '&', '*', '(', ')',
99 '_', '+', '\0', '\0', '\0', 'Q', 'W', 'E', 'R', 'T', 'Y', 'U',
100 'I', 'O', 'P', '{', '}', '|', '\0', 'A', 'S', 'D', 'F', 'G',
101 'H', 'J', 'K', 'L', ':', '"', '\0', '\n', '\0', '\0', 'Z', 'X',
102 'C', 'V', 'B', 'N', 'M', '<', '>', '?', '\0', '\0', '\0', '\0',
103 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0',
104 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0',
105 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0',
106 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0',
107 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0',
108 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0'
109};
110
111#else
112static const int8_t hid_keyboard_key[] = {
113 '\0', '`', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0',
114 '-', '=', '\0', '\r', '\t', 'a', 'z', 'e', 'r', 't', 'y', 'u',
115 'i', 'o', 'p', '[', ']', '\\', '\0', 'q', 's', 'd', 'f', 'g',
116 'h', 'j', 'k', 'l', 'm', '\0', '\0', '\n', '\0', '\0', 'w', 'x',
117 'c', 'v', 'b', 'n', ',', ';', ':', '!', '\0', '\0', '\0', '\0',
118 '\0', ' ', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0',
119 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\r', '\0', '\0', '\0',
120 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '7', '4', '1','\0', '/',
121 '8', '5', '2', '0', '*', '9', '6', '3', '.', '-', '+', '\0',
122 '\n', '\0', '\0', '\0', '\0', '\0', '\0','\0', '\0', '\0', '\0', '\0', '\0',
123 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0'
124};
125
126static const int8_t hid_keyboard_key_shift[] = {
127 '\0', '~', '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_',
128 '+', '\0', '\0', '\0', 'A', 'Z', 'E', 'R', 'T', 'Y', 'U', 'I', 'O',
129 'P', '{', '}', '*', '\0', 'Q', 'S', 'D', 'F', 'G', 'H', 'J', 'K',
130 'L', 'M', '%', '\0', '\n', '\0', '\0', 'W', 'X', 'C', 'V', 'B', 'N',
131 '?', '.', '/', '\0', '\0', '\0','\0', '\0', '\0', '\0', '\0', '\0', '\0',
132 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0',
133 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0',
134 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0',
135 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0',
136 '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0'
137};
138#endif
139
145void usbh_hid_keyboard_decode(uint8_t *data)
146{
147 static uint8_t shift;
148 static uint8_t keys[KEYBOARD_MAX_NB_PRESSED];
149 static uint8_t keys_n[KEYBOARD_MAX_NB_PRESSED];
150 static uint8_t keys_l[KEYBOARD_MAX_NB_PRESSED];
151 static uint8_t key_newest;
152 static uint8_t nb_keys;
153 static uint8_t nb_keys_n;
154 static uint8_t nb_keys_l;
155
156 uint8_t idx;
157 uint8_t idy;
158 uint8_t err;
159 uint8_t out;
160
161 nb_keys = 0;
162 nb_keys_n = 0;
163 nb_keys_l = 0;
164 key_newest = 0;
165
166 if(data[0] == KEYBOARD_LEFT_SHIFT || data[0] == KEYBOARD_RIGHT_SHIFT)
167 {
168 shift = TRUE;
169 }
170 else
171 {
172 shift = FALSE;
173 }
174 err = FALSE;
175
176 for(idx = 2; idx < 2 + KEYBOARD_MAX_NB_PRESSED; idx ++)
177 {
178 if((data[idx] == 0x01) ||
179 (data[idx] == 0x02) ||
180 (data[idx] == 0x03))
181 {
182 err = TRUE;
183 }
184 }
185
186 if(err == TRUE)
187 {
188 return;
189 }
190
191 nb_keys = 0;
192 nb_keys_n = 0;
193 for(idx = 2; idx < 2 + KEYBOARD_MAX_NB_PRESSED; idx ++)
194 {
195 if(data[idx] != 0)
196 {
197 keys[nb_keys] = data[idx];
198 nb_keys ++;
199 for(idy = 0; idy < nb_keys_l; idy ++)
200 {
201 if(data[idx] == keys_l[idy])
202 {
203 break;
204 }
205 }
206
207 if(idy == nb_keys_l)
208 {
209 keys_n[nb_keys_n] = data[idx];
210 nb_keys_n ++;
211 }
212
213 }
214 }
215
216 if(nb_keys_n == 1)
217 {
218 key_newest = keys_n[0];
219
220 if(shift == TRUE)
221 {
222 out = hid_keyboard_key_shift[hid_keyboard_codes[key_newest]];
223 }
224 else
225 {
226 out = hid_keyboard_key[hid_keyboard_codes[key_newest]];
227 }
228 /* callback user handler */
229 USBH_DEBUG("%c", out);
230 }
231 else
232 {
233 key_newest = 0;
234 }
235
236 nb_keys_l = nb_keys;
237 for(idx = 0; idx < KEYBOARD_MAX_NB_PRESSED; idx ++)
238 {
239 keys_l[idx] = keys[idx];
240 }
241 return;
242}
243
idx
uint32_t idx
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:46
USBH_DEBUG
#define USBH_DEBUG(...)
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:206
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
KEYBOARD_RIGHT_SHIFT
#define KEYBOARD_RIGHT_SHIFT
Definition: usbh_hid_keyboard.h:56
KEYBOARD_LEFT_SHIFT
#define KEYBOARD_LEFT_SHIFT
Definition: usbh_hid_keyboard.h:52
KEYBOARD_MAX_NB_PRESSED
#define KEYBOARD_MAX_NB_PRESSED
Definition: usbh_hid_keyboard.h:60
hid_keyboard_codes
static const uint8_t hid_keyboard_codes[]
Definition: usbh_hid_keyboard.c:41
hid_keyboard_key
static const int8_t hid_keyboard_key[]
Definition: usbh_hid_keyboard.c:76
hid_keyboard_key_shift
static const int8_t hid_keyboard_key_shift[]
Definition: usbh_hid_keyboard.c:97
usbh_hid_keyboard_decode
void usbh_hid_keyboard_decode(uint8_t *data)
usb host hid keyboard decode
Definition: usbh_hid_keyboard.c:145
usbh_hid_keyboard.h
usb host hid keyboard header file


AT32F435/437 Firmwary Library: usbh_hid_keyboard.h Source File

  • middlewares
  • usbh_class
  • usbh_hid
usbh_hid_keyboard.h
Go to the documentation of this file.
1
26/* Define to prevent recursive inclusion -------------------------------------*/
27#ifndef __USBH_HID_KEYBOARD_H
28#define __USBH_HID_KEYBOARD_H
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#include "usb_conf.h"
35
51#define KEYBOARD_LEFT_CTRL 0x01
52#define KEYBOARD_LEFT_SHIFT 0x02
53#define KEYBOARD_LEFT_ALT 0x04
54#define KEYBOARD_LEFT_GUI 0x08
55#define KEYBOARD_RIGHT_CTRL 0x10
56#define KEYBOARD_RIGHT_SHIFT 0x20
57#define KEYBOARD_RIGHT_ALT 0x40
58#define KEYBOARD_RIGHT_GUI 0x80
59
60#define KEYBOARD_MAX_NB_PRESSED 6
61
62#ifndef AZERTY_KEYBOARD
63 #define QWERTY_KEYBOARD
64#endif
65
66void usbh_hid_keyboard_decode(uint8_t *data);
67
68
80#ifdef __cplusplus
81}
82#endif
83
84#endif
usbh_hid_keyboard_decode
void usbh_hid_keyboard_decode(uint8_t *data)
usb host hid keyboard decode
Definition: usbh_hid_keyboard.c:145


AT32F435/437 Firmwary Library: usbh_hid_mouse.c Source File

  • middlewares
  • usbh_class
  • usbh_hid
usbh_hid_mouse.c
Go to the documentation of this file.
1
26#include "usbh_hid_mouse.h"
27
41 usb_hid_mouse_type hid_mouse;
42uint16_t x_pos = 0, y_pos = 0;
43
50void usbh_hid_mouse_position(uint8_t x, uint8_t y)
51{
52 if((x != 0) || (y != 0))
53 {
54 x_pos += x / 2;
55 y_pos += y / 2;
56
57 if(x_pos > MOUSE_WINDOW_WIDTH - 12)
58 {
59 x_pos = MOUSE_WINDOW_WIDTH - 12;
60 }
61 if(y_pos > MOUSE_WINDOW_HEIGHT - 12)
62 {
63 y_pos = MOUSE_WINDOW_HEIGHT - 12;
64 }
65
66 if(x_pos < 2)
67 {
68 x_pos = 2;
69 }
70 if(y_pos < 2)
71 {
72 y_pos = 2;
73 }
74 USBH_DEBUG("Moving Mouse");
75 }
76
77}
78
84void usbh_hid_mouse_button_press(uint8_t button)
85{
86 switch(button)
87 {
88 case MOUSE_BUTTON_LEFT:
89 /* left button */
90 USBH_DEBUG("Left Button Pressed ");
91 break;
92 case MOUSE_BUTTON_RIGHT:
93 USBH_DEBUG("Right Button Pressed ");
94 /* left button */
95 break;
96 case MOUSE_BUTTON_MIDDLE:
97 USBH_DEBUG("Middle Button Pressed ");
98 /* middle button */
99 break;
100 }
101}
102
108void usbh_hid_mouse_button_release(uint8_t button)
109{
110 switch(button)
111 {
112 case MOUSE_BUTTON_LEFT:
113 /* left button */
114 USBH_DEBUG("Left Button Released ");
115 break;
116 case MOUSE_BUTTON_RIGHT:
117 /* left button */
118 USBH_DEBUG("Right Button Released ");
119 break;
120 case MOUSE_BUTTON_MIDDLE:
121 /* middle button */
122 USBH_DEBUG("Middle Button Released ");
123 break;
124 }
125}
126
132void usbh_hid_mouse_process(usb_hid_mouse_type *mouse)
133{
134 uint8_t idx = 1;
135 static uint8_t b_state[3] = {0};
136 if((mouse->x != 0) && (mouse->y != 0))
137 {
138 usbh_hid_mouse_position(mouse->x, mouse->y);
139 }
140
141 for(idx = 0; idx < 3; idx ++)
142 {
143 if(mouse->button & 1 << idx)
144 {
145 if(b_state[idx] == 0)
146 {
147 usbh_hid_mouse_button_press(idx);
148 b_state[idx] = 1;
149 }
150 }
151 else
152 {
153 if(b_state[idx] == 1)
154 {
155 usbh_hid_mouse_button_release(idx);
156 b_state[idx] = 0;
157 }
158 }
159 }
160}
161
167void usbh_hid_mouse_decode(uint8_t *mouse_data)
168{
169 hid_mouse.button = mouse_data[0];
170 hid_mouse.x = mouse_data[1];
171 hid_mouse.y = mouse_data[2];
172 hid_mouse.z = mouse_data[3];
173
174 usbh_hid_mouse_process(&hid_mouse);
175}
176
idx
uint32_t idx
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:46
USBH_DEBUG
#define USBH_DEBUG(...)
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:206
MOUSE_WINDOW_HEIGHT
#define MOUSE_WINDOW_HEIGHT
Definition: usbh_hid_mouse.h:53
MOUSE_BUTTON_LEFT
#define MOUSE_BUTTON_LEFT
usb hid mouse button
Definition: usbh_hid_mouse.h:59
MOUSE_WINDOW_WIDTH
#define MOUSE_WINDOW_WIDTH
Definition: usbh_hid_mouse.h:54
MOUSE_BUTTON_MIDDLE
#define MOUSE_BUTTON_MIDDLE
Definition: usbh_hid_mouse.h:61
MOUSE_BUTTON_RIGHT
#define MOUSE_BUTTON_RIGHT
Definition: usbh_hid_mouse.h:60
hid_mouse
usb_hid_mouse_type hid_mouse
Definition: usbh_hid_mouse.c:41
usbh_hid_mouse_button_press
void usbh_hid_mouse_button_press(uint8_t button)
usb host hid button press
Definition: usbh_hid_mouse.c:84
y_pos
uint16_t y_pos
Definition: usbh_hid_mouse.c:42
usbh_hid_mouse_position
void usbh_hid_mouse_position(uint8_t x, uint8_t y)
usb host hid position
Definition: usbh_hid_mouse.c:50
usbh_hid_mouse_process
void usbh_hid_mouse_process(usb_hid_mouse_type *mouse)
usb host hid mouse process
Definition: usbh_hid_mouse.c:132
usbh_hid_mouse_button_release
void usbh_hid_mouse_button_release(uint8_t button)
usb host hid button release
Definition: usbh_hid_mouse.c:108
x_pos
uint16_t x_pos
Definition: usbh_hid_mouse.c:42
usbh_hid_mouse_decode
void usbh_hid_mouse_decode(uint8_t *mouse_data)
usb host hid mouse decode
Definition: usbh_hid_mouse.c:167
usb_hid_mouse_type
usb hid mouse type
Definition: usbh_hid_mouse.h:67
usb_hid_mouse_type::y
uint8_t y
Definition: usbh_hid_mouse.h:70
usb_hid_mouse_type::z
uint8_t z
Definition: usbh_hid_mouse.h:71
usb_hid_mouse_type::button
uint8_t button
Definition: usbh_hid_mouse.h:68
usb_hid_mouse_type::x
uint8_t x
Definition: usbh_hid_mouse.h:69
usbh_hid_mouse.h
usb host hid mouse header file


AT32F435/437 Firmwary Library: usbh_hid_mouse.h Source File

  • middlewares
  • usbh_class
  • usbh_hid
usbh_hid_mouse.h
Go to the documentation of this file.
1
26/* Define to prevent recursive inclusion -------------------------------------*/
27#ifndef __USBH_HID_MOUSE_H
28#define __USBH_HID_MOUSE_H
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#include "usb_conf.h"
35
51#define MOUSE_WINDOW_X 100
52#define MOUSE_WINDOW_Y 220
53#define MOUSE_WINDOW_HEIGHT 90
54#define MOUSE_WINDOW_WIDTH 128
55
59#define MOUSE_BUTTON_LEFT 0x00
60#define MOUSE_BUTTON_RIGHT 0x01
61#define MOUSE_BUTTON_MIDDLE 0x02
62
66typedef struct
67{
68 uint8_t button;
69 uint8_t x;
70 uint8_t y;
71 uint8_t z;
72}usb_hid_mouse_type;
73
74void usbh_hid_mouse_decode(uint8_t *mouse_data);
75
76
88#ifdef __cplusplus
89}
90#endif
91
92#endif
93
usbh_hid_mouse_decode
void usbh_hid_mouse_decode(uint8_t *mouse_data)
usb host hid mouse decode
Definition: usbh_hid_mouse.c:167
usb_hid_mouse_type
usb hid mouse type
Definition: usbh_hid_mouse.h:67
usb_hid_mouse_type::y
uint8_t y
Definition: usbh_hid_mouse.h:70
usb_hid_mouse_type::z
uint8_t z
Definition: usbh_hid_mouse.h:71
usb_hid_mouse_type::button
uint8_t button
Definition: usbh_hid_mouse.h:68
usb_hid_mouse_type::x
uint8_t x
Definition: usbh_hid_mouse.h:69


AT32F435/437 Firmwary Library: usbh_int.c Source File

  • middlewares
  • usb_drivers
  • src
usbh_int.c
Go to the documentation of this file.
1
26#include "usbh_int.h"
27
28
47void usbh_irq_handler(otg_core_type *otgdev)
48{
49 otg_global_type *usbx = otgdev->usb_reg;
50 usbh_core_type *uhost = &otgdev->host;
51 uint32_t intsts = usb_global_get_all_interrupt(usbx);
52
53 if(usbx->gintsts_bit.curmode == 1)
54 {
55 if(intsts & USB_OTG_HCH_FLAG)
56 {
57 usbh_hch_handler(uhost);
58 usb_global_clear_interrupt(usbx, USB_OTG_HCH_FLAG);
59 }
60 if(intsts & USB_OTG_SOF_FLAG)
61 {
62 usbh_sof_handler(uhost);
63 usb_global_clear_interrupt(usbx, USB_OTG_SOF_FLAG);
64 }
65 if(intsts & USB_OTG_MODEMIS_FLAG)
66 {
67 usb_global_clear_interrupt(usbx, USB_OTG_MODEMIS_FLAG);
68 }
69 if(intsts & USB_OTG_WKUP_FLAG)
70 {
71 usbh_wakeup_handler(uhost);
72 usb_global_clear_interrupt(usbx, USB_OTG_WKUP_FLAG);
73 }
74 if(intsts & USB_OTG_RXFLVL_FLAG)
75 {
76 usbh_rx_qlvl_handler(uhost);
77 usb_global_clear_interrupt(usbx, USB_OTG_RXFLVL_FLAG);
78 }
79 if(intsts & USB_OTG_DISCON_FLAG)
80 {
81 usbh_disconnect_handler(uhost);
82 usb_global_clear_interrupt(usbx, USB_OTG_DISCON_FLAG);
83 }
84 if(intsts & USB_OTG_PRT_FLAG)
85 {
86 usbh_port_handler(uhost);
87 }
88 if(intsts & USB_OTG_INCOMPIP_INCOMPISOOUT_FLAG)
89 {
90 usb_global_clear_interrupt(usbx, USB_OTG_INCOMPIP_INCOMPISOOUT_FLAG);
91 }
92 if(intsts & USB_OTG_INCOMISOIN_FLAG)
93 {
94 usb_global_clear_interrupt(usbx, USB_OTG_INCOMISOIN_FLAG);
95 }
96 if(intsts & USB_OTG_PTXFEMP_FLAG)
97 {
98 usb_global_clear_interrupt(usbx, USB_OTG_PTXFEMP_FLAG);
99 }
100 if(intsts & USB_OTG_ISOOUTDROP_FLAG)
101 {
102 usb_global_clear_interrupt(usbx, USB_OTG_ISOOUTDROP_FLAG);
103 }
104
105 }
106}
107
113void usbh_wakeup_handler(usbh_core_type *uhost)
114{
115 uhost->global_state = USBH_WAKEUP;
116}
117
123void usbh_sof_handler(usbh_core_type *uhost)
124{
125 uhost->timer ++;
126}
127
133void usbh_disconnect_handler(usbh_core_type *uhost)
134{
135 otg_global_type *usbx = uhost->usb_reg;
136
137 uint8_t i_index;
138
139 usb_host_disable(usbx);
140
141 uhost->conn_sts = 0;
142
143 uhost->global_state = USBH_DISCONNECT;
144
145 for(i_index = 0; i_index < USB_HOST_CHANNEL_NUM; i_index ++)
146 {
147 usbh_free_channel(uhost, i_index);
148 }
149 usbh_fsls_clksel(usbx, USB_HCFG_CLK_48M);
150}
151
158void usbh_hch_in_handler(usbh_core_type *uhost, uint8_t chn)
159{
160 otg_global_type *usbx = uhost->usb_reg;
161 otg_hchannel_type *usb_chh = USB_CHL(usbx, chn);
162 uint32_t hcint_value = usb_chh->hcint & usb_chh->hcintmsk;
163
164 if( hcint_value & USB_OTG_HC_ACK_FLAG)
165 {
166 usb_chh->hcint = USB_OTG_HC_ACK_FLAG;
167 }
168 else if(hcint_value & USB_OTG_HC_STALL_FLAG)
169 {
170 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
171 usb_chh->hcint = USB_OTG_HC_NAK_FLAG | USB_OTG_HC_STALL_FLAG;
172 uhost->hch[chn].state = HCH_STALL;
173 usb_hch_halt(usbx, chn);
174 }
175 else if(hcint_value & USB_OTG_HC_DTGLERR_FLAG)
176 {
177 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
178 usb_hch_halt(usbx, chn);
179 usb_chh->hcint = USB_OTG_HC_DTGLERR_FLAG | USB_OTG_HC_NAK_FLAG;
180 uhost->hch[chn].state = HCH_DATATGLERR;
181 }
182
183 else if(hcint_value & USB_OTG_HC_FRMOVRRUN_FLAG)
184 {
185 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
186 usb_hch_halt(usbx, chn);
187 usb_chh->hcint = USB_OTG_HC_FRMOVRRUN_FLAG;
188 }
189 else if(hcint_value & USB_OTG_HC_XFERC_FLAG)
190 {
191 uhost->hch[chn].state = HCH_XFRC;
192 usb_chh->hcint = USB_OTG_HC_XFERC_FLAG;
193
194 if(usb_chh->hcchar_bit.eptype == EPT_BULK_TYPE || usb_chh->hcchar_bit.eptype == EPT_CONTROL_TYPE)
195 {
196 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
197 usb_hch_halt(usbx, chn);
198 usb_chh->hcint = USB_OTG_HC_NAK_FLAG;
199 }
200 else if(usb_chh->hcchar_bit.eptype == EPT_INT_TYPE)
201 {
202 usb_chh->hcchar_bit.oddfrm = TRUE;
203 uhost->urb_state[chn] = URB_DONE;
204 }
205 else if(usb_chh->hcchar_bit.eptype == EPT_ISO_TYPE)
206 {
207 uhost->urb_state[chn] = URB_DONE;
208 }
209 uhost->hch[chn].toggle_in ^= 1;
210 }
211 else if(hcint_value & USB_OTG_HC_CHHLTD_FLAG)
212 {
213 usb_chh->hcintmsk_bit.chhltdmsk = FALSE;
214 if(uhost->hch[chn].state == HCH_XFRC )
215 {
216 uhost->urb_state[chn] = URB_DONE;
217 }
218 else if(uhost->hch[chn].state == HCH_STALL)
219 {
220 uhost->urb_state[chn] = URB_STALL;
221 }
222 else if(uhost->hch[chn].state == HCH_XACTERR ||
223 uhost->hch[chn].state == HCH_DATATGLERR)
224 {
225 uhost->err_cnt[chn] ++;
226 if(uhost->err_cnt[chn] > 3)
227 {
228 uhost->urb_state[chn] = URB_ERROR;
229 uhost->err_cnt[chn] = 0;
230 }
231 else
232 {
233 uhost->urb_state[chn] = URB_NOTREADY;
234 }
235 usb_chh->hcchar_bit.chdis = FALSE;
236 usb_chh->hcchar_bit.chena = TRUE;
237 }
238 else if(uhost->hch[chn].state == HCH_NAK)
239 {
240 usb_chh->hcchar_bit.chdis = FALSE;
241 usb_chh->hcchar_bit.chena = TRUE;
242 uhost->urb_state[chn] = URB_NOTREADY;
243 }
244 usb_chh->hcint = USB_OTG_HC_CHHLTD_FLAG;
245 }
246 else if(hcint_value & USB_OTG_HC_XACTERR_FLAG)
247 {
248 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
249 uhost->hch[chn].state = HCH_XACTERR;
250 usb_hch_halt(usbx, chn);
251 uhost->err_cnt[chn] ++;
252 usb_chh->hcint = USB_OTG_HC_XACTERR_FLAG;
253 }
254 else if(hcint_value & USB_OTG_HC_NAK_FLAG)
255 {
256 if(usb_chh->hcchar_bit.eptype == EPT_INT_TYPE)
257 {
258 uhost->err_cnt[chn] = 0;
259 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
260 usb_hch_halt(usbx, chn);
261 }
262 else if(usb_chh->hcchar_bit.eptype == EPT_BULK_TYPE ||
263 usb_chh->hcchar_bit.eptype == EPT_CONTROL_TYPE)
264 {
265 uhost->err_cnt[chn] = 0;
266 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
267 usb_chh->hcchar_bit.chdis = FALSE;
268 usb_chh->hcchar_bit.chena = TRUE;
269 }
270 uhost->hch[chn].state = HCH_NAK;
271 usb_chh->hcint = USB_OTG_HC_NAK_FLAG;
272 }
273 else if(hcint_value & USB_OTG_HC_BBLERR_FLAG)
274 {
275 usb_chh->hcint = USB_OTG_HC_BBLERR_FLAG;
276 }
277}
278
285void usbh_hch_out_handler(usbh_core_type *uhost, uint8_t chn)
286{
287 otg_global_type *usbx = uhost->usb_reg;
288 otg_hchannel_type *usb_chh = USB_CHL(usbx, chn);
289 uint32_t hcint_value = usb_chh->hcint & usb_chh->hcintmsk;
290
291 if( hcint_value & USB_OTG_HC_ACK_FLAG)
292 {
293 usb_chh->hcint = USB_OTG_HC_ACK_FLAG;
294 }
295 else if( hcint_value & USB_OTG_HC_FRMOVRRUN_FLAG)
296 {
297 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
298 usb_hch_halt(usbx, chn);
299 usb_chh->hcint = USB_OTG_HC_FRMOVRRUN_FLAG;
300 }
301 else if( hcint_value & USB_OTG_HC_XFERC_FLAG)
302 {
303 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
304 usb_hch_halt(usbx, chn);
305 uhost->hch[chn].state = HCH_XFRC;
306 usb_chh->hcint = USB_OTG_HC_XFERC_FLAG;
307 }
308 else if( hcint_value & USB_OTG_HC_STALL_FLAG)
309 {
310 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
311 usb_chh->hcint = USB_OTG_HC_STALL_FLAG;
312 uhost->hch[chn].state = HCH_STALL;
313 usb_hch_halt(usbx, chn);
314 }
315 else if( hcint_value & USB_OTG_HC_DTGLERR_FLAG)
316 {
317 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
318 usb_hch_halt(usbx, chn);
319 usb_chh->hcint = USB_OTG_HC_DTGLERR_FLAG | USB_OTG_HC_NAK_FLAG;
320 uhost->hch[chn].state = HCH_DATATGLERR;
321 }
322 else if( hcint_value & USB_OTG_HC_CHHLTD_FLAG)
323 {
324 usb_chh->hcintmsk_bit.chhltdmsk = FALSE;
325 if(uhost->hch[chn].state == HCH_XFRC)
326 {
327 uhost->urb_state[chn] = URB_DONE;
328 if(uhost->hch[chn].ept_type == EPT_BULK_TYPE ||
329 uhost->hch[chn].ept_type == EPT_INT_TYPE)
330 {
331 uhost->hch[chn].toggle_out ^= 1;
332 }
333 }
334 else if(uhost->hch[chn].state == HCH_NAK)
335 {
336 uhost->urb_state[chn] = URB_NOTREADY;
337 }
338 else if(uhost->hch[chn].state == HCH_STALL)
339 {
340 uhost->hch[chn].urb_sts = URB_STALL;
341 }
342 else if(uhost->hch[chn].state == HCH_XACTERR ||
343 uhost->hch[chn].state == HCH_DATATGLERR)
344 {
345 uhost->err_cnt[chn] ++;
346 if(uhost->err_cnt[chn] > 3)
347 {
348 uhost->urb_state[chn] = URB_ERROR;
349 uhost->err_cnt[chn] = 0;
350 }
351 else
352 {
353 uhost->urb_state[chn] = URB_NOTREADY;
354 }
355
356 usb_chh->hcchar_bit.chdis = FALSE;
357 usb_chh->hcchar_bit.chena = TRUE;
358 }
359 usb_chh->hcint = USB_OTG_HC_CHHLTD_FLAG;
360 }
361 else if( hcint_value & USB_OTG_HC_XACTERR_FLAG)
362 {
363 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
364 uhost->err_cnt[chn] ++;
365 uhost->hch[chn].state = HCH_XACTERR;
366 usb_hch_halt(usbx, chn);
367 usb_chh->hcint = USB_OTG_HC_XACTERR_FLAG | USB_OTG_HC_NAK_FLAG;
368 }
369 else if( hcint_value & USB_OTG_HC_NAK_FLAG)
370 {
371 usb_chh->hcintmsk_bit.chhltdmsk = TRUE;
372 uhost->err_cnt[chn] = 0;
373 usb_hch_halt(usbx, chn);
374 uhost->hch[chn].state = HCH_NAK;
375 usb_chh->hcint = USB_OTG_HC_NAK_FLAG;
376 }
377}
378
384void usbh_hch_handler(usbh_core_type *uhost)
385{
386 otg_global_type *usbx = uhost->usb_reg;
387 otg_host_type *usb_host = OTG_HOST(usbx);
388 uint32_t intsts, i_index;
389
390 intsts = usb_host->haint & 0xFFFF;
391 for(i_index = 0; i_index < 16; i_index ++)
392 {
393 if(intsts & (1 << i_index))
394 {
395 if(USB_CHL(usbx, i_index)->hcchar_bit.eptdir)
396 {
397 //hc in
398 usbh_hch_in_handler(uhost, i_index);
399 }
400 else
401 {
402 //hc out
403 usbh_hch_out_handler(uhost, i_index);
404 }
405 }
406 }
407}
408
414void usbh_rx_qlvl_handler(usbh_core_type *uhost)
415{
416 uint8_t chn;
417 uint32_t pktsts;
418 uint32_t pktcnt;
419 uint32_t tmp;
420 otg_hchannel_type *ch;
421 otg_global_type *usbx = uhost->usb_reg;
422
423 usbx->gintmsk_bit.rxflvlmsk = 0;
424
425 tmp = usbx->grxstsp;
426 chn = tmp & 0xF;
427 pktsts = (tmp >> 17) & 0xF;
428 pktcnt = (tmp >> 4) & 0x7FF;
429 ch = USB_CHL(usbx, chn);
430 switch(pktsts)
431 {
432 case PKTSTS_IN_DATA_PACKET_RECV:
433 if(pktcnt > 0 && (uhost->hch[chn].trans_buf) != 0)
434 {
435 usb_read_packet(usbx, uhost->hch[chn].trans_buf, chn, pktcnt);
436 uhost->hch[chn].trans_buf += pktcnt;
437 uhost->hch[chn].trans_count += pktcnt;
438
439 if(ch->hctsiz_bit.pktcnt > 0)
440 {
441 ch->hcchar_bit.chdis = FALSE;
442 ch->hcchar_bit.chena = TRUE;
443 uhost->hch[chn].toggle_in ^= 1;
444 }
445 }
446 break;
447 case PKTSTS_IN_TRANSFER_COMPLETE:
448 break;
449 case PKTSTS_DATA_BIT_ERROR:
450 break;
451 case PKTSTS_CHANNEL_STOP:
452 break;
453 default:
454 break;
455
456 }
457 usbx->gintmsk_bit.rxflvlmsk = 1;
458}
459
465void usbh_port_handler(usbh_core_type *uhost)
466{
467 otg_global_type *usbx = uhost->usb_reg;
468 otg_host_type *usb_host = OTG_HOST(usbx);
469
470 uint32_t prt = 0, prt_0;
471
472 prt = usb_host->hprt;
473 prt_0 = prt;
474
475 prt_0 &= ~(USB_OTG_HPRT_PRTENA | USB_OTG_HPRT_PRTENCHNG |
476 USB_OTG_HPRT_PRTOVRCACT | USB_OTG_HPRT_PRTCONDET);
477 if(prt & USB_OTG_HPRT_PRTCONDET)
478 {
479 if(prt & USB_OTG_HPRT_PRTCONSTS)
480 {
481 /* connect callback */
482 uhost->conn_sts = 1;
483 }
484 prt_0 |= USB_OTG_HPRT_PRTCONDET;
485 }
486
487 if(prt & USB_OTG_HPRT_PRTENCHNG)
488 {
489 prt_0 |= USB_OTG_HPRT_PRTENCHNG;
490
491 if(prt & USB_OTG_HPRT_PRTENA)
492 {
493 if((prt & USB_OTG_HPRT_PRTSPD) == (USB_PRTSPD_LOW_SPEED << 17))
494 {
495 usbh_fsls_clksel(usbx, USB_HCFG_CLK_6M);
496 }
497 else
498 {
499 usbh_fsls_clksel(usbx, USB_HCFG_CLK_48M);
500 }
501 /* connect callback */
502 uhost->port_enable = 1;
503 }
504 else
505 {
506 /* clean up hprt */
507 uhost->port_enable = 0;
508 }
509 }
510
511 if(prt & USB_OTG_HPRT_PRTOVRCACT)
512 {
513 prt_0 |= USB_OTG_HPRT_PRTOVRCACT;
514 }
515
516 usb_host->hprt = prt_0;
517}
518
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
EPT_ISO_TYPE
@ EPT_ISO_TYPE
Definition: at32f435_437_usb.h:347
EPT_INT_TYPE
@ EPT_INT_TYPE
Definition: at32f435_437_usb.h:349
EPT_CONTROL_TYPE
@ EPT_CONTROL_TYPE
Definition: at32f435_437_usb.h:346
EPT_BULK_TYPE
@ EPT_BULK_TYPE
Definition: at32f435_437_usb.h:348
OTG_HOST
#define OTG_HOST(usbx)
Definition: at32f435_437_usb.h:1332
USB_CHL
#define USB_CHL(usbx, n)
Definition: at32f435_437_usb.h:1333
usb_global_clear_interrupt
void usb_global_clear_interrupt(otg_global_type *usbx, uint32_t flag)
clear the global interrupt flag
Definition: at32f435_437_usb.c:255
usbh_fsls_clksel
void usbh_fsls_clksel(otg_global_type *usbx, uint8_t clk)
select full or low speed clock
Definition: at32f435_437_usb.c:1068
usb_global_get_all_interrupt
uint32_t usb_global_get_all_interrupt(otg_global_type *usbx)
get all global core interrupt flag
Definition: at32f435_437_usb.c:216
usb_hch_halt
void usb_hch_halt(otg_global_type *usbx, uint8_t chn)
halt channel
Definition: at32f435_437_usb.c:1012
usb_read_packet
void usb_read_packet(otg_global_type *usbx, uint8_t *pusr_buf, uint16_t num, uint16_t nbytes)
read data from usb buffer to user buffer
Definition: at32f435_437_usb.c:445
usb_host_disable
void usb_host_disable(otg_global_type *usbx)
disable host
Definition: at32f435_437_usb.c:968
USB_OTG_DISCON_FLAG
#define USB_OTG_DISCON_FLAG
Definition: at32f435_437_usb.h:107
USB_OTG_MODEMIS_FLAG
#define USB_OTG_MODEMIS_FLAG
Definition: at32f435_437_usb.h:86
USB_OTG_WKUP_FLAG
#define USB_OTG_WKUP_FLAG
Definition: at32f435_437_usb.h:108
USB_OTG_ISOOUTDROP_FLAG
#define USB_OTG_ISOOUTDROP_FLAG
Definition: at32f435_437_usb.h:97
USB_OTG_HCH_FLAG
#define USB_OTG_HCH_FLAG
Definition: at32f435_437_usb.h:104
USB_OTG_PTXFEMP_FLAG
#define USB_OTG_PTXFEMP_FLAG
Definition: at32f435_437_usb.h:105
USB_OTG_INCOMISOIN_FLAG
#define USB_OTG_INCOMISOIN_FLAG
Definition: at32f435_437_usb.h:101
USB_OTG_PRT_FLAG
#define USB_OTG_PRT_FLAG
Definition: at32f435_437_usb.h:103
USB_OTG_RXFLVL_FLAG
#define USB_OTG_RXFLVL_FLAG
Definition: at32f435_437_usb.h:89
USB_OTG_INCOMPIP_INCOMPISOOUT_FLAG
#define USB_OTG_INCOMPIP_INCOMPISOOUT_FLAG
Definition: at32f435_437_usb.h:102
USB_OTG_SOF_FLAG
#define USB_OTG_SOF_FLAG
Definition: at32f435_437_usb.h:88
PKTSTS_DATA_BIT_ERROR
#define PKTSTS_DATA_BIT_ERROR
Definition: at32f435_437_usb.h:140
PKTSTS_IN_TRANSFER_COMPLETE
#define PKTSTS_IN_TRANSFER_COMPLETE
Definition: at32f435_437_usb.h:139
PKTSTS_CHANNEL_STOP
#define PKTSTS_CHANNEL_STOP
Definition: at32f435_437_usb.h:141
PKTSTS_IN_DATA_PACKET_RECV
#define PKTSTS_IN_DATA_PACKET_RECV
usb host packet status
Definition: at32f435_437_usb.h:138
USB_OTG_HC_CHHLTD_FLAG
#define USB_OTG_HC_CHHLTD_FLAG
Definition: at32f435_437_usb.h:229
USB_OTG_HC_STALL_FLAG
#define USB_OTG_HC_STALL_FLAG
Definition: at32f435_437_usb.h:230
USB_OTG_HPRT_PRTSPD
#define USB_OTG_HPRT_PRTSPD
Definition: at32f435_437_usb.h:181
USB_OTG_HPRT_PRTENA
#define USB_OTG_HPRT_PRTENA
Definition: at32f435_437_usb.h:172
USB_OTG_HC_XFERC_FLAG
#define USB_OTG_HC_XFERC_FLAG
usb host channel interrupt flag
Definition: at32f435_437_usb.h:228
USB_OTG_HC_FRMOVRRUN_FLAG
#define USB_OTG_HC_FRMOVRRUN_FLAG
Definition: at32f435_437_usb.h:236
USB_OTG_HPRT_PRTCONSTS
#define USB_OTG_HPRT_PRTCONSTS
usb host port status
Definition: at32f435_437_usb.h:170
USB_OTG_HC_XACTERR_FLAG
#define USB_OTG_HC_XACTERR_FLAG
Definition: at32f435_437_usb.h:234
USB_OTG_HC_NAK_FLAG
#define USB_OTG_HC_NAK_FLAG
Definition: at32f435_437_usb.h:231
USB_HCFG_CLK_6M
#define USB_HCFG_CLK_6M
Definition: at32f435_437_usb.h:165
USB_PRTSPD_LOW_SPEED
#define USB_PRTSPD_LOW_SPEED
Definition: at32f435_437_usb.h:188
USB_HCFG_CLK_48M
#define USB_HCFG_CLK_48M
Definition: at32f435_437_usb.h:164
USB_OTG_HC_BBLERR_FLAG
#define USB_OTG_HC_BBLERR_FLAG
Definition: at32f435_437_usb.h:235
USB_OTG_HC_ACK_FLAG
#define USB_OTG_HC_ACK_FLAG
Definition: at32f435_437_usb.h:232
USB_OTG_HPRT_PRTOVRCACT
#define USB_OTG_HPRT_PRTOVRCACT
Definition: at32f435_437_usb.h:174
USB_OTG_HPRT_PRTENCHNG
#define USB_OTG_HPRT_PRTENCHNG
Definition: at32f435_437_usb.h:173
USB_OTG_HC_DTGLERR_FLAG
#define USB_OTG_HC_DTGLERR_FLAG
Definition: at32f435_437_usb.h:237
USB_OTG_HPRT_PRTCONDET
#define USB_OTG_HPRT_PRTCONDET
Definition: at32f435_437_usb.h:171
usbh_free_channel
void usbh_free_channel(usbh_core_type *uhost, uint8_t index)
usb host free channel
Definition: usbh_core.c:57
usbh_port_handler
void usbh_port_handler(usbh_core_type *uhost)
usb host port request handler
Definition: usbh_int.c:465
usbh_sof_handler
void usbh_sof_handler(usbh_core_type *uhost)
usb host sof handler
Definition: usbh_int.c:123
usbh_hch_in_handler
void usbh_hch_in_handler(usbh_core_type *uhost, uint8_t chn)
usb host in transfer request handler
Definition: usbh_int.c:158
usbh_rx_qlvl_handler
void usbh_rx_qlvl_handler(usbh_core_type *uhost)
usb host rx buffer not empty request handler
Definition: usbh_int.c:414
usbh_irq_handler
void usbh_irq_handler(otg_core_type *otgdev)
usb host interrupt handler
Definition: usbh_int.c:47
usbh_wakeup_handler
void usbh_wakeup_handler(usbh_core_type *uhost)
usb host wakeup handler
Definition: usbh_int.c:113
usbh_hch_handler
void usbh_hch_handler(usbh_core_type *uhost)
usb host channel request handler
Definition: usbh_int.c:384
usbh_hch_out_handler
void usbh_hch_out_handler(usbh_core_type *uhost, uint8_t chn)
usb host out transfer request handler
Definition: usbh_int.c:285
usbh_disconnect_handler
void usbh_disconnect_handler(usbh_core_type *uhost)
usb host disconnect handler
Definition: usbh_int.c:133
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
otg_core_type::usb_reg
usb_reg_type * usb_reg
Definition: usb_core.h:93
otg_global_type
Definition: at32f435_437_usb.h:474
otg_global_type::curmode
__IO uint32_t curmode
Definition: at32f435_437_usb.h:568
otg_global_type::rxflvlmsk
__IO uint32_t rxflvlmsk
Definition: at32f435_437_usb.h:612
otg_global_type::gintsts_bit
struct otg_global_type::@1159::@1186 gintsts_bit
otg_global_type::grxstsp
__IO uint32_t grxstsp
Definition: at32f435_437_usb.h:662
otg_global_type::gintmsk_bit
struct otg_global_type::@1161::@1187 gintmsk_bit
otg_hchannel_type
Definition: at32f435_437_usb.h:890
otg_hchannel_type::hcint
__IO uint32_t hcint
Definition: at32f435_437_usb.h:935
otg_hchannel_type::chhltdmsk
__IO uint32_t chhltdmsk
Definition: at32f435_437_usb.h:962
otg_hchannel_type::oddfrm
__IO uint32_t oddfrm
Definition: at32f435_437_usb.h:907
otg_hchannel_type::chena
__IO uint32_t chena
Definition: at32f435_437_usb.h:909
otg_hchannel_type::chdis
__IO uint32_t chdis
Definition: at32f435_437_usb.h:908
otg_hchannel_type::hcintmsk
__IO uint32_t hcintmsk
Definition: at32f435_437_usb.h:958
otg_hchannel_type::hcchar_bit
struct otg_hchannel_type::@1218::@1228 hcchar_bit
otg_hchannel_type::hcintmsk_bit
struct otg_hchannel_type::@1224::@1231 hcintmsk_bit
otg_hchannel_type::hctsiz_bit
struct otg_hchannel_type::@1226::@1232 hctsiz_bit
otg_hchannel_type::eptype
__IO uint32_t eptype
Definition: at32f435_437_usb.h:904
otg_hchannel_type::pktcnt
__IO uint32_t pktcnt
Definition: at32f435_437_usb.h:985
otg_host_type
Definition: at32f435_437_usb.h:776
otg_host_type::hprt
__IO uint32_t hprt
Definition: at32f435_437_usb.h:866
otg_host_type::haint
__IO uint32_t haint
Definition: at32f435_437_usb.h:838
usbh_int.h
usb header file


AT32F435/437 Firmwary Library: usbh_int.h Source File

  • middlewares
  • usb_drivers
  • inc
usbh_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USBH_INT_H
29#define __USBH_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
47/* includes ------------------------------------------------------------------*/
48#include "usbh_core.h"
49#include "usb_core.h"
50void usbh_irq_handler(otg_core_type *hdev);
51void usbh_hch_handler(usbh_core_type *uhost);
52void usbh_port_handler(usbh_core_type *uhost);
53void usbh_disconnect_handler(usbh_core_type *uhost);
54void usbh_hch_in_handler(usbh_core_type *uhost, uint8_t chn);
55void usbh_hch_out_handler(usbh_core_type *uhost, uint8_t chn);
56void usbh_rx_qlvl_handler(usbh_core_type *uhost);
57void usbh_wakeup_handler(usbh_core_type *uhost);
58void usbh_sof_handler(usbh_core_type *uhost);
59
72#ifdef __cplusplus
73}
74#endif
75
76#endif
77
usbh_port_handler
void usbh_port_handler(usbh_core_type *uhost)
usb host port request handler
Definition: usbh_int.c:465
usbh_sof_handler
void usbh_sof_handler(usbh_core_type *uhost)
usb host sof handler
Definition: usbh_int.c:123
usbh_hch_in_handler
void usbh_hch_in_handler(usbh_core_type *uhost, uint8_t chn)
usb host in transfer request handler
Definition: usbh_int.c:158
usbh_rx_qlvl_handler
void usbh_rx_qlvl_handler(usbh_core_type *uhost)
usb host rx buffer not empty request handler
Definition: usbh_int.c:414
usbh_irq_handler
void usbh_irq_handler(otg_core_type *hdev)
usb host interrupt handler
Definition: usbh_int.c:47
usbh_wakeup_handler
void usbh_wakeup_handler(usbh_core_type *uhost)
usb host wakeup handler
Definition: usbh_int.c:113
usbh_hch_handler
void usbh_hch_handler(usbh_core_type *uhost)
usb host channel request handler
Definition: usbh_int.c:384
usbh_hch_out_handler
void usbh_hch_out_handler(usbh_core_type *uhost, uint8_t chn)
usb host out transfer request handler
Definition: usbh_int.c:285
usbh_disconnect_handler
void usbh_disconnect_handler(usbh_core_type *uhost)
usb host disconnect handler
Definition: usbh_int.c:133
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbh_core.h
usb host core header file


AT32F435/437 Firmwary Library: usbh_msc_bot_scsi.c Source File

  • middlewares
  • usbh_class
  • usbh_msc
usbh_msc_bot_scsi.c
Go to the documentation of this file.
1
26#include "usbh_msc_bot_scsi.h"
27#include "usbh_msc_class.h"
28#include "usb_conf.h"
29#include "usbh_core.h"
30#include "usbh_ctrl.h"
31
45static usb_sts_type usbh_bot_cbw(msc_bot_cbw_type *cbw, uint32_t data_length, uint8_t cmd_len, uint8_t flag);
46static usb_sts_type usbh_cmd_inquiry(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun);
47static usb_sts_type usbh_cmd_capacity10(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun);
48static usb_sts_type usbh_cmd_test_unit_ready(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun);
49static usb_sts_type usbh_cmd_requset_sense(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun);
50static usb_sts_type usbh_cmd_write(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun,
51 uint32_t data_len, uint32_t address, uint8_t *buffer);
52static usb_sts_type usbh_cmd_read(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun,
53 uint32_t data_len, uint32_t address, uint8_t *buffer);
54
63static usb_sts_type usbh_bot_cbw(msc_bot_cbw_type *cbw, uint32_t data_length, uint8_t cmd_len, uint8_t flag)
64{
65 uint8_t i_index;
66 cbw->dCBWSignature = MSC_CBW_SIGNATURE;
67 cbw->dCBWTag = MSC_CBW_TAG;
68 cbw->dCBWDataTransferLength = data_length;
69 cbw->bmCBWFlags = flag;
70 cbw->bCBWCBLength = cmd_len;
71 for(i_index = 0; i_index < MSC_CBW_CB_LEN; i_index ++)
72 {
73 cbw->CBWCB[i_index] = 0x00;
74 }
75 return USB_OK;
76}
77
85static usb_sts_type usbh_cmd_inquiry(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun)
86{
87 usbh_msc_type *msc_struct = (usbh_msc_type *)bot_trans->msc_struct;
88 cmd[0] = MSC_OPCODE_INQUIRY;
89 cmd[1] = lun << 5;
90 cmd[4] = MSC_INQUIRY_DATA_LEN;
91
92 bot_trans->data = (uint8_t *)&msc_struct->l_unit_n[lun].inquiry;
93 return USB_OK;
94}
95
103static usb_sts_type usbh_cmd_capacity10(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun)
104{
105 usbh_msc_type *msc_struct = (usbh_msc_type *)bot_trans->msc_struct;
106 cmd[0] = MSC_OPCODE_CAPACITY;
107 cmd[1] = lun << 5;
108
109 msc_struct->bot_trans.data = (uint8_t *)bot_trans->buffer;
110 return USB_OK;
111}
112
120static usb_sts_type usbh_cmd_test_unit_ready(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun)
121{
122 cmd[0] = MSC_OPCODE_TEST_UNIT_READY;
123 cmd[1] = lun << 5;
124
125 return USB_OK;
126}
127
135static usb_sts_type usbh_cmd_requset_sense(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun)
136{
137 cmd[0] = MSC_OPCODE_REQUEST_SENSE;
138 cmd[1] = lun << 5;
139 cmd[4] = MSC_REQUEST_SENSE_DATA_LEN;
140
141 bot_trans->data = bot_trans->buffer;
142 return USB_OK;
143}
144
155static usb_sts_type usbh_cmd_write(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun,
156 uint32_t data_len, uint32_t address, uint8_t *buffer)
157{
158 cmd[0] = MSC_OPCODE_WRITE10;
159 cmd[1] = lun << 5;
160 cmd[2] = (uint8_t)(address >> 24);
161 cmd[3] = (uint8_t)(address >> 16);
162 cmd[4] = (uint8_t)(address >> 8);
163 cmd[5] = (uint8_t)(address & 0xFF);
164
165 cmd[7] = data_len >> 8;
166 cmd[8] = data_len;
167
168 bot_trans->data = buffer;
169 return USB_OK;
170}
171
182static usb_sts_type usbh_cmd_read(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun,
183 uint32_t data_len, uint32_t address, uint8_t *buffer)
184{
185 cmd[0] = MSC_OPCODE_READ10;
186 cmd[1] = lun << 5;
187 cmd[2] = (uint8_t)(address >> 24);
188 cmd[3] = (uint8_t)(address >> 16);
189 cmd[4] = (uint8_t)(address >> 8);
190 cmd[5] = (uint8_t)(address & 0xFF);
191
192 cmd[7] = data_len >> 8;
193 cmd[8] = data_len;
194
195 bot_trans->data = buffer;
196 return USB_OK;
197}
198
205 usb_sts_type usbh_check_csw(void *uhost, msc_bot_cbw_type *cbw, msc_bot_csw_type *csw)
206{
207 usb_sts_type status = USB_FAIL;
208 if(csw->dCBWSignature == MSC_CSW_SIGNATURE)
209 {
210 if(csw->dCBWTag == cbw->dCBWTag)
211 {
212 if(csw->bCSWStatus == 0)
213 {
214 status = USB_OK;
215 }
216 }
217 }
218 return status;
219}
220
227 usb_sts_type usb_bot_request(void *uhost, msc_bot_trans_type *bot_trans)
228{
229 usb_sts_type status = USB_WAIT;
230 urb_sts_type urb_status;
231 usb_sts_type clr_status;
232 usbh_core_type *puhost = (usbh_core_type *)uhost;
233 usbh_msc_type *msc_struct = (usbh_msc_type *)bot_trans->msc_struct;
234 switch(bot_trans->bot_state)
235 {
236 case BOT_STATE_SEND_CBW:
237 usbh_bulk_send(puhost, msc_struct->chout, (uint8_t *)(&bot_trans->cbw), MSC_CBW_LEN);
238 bot_trans->bot_state = BOT_STATE_SEND_CBW_WAIT;
239 break;
240
241 case BOT_STATE_SEND_CBW_WAIT:
242 urb_status = usbh_get_urb_status(puhost, msc_struct->chout);
243 if(urb_status == URB_DONE)
244 {
245 if(bot_trans->cbw.dCBWDataTransferLength != 0)
246 {
247 if(bot_trans->cbw.bmCBWFlags == MSC_CBW_FLAG_IN)
248 {
249 bot_trans->bot_state = BOT_STATE_DATA_IN;
250 }
251 else
252 {
253 bot_trans->bot_state = BOT_STATE_DATA_OUT;
254 }
255 }
256 else
257 {
258 bot_trans->bot_state = BOT_STATE_RECV_CSW;
259 }
260 }
261 else if(urb_status == URB_NOTREADY)
262 {
263 bot_trans->bot_state = BOT_STATE_SEND_CBW;
264 }
265 else if(urb_status == URB_STALL)
266 {
267 bot_trans->bot_state = BOT_STATE_ERROR_OUT;
268 }
269 break;
270
271 case BOT_STATE_DATA_IN:
272 usbh_bulk_recv(puhost, msc_struct->chin, bot_trans->data,
273 msc_struct->in_maxpacket);
274 bot_trans->bot_state = BOT_STATE_DATA_IN_WAIT;
275 break;
276
277 case BOT_STATE_DATA_IN_WAIT:
278 urb_status = usbh_get_urb_status(puhost, msc_struct->chin);
279 if(urb_status == URB_DONE)
280 {
281 if(bot_trans->cbw.dCBWDataTransferLength > msc_struct->in_maxpacket)
282 {
283 bot_trans->data += msc_struct->in_maxpacket;
284 bot_trans->cbw.dCBWDataTransferLength -= msc_struct->in_maxpacket;
285 }
286 else
287 {
288 bot_trans->cbw.dCBWDataTransferLength = 0;
289 }
290 if(bot_trans->cbw.dCBWDataTransferLength > 0)
291 {
292 usbh_bulk_recv(puhost, msc_struct->chin, bot_trans->data,
293 msc_struct->in_maxpacket);
294 }
295 else
296 {
297 bot_trans->bot_state = BOT_STATE_RECV_CSW;
298 }
299 }
300 else if(urb_status == URB_STALL)
301 {
302 bot_trans->bot_state = BOT_STATE_ERROR_IN;
303 }
304
305 break;
306
307 case BOT_STATE_DATA_OUT:
308 usbh_bulk_send(puhost, msc_struct->chout, bot_trans->data, msc_struct->out_maxpacket);
309 bot_trans->bot_state = BOT_STATE_DATA_OUT_WAIT;
310 break;
311
312 case BOT_STATE_DATA_OUT_WAIT:
313 urb_status = usbh_get_urb_status(puhost, msc_struct->chout);
314 if(urb_status == URB_DONE)
315 {
316 if(bot_trans->cbw.dCBWDataTransferLength > msc_struct->out_maxpacket)
317 {
318 bot_trans->data += msc_struct->out_maxpacket;
319 bot_trans->cbw.dCBWDataTransferLength -= msc_struct->out_maxpacket;
320 }
321 else
322 {
323 bot_trans->cbw.dCBWDataTransferLength = 0;
324 }
325 if(bot_trans->cbw.dCBWDataTransferLength > 0)
326 {
327 usbh_bulk_send(puhost, msc_struct->chout, bot_trans->data, msc_struct->out_maxpacket);
328 }
329 else
330 {
331 bot_trans->bot_state = BOT_STATE_RECV_CSW;
332 }
333 }
334 else if(urb_status == URB_NOTREADY)
335 {
336 bot_trans->bot_state = BOT_STATE_DATA_OUT;
337 }
338 else if(urb_status == URB_STALL)
339 {
340 bot_trans->bot_state = BOT_STATE_ERROR_OUT;
341 }
342 break;
343
344 case BOT_STATE_RECV_CSW:
345 usbh_bulk_recv(puhost, msc_struct->chin, (uint8_t *)&bot_trans->csw,
346 MSC_CSW_LEN);
347 bot_trans->bot_state = BOT_STATE_RECV_CSW_WAIT;
348
349 break;
350 case BOT_STATE_RECV_CSW_WAIT:
351 urb_status = usbh_get_urb_status(puhost, msc_struct->chin);
352 if(urb_status == URB_DONE)
353 {
354 bot_trans->bot_state = BOT_STATE_SEND_CBW;
355 bot_trans->cmd_state = CMD_STATE_SEND;
356 status = usbh_check_csw(uhost, &bot_trans->cbw, &bot_trans->csw);
357 }
358 else if(urb_status == URB_STALL)
359 {
360 bot_trans->bot_state = BOT_STATE_ERROR_IN;
361 }
362
363 break;
364 case BOT_STATE_ERROR_IN:
365 clr_status = usbh_clear_ept_feature(puhost, msc_struct->eptin, msc_struct->chin);
366 if(clr_status == USB_OK)
367 {
368 bot_trans->bot_state = BOT_STATE_RECV_CSW;
369 usbh_set_toggle(puhost, msc_struct->chin, 0);
370 }
371
372 break;
373 case BOT_STATE_ERROR_OUT:
374 clr_status = usbh_clear_ept_feature(puhost, msc_struct->eptout, msc_struct->chout);
375 if(clr_status == USB_OK)
376 {
377 usbh_set_toggle(puhost, msc_struct->chout, 1 - puhost->hch[msc_struct->chout].toggle_out);
378 usbh_set_toggle(puhost, msc_struct->chin, 0);
379 bot_trans->bot_state = BOT_STATE_ERROR_IN;
380 }
381 break;
382 case BOT_STATE_COMPLETE:
383 break;
384
385 default:
386 break;
387 }
388
389 return status;
390}
391
400 usb_sts_type usbh_msc_bot_scsi_get_inquiry(void *uhost, msc_bot_trans_type *bot_trans,
401 uint8_t lun, msc_scsi_data_inquiry *inquiry)
402{
403 usb_sts_type status = USB_WAIT;
404 switch(bot_trans->cmd_state)
405 {
406 case CMD_STATE_SEND:
407 usbh_bot_cbw(&bot_trans->cbw, MSC_INQUIRY_DATA_LEN, MSC_INQUIRY_CMD_LEN, MSC_CBW_FLAG_IN);
408 bot_trans->cbw.bCBWLUN = lun;
409 usbh_cmd_inquiry(bot_trans, bot_trans->cbw.CBWCB, lun);
410 bot_trans->cmd_state = CMD_STATE_WAIT;
411 bot_trans->bot_state = BOT_STATE_SEND_CBW;
412 break;
413
414 case CMD_STATE_WAIT:
415 status = usb_bot_request(uhost, bot_trans);
416 if(status == USB_OK)
417 {
418 bot_trans->cmd_state = CMD_STATE_SEND;
419 }
420 if(status == USB_FAIL)
421 {
422 bot_trans->cmd_state = CMD_STATE_SEND;
423 }
424 break;
425 default:
426 break;
427 }
428 return status;
429}
430
439 usb_sts_type usbh_msc_bot_scsi_capacity(void *uhost, msc_bot_trans_type *bot_trans,
440 uint8_t lun, msc_scsi_data_capacity *capacity)
441{
442 usb_sts_type status = USB_WAIT;
443 switch(bot_trans->cmd_state)
444 {
445 case CMD_STATE_SEND:
446 usbh_bot_cbw(&bot_trans->cbw, MSC_CAPACITY10_DATA_LEN, MSC_CAPACITY10_CMD_LEN, MSC_CBW_FLAG_IN);
447 bot_trans->cbw.bCBWLUN = lun;
448 usbh_cmd_capacity10(bot_trans, bot_trans->cbw.CBWCB, lun);
449 bot_trans->cmd_state = CMD_STATE_WAIT;
450 bot_trans->bot_state = BOT_STATE_SEND_CBW;
451 break;
452
453 case CMD_STATE_WAIT:
454 status = usb_bot_request(uhost, bot_trans);
455 if(status == USB_OK)
456 {
457 capacity->blk_nbr = bot_trans->buffer[3] | bot_trans->buffer[2] << 8 |
458 bot_trans->buffer[1] << 16 | bot_trans->buffer[0] << 24;
459 capacity->blk_size = bot_trans->buffer[7] | bot_trans->buffer[6] << 8 ;
460 bot_trans->cmd_state = CMD_STATE_SEND;
461 }
462 if(status == USB_FAIL)
463 {
464 bot_trans->cmd_state = CMD_STATE_SEND;
465 }
466 break;
467 default:
468 break;
469 }
470 return status;
471}
472
480 usb_sts_type usbh_msc_bot_scsi_test_unit_ready(void *uhost, msc_bot_trans_type *bot_trans,
481 uint8_t lun)
482{
483 usb_sts_type status = USB_WAIT;
484 switch(bot_trans->cmd_state)
485 {
486 case CMD_STATE_SEND:
487 usbh_bot_cbw(&bot_trans->cbw, MSC_TEST_UNIT_READY_DATA_LEN,
488 MSC_TEST_UNIT_READY_CMD_LEN, MSC_CBW_FLAG_OUT);
489 bot_trans->cbw.bCBWLUN = lun;
490 usbh_cmd_test_unit_ready(bot_trans, bot_trans->cbw.CBWCB, lun);
491 bot_trans->cmd_state = CMD_STATE_WAIT;
492 bot_trans->bot_state = BOT_STATE_SEND_CBW;
493 break;
494
495 case CMD_STATE_WAIT:
496 status = usb_bot_request(uhost, bot_trans);
497 if(status == USB_OK)
498 {
499 bot_trans->cmd_state = CMD_STATE_SEND;
500 }
501 if(status == USB_FAIL)
502 {
503 bot_trans->cmd_state = CMD_STATE_SEND;
504 }
505 break;
506 default:
507 break;
508 }
509 return status;
510}
511
519 usb_sts_type usbh_msc_bot_scsi_request_sense(void *uhost, msc_bot_trans_type *bot_trans,
520 uint8_t lun)
521{
522 usb_sts_type status = USB_WAIT;
523 switch(bot_trans->cmd_state)
524 {
525 case CMD_STATE_SEND:
526 usbh_bot_cbw(&bot_trans->cbw, MSC_REQUEST_SENSE_DATA_LEN,
527 MSC_REQUEST_SENSE_CMD_LEN, MSC_CBW_FLAG_IN);
528 bot_trans->cbw.bCBWLUN = lun;
529 usbh_cmd_requset_sense(bot_trans, bot_trans->cbw.CBWCB, lun);
530 bot_trans->cmd_state = CMD_STATE_WAIT;
531 bot_trans->bot_state = BOT_STATE_SEND_CBW;
532 break;
533
534 case CMD_STATE_WAIT:
535 status = usb_bot_request(uhost, bot_trans);
536 if(status == USB_OK)
537 {
538 bot_trans->cmd_state = CMD_STATE_SEND;
539 }
540 if(status == USB_FAIL)
541 {
542 bot_trans->cmd_state = CMD_STATE_SEND;
543 }
544 break;
545 default:
546 break;
547 }
548 return status;
549}
550
561 usb_sts_type usbh_msc_bot_scsi_write(void *uhost, msc_bot_trans_type *bot_trans,
562 uint32_t address, uint8_t *write_data,
563 uint32_t write_len, uint8_t lun)
564{
565 usb_sts_type status = USB_WAIT;
566 switch(bot_trans->cmd_state)
567 {
568 case CMD_STATE_SEND:
569 usbh_bot_cbw(&bot_trans->cbw, write_len * 512,
570 MSC_WRITE_CMD_LEN, MSC_CBW_FLAG_OUT);
571 bot_trans->cbw.bCBWLUN = lun;
572 usbh_cmd_write(bot_trans, bot_trans->cbw.CBWCB, lun, write_len, address, write_data);
573 bot_trans->cmd_state = CMD_STATE_WAIT;
574 bot_trans->bot_state = BOT_STATE_SEND_CBW;
575 break;
576
577 case CMD_STATE_WAIT:
578 status = usb_bot_request(uhost, bot_trans);
579 if(status == USB_OK)
580 {
581 bot_trans->cmd_state = CMD_STATE_SEND;
582 }
583 if(status == USB_FAIL)
584 {
585 bot_trans->cmd_state = CMD_STATE_SEND;
586 }
587 break;
588 default:
589 break;
590 }
591 return status;
592}
593
604 usb_sts_type usbh_msc_bot_scsi_read(void *uhost, msc_bot_trans_type *bot_trans,
605 uint32_t address, uint8_t *read_data,
606 uint32_t read_len, uint8_t lun)
607{
608 usb_sts_type status = USB_WAIT;
609 switch(bot_trans->cmd_state)
610 {
611 case CMD_STATE_SEND:
612 usbh_bot_cbw(&bot_trans->cbw, read_len * 512,
613 MSC_READ_CMD_LEN, MSC_CBW_FLAG_IN);
614 bot_trans->cbw.bCBWLUN = lun;
615 usbh_cmd_read(bot_trans, bot_trans->cbw.CBWCB, lun, read_len, address, read_data);
616 bot_trans->cmd_state = CMD_STATE_WAIT;
617 bot_trans->bot_state = BOT_STATE_SEND_CBW;
618 break;
619
620 case CMD_STATE_WAIT:
621 status = usb_bot_request(uhost, bot_trans);
622 if(status == USB_OK)
623 {
624 bot_trans->cmd_state = CMD_STATE_SEND;
625 }
626 if(status == USB_FAIL)
627 {
628 bot_trans->cmd_state = CMD_STATE_SEND;
629 }
630 break;
631 default:
632 break;
633 }
634 return status;
635}
636
642 usb_sts_type msc_bot_scsi_init(usbh_msc_type *msc_struct)
643{
644 msc_struct->state = USBH_MSC_INIT;
645 msc_struct->ctrl_state = USBH_MSC_STATE_IDLE;
646 msc_struct->error = MSC_OK;
647 msc_struct->cur_lun = 0;
648 msc_struct->max_lun = 0;
649 msc_struct->use_lun = 0;
650 msc_struct->bot_trans.msc_struct = &usbh_msc;
651 msc_struct->bot_trans.cmd_state = CMD_STATE_SEND;
652 msc_struct->bot_trans.bot_state = BOT_STATE_SEND_CBW;
653 return USB_OK;
654}
655
656
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
data_len
uint16_t data_len
Definition: project/at_start_f435/examples/usb_device/virtual_comport/src/main.c:47
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
msc_type::data
uint8_t data[4096]
Definition: cdc_msc_class.h:240
msc_type::max_lun
uint32_t max_lun
Definition: cdc_msc_class.h:231
msc_struct
msc_type msc_struct
Definition: msc_class.c:54
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
USB_OK
@ USB_OK
Definition: usb_std.h:268
USB_WAIT
@ USB_WAIT
Definition: usb_std.h:270
USB_FAIL
@ USB_FAIL
Definition: usb_std.h:269
usbh_set_toggle
usb_sts_type usbh_set_toggle(usbh_core_type *uhost, uint8_t hc_num, uint8_t toggle)
usb host set toggle
Definition: usbh_core.c:94
usbh_bulk_recv
usb_sts_type usbh_bulk_recv(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host bulk receive request
Definition: usbh_core.c:286
usbh_bulk_send
usb_sts_type usbh_bulk_send(usbh_core_type *uhost, uint8_t hc_num, uint8_t *buffer, uint16_t length)
usb host bulk send request
Definition: usbh_core.c:321
usbh_get_urb_status
urb_sts_type usbh_get_urb_status(usbh_core_type *uhost, uint8_t ch_num)
usb host get urb status
Definition: usbh_core.c:713
usbh_clear_ept_feature
usb_sts_type usbh_clear_ept_feature(usbh_core_type *uhost, uint8_t ept_num, uint8_t hc_num)
usb host clear endpoint feature
Definition: usbh_ctrl.c:944
MSC_CSW_LEN
#define MSC_CSW_LEN
Definition: usbh_msc_bot_scsi.h:56
MSC_CBW_TAG
#define MSC_CBW_TAG
Definition: usbh_msc_bot_scsi.h:51
MSC_READ_CMD_LEN
#define MSC_READ_CMD_LEN
Definition: usbh_msc_bot_scsi.h:67
MSC_CAPACITY10_CMD_LEN
#define MSC_CAPACITY10_CMD_LEN
Definition: usbh_msc_bot_scsi.h:62
MSC_REQUEST_SENSE_CMD_LEN
#define MSC_REQUEST_SENSE_CMD_LEN
Definition: usbh_msc_bot_scsi.h:64
MSC_CBW_FLAG_IN
#define MSC_CBW_FLAG_IN
Definition: usbh_msc_bot_scsi.h:52
MSC_TEST_UNIT_READY_DATA_LEN
#define MSC_TEST_UNIT_READY_DATA_LEN
Definition: usbh_msc_bot_scsi.h:59
MSC_CSW_SIGNATURE
#define MSC_CSW_SIGNATURE
Definition: usbh_msc_bot_scsi.h:50
MSC_INQUIRY_DATA_LEN
#define MSC_INQUIRY_DATA_LEN
Definition: usbh_msc_bot_scsi.h:61
MSC_CBW_SIGNATURE
#define MSC_CBW_SIGNATURE
Definition: usbh_msc_bot_scsi.h:49
MSC_OPCODE_INQUIRY
#define MSC_OPCODE_INQUIRY
Definition: usbh_msc_bot_scsi.h:69
MSC_OPCODE_REQUEST_SENSE
#define MSC_OPCODE_REQUEST_SENSE
Definition: usbh_msc_bot_scsi.h:72
MSC_TEST_UNIT_READY_CMD_LEN
#define MSC_TEST_UNIT_READY_CMD_LEN
Definition: usbh_msc_bot_scsi.h:58
MSC_OPCODE_WRITE10
#define MSC_OPCODE_WRITE10
Definition: usbh_msc_bot_scsi.h:73
MSC_OPCODE_READ10
#define MSC_OPCODE_READ10
Definition: usbh_msc_bot_scsi.h:74
MSC_REQUEST_SENSE_DATA_LEN
#define MSC_REQUEST_SENSE_DATA_LEN
Definition: usbh_msc_bot_scsi.h:65
MSC_INQUIRY_CMD_LEN
#define MSC_INQUIRY_CMD_LEN
Definition: usbh_msc_bot_scsi.h:60
MSC_OPCODE_TEST_UNIT_READY
#define MSC_OPCODE_TEST_UNIT_READY
Definition: usbh_msc_bot_scsi.h:71
MSC_CBW_CB_LEN
#define MSC_CBW_CB_LEN
Definition: usbh_msc_bot_scsi.h:57
MSC_CBW_FLAG_OUT
#define MSC_CBW_FLAG_OUT
Definition: usbh_msc_bot_scsi.h:53
MSC_CBW_LEN
#define MSC_CBW_LEN
Definition: usbh_msc_bot_scsi.h:55
MSC_WRITE_CMD_LEN
#define MSC_WRITE_CMD_LEN
Definition: usbh_msc_bot_scsi.h:66
MSC_OPCODE_CAPACITY
#define MSC_OPCODE_CAPACITY
Definition: usbh_msc_bot_scsi.h:70
MSC_CAPACITY10_DATA_LEN
#define MSC_CAPACITY10_DATA_LEN
Definition: usbh_msc_bot_scsi.h:63
USBH_MSC_INIT
@ USBH_MSC_INIT
Definition: usbh_msc_bot_scsi.h:103
BOT_STATE_DATA_IN
@ BOT_STATE_DATA_IN
Definition: usbh_msc_bot_scsi.h:81
BOT_STATE_DATA_IN_WAIT
@ BOT_STATE_DATA_IN_WAIT
Definition: usbh_msc_bot_scsi.h:82
BOT_STATE_DATA_OUT_WAIT
@ BOT_STATE_DATA_OUT_WAIT
Definition: usbh_msc_bot_scsi.h:84
BOT_STATE_ERROR_IN
@ BOT_STATE_ERROR_IN
Definition: usbh_msc_bot_scsi.h:87
BOT_STATE_SEND_CBW_WAIT
@ BOT_STATE_SEND_CBW_WAIT
Definition: usbh_msc_bot_scsi.h:80
BOT_STATE_SEND_CBW
@ BOT_STATE_SEND_CBW
Definition: usbh_msc_bot_scsi.h:79
BOT_STATE_COMPLETE
@ BOT_STATE_COMPLETE
Definition: usbh_msc_bot_scsi.h:89
BOT_STATE_RECV_CSW_WAIT
@ BOT_STATE_RECV_CSW_WAIT
Definition: usbh_msc_bot_scsi.h:86
BOT_STATE_RECV_CSW
@ BOT_STATE_RECV_CSW
Definition: usbh_msc_bot_scsi.h:85
BOT_STATE_ERROR_OUT
@ BOT_STATE_ERROR_OUT
Definition: usbh_msc_bot_scsi.h:88
BOT_STATE_DATA_OUT
@ BOT_STATE_DATA_OUT
Definition: usbh_msc_bot_scsi.h:83
MSC_OK
@ MSC_OK
Definition: usbh_msc_bot_scsi.h:117
CMD_STATE_SEND
@ CMD_STATE_SEND
Definition: usbh_msc_bot_scsi.h:94
CMD_STATE_WAIT
@ CMD_STATE_WAIT
Definition: usbh_msc_bot_scsi.h:95
usbh_cmd_test_unit_ready
static usb_sts_type usbh_cmd_test_unit_ready(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun)
usb host msc command test unit ready
Definition: usbh_msc_bot_scsi.c:120
usbh_cmd_requset_sense
static usb_sts_type usbh_cmd_requset_sense(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun)
usb host msc command request sense
Definition: usbh_msc_bot_scsi.c:135
usbh_msc_bot_scsi_capacity
usb_sts_type usbh_msc_bot_scsi_capacity(void *uhost, msc_bot_trans_type *bot_trans, uint8_t lun, msc_scsi_data_capacity *capacity)
usb host msc bulk-only capacity request
Definition: usbh_msc_bot_scsi.c:439
usbh_msc_bot_scsi_test_unit_ready
usb_sts_type usbh_msc_bot_scsi_test_unit_ready(void *uhost, msc_bot_trans_type *bot_trans, uint8_t lun)
usb host msc bulk-only tet unit ready request
Definition: usbh_msc_bot_scsi.c:480
usbh_msc_bot_scsi_write
usb_sts_type usbh_msc_bot_scsi_write(void *uhost, msc_bot_trans_type *bot_trans, uint32_t address, uint8_t *write_data, uint32_t write_len, uint8_t lun)
usb host msc bulk-only write request
Definition: usbh_msc_bot_scsi.c:561
usbh_cmd_write
static usb_sts_type usbh_cmd_write(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun, uint32_t data_len, uint32_t address, uint8_t *buffer)
usb host msc command write
Definition: usbh_msc_bot_scsi.c:155
usbh_msc_bot_scsi_request_sense
usb_sts_type usbh_msc_bot_scsi_request_sense(void *uhost, msc_bot_trans_type *bot_trans, uint8_t lun)
usb host msc bulk-only request sense request
Definition: usbh_msc_bot_scsi.c:519
usbh_msc_bot_scsi_get_inquiry
usb_sts_type usbh_msc_bot_scsi_get_inquiry(void *uhost, msc_bot_trans_type *bot_trans, uint8_t lun, msc_scsi_data_inquiry *inquiry)
usb host msc bulk-only get inquiry request
Definition: usbh_msc_bot_scsi.c:400
usbh_cmd_read
static usb_sts_type usbh_cmd_read(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun, uint32_t data_len, uint32_t address, uint8_t *buffer)
usb host msc command read
Definition: usbh_msc_bot_scsi.c:182
usbh_bot_cbw
static usb_sts_type usbh_bot_cbw(msc_bot_cbw_type *cbw, uint32_t data_length, uint8_t cmd_len, uint8_t flag)
usb host bulk-only cbw
Definition: usbh_msc_bot_scsi.c:63
usbh_msc_bot_scsi_read
usb_sts_type usbh_msc_bot_scsi_read(void *uhost, msc_bot_trans_type *bot_trans, uint32_t address, uint8_t *read_data, uint32_t read_len, uint8_t lun)
usb host msc bulk-only read request
Definition: usbh_msc_bot_scsi.c:604
usbh_cmd_capacity10
static usb_sts_type usbh_cmd_capacity10(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun)
usb host msc command capacity10
Definition: usbh_msc_bot_scsi.c:103
usb_bot_request
usb_sts_type usb_bot_request(void *uhost, msc_bot_trans_type *bot_trans)
usb host msc bulk-only request
Definition: usbh_msc_bot_scsi.c:227
usbh_cmd_inquiry
static usb_sts_type usbh_cmd_inquiry(msc_bot_trans_type *bot_trans, uint8_t *cmd, uint8_t lun)
usb host msc command inquiry
Definition: usbh_msc_bot_scsi.c:85
msc_bot_scsi_init
usb_sts_type msc_bot_scsi_init(usbh_msc_type *msc_struct)
usb host msc init
Definition: usbh_msc_bot_scsi.c:642
usbh_check_csw
usb_sts_type usbh_check_csw(void *uhost, msc_bot_cbw_type *cbw, msc_bot_csw_type *csw)
usb host csw check
Definition: usbh_msc_bot_scsi.c:205
USBH_MSC_STATE_IDLE
@ USBH_MSC_STATE_IDLE
Definition: usbh_msc_class.h:84
usbh_msc
usbh_msc_type usbh_msc
Definition: usbh_msc_class.c:53
msc_bot_cbw_type
usb msc bulk-only command block wrapper type
Definition: usbh_msc_bot_scsi.h:153
msc_bot_cbw_type::dCBWDataTransferLength
uint32_t dCBWDataTransferLength
Definition: usbh_msc_bot_scsi.h:156
msc_bot_cbw_type::bCBWCBLength
uint8_t bCBWCBLength
Definition: usbh_msc_bot_scsi.h:159
msc_bot_cbw_type::CBWCB
uint8_t CBWCB[16]
Definition: usbh_msc_bot_scsi.h:160
msc_bot_cbw_type::dCBWSignature
uint32_t dCBWSignature
Definition: usbh_msc_bot_scsi.h:154
msc_bot_cbw_type::dCBWTag
uint32_t dCBWTag
Definition: usbh_msc_bot_scsi.h:155
msc_bot_cbw_type::bCBWLUN
uint8_t bCBWLUN
Definition: usbh_msc_bot_scsi.h:158
msc_bot_cbw_type::bmCBWFlags
uint8_t bmCBWFlags
Definition: usbh_msc_bot_scsi.h:157
msc_bot_csw_type
usb msc bulk-only command status wrapper type
Definition: usbh_msc_bot_scsi.h:167
msc_bot_csw_type::dCBWSignature
uint32_t dCBWSignature
Definition: usbh_msc_bot_scsi.h:168
msc_bot_csw_type::dCBWTag
uint32_t dCBWTag
Definition: usbh_msc_bot_scsi.h:169
msc_bot_csw_type::bCSWStatus
uint8_t bCSWStatus
Definition: usbh_msc_bot_scsi.h:171
msc_bot_trans_type
usb msc bulk-only transfer control type
Definition: usbh_msc_bot_scsi.h:178
msc_bot_trans_type::data
uint8_t * data
Definition: usbh_msc_bot_scsi.h:184
msc_bot_trans_type::buffer
uint8_t buffer[32]
Definition: usbh_msc_bot_scsi.h:179
msc_bot_trans_type::msc_struct
void * msc_struct
Definition: usbh_msc_bot_scsi.h:185
msc_bot_trans_type::csw
msc_bot_csw_type csw
Definition: usbh_msc_bot_scsi.h:181
msc_bot_trans_type::bot_state
msc_bot_state_type bot_state
Definition: usbh_msc_bot_scsi.h:183
msc_bot_trans_type::cbw
msc_bot_cbw_type cbw
Definition: usbh_msc_bot_scsi.h:180
msc_bot_trans_type::cmd_state
msc_cmd_state_type cmd_state
Definition: usbh_msc_bot_scsi.h:182
msc_scsi_data_capacity
usb msc capacity data type
Definition: usbh_msc_bot_scsi.h:144
msc_scsi_data_capacity::blk_nbr
uint32_t blk_nbr
Definition: usbh_msc_bot_scsi.h:145
msc_scsi_data_capacity::blk_size
uint32_t blk_size
Definition: usbh_msc_bot_scsi.h:146
msc_scsi_data_inquiry
usb msc inquiry data type
Definition: usbh_msc_bot_scsi.h:127
usbh_msc_type
usb msc struct
Definition: usbh_msc_class.h:94
usbh_core.h
usb host core header file
usbh_ctrl.h
usb header file
usbh_msc_bot_scsi.h
usb host msc bulk-only transfer and scsi header file
usbh_msc_class.h
usb host msc class header file


AT32F435/437 Firmwary Library: usbh_msc_bot_scsi.h Source File

  • middlewares
  • usbh_class
  • usbh_msc
usbh_msc_bot_scsi.h
Go to the documentation of this file.
1
26/* Define to prevent recursive inclusion -------------------------------------*/
27#ifndef __USBH_MSC_BOT_SCSI_H
28#define __USBH_MSC_BOT_SCSI_H
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#include "usbh_core.h"
35#include "usb_conf.h"
36
49#define MSC_CBW_SIGNATURE 0x43425355
50#define MSC_CSW_SIGNATURE 0x53425355
51#define MSC_CBW_TAG 0x50607080
52#define MSC_CBW_FLAG_IN 0x80
53#define MSC_CBW_FLAG_OUT 0x00
54
55#define MSC_CBW_LEN 31
56#define MSC_CSW_LEN 13
57#define MSC_CBW_CB_LEN 16
58#define MSC_TEST_UNIT_READY_CMD_LEN 12
59#define MSC_TEST_UNIT_READY_DATA_LEN 0
60#define MSC_INQUIRY_CMD_LEN 12
61#define MSC_INQUIRY_DATA_LEN 36
62#define MSC_CAPACITY10_CMD_LEN 12
63#define MSC_CAPACITY10_DATA_LEN 8
64#define MSC_REQUEST_SENSE_CMD_LEN 12
65#define MSC_REQUEST_SENSE_DATA_LEN 18
66#define MSC_WRITE_CMD_LEN 12
67#define MSC_READ_CMD_LEN 10
68
69#define MSC_OPCODE_INQUIRY 0x12
70#define MSC_OPCODE_CAPACITY 0x25
71#define MSC_OPCODE_TEST_UNIT_READY 0x00
72#define MSC_OPCODE_REQUEST_SENSE 0x03
73#define MSC_OPCODE_WRITE10 0x2A
74#define MSC_OPCODE_READ10 0x28
75
76typedef enum
77{
78 BOT_STATE_IDLE,
79 BOT_STATE_SEND_CBW,
80 BOT_STATE_SEND_CBW_WAIT,
81 BOT_STATE_DATA_IN,
82 BOT_STATE_DATA_IN_WAIT,
83 BOT_STATE_DATA_OUT,
84 BOT_STATE_DATA_OUT_WAIT,
85 BOT_STATE_RECV_CSW,
86 BOT_STATE_RECV_CSW_WAIT,
87 BOT_STATE_ERROR_IN,
88 BOT_STATE_ERROR_OUT,
89 BOT_STATE_COMPLETE
90}msc_bot_state_type;
91
92typedef enum
93{
94 CMD_STATE_SEND,
95 CMD_STATE_WAIT,
96}msc_cmd_state_type;
97
101typedef enum
102{
103 USBH_MSC_INIT,
104 USBH_MSC_INQUIRY,
105 USBH_MSC_TEST_UNIT_READY,
106 USBH_MSC_READ_CAPACITY10,
107 USBH_MSC_REQUEST_SENSE,
108 USBH_MSC_READ10,
109 USBH_MSC_WRITE,
110 USBH_MSC_BUSY,
111 USBH_MSC_ERROR,
112 USBH_MSC_IDLE
113}msc_state_type;
114
115typedef enum
116{
117 MSC_OK,
118 MSC_NOT_READY,
119 MSC_ERROR
120}msc_error_type;
121
122
126typedef struct
127{
128 uint8_t pdev_type;
129 uint8_t rmb;
130 uint8_t version;
131 uint8_t data_format;
132 uint8_t length;
133 uint8_t reserved[3];
134 uint8_t vendor[8];
135 uint8_t product[16];
136 uint8_t revision[4];
137}msc_scsi_data_inquiry;
138
139
143typedef struct
144{
145 uint32_t blk_nbr;
146 uint32_t blk_size;
147}msc_scsi_data_capacity;
148
152typedef struct
153{
154 uint32_t dCBWSignature;
155 uint32_t dCBWTag;
156 uint32_t dCBWDataTransferLength;
157 uint8_t bmCBWFlags;
158 uint8_t bCBWLUN;
159 uint8_t bCBWCBLength;
160 uint8_t CBWCB[MSC_CBW_CB_LEN];
161}msc_bot_cbw_type;
162
166typedef struct
167{
168 uint32_t dCBWSignature;
169 uint32_t dCBWTag;
170 uint32_t dCSWDataResidue;
171 uint8_t bCSWStatus;
172}msc_bot_csw_type;
173
177typedef struct
178{
179 uint8_t buffer[32];
180 msc_bot_cbw_type cbw;
181 msc_bot_csw_type csw;
182 msc_cmd_state_type cmd_state;
183 msc_bot_state_type bot_state;
184 uint8_t *data;
185 void *msc_struct;
186}msc_bot_trans_type;
187
191typedef struct
192{
193 msc_scsi_data_inquiry inquiry;
194 msc_scsi_data_capacity capacity;
195 msc_state_type state;
196 msc_error_type ready;
197 usb_sts_type pre_state;
198 uint8_t change;
199}usbh_msc_unit_type;
200
201
202 usb_sts_type usb_bot_request(void *uhost, msc_bot_trans_type *bot_trans);
203
204 usb_sts_type usbh_msc_bot_scsi_get_inquiry(void *uhost, msc_bot_trans_type *bot_trans,
205 uint8_t lun, msc_scsi_data_inquiry *inquiry);
206
207 usb_sts_type usbh_msc_bot_scsi_capacity(void *uhost, msc_bot_trans_type *bot_trans,
208 uint8_t lun, msc_scsi_data_capacity *capacity);
209
210 usb_sts_type usbh_msc_bot_scsi_test_unit_ready(void *uhost, msc_bot_trans_type *bot_trans,
211 uint8_t lun);
212
213 usb_sts_type usbh_msc_bot_scsi_request_sense(void *uhost, msc_bot_trans_type *bot_trans,
214 uint8_t lun);
215
216 usb_sts_type usbh_msc_bot_scsi_write(void *uhost, msc_bot_trans_type *bot_trans,
217 uint32_t address, uint8_t *write_data,
218 uint32_t write_len, uint8_t lun);
219
220 usb_sts_type usbh_msc_bot_scsi_read(void *uhost, msc_bot_trans_type *bot_trans,
221 uint32_t address, uint8_t *read_data,
222 uint32_t read_len, uint8_t lun);
234#ifdef __cplusplus
235}
236#endif
237
238#endif
239
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
msc_state_type
msc_state_type
usb msc process state
Definition: usbh_msc_bot_scsi.h:102
usbh_msc_bot_scsi_capacity
usb_sts_type usbh_msc_bot_scsi_capacity(void *uhost, msc_bot_trans_type *bot_trans, uint8_t lun, msc_scsi_data_capacity *capacity)
usb host msc bulk-only capacity request
Definition: usbh_msc_bot_scsi.c:439
usbh_msc_bot_scsi_test_unit_ready
usb_sts_type usbh_msc_bot_scsi_test_unit_ready(void *uhost, msc_bot_trans_type *bot_trans, uint8_t lun)
usb host msc bulk-only tet unit ready request
Definition: usbh_msc_bot_scsi.c:480
usbh_msc_bot_scsi_write
usb_sts_type usbh_msc_bot_scsi_write(void *uhost, msc_bot_trans_type *bot_trans, uint32_t address, uint8_t *write_data, uint32_t write_len, uint8_t lun)
usb host msc bulk-only write request
Definition: usbh_msc_bot_scsi.c:561
usbh_msc_bot_scsi_request_sense
usb_sts_type usbh_msc_bot_scsi_request_sense(void *uhost, msc_bot_trans_type *bot_trans, uint8_t lun)
usb host msc bulk-only request sense request
Definition: usbh_msc_bot_scsi.c:519
usbh_msc_bot_scsi_get_inquiry
usb_sts_type usbh_msc_bot_scsi_get_inquiry(void *uhost, msc_bot_trans_type *bot_trans, uint8_t lun, msc_scsi_data_inquiry *inquiry)
usb host msc bulk-only get inquiry request
Definition: usbh_msc_bot_scsi.c:400
usbh_msc_bot_scsi_read
usb_sts_type usbh_msc_bot_scsi_read(void *uhost, msc_bot_trans_type *bot_trans, uint32_t address, uint8_t *read_data, uint32_t read_len, uint8_t lun)
usb host msc bulk-only read request
Definition: usbh_msc_bot_scsi.c:604
msc_bot_state_type
msc_bot_state_type
Definition: usbh_msc_bot_scsi.h:77
usb_bot_request
usb_sts_type usb_bot_request(void *uhost, msc_bot_trans_type *bot_trans)
usb host msc bulk-only request
Definition: usbh_msc_bot_scsi.c:227
msc_error_type
msc_error_type
Definition: usbh_msc_bot_scsi.h:116
MSC_CBW_CB_LEN
#define MSC_CBW_CB_LEN
Definition: usbh_msc_bot_scsi.h:57
msc_cmd_state_type
msc_cmd_state_type
Definition: usbh_msc_bot_scsi.h:93
USBH_MSC_WRITE
@ USBH_MSC_WRITE
Definition: usbh_msc_bot_scsi.h:109
USBH_MSC_READ10
@ USBH_MSC_READ10
Definition: usbh_msc_bot_scsi.h:108
USBH_MSC_TEST_UNIT_READY
@ USBH_MSC_TEST_UNIT_READY
Definition: usbh_msc_bot_scsi.h:105
USBH_MSC_ERROR
@ USBH_MSC_ERROR
Definition: usbh_msc_bot_scsi.h:111
USBH_MSC_REQUEST_SENSE
@ USBH_MSC_REQUEST_SENSE
Definition: usbh_msc_bot_scsi.h:107
USBH_MSC_READ_CAPACITY10
@ USBH_MSC_READ_CAPACITY10
Definition: usbh_msc_bot_scsi.h:106
USBH_MSC_INIT
@ USBH_MSC_INIT
Definition: usbh_msc_bot_scsi.h:103
USBH_MSC_INQUIRY
@ USBH_MSC_INQUIRY
Definition: usbh_msc_bot_scsi.h:104
USBH_MSC_BUSY
@ USBH_MSC_BUSY
Definition: usbh_msc_bot_scsi.h:110
USBH_MSC_IDLE
@ USBH_MSC_IDLE
Definition: usbh_msc_bot_scsi.h:112
BOT_STATE_DATA_IN
@ BOT_STATE_DATA_IN
Definition: usbh_msc_bot_scsi.h:81
BOT_STATE_IDLE
@ BOT_STATE_IDLE
Definition: usbh_msc_bot_scsi.h:78
BOT_STATE_DATA_IN_WAIT
@ BOT_STATE_DATA_IN_WAIT
Definition: usbh_msc_bot_scsi.h:82
BOT_STATE_DATA_OUT_WAIT
@ BOT_STATE_DATA_OUT_WAIT
Definition: usbh_msc_bot_scsi.h:84
BOT_STATE_ERROR_IN
@ BOT_STATE_ERROR_IN
Definition: usbh_msc_bot_scsi.h:87
BOT_STATE_SEND_CBW_WAIT
@ BOT_STATE_SEND_CBW_WAIT
Definition: usbh_msc_bot_scsi.h:80
BOT_STATE_SEND_CBW
@ BOT_STATE_SEND_CBW
Definition: usbh_msc_bot_scsi.h:79
BOT_STATE_COMPLETE
@ BOT_STATE_COMPLETE
Definition: usbh_msc_bot_scsi.h:89
BOT_STATE_RECV_CSW_WAIT
@ BOT_STATE_RECV_CSW_WAIT
Definition: usbh_msc_bot_scsi.h:86
BOT_STATE_RECV_CSW
@ BOT_STATE_RECV_CSW
Definition: usbh_msc_bot_scsi.h:85
BOT_STATE_ERROR_OUT
@ BOT_STATE_ERROR_OUT
Definition: usbh_msc_bot_scsi.h:88
BOT_STATE_DATA_OUT
@ BOT_STATE_DATA_OUT
Definition: usbh_msc_bot_scsi.h:83
MSC_OK
@ MSC_OK
Definition: usbh_msc_bot_scsi.h:117
MSC_NOT_READY
@ MSC_NOT_READY
Definition: usbh_msc_bot_scsi.h:118
MSC_ERROR
@ MSC_ERROR
Definition: usbh_msc_bot_scsi.h:119
CMD_STATE_SEND
@ CMD_STATE_SEND
Definition: usbh_msc_bot_scsi.h:94
CMD_STATE_WAIT
@ CMD_STATE_WAIT
Definition: usbh_msc_bot_scsi.h:95
msc_bot_cbw_type
usb msc bulk-only command block wrapper type
Definition: usbh_msc_bot_scsi.h:153
msc_bot_cbw_type::dCBWDataTransferLength
uint32_t dCBWDataTransferLength
Definition: usbh_msc_bot_scsi.h:156
msc_bot_cbw_type::bCBWCBLength
uint8_t bCBWCBLength
Definition: usbh_msc_bot_scsi.h:159
msc_bot_cbw_type::dCBWSignature
uint32_t dCBWSignature
Definition: usbh_msc_bot_scsi.h:154
msc_bot_cbw_type::dCBWTag
uint32_t dCBWTag
Definition: usbh_msc_bot_scsi.h:155
msc_bot_cbw_type::bCBWLUN
uint8_t bCBWLUN
Definition: usbh_msc_bot_scsi.h:158
msc_bot_cbw_type::bmCBWFlags
uint8_t bmCBWFlags
Definition: usbh_msc_bot_scsi.h:157
msc_bot_csw_type
usb msc bulk-only command status wrapper type
Definition: usbh_msc_bot_scsi.h:167
msc_bot_csw_type::dCBWSignature
uint32_t dCBWSignature
Definition: usbh_msc_bot_scsi.h:168
msc_bot_csw_type::dCBWTag
uint32_t dCBWTag
Definition: usbh_msc_bot_scsi.h:169
msc_bot_csw_type::dCSWDataResidue
uint32_t dCSWDataResidue
Definition: usbh_msc_bot_scsi.h:170
msc_bot_csw_type::bCSWStatus
uint8_t bCSWStatus
Definition: usbh_msc_bot_scsi.h:171
msc_bot_trans_type
usb msc bulk-only transfer control type
Definition: usbh_msc_bot_scsi.h:178
msc_bot_trans_type::data
uint8_t * data
Definition: usbh_msc_bot_scsi.h:184
msc_bot_trans_type::msc_struct
void * msc_struct
Definition: usbh_msc_bot_scsi.h:185
msc_bot_trans_type::csw
msc_bot_csw_type csw
Definition: usbh_msc_bot_scsi.h:181
msc_bot_trans_type::bot_state
msc_bot_state_type bot_state
Definition: usbh_msc_bot_scsi.h:183
msc_bot_trans_type::cbw
msc_bot_cbw_type cbw
Definition: usbh_msc_bot_scsi.h:180
msc_bot_trans_type::cmd_state
msc_cmd_state_type cmd_state
Definition: usbh_msc_bot_scsi.h:182
msc_scsi_data_capacity
usb msc capacity data type
Definition: usbh_msc_bot_scsi.h:144
msc_scsi_data_capacity::blk_nbr
uint32_t blk_nbr
Definition: usbh_msc_bot_scsi.h:145
msc_scsi_data_capacity::blk_size
uint32_t blk_size
Definition: usbh_msc_bot_scsi.h:146
msc_scsi_data_inquiry
usb msc inquiry data type
Definition: usbh_msc_bot_scsi.h:127
msc_scsi_data_inquiry::rmb
uint8_t rmb
Definition: usbh_msc_bot_scsi.h:129
msc_scsi_data_inquiry::pdev_type
uint8_t pdev_type
Definition: usbh_msc_bot_scsi.h:128
msc_scsi_data_inquiry::data_format
uint8_t data_format
Definition: usbh_msc_bot_scsi.h:131
msc_scsi_data_inquiry::version
uint8_t version
Definition: usbh_msc_bot_scsi.h:130
msc_scsi_data_inquiry::length
uint8_t length
Definition: usbh_msc_bot_scsi.h:132
usbh_msc_unit_type
usb msc bank type
Definition: usbh_msc_bot_scsi.h:192
usbh_msc_unit_type::pre_state
usb_sts_type pre_state
Definition: usbh_msc_bot_scsi.h:197
usbh_msc_unit_type::ready
msc_error_type ready
Definition: usbh_msc_bot_scsi.h:196
usbh_msc_unit_type::capacity
msc_scsi_data_capacity capacity
Definition: usbh_msc_bot_scsi.h:194
usbh_msc_unit_type::change
uint8_t change
Definition: usbh_msc_bot_scsi.h:198
usbh_msc_unit_type::state
msc_state_type state
Definition: usbh_msc_bot_scsi.h:195
usbh_msc_unit_type::inquiry
msc_scsi_data_inquiry inquiry
Definition: usbh_msc_bot_scsi.h:193
usbh_core.h
usb host core header file


AT32F435/437 Firmwary Library: usbh_msc_class.c Source File

  • middlewares
  • usbh_class
  • usbh_msc
usbh_msc_class.c
Go to the documentation of this file.
1
26#include "usbh_msc_class.h"
27#include "usb_conf.h"
28#include "usbh_core.h"
29#include "usbh_ctrl.h"
30
44static usb_sts_type uhost_init_handler(void *uhost);
45static usb_sts_type uhost_reset_handler(void *uhost);
46static usb_sts_type uhost_request_handler(void *uhost);
47static usb_sts_type uhost_process_handler(void *uhost);
48
49static usb_sts_type usbh_msc_get_max_lun(void *uhost, uint8_t *lun);
50static usb_sts_type usbh_msc_clear_feature(void *uhost, uint8_t ept_num);
51
52
53 usbh_msc_type usbh_msc;
54
55usbh_class_handler_type uhost_msc_class_handler =
56{
57 uhost_init_handler,
58 uhost_reset_handler,
59 uhost_request_handler,
60 uhost_process_handler,
61 &usbh_msc
62};
63
64
65
71static usb_sts_type uhost_init_handler(void *uhost)
72{
73 usbh_core_type *puhost = (usbh_core_type *)uhost;
74 usb_sts_type status = USB_OK;
75 uint8_t if_x, eptidx = 0;
76 usbh_msc_type *pmsc = &usbh_msc;
77 puhost->class_handler->pdata = &usbh_msc;
78
79 if_x = usbh_find_interface(puhost, USB_CLASS_CODE_MSC, MSC_SUBCLASS_SCSI_TRANS, MSC_PROTOCOL_BBB);
80 if(if_x == 0xFF)
81 {
82 USBH_DEBUG("Unsupport Device!");
83 return USB_NOT_SUPPORT;
84 }
85 pmsc->protocol = puhost->dev.cfg_desc.interface[if_x].interface.bInterfaceProtocol;
86
87 for(eptidx = 0; eptidx < puhost->dev.cfg_desc.interface[if_x].interface.bNumEndpoints; eptidx ++)
88 {
89 if(puhost->dev.cfg_desc.interface[if_x].endpoint[eptidx].bEndpointAddress & 0x80)
90 {
91 pmsc->eptin = puhost->dev.cfg_desc.interface[if_x].endpoint[eptidx].bEndpointAddress;
92 pmsc->in_maxpacket = puhost->dev.cfg_desc.interface[if_x].endpoint[eptidx].wMaxPacketSize;
93 pmsc->in_poll = puhost->dev.cfg_desc.interface[if_x].endpoint[eptidx].bInterval;
94
95 pmsc->chin = usbh_alloc_channel(puhost, pmsc->eptin);
96 /* enable channel */
97 usbh_hc_open(puhost, pmsc->chin, pmsc->eptin,
98 puhost->dev.address, EPT_BULK_TYPE,
99 pmsc->in_maxpacket,
100 puhost->dev.speed);
101 }
102 else
103 {
104 pmsc->eptout = puhost->dev.cfg_desc.interface[if_x].endpoint[eptidx].bEndpointAddress;
105 pmsc->out_maxpacket = puhost->dev.cfg_desc.interface[if_x].endpoint[eptidx].wMaxPacketSize;
106 pmsc->out_poll = puhost->dev.cfg_desc.interface[if_x].endpoint[eptidx].bInterval;
107
108 pmsc->chout = usbh_alloc_channel(puhost, pmsc->eptout);
109 /* enable channel */
110 usbh_hc_open(puhost, pmsc->chout,pmsc->eptout,
111 puhost->dev.address, EPT_BULK_TYPE,
112 pmsc->out_maxpacket,
113 puhost->dev.speed);
114 }
115 }
116
117 msc_bot_scsi_init(pmsc);
118 usbh_set_toggle(puhost, pmsc->chout, 0);
119 usbh_set_toggle(puhost, pmsc->chin, 0);
120 return status;
121}
122
128static usb_sts_type uhost_reset_handler(void *uhost)
129{
130 usbh_core_type *puhost = (usbh_core_type *)uhost;
131 usbh_msc_type *pmsc = (usbh_msc_type *)puhost->class_handler->pdata;
132 usb_sts_type status = USB_OK;
133 uint8_t i_index = 0;
134
135 if(puhost->class_handler->pdata)
136 {
137 return status;
138 }
139
140 for(i_index = 0; i_index < pmsc->max_lun ; i_index ++)
141 {
142 pmsc->l_unit_n[i_index].pre_state = USB_FAIL;
143 pmsc->l_unit_n[i_index].change = 0;
144 pmsc->l_unit_n[i_index].state = USBH_MSC_INIT;
145 pmsc->l_unit_n[i_index].ready = MSC_NOT_READY;
146 }
147
148 if(pmsc->chin != 0 )
149 {
150 usbh_free_channel(puhost, pmsc->chin);
151 usbh_ch_disable(puhost, pmsc->chin);
152 pmsc->chin = 0;
153 }
154
155 if(pmsc->chout != 0 )
156 {
157 usbh_free_channel(puhost, pmsc->chout);
158 usbh_ch_disable(puhost, pmsc->chout);
159 pmsc->chout = 0;
160 }
161
162 return status;
163}
164
170static usb_sts_type uhost_request_handler(void *uhost)
171{
172 usbh_core_type *puhost = (usbh_core_type *)uhost;
173 usbh_msc_type *pmsc = (usbh_msc_type *)puhost->class_handler->pdata;
174 usb_sts_type status = USB_WAIT;
175 uint8_t i_index = 0;
176
177 switch(pmsc->ctrl_state)
178 {
179 case USBH_MSC_STATE_IDLE:
180 pmsc->ctrl_state = USBH_MSC_STATE_GET_LUN;
181 break;
182 case USBH_MSC_STATE_GET_LUN:
183 if((status = usbh_msc_get_max_lun(uhost, (uint8_t *)&pmsc->max_lun)) == USB_OK)
184 {
185 pmsc->max_lun = (pmsc->max_lun & 0xFF) > USBH_SUPPORT_MAX_LUN ? USBH_SUPPORT_MAX_LUN:((pmsc->max_lun & 0xFF) + 1);
186 USBH_DEBUG("Support max lun %d", pmsc->max_lun);
187 for(i_index = 0; i_index < pmsc->max_lun ; i_index ++)
188 {
189 pmsc->l_unit_n[i_index].pre_state = USB_FAIL;
190 pmsc->l_unit_n[i_index].change = 0;
191 pmsc->l_unit_n[i_index].state = USBH_MSC_INIT;
192 }
193 }
194 break;
195 case USBH_MSC_STATE_ERROR:
196 if((usbh_msc_clear_feature(uhost, 0)) == USB_OK)
197 {
198 pmsc->ctrl_state = USBH_MSC_STATE_GET_LUN;
199 }
200 break;
201 default:
202 break;
203 }
204
205 return status;
206}
207
213static usb_sts_type uhost_process_handler(void *uhost)
214{
215 usbh_core_type *puhost = (usbh_core_type *)uhost;
216 usbh_msc_type *pmsc = (usbh_msc_type *)puhost->class_handler->pdata;
217 uint64_t msize = 0;
218 usb_sts_type status;
219 switch(pmsc->state)
220 {
221 case USBH_MSC_INIT:
222 if(pmsc->cur_lun < pmsc->max_lun)
223 {
224 switch(pmsc->l_unit_n[pmsc->cur_lun].state)
225 {
226 case USBH_MSC_INIT:
227 pmsc->l_unit_n[pmsc->cur_lun].ready = MSC_NOT_READY;
228 pmsc->l_unit_n[pmsc->cur_lun].state = USBH_MSC_INQUIRY;
229 break;
230 case USBH_MSC_INQUIRY:
231 status = usbh_msc_bot_scsi_get_inquiry(uhost, &pmsc->bot_trans, pmsc->cur_lun, &pmsc->l_unit_n[pmsc->cur_lun].inquiry);
232 if(status == USB_OK)
233 {
234 pmsc->l_unit_n[pmsc->cur_lun].state = USBH_MSC_TEST_UNIT_READY;
235 }
236 else if(status == USB_FAIL)
237 {
238 pmsc->l_unit_n[pmsc->cur_lun].state = USBH_MSC_REQUEST_SENSE;
239 }
240 break;
241 case USBH_MSC_TEST_UNIT_READY:
242 status = usbh_msc_bot_scsi_test_unit_ready(uhost, &pmsc->bot_trans, pmsc->cur_lun);
243 if(status == USB_OK)
244 {
245 pmsc->l_unit_n[pmsc->cur_lun].state = USBH_MSC_READ_CAPACITY10;
246 pmsc->l_unit_n[pmsc->cur_lun].ready = MSC_OK;
247 }
248 else if(status == USB_FAIL)
249 {
250 pmsc->l_unit_n[pmsc->cur_lun].state = USBH_MSC_REQUEST_SENSE;
251 pmsc->l_unit_n[pmsc->cur_lun].ready = MSC_NOT_READY;
252 }
253 break;
254
255 case USBH_MSC_READ_CAPACITY10:
256 status = usbh_msc_bot_scsi_capacity(uhost, &pmsc->bot_trans, pmsc->cur_lun, &pmsc->l_unit_n[pmsc->cur_lun].capacity);
257 if(status == USB_OK)
258 {
259 msize = (uint64_t)pmsc->l_unit_n[pmsc->cur_lun].capacity.blk_nbr * (uint64_t)pmsc->l_unit_n[pmsc->cur_lun].capacity.blk_size;
260 USBH_DEBUG("Device capacity: %llu Byte", msize);
261 USBH_DEBUG("Block num: %d ", pmsc->l_unit_n[pmsc->cur_lun].capacity.blk_nbr);
262 USBH_DEBUG("Block size: %d Byte", pmsc->l_unit_n[pmsc->cur_lun].capacity.blk_size);
263 pmsc->l_unit_n[pmsc->cur_lun].state = USBH_MSC_IDLE;
264 pmsc->cur_lun ++;
265 }
266 else if(status == USB_FAIL)
267 {
268 pmsc->l_unit_n[pmsc->cur_lun].state = USBH_MSC_REQUEST_SENSE;
269 }
270 break;
271 case USBH_MSC_REQUEST_SENSE:
272 status = usbh_msc_bot_scsi_request_sense(uhost, &pmsc->bot_trans, pmsc->cur_lun);
273 if(status == USB_OK)
274 {
275 pmsc->l_unit_n[pmsc->cur_lun].state = USBH_MSC_TEST_UNIT_READY;
276 }
277 else if(status == USB_FAIL)
278 {
279 pmsc->l_unit_n[pmsc->cur_lun].ready = MSC_NOT_READY;
280 pmsc->l_unit_n[pmsc->cur_lun].state = USBH_MSC_ERROR;
281 }
282 break;
283
284 case USBH_MSC_BUSY:
285 break;
286 case USBH_MSC_ERROR:
287 break;
288 default:
289 break;
290 }
291
292 }
293 else
294 {
295 pmsc->state = USBH_MSC_IDLE;
296 }
297 break;
298 case USBH_MSC_IDLE:
299 if(puhost->user_handler->user_application != NULL)
300 {
301 puhost->user_handler->user_application();
302 }
303 default:
304 break;
305 }
306 return USB_OK;
307}
308
309
316static usb_sts_type usbh_msc_get_max_lun(void *uhost, uint8_t *lun)
317{
318 usbh_core_type *puhost = (usbh_core_type *)uhost;
319 usb_sts_type status = USB_WAIT;
320 if(puhost->ctrl.state == CONTROL_IDLE )
321 {
322 puhost->ctrl.setup.bmRequestType = USB_DIR_D2H | USB_REQ_RECIPIENT_INTERFACE | USB_REQ_TYPE_CLASS;
323 puhost->ctrl.setup.bRequest = MSC_REQ_GET_MAX_LUN;
324 puhost->ctrl.setup.wValue = 0;
325 puhost->ctrl.setup.wIndex = 0;
326 puhost->ctrl.setup.wLength = 1;
327 usbh_ctrl_request(puhost, lun, 1);
328 }
329 else
330 {
331 status = usbh_ctrl_result_check(puhost, CONTROL_IDLE, ENUM_IDLE);
332 if(status == USB_OK || status == USB_NOT_SUPPORT)
333 {
334 status = USB_OK;
335 }
336 }
337 return status;
338}
339
346static usb_sts_type usbh_msc_clear_feature(void *uhost, uint8_t ept_num)
347{
348 usbh_core_type *puhost = (usbh_core_type *)uhost;
349 usb_sts_type status = USB_WAIT;
350 if(puhost->ctrl.state == CONTROL_IDLE )
351 {
352 puhost->ctrl.setup.bmRequestType = USB_DIR_H2D | USB_REQ_RECIPIENT_ENDPOINT | USB_REQ_TYPE_STANDARD;
353 puhost->ctrl.setup.bRequest = USB_STD_REQ_CLEAR_FEATURE;
354 puhost->ctrl.setup.wValue = 0;
355 puhost->ctrl.setup.wIndex = ept_num;
356 puhost->ctrl.setup.wLength = 0;
357 usbh_ctrl_request(puhost, 0, 0);
358 }
359 else
360 {
361 status = usbh_ctrl_result_check(puhost, CONTROL_IDLE, ENUM_IDLE);
362 if(status == USB_OK || status == USB_NOT_SUPPORT)
363 {
364 status = USB_OK;
365 }
366 }
367 return status;
368}
369
375 msc_error_type usbh_msc_is_ready(void *uhost, uint8_t lun)
376{
377 usbh_core_type *puhost = (usbh_core_type *)uhost;
378 usbh_msc_type *pmsc = (usbh_msc_type *)puhost->class_handler->pdata;
379 return pmsc->l_unit_n[lun].ready;
380}
381
382
392 usb_sts_type usbh_msc_rw_handle(void *uhost, uint32_t address, uint32_t len, uint8_t *buffer, uint8_t lun)
393{
394 usbh_core_type *puhost = (usbh_core_type *)uhost;
395 usbh_msc_type *pmsc = (usbh_msc_type *)puhost->class_handler->pdata;
396 usb_sts_type status = USB_WAIT;
397 switch(pmsc->l_unit_n[lun].state)
398 {
399 case USBH_MSC_READ10:
400 status = usbh_msc_bot_scsi_read(uhost, &pmsc->bot_trans, address, buffer, len, lun);
401 if(status == USB_OK)
402 {
403 pmsc->l_unit_n[lun].state = USBH_MSC_IDLE;
404 }
405 else if(status == USB_FAIL)
406 {
407 pmsc->l_unit_n[lun].state = USBH_MSC_REQUEST_SENSE;
408 status = USB_WAIT;
409 }
410 break;
411 case USBH_MSC_WRITE:
412 status = usbh_msc_bot_scsi_write(uhost, &pmsc->bot_trans, address, buffer, len, lun);
413 if(status == USB_OK)
414 {
415 pmsc->l_unit_n[lun].state = USBH_MSC_IDLE;
416 }
417 else if(status == USB_FAIL)
418 {
419 pmsc->l_unit_n[lun].state = USBH_MSC_REQUEST_SENSE;
420 status = USB_WAIT;
421 }
422 break;
423 case USBH_MSC_REQUEST_SENSE:
424 status = usbh_msc_bot_scsi_request_sense(uhost, &pmsc->bot_trans, lun);
425 if(status == USB_OK)
426 {
427 pmsc->l_unit_n[lun].state = USBH_MSC_IDLE;
428 status = USB_FAIL;
429 }
430 else if(status == USB_FAIL)
431 {
432 USBH_DEBUG("device not support");
433 }
434 break;
435 default:
436 break;
437 }
438 return status;
439}
440
450 usb_sts_type usbh_msc_read(void *uhost, uint32_t address, uint32_t len, uint8_t *buffer, uint8_t lun)
451{
452 usbh_core_type *puhost = (usbh_core_type *)uhost;
453 usbh_msc_type *pmsc = (usbh_msc_type *)puhost->class_handler->pdata;
454 uint32_t timeout = 0;
455 if(puhost->conn_sts == 0 || puhost->global_state != USBH_CLASS
456 || pmsc->l_unit_n[lun].state != USBH_MSC_IDLE)
457 {
458 return USB_FAIL;
459 }
460 pmsc->bot_trans.msc_struct = &usbh_msc;
461 pmsc->l_unit_n[lun].state = USBH_MSC_READ10;
462 pmsc->use_lun = lun;
463
464 timeout = puhost->timer;
465
466 while(usbh_msc_rw_handle(uhost, address, len, buffer, lun) == USB_WAIT)
467 {
468 if(puhost->conn_sts == 0 || (puhost->timer - timeout) > (len * 10000))
469 {
470 pmsc->l_unit_n[lun].state = USBH_MSC_IDLE;
471 return USB_FAIL;
472 }
473 }
474 return USB_OK;
475}
476
486 usb_sts_type usbh_msc_write(void *uhost, uint32_t address, uint32_t len, uint8_t *buffer, uint8_t lun)
487{
488 usbh_core_type *puhost = (usbh_core_type *)uhost;
489 usbh_msc_type *pmsc = (usbh_msc_type *)puhost->class_handler->pdata;
490 uint32_t timeout = 0;
491 if(puhost->conn_sts == 0 || puhost->global_state != USBH_CLASS
492 || pmsc->l_unit_n[lun].state != USBH_MSC_IDLE)
493 {
494 return USB_FAIL;
495 }
496
497 pmsc->bot_trans.msc_struct = &usbh_msc;
498 pmsc->l_unit_n[lun].state = USBH_MSC_WRITE;
499 pmsc->use_lun = lun;
500
501 timeout = puhost->timer;
502 while(usbh_msc_rw_handle(uhost, address, len, buffer, lun) == USB_WAIT)
503 {
504 if(puhost->conn_sts == 0 || (puhost->timer - timeout) > (len * 10000))
505 {
506 pmsc->l_unit_n[lun].state = USBH_MSC_IDLE;
507 return USB_FAIL;
508 }
509 }
510 return USB_OK;
511}
512
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
USBH_DEBUG
#define USBH_DEBUG(...)
Definition: project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h:206
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
EPT_BULK_TYPE
@ EPT_BULK_TYPE
Definition: at32f435_437_usb.h:348
MSC_REQ_GET_MAX_LUN
#define MSC_REQ_GET_MAX_LUN
Definition: cdc_msc_class.h:103
USB_STD_REQ_CLEAR_FEATURE
#define USB_STD_REQ_CLEAR_FEATURE
Definition: usb_std.h:78
USB_REQ_TYPE_STANDARD
#define USB_REQ_TYPE_STANDARD
usb request type
Definition: usb_std.h:63
USB_CLASS_CODE_MSC
#define USB_CLASS_CODE_MSC
Definition: usb_std.h:165
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
USB_REQ_RECIPIENT_ENDPOINT
#define USB_REQ_RECIPIENT_ENDPOINT
Definition: usb_std.h:56
USB_REQ_RECIPIENT_INTERFACE
#define USB_REQ_RECIPIENT_INTERFACE
Definition: usb_std.h:55
USB_REQ_TYPE_CLASS
#define USB_REQ_TYPE_CLASS
Definition: usb_std.h:64
USB_OK
@ USB_OK
Definition: usb_std.h:268
USB_WAIT
@ USB_WAIT
Definition: usb_std.h:270
USB_NOT_SUPPORT
@ USB_NOT_SUPPORT
Definition: usb_std.h:271
USB_FAIL
@ USB_FAIL
Definition: usb_std.h:269
usbh_free_channel
void usbh_free_channel(usbh_core_type *uhost, uint8_t index)
usb host free channel
Definition: usbh_core.c:57
usbh_set_toggle
usb_sts_type usbh_set_toggle(usbh_core_type *uhost, uint8_t hc_num, uint8_t toggle)
usb host set toggle
Definition: usbh_core.c:94
usbh_ctrl_result_check
usb_sts_type usbh_ctrl_result_check(usbh_core_type *uhost, ctrl_ept0_sts_type next_ctrl_state, uint8_t next_enum_state)
usb wait control setup complete
Definition: usbh_core.c:724
usbh_alloc_channel
uint16_t usbh_alloc_channel(usbh_core_type *uhost, uint8_t ept_addr)
usb host alloc channel
Definition: usbh_core.c:694
usbh_ch_disable
void usbh_ch_disable(usbh_core_type *uhost, uint8_t chn)
disable host channel
Definition: usbh_core.c:683
usbh_hc_open
void usbh_hc_open(usbh_core_type *uhost, uint8_t chn, uint8_t ept_num, uint8_t dev_address, uint8_t type, uint16_t maxpacket, uint8_t speed)
usb host open channel
Definition: usbh_core.c:638
usbh_ctrl_request
usb_sts_type usbh_ctrl_request(usbh_core_type *uhost, uint8_t *buffer, uint16_t length)
usb host control request
Definition: usbh_ctrl.c:530
usbh_find_interface
uint8_t usbh_find_interface(usbh_core_type *uhost, uint8_t class_code, uint8_t sub_class, uint8_t protocol)
usb host find interface
Definition: usbh_ctrl.c:720
msc_error_type
msc_error_type
Definition: usbh_msc_bot_scsi.h:116
USBH_MSC_WRITE
@ USBH_MSC_WRITE
Definition: usbh_msc_bot_scsi.h:109
USBH_MSC_READ10
@ USBH_MSC_READ10
Definition: usbh_msc_bot_scsi.h:108
USBH_MSC_TEST_UNIT_READY
@ USBH_MSC_TEST_UNIT_READY
Definition: usbh_msc_bot_scsi.h:105
USBH_MSC_ERROR
@ USBH_MSC_ERROR
Definition: usbh_msc_bot_scsi.h:111
USBH_MSC_REQUEST_SENSE
@ USBH_MSC_REQUEST_SENSE
Definition: usbh_msc_bot_scsi.h:107
USBH_MSC_READ_CAPACITY10
@ USBH_MSC_READ_CAPACITY10
Definition: usbh_msc_bot_scsi.h:106
USBH_MSC_INIT
@ USBH_MSC_INIT
Definition: usbh_msc_bot_scsi.h:103
USBH_MSC_INQUIRY
@ USBH_MSC_INQUIRY
Definition: usbh_msc_bot_scsi.h:104
USBH_MSC_BUSY
@ USBH_MSC_BUSY
Definition: usbh_msc_bot_scsi.h:110
USBH_MSC_IDLE
@ USBH_MSC_IDLE
Definition: usbh_msc_bot_scsi.h:112
MSC_OK
@ MSC_OK
Definition: usbh_msc_bot_scsi.h:117
MSC_NOT_READY
@ MSC_NOT_READY
Definition: usbh_msc_bot_scsi.h:118
usbh_msc_bot_scsi_capacity
usb_sts_type usbh_msc_bot_scsi_capacity(void *uhost, msc_bot_trans_type *bot_trans, uint8_t lun, msc_scsi_data_capacity *capacity)
usb host msc bulk-only capacity request
Definition: usbh_msc_bot_scsi.c:439
usbh_msc_bot_scsi_test_unit_ready
usb_sts_type usbh_msc_bot_scsi_test_unit_ready(void *uhost, msc_bot_trans_type *bot_trans, uint8_t lun)
usb host msc bulk-only tet unit ready request
Definition: usbh_msc_bot_scsi.c:480
usbh_msc_bot_scsi_write
usb_sts_type usbh_msc_bot_scsi_write(void *uhost, msc_bot_trans_type *bot_trans, uint32_t address, uint8_t *write_data, uint32_t write_len, uint8_t lun)
usb host msc bulk-only write request
Definition: usbh_msc_bot_scsi.c:561
usbh_msc_bot_scsi_request_sense
usb_sts_type usbh_msc_bot_scsi_request_sense(void *uhost, msc_bot_trans_type *bot_trans, uint8_t lun)
usb host msc bulk-only request sense request
Definition: usbh_msc_bot_scsi.c:519
usbh_msc_bot_scsi_get_inquiry
usb_sts_type usbh_msc_bot_scsi_get_inquiry(void *uhost, msc_bot_trans_type *bot_trans, uint8_t lun, msc_scsi_data_inquiry *inquiry)
usb host msc bulk-only get inquiry request
Definition: usbh_msc_bot_scsi.c:400
usbh_msc_bot_scsi_read
usb_sts_type usbh_msc_bot_scsi_read(void *uhost, msc_bot_trans_type *bot_trans, uint32_t address, uint8_t *read_data, uint32_t read_len, uint8_t lun)
usb host msc bulk-only read request
Definition: usbh_msc_bot_scsi.c:604
msc_bot_scsi_init
usb_sts_type msc_bot_scsi_init(usbh_msc_type *msc_struct)
usb host msc init
Definition: usbh_msc_bot_scsi.c:642
USBH_SUPPORT_MAX_LUN
#define USBH_SUPPORT_MAX_LUN
Definition: usbh_msc_class.h:77
MSC_SUBCLASS_SCSI_TRANS
#define MSC_SUBCLASS_SCSI_TRANS
usb msc subclass code
Definition: usbh_msc_class.h:53
MSC_PROTOCOL_BBB
#define MSC_PROTOCOL_BBB
usb msc protocol code
Definition: usbh_msc_class.h:58
USBH_MSC_STATE_GET_LUN
@ USBH_MSC_STATE_GET_LUN
Definition: usbh_msc_class.h:85
USBH_MSC_STATE_IDLE
@ USBH_MSC_STATE_IDLE
Definition: usbh_msc_class.h:84
USBH_MSC_STATE_ERROR
@ USBH_MSC_STATE_ERROR
Definition: usbh_msc_class.h:86
usbh_msc_rw_handle
usb_sts_type usbh_msc_rw_handle(void *uhost, uint32_t address, uint32_t len, uint8_t *buffer, uint8_t lun)
usb host msc read and write handle
Definition: usbh_msc_class.c:392
usbh_msc_write
usb_sts_type usbh_msc_write(void *uhost, uint32_t address, uint32_t len, uint8_t *buffer, uint8_t lun)
usb host msc write
Definition: usbh_msc_class.c:486
usbh_msc_get_max_lun
static usb_sts_type usbh_msc_get_max_lun(void *uhost, uint8_t *lun)
usb host msc get max lun
Definition: usbh_msc_class.c:316
uhost_request_handler
static usb_sts_type uhost_request_handler(void *uhost)
usb host hid class request handler
Definition: usbh_msc_class.c:170
uhost_process_handler
static usb_sts_type uhost_process_handler(void *uhost)
usb host class process handler
Definition: usbh_msc_class.c:213
usbh_msc_read
usb_sts_type usbh_msc_read(void *uhost, uint32_t address, uint32_t len, uint8_t *buffer, uint8_t lun)
usb host msc read
Definition: usbh_msc_class.c:450
uhost_reset_handler
static usb_sts_type uhost_reset_handler(void *uhost)
usb host class reset handler
Definition: usbh_msc_class.c:128
usbh_msc_clear_feature
static usb_sts_type usbh_msc_clear_feature(void *uhost, uint8_t ept_num)
usb host msc clear feature
Definition: usbh_msc_class.c:346
uhost_msc_class_handler
usbh_class_handler_type uhost_msc_class_handler
Definition: usbh_msc_class.c:55
uhost_init_handler
static usb_sts_type uhost_init_handler(void *uhost)
usb host class init handler
Definition: usbh_msc_class.c:71
usbh_msc_is_ready
msc_error_type usbh_msc_is_ready(void *uhost, uint8_t lun)
usb host msc clear feature
Definition: usbh_msc_class.c:375
usbh_msc
usbh_msc_type usbh_msc
Definition: usbh_msc_class.c:53
msc_bot_trans_type::msc_struct
void * msc_struct
Definition: usbh_msc_bot_scsi.h:185
msc_scsi_data_capacity::blk_nbr
uint32_t blk_nbr
Definition: usbh_msc_bot_scsi.h:145
msc_scsi_data_capacity::blk_size
uint32_t blk_size
Definition: usbh_msc_bot_scsi.h:146
usbh_msc_type
usb msc struct
Definition: usbh_msc_class.h:94
usbh_msc_type::eptout
uint8_t eptout
Definition: usbh_msc_class.h:101
usbh_msc_type::in_poll
uint8_t in_poll
Definition: usbh_msc_class.h:98
usbh_msc_type::chin
uint8_t chin
Definition: usbh_msc_class.h:95
usbh_msc_type::out_poll
uint8_t out_poll
Definition: usbh_msc_class.h:103
usbh_msc_type::out_maxpacket
uint16_t out_maxpacket
Definition: usbh_msc_class.h:102
usbh_msc_type::bot_trans
msc_bot_trans_type bot_trans
Definition: usbh_msc_class.h:114
usbh_msc_type::in_maxpacket
uint16_t in_maxpacket
Definition: usbh_msc_class.h:97
usbh_msc_type::chout
uint8_t chout
Definition: usbh_msc_class.h:100
usbh_msc_type::protocol
uint8_t protocol
Definition: usbh_msc_class.h:104
usbh_msc_type::use_lun
uint32_t use_lun
Definition: usbh_msc_class.h:108
usbh_msc_type::state
msc_state_type state
Definition: usbh_msc_class.h:112
usbh_msc_type::max_lun
uint32_t max_lun
Definition: usbh_msc_class.h:106
usbh_msc_type::ctrl_state
usbh_msc_ctrl_state_type ctrl_state
Definition: usbh_msc_class.h:111
usbh_msc_type::eptin
uint8_t eptin
Definition: usbh_msc_class.h:96
usbh_msc_type::l_unit_n
usbh_msc_unit_type l_unit_n[0x2]
Definition: usbh_msc_class.h:115
usbh_msc_type::cur_lun
uint32_t cur_lun
Definition: usbh_msc_class.h:107
usbh_msc_unit_type::pre_state
usb_sts_type pre_state
Definition: usbh_msc_bot_scsi.h:197
usbh_msc_unit_type::ready
msc_error_type ready
Definition: usbh_msc_bot_scsi.h:196
usbh_msc_unit_type::capacity
msc_scsi_data_capacity capacity
Definition: usbh_msc_bot_scsi.h:194
usbh_msc_unit_type::change
uint8_t change
Definition: usbh_msc_bot_scsi.h:198
usbh_msc_unit_type::state
msc_state_type state
Definition: usbh_msc_bot_scsi.h:195
usbh_msc_unit_type::inquiry
msc_scsi_data_inquiry inquiry
Definition: usbh_msc_bot_scsi.h:193
usbh_core.h
usb host core header file
usbh_ctrl.h
usb header file
usbh_msc_class.h
usb host msc class header file


AT32F435/437 Firmwary Library: usbh_msc_class.h Source File

  • middlewares
  • usbh_class
  • usbh_msc
usbh_msc_class.h
Go to the documentation of this file.
1
26/* Define to prevent recursive inclusion -------------------------------------*/
27#ifndef __USBH_MSC_CLASS_H
28#define __USBH_MSC_CLASS_H
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#include "usbh_core.h"
35#include "usb_conf.h"
36#include "usbh_msc_bot_scsi.h"
37
53#define MSC_SUBCLASS_SCSI_TRANS 0x06
54
58#define MSC_PROTOCOL_BBB 0x50
59
63#define MSC_REQ_GET_MAX_LUN 0xFE
64#define MSC_REQ_BOMSR 0xFF
65
69#define USB_HID_GET_REPORT 0x01
70#define USB_HID_GET_IDLE 0x02
71#define USB_HID_GET_PROTOCOL 0x03
72#define USB_HID_SET_REPORT 0x09
73#define USB_HID_SET_IDLE 0x0A
74#define USB_HID_SET_PROTOCOL 0x0B
75
76
77#define USBH_SUPPORT_MAX_LUN 0x2
78
82typedef enum
83{
84 USBH_MSC_STATE_IDLE,
85 USBH_MSC_STATE_GET_LUN,
86 USBH_MSC_STATE_ERROR,
87 USBH_MSC_STATE_COMPLETE,
88}usbh_msc_ctrl_state_type;
89
93typedef struct
94{
95 uint8_t chin;
96 uint8_t eptin;
97 uint16_t in_maxpacket;
98 uint8_t in_poll;
99
100 uint8_t chout;
101 uint8_t eptout;
102 uint16_t out_maxpacket;
103 uint8_t out_poll;
104 uint8_t protocol;
105
106 uint32_t max_lun;
107 uint32_t cur_lun;
108 uint32_t use_lun;
109
110
111 usbh_msc_ctrl_state_type ctrl_state;
112 msc_state_type state;
113 uint8_t error;
114 msc_bot_trans_type bot_trans;
115 usbh_msc_unit_type l_unit_n[USBH_SUPPORT_MAX_LUN];
116 uint16_t poll_timer;
117 uint8_t buffer[64];
118}usbh_msc_type;
119
120extern usbh_class_handler_type uhost_msc_class_handler;
121extern usbh_msc_type usbh_msc;
122 msc_error_type usbh_msc_is_ready(void *uhost, uint8_t lun);
123 usb_sts_type usbh_msc_write(void *uhost, uint32_t address, uint32_t len, uint8_t *buffer, uint8_t lun);
124 usb_sts_type usbh_msc_read(void *uhost, uint32_t address, uint32_t len, uint8_t *buffer, uint8_t lun);
125 usb_sts_type usbh_msc_rw_handle(void *uhost, uint32_t address, uint32_t len, uint8_t *buffer, uint8_t lun);
126 usb_sts_type msc_bot_scsi_init(usbh_msc_type *msc_struct);
127
139#ifdef __cplusplus
140}
141#endif
142
143#endif
buffer
uint8_t buffer[((uint16_t) 320) *((uint16_t) 240)]
Definition: project/at_start_f435/examples/cortex_m4/fpu/src/main.c:43
msc_struct
msc_type msc_struct
Definition: msc_class.c:54
usb_sts_type
usb_sts_type
usb return status
Definition: usb_std.h:267
msc_state_type
msc_state_type
usb msc process state
Definition: usbh_msc_bot_scsi.h:102
msc_error_type
msc_error_type
Definition: usbh_msc_bot_scsi.h:116
usbh_msc_rw_handle
usb_sts_type usbh_msc_rw_handle(void *uhost, uint32_t address, uint32_t len, uint8_t *buffer, uint8_t lun)
usb host msc read and write handle
Definition: usbh_msc_class.c:392
usbh_msc_write
usb_sts_type usbh_msc_write(void *uhost, uint32_t address, uint32_t len, uint8_t *buffer, uint8_t lun)
usb host msc write
Definition: usbh_msc_class.c:486
usbh_msc_ctrl_state_type
usbh_msc_ctrl_state_type
usb msc request state
Definition: usbh_msc_class.h:83
USBH_SUPPORT_MAX_LUN
#define USBH_SUPPORT_MAX_LUN
Definition: usbh_msc_class.h:77
usbh_msc_read
usb_sts_type usbh_msc_read(void *uhost, uint32_t address, uint32_t len, uint8_t *buffer, uint8_t lun)
usb host msc read
Definition: usbh_msc_class.c:450
uhost_msc_class_handler
usbh_class_handler_type uhost_msc_class_handler
Definition: usbh_msc_class.c:55
usbh_msc_is_ready
msc_error_type usbh_msc_is_ready(void *uhost, uint8_t lun)
usb host msc clear feature
Definition: usbh_msc_class.c:375
msc_bot_scsi_init
usb_sts_type msc_bot_scsi_init(usbh_msc_type *msc_struct)
usb host msc init
Definition: usbh_msc_bot_scsi.c:642
usbh_msc
usbh_msc_type usbh_msc
Definition: usbh_msc_class.c:53
USBH_MSC_STATE_GET_LUN
@ USBH_MSC_STATE_GET_LUN
Definition: usbh_msc_class.h:85
USBH_MSC_STATE_IDLE
@ USBH_MSC_STATE_IDLE
Definition: usbh_msc_class.h:84
USBH_MSC_STATE_ERROR
@ USBH_MSC_STATE_ERROR
Definition: usbh_msc_class.h:86
USBH_MSC_STATE_COMPLETE
@ USBH_MSC_STATE_COMPLETE
Definition: usbh_msc_class.h:87
msc_bot_trans_type
usb msc bulk-only transfer control type
Definition: usbh_msc_bot_scsi.h:178
usbh_msc_type
usb msc struct
Definition: usbh_msc_class.h:94
usbh_msc_type::eptout
uint8_t eptout
Definition: usbh_msc_class.h:101
usbh_msc_type::in_poll
uint8_t in_poll
Definition: usbh_msc_class.h:98
usbh_msc_type::chin
uint8_t chin
Definition: usbh_msc_class.h:95
usbh_msc_type::out_poll
uint8_t out_poll
Definition: usbh_msc_class.h:103
usbh_msc_type::out_maxpacket
uint16_t out_maxpacket
Definition: usbh_msc_class.h:102
usbh_msc_type::bot_trans
msc_bot_trans_type bot_trans
Definition: usbh_msc_class.h:114
usbh_msc_type::in_maxpacket
uint16_t in_maxpacket
Definition: usbh_msc_class.h:97
usbh_msc_type::chout
uint8_t chout
Definition: usbh_msc_class.h:100
usbh_msc_type::poll_timer
uint16_t poll_timer
Definition: usbh_msc_class.h:116
usbh_msc_type::protocol
uint8_t protocol
Definition: usbh_msc_class.h:104
usbh_msc_type::use_lun
uint32_t use_lun
Definition: usbh_msc_class.h:108
usbh_msc_type::error
uint8_t error
Definition: usbh_msc_class.h:113
usbh_msc_type::state
msc_state_type state
Definition: usbh_msc_class.h:112
usbh_msc_type::max_lun
uint32_t max_lun
Definition: usbh_msc_class.h:106
usbh_msc_type::ctrl_state
usbh_msc_ctrl_state_type ctrl_state
Definition: usbh_msc_class.h:111
usbh_msc_type::eptin
uint8_t eptin
Definition: usbh_msc_class.h:96
usbh_msc_type::cur_lun
uint32_t cur_lun
Definition: usbh_msc_class.h:107
usbh_msc_unit_type
usb msc bank type
Definition: usbh_msc_bot_scsi.h:192
usbh_core.h
usb host core header file
usbh_msc_bot_scsi.h
usb host msc bulk-only transfer and scsi header file


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • utilities
  • at32f435_437_freertos_demo
  • inc
utilities/at32f435_437_freertos_demo/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f435_437_freertos_demo
  • inc
utilities/at32f435_437_freertos_demo/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
50#if !defined HEXT_VALUE
51#define HEXT_VALUE ((uint32_t)8000000)
52#endif
53
58#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
59#define HICK_VALUE ((uint32_t)8000000)
61/* module define -------------------------------------------------------------*/
62#define CRM_MODULE_ENABLED
63#define TMR_MODULE_ENABLED
64#define ERTC_MODULE_ENABLED
65#define GPIO_MODULE_ENABLED
66#define I2C_MODULE_ENABLED
67#define USART_MODULE_ENABLED
68#define PWC_MODULE_ENABLED
69#define CAN_MODULE_ENABLED
70#define ADC_MODULE_ENABLED
71#define DAC_MODULE_ENABLED
72#define SPI_MODULE_ENABLED
73#define EDMA_MODULE_ENABLED
74#define DMA_MODULE_ENABLED
75#define DEBUG_MODULE_ENABLED
76#define FLASH_MODULE_ENABLED
77#define CRC_MODULE_ENABLED
78#define WWDT_MODULE_ENABLED
79#define WDT_MODULE_ENABLED
80#define EXINT_MODULE_ENABLED
81#define SDIO_MODULE_ENABLED
82#define XMC_MODULE_ENABLED
83#define USB_MODULE_ENABLED
84#define ACC_MODULE_ENABLED
85#define MISC_MODULE_ENABLED
86#define QSPI_MODULE_ENABLED
87#define DVP_MODULE_ENABLED
88#define SCFG_MODULE_ENABLED
89#define EMAC_MODULE_ENABLED
90
91/* includes ------------------------------------------------------------------*/
92#ifdef CRM_MODULE_ENABLED
93#include "at32f435_437_crm.h"
94#endif
95#ifdef TMR_MODULE_ENABLED
96#include "at32f435_437_tmr.h"
97#endif
98#ifdef ERTC_MODULE_ENABLED
99#include "at32f435_437_ertc.h"
100#endif
101#ifdef GPIO_MODULE_ENABLED
102#include "at32f435_437_gpio.h"
103#endif
104#ifdef I2C_MODULE_ENABLED
105#include "at32f435_437_i2c.h"
106#endif
107#ifdef USART_MODULE_ENABLED
108#include "at32f435_437_usart.h"
109#endif
110#ifdef PWC_MODULE_ENABLED
111#include "at32f435_437_pwc.h"
112#endif
113#ifdef CAN_MODULE_ENABLED
114#include "at32f435_437_can.h"
115#endif
116#ifdef ADC_MODULE_ENABLED
117#include "at32f435_437_adc.h"
118#endif
119#ifdef DAC_MODULE_ENABLED
120#include "at32f435_437_dac.h"
121#endif
122#ifdef SPI_MODULE_ENABLED
123#include "at32f435_437_spi.h"
124#endif
125#ifdef DMA_MODULE_ENABLED
126#include "at32f435_437_dma.h"
127#endif
128#ifdef DEBUG_MODULE_ENABLED
129#include "at32f435_437_debug.h"
130#endif
131#ifdef FLASH_MODULE_ENABLED
132#include "at32f435_437_flash.h"
133#endif
134#ifdef CRC_MODULE_ENABLED
135#include "at32f435_437_crc.h"
136#endif
137#ifdef WWDT_MODULE_ENABLED
138#include "at32f435_437_wwdt.h"
139#endif
140#ifdef WDT_MODULE_ENABLED
141#include "at32f435_437_wdt.h"
142#endif
143#ifdef EXINT_MODULE_ENABLED
144#include "at32f435_437_exint.h"
145#endif
146#ifdef SDIO_MODULE_ENABLED
147#include "at32f435_437_sdio.h"
148#endif
149#ifdef XMC_MODULE_ENABLED
150#include "at32f435_437_xmc.h"
151#endif
152#ifdef ACC_MODULE_ENABLED
153#include "at32f435_437_acc.h"
154#endif
155#ifdef MISC_MODULE_ENABLED
156#include "at32f435_437_misc.h"
157#endif
158#ifdef EDMA_MODULE_ENABLED
159#include "at32f435_437_edma.h"
160#endif
161#ifdef QSPI_MODULE_ENABLED
162#include "at32f435_437_qspi.h"
163#endif
164#ifdef SCFG_MODULE_ENABLED
165#include "at32f435_437_scfg.h"
166#endif
167#ifdef EMAC_MODULE_ENABLED
168#include "at32f435_437_emac.h"
169#endif
170#ifdef DVP_MODULE_ENABLED
171#include "at32f435_437_dvp.h"
172#endif
173#ifdef USB_MODULE_ENABLED
174#include "at32f435_437_usb.h"
175#endif
176
185#ifdef __cplusplus
186}
187#endif
188
189#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • utilities
  • at32f435_437_freertos_demo
  • inc
utilities/at32f435_437_freertos_demo/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • utilities
  • at32f435_437_freertos_demo
  • src
Functions
utilities/at32f435_437_freertos_demo/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_freertos_demo/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • utilities
  • at32f435_437_freertos_demo
  • src
utilities/at32f435_437_freertos_demo/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource */
71 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
72
73 /* enable pll */
74 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
75
76 /* wait till pll is ready */
77 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
78 {
79 }
80
81 /* config ahbclk */
82 crm_ahb_div_set(CRM_AHB_DIV_1);
83
84 /* config apb2clk */
85 crm_apb2_div_set(CRM_APB2_DIV_2);
86
87 /* config apb1clk */
88 crm_apb1_div_set(CRM_APB1_DIV_2);
89
90 /* enable auto step mode */
91 crm_auto_step_mode_enable(TRUE);
92
93 /* select pll as system clock source */
94 crm_sysclk_switch(CRM_SCLK_PLL);
95
96 /* wait till pll is used as system clock source */
97 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
98 {
99 }
100
101 /* disable auto step mode */
102 crm_auto_step_mode_enable(FALSE);
103
104 /* update system_core_clock global variable */
105 system_core_clock_update();
106}
107
system_clock_config
void system_clock_config(void)
system clock config program
Definition: utilities/at32f435_437_freertos_demo/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • utilities
  • at32f435_437_freertos_demo
  • src
Functions
utilities/at32f435_437_freertos_demo/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | DebugMon_Handler (void)
this function handles svcall exception. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_freertos_demo/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • utilities
  • at32f435_437_freertos_demo
  • src
utilities/at32f435_437_freertos_demo/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104//void SVC_Handler(void)
105//{
106//}
107
113void DebugMon_Handler(void)
114{
115}
116
122//void PendSV_Handler(void)
123//{
124//}
125
131//void SysTick_Handler(void)
132//{
133//}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: utilities/at32f435_437_freertos_demo/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: utilities/at32f435_437_freertos_demo/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: utilities/at32f435_437_freertos_demo/src/at32f435_437_int.c:65
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: utilities/at32f435_437_freertos_demo/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: utilities/at32f435_437_freertos_demo/src/at32f435_437_int.c:78
DebugMon_Handler
void DebugMon_Handler(void)
this function handles svcall exception.
Definition: utilities/at32f435_437_freertos_demo/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • utilities
  • at32f435_437_freertos_demo
  • src
Functions | Variables
utilities/at32f435_437_freertos_demo/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "FreeRTOS.h"
#include "task.h"

Go to the source code of this file.

Functions

void | led2_task_function (void *pvParameters)
void | led3_task_function (void *pvParameters)
int | main (void)
main function. More...

Variables

TaskHandle_t | led2_handler
TaskHandle_t | led3_handler

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_freertos_demo/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • utilities
  • at32f435_437_freertos_demo
  • src
utilities/at32f435_437_freertos_demo/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "FreeRTOS.h"
30#include "task.h"
31
39TaskHandle_t led2_handler;
40TaskHandle_t led3_handler;
41
42/* led2 task */
43void led2_task_function(void *pvParameters);
44/* led3 task */
45void led3_task_function(void *pvParameters);
46
52int main(void)
53{
54 system_clock_config();
55
56 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
57
58 /* init led2 and led3 */
59 at32_led_init(LED2);
60 at32_led_init(LED3);
61
62 /* init usart1 */
63 uart_print_init(115200);
64
65 /* enter critical */
66 taskENTER_CRITICAL();
67
68 /* create led2 task */
69 if(xTaskCreate((TaskFunction_t )led2_task_function,
70 (const char* )"LED2_task",
71 (uint16_t )512,
72 (void* )NULL,
73 (UBaseType_t )2,
74 (TaskHandle_t* )&led2_handler) != pdPASS)
75 {
76 printf("LED2 task could not be created as there was insufficient heap memory remaining.\r\n");
77 }
78 else
79 {
80 printf("LED2 task was created successfully.\r\n");
81 }
82 /* create led3 task */
83 if(xTaskCreate((TaskFunction_t )led3_task_function,
84 (const char* )"LED3_task",
85 (uint16_t )512,
86 (void* )NULL,
87 (UBaseType_t )2,
88 (TaskHandle_t* )&led3_handler) != pdPASS)
89 {
90 printf("LED3 task could not be created as there was insufficient heap memory remaining.\r\n");
91 }
92 else
93 {
94 printf("LED3 task was created successfully.\r\n");
95 }
96
97 /* exit critical */
98 taskEXIT_CRITICAL();
99
100 /* start scheduler */
101 vTaskStartScheduler();
102}
103
104/* led2 task function */
105void led2_task_function(void *pvParameters)
106{
107 while(1)
108 {
109 at32_led_toggle(LED2);
110 vTaskDelay(1000);
111 }
112}
113
114/* led3 task function */
115void led3_task_function(void *pvParameters)
116{
117 while(1)
118 {
119 at32_led_toggle(LED3);
120 vTaskDelay(500);
121 }
122}
123
at32f435_437_board.h
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
at32_led_init
void at32_led_init(led_type led)
configure led gpio
Definition: at32f435_437_board.c:218
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
led2_task_function
void led2_task_function(void *pvParameters)
Definition: utilities/at32f435_437_freertos_demo/src/main.c:105
main
int main(void)
main function.
Definition: utilities/at32f435_437_freertos_demo/src/main.c:52
led3_task_function
void led3_task_function(void *pvParameters)
Definition: utilities/at32f435_437_freertos_demo/src/main.c:115
led3_handler
TaskHandle_t led3_handler
Definition: utilities/at32f435_437_freertos_demo/src/main.c:40
led2_handler
TaskHandle_t led2_handler
Definition: utilities/at32f435_437_freertos_demo/src/main.c:39
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • utilities
  • at32f435_437_gen_random_number_demo
  • inc
utilities/at32f435_437_gen_random_number_demo/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f435_437_gen_random_number_demo
  • inc
utilities/at32f435_437_gen_random_number_demo/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
50#if !defined HEXT_VALUE
51#define HEXT_VALUE ((uint32_t)8000000)
52#endif
53
58#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
59#define HICK_VALUE ((uint32_t)8000000)
61/* module define -------------------------------------------------------------*/
62#define CRM_MODULE_ENABLED
63#define TMR_MODULE_ENABLED
64#define ERTC_MODULE_ENABLED
65#define GPIO_MODULE_ENABLED
66#define I2C_MODULE_ENABLED
67#define USART_MODULE_ENABLED
68#define PWC_MODULE_ENABLED
69#define CAN_MODULE_ENABLED
70#define ADC_MODULE_ENABLED
71#define DAC_MODULE_ENABLED
72#define SPI_MODULE_ENABLED
73#define EDMA_MODULE_ENABLED
74#define DMA_MODULE_ENABLED
75#define DEBUG_MODULE_ENABLED
76#define FLASH_MODULE_ENABLED
77#define CRC_MODULE_ENABLED
78#define WWDT_MODULE_ENABLED
79#define WDT_MODULE_ENABLED
80#define EXINT_MODULE_ENABLED
81#define SDIO_MODULE_ENABLED
82#define XMC_MODULE_ENABLED
83#define USB_MODULE_ENABLED
84#define ACC_MODULE_ENABLED
85#define MISC_MODULE_ENABLED
86#define QSPI_MODULE_ENABLED
87#define DVP_MODULE_ENABLED
88#define SCFG_MODULE_ENABLED
89#define EMAC_MODULE_ENABLED
90
91/* includes ------------------------------------------------------------------*/
92#ifdef CRM_MODULE_ENABLED
93#include "at32f435_437_crm.h"
94#endif
95#ifdef TMR_MODULE_ENABLED
96#include "at32f435_437_tmr.h"
97#endif
98#ifdef ERTC_MODULE_ENABLED
99#include "at32f435_437_ertc.h"
100#endif
101#ifdef GPIO_MODULE_ENABLED
102#include "at32f435_437_gpio.h"
103#endif
104#ifdef I2C_MODULE_ENABLED
105#include "at32f435_437_i2c.h"
106#endif
107#ifdef USART_MODULE_ENABLED
108#include "at32f435_437_usart.h"
109#endif
110#ifdef PWC_MODULE_ENABLED
111#include "at32f435_437_pwc.h"
112#endif
113#ifdef CAN_MODULE_ENABLED
114#include "at32f435_437_can.h"
115#endif
116#ifdef ADC_MODULE_ENABLED
117#include "at32f435_437_adc.h"
118#endif
119#ifdef DAC_MODULE_ENABLED
120#include "at32f435_437_dac.h"
121#endif
122#ifdef SPI_MODULE_ENABLED
123#include "at32f435_437_spi.h"
124#endif
125#ifdef DMA_MODULE_ENABLED
126#include "at32f435_437_dma.h"
127#endif
128#ifdef DEBUG_MODULE_ENABLED
129#include "at32f435_437_debug.h"
130#endif
131#ifdef FLASH_MODULE_ENABLED
132#include "at32f435_437_flash.h"
133#endif
134#ifdef CRC_MODULE_ENABLED
135#include "at32f435_437_crc.h"
136#endif
137#ifdef WWDT_MODULE_ENABLED
138#include "at32f435_437_wwdt.h"
139#endif
140#ifdef WDT_MODULE_ENABLED
141#include "at32f435_437_wdt.h"
142#endif
143#ifdef EXINT_MODULE_ENABLED
144#include "at32f435_437_exint.h"
145#endif
146#ifdef SDIO_MODULE_ENABLED
147#include "at32f435_437_sdio.h"
148#endif
149#ifdef XMC_MODULE_ENABLED
150#include "at32f435_437_xmc.h"
151#endif
152#ifdef ACC_MODULE_ENABLED
153#include "at32f435_437_acc.h"
154#endif
155#ifdef MISC_MODULE_ENABLED
156#include "at32f435_437_misc.h"
157#endif
158#ifdef EDMA_MODULE_ENABLED
159#include "at32f435_437_edma.h"
160#endif
161#ifdef QSPI_MODULE_ENABLED
162#include "at32f435_437_qspi.h"
163#endif
164#ifdef SCFG_MODULE_ENABLED
165#include "at32f435_437_scfg.h"
166#endif
167#ifdef EMAC_MODULE_ENABLED
168#include "at32f435_437_emac.h"
169#endif
170#ifdef DVP_MODULE_ENABLED
171#include "at32f435_437_dvp.h"
172#endif
173#ifdef USB_MODULE_ENABLED
174#include "at32f435_437_usb.h"
175#endif
176
185#ifdef __cplusplus
186}
187#endif
188
189#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • utilities
  • at32f435_437_gen_random_number_demo
  • inc
utilities/at32f435_437_gen_random_number_demo/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • utilities
  • at32f435_437_gen_random_number_demo
  • src
Functions
utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • utilities
  • at32f435_437_gen_random_number_demo
  • src
utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource */
71 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
72
73 /* enable pll */
74 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
75
76 /* wait till pll is ready */
77 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
78 {
79 }
80
81 /* config ahbclk */
82 crm_ahb_div_set(CRM_AHB_DIV_1);
83
84 /* config apb2clk */
85 crm_apb2_div_set(CRM_APB2_DIV_2);
86
87 /* config apb1clk */
88 crm_apb1_div_set(CRM_APB1_DIV_2);
89
90 /* enable auto step mode */
91 crm_auto_step_mode_enable(TRUE);
92
93 /* select pll as system clock source */
94 crm_sysclk_switch(CRM_SCLK_PLL);
95
96 /* wait till pll is used as system clock source */
97 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
98 {
99 }
100
101 /* disable auto step mode */
102 crm_auto_step_mode_enable(FALSE);
103
104 /* update system_core_clock global variable */
105 system_core_clock_update();
106}
107
system_clock_config
void system_clock_config(void)
system clock config program
Definition: utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • utilities
  • at32f435_437_gen_random_number_demo
  • src
Functions
utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • utilities
  • at32f435_437_gen_random_number_demo
  • src
utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: utilities/at32f435_437_gen_random_number_demo/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • utilities
  • at32f435_437_gen_random_number_demo
  • src
Functions
utilities/at32f435_437_gen_random_number_demo/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "random.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_gen_random_number_demo/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • utilities
  • at32f435_437_gen_random_number_demo
  • src
utilities/at32f435_437_gen_random_number_demo/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "random.h"
30
43int main(void)
44{
45 system_clock_config();
46
47 at32_board_init();
48 uart_print_init(115200);
49 printf("gen random number test\r\n");
50 randnum_test();
51 while(1)
52 {
53 }
54}
55
at32f435_437_board.h
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
uart_print_init
void uart_print_init(uint32_t baudrate)
initialize uart
Definition: at32f435_437_board.c:107
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
randnum_test
void randnum_test(void)
enable ertc as seed
Definition: random.c:142
main
int main(void)
main function.
Definition: utilities/at32f435_437_gen_random_number_demo/src/main.c:43
random.h
at32f435_437 random header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f435_437_qspi_algorithm_demo
  • iar_out
  • inc
utilities/at32f435_437_qspi_algorithm_demo/iar_out/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f435_437_qspi_algorithm_demo
  • keil_flm
  • inc
utilities/at32f435_437_qspi_algorithm_demo/keil_flm/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • inc
utilities/at32f435_437_slib_demo/project_l0/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • inc
utilities/at32f435_437_slib_demo/project_l0/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
50#if !defined HEXT_VALUE
51#define HEXT_VALUE ((uint32_t)8000000)
52#endif
53
58#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
59#define HICK_VALUE ((uint32_t)8000000)
61/* module define -------------------------------------------------------------*/
62#define CRM_MODULE_ENABLED
63#define TMR_MODULE_ENABLED
64#define ERTC_MODULE_ENABLED
65#define GPIO_MODULE_ENABLED
66#define I2C_MODULE_ENABLED
67#define USART_MODULE_ENABLED
68#define PWC_MODULE_ENABLED
69#define CAN_MODULE_ENABLED
70#define ADC_MODULE_ENABLED
71#define DAC_MODULE_ENABLED
72#define SPI_MODULE_ENABLED
73#define EDMA_MODULE_ENABLED
74#define DMA_MODULE_ENABLED
75#define DEBUG_MODULE_ENABLED
76#define FLASH_MODULE_ENABLED
77#define CRC_MODULE_ENABLED
78#define WWDT_MODULE_ENABLED
79#define WDT_MODULE_ENABLED
80#define EXINT_MODULE_ENABLED
81#define SDIO_MODULE_ENABLED
82#define XMC_MODULE_ENABLED
83#define USB_MODULE_ENABLED
84#define ACC_MODULE_ENABLED
85#define MISC_MODULE_ENABLED
86#define QSPI_MODULE_ENABLED
87#define DVP_MODULE_ENABLED
88#define SCFG_MODULE_ENABLED
89#define EMAC_MODULE_ENABLED
90
91/* includes ------------------------------------------------------------------*/
92#ifdef CRM_MODULE_ENABLED
93#include "at32f435_437_crm.h"
94#endif
95#ifdef TMR_MODULE_ENABLED
96#include "at32f435_437_tmr.h"
97#endif
98#ifdef ERTC_MODULE_ENABLED
99#include "at32f435_437_ertc.h"
100#endif
101#ifdef GPIO_MODULE_ENABLED
102#include "at32f435_437_gpio.h"
103#endif
104#ifdef I2C_MODULE_ENABLED
105#include "at32f435_437_i2c.h"
106#endif
107#ifdef USART_MODULE_ENABLED
108#include "at32f435_437_usart.h"
109#endif
110#ifdef PWC_MODULE_ENABLED
111#include "at32f435_437_pwc.h"
112#endif
113#ifdef CAN_MODULE_ENABLED
114#include "at32f435_437_can.h"
115#endif
116#ifdef ADC_MODULE_ENABLED
117#include "at32f435_437_adc.h"
118#endif
119#ifdef DAC_MODULE_ENABLED
120#include "at32f435_437_dac.h"
121#endif
122#ifdef SPI_MODULE_ENABLED
123#include "at32f435_437_spi.h"
124#endif
125#ifdef DMA_MODULE_ENABLED
126#include "at32f435_437_dma.h"
127#endif
128#ifdef DEBUG_MODULE_ENABLED
129#include "at32f435_437_debug.h"
130#endif
131#ifdef FLASH_MODULE_ENABLED
132#include "at32f435_437_flash.h"
133#endif
134#ifdef CRC_MODULE_ENABLED
135#include "at32f435_437_crc.h"
136#endif
137#ifdef WWDT_MODULE_ENABLED
138#include "at32f435_437_wwdt.h"
139#endif
140#ifdef WDT_MODULE_ENABLED
141#include "at32f435_437_wdt.h"
142#endif
143#ifdef EXINT_MODULE_ENABLED
144#include "at32f435_437_exint.h"
145#endif
146#ifdef SDIO_MODULE_ENABLED
147#include "at32f435_437_sdio.h"
148#endif
149#ifdef XMC_MODULE_ENABLED
150#include "at32f435_437_xmc.h"
151#endif
152#ifdef ACC_MODULE_ENABLED
153#include "at32f435_437_acc.h"
154#endif
155#ifdef MISC_MODULE_ENABLED
156#include "at32f435_437_misc.h"
157#endif
158#ifdef EDMA_MODULE_ENABLED
159#include "at32f435_437_edma.h"
160#endif
161#ifdef QSPI_MODULE_ENABLED
162#include "at32f435_437_qspi.h"
163#endif
164#ifdef SCFG_MODULE_ENABLED
165#include "at32f435_437_scfg.h"
166#endif
167#ifdef EMAC_MODULE_ENABLED
168#include "at32f435_437_emac.h"
169#endif
170#ifdef DVP_MODULE_ENABLED
171#include "at32f435_437_dvp.h"
172#endif
173#ifdef USB_MODULE_ENABLED
174#include "at32f435_437_usb.h"
175#endif
176
185#ifdef __cplusplus
186}
187#endif
188
189#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • inc
utilities/at32f435_437_slib_demo/project_l0/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • src
Functions
utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • src
utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource */
71 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
72
73 /* enable pll */
74 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
75
76 /* wait till pll is ready */
77 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
78 {
79 }
80
81 /* config ahbclk */
82 crm_ahb_div_set(CRM_AHB_DIV_1);
83
84 /* config apb2clk */
85 crm_apb2_div_set(CRM_APB2_DIV_2);
86
87 /* config apb1clk */
88 crm_apb1_div_set(CRM_APB1_DIV_2);
89
90 /* enable auto step mode */
91 crm_auto_step_mode_enable(TRUE);
92
93 /* select pll as system clock source */
94 crm_sysclk_switch(CRM_SCLK_PLL);
95
96 /* wait till pll is used as system clock source */
97 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
98 {
99 }
100
101 /* disable auto step mode */
102 crm_auto_step_mode_enable(FALSE);
103
104 /* update system_core_clock global variable */
105 system_core_clock_update();
106}
107
system_clock_config
void system_clock_config(void)
system clock config program
Definition: utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • src
Functions
utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | FLASH_IRQHandler (void)
flash handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • src
utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void FLASH_IRQHandler(void)
142{
143 if(flash_flag_get(FLASH_EPPERR_FLAG))
144 {
145 flash_flag_clear(FLASH_EPPERR_FLAG);
146 delay_ms(500);
147 }
148}
149
at32f435_437_board.h
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
FLASH_EPPERR_FLAG
#define FLASH_EPPERR_FLAG
Definition: at32f435_437_flash.h:82
flash_flag_get
flag_status flash_flag_get(uint32_t flash_flag)
check whether the specified flash flag is set or not.
Definition: at32f435_437_flash.c:63
flash_flag_clear
void flash_flag_clear(uint32_t flash_flag)
clear the flash flag.
Definition: at32f435_437_flash.c:105
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c:92
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c:53
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c:66
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c:105
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c:123
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c:44
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c:79
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c:132
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c:114
FLASH_IRQHandler
void FLASH_IRQHandler(void)
flash handler.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/at32f435_437_int.c:141
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • src
Macros | Functions | Variables
utilities/at32f435_437_slib_demo/project_l0/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "math_helper.h"
#include "fir_filter.h"

Go to the source code of this file.

Macros

#define | USE_SLIB_FUNCTION /* define it when user want to activate slib in this project */
#define | FLASH_START_ADDR 0x08000000
#define | TEST_SLIB_PSW 0x55665566
#define | SLIB_START_ADDR 0x08001000
#define | SLIB_INST_ADDR 0x08002000
#define | SLIB_END_ADDR 0x08002000
#define | FLASH_SECTOR_SIZE 0x1000
#define | SECTOR_NUM(dwAddr) ((dwAddr & (FLASH_START_ADDR - 1)) / FLASH_SECTOR_SIZE)
#define | SECTOR_WORD_CNT (FLASH_SECTOR_SIZE >> 2) /* words per sector */
#define | SNR_THRESHOLD_F32 140.0f
#define | TEST_LENGTH_SAMPLES 320

Functions

flash_status_type | slib_enable (void)
config slib enable and program slib area. More...
void | config_flash_interrupt (void)
config flash error interrupt. More...
int | main (void)
main function. More...

Variables

float32_t | testInput_f32_1kHz_15kHz []
float32_t | refOutput []
uint32_t | dw_start_sector
uint32_t | dw_inst_start_sector
uint32_t | dw_end_sector
uint32_t | temp_buf [1024]
static float32_t | testOutput [320]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_slib_demo/project_l0/src/main.c.

Variable Documentation

◆ refOutput

float32_t refOutput[]
extern

Definition at line 96 of file project_l0/src/arm_fir_data.c.

Referenced by main().

◆ testInput_f32_1kHz_15kHz

float32_t testInput_f32_1kHz_15kHz[]
extern

Definition at line 48 of file project_l0/src/arm_fir_data.c.

Referenced by main().


AT32F435/437 Firmwary Library: main.c Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l0
  • src
utilities/at32f435_437_slib_demo/project_l0/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "math_helper.h"
30#include "fir_filter.h"
31
32extern float32_t testInput_f32_1kHz_15kHz[];
33extern float32_t refOutput[];
34
43#define USE_SLIB_FUNCTION /* define it when user want to activate slib in this project */
44
45#if defined (USE_SLIB_FUNCTION)
46#define FLASH_START_ADDR 0x08000000
47#define TEST_SLIB_PSW 0x55665566
48#define SLIB_START_ADDR 0x08001000
49#define SLIB_INST_ADDR 0x08002000
50#define SLIB_END_ADDR 0x08002000
51#define FLASH_SECTOR_SIZE 0x1000
52#define SECTOR_NUM(dwAddr) ((dwAddr & (FLASH_START_ADDR - 1)) / FLASH_SECTOR_SIZE)
53#define SECTOR_WORD_CNT (FLASH_SECTOR_SIZE >> 2) /* words per sector */
54#endif
55#define SNR_THRESHOLD_F32 140.0f
56#define TEST_LENGTH_SAMPLES 320
57
58#if defined (USE_SLIB_FUNCTION)
59uint32_t dw_start_sector, dw_inst_start_sector, dw_end_sector;
60uint32_t temp_buf[1024]; /* 4kb buffer */
61#endif
62
63static float32_t testOutput[TEST_LENGTH_SAMPLES];
64
65#if defined (USE_SLIB_FUNCTION)
66 flash_status_type slib_enable(void);
67#endif
68void config_flash_interrupt(void);
69
75void config_flash_interrupt(void)
76{
77 flash_unlock();
78 flash_interrupt_enable(FLASH_BANK1_ERR_INT, TRUE);
79 flash_lock();
80 /* config nvic priority group */
81 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
82
83 nvic_irq_enable(FLASH_IRQn, 0, 0);
84}
85
86#if defined (USE_SLIB_FUNCTION)
92 flash_status_type slib_enable(void)
93{
94 uint32_t *ptr;
95 uint32_t i, j;
96 flash_status_type status = FLASH_OPERATE_DONE;
97 ptr = (uint32_t *)SLIB_START_ADDR;
98 dw_start_sector = SECTOR_NUM(SLIB_START_ADDR); /* slib start sector */
99 dw_inst_start_sector = SECTOR_NUM(SLIB_INST_ADDR); /* slib data sector */
100 dw_end_sector = SECTOR_NUM(SLIB_END_ADDR); /* slib end sector */
101 flash_unlock();
102 status = flash_slib_enable(TEST_SLIB_PSW, dw_start_sector, dw_inst_start_sector, dw_end_sector);
103 if(status != FLASH_OPERATE_DONE)
104 return status;
105 for(i = 0; i <= (dw_end_sector - dw_start_sector); i++)
106 {
107 memcpy(temp_buf, ptr, FLASH_SECTOR_SIZE);
108 status = flash_sector_erase(SLIB_START_ADDR + i * FLASH_SECTOR_SIZE);
109 if(status != FLASH_OPERATE_DONE)
110 return status;
111 for(j = 0; j < (FLASH_SECTOR_SIZE >> 2); j++)
112 {
113 status = flash_word_program(SLIB_START_ADDR + i * FLASH_SECTOR_SIZE + (j << 2), temp_buf[j]);
114 if(status != FLASH_OPERATE_DONE)
115 return status;
116 }
117 ptr += SECTOR_WORD_CNT;
118 }
119 return status;
120}
121#endif
122
128int main(void)
129{
130 arm_status status;
131 float32_t *inputf32, *outputf32, snr;
132
133 system_clock_config();
134 at32_board_init();
135
136 /* initialize input and output buffer pointers */
137 inputf32 = &testInput_f32_1kHz_15kHz[0];
138 outputf32 = &testOutput[0];
139
140 /* configure flash to generate an interrupt when a write protect error occur */
141 config_flash_interrupt();
142
143 /* wait for key button to be pushed, then turn off led3 */
144 while(at32_button_press() == NO_BUTTON)
145 {
146 at32_led_toggle(LED3);
147 delay_ms(100);
148 }
149 at32_led_off(LED3);
150
151 /* call the fir low pass filter function */
152 FIR_lowpass_filter(inputf32, outputf32, TEST_LENGTH_SAMPLES);
153
154 /* compare the generated output against the reference output computed in matlab. */
155 snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES);
156 if(snr < SNR_THRESHOLD_F32)
157 {
158 status = ARM_MATH_TEST_FAILURE;
159 }
160 else
161 {
162 status = ARM_MATH_SUCCESS;
163#if defined (USE_SLIB_FUNCTION)
164 /* enable slib protection from sector 2 to sector 5 when fir filter ip-code is tested ok */
165 if(flash_slib_state_get() == RESET)
166 {
167 /* if slib has not been enabled, set slib configuration */
168 if(slib_enable() == FLASH_OPERATE_DONE)
169 {
170 /* if slib configuration is correctly set, tuen on green led4 */
171 at32_led_on(LED4);
172 delay_sec(3);
173
174 /* execute system reset to activate slib protection */
175 nvic_system_reset();
176 }
177 else
178 {
179 /* turn on red led2 if slib activation failed */
180 at32_led_on(LED2);
181 while(1);
182 }
183 }
184#endif
185 }
186
187 /* infinite loop */
188 while(1)
189 {
190 if(status == ARM_MATH_TEST_FAILURE)
191 {
192 /* toggle red led2 if fir function failed */
193 at32_led_toggle(LED2);
194 delay_ms(500);
195 }
196 else
197 {
198 /* toggle green led4 if fir function success */
199 at32_led_toggle(LED4);
200 delay_ms(500);
201 }
202 }
203}
204
at32f435_437_board.h
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
j
uint32_t j
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:44
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
NO_BUTTON
@ NO_BUTTON
Definition: at32f435_437_board.h:99
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
at32_led_on
void at32_led_on(led_type led)
turns selected led on.
Definition: at32f435_437_board.c:246
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_sec
void delay_sec(uint16_t sec)
inserts a delay time.
Definition: at32f435_437_board.c:358
TRUE
@ TRUE
Definition: at32f435_437.h:379
RESET
@ RESET
Definition: at32f435_437.h:378
FLASH_BANK1_ERR_INT
#define FLASH_BANK1_ERR_INT
Definition: at32f435_437_flash.h:98
flash_slib_state_get
flag_status flash_slib_state_get(void)
get the slib state.
Definition: at32f435_437_flash.c:1071
flash_slib_enable
flash_status_type flash_slib_enable(uint32_t pwd, uint16_t start_sector, uint16_t inst_start_sector, uint16_t end_sector)
enable security library function.
Definition: at32f435_437_flash.c:1001
flash_sector_erase
flash_status_type flash_sector_erase(uint32_t sector_address)
erase a specified flash sector.
Definition: at32f435_437_flash.c:357
flash_unlock
void flash_unlock(void)
unlock the flash controller.
Definition: at32f435_437_flash.c:290
flash_interrupt_enable
void flash_interrupt_enable(uint32_t flash_int, confirm_state new_state)
enable or disable the specified flash interrupts.
Definition: at32f435_437_flash.c:980
flash_word_program
flash_status_type flash_word_program(uint32_t address, uint32_t data)
program a word at a specified address.
Definition: at32f435_437_flash.c:608
flash_lock
void flash_lock(void)
lock the flash controller.
Definition: at32f435_437_flash.c:325
flash_status_type
flash_status_type
flash status type
Definition: at32f435_437_flash.h:199
FLASH_OPERATE_DONE
@ FLASH_OPERATE_DONE
Definition: at32f435_437_flash.h:203
nvic_system_reset
void nvic_system_reset(void)
system reset
Definition: at32f435_437_misc.c:52
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
dw_inst_start_sector
uint32_t dw_inst_start_sector
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:59
SECTOR_NUM
#define SECTOR_NUM(dwAddr)
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:52
testOutput
static float32_t testOutput[320]
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:63
temp_buf
uint32_t temp_buf[1024]
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:60
SECTOR_WORD_CNT
#define SECTOR_WORD_CNT
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:53
config_flash_interrupt
void config_flash_interrupt(void)
config flash error interrupt.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:75
dw_end_sector
uint32_t dw_end_sector
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:59
SLIB_END_ADDR
#define SLIB_END_ADDR
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:50
dw_start_sector
uint32_t dw_start_sector
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:59
main
int main(void)
main function.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:128
TEST_LENGTH_SAMPLES
#define TEST_LENGTH_SAMPLES
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:56
SLIB_START_ADDR
#define SLIB_START_ADDR
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:48
SLIB_INST_ADDR
#define SLIB_INST_ADDR
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:49
slib_enable
flash_status_type slib_enable(void)
config slib enable and program slib area.
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:92
FLASH_SECTOR_SIZE
#define FLASH_SECTOR_SIZE
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:51
TEST_SLIB_PSW
#define TEST_SLIB_PSW
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:47
SNR_THRESHOLD_F32
#define SNR_THRESHOLD_F32
Definition: utilities/at32f435_437_slib_demo/project_l0/src/main.c:55
FLASH_IRQn
@ FLASH_IRQn
Definition: at32f435_437.h:150
FIR_lowpass_filter
void FIR_lowpass_filter(float32_t *pSrc, float32_t *pDst, uint32_t testlengthsamples)
Definition: fir_filter.c:76
arm_snr_f32
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
Caluclation of SNR.
Definition: project_l0/src/math_helper.c:61
testInput_f32_1kHz_15kHz
float32_t testInput_f32_1kHz_15kHz[]
Definition: project_l0/src/arm_fir_data.c:48
refOutput
float32_t refOutput[]
Definition: project_l0/src/arm_fir_data.c:96
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • inc
utilities/at32f435_437_slib_demo/project_l1/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • inc
utilities/at32f435_437_slib_demo/project_l1/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
50#if !defined HEXT_VALUE
51#define HEXT_VALUE ((uint32_t)8000000)
52#endif
53
58#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
59#define HICK_VALUE ((uint32_t)8000000)
61/* module define -------------------------------------------------------------*/
62#define CRM_MODULE_ENABLED
63#define TMR_MODULE_ENABLED
64#define ERTC_MODULE_ENABLED
65#define GPIO_MODULE_ENABLED
66#define I2C_MODULE_ENABLED
67#define USART_MODULE_ENABLED
68#define PWC_MODULE_ENABLED
69#define CAN_MODULE_ENABLED
70#define ADC_MODULE_ENABLED
71#define DAC_MODULE_ENABLED
72#define SPI_MODULE_ENABLED
73#define EDMA_MODULE_ENABLED
74#define DMA_MODULE_ENABLED
75#define DEBUG_MODULE_ENABLED
76#define FLASH_MODULE_ENABLED
77#define CRC_MODULE_ENABLED
78#define WWDT_MODULE_ENABLED
79#define WDT_MODULE_ENABLED
80#define EXINT_MODULE_ENABLED
81#define SDIO_MODULE_ENABLED
82#define XMC_MODULE_ENABLED
83#define USB_MODULE_ENABLED
84#define ACC_MODULE_ENABLED
85#define MISC_MODULE_ENABLED
86#define QSPI_MODULE_ENABLED
87#define DVP_MODULE_ENABLED
88#define SCFG_MODULE_ENABLED
89#define EMAC_MODULE_ENABLED
90
91/* includes ------------------------------------------------------------------*/
92#ifdef CRM_MODULE_ENABLED
93#include "at32f435_437_crm.h"
94#endif
95#ifdef TMR_MODULE_ENABLED
96#include "at32f435_437_tmr.h"
97#endif
98#ifdef ERTC_MODULE_ENABLED
99#include "at32f435_437_ertc.h"
100#endif
101#ifdef GPIO_MODULE_ENABLED
102#include "at32f435_437_gpio.h"
103#endif
104#ifdef I2C_MODULE_ENABLED
105#include "at32f435_437_i2c.h"
106#endif
107#ifdef USART_MODULE_ENABLED
108#include "at32f435_437_usart.h"
109#endif
110#ifdef PWC_MODULE_ENABLED
111#include "at32f435_437_pwc.h"
112#endif
113#ifdef CAN_MODULE_ENABLED
114#include "at32f435_437_can.h"
115#endif
116#ifdef ADC_MODULE_ENABLED
117#include "at32f435_437_adc.h"
118#endif
119#ifdef DAC_MODULE_ENABLED
120#include "at32f435_437_dac.h"
121#endif
122#ifdef SPI_MODULE_ENABLED
123#include "at32f435_437_spi.h"
124#endif
125#ifdef DMA_MODULE_ENABLED
126#include "at32f435_437_dma.h"
127#endif
128#ifdef DEBUG_MODULE_ENABLED
129#include "at32f435_437_debug.h"
130#endif
131#ifdef FLASH_MODULE_ENABLED
132#include "at32f435_437_flash.h"
133#endif
134#ifdef CRC_MODULE_ENABLED
135#include "at32f435_437_crc.h"
136#endif
137#ifdef WWDT_MODULE_ENABLED
138#include "at32f435_437_wwdt.h"
139#endif
140#ifdef WDT_MODULE_ENABLED
141#include "at32f435_437_wdt.h"
142#endif
143#ifdef EXINT_MODULE_ENABLED
144#include "at32f435_437_exint.h"
145#endif
146#ifdef SDIO_MODULE_ENABLED
147#include "at32f435_437_sdio.h"
148#endif
149#ifdef XMC_MODULE_ENABLED
150#include "at32f435_437_xmc.h"
151#endif
152#ifdef ACC_MODULE_ENABLED
153#include "at32f435_437_acc.h"
154#endif
155#ifdef MISC_MODULE_ENABLED
156#include "at32f435_437_misc.h"
157#endif
158#ifdef EDMA_MODULE_ENABLED
159#include "at32f435_437_edma.h"
160#endif
161#ifdef QSPI_MODULE_ENABLED
162#include "at32f435_437_qspi.h"
163#endif
164#ifdef SCFG_MODULE_ENABLED
165#include "at32f435_437_scfg.h"
166#endif
167#ifdef EMAC_MODULE_ENABLED
168#include "at32f435_437_emac.h"
169#endif
170#ifdef DVP_MODULE_ENABLED
171#include "at32f435_437_dvp.h"
172#endif
173#ifdef USB_MODULE_ENABLED
174#include "at32f435_437_usb.h"
175#endif
176
185#ifdef __cplusplus
186}
187#endif
188
189#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • inc
utilities/at32f435_437_slib_demo/project_l1/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • src
Functions
utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • src
utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource */
71 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
72
73 /* enable pll */
74 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
75
76 /* wait till pll is ready */
77 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
78 {
79 }
80
81 /* config ahbclk */
82 crm_ahb_div_set(CRM_AHB_DIV_1);
83
84 /* config apb2clk */
85 crm_apb2_div_set(CRM_APB2_DIV_2);
86
87 /* config apb1clk */
88 crm_apb1_div_set(CRM_APB1_DIV_2);
89
90 /* enable auto step mode */
91 crm_auto_step_mode_enable(TRUE);
92
93 /* select pll as system clock source */
94 crm_sysclk_switch(CRM_SCLK_PLL);
95
96 /* wait till pll is used as system clock source */
97 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
98 {
99 }
100
101 /* disable auto step mode */
102 crm_auto_step_mode_enable(FALSE);
103
104 /* update system_core_clock global variable */
105 system_core_clock_update();
106}
107
system_clock_config
void system_clock_config(void)
system clock config program
Definition: utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • src
Functions
utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | FLASH_IRQHandler (void)
flash handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • src
utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29#include "at32f435_437_board.h"
30
44void NMI_Handler(void)
45{
46}
47
53void HardFault_Handler(void)
54{
55 /* go to infinite loop when hard fault exception occurs */
56 while(1)
57 {
58 }
59}
60
66void MemManage_Handler(void)
67{
68 /* go to infinite loop when memory manage exception occurs */
69 while(1)
70 {
71 }
72}
73
79void BusFault_Handler(void)
80{
81 /* go to infinite loop when bus fault exception occurs */
82 while(1)
83 {
84 }
85}
86
92void UsageFault_Handler(void)
93{
94 /* go to infinite loop when usage fault exception occurs */
95 while(1)
96 {
97 }
98}
99
105void SVC_Handler(void)
106{
107}
108
114void DebugMon_Handler(void)
115{
116}
117
123void PendSV_Handler(void)
124{
125}
126
132void SysTick_Handler(void)
133{
134}
135
141void FLASH_IRQHandler(void)
142{
143 if(flash_flag_get(FLASH_EPPERR_FLAG))
144 {
145 flash_flag_clear(FLASH_EPPERR_FLAG);
146 delay_ms(500);
147 }
148}
149
at32f435_437_board.h
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
FLASH_EPPERR_FLAG
#define FLASH_EPPERR_FLAG
Definition: at32f435_437_flash.h:82
flash_flag_get
flag_status flash_flag_get(uint32_t flash_flag)
check whether the specified flash flag is set or not.
Definition: at32f435_437_flash.c:63
flash_flag_clear
void flash_flag_clear(uint32_t flash_flag)
clear the flash flag.
Definition: at32f435_437_flash.c:105
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c:92
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c:53
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c:66
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c:105
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c:123
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c:44
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c:79
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c:132
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c:114
FLASH_IRQHandler
void FLASH_IRQHandler(void)
flash handler.
Definition: utilities/at32f435_437_slib_demo/project_l1/src/at32f435_437_int.c:141
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • src
Macros | Functions | Variables
utilities/at32f435_437_slib_demo/project_l1/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "math_helper.h"
#include "fir_filter.h"

Go to the source code of this file.

Macros

#define | SNR_THRESHOLD_F32 140.0f
#define | TEST_LENGTH_SAMPLES 320

Functions

void | config_flash_interrupt (void)
config flash error interrupt. More...
int | main (void)
main function. More...

Variables

float32_t | testInput_f32_1kHz_15kHz []
float32_t | refOutput []
static float32_t | testOutput [320]

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_slib_demo/project_l1/src/main.c.

Variable Documentation

◆ refOutput

float32_t refOutput[]
extern

Definition at line 96 of file project_l0/src/arm_fir_data.c.

Referenced by main().

◆ testInput_f32_1kHz_15kHz

float32_t testInput_f32_1kHz_15kHz[]
extern

Definition at line 48 of file project_l0/src/arm_fir_data.c.

Referenced by main().


AT32F435/437 Firmwary Library: main.c Source File

  • utilities
  • at32f435_437_slib_demo
  • project_l1
  • src
utilities/at32f435_437_slib_demo/project_l1/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "math_helper.h"
30#include "fir_filter.h"
31
32extern float32_t testInput_f32_1kHz_15kHz[];
33extern float32_t refOutput[];
34
43#define SNR_THRESHOLD_F32 140.0f
44#define TEST_LENGTH_SAMPLES 320
45
46static float32_t testOutput[TEST_LENGTH_SAMPLES];
47
48void config_flash_interrupt(void);
49
55void config_flash_interrupt(void)
56{
57 flash_unlock();
58 flash_interrupt_enable(FLASH_BANK1_ERR_INT, TRUE);
59 flash_lock();
60 /* config nvic priority group */
61 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
62
63 nvic_irq_enable(FLASH_IRQn, 0, 0);
64}
65
71int main(void)
72{
73 arm_status status;
74 float32_t *inputf32, *outputf32, snr;
75
76 system_clock_config();
77 at32_board_init();
78
79 /* initialize input and output buffer pointers */
80 inputf32 = &testInput_f32_1kHz_15kHz[0];
81 outputf32 = &testOutput[0];
82
83 /* configure flash to generate an interrupt when a write protect error occur */
84 config_flash_interrupt();
85
86 /* wait for key button to be pushed, then turn off led3 */
87 while(at32_button_press() == NO_BUTTON)
88 {
89 at32_led_toggle(LED3);
90 delay_ms(100);
91 }
92 at32_led_off(LED3);
93
94 /* call the fir low pass filter function */
95 FIR_lowpass_filter(inputf32, outputf32, TEST_LENGTH_SAMPLES);
96
97 /* compare the generated output against the reference output computed in matlab. */
98 snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES);
99 if(snr < SNR_THRESHOLD_F32)
100 {
101 status = ARM_MATH_TEST_FAILURE;
102 }
103 else
104 {
105 status = ARM_MATH_SUCCESS;
106 }
107
108 /* infinite loop */
109 while(1)
110 {
111 if(status == ARM_MATH_TEST_FAILURE)
112 {
113 /* toggle red led2 if fir function failed */
114 at32_led_toggle(LED2);
115 delay_ms(500);
116 }
117 else
118 {
119 /* toggle green led4 if fir function success */
120 at32_led_toggle(LED4);
121 delay_ms(500);
122 }
123 }
124}
125
at32f435_437_board.h
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
LED3
@ LED3
Definition: at32f435_437_board.h:66
LED2
@ LED2
Definition: at32f435_437_board.h:65
LED4
@ LED4
Definition: at32f435_437_board.h:67
NO_BUTTON
@ NO_BUTTON
Definition: at32f435_437_board.h:99
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_led_off
void at32_led_off(led_type led)
turns selected led off.
Definition: at32f435_437_board.c:263
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
TRUE
@ TRUE
Definition: at32f435_437.h:379
FLASH_BANK1_ERR_INT
#define FLASH_BANK1_ERR_INT
Definition: at32f435_437_flash.h:98
flash_unlock
void flash_unlock(void)
unlock the flash controller.
Definition: at32f435_437_flash.c:290
flash_interrupt_enable
void flash_interrupt_enable(uint32_t flash_int, confirm_state new_state)
enable or disable the specified flash interrupts.
Definition: at32f435_437_flash.c:980
flash_lock
void flash_lock(void)
lock the flash controller.
Definition: at32f435_437_flash.c:325
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
testOutput
static float32_t testOutput[320]
Definition: utilities/at32f435_437_slib_demo/project_l1/src/main.c:46
config_flash_interrupt
void config_flash_interrupt(void)
config flash error interrupt.
Definition: utilities/at32f435_437_slib_demo/project_l1/src/main.c:55
main
int main(void)
main function.
Definition: utilities/at32f435_437_slib_demo/project_l1/src/main.c:71
TEST_LENGTH_SAMPLES
#define TEST_LENGTH_SAMPLES
Definition: utilities/at32f435_437_slib_demo/project_l1/src/main.c:44
SNR_THRESHOLD_F32
#define SNR_THRESHOLD_F32
Definition: utilities/at32f435_437_slib_demo/project_l1/src/main.c:43
FLASH_IRQn
@ FLASH_IRQn
Definition: at32f435_437.h:150
FIR_lowpass_filter
void FIR_lowpass_filter(float32_t *pSrc, float32_t *pDst, uint32_t testlengthsamples)
Definition: fir_filter.c:76
arm_snr_f32
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
Caluclation of SNR.
Definition: project_l0/src/math_helper.c:61
testInput_f32_1kHz_15kHz
float32_t testInput_f32_1kHz_15kHz[]
Definition: project_l0/src/arm_fir_data.c:48
refOutput
float32_t refOutput[]
Definition: project_l0/src/arm_fir_data.c:96
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
50#if !defined HEXT_VALUE
51#define HEXT_VALUE ((uint32_t)8000000)
52#endif
53
58#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
59#define HICK_VALUE ((uint32_t)8000000)
61/* module define -------------------------------------------------------------*/
62#define CRM_MODULE_ENABLED
63#define TMR_MODULE_ENABLED
64#define ERTC_MODULE_ENABLED
65#define GPIO_MODULE_ENABLED
66#define I2C_MODULE_ENABLED
67#define USART_MODULE_ENABLED
68#define PWC_MODULE_ENABLED
69#define CAN_MODULE_ENABLED
70#define ADC_MODULE_ENABLED
71#define DAC_MODULE_ENABLED
72#define SPI_MODULE_ENABLED
73#define EDMA_MODULE_ENABLED
74#define DMA_MODULE_ENABLED
75#define DEBUG_MODULE_ENABLED
76#define FLASH_MODULE_ENABLED
77#define CRC_MODULE_ENABLED
78#define WWDT_MODULE_ENABLED
79#define WDT_MODULE_ENABLED
80#define EXINT_MODULE_ENABLED
81#define SDIO_MODULE_ENABLED
82#define XMC_MODULE_ENABLED
83#define USB_MODULE_ENABLED
84#define ACC_MODULE_ENABLED
85#define MISC_MODULE_ENABLED
86#define QSPI_MODULE_ENABLED
87#define DVP_MODULE_ENABLED
88#define SCFG_MODULE_ENABLED
89#define EMAC_MODULE_ENABLED
90
91/* includes ------------------------------------------------------------------*/
92#ifdef CRM_MODULE_ENABLED
93#include "at32f435_437_crm.h"
94#endif
95#ifdef TMR_MODULE_ENABLED
96#include "at32f435_437_tmr.h"
97#endif
98#ifdef ERTC_MODULE_ENABLED
99#include "at32f435_437_ertc.h"
100#endif
101#ifdef GPIO_MODULE_ENABLED
102#include "at32f435_437_gpio.h"
103#endif
104#ifdef I2C_MODULE_ENABLED
105#include "at32f435_437_i2c.h"
106#endif
107#ifdef USART_MODULE_ENABLED
108#include "at32f435_437_usart.h"
109#endif
110#ifdef PWC_MODULE_ENABLED
111#include "at32f435_437_pwc.h"
112#endif
113#ifdef CAN_MODULE_ENABLED
114#include "at32f435_437_can.h"
115#endif
116#ifdef ADC_MODULE_ENABLED
117#include "at32f435_437_adc.h"
118#endif
119#ifdef DAC_MODULE_ENABLED
120#include "at32f435_437_dac.h"
121#endif
122#ifdef SPI_MODULE_ENABLED
123#include "at32f435_437_spi.h"
124#endif
125#ifdef DMA_MODULE_ENABLED
126#include "at32f435_437_dma.h"
127#endif
128#ifdef DEBUG_MODULE_ENABLED
129#include "at32f435_437_debug.h"
130#endif
131#ifdef FLASH_MODULE_ENABLED
132#include "at32f435_437_flash.h"
133#endif
134#ifdef CRC_MODULE_ENABLED
135#include "at32f435_437_crc.h"
136#endif
137#ifdef WWDT_MODULE_ENABLED
138#include "at32f435_437_wwdt.h"
139#endif
140#ifdef WDT_MODULE_ENABLED
141#include "at32f435_437_wdt.h"
142#endif
143#ifdef EXINT_MODULE_ENABLED
144#include "at32f435_437_exint.h"
145#endif
146#ifdef SDIO_MODULE_ENABLED
147#include "at32f435_437_sdio.h"
148#endif
149#ifdef XMC_MODULE_ENABLED
150#include "at32f435_437_xmc.h"
151#endif
152#ifdef ACC_MODULE_ENABLED
153#include "at32f435_437_acc.h"
154#endif
155#ifdef MISC_MODULE_ENABLED
156#include "at32f435_437_misc.h"
157#endif
158#ifdef EDMA_MODULE_ENABLED
159#include "at32f435_437_edma.h"
160#endif
161#ifdef QSPI_MODULE_ENABLED
162#include "at32f435_437_qspi.h"
163#endif
164#ifdef SCFG_MODULE_ENABLED
165#include "at32f435_437_scfg.h"
166#endif
167#ifdef EMAC_MODULE_ENABLED
168#include "at32f435_437_emac.h"
169#endif
170#ifdef DVP_MODULE_ENABLED
171#include "at32f435_437_dvp.h"
172#endif
173#ifdef USB_MODULE_ENABLED
174#include "at32f435_437_usb.h"
175#endif
176
185#ifdef __cplusplus
186}
187#endif
188
189#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led3_toggle
  • src
Functions
utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led3_toggle
  • src
utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource */
71 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
72
73 /* enable pll */
74 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
75
76 /* wait till pll is ready */
77 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
78 {
79 }
80
81 /* config ahbclk */
82 crm_ahb_div_set(CRM_AHB_DIV_1);
83
84 /* config apb2clk */
85 crm_apb2_div_set(CRM_APB2_DIV_2);
86
87 /* config apb1clk */
88 crm_apb1_div_set(CRM_APB1_DIV_2);
89
90 /* enable auto step mode */
91 crm_auto_step_mode_enable(TRUE);
92
93 /* select pll as system clock source */
94 crm_sysclk_switch(CRM_SCLK_PLL);
95
96 /* wait till pll is used as system clock source */
97 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
98 {
99 }
100
101 /* disable auto step mode */
102 crm_auto_step_mode_enable(FALSE);
103
104 /* update system_core_clock global variable */
105 system_core_clock_update();
106}
107
system_clock_config
void system_clock_config(void)
system clock config program
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led3_toggle
  • src
Functions
utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led3_toggle
  • src
utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led3_toggle
  • src
Functions
utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "tmr.h"
#include "usart.h"
#include "iap.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led3_toggle
  • src
utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "tmr.h"
30#include "usart.h"
31#include "iap.h"
32
46int main(void)
47{
48 /* config vector table offset */
49 nvic_vector_table_set(NVIC_VECTTAB_FLASH, 0x4000);
50
51 /* config nvic priority group */
52 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
53
54 system_clock_config();
55 at32_board_init();
56
57 /* check and clear iap_upgrade_flag flag */
58 iap_init();
59
60 /* init usart used for app update */
61 uart_init(115200);
62
63 /* init tmr used for show code running state(led cycle toggle) */
64 tmr_init();
65
66 while(1)
67 {
68 iap_command_handle();
69 }
70}
71
at32f435_437_board.h
uart_init
void uart_init(uint32_t bound)
initialize print usart
Definition: project/at_start_f435/examples/edma/link_list_mode/src/main.c:137
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
iap_init
void iap_init(void)
iap init.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/iap.c:61
iap_command_handle
void iap_command_handle(void)
iap command handle handle.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/iap.c:44
tmr_init
void tmr_init(void)
init tmr.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/tmr.c:44
main
int main(void)
main function.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/main.c:46
nvic_vector_table_set
void nvic_vector_table_set(uint32_t base, uint32_t offset)
set the vector table location and offset.
Definition: at32f435_437_misc.c:112
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
NVIC_VECTTAB_FLASH
#define NVIC_VECTTAB_FLASH
Definition: at32f435_437_misc.h:52
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led4_toggle
  • inc
utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led4_toggle
  • inc
utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
50#if !defined HEXT_VALUE
51#define HEXT_VALUE ((uint32_t)8000000)
52#endif
53
58#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
59#define HICK_VALUE ((uint32_t)8000000)
61/* module define -------------------------------------------------------------*/
62#define CRM_MODULE_ENABLED
63#define TMR_MODULE_ENABLED
64#define ERTC_MODULE_ENABLED
65#define GPIO_MODULE_ENABLED
66#define I2C_MODULE_ENABLED
67#define USART_MODULE_ENABLED
68#define PWC_MODULE_ENABLED
69#define CAN_MODULE_ENABLED
70#define ADC_MODULE_ENABLED
71#define DAC_MODULE_ENABLED
72#define SPI_MODULE_ENABLED
73#define EDMA_MODULE_ENABLED
74#define DMA_MODULE_ENABLED
75#define DEBUG_MODULE_ENABLED
76#define FLASH_MODULE_ENABLED
77#define CRC_MODULE_ENABLED
78#define WWDT_MODULE_ENABLED
79#define WDT_MODULE_ENABLED
80#define EXINT_MODULE_ENABLED
81#define SDIO_MODULE_ENABLED
82#define XMC_MODULE_ENABLED
83#define USB_MODULE_ENABLED
84#define ACC_MODULE_ENABLED
85#define MISC_MODULE_ENABLED
86#define QSPI_MODULE_ENABLED
87#define DVP_MODULE_ENABLED
88#define SCFG_MODULE_ENABLED
89#define EMAC_MODULE_ENABLED
90
91/* includes ------------------------------------------------------------------*/
92#ifdef CRM_MODULE_ENABLED
93#include "at32f435_437_crm.h"
94#endif
95#ifdef TMR_MODULE_ENABLED
96#include "at32f435_437_tmr.h"
97#endif
98#ifdef ERTC_MODULE_ENABLED
99#include "at32f435_437_ertc.h"
100#endif
101#ifdef GPIO_MODULE_ENABLED
102#include "at32f435_437_gpio.h"
103#endif
104#ifdef I2C_MODULE_ENABLED
105#include "at32f435_437_i2c.h"
106#endif
107#ifdef USART_MODULE_ENABLED
108#include "at32f435_437_usart.h"
109#endif
110#ifdef PWC_MODULE_ENABLED
111#include "at32f435_437_pwc.h"
112#endif
113#ifdef CAN_MODULE_ENABLED
114#include "at32f435_437_can.h"
115#endif
116#ifdef ADC_MODULE_ENABLED
117#include "at32f435_437_adc.h"
118#endif
119#ifdef DAC_MODULE_ENABLED
120#include "at32f435_437_dac.h"
121#endif
122#ifdef SPI_MODULE_ENABLED
123#include "at32f435_437_spi.h"
124#endif
125#ifdef DMA_MODULE_ENABLED
126#include "at32f435_437_dma.h"
127#endif
128#ifdef DEBUG_MODULE_ENABLED
129#include "at32f435_437_debug.h"
130#endif
131#ifdef FLASH_MODULE_ENABLED
132#include "at32f435_437_flash.h"
133#endif
134#ifdef CRC_MODULE_ENABLED
135#include "at32f435_437_crc.h"
136#endif
137#ifdef WWDT_MODULE_ENABLED
138#include "at32f435_437_wwdt.h"
139#endif
140#ifdef WDT_MODULE_ENABLED
141#include "at32f435_437_wdt.h"
142#endif
143#ifdef EXINT_MODULE_ENABLED
144#include "at32f435_437_exint.h"
145#endif
146#ifdef SDIO_MODULE_ENABLED
147#include "at32f435_437_sdio.h"
148#endif
149#ifdef XMC_MODULE_ENABLED
150#include "at32f435_437_xmc.h"
151#endif
152#ifdef ACC_MODULE_ENABLED
153#include "at32f435_437_acc.h"
154#endif
155#ifdef MISC_MODULE_ENABLED
156#include "at32f435_437_misc.h"
157#endif
158#ifdef EDMA_MODULE_ENABLED
159#include "at32f435_437_edma.h"
160#endif
161#ifdef QSPI_MODULE_ENABLED
162#include "at32f435_437_qspi.h"
163#endif
164#ifdef SCFG_MODULE_ENABLED
165#include "at32f435_437_scfg.h"
166#endif
167#ifdef EMAC_MODULE_ENABLED
168#include "at32f435_437_emac.h"
169#endif
170#ifdef DVP_MODULE_ENABLED
171#include "at32f435_437_dvp.h"
172#endif
173#ifdef USB_MODULE_ENABLED
174#include "at32f435_437_usb.h"
175#endif
176
185#ifdef __cplusplus
186}
187#endif
188
189#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led4_toggle
  • inc
utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led4_toggle
  • src
Functions
utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led4_toggle
  • src
utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource */
71 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
72
73 /* enable pll */
74 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
75
76 /* wait till pll is ready */
77 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
78 {
79 }
80
81 /* config ahbclk */
82 crm_ahb_div_set(CRM_AHB_DIV_1);
83
84 /* config apb2clk */
85 crm_apb2_div_set(CRM_APB2_DIV_2);
86
87 /* config apb1clk */
88 crm_apb1_div_set(CRM_APB1_DIV_2);
89
90 /* enable auto step mode */
91 crm_auto_step_mode_enable(TRUE);
92
93 /* select pll as system clock source */
94 crm_sysclk_switch(CRM_SCLK_PLL);
95
96 /* wait till pll is used as system clock source */
97 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
98 {
99 }
100
101 /* disable auto step mode */
102 crm_auto_step_mode_enable(FALSE);
103
104 /* update system_core_clock global variable */
105 system_core_clock_update();
106}
107
system_clock_config
void system_clock_config(void)
system clock config program
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led4_toggle
  • src
Functions
utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led4_toggle
  • src
utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led4_toggle
  • src
Functions
utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "tmr.h"
#include "usart.h"
#include "iap.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • app_led4_toggle
  • src
utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "tmr.h"
30#include "usart.h"
31#include "iap.h"
32
46int main(void)
47{
48 /* config vector table offset */
49 nvic_vector_table_set(NVIC_VECTTAB_FLASH, 0x4000);
50
51 /* config nvic priority group */
52 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
53
54 system_clock_config();
55 at32_board_init();
56
57 /* check and clear iap_upgrade_flag flag */
58 iap_init();
59
60 /* init usart used for app update */
61 uart_init(115200);
62
63 /* init tmr used for show code running state(led cycle toggle) */
64 tmr_init();
65
66 while(1)
67 {
68 iap_command_handle();
69 }
70}
71
at32f435_437_board.h
uart_init
void uart_init(uint32_t bound)
initialize print usart
Definition: project/at_start_f435/examples/edma/link_list_mode/src/main.c:137
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
iap_init
void iap_init(void)
iap init.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/iap.c:61
iap_command_handle
void iap_command_handle(void)
iap command handle handle.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/iap.c:44
tmr_init
void tmr_init(void)
init tmr.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/tmr.c:44
main
int main(void)
main function.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/app_led4_toggle/src/main.c:46
nvic_vector_table_set
void nvic_vector_table_set(uint32_t base, uint32_t offset)
set the vector table location and offset.
Definition: at32f435_437_misc.c:112
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
NVIC_VECTTAB_FLASH
#define NVIC_VECTTAB_FLASH
Definition: at32f435_437_misc.h:52
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35
50#if !defined HEXT_VALUE
51#define HEXT_VALUE ((uint32_t)8000000)
52#endif
53
58#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
59#define HICK_VALUE ((uint32_t)8000000)
61/* module define -------------------------------------------------------------*/
62#define CRM_MODULE_ENABLED
63#define TMR_MODULE_ENABLED
64#define ERTC_MODULE_ENABLED
65#define GPIO_MODULE_ENABLED
66#define I2C_MODULE_ENABLED
67#define USART_MODULE_ENABLED
68#define PWC_MODULE_ENABLED
69#define CAN_MODULE_ENABLED
70#define ADC_MODULE_ENABLED
71#define DAC_MODULE_ENABLED
72#define SPI_MODULE_ENABLED
73#define EDMA_MODULE_ENABLED
74#define DMA_MODULE_ENABLED
75#define DEBUG_MODULE_ENABLED
76#define FLASH_MODULE_ENABLED
77#define CRC_MODULE_ENABLED
78#define WWDT_MODULE_ENABLED
79#define WDT_MODULE_ENABLED
80#define EXINT_MODULE_ENABLED
81#define SDIO_MODULE_ENABLED
82#define XMC_MODULE_ENABLED
83#define USB_MODULE_ENABLED
84#define ACC_MODULE_ENABLED
85#define MISC_MODULE_ENABLED
86#define QSPI_MODULE_ENABLED
87#define DVP_MODULE_ENABLED
88#define SCFG_MODULE_ENABLED
89#define EMAC_MODULE_ENABLED
90
91/* includes ------------------------------------------------------------------*/
92#ifdef CRM_MODULE_ENABLED
93#include "at32f435_437_crm.h"
94#endif
95#ifdef TMR_MODULE_ENABLED
96#include "at32f435_437_tmr.h"
97#endif
98#ifdef ERTC_MODULE_ENABLED
99#include "at32f435_437_ertc.h"
100#endif
101#ifdef GPIO_MODULE_ENABLED
102#include "at32f435_437_gpio.h"
103#endif
104#ifdef I2C_MODULE_ENABLED
105#include "at32f435_437_i2c.h"
106#endif
107#ifdef USART_MODULE_ENABLED
108#include "at32f435_437_usart.h"
109#endif
110#ifdef PWC_MODULE_ENABLED
111#include "at32f435_437_pwc.h"
112#endif
113#ifdef CAN_MODULE_ENABLED
114#include "at32f435_437_can.h"
115#endif
116#ifdef ADC_MODULE_ENABLED
117#include "at32f435_437_adc.h"
118#endif
119#ifdef DAC_MODULE_ENABLED
120#include "at32f435_437_dac.h"
121#endif
122#ifdef SPI_MODULE_ENABLED
123#include "at32f435_437_spi.h"
124#endif
125#ifdef DMA_MODULE_ENABLED
126#include "at32f435_437_dma.h"
127#endif
128#ifdef DEBUG_MODULE_ENABLED
129#include "at32f435_437_debug.h"
130#endif
131#ifdef FLASH_MODULE_ENABLED
132#include "at32f435_437_flash.h"
133#endif
134#ifdef CRC_MODULE_ENABLED
135#include "at32f435_437_crc.h"
136#endif
137#ifdef WWDT_MODULE_ENABLED
138#include "at32f435_437_wwdt.h"
139#endif
140#ifdef WDT_MODULE_ENABLED
141#include "at32f435_437_wdt.h"
142#endif
143#ifdef EXINT_MODULE_ENABLED
144#include "at32f435_437_exint.h"
145#endif
146#ifdef SDIO_MODULE_ENABLED
147#include "at32f435_437_sdio.h"
148#endif
149#ifdef XMC_MODULE_ENABLED
150#include "at32f435_437_xmc.h"
151#endif
152#ifdef ACC_MODULE_ENABLED
153#include "at32f435_437_acc.h"
154#endif
155#ifdef MISC_MODULE_ENABLED
156#include "at32f435_437_misc.h"
157#endif
158#ifdef EDMA_MODULE_ENABLED
159#include "at32f435_437_edma.h"
160#endif
161#ifdef QSPI_MODULE_ENABLED
162#include "at32f435_437_qspi.h"
163#endif
164#ifdef SCFG_MODULE_ENABLED
165#include "at32f435_437_scfg.h"
166#endif
167#ifdef EMAC_MODULE_ENABLED
168#include "at32f435_437_emac.h"
169#endif
170#ifdef DVP_MODULE_ENABLED
171#include "at32f435_437_dvp.h"
172#endif
173#ifdef USB_MODULE_ENABLED
174#include "at32f435_437_usb.h"
175#endif
176
185#ifdef __cplusplus
186}
187#endif
188
189#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: flash.h File Reference

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • inc
Macros | Functions
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/inc/flash.h File Reference

flash header file More...

#include "at32f435_437_board.h"

Go to the source code of this file.

Macros

#define | SECTOR_SIZE_INDEX (((*(uint32_t*)0xE0042000) >> 12) & 0x07)
#define | FLASH_SIZE (*(uint32_t*)0x1FFFF7E0) /* read from at32 flash capacity register(unit:kbyte) */
#define | SRAM_SIZE 384 /* sram size, unit:kbyte */

Functions

void | flash_2kb_write (uint32_t write_addr, uint8_t *pbuffer)
flash erase/program operation. More...
flag_status | flash_upgrade_flag_read (void)
check flash upgrade flag. More...

Detailed Description

flash header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usart_iap_demo/source_code/bootloader/inc/flash.h.


AT32F435/437 Firmwary Library: flash.h Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/inc/flash.h
Go to the documentation of this file.
1
27#ifndef __FLASH_H__
28#define __FLASH_H__
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#include "at32f435_437_board.h"
35
48#define SECTOR_SIZE_INDEX (((*(uint32_t*)0xE0042000) >> 12) & 0x07)
49#define FLASH_SIZE (*(uint32_t*)0x1FFFF7E0) /* read from at32 flash capacity register(unit:kbyte) */
50#define SRAM_SIZE 384 /* sram size, unit:kbyte */
51
60void flash_2kb_write(uint32_t write_addr, uint8_t *pbuffer);
61 flag_status flash_upgrade_flag_read(void);
62
75#ifdef __cplusplus
76}
77#endif
78
79#endif
at32f435_437_board.h
flag_status
flag_status
Definition: at32f435_437.h:378
flash_2kb_write
void flash_2kb_write(uint32_t write_addr, uint8_t *pbuffer)
flash erase/program operation.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c:45
flash_upgrade_flag_read
flag_status flash_upgrade_flag_read(void)
check flash upgrade flag.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c:76


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • src
Functions
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource */
71 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
72
73 /* enable pll */
74 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
75
76 /* wait till pll is ready */
77 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
78 {
79 }
80
81 /* config ahbclk */
82 crm_ahb_div_set(CRM_AHB_DIV_1);
83
84 /* config apb2clk */
85 crm_apb2_div_set(CRM_APB2_DIV_2);
86
87 /* config apb1clk */
88 crm_apb1_div_set(CRM_APB1_DIV_2);
89
90 /* enable auto step mode */
91 crm_auto_step_mode_enable(TRUE);
92
93 /* select pll as system clock source */
94 crm_sysclk_switch(CRM_SCLK_PLL);
95
96 /* wait till pll is used as system clock source */
97 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
98 {
99 }
100
101 /* disable auto step mode */
102 crm_auto_step_mode_enable(FALSE);
103
104 /* update system_core_clock global variable */
105 system_core_clock_update();
106}
107
system_clock_config
void system_clock_config(void)
system clock config program
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • src
Functions
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:95
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:56
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:69
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:108
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:126
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:47
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:82
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:135
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c:117
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: flash.c File Reference

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • src
Functions
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c File Reference

flash program More...

#include "flash.h"
#include "usart.h"
#include "iap.h"

Go to the source code of this file.

Functions

void | flash_2kb_write (uint32_t write_addr, uint8_t *pbuffer)
flash erase/program operation. More...
flag_status | flash_upgrade_flag_read (void)
check flash upgrade flag. More...

Detailed Description

flash program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c.


AT32F435/437 Firmwary Library: flash.c Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c
Go to the documentation of this file.
1
27#include "flash.h"
28#include "usart.h"
29#include "iap.h"
30
45void flash_2kb_write(uint32_t write_addr, uint8_t *pbuffer)
46{
47 uint16_t index, write_data;
48 static uint32_t erased_addr = 0;
49 flash_unlock();
50 if(SECTOR_SIZE_INDEX == 0x04) /* 4kb/sector size */
51 {
52 if(erased_addr != (write_addr & 0xFFFFF000))
53 {
54 erased_addr = (write_addr & 0xFFFFF000);
55 flash_sector_erase(write_addr);
56 }
57 }
58 else /* 2kb/sector size */
59 {
60 flash_sector_erase(write_addr);
61 }
62 for(index = 0; index < 2048; index += 2)
63 {
64 write_data = (pbuffer[index+1] << 8) + pbuffer[index];
65 flash_halfword_program(write_addr, write_data);
66 write_addr += sizeof(uint16_t);
67 }
68 flash_lock();
69}
70
76 flag_status flash_upgrade_flag_read(void)
77{
78 if((*(uint32_t*)IAP_UPGRADE_FLAG_ADDR) == IAP_UPGRADE_FLAG)
79 return SET;
80 else
81 return RESET;
82}
83
flag_status
flag_status
Definition: at32f435_437.h:378
RESET
@ RESET
Definition: at32f435_437.h:378
SET
@ SET
Definition: at32f435_437.h:378
flash_sector_erase
flash_status_type flash_sector_erase(uint32_t sector_address)
erase a specified flash sector.
Definition: at32f435_437_flash.c:357
flash_halfword_program
flash_status_type flash_halfword_program(uint32_t address, uint16_t data)
program a halfword at a specified address.
Definition: at32f435_437_flash.c:643
flash_unlock
void flash_unlock(void)
unlock the flash controller.
Definition: at32f435_437_flash.c:290
flash_lock
void flash_lock(void)
lock the flash controller.
Definition: at32f435_437_flash.c:325
IAP_UPGRADE_FLAG_ADDR
#define IAP_UPGRADE_FLAG_ADDR
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/inc/iap.h:52
IAP_UPGRADE_FLAG
#define IAP_UPGRADE_FLAG
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/inc/iap.h:64
SECTOR_SIZE_INDEX
#define SECTOR_SIZE_INDEX
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/inc/flash.h:48
flash_2kb_write
void flash_2kb_write(uint32_t write_addr, uint8_t *pbuffer)
flash erase/program operation.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c:45
flash_upgrade_flag_read
flag_status flash_upgrade_flag_read(void)
check flash upgrade flag.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c:76


AT32F435/437 Firmwary Library: main.c File Reference

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • src
Functions
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "tmr.h"
#include "usart.h"
#include "flash.h"
#include "iap.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • utilities
  • at32f435_437_usart_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "tmr.h"
30#include "usart.h"
31#include "flash.h"
32#include "iap.h"
33
47int main(void)
48{
49 system_clock_config();
50 at32_board_init();
51
52 /* config nvic priority group */
53 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
54
55 /* check iap_upgrade_flag flag */
56 if(flash_upgrade_flag_read() == RESET)
57 {
58 /* check app starting address whether 0x08xxxxxx */
59 if(((*(uint32_t*)(APP_START_ADDR + 4)) & 0xFF000000) == 0x08000000)
60 app_load(APP_START_ADDR);
61 }
62
63 /* init usart used for app update */
64 uart_init(115200);
65
66 /* check whether need to upgrade, if yes, response ok to pc-tool */
67 if(flash_upgrade_flag_read() != RESET)
68 back_ok();
69
70 /* init tmr used for show code running state(led cycle toggle) */
71 tmr_init();
72
73 while(1)
74 {
75 /* upgrade handle */
76 iap_upgrade_app_handle();
77 }
78}
79
at32f435_437_board.h
uart_init
void uart_init(uint32_t bound)
initialize print usart
Definition: project/at_start_f435/examples/edma/link_list_mode/src/main.c:137
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
RESET
@ RESET
Definition: at32f435_437.h:378
APP_START_ADDR
#define APP_START_ADDR
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/inc/iap.h:49
tmr_init
void tmr_init(void)
init tmr.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/tmr.c:44
back_ok
void back_ok(void)
command response ok.
Definition: app_led3_toggle/src/usart.c:101
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
iap_upgrade_app_handle
void iap_upgrade_app_handle(void)
iap upgrade app handle.
Definition: at32f435_437_usart_iap_demo/source_code/bootloader/src/iap.c:344
app_load
void app_load(uint32_t appxaddr)
app load.
Definition: at32f435_437_usart_iap_demo/source_code/bootloader/src/iap.c:60
flash_upgrade_flag_read
flag_status flash_upgrade_flag_read(void)
check flash upgrade flag.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c:76
main
int main(void)
main function.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/main.c:47
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led3_toggle
  • inc
Macros | Functions
utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...

Functions

void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "at32f435_437_board.h"
38
50#define USE_OTG_DEVICE_MODE
51
55/* #define USE_OTG_HOST_MODE */
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65/* #define OTG_USB_ID 2 */
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97#endif
98
99#if (OTG_USB_ID == 2)
100#define USB_ID 1
101#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
102#define OTG_IRQ OTGFS2_IRQn
103#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
104#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
105#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
106#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
107
108#define OTG_PIN_GPIO GPIOB
109#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
110
111#define OTG_PIN_DP GPIO_PINS_15
112#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
113
114#define OTG_PIN_DM GPIO_PINS_14
115#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
116
117#define OTG_PIN_VBUS GPIO_PINS_13
118#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
119
120#define OTG_PIN_ID GPIO_PINS_12
121#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
122
123#define OTG_PIN_SOF_GPIO GPIOA
124#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
125#define OTG_PIN_SOF GPIO_PINS_4
126#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
127
128#define OTG_PIN_MUX GPIO_MUX_12
129#endif
130
134#ifdef USE_OTG_DEVICE_MODE
138/* otg1 device fifo */
139#define USBD_RX_SIZE 128
140#define USBD_EP0_TX_SIZE 24
141#define USBD_EP1_TX_SIZE 20
142#define USBD_EP2_TX_SIZE 20
143#define USBD_EP3_TX_SIZE 20
144#define USBD_EP4_TX_SIZE 20
145#define USBD_EP5_TX_SIZE 20
146#define USBD_EP6_TX_SIZE 20
147#define USBD_EP7_TX_SIZE 20
148
149/* otg2 device fifo */
150#define USBD2_RX_SIZE 128
151#define USBD2_EP0_TX_SIZE 24
152#define USBD2_EP1_TX_SIZE 20
153#define USBD2_EP2_TX_SIZE 20
154#define USBD2_EP3_TX_SIZE 20
155#define USBD2_EP4_TX_SIZE 20
156#define USBD2_EP5_TX_SIZE 20
157#define USBD2_EP6_TX_SIZE 20
158#define USBD2_EP7_TX_SIZE 20
159
163#ifndef USB_EPT_MAX_NUM
164#define USB_EPT_MAX_NUM 8
165#endif
166#endif
167
171#ifdef USE_OTG_HOST_MODE
172#ifndef USB_HOST_CHANNEL_NUM
173#define USB_HOST_CHANNEL_NUM 16
174#endif
175
179/* otg1 host fifo */
180#define USBH_RX_FIFO_SIZE 128
181#define USBH_NP_TX_FIFO_SIZE 96
182#define USBH_P_TX_FIFO_SIZE 96
183
184/* otg2 host fifo */
185#define USBH2_RX_FIFO_SIZE 128
186#define USBH2_NP_TX_FIFO_SIZE 96
187#define USBH2_P_TX_FIFO_SIZE 96
188#endif
189
193/* #define USB_SOF_OUTPUT_ENABLE */
194
198#define USB_VBUS_IGNORE
199
203/* #define USB_LOW_POWER_WAKUP */
204
205void usb_delay_ms(uint32_t ms);
206void usb_delay_us(uint32_t us);
207
215#ifdef __cplusplus
216}
217#endif
218
219#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_board.h
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led3_toggle
  • src
Functions
utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led3_toggle
  • src
utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource */
71 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
72
73 /* enable pll */
74 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
75
76 /* wait till pll is ready */
77 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
78 {
79 }
80
81 /* config ahbclk */
82 crm_ahb_div_set(CRM_AHB_DIV_1);
83
84 /* config apb2clk */
85 crm_apb2_div_set(CRM_APB2_DIV_2);
86
87 /* config apb1clk */
88 crm_apb1_div_set(CRM_APB1_DIV_2);
89
90 /* enable auto step mode */
91 crm_auto_step_mode_enable(TRUE);
92
93 /* select pll as system clock source */
94 crm_sysclk_switch(CRM_SCLK_PLL);
95
96 /* wait till pll is used as system clock source */
97 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
98 {
99 }
100
101 /* disable auto step mode */
102 crm_auto_step_mode_enable(FALSE);
103
104 /* update system_core_clock global variable */
105 system_core_clock_update();
106}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led3_toggle
  • src
Functions
utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led3_toggle
  • src
utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led3_toggle
  • src
Functions | Variables
utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "hid_iap_class.h"
#include "hid_iap_desc.h"
#include "hid_iap_user.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led3_toggle
  • src
utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "hid_iap_class.h"
33#include "hid_iap_desc.h"
34#include "hid_iap_user.h"
35
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46void usb_clock48m_select(usb_clk48_s clk_s);
47void usb_gpio_config(void);
48void usb_low_power_wakeup_config(void);
49
55int main(void)
56{
57 nvic_vector_table_set(NVIC_VECTTAB_FLASH, 0x5000);
58
59 system_clock_config();
60
61 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
62
63 /* iap init */
64 iap_init();
65
66 at32_board_init();
67
68 /* usb gpio config */
69 usb_gpio_config();
70
71#ifdef USB_LOW_POWER_WAKUP
72 usb_low_power_wakeup_config();
73#endif
74
75 /* enable otgfs clock */
76 crm_periph_clock_enable(OTG_CLOCK, TRUE);
77
78 /* select usb 48m clcok source */
79 usb_clock48m_select(USB_CLK_HEXT);
80
81 /* enable otgfs irq */
82 nvic_irq_enable(OTG_IRQ, 0, 0);
83
84 /* init usb */
85 usbd_init(&otg_core_struct,
86 USB_FULL_SPEED_CORE_ID,
87 USB_ID,
88 &hid_iap_class_handler,
89 &hid_iap_desc_handler);
90
91 while(1)
92 {
93 app_loop();
94 at32_led_toggle(LED3);
95 delay_ms(200);
96 }
97}
98
104void usb_clock48m_select(usb_clk48_s clk_s)
105{
106 if(clk_s == USB_CLK_HICK)
107 {
108 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
109
110 /* enable the acc calibration ready interrupt */
111 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
112
113 /* update the c1\c2\c3 value */
114 acc_write_c1(7980);
115 acc_write_c2(8000);
116 acc_write_c3(8020);
117#if (USB_ID == 0)
118 acc_sof_select(ACC_SOF_OTG1);
119#else
120 acc_sof_select(ACC_SOF_OTG2);
121#endif
122 /* open acc calibration */
123 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
124 }
125 else
126 {
127 switch(system_core_clock)
128 {
129 /* 48MHz */
130 case 48000000:
131 crm_usb_clock_div_set(CRM_USB_DIV_1);
132 break;
133
134 /* 72MHz */
135 case 72000000:
136 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
137 break;
138
139 /* 96MHz */
140 case 96000000:
141 crm_usb_clock_div_set(CRM_USB_DIV_2);
142 break;
143
144 /* 120MHz */
145 case 120000000:
146 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
147 break;
148
149 /* 144MHz */
150 case 144000000:
151 crm_usb_clock_div_set(CRM_USB_DIV_3);
152 break;
153
154 /* 168MHz */
155 case 168000000:
156 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
157 break;
158
159 /* 192MHz */
160 case 192000000:
161 crm_usb_clock_div_set(CRM_USB_DIV_4);
162 break;
163
164 /* 216MHz */
165 case 216000000:
166 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
167 break;
168
169 /* 240MHz */
170 case 240000000:
171 crm_usb_clock_div_set(CRM_USB_DIV_5);
172 break;
173
174 /* 264MHz */
175 case 264000000:
176 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
177 break;
178
179 /* 288MHz */
180 case 288000000:
181 crm_usb_clock_div_set(CRM_USB_DIV_6);
182 break;
183
184 default:
185 break;
186
187 }
188 }
189}
190
196void usb_gpio_config(void)
197{
198 gpio_init_type gpio_init_struct;
199
200 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
201 gpio_default_para_init(&gpio_init_struct);
202
203 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
204 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
205 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
206 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
207
208 /* dp and dm */
209 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
210 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
211
212 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
213 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
214
215#ifdef USB_SOF_OUTPUT_ENABLE
216 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
217 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
218 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
219 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
220#endif
221
222 /* otgfs use vbus pin */
223#ifndef USB_VBUS_IGNORE
224 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
225 gpio_init_struct.gpio_pull = GPIO_PULL_UP;
226 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
227 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
228#endif
229
230
231}
232#ifdef USB_LOW_POWER_WAKUP
238void usb_low_power_wakeup_config(void)
239{
240 exint_init_type exint_init_struct;
241
242 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
243 exint_default_para_init(&exint_init_struct);
244
245 exint_init_struct.line_enable = TRUE;
246 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
247 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
248 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
249 exint_init(&exint_init_struct);
250
251 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
252}
253
259void OTG_WKUP_HANDLER(void)
260{
261 exint_flag_clear(OTG_WKUP_EXINT_LINE);
262}
263
264#endif
265
271void OTG_IRQ_HANDLER(void)
272{
273 usbd_irq_handler(&otg_core_struct);
274}
275
281void usb_delay_ms(uint32_t ms)
282{
283 /* user can define self delay function */
284 delay_ms(ms);
285}
286
292void usb_delay_us(uint32_t us)
293{
294 delay_us(us);
295}
296
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
app_loop
void app_loop(void)
iap loop
Definition: app_led3_toggle/src/hid_iap_user.c:260
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
LED3
@ LED3
Definition: at32f435_437_board.h:66
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
iap_init
void iap_init(void)
iap init.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/iap.c:61
nvic_vector_table_set
void nvic_vector_table_set(uint32_t base, uint32_t offset)
set the vector table location and offset.
Definition: at32f435_437_misc.c:112
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
NVIC_VECTTAB_FLASH
#define NVIC_VECTTAB_FLASH
Definition: at32f435_437_misc.h:52
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/main.c:104
main
int main(void)
main function.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/main.c:55
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/main.c:196
OTG_IRQ_HANDLER
void OTG_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/main.c:271
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb delay millisecond function.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/main.c:281
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/main.c:292
otg_core_struct
otg_core_type otg_core_struct
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led3_toggle/src/main.c:45
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
hid_iap_class_handler
usbd_class_handler hid_iap_class_handler
Definition: hid_iap_class.c:57
hid_iap_desc_handler
usbd_desc_handler hid_iap_desc_handler
hid device descriptor handler structure
Definition: hid_iap_desc.c:65
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
hid_iap_class.h
usb hid iap header file
hid_iap_desc.h
usb hid iap descriptor header file
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led4_toggle
  • inc
utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led4_toggle
  • inc
utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led4_toggle
  • inc
utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led4_toggle
  • inc
Macros | Functions
utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...

Functions

void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led4_toggle
  • inc
utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "at32f435_437_board.h"
38
50#define USE_OTG_DEVICE_MODE
51
55/* #define USE_OTG_HOST_MODE */
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65/* #define OTG_USB_ID 2 */
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97#endif
98
99#if (OTG_USB_ID == 2)
100#define USB_ID 1
101#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
102#define OTG_IRQ OTGFS2_IRQn
103#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
104#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
105#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
106#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
107
108#define OTG_PIN_GPIO GPIOB
109#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
110
111#define OTG_PIN_DP GPIO_PINS_15
112#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
113
114#define OTG_PIN_DM GPIO_PINS_14
115#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
116
117#define OTG_PIN_VBUS GPIO_PINS_13
118#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
119
120#define OTG_PIN_ID GPIO_PINS_12
121#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
122
123#define OTG_PIN_SOF_GPIO GPIOA
124#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
125#define OTG_PIN_SOF GPIO_PINS_4
126#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
127
128#define OTG_PIN_MUX GPIO_MUX_12
129#endif
130
134#ifdef USE_OTG_DEVICE_MODE
138/* otg1 device fifo */
139#define USBD_RX_SIZE 128
140#define USBD_EP0_TX_SIZE 24
141#define USBD_EP1_TX_SIZE 20
142#define USBD_EP2_TX_SIZE 20
143#define USBD_EP3_TX_SIZE 20
144#define USBD_EP4_TX_SIZE 20
145#define USBD_EP5_TX_SIZE 20
146#define USBD_EP6_TX_SIZE 20
147#define USBD_EP7_TX_SIZE 20
148
149/* otg2 device fifo */
150#define USBD2_RX_SIZE 128
151#define USBD2_EP0_TX_SIZE 24
152#define USBD2_EP1_TX_SIZE 20
153#define USBD2_EP2_TX_SIZE 20
154#define USBD2_EP3_TX_SIZE 20
155#define USBD2_EP4_TX_SIZE 20
156#define USBD2_EP5_TX_SIZE 20
157#define USBD2_EP6_TX_SIZE 20
158#define USBD2_EP7_TX_SIZE 20
159
163#ifndef USB_EPT_MAX_NUM
164#define USB_EPT_MAX_NUM 8
165#endif
166#endif
167
171#ifdef USE_OTG_HOST_MODE
172#ifndef USB_HOST_CHANNEL_NUM
173#define USB_HOST_CHANNEL_NUM 16
174#endif
175
179/* otg1 host fifo */
180#define USBH_RX_FIFO_SIZE 128
181#define USBH_NP_TX_FIFO_SIZE 96
182#define USBH_P_TX_FIFO_SIZE 96
183
184/* otg2 host fifo */
185#define USBH2_RX_FIFO_SIZE 128
186#define USBH2_NP_TX_FIFO_SIZE 96
187#define USBH2_P_TX_FIFO_SIZE 96
188#endif
189
193/* #define USB_SOF_OUTPUT_ENABLE */
194
198#define USB_VBUS_IGNORE
199
203/* #define USB_LOW_POWER_WAKUP */
204
205void usb_delay_ms(uint32_t ms);
206void usb_delay_us(uint32_t us);
207
216#ifdef __cplusplus
217}
218#endif
219
220#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_board.h
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led4_toggle
  • src
Functions
utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led4_toggle
  • src
utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource */
71 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
72
73 /* enable pll */
74 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
75
76 /* wait till pll is ready */
77 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
78 {
79 }
80
81 /* config ahbclk */
82 crm_ahb_div_set(CRM_AHB_DIV_1);
83
84 /* config apb2clk */
85 crm_apb2_div_set(CRM_APB2_DIV_2);
86
87 /* config apb1clk */
88 crm_apb1_div_set(CRM_APB1_DIV_2);
89
90 /* enable auto step mode */
91 crm_auto_step_mode_enable(TRUE);
92
93 /* select pll as system clock source */
94 crm_sysclk_switch(CRM_SCLK_PLL);
95
96 /* wait till pll is used as system clock source */
97 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
98 {
99 }
100
101 /* disable auto step mode */
102 crm_auto_step_mode_enable(FALSE);
103
104 /* update system_core_clock global variable */
105 system_core_clock_update();
106}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led4_toggle
  • src
Functions
utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led4_toggle
  • src
utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led4_toggle
  • src
Functions | Variables
utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "hid_iap_class.h"
#include "hid_iap_desc.h"
#include "hid_iap_user.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • app_led4_toggle
  • src
utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "hid_iap_class.h"
33#include "hid_iap_desc.h"
34#include "hid_iap_user.h"
35
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46void usb_clock48m_select(usb_clk48_s clk_s);
47void usb_gpio_config(void);
48void usb_low_power_wakeup_config(void);
49
55int main(void)
56{
57 nvic_vector_table_set(NVIC_VECTTAB_FLASH, 0x5000);
58
59 system_clock_config();
60
61 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
62
63 /* iap init */
64 iap_init();
65
66 at32_board_init();
67
68 /* usb gpio config */
69 usb_gpio_config();
70
71#ifdef USB_LOW_POWER_WAKUP
72 usb_low_power_wakeup_config();
73#endif
74
75 /* enable otgfs clock */
76 crm_periph_clock_enable(OTG_CLOCK, TRUE);
77
78 /* select usb 48m clcok source */
79 usb_clock48m_select(USB_CLK_HEXT);
80
81 /* enable otgfs irq */
82 nvic_irq_enable(OTG_IRQ, 0, 0);
83
84 /* init usb */
85 usbd_init(&otg_core_struct,
86 USB_FULL_SPEED_CORE_ID,
87 USB_ID,
88 &hid_iap_class_handler,
89 &hid_iap_desc_handler);
90
91 while(1)
92 {
93 app_loop();
94 at32_led_toggle(LED4);
95 delay_ms(200);
96 }
97}
98
104void usb_clock48m_select(usb_clk48_s clk_s)
105{
106 if(clk_s == USB_CLK_HICK)
107 {
108 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
109
110 /* enable the acc calibration ready interrupt */
111 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
112
113 /* update the c1\c2\c3 value */
114 acc_write_c1(7980);
115 acc_write_c2(8000);
116 acc_write_c3(8020);
117#if (USB_ID == 0)
118 acc_sof_select(ACC_SOF_OTG1);
119#else
120 acc_sof_select(ACC_SOF_OTG2);
121#endif
122 /* open acc calibration */
123 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
124 }
125 else
126 {
127 switch(system_core_clock)
128 {
129 /* 48MHz */
130 case 48000000:
131 crm_usb_clock_div_set(CRM_USB_DIV_1);
132 break;
133
134 /* 72MHz */
135 case 72000000:
136 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
137 break;
138
139 /* 96MHz */
140 case 96000000:
141 crm_usb_clock_div_set(CRM_USB_DIV_2);
142 break;
143
144 /* 120MHz */
145 case 120000000:
146 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
147 break;
148
149 /* 144MHz */
150 case 144000000:
151 crm_usb_clock_div_set(CRM_USB_DIV_3);
152 break;
153
154 /* 168MHz */
155 case 168000000:
156 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
157 break;
158
159 /* 192MHz */
160 case 192000000:
161 crm_usb_clock_div_set(CRM_USB_DIV_4);
162 break;
163
164 /* 216MHz */
165 case 216000000:
166 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
167 break;
168
169 /* 240MHz */
170 case 240000000:
171 crm_usb_clock_div_set(CRM_USB_DIV_5);
172 break;
173
174 /* 264MHz */
175 case 264000000:
176 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
177 break;
178
179 /* 288MHz */
180 case 288000000:
181 crm_usb_clock_div_set(CRM_USB_DIV_6);
182 break;
183
184 default:
185 break;
186
187 }
188 }
189}
190
196void usb_gpio_config(void)
197{
198 gpio_init_type gpio_init_struct;
199
200 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
201 gpio_default_para_init(&gpio_init_struct);
202
203 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
204 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
205 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
206 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
207
208 /* dp and dm */
209 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
210 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
211
212 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
213 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
214
215#ifdef USB_SOF_OUTPUT_ENABLE
216 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
217 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
218 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
219 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
220#endif
221
222 /* otgfs use vbus pin */
223#ifndef USB_VBUS_IGNORE
224 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
225 gpio_init_struct.gpio_pull = GPIO_PULL_UP;
226 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
227 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
228#endif
229
230
231}
232#ifdef USB_LOW_POWER_WAKUP
238void usb_low_power_wakeup_config(void)
239{
240 exint_init_type exint_init_struct;
241
242 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
243 exint_default_para_init(&exint_init_struct);
244
245 exint_init_struct.line_enable = TRUE;
246 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
247 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
248 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
249 exint_init(&exint_init_struct);
250
251 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
252}
253
259void OTG_WKUP_HANDLER(void)
260{
261 exint_flag_clear(OTG_WKUP_EXINT_LINE);
262}
263
264#endif
265
271void OTG_IRQ_HANDLER(void)
272{
273 usbd_irq_handler(&otg_core_struct);
274}
275
281void usb_delay_ms(uint32_t ms)
282{
283 /* user can define self delay function */
284 delay_ms(ms);
285}
286
292void usb_delay_us(uint32_t us)
293{
294 delay_us(us);
295}
296
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
app_loop
void app_loop(void)
iap loop
Definition: app_led3_toggle/src/hid_iap_user.c:260
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
LED4
@ LED4
Definition: at32f435_437_board.h:67
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
iap_init
void iap_init(void)
iap init.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/iap.c:61
nvic_vector_table_set
void nvic_vector_table_set(uint32_t base, uint32_t offset)
set the vector table location and offset.
Definition: at32f435_437_misc.c:112
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
NVIC_VECTTAB_FLASH
#define NVIC_VECTTAB_FLASH
Definition: at32f435_437_misc.h:52
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/main.c:104
main
int main(void)
main function.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/main.c:55
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/main.c:196
OTG_IRQ_HANDLER
void OTG_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/main.c:271
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb delay millisecond function.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/main.c:281
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/main.c:292
otg_core_struct
otg_core_type otg_core_struct
Definition: utilities/at32f435_437_usb_iap_demo/source_code/app_led4_toggle/src/main.c:45
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
hid_iap_class_handler
usbd_class_handler hid_iap_class_handler
Definition: hid_iap_class.c:57
hid_iap_desc_handler
usbd_desc_handler hid_iap_desc_handler
hid device descriptor handler structure
Definition: hid_iap_desc.c:65
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
hid_iap_class.h
usb hid iap header file
hid_iap_desc.h
usb hid iap descriptor header file
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f435_437_usb_iap_demo/source_code/bootloader/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f435_437_usb_iap_demo/source_code/bootloader/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CONF_H
29#define __AT32F435_437_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
43#if !defined HEXT_VALUE
44#define HEXT_VALUE ((uint32_t)8000000)
45#endif
46
51#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
52#define HICK_VALUE ((uint32_t)8000000)
54/* module define -------------------------------------------------------------*/
55#define CRM_MODULE_ENABLED
56#define TMR_MODULE_ENABLED
57#define ERTC_MODULE_ENABLED
58#define GPIO_MODULE_ENABLED
59#define I2C_MODULE_ENABLED
60#define USART_MODULE_ENABLED
61#define PWC_MODULE_ENABLED
62#define CAN_MODULE_ENABLED
63#define ADC_MODULE_ENABLED
64#define DAC_MODULE_ENABLED
65#define SPI_MODULE_ENABLED
66#define EDMA_MODULE_ENABLED
67#define DMA_MODULE_ENABLED
68#define DEBUG_MODULE_ENABLED
69#define FLASH_MODULE_ENABLED
70#define CRC_MODULE_ENABLED
71#define WWDT_MODULE_ENABLED
72#define WDT_MODULE_ENABLED
73#define EXINT_MODULE_ENABLED
74#define SDIO_MODULE_ENABLED
75#define XMC_MODULE_ENABLED
76#define USB_MODULE_ENABLED
77#define ACC_MODULE_ENABLED
78#define MISC_MODULE_ENABLED
79#define QSPI_MODULE_ENABLED
80#define DVP_MODULE_ENABLED
81#define SCFG_MODULE_ENABLED
82#define EMAC_MODULE_ENABLED
83
84/* includes ------------------------------------------------------------------*/
85#ifdef CRM_MODULE_ENABLED
86#include "at32f435_437_crm.h"
87#endif
88#ifdef TMR_MODULE_ENABLED
89#include "at32f435_437_tmr.h"
90#endif
91#ifdef ERTC_MODULE_ENABLED
92#include "at32f435_437_ertc.h"
93#endif
94#ifdef GPIO_MODULE_ENABLED
95#include "at32f435_437_gpio.h"
96#endif
97#ifdef I2C_MODULE_ENABLED
98#include "at32f435_437_i2c.h"
99#endif
100#ifdef USART_MODULE_ENABLED
101#include "at32f435_437_usart.h"
102#endif
103#ifdef PWC_MODULE_ENABLED
104#include "at32f435_437_pwc.h"
105#endif
106#ifdef CAN_MODULE_ENABLED
107#include "at32f435_437_can.h"
108#endif
109#ifdef ADC_MODULE_ENABLED
110#include "at32f435_437_adc.h"
111#endif
112#ifdef DAC_MODULE_ENABLED
113#include "at32f435_437_dac.h"
114#endif
115#ifdef SPI_MODULE_ENABLED
116#include "at32f435_437_spi.h"
117#endif
118#ifdef DMA_MODULE_ENABLED
119#include "at32f435_437_dma.h"
120#endif
121#ifdef DEBUG_MODULE_ENABLED
122#include "at32f435_437_debug.h"
123#endif
124#ifdef FLASH_MODULE_ENABLED
125#include "at32f435_437_flash.h"
126#endif
127#ifdef CRC_MODULE_ENABLED
128#include "at32f435_437_crc.h"
129#endif
130#ifdef WWDT_MODULE_ENABLED
131#include "at32f435_437_wwdt.h"
132#endif
133#ifdef WDT_MODULE_ENABLED
134#include "at32f435_437_wdt.h"
135#endif
136#ifdef EXINT_MODULE_ENABLED
137#include "at32f435_437_exint.h"
138#endif
139#ifdef SDIO_MODULE_ENABLED
140#include "at32f435_437_sdio.h"
141#endif
142#ifdef XMC_MODULE_ENABLED
143#include "at32f435_437_xmc.h"
144#endif
145#ifdef ACC_MODULE_ENABLED
146#include "at32f435_437_acc.h"
147#endif
148#ifdef MISC_MODULE_ENABLED
149#include "at32f435_437_misc.h"
150#endif
151#ifdef EDMA_MODULE_ENABLED
152#include "at32f435_437_edma.h"
153#endif
154#ifdef QSPI_MODULE_ENABLED
155#include "at32f435_437_qspi.h"
156#endif
157#ifdef SCFG_MODULE_ENABLED
158#include "at32f435_437_scfg.h"
159#endif
160#ifdef EMAC_MODULE_ENABLED
161#include "at32f435_437_emac.h"
162#endif
163#ifdef DVP_MODULE_ENABLED
164#include "at32f435_437_dvp.h"
165#endif
166#ifdef USB_MODULE_ENABLED
167#include "at32f435_437_usb.h"
168#endif
169
170#ifdef __cplusplus
171}
172#endif
173
174#endif
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f435_437_usb_iap_demo/source_code/bootloader/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: usb_conf.h File Reference

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • bootloader
  • inc
Macros | Functions
utilities/at32f435_437_usb_iap_demo/source_code/bootloader/inc/usb_conf.h File Reference

usb config header file More...

#include "at32f435_437_usb.h"
#include "at32f435_437.h"
#include "at32f435_437_board.h"

Go to the source code of this file.

Macros

#define | USE_OTG_DEVICE_MODE
enable usb device mode More...
#define | OTG_USB_ID 1
enable usb host mode More...
#define | USB_ID 0
#define | OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define | OTG_IRQ OTGFS1_IRQn
#define | OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define | OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define | OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define | OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define | OTG_PIN_GPIO GPIOA
#define | OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_DP GPIO_PINS_12
#define | OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define | OTG_PIN_DM GPIO_PINS_11
#define | OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define | OTG_PIN_VBUS GPIO_PINS_9
#define | OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define | OTG_PIN_ID GPIO_PINS_10
#define | OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define | OTG_PIN_SOF_GPIO GPIOA
#define | OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define | OTG_PIN_SOF GPIO_PINS_8
#define | OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define | OTG_PIN_MUX GPIO_MUX_10
#define | USBD_RX_SIZE 128
usb device mode config More...
#define | USBD_EP0_TX_SIZE 24
#define | USBD_EP1_TX_SIZE 20
#define | USBD_EP2_TX_SIZE 20
#define | USBD_EP3_TX_SIZE 20
#define | USBD_EP4_TX_SIZE 20
#define | USBD_EP5_TX_SIZE 20
#define | USBD_EP6_TX_SIZE 20
#define | USBD_EP7_TX_SIZE 20
#define | USBD2_RX_SIZE 128
#define | USBD2_EP0_TX_SIZE 24
#define | USBD2_EP1_TX_SIZE 20
#define | USBD2_EP2_TX_SIZE 20
#define | USBD2_EP3_TX_SIZE 20
#define | USBD2_EP4_TX_SIZE 20
#define | USBD2_EP5_TX_SIZE 20
#define | USBD2_EP6_TX_SIZE 20
#define | USBD2_EP7_TX_SIZE 20
#define | USB_VBUS_IGNORE
usb endpoint max num define More...

Functions

void | usb_delay_ms (uint32_t ms)
usb low power wakeup handler enable More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Detailed Description

usb config header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usb_iap_demo/source_code/bootloader/inc/usb_conf.h.


AT32F435/437 Firmwary Library: usb_conf.h Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f435_437_usb_iap_demo/source_code/bootloader/inc/usb_conf.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __USB_CONF_H
29#define __USB_CONF_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include "at32f435_437_usb.h"
36#include "at32f435_437.h"
37#include "at32f435_437_board.h"
38
50#define USE_OTG_DEVICE_MODE
51
55/* #define USE_OTG_HOST_MODE */
56
61/* use otgfs1 */
62#define OTG_USB_ID 1
63
64/* use otgfs2 */
65/* #define OTG_USB_ID 2 */
66
67#if (OTG_USB_ID == 1)
68#define USB_ID 0
69#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
70#define OTG_IRQ OTGFS1_IRQn
71#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
72#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
73#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
74#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
75
76#define OTG_PIN_GPIO GPIOA
77#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
78
79#define OTG_PIN_DP GPIO_PINS_12
80#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
81
82#define OTG_PIN_DM GPIO_PINS_11
83#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
84
85#define OTG_PIN_VBUS GPIO_PINS_9
86#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
87
88#define OTG_PIN_ID GPIO_PINS_10
89#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
90
91#define OTG_PIN_SOF_GPIO GPIOA
92#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
93#define OTG_PIN_SOF GPIO_PINS_8
94#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
95
96#define OTG_PIN_MUX GPIO_MUX_10
97#endif
98
99#if (OTG_USB_ID == 2)
100#define USB_ID 1
101#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
102#define OTG_IRQ OTGFS2_IRQn
103#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
104#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
105#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
106#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
107
108#define OTG_PIN_GPIO GPIOB
109#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
110
111#define OTG_PIN_DP GPIO_PINS_15
112#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
113
114#define OTG_PIN_DM GPIO_PINS_14
115#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
116
117#define OTG_PIN_VBUS GPIO_PINS_13
118#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
119
120#define OTG_PIN_ID GPIO_PINS_12
121#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
122
123#define OTG_PIN_SOF_GPIO GPIOA
124#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
125#define OTG_PIN_SOF GPIO_PINS_4
126#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
127
128#define OTG_PIN_MUX GPIO_MUX_12
129#endif
130
134#ifdef USE_OTG_DEVICE_MODE
138/* otg1 device fifo */
139#define USBD_RX_SIZE 128
140#define USBD_EP0_TX_SIZE 24
141#define USBD_EP1_TX_SIZE 20
142#define USBD_EP2_TX_SIZE 20
143#define USBD_EP3_TX_SIZE 20
144#define USBD_EP4_TX_SIZE 20
145#define USBD_EP5_TX_SIZE 20
146#define USBD_EP6_TX_SIZE 20
147#define USBD_EP7_TX_SIZE 20
148
149/* otg2 device fifo */
150#define USBD2_RX_SIZE 128
151#define USBD2_EP0_TX_SIZE 24
152#define USBD2_EP1_TX_SIZE 20
153#define USBD2_EP2_TX_SIZE 20
154#define USBD2_EP3_TX_SIZE 20
155#define USBD2_EP4_TX_SIZE 20
156#define USBD2_EP5_TX_SIZE 20
157#define USBD2_EP6_TX_SIZE 20
158#define USBD2_EP7_TX_SIZE 20
159
163#ifndef USB_EPT_MAX_NUM
164#define USB_EPT_MAX_NUM 8
165#endif
166#endif
167
171#ifdef USE_OTG_HOST_MODE
172#ifndef USB_HOST_CHANNEL_NUM
173#define USB_HOST_CHANNEL_NUM 16
174#endif
175
179/* otg1 host fifo */
180#define USBH_RX_FIFO_SIZE 128
181#define USBH_NP_TX_FIFO_SIZE 96
182#define USBH_P_TX_FIFO_SIZE 96
183
184/* otg2 host fifo */
185#define USBH2_RX_FIFO_SIZE 128
186#define USBH2_NP_TX_FIFO_SIZE 96
187#define USBH2_P_TX_FIFO_SIZE 96
188#endif
189
193/* #define USB_SOF_OUTPUT_ENABLE */
194
198#define USB_VBUS_IGNORE
199
203/* #define USB_LOW_POWER_WAKUP */
204
205void usb_delay_ms(uint32_t ms);
206void usb_delay_us(uint32_t us);
207
215#ifdef __cplusplus
216}
217#endif
218
219#endif
at32f435_437.h
at32f435_437 header file
at32f435_437_board.h
at32f435_437_usb.h
at32f435_437 usb header file
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb low power wakeup handler enable
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:304
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c:315


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • bootloader
  • src
Functions
utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_clock.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_clock.h"
29
49void system_clock_config(void)
50{
51 /* enable pwc periph clock */
52 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
53
54 /* config ldo voltage */
55 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
56
57 /* set the flash clock divider */
58 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
59
60 /* reset crm */
61 crm_reset();
62
63 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
64
65 /* wait till hext is ready */
66 while(crm_hext_stable_wait() == ERROR)
67 {
68 }
69
70 /* config pll clock resource */
71 crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2);
72
73 /* enable pll */
74 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
75
76 /* wait till pll is ready */
77 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
78 {
79 }
80
81 /* config ahbclk */
82 crm_ahb_div_set(CRM_AHB_DIV_1);
83
84 /* config apb2clk */
85 crm_apb2_div_set(CRM_APB2_DIV_2);
86
87 /* config apb1clk */
88 crm_apb1_div_set(CRM_APB1_DIV_2);
89
90 /* enable auto step mode */
91 crm_auto_step_mode_enable(TRUE);
92
93 /* select pll as system clock source */
94 crm_sysclk_switch(CRM_SCLK_PLL);
95
96 /* wait till pll is used as system clock source */
97 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
98 {
99 }
100
101 /* disable auto step mode */
102 crm_auto_step_mode_enable(FALSE);
103
104 /* update system_core_clock global variable */
105 system_core_clock_update();
106}
system_clock_config
void system_clock_config(void)
system clock config program
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_clock.c:49
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_2
@ CRM_PLL_FR_2
Definition: at32f435_437_crm.h:547
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • bootloader
  • src
Functions
utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_int.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_int.h"
29
43void NMI_Handler(void)
44{
45}
46
52void HardFault_Handler(void)
53{
54 /* go to infinite loop when hard fault exception occurs */
55 while(1)
56 {
57 }
58}
59
65void MemManage_Handler(void)
66{
67 /* go to infinite loop when memory manage exception occurs */
68 while(1)
69 {
70 }
71}
72
78void BusFault_Handler(void)
79{
80 /* go to infinite loop when bus fault exception occurs */
81 while(1)
82 {
83 }
84}
85
91void UsageFault_Handler(void)
92{
93 /* go to infinite loop when usage fault exception occurs */
94 while(1)
95 {
96 }
97}
98
104void SVC_Handler(void)
105{
106}
107
113void DebugMon_Handler(void)
114{
115}
116
122void PendSV_Handler(void)
123{
124}
125
131void SysTick_Handler(void)
132{
133}
134
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/at32f435_437_int.c:113
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: main.c File Reference

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • bootloader
  • src
Functions | Variables
utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "usb_conf.h"
#include "usb_core.h"
#include "usbd_int.h"
#include "hid_iap_class.h"
#include "hid_iap_desc.h"
#include "hid_iap_user.h"

Go to the source code of this file.

Functions

void | usb_clock48m_select (usb_clk48_s clk_s)
usb 48M clock select More...
void | usb_gpio_config (void)
this function config gpio. More...
void | usb_low_power_wakeup_config (void)
int | main (void)
main function. More...
void | OTG_IRQ_HANDLER (void)
this function handles otgfs interrupt. More...
void | usb_delay_ms (uint32_t ms)
usb delay millisecond function. More...
void | usb_delay_us (uint32_t us)
usb delay microsecond function. More...

Variables

otg_core_type otg_core_struct

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • utilities
  • at32f435_437_usb_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "usb_conf.h"
30#include "usb_core.h"
31#include "usbd_int.h"
32#include "hid_iap_class.h"
33#include "hid_iap_desc.h"
34#include "hid_iap_user.h"
35
44/* usb global struct define */
45 otg_core_type otg_core_struct;
46void usb_clock48m_select(usb_clk48_s clk_s);
47void usb_gpio_config(void);
48void usb_low_power_wakeup_config(void);
49
55int main(void)
56{
57 system_clock_config();
58
59 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
60
61 iap_init();
62
63 if(iap_get_upgrade_flag() == IAP_SUCCESS)
64 {
65 jump_to_app(FLASH_APP_ADDRESS);
66 }
67
68 at32_board_init();
69
70 /* usb gpio config */
71 usb_gpio_config();
72
73#ifdef USB_LOW_POWER_WAKUP
74 usb_low_power_wakeup_config();
75#endif
76
77 /* enable otgfs clock */
78 crm_periph_clock_enable(OTG_CLOCK, TRUE);
79
80 /* select usb 48m clcok source */
81 usb_clock48m_select(USB_CLK_HEXT);
82
83 /* enable otgfs irq */
84 nvic_irq_enable(OTG_IRQ, 0, 0);
85
86 /* init usb */
87 usbd_init(&otg_core_struct,
88 USB_FULL_SPEED_CORE_ID,
89 USB_ID,
90 &hid_iap_class_handler,
91 &hid_iap_desc_handler);
92
93 while(1)
94 {
95 iap_loop();
96 at32_led_toggle(LED2);
97 delay_ms(200);
98 }
99}
100
106void usb_clock48m_select(usb_clk48_s clk_s)
107{
108 if(clk_s == USB_CLK_HICK)
109 {
110 crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
111
112 /* enable the acc calibration ready interrupt */
113 crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
114
115 /* update the c1\c2\c3 value */
116 acc_write_c1(7980);
117 acc_write_c2(8000);
118 acc_write_c3(8020);
119#if (USB_ID == 0)
120 acc_sof_select(ACC_SOF_OTG1);
121#else
122 acc_sof_select(ACC_SOF_OTG2);
123#endif
124 /* open acc calibration */
125 acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
126 }
127 else
128 {
129 switch(system_core_clock)
130 {
131 /* 48MHz */
132 case 48000000:
133 crm_usb_clock_div_set(CRM_USB_DIV_1);
134 break;
135
136 /* 72MHz */
137 case 72000000:
138 crm_usb_clock_div_set(CRM_USB_DIV_1_5);
139 break;
140
141 /* 96MHz */
142 case 96000000:
143 crm_usb_clock_div_set(CRM_USB_DIV_2);
144 break;
145
146 /* 120MHz */
147 case 120000000:
148 crm_usb_clock_div_set(CRM_USB_DIV_2_5);
149 break;
150
151 /* 144MHz */
152 case 144000000:
153 crm_usb_clock_div_set(CRM_USB_DIV_3);
154 break;
155
156 /* 168MHz */
157 case 168000000:
158 crm_usb_clock_div_set(CRM_USB_DIV_3_5);
159 break;
160
161 /* 192MHz */
162 case 192000000:
163 crm_usb_clock_div_set(CRM_USB_DIV_4);
164 break;
165
166 /* 216MHz */
167 case 216000000:
168 crm_usb_clock_div_set(CRM_USB_DIV_4_5);
169 break;
170
171 /* 240MHz */
172 case 240000000:
173 crm_usb_clock_div_set(CRM_USB_DIV_5);
174 break;
175
176 /* 264MHz */
177 case 264000000:
178 crm_usb_clock_div_set(CRM_USB_DIV_5_5);
179 break;
180
181 /* 288MHz */
182 case 288000000:
183 crm_usb_clock_div_set(CRM_USB_DIV_6);
184 break;
185
186 default:
187 break;
188
189 }
190 }
191}
192
198void usb_gpio_config(void)
199{
200 gpio_init_type gpio_init_struct;
201
202 crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
203 gpio_default_para_init(&gpio_init_struct);
204
205 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
206 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
207 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
208 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
209
210 /* dp and dm */
211 gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
212 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
213
214 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
215 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
216
217#ifdef USB_SOF_OUTPUT_ENABLE
218 crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
219 gpio_init_struct.gpio_pins = OTG_PIN_SOF;
220 gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
221 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
222#endif
223
224 /* otgfs use vbus pin */
225#ifndef USB_VBUS_IGNORE
226 gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
227 gpio_init_struct.gpio_pull = GPIO_PULL_UP;
228 gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
229 gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
230#endif
231
232
233}
234#ifdef USB_LOW_POWER_WAKUP
240void usb_low_power_wakeup_config(void)
241{
242 exint_init_type exint_init_struct;
243
244 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
245 exint_default_para_init(&exint_init_struct);
246
247 exint_init_struct.line_enable = TRUE;
248 exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
249 exint_init_struct.line_select = OTG_WKUP_EXINT_LINE;
250 exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
251 exint_init(&exint_init_struct);
252
253 nvic_irq_enable(OTG_WKUP_IRQ, 0, 0);
254}
255
261void OTG_WKUP_HANDLER(void)
262{
263 exint_flag_clear(OTG_WKUP_EXINT_LINE);
264}
265
266#endif
267
273void OTG_IRQ_HANDLER(void)
274{
275 usbd_irq_handler(&otg_core_struct);
276}
277
283void usb_delay_ms(uint32_t ms)
284{
285 /* user can define self delay function */
286 delay_ms(ms);
287}
288
294void usb_delay_us(uint32_t us)
295{
296 delay_us(us);
297}
298
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
exint_init_struct
exint_init_type exint_init_struct
Definition: project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c:41
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
iap_get_upgrade_flag
iap_result_type iap_get_upgrade_flag(void)
get iap upgrade complete flag
Definition: app_led3_toggle/src/hid_iap_user.c:77
FLASH_APP_ADDRESS
#define FLASH_APP_ADDRESS
Definition: app_led3_toggle/inc/hid_iap_user.h:46
iap_loop
void iap_loop(void)
iap loop
Definition: bootloader/src/hid_iap_user.c:491
OTG_PIN_VBUS
#define OTG_PIN_VBUS
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:85
OTG_PIN_DM
#define OTG_PIN_DM
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:82
OTG_PIN_DP
#define OTG_PIN_DP
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:79
OTG_PIN_SOF
#define OTG_PIN_SOF
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:93
OTG_WKUP_IRQ
#define OTG_WKUP_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:72
OTG_PIN_DP_SOURCE
#define OTG_PIN_DP_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:80
OTG_PIN_GPIO
#define OTG_PIN_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:76
OTG_IRQ
#define OTG_IRQ
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:70
OTG_PIN_SOF_GPIO
#define OTG_PIN_SOF_GPIO
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:91
OTG_WKUP_HANDLER
#define OTG_WKUP_HANDLER
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:73
OTG_CLOCK
#define OTG_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:69
OTG_PIN_GPIO_CLOCK
#define OTG_PIN_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:77
OTG_PIN_SOF_SOURCE
#define OTG_PIN_SOF_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:94
OTG_PIN_VBUS_SOURCE
#define OTG_PIN_VBUS_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:86
USB_ID
#define USB_ID
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:68
OTG_PIN_DM_SOURCE
#define OTG_PIN_DM_SOURCE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:83
OTG_PIN_MUX
#define OTG_PIN_MUX
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:96
OTG_WKUP_EXINT_LINE
#define OTG_WKUP_EXINT_LINE
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:74
OTG_PIN_SOF_GPIO_CLOCK
#define OTG_PIN_SOF_GPIO_CLOCK
Definition: project/at_start_f435/examples/acc/calibration/inc/usb_conf.h:92
jump_to_app
iapfun jump_to_app
jump to app
Definition: at32f435_437_usart_iap_demo/source_code/bootloader/src/iap.c:46
ACC_SOF_OTG2
#define ACC_SOF_OTG2
Definition: at32f435_437_acc.h:61
ACC_CAL_HICKTRIM
#define ACC_CAL_HICKTRIM
Definition: at32f435_437_acc.h:52
ACC_SOF_OTG1
#define ACC_SOF_OTG1
Definition: at32f435_437_acc.h:60
acc_write_c2
void acc_write_c2(uint16_t acc_c2_value)
wtire the value to acc c2 register.
Definition: at32f435_437_acc.c:145
acc_write_c3
void acc_write_c3(uint16_t acc_c3_value)
wtire the value to acc c3 register.
Definition: at32f435_437_acc.c:155
acc_write_c1
void acc_write_c1(uint16_t acc_c1_value)
wtire the value to acc c1 register.
Definition: at32f435_437_acc.c:135
acc_sof_select
void acc_sof_select(uint16_t sof_sel)
select sof sourse for acc in acc's ctrl1 register.
Definition: at32f435_437_acc.c:84
acc_calibration_mode_enable
void acc_calibration_mode_enable(uint16_t acc_trim, confirm_state new_state)
enable or disable the acc calibration mode.
Definition: at32f435_437_acc.c:53
system_core_clock
unsigned int system_core_clock
Definition: system_at32f435_437.c:48
LED2
@ LED2
Definition: at32f435_437_board.h:65
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
at32_led_toggle
void at32_led_toggle(led_type led)
turns selected led toggle.
Definition: at32f435_437_board.c:280
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
delay_us
void delay_us(uint32_t nus)
inserts a delay time.
Definition: at32f435_437_board.c:306
crm_usb_clock_div_set
void crm_usb_clock_div_set(crm_usb_div_type value)
set usb division
Definition: at32f435_437_crm.c:521
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_usb_clock_source_select
void crm_usb_clock_source_select(crm_usb_clock_source_type value)
usb 48 mhz clock source select
Definition: at32f435_437_crm.c:594
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_ACC_PERIPH_CLOCK
@ CRM_ACC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:168
CRM_USB_DIV_5
@ CRM_USB_DIV_5
Definition: at32f435_437_crm.h:620
CRM_USB_DIV_3
@ CRM_USB_DIV_3
Definition: at32f435_437_crm.h:616
CRM_USB_DIV_1_5
@ CRM_USB_DIV_1_5
Definition: at32f435_437_crm.h:611
CRM_USB_DIV_5_5
@ CRM_USB_DIV_5_5
Definition: at32f435_437_crm.h:619
CRM_USB_DIV_4
@ CRM_USB_DIV_4
Definition: at32f435_437_crm.h:618
CRM_USB_DIV_3_5
@ CRM_USB_DIV_3_5
Definition: at32f435_437_crm.h:615
CRM_USB_DIV_2
@ CRM_USB_DIV_2
Definition: at32f435_437_crm.h:614
CRM_USB_DIV_6
@ CRM_USB_DIV_6
Definition: at32f435_437_crm.h:622
CRM_USB_DIV_4_5
@ CRM_USB_DIV_4_5
Definition: at32f435_437_crm.h:617
CRM_USB_DIV_1
@ CRM_USB_DIV_1
Definition: at32f435_437_crm.h:612
CRM_USB_DIV_2_5
@ CRM_USB_DIV_2_5
Definition: at32f435_437_crm.h:613
CRM_USB_CLOCK_SOURCE_HICK
@ CRM_USB_CLOCK_SOURCE_HICK
Definition: at32f435_437_crm.h:763
exint_flag_clear
void exint_flag_clear(uint32_t exint_line)
clear exint flag
Definition: at32f435_437_exint.c:126
exint_default_para_init
void exint_default_para_init(exint_init_type *exint_struct)
exint default para init
Definition: at32f435_437_exint.c:64
exint_init
void exint_init(exint_init_type *exint_struct)
exint init
Definition: at32f435_437_exint.c:78
EXINT_LINE_INTERRUPUT
@ EXINT_LINE_INTERRUPUT
Definition: at32f435_437_exint.h:89
EXINT_TRIGGER_RISING_EDGE
@ EXINT_TRIGGER_RISING_EDGE
Definition: at32f435_437_exint.h:98
TRUE
@ TRUE
Definition: at32f435_437.h:379
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_default_para_init
void gpio_default_para_init(gpio_init_type *gpio_init_struct)
fill each gpio_init_type member with its default value.
Definition: at32f435_437_gpio.c:135
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_PULL_UP
@ GPIO_PULL_UP
Definition: at32f435_437_gpio.h:112
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
iap_init
void iap_init(void)
iap init.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/iap.c:61
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
usb_clock48m_select
void usb_clock48m_select(usb_clk48_s clk_s)
usb 48M clock select
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/main.c:106
main
int main(void)
main function.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/main.c:55
usb_low_power_wakeup_config
void usb_low_power_wakeup_config(void)
usb_gpio_config
void usb_gpio_config(void)
this function config gpio.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/main.c:198
OTG_IRQ_HANDLER
void OTG_IRQ_HANDLER(void)
this function handles otgfs interrupt.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/main.c:273
usb_delay_ms
void usb_delay_ms(uint32_t ms)
usb delay millisecond function.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/main.c:283
usb_delay_us
void usb_delay_us(uint32_t us)
usb delay microsecond function.
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/main.c:294
otg_core_struct
otg_core_type otg_core_struct
Definition: utilities/at32f435_437_usb_iap_demo/source_code/bootloader/src/main.c:45
USB_FULL_SPEED_CORE_ID
@ USB_FULL_SPEED_CORE_ID
Definition: usb_core.h:64
usb_clk48_s
usb_clk48_s
usb clock select
Definition: at32f435_437_usb.h:402
USB_CLK_HEXT
@ USB_CLK_HEXT
Definition: at32f435_437_usb.h:404
USB_CLK_HICK
@ USB_CLK_HICK
Definition: at32f435_437_usb.h:403
IAP_SUCCESS
@ IAP_SUCCESS
Definition: hid_iap_class.h:87
hid_iap_class_handler
usbd_class_handler hid_iap_class_handler
Definition: hid_iap_class.c:57
hid_iap_desc_handler
usbd_desc_handler hid_iap_desc_handler
hid device descriptor handler structure
Definition: hid_iap_desc.c:65
usbd_irq_handler
void usbd_irq_handler(otg_core_type *udev)
usb device interrput request handler.
Definition: usbd_int.c:46
hid_iap_class.h
usb hid iap header file
hid_iap_desc.h
usb hid iap descriptor header file
exint_init_type
exint init type
Definition: at32f435_437_exint.h:107
exint_init_type::line_select
uint32_t line_select
Definition: at32f435_437_exint.h:109
exint_init_type::line_enable
confirm_state line_enable
Definition: at32f435_437_exint.h:111
exint_init_type::line_mode
exint_line_mode_type line_mode
Definition: at32f435_437_exint.h:108
exint_init_type::line_polarity
exint_polarity_config_type line_polarity
Definition: at32f435_437_exint.h:110
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121
otg_core_type
usb otg core struct type
Definition: usb_core.h:92
usb_core.h
usb core header file
usbd_int.h
usb interrupt header file
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32_emac.h File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • inc
Macros | Functions
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/at32_emac.h File Reference

header file of emac config program. More...

#include "at32f435_437.h"
#include "netif.h"

Go to the source code of this file.

Macros

#define | RX_REMAP (1)
#define | CRYSTAL_ON_PHY (0)
#define | RMII_MODE
#define | DM9162
#define | LINK_DETECTION (1)
#define | PHY_ADDRESS (0x03)
#define | PHY_CONTROL_REG (0x00)
#define | PHY_STATUS_REG (0x01)
#define | PHY_SPECIFIED_CS_REG (0x11)
#define | PHY_AUTO_NEGOTIATION_BIT (0x1000)
#define | PHY_LOOPBACK_BIT (0x4000)
#define | PHY_RESET_BIT (0x8000)
#define | PHY_LINKED_STATUS_BIT (0x0004)
#define | PHY_NEGO_COMPLETE_BIT (0x0020)
#define | PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
#define | PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
#define | PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
#define | PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Detailed Description

header file of emac config program.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/at32_emac.h.


AT32F435/437 Firmwary Library: at32_emac.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/at32_emac.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32_EMAC_H
29#define __AT32_EMAC_H
30
31#ifdef __cplusplus
32 extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37#include "netif.h"
38
51#define RX_REMAP (1)
52#define CRYSTAL_ON_PHY (0)
53
54//#define MII_MODE
55#define RMII_MODE
56
57#define DM9162
58//#define DP83848
59
60#define LINK_DETECTION (1)
62#if defined (DM9162)
63 #define PHY_ADDRESS (0x03)
64 #define PHY_CONTROL_REG (0x00)
65 #define PHY_STATUS_REG (0x01)
66 #define PHY_SPECIFIED_CS_REG (0x11)
67 /* phy control register */
68 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
69 #define PHY_LOOPBACK_BIT (0x4000)
70 #define PHY_RESET_BIT (0x8000)
71 /* phy status register */
72 #define PHY_LINKED_STATUS_BIT (0x0004)
73 #define PHY_NEGO_COMPLETE_BIT (0x0020)
74 /* phy specified control/status register */
75 #define PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
76 #define PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
77 #define PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
78 #define PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)
79#elif defined (DP83848)
80 #define PHY_ADDRESS (0x01)
81 #define PHY_CONTROL_REG (0x00)
82 #define PHY_STATUS_REG (0x01)
83 #define PHY_SPECIFIED_CS_REG (0x10)
84 /* phy control register */
85 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
86 #define PHY_LOOPBACK_BIT (0x4000)
87 #define PHY_RESET_BIT (0x8000)
88 /* phy status register */
89 #define PHY_LINKED_STATUS_BIT (0x0004)
90 #define PHY_NEGO_COMPLETE_BIT (0x0020)
92 #define PHY_DUPLEX_MODE (0x0002)
93 #define PHY_SPEED_MODE (0x0001) `
94#endif
95
104 error_status emac_system_init(void);
105void emac_nvic_configuration(void);
106void emac_pins_configuration(void);
107 error_status emac_layer2_configuration(void);
108void static reset_phy(void);
109 error_status emac_phy_register_reset(void);
110 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed);
111 error_status emac_phy_init(emac_control_config_type *control_para);
112
113uint16_t link_update(void);
114void ethernetif_set_link(void const *argument);
115void ethernetif_notify_conn_changed(struct netif *netif);
116void ethernetif_update_config(struct netif *netif);
117void emac_tmr_init(void);
118
131#ifdef __cplusplus
132}
133#endif
134
135#endif
at32f435_437.h
at32f435_437 header file
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
error_status
error_status
Definition: at32f435_437.h:380
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:80
reset_phy
static void reset_phy(void)
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:205
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:574
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:70
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:335
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
10/* define to prevent recursive inclusion -------------------------------------*/
11#ifndef __AT32F435_437_CONF_H
12#define __AT32F435_437_CONF_H
13
14#ifdef __cplusplus
15extern "C" {
16#endif
17
18#if defined (__CC_ARM)
19 #pragma anon_unions
20#endif
21
28#if !defined HEXT_VALUE
29#define HEXT_VALUE ((uint32_t)8000000)
30#endif
31
36#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
37#define HICK_VALUE ((uint32_t)8000000)
39/* module define -------------------------------------------------------------*/
40#define CRM_MODULE_ENABLED
41#define TMR_MODULE_ENABLED
42#define ERTC_MODULE_ENABLED
43#define GPIO_MODULE_ENABLED
44#define I2C_MODULE_ENABLED
45#define USART_MODULE_ENABLED
46#define PWC_MODULE_ENABLED
47#define CAN_MODULE_ENABLED
48#define ADC_MODULE_ENABLED
49#define DAC_MODULE_ENABLED
50#define SPI_MODULE_ENABLED
51#define EDMA_MODULE_ENABLED
52#define DMA_MODULE_ENABLED
53#define DEBUG_MODULE_ENABLED
54#define FLASH_MODULE_ENABLED
55#define CRC_MODULE_ENABLED
56#define WWDT_MODULE_ENABLED
57#define WDT_MODULE_ENABLED
58#define EXINT_MODULE_ENABLED
59#define SDIO_MODULE_ENABLED
60#define XMC_MODULE_ENABLED
61#define USB_MODULE_ENABLED
62#define ACC_MODULE_ENABLED
63#define MISC_MODULE_ENABLED
64#define QSPI_MODULE_ENABLED
65#define DVP_MODULE_ENABLED
66#define SCFG_MODULE_ENABLED
67#define EMAC_MODULE_ENABLED
68
69/* includes ------------------------------------------------------------------*/
70#ifdef CRM_MODULE_ENABLED
71#include "at32f435_437_crm.h"
72#endif
73#ifdef TMR_MODULE_ENABLED
74#include "at32f435_437_tmr.h"
75#endif
76#ifdef ERTC_MODULE_ENABLED
77#include "at32f435_437_ertc.h"
78#endif
79#ifdef GPIO_MODULE_ENABLED
80#include "at32f435_437_gpio.h"
81#endif
82#ifdef I2C_MODULE_ENABLED
83#include "at32f435_437_i2c.h"
84#endif
85#ifdef USART_MODULE_ENABLED
86#include "at32f435_437_usart.h"
87#endif
88#ifdef PWC_MODULE_ENABLED
89#include "at32f435_437_pwc.h"
90#endif
91#ifdef CAN_MODULE_ENABLED
92#include "at32f435_437_can.h"
93#endif
94#ifdef ADC_MODULE_ENABLED
95#include "at32f435_437_adc.h"
96#endif
97#ifdef DAC_MODULE_ENABLED
98#include "at32f435_437_dac.h"
99#endif
100#ifdef SPI_MODULE_ENABLED
101#include "at32f435_437_spi.h"
102#endif
103#ifdef DMA_MODULE_ENABLED
104#include "at32f435_437_dma.h"
105#endif
106#ifdef DEBUG_MODULE_ENABLED
107#include "at32f435_437_debug.h"
108#endif
109#ifdef FLASH_MODULE_ENABLED
110#include "at32f435_437_flash.h"
111#endif
112#ifdef CRC_MODULE_ENABLED
113#include "at32f435_437_crc.h"
114#endif
115#ifdef WWDT_MODULE_ENABLED
116#include "at32f435_437_wwdt.h"
117#endif
118#ifdef WDT_MODULE_ENABLED
119#include "at32f435_437_wdt.h"
120#endif
121#ifdef EXINT_MODULE_ENABLED
122#include "at32f435_437_exint.h"
123#endif
124#ifdef SDIO_MODULE_ENABLED
125#include "at32f435_437_sdio.h"
126#endif
127#ifdef XMC_MODULE_ENABLED
128#include "at32f435_437_xmc.h"
129#endif
130#ifdef ACC_MODULE_ENABLED
131#include "at32f435_437_acc.h"
132#endif
133#ifdef MISC_MODULE_ENABLED
134#include "at32f435_437_misc.h"
135#endif
136#ifdef EDMA_MODULE_ENABLED
137#include "at32f435_437_edma.h"
138#endif
139#ifdef QSPI_MODULE_ENABLED
140#include "at32f435_437_qspi.h"
141#endif
142#ifdef SCFG_MODULE_ENABLED
143#include "at32f435_437_scfg.h"
144#endif
145#ifdef EMAC_MODULE_ENABLED
146#include "at32f435_437_emac.h"
147#endif
148#ifdef DVP_MODULE_ENABLED
149#include "at32f435_437_dvp.h"
150#endif
151#ifdef USB_MODULE_ENABLED
152#include "at32f435_437_usb.h"
153#endif
154
155#ifdef __cplusplus
156}
157#endif
158
159#endif /* __AT32F435_437_CONF_H */
160
161
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: flash.h File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • inc
Macros | Functions
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/flash.h File Reference

flash header file More...

#include "at32f435_437_board.h"

Go to the source code of this file.

Macros

#define | FLASH_SIZE (*((uint32_t*)0x1FFFF7E0)) /* read from at32 flash capacity register(unit:kbyte) */
#define | SRAM_SIZE 224 /* sram size, unit:kbyte */
#define | USER_FLASH_END_ADDRESS 0x080FFFFF

Functions

void | flash_2kb_write (uint32_t write_addr, uint8_t *pbuffer)
flash erase/program operation. More...
flag_status | flash_upgrade_flag_read (void)
check flash upgrade flag. More...
uint32_t | flash_if_write (__IO uint32_t *flash_address, uint32_t *data, uint16_t data_length)
this function writes a data buffer in flash (data are 32-bit aligned). More...

Detailed Description

flash header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/flash.h.


AT32F435/437 Firmwary Library: flash.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/flash.h
Go to the documentation of this file.
1
27#ifndef __FLASH_H__
28#define __FLASH_H__
29
30#ifdef __cplusplus
31 extern "C" {
32#endif
33
34#include "at32f435_437_board.h"
35
48#define FLASH_SIZE (*((uint32_t*)0x1FFFF7E0)) /* read from at32 flash capacity register(unit:kbyte) */
49#define SRAM_SIZE 224 /* sram size, unit:kbyte */
50#define USER_FLASH_END_ADDRESS 0x080FFFFF
51
60void flash_2kb_write(uint32_t write_addr, uint8_t *pbuffer);
61 flag_status flash_upgrade_flag_read(void);
62uint32_t flash_if_write(__IO uint32_t* flash_address, uint32_t* data ,uint16_t data_length);
63
76#ifdef __cplusplus
77}
78#endif
79
80#endif
at32f435_437_board.h
flag_status
flag_status
Definition: at32f435_437.h:378
flash_2kb_write
void flash_2kb_write(uint32_t write_addr, uint8_t *pbuffer)
flash erase/program operation.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c:45
flash_if_write
uint32_t flash_if_write(__IO uint32_t *flash_address, uint32_t *data, uint16_t data_length)
this function writes a data buffer in flash (data are 32-bit aligned).
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/flash.c:83
flash_upgrade_flag_read
flag_status flash_upgrade_flag_read(void)
check flash upgrade flag.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c:76


AT32F435/437 Firmwary Library: lwipopts.h File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • inc
Macros
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h File Reference

Go to the source code of this file.

Macros

#define | LWIP_IPV4 1
#define | NO_SYS 1
#define | SYS_LIGHTWEIGHT_PROT 0
#define | LWIP_NETCONN !NO_SYS
#define | LWIP_SOCKET !NO_SYS
#define | LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
#define | LWIP_NETBUF_RECVINFO 1
#define | LWIP_HAVE_LOOPIF 1
#define | LWIP_NETIF_LINK_CALLBACK 1
#define | LWIP_DNS 1
#define | DNS_DOES_NAME_CHECK 1
#define | LWIP_DHCP 0
#define | TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
#define | MEM_ALIGNMENT 4
#define | MEM_SIZE (20*1024)
#define | TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
#define | MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
#define | TCP_SND_BUF (2 * TCP_MSS)
#define | TCP_WND (2 * TCP_MSS)
#define | LWIP_WND_SCALE 0
#define | TCP_RCV_SCALE 0
#define | PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
#define | PBUF_POOL_BUFSIZE 1500
#define | LWIP_TCP 1
#define | TCP_TTL 255
#define | LWIP_IGMP 1
#define | LWIP_MDNS_RESPONDER 1
#define | LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
#define | ETHARP_SUPPORT_STATIC_ENTRIES 1
#define | MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
#define | MIB2_STATS 1
#define | LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */

Macro Definition Documentation

◆ DNS_DOES_NAME_CHECK

#define DNS_DOES_NAME_CHECK 1

Definition at line 56 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ ETHARP_SUPPORT_STATIC_ENTRIES

#define ETHARP_SUPPORT_STATIC_ENTRIES 1

Definition at line 91 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_DHCP

#define LWIP_DHCP 0

Definition at line 59 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_DNS

#define LWIP_DNS 1

Definition at line 55 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_HAVE_LOOPIF

#define LWIP_HAVE_LOOPIF 1

Definition at line 51 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_IGMP

#define LWIP_IGMP 1

Definition at line 86 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_IPV4

#define LWIP_IPV4 1

Definition at line 37 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_MDNS_RESPONDER

#define LWIP_MDNS_RESPONDER 1

Definition at line 87 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_MEM_ILLEGAL_FREE

#define LWIP_MEM_ILLEGAL_FREE ( msg ) /* to nothing */

Definition at line 102 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_NETBUF_RECVINFO

#define LWIP_NETBUF_RECVINFO 1

Definition at line 50 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_NETCONN

#define LWIP_NETCONN !NO_SYS

Definition at line 47 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_NETCONN_FULLDUPLEX

#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET

Definition at line 49 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_NETIF_LINK_CALLBACK

#define LWIP_NETIF_LINK_CALLBACK 1

Definition at line 54 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_NUM_NETIF_CLIENT_DATA

#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)

Definition at line 88 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_SOCKET

#define LWIP_SOCKET !NO_SYS

Definition at line 48 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_TCP

#define LWIP_TCP 1

Definition at line 82 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ LWIP_WND_SCALE

#define LWIP_WND_SCALE 0

Definition at line 74 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ MEM_ALIGNMENT

#define MEM_ALIGNMENT 4

Definition at line 68 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ MEM_SIZE

#define MEM_SIZE (20*1024)

Definition at line 69 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ MEMP_NUM_SYS_TIMEOUT

#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)

Definition at line 93 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ MEMP_NUM_TCP_SEG

#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN

Definition at line 71 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ MIB2_STATS

#define MIB2_STATS 1

Definition at line 96 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ NO_SYS

#define NO_SYS 1

Definition at line 45 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ PBUF_POOL_BUFSIZE

#define PBUF_POOL_BUFSIZE 1500

Definition at line 78 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ PBUF_POOL_SIZE

#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */

Definition at line 76 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ SYS_LIGHTWEIGHT_PROT

#define SYS_LIGHTWEIGHT_PROT 0

Definition at line 46 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ TCP_MSS

#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */

Definition at line 64 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ TCP_RCV_SCALE

#define TCP_RCV_SCALE 0

Definition at line 75 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ TCP_SND_BUF

#define TCP_SND_BUF (2 * TCP_MSS)

Definition at line 72 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ TCP_SND_QUEUELEN

#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS

Definition at line 70 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ TCP_TTL

#define TCP_TTL 255

Definition at line 83 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.

◆ TCP_WND

#define TCP_WND (2 * TCP_MSS)

Definition at line 73 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h.


AT32F435/437 Firmwary Library: lwipopts.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/lwipopts.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
21 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
25 * OF SUCH DAMAGE.
26 *
27 * This file is part of the lwIP TCP/IP stack.
28 *
29 * Author: Simon Goldschmidt
30 *
31 */
32#ifndef LWIP_HDR_LWIPOPTS_H
33#define LWIP_HDR_LWIPOPTS_H
34
35//#define LWIP_TESTMODE 0
36
37#define LWIP_IPV4 1
38//#define LWIP_TIMERS 0
39
40//#define LWIP_CHECKSUM_ON_COPY 1
41//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK 1
42//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL(printfmsg) LWIP_ASSERT("TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL", 0)
43
44/* We link to special sys_arch.c (for basic non-waiting API layers unit tests) */
45#define NO_SYS 1
46#define SYS_LIGHTWEIGHT_PROT 0
47#define LWIP_NETCONN !NO_SYS
48#define LWIP_SOCKET !NO_SYS
49#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
50#define LWIP_NETBUF_RECVINFO 1
51#define LWIP_HAVE_LOOPIF 1
52//#define TCPIP_THREAD_TEST
53
54#define LWIP_NETIF_LINK_CALLBACK 1
55#define LWIP_DNS 1
56#define DNS_DOES_NAME_CHECK 1
57
58/* Enable DHCP to test it, disable UDP checksum to easier inject packets */
59#define LWIP_DHCP 0
60
61/* Minimal changes to opt.h required for tcp unit tests: */
62/* TCP Maximum segment size. */
63
64#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
65/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
66 lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
67 byte alignment -> define MEM_ALIGNMENT to 2. */
68#define MEM_ALIGNMENT 4
69#define MEM_SIZE (20*1024)
70#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
71#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
72#define TCP_SND_BUF (2 * TCP_MSS)
73#define TCP_WND (2 * TCP_MSS)
74#define LWIP_WND_SCALE 0
75#define TCP_RCV_SCALE 0
76#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
77/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
78#define PBUF_POOL_BUFSIZE 1500
79//#define TCP_QUEUE_OOSEQ 0
80
81/* ---------- TCP options ---------- */
82#define LWIP_TCP 1
83#define TCP_TTL 255
84
85/* Enable IGMP and MDNS for MDNS tests */
86#define LWIP_IGMP 1
87#define LWIP_MDNS_RESPONDER 1
88#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
89
90/* Minimal changes to opt.h required for etharp unit tests: */
91#define ETHARP_SUPPORT_STATIC_ENTRIES 1
92
93#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
94
95/* MIB2 stats are required to check IPv4 reassembly results */
96#define MIB2_STATS 1
97
98/* netif tests want to test this, so enable: */
99//#define LWIP_NETIF_EXT_STATUS_CALLBACK 1
100
101/* Check lwip_stats.mem.illegal instead of asserting */
102#define LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */
103
104#endif /* LWIP_HDR_LWIPOPTS_H */


AT32F435/437 Firmwary Library: netconf.h File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • inc
Functions
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/netconf.h File Reference

This file contains all the functions prototypes for the netconf.c file. More...

Go to the source code of this file.

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Detailed Description

This file contains all the functions prototypes for the netconf.c file.

Version
v2.0.9
Date
2022-06-28
        Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/netconf.h.


AT32F435/437 Firmwary Library: netconf.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • inc
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/netconf.h
Go to the documentation of this file.
1
28/* Define to prevent recursive inclusion -------------------------------------*/
29#ifndef __NETCONF_H
30#define __NETCONF_H
31
32#ifdef __cplusplus
33 extern "C" {
34#endif
35
36/* Includes ------------------------------------------------------------------*/
37void tcpip_stack_init(void);
38void lwip_pkt_handle(void);
39void time_update(void);
40void lwip_periodic_handle(volatile uint32_t localtime);
41
42#ifdef __cplusplus
43}
44#endif
45
46#endif /* __NETCONF_H */
47
48
49
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:144
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:85
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:158
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:168


AT32F435/437 Firmwary Library: at32_emac.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • src
Functions | Variables
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c File Reference

emac config program More...

#include "at32f435_437_board.h"
#include "lwip/dhcp.h"
#include "at32_emac.h"

Go to the source code of this file.

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
reset layer 1 More...
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Variables

emac_control_config_type mac_control_para

Detailed Description

emac config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c.


AT32F435/437 Firmwary Library: at32_emac.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • src
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_board.h"
29#include "lwip/dhcp.h"
30#include "at32_emac.h"
31
40 emac_control_config_type mac_control_para;
41
47 error_status emac_system_init(void)
48{
49 error_status status;
50
51 emac_nvic_configuration();
52
53 /* emac periph clock enable */
54 crm_periph_clock_enable(CRM_EMAC_PERIPH_CLOCK, TRUE);
55 crm_periph_clock_enable(CRM_EMACTX_PERIPH_CLOCK, TRUE);
56 crm_periph_clock_enable(CRM_EMACRX_PERIPH_CLOCK, TRUE);
57
58 emac_pins_configuration();
59 status = emac_layer2_configuration();
60 emac_tmr_init();
61
62 return status;
63}
64
70void emac_nvic_configuration(void)
71{
72 nvic_irq_enable(EMAC_IRQn, 1, 0);
73}
74
80void emac_pins_configuration(void)
81{
82 gpio_init_type gpio_init_struct = {0};
83
84 /* emac pins clock enable */
85 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
87 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
88 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
89 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
90 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
91
92 /* pa2 -> mdio */
93 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_11);
94 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
95 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
96 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
97 gpio_init_struct.gpio_pins = GPIO_PINS_2;
98 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
99 gpio_init(GPIOA, &gpio_init_struct);
100
101 /* pc1 -> mdc */
102 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE1, GPIO_MUX_11);
103 gpio_init_struct.gpio_pins = GPIO_PINS_1;
104 gpio_init(GPIOC, &gpio_init_struct);
105
106 #ifdef MII_MODE
107 /*
108 pb12 -> tx_d0
109 pb13 -> tx_d1
110 pc2 -> tx_d2
111 pb8 -> tx_d3
112 pb11 -> tx_en
113 pc3 -> tx_clk
114 */
115 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_11);
116 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_11);
117 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_11);
118 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_11);
119 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_11 | GPIO_PINS_12 | GPIO_PINS_13;
120 gpio_init(GPIOB, &gpio_init_struct);
121
122 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_11);
123 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE3, GPIO_MUX_11);
124 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
125 gpio_init(GPIOC, &gpio_init_struct);
126
127 /*
128 pd8 -> rx_dv
129 pd9 -> rx_d0
130 pd10 -> rx_d1
131 pd11 -> rx_d2
132 pd12 -> rx_d3
133 */
134 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
135 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
136 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
137 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE11, GPIO_MUX_11);
138 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE12, GPIO_MUX_11);
139 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12;
140 gpio_init(GPIOD, &gpio_init_struct);
141
142 /*
143 pa1 -> rx_clk
144 pa0 -> crs
145 pa3 -> col
146 pb10 -> rx_er
147 */
148 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_11);
149 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
150 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_11);
151 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_3;
152 gpio_init(GPIOA, &gpio_init_struct);
153
154 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_11);
155 gpio_init_struct.gpio_pins = GPIO_PINS_10;
156 gpio_init(GPIOB, &gpio_init_struct);
157 #endif /* MII_MODE */
158
159 #ifdef RMII_MODE
160 /*
161 pb12 -> tx_d0
162 pb13 -> tx_d1
163 pb11 -> tx_en
164 */
165 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE11, GPIO_MUX_11);
166 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE13, GPIO_MUX_11);
167 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE14, GPIO_MUX_11);
168 gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_13 | GPIO_PINS_14;
169 gpio_init(GPIOG, &gpio_init_struct);
170
171 /*
172 pd8 -> rx_dv
173 pd9 -> rx_d0
174 pd10 -> rx_d1
175 */
176 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
177 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
178 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
179 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10;
180 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
181 gpio_init(GPIOD, &gpio_init_struct);
182
183
184 #endif /* RMII_MODE */
185 /*
186 pa1 -> ref_clk
187 */
188 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
189 gpio_init_struct.gpio_pins = GPIO_PINS_1;
190 gpio_init(GPIOA, &gpio_init_struct);
191
192 #if !CRYSTAL_ON_PHY
193 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_0);
194 gpio_init_struct.gpio_pins = GPIO_PINS_8;
195 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
196 gpio_init(GPIOA, &gpio_init_struct);
197 #endif
198}
199
205 error_status emac_layer2_configuration(void)
206{
207 emac_dma_config_type dma_control_para;
208 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
209 #ifdef MII
210 scfg_emac_interface_set(SCFG_EMAC_SELECT_MII);
211 #elif defined RMII_MODE
212 scfg_emac_interface_set(SCFG_EMAC_SELECT_RMII);
213 #endif
214 crm_clock_out1_set(CRM_CLKOUT1_PLL);
215 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_5, CRM_CLKOUT_DIV2_2);
216
217 /* reset phy */
218 reset_phy();
219 /* reset emac ahb bus */
220 emac_reset();
221
222 /* software reset emac dma */
223 emac_dma_software_reset_set();
224
225 while(emac_dma_software_reset_get() == SET);
226
227 emac_control_para_init(&mac_control_para);
228
229 mac_control_para.auto_nego = EMAC_AUTO_NEGOTIATION_ON;
230
231 if(emac_phy_init(&mac_control_para) == ERROR)
232 {
233 return ERROR;
234 }
235
236 emac_dma_para_init(&dma_control_para);
237
238 dma_control_para.rsf_enable = TRUE;
239 dma_control_para.tsf_enable = TRUE;
240 dma_control_para.osf_enable = TRUE;
241 dma_control_para.aab_enable = TRUE;
242 dma_control_para.usp_enable = TRUE;
243 dma_control_para.fb_enable = TRUE;
244 dma_control_para.flush_rx_disable = TRUE;
245 dma_control_para.rx_dma_pal = EMAC_DMA_PBL_32;
246 dma_control_para.tx_dma_pal = EMAC_DMA_PBL_32;
247 dma_control_para.priority_ratio = EMAC_DMA_2_RX_1_TX;
248
249 emac_dma_config(&dma_control_para);
250 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_NORMAL_SUMMARY, TRUE);
251 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_RX, TRUE);
252
253 return SUCCESS;
254}
255
261void static reset_phy(void)
262{
263 gpio_init_type gpio_init_struct = {0};
264 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
265 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
266 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE8, GPIO_MUX_0);
267 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
268 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
269 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
270 gpio_init_struct.gpio_pins = GPIO_PINS_15;
271 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
272 gpio_init(GPIOE, &gpio_init_struct);
273
274 gpio_init_struct.gpio_pins = GPIO_PINS_15;
275 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
276 gpio_init(GPIOG, &gpio_init_struct);
277 gpio_bits_reset(GPIOG, GPIO_PINS_15);
278 gpio_bits_reset(GPIOE, GPIO_PINS_15);
279 delay_ms(2);
280 gpio_bits_set(GPIOE, GPIO_PINS_15);
281 delay_ms(2);
282}
283
289 error_status emac_phy_register_reset(void)
290{
291 uint16_t data = 0;
292 uint32_t timeout = 0;
293 uint32_t i = 0;
294
295 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_RESET_BIT) == ERROR)
296 {
297 return ERROR;
298 }
299
300 for(i = 0; i < 0x000FFFFF; i++);
301
302 do
303 {
304 timeout++;
305 if(emac_phy_register_read(PHY_ADDRESS, PHY_CONTROL_REG, &data) == ERROR)
306 {
307 return ERROR;
308 }
309 } while((data & PHY_RESET_BIT) && (timeout < PHY_TIMEOUT));
310
311 for(i = 0; i < 0x00FFFFF; i++);
312 if(timeout == PHY_TIMEOUT)
313 {
314 return ERROR;
315 }
316 return SUCCESS;
317}
318
335 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
336{
337 uint16_t data = 0;
338 uint32_t timeout = 0;
339 if(nego == EMAC_AUTO_NEGOTIATION_ON)
340 {
341 do
342 {
343 timeout++;
344 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
345 {
346 return ERROR;
347 }
348 } while(!(data & PHY_LINKED_STATUS_BIT) && (timeout < PHY_TIMEOUT));
349
350 if(timeout == PHY_TIMEOUT)
351 {
352 return ERROR;
353 }
354
355 timeout = 0;
356
357 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_AUTO_NEGOTIATION_BIT) == ERROR)
358 {
359 return ERROR;
360 }
361
362
363 do
364 {
365 timeout++;
366 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
367 {
368 return ERROR;
369 }
370 } while(!(data & PHY_NEGO_COMPLETE_BIT) && (timeout < PHY_TIMEOUT));
371
372 if(timeout == PHY_TIMEOUT)
373 {
374 return ERROR;
375 }
376
377 if(emac_phy_register_read(PHY_ADDRESS, PHY_SPECIFIED_CS_REG, &data) == ERROR)
378 {
379 return ERROR;
380 }
381 #ifdef DM9162
382 if(data & PHY_FULL_DUPLEX_100MBPS_BIT)
383 {
384 emac_fast_speed_set(EMAC_SPEED_100MBPS);
385 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
386 }
387 else if(data & PHY_HALF_DUPLEX_100MBPS_BIT)
388 {
389 emac_fast_speed_set(EMAC_SPEED_100MBPS);
390 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
391 }
392 else if(data & PHY_FULL_DUPLEX_10MBPS_BIT)
393 {
394 emac_fast_speed_set(EMAC_SPEED_10MBPS);
395 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
396 }
397 else if(data & PHY_HALF_DUPLEX_10MBPS_BIT)
398 {
399 emac_fast_speed_set(EMAC_SPEED_10MBPS);
400 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
401 }
402 #else
403 if(data & PHY_DUPLEX_MODE)
404 {
405 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
406 }
407 else
408 {
409 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
410 }
411 if(data & PHY_SPEED_MODE)
412 {
413 emac_fast_speed_set(EMAC_SPEED_10MBPS);
414 }
415 else
416 {
417 emac_fast_speed_set(EMAC_SPEED_100MBPS);
418 }
419 #endif
420 }
421 else
422 {
423 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, (uint16_t)((mode << 8) | (speed << 13))) == ERROR)
424 {
425 return ERROR;
426 }
427 if(speed == EMAC_SPEED_100MBPS)
428 {
429 emac_fast_speed_set(EMAC_SPEED_100MBPS);
430 }
431 else
432 {
433 emac_fast_speed_set(EMAC_SPEED_10MBPS);
434 }
435 if(mode == EMAC_FULL_DUPLEX)
436 {
437 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
438 }
439 else
440 {
441 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
442 }
443 }
444
445 return SUCCESS;
446}
447
453 error_status emac_phy_init(emac_control_config_type *control_para)
454{
455 emac_clock_range_set();
456 if(emac_phy_register_reset() == ERROR)
457 {
458 return ERROR;
459 }
460
461 emac_control_config(control_para);
462 return SUCCESS;
463}
464
470uint16_t link_update(void)
471{
472 uint16_t link_data, link_state;
473 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &link_data) == ERROR)
474 {
475 return ERROR;
476 }
477
478 link_state = (link_data & PHY_LINKED_STATUS_BIT)>>2;
479 return link_state;
480}
481
487void ethernetif_set_link(void const *argument)
488{
489 uint16_t regvalue = 0;
490 struct netif *netif = (struct netif *)argument;
491
492 /* read phy_bsr*/
493 regvalue = link_update();
494
495 /* check whether the netif link down and the phy link is up */
496 if(!netif_is_link_up(netif) && (regvalue))
497 {
498 /* network cable is connected */
499 netif_set_link_up(netif);
500 }
501 else if(netif_is_link_up(netif) && (!regvalue))
502 {
503 /* network cable is dis-connected */
504 netif_set_link_down(netif);
505 }
506}
507
513void ethernetif_notify_conn_changed(struct netif *netif)
514{
515 /* note : this is function could be implemented in user file
516 when the callback is needed,
517 */
518
519 if (netif_is_link_up(netif)) {
520 netif_set_up(netif);
521
522#if LWIP_DHCP
523 /* creates a new dhcp client for this interface on the first call.
524 note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
525 the predefined regular intervals after starting the client.
526 you can peek in the netif->dhcp struct for the actual dhcp status.*/
527 dhcp_start(netif);
528#endif
529 }
530 else
531 netif_set_down(netif);
532}
533
540void ethernetif_update_config(struct netif *netif)
541{
542 if(netif_is_link_up(netif))
543 {
544 emac_speed_config(mac_control_para.auto_nego, mac_control_para.duplex_mode, mac_control_para.fast_ethernet_speed);
545
546 delay_ms(300);
547 /* enable mac and dma transmission and reception */
548 emac_start();
549 }
550 else
551 {
552 /* disable mac and dma transmission and reception */
553 emac_stop();
554 }
555
556 ethernetif_notify_conn_changed(netif);
557}
558
564void emac_tmr_init(void)
565{
566 crm_clocks_freq_type crm_clocks_freq_struct = {0};
567 crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
568
569 crm_clocks_freq_get(&crm_clocks_freq_struct);
570 /* tmr1 configuration */
571 /* time base configuration */
572 /* systemclock/24000/100 = 100hz */
573 tmr_base_init(TMR6, 99, (crm_clocks_freq_struct.ahb_freq / 10000) - 1);
574 tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
575
576 /* overflow interrupt enable */
577 tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
578
579 /* tmr1 overflow interrupt nvic init */
580 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
581 nvic_irq_enable(TMR6_DAC_GLOBAL_IRQn, 0, 0);
582 tmr_counter_enable(TMR6, TRUE);
583}
584
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
PHY_AUTO_NEGOTIATION_BIT
#define PHY_AUTO_NEGOTIATION_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:64
PHY_RESET_BIT
#define PHY_RESET_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:66
PHY_ADDRESS
#define PHY_ADDRESS
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:59
PHY_FULL_DUPLEX_10MBPS_BIT
#define PHY_FULL_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:73
PHY_FULL_DUPLEX_100MBPS_BIT
#define PHY_FULL_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:71
PHY_SPECIFIED_CS_REG
#define PHY_SPECIFIED_CS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:62
PHY_CONTROL_REG
#define PHY_CONTROL_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:60
PHY_NEGO_COMPLETE_BIT
#define PHY_NEGO_COMPLETE_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:69
PHY_HALF_DUPLEX_100MBPS_BIT
#define PHY_HALF_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:72
PHY_STATUS_REG
#define PHY_STATUS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:61
PHY_LINKED_STATUS_BIT
#define PHY_LINKED_STATUS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:68
PHY_HALF_DUPLEX_10MBPS_BIT
#define PHY_HALF_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:74
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR6_PERIPH_CLOCK
@ CRM_TMR6_PERIPH_CLOCK
Definition: at32f435_437_crm.h:132
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_GPIOE_PERIPH_CLOCK
@ CRM_GPIOE_PERIPH_CLOCK
Definition: at32f435_437_crm.h:109
CRM_CLKOUT_DIV1_5
@ CRM_CLKOUT_DIV1_5
Definition: at32f435_437_crm.h:729
CRM_CLKOUT_DIV2_2
@ CRM_CLKOUT_DIV2_2
Definition: at32f435_437_crm.h:738
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:80
reset_phy
static void reset_phy(void)
reset layer 1
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:261
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:513
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:205
mac_control_para
emac_control_config_type mac_control_para
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:40
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:540
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:564
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:70
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32_emac.c:335
emac_dma_software_reset_set
void emac_dma_software_reset_set(void)
reset emac dma
Definition: at32f435_437_emac.c:156
emac_control_para_init
void emac_control_para_init(emac_control_config_type *control_para)
initialize emac control structure
Definition: at32f435_437_emac.c:70
emac_dma_software_reset_get
flag_status emac_dma_software_reset_get(void)
get emac dma reset status
Definition: at32f435_437_emac.c:166
emac_control_config
void emac_control_config(emac_control_config_type *control_struct)
configure emac control setting.
Definition: at32f435_437_emac.c:136
emac_phy_register_read
error_status emac_phy_register_read(uint8_t address, uint8_t reg, uint16_t *data)
read phy data
Definition: at32f435_437_emac.c:262
emac_reset
void emac_reset(void)
deinitialize the emac peripheral registers to their default reset values.
Definition: at32f435_437_emac.c:59
emac_start
void emac_start(void)
enable emac and dma reception/transmission
Definition: at32f435_437_emac.c:183
emac_duplex_mode_set
void emac_duplex_mode_set(emac_duplex_type duplex_mode)
set duplex mode.
Definition: at32f435_437_emac.c:463
emac_fast_speed_set
void emac_fast_speed_set(emac_speed_type speed)
set mac fast emac speed.
Definition: at32f435_437_emac.c:450
emac_clock_range_set
void emac_clock_range_set(void)
according to hclk to set mdc clock frequency.
Definition: at32f435_437_emac.c:93
emac_dma_interrupt_enable
void emac_dma_interrupt_enable(emac_dma_interrupt_type it, confirm_state new_state)
enable dma interrupt
Definition: at32f435_437_emac.c:1497
emac_dma_para_init
void emac_dma_para_init(emac_dma_config_type *control_para)
init emac dma parameters
Definition: at32f435_437_emac.c:1073
emac_phy_register_write
error_status emac_phy_register_write(uint8_t address, uint8_t reg, uint16_t data)
write phy data.
Definition: at32f435_437_emac.c:232
emac_dma_config
void emac_dma_config(emac_dma_config_type *control_para)
configure emac dma
Definition: at32f435_437_emac.c:1099
emac_stop
void emac_stop(void)
stop emac and dma reception/transmission
Definition: at32f435_437_emac.c:206
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
EMAC_HALF_DUPLEX
@ EMAC_HALF_DUPLEX
Definition: at32f435_437_emac.h:303
EMAC_FULL_DUPLEX
@ EMAC_FULL_DUPLEX
Definition: at32f435_437_emac.h:304
EMAC_DMA_PBL_32
@ EMAC_DMA_PBL_32
Definition: at32f435_437_emac.h:427
EMAC_SPEED_10MBPS
@ EMAC_SPEED_10MBPS
Definition: at32f435_437_emac.h:312
EMAC_SPEED_100MBPS
@ EMAC_SPEED_100MBPS
Definition: at32f435_437_emac.h:313
EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
@ EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
Definition: at32f435_437_emac.h:527
EMAC_DMA_INTERRUPT_RX
@ EMAC_DMA_INTERRUPT_RX
Definition: at32f435_437_emac.h:519
EMAC_AUTO_NEGOTIATION_ON
@ EMAC_AUTO_NEGOTIATION_ON
Definition: at32f435_437_emac.h:284
EMAC_DMA_2_RX_1_TX
@ EMAC_DMA_2_RX_1_TX
Definition: at32f435_437_emac.h:412
PHY_TIMEOUT
#define PHY_TIMEOUT
Definition: at32f435_437_emac.h:47
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_0
@ GPIO_MUX_0
Definition: at32f435_437_gpio.h:156
GPIO_MUX_11
@ GPIO_MUX_11
Definition: at32f435_437_gpio.h:167
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
GPIOE
#define GPIOE
Definition: at32f435_437_gpio.h:525
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_emac_interface_set
void scfg_emac_interface_set(scfg_emac_interface_type mode)
scfg emac interface set
Definition: at32f435_437_scfg.c:113
SCFG_EMAC_SELECT_MII
@ SCFG_EMAC_SELECT_MII
Definition: at32f435_437_scfg.h:139
SCFG_EMAC_SELECT_RMII
@ SCFG_EMAC_SELECT_RMII
Definition: at32f435_437_scfg.h:140
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
TMR6_DAC_GLOBAL_IRQn
@ TMR6_DAC_GLOBAL_IRQn
Definition: at32f435_437.h:202
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::ahb_freq
uint32_t ahb_freq
Definition: at32f435_437_crm.h:790
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588
emac_control_config_type::auto_nego
emac_auto_negotiation_type auto_nego
Definition: at32f435_437_emac.h:589
emac_control_config_type::fast_ethernet_speed
emac_speed_type fast_ethernet_speed
Definition: at32f435_437_emac.h:598
emac_control_config_type::duplex_mode
emac_duplex_type duplex_mode
Definition: at32f435_437_emac.h:595
emac_dma_config_type
ethernet mac dma config type
Definition: at32f435_437_emac.h:609
emac_dma_config_type::tx_dma_pal
emac_dma_pbl_type tx_dma_pal
Definition: at32f435_437_emac.h:614
emac_dma_config_type::aab_enable
confirm_state aab_enable
Definition: at32f435_437_emac.h:610
emac_dma_config_type::rx_dma_pal
emac_dma_pbl_type rx_dma_pal
Definition: at32f435_437_emac.h:612
emac_dma_config_type::flush_rx_disable
confirm_state flush_rx_disable
Definition: at32f435_437_emac.h:620
emac_dma_config_type::priority_ratio
emac_dma_rx_tx_ratio_type priority_ratio
Definition: at32f435_437_emac.h:617
emac_dma_config_type::osf_enable
confirm_state osf_enable
Definition: at32f435_437_emac.h:626
emac_dma_config_type::usp_enable
confirm_state usp_enable
Definition: at32f435_437_emac.h:611
emac_dma_config_type::rsf_enable
confirm_state rsf_enable
Definition: at32f435_437_emac.h:619
emac_dma_config_type::tsf_enable
confirm_state tsf_enable
Definition: at32f435_437_emac.h:621
emac_dma_config_type::fb_enable
confirm_state fb_enable
Definition: at32f435_437_emac.h:613
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • src
Functions
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28

Definition in file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • src
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_clock.c
Go to the documentation of this file.
1
10/* includes ------------------------------------------------------------------*/
11#include "at32f435_437_clock.h"
12
32void system_clock_config(void)
33{
34 /* enable pwc periph clock */
35 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
36
37 /* config ldo voltage */
38 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
39
40 /* set the flash clock divider */
41 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
42
43 /* reset crm */
44 crm_reset();
45
46 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
47
48 /* wait till hext is ready */
49 while(crm_hext_stable_wait() == ERROR)
50 {
51 }
52
53 /* config pll clock resource */
54 crm_pll_config(CRM_PLL_SOURCE_HEXT, 125, 1, CRM_PLL_FR_4);
55
56 /* enable pll */
57 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
58
59 /* wait till pll is ready */
60 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
61 {
62 }
63
64 /* config ahbclk */
65 crm_ahb_div_set(CRM_AHB_DIV_1);
66
67 /* config apb2clk */
68 crm_apb2_div_set(CRM_APB2_DIV_2);
69
70 /* config apb1clk */
71 crm_apb1_div_set(CRM_APB1_DIV_2);
72
73 /* enable auto step mode */
74 crm_auto_step_mode_enable(TRUE);
75
76 /* select pll as system clock source */
77 crm_sysclk_switch(CRM_SCLK_PLL);
78
79 /* wait till pll is used as system clock source */
80 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
81 {
82 }
83
84 /* disable auto step mode */
85 crm_auto_step_mode_enable(FALSE);
86
87 /* update system_core_clock global variable */
88 system_core_clock_update();
89}
90
system_clock_config
void system_clock_config(void)
system clock config program
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_clock.c:32
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_4
@ CRM_PLL_FR_4
Definition: at32f435_437_crm.h:548
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • src
Functions
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "netconf.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR6_DAC_GLOBAL_IRQHandler (void)
this function handles timer6 overflow handler. More...
void | EMAC_IRQHandler (void)
this function handles emac handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28

Definition in file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c.

Function Documentation

◆ EMAC_IRQHandler()

void EMAC_IRQHandler ( void )

this function handles emac handler.

Parameters
none
Return values
none

< emac dma receive interrupt

< emac dma normal interrupt summary

Definition at line 131 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c.

◆ TMR6_DAC_GLOBAL_IRQHandler()

void TMR6_DAC_GLOBAL_IRQHandler ( void )

this function handles timer6 overflow handler.

Parameters
none
Return values
none

< tmr flag overflow

< tmr flag overflow

Definition at line 116 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • src
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c
Go to the documentation of this file.
1
10/* includes ------------------------------------------------------------------*/
11#include "at32f435_437_int.h"
12#include "netconf.h"
13
19void NMI_Handler(void)
20{
21}
22
28void HardFault_Handler(void)
29{
30 /* go to infinite loop when hard fault exception occurs */
31 while (1)
32 {
33 }
34}
35
41void MemManage_Handler(void)
42{
43 /* go to infinite loop when memory manage exception occurs */
44 while (1)
45 {
46 }
47}
48
54void BusFault_Handler(void)
55{
56 /* go to infinite loop when bus fault exception occurs */
57 while (1)
58 {
59 }
60}
61
67void UsageFault_Handler(void)
68{
69 /* go to infinite loop when usage fault exception occurs */
70 while (1)
71 {
72 }
73}
74
80void SVC_Handler(void)
81{
82}
83
89void DebugMon_Handler(void)
90{
91}
92
98void PendSV_Handler(void)
99{
100}
101
107void SysTick_Handler(void)
108{
109}
110
116void TMR6_DAC_GLOBAL_IRQHandler(void)
117{
118 if(tmr_flag_get(TMR6, TMR_OVF_FLAG) != RESET)
119 {
120 /* Update the local_time by adding SYSTEMTICK_PERIOD_MS each SysTick interrupt */
121 time_update();
122 tmr_flag_clear(TMR6, TMR_OVF_FLAG);
123 }
124}
125
131void EMAC_IRQHandler(void)
132{
133 /* handles all the received frames */
134 while(emac_received_packet_size_get() != 0)
135 {
136 lwip_pkt_handle();
137 }
138
139 /* clear the emac dma rx it pending bits */
140 emac_dma_flag_clear(EMAC_DMA_RI_FLAG);
141 emac_dma_flag_clear(EMAC_DMA_NIS_FLAG);
142}
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:67
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:28
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:41
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:80
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:98
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:19
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:54
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:107
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:89
emac_dma_flag_clear
void emac_dma_flag_clear(uint32_t dma_flag)
clear the emac dma flag.
Definition: at32f435_437_emac.c:2290
emac_received_packet_size_get
uint32_t emac_received_packet_size_get(void)
get the size of received the received packet.
Definition: at32f435_437_emac.c:1044
EMAC_DMA_RI_FLAG
#define EMAC_DMA_RI_FLAG
Definition: at32f435_437_emac.h:264
EMAC_DMA_NIS_FLAG
#define EMAC_DMA_NIS_FLAG
Definition: at32f435_437_emac.h:272
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
EMAC_IRQHandler
void EMAC_IRQHandler(void)
this function handles emac handler.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:131
TMR6_DAC_GLOBAL_IRQHandler
void TMR6_DAC_GLOBAL_IRQHandler(void)
this function handles timer6 overflow handler.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/at32f435_437_int.c:116
at32f435_437_int.h
header file of main interrupt service routines.


AT32F435/437 Firmwary Library: flash.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • src
Functions
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/flash.c File Reference

flash program More...

#include "flash.h"
#include "iap.h"

Go to the source code of this file.

Functions

void | flash_2kb_write (uint32_t write_addr, uint8_t *pbuffer)
flash erase/program operation. More...
flag_status | flash_upgrade_flag_read (void)
check flash upgrade flag. More...
uint32_t | flash_if_write (__IO uint32_t *flash_address, uint32_t *data, uint16_t data_length)
this function writes a data buffer in flash (data are 32-bit aligned). More...

Detailed Description

flash program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/flash.c.


AT32F435/437 Firmwary Library: flash.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • src
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/flash.c
Go to the documentation of this file.
1
27#include "flash.h"
28#include "iap.h"
29
44void flash_2kb_write(uint32_t write_addr, uint8_t *pbuffer)
45{
46 uint16_t index, write_data;
47 flash_unlock();
48 flash_sector_erase(write_addr);
49 if(FLASH_SIZE < 0x100) /* less than 256kb, 1kb/sector */
50 flash_sector_erase(write_addr + 0x400);
51 for(index = 0; index < 2048; index += 2)
52 {
53 write_data = (pbuffer[index+1] << 8) + pbuffer[index];
54 flash_halfword_program(write_addr, write_data);
55 write_addr += sizeof(uint16_t);
56 }
57 flash_lock();
58}
59
65 flag_status flash_upgrade_flag_read(void)
66{
67 if((*(uint32_t*)IAP_UPGRADE_FLAG_ADDR) == IAP_UPGRADE_FLAG)
68 return SET;
69 else
70 return RESET;
71}
72
83uint32_t flash_if_write(__IO uint32_t* flash_address, uint32_t* data ,uint16_t data_length)
84{
85 uint32_t i = 0;
86
87 for (i = 0; (i < data_length) && (*flash_address <= (USER_FLASH_END_ADDRESS - 4)); i++)
88 {
89 /* device voltage range supposed to be [2.7v to 3.6v], the operation will
90 be done by word */
91 if (flash_word_program(*flash_address, *(uint32_t*)(data + i)) == FLASH_OPERATE_DONE)
92 {
93 /* check the written value */
94 if (*(uint32_t*)*flash_address != *(uint32_t*)(data + i))
95 {
96 /* flash content doesn't match sram content */
97 return(2);
98 }
99 /* increment flash destination address */
100 *flash_address += 4;
101 }
102 else
103 {
104 /* error occurred while writing data in flash memory */
105 return (1);
106 }
107 }
108
109 return (0);
110}
111
flash_2kb_write
void flash_2kb_write(uint32_t write_addr, uint8_t *pbuffer)
flash erase/program operation.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/flash.c:44
flash_if_write
uint32_t flash_if_write(__IO uint32_t *flash_address, uint32_t *data, uint16_t data_length)
this function writes a data buffer in flash (data are 32-bit aligned).
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/flash.c:83
flash_upgrade_flag_read
flag_status flash_upgrade_flag_read(void)
check flash upgrade flag.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/flash.c:65
flag_status
flag_status
Definition: at32f435_437.h:378
RESET
@ RESET
Definition: at32f435_437.h:378
SET
@ SET
Definition: at32f435_437.h:378
flash_sector_erase
flash_status_type flash_sector_erase(uint32_t sector_address)
erase a specified flash sector.
Definition: at32f435_437_flash.c:357
flash_halfword_program
flash_status_type flash_halfword_program(uint32_t address, uint16_t data)
program a halfword at a specified address.
Definition: at32f435_437_flash.c:643
flash_unlock
void flash_unlock(void)
unlock the flash controller.
Definition: at32f435_437_flash.c:290
flash_word_program
flash_status_type flash_word_program(uint32_t address, uint32_t data)
program a word at a specified address.
Definition: at32f435_437_flash.c:608
flash_lock
void flash_lock(void)
lock the flash controller.
Definition: at32f435_437_flash.c:325
FLASH_OPERATE_DONE
@ FLASH_OPERATE_DONE
Definition: at32f435_437_flash.h:203
IAP_UPGRADE_FLAG_ADDR
#define IAP_UPGRADE_FLAG_ADDR
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/inc/iap.h:52
IAP_UPGRADE_FLAG
#define IAP_UPGRADE_FLAG
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/inc/iap.h:64
USER_FLASH_END_ADDRESS
#define USER_FLASH_END_ADDRESS
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/inc/flash.h:50
FLASH_SIZE
#define FLASH_SIZE
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/inc/flash.h:49


AT32F435/437 Firmwary Library: main.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • src
Functions | Variables
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "at32_emac.h"
#include "netconf.h"
#include "flash.h"
#include "iap.h"
#include "tmr.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

volatile uint32_t local_time = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • src
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "at32_emac.h"
30#include "netconf.h"
31#include "flash.h"
32#include "iap.h"
33#include "tmr.h"
34
43volatile uint32_t local_time = 0;
44
50int main(void)
51{
52 error_status status;
53 /* config vector table offset */
54 nvic_vector_table_set(NVIC_VECTTAB_FLASH, 0x10000);
55
56 system_clock_config();
57 at32_board_init();
58
59 /* config nvic priority group */
60 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
61
62 delay_init();
63
64 /* check and clear iap_upgrade_flag flag */
65 iap_init();
66
67 status = emac_system_init();
68
69 while(status == ERROR);
70
71 tcpip_stack_init();
72
73 tmr_init();
74
75 while(1)
76 {
77 lwip_periodic_handle(local_time);
78 }
79}
80
at32f435_437_board.h
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
delay_init
void delay_init()
initialize delay function
Definition: at32f435_437_board.c:293
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
main
int main(void)
main function.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/main.c:50
local_time
volatile uint32_t local_time
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/main.c:43
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
iap_init
void iap_init(void)
iap init.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/iap.c:61
tmr_init
void tmr_init(void)
init tmr.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/tmr.c:44
nvic_vector_table_set
void nvic_vector_table_set(uint32_t base, uint32_t offset)
set the vector table location and offset.
Definition: at32f435_437_misc.c:112
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
NVIC_VECTTAB_FLASH
#define NVIC_VECTTAB_FLASH
Definition: at32f435_437_misc.h:52
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: netconf.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • src
Macros | Functions | Variables
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c File Reference

network connection configuration More...

#include "lwip/memp.h"
#include "lwip/tcp.h"
#include "lwip/priv/tcp_priv.h"
#include "lwip/udp.h"
#include "netif/etharp.h"
#include "lwip/dhcp.h"
#include "ethernetif.h"
#include "netconf.h"
#include "stdio.h"
#include "at32_emac.h"

Go to the source code of this file.

Macros

#define | MAC_ADDR_LENGTH (6)
#define | ADDR_LENGTH (4)
#define | SYSTEMTICK_PERIOD_MS 10

Functions

void | tcpip_stack_init (void)
Initializes the lwIP stack. More...
void | lwip_pkt_handle (void)
Called when a frame is received. More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
LwIP periodic tasks. More...

Variables

volatile uint32_t | local_time
struct netif | netif
volatile uint32_t | tcp_timer = 0
volatile uint32_t | arp_timer = 0
volatile uint32_t | link_timer = 0
static uint8_t | mac_address [(6)] = {0, 0, 0x44, 0x45, 0x56, 1}
static uint8_t | local_ip [(4)] = {192, 168, 81, 37}
static uint8_t | local_gw [(4)] = {192, 168, 81, 187}
static uint8_t | local_mask [(4)] = {255, 255, 255, 0}

Detailed Description

network connection configuration

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c.

Macro Definition Documentation

◆ ADDR_LENGTH

#define ADDR_LENGTH (4)

Definition at line 42 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c.

◆ MAC_ADDR_LENGTH

#define MAC_ADDR_LENGTH (6)

Definition at line 41 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c.

◆ SYSTEMTICK_PERIOD_MS

#define SYSTEMTICK_PERIOD_MS 10

Definition at line 43 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c.

Variable Documentation

◆ arp_timer

volatile uint32_t arp_timer = 0

Definition at line 48 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c.

Referenced by lwip_periodic_handle().

◆ link_timer

volatile uint32_t link_timer = 0

Definition at line 49 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c.

Referenced by lwip_periodic_handle().

◆ local_gw

uint8_t local_gw[(4)] = {192, 168, 81, 187}
static

Definition at line 57 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c.

Referenced by tcpip_stack_init().

◆ local_ip

uint8_t local_ip[(4)] = {192, 168, 81, 37}
static

Definition at line 56 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c.

Referenced by tcpip_stack_init().

◆ local_mask

uint8_t local_mask[(4)] = {255, 255, 255, 0}
static

Definition at line 58 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c.

Referenced by tcpip_stack_init().

◆ mac_address

uint8_t mac_address[(6)] = {0, 0, 0x44, 0x45, 0x56, 1}
static

Definition at line 51 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c.

Referenced by tcpip_stack_init().

◆ netif

struct netif netif

Definition at line 46 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c.

Referenced by lwip_periodic_handle(), lwip_pkt_handle(), and tcpip_stack_init().

◆ tcp_timer

volatile uint32_t tcp_timer = 0

Definition at line 47 of file utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c.

Referenced by lwip_periodic_handle().


AT32F435/437 Firmwary Library: netconf.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • app_led3_toggle
  • src
utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c
Go to the documentation of this file.
1
27/* Includes ------------------------------------------------------------------*/
28#include "lwip/memp.h"
29#include "lwip/tcp.h"
30#include "lwip/priv/tcp_priv.h"
31#include "lwip/udp.h"
32#include "netif/etharp.h"
33#include "lwip/dhcp.h"
34#include "ethernetif.h"
35#include "netconf.h"
36#include "stdio.h"
37#include "at32_emac.h"
38
39/* Private define ------------------------------------------------------------*/
40/* Private macro -------------------------------------------------------------*/
41#define MAC_ADDR_LENGTH (6)
42#define ADDR_LENGTH (4)
43#define SYSTEMTICK_PERIOD_MS 10
44/* Private variables ---------------------------------------------------------*/
45extern volatile uint32_t local_time;
46struct netif netif;
47volatile uint32_t tcp_timer = 0;
48volatile uint32_t arp_timer = 0;
49volatile uint32_t link_timer = 0;
50
51static uint8_t mac_address[MAC_ADDR_LENGTH] = {0, 0, 0x44, 0x45, 0x56, 1};;
52#if LWIP_DHCP
53volatile uint32_t dhcp_fine_timer = 0;
54volatile uint32_t dhcp_coarse_timer = 0;
55#else
56static uint8_t local_ip[ADDR_LENGTH] = {192, 168, 81, 37};
57static uint8_t local_gw[ADDR_LENGTH] = {192, 168, 81, 187};
58static uint8_t local_mask[ADDR_LENGTH] = {255, 255, 255, 0};
59#endif
60
61/* Private function prototypes -----------------------------------------------*/
62/* Private functions ---------------------------------------------------------*/
63
69void tcpip_stack_init(void)
70{
71 ip_addr_t ipaddr;
72 ip_addr_t netmask;
73 ip_addr_t gw;
74
75 /* Initializes the dynamic memory heap defined by MEM_SIZE.*/
76 mem_init();
77
78 /* Initializes the memory pools defined by MEMP_NUM_x.*/
79 memp_init();
80
81
82#if LWIP_DHCP //need DHCP server
83 ipaddr.addr = 0;
84 netmask.addr = 0;
85 gw.addr = 0;
86
87#else
88 IP4_ADDR(&ipaddr, local_ip[0], local_ip[1], local_ip[2], local_ip[3]);
89 IP4_ADDR(&netmask, local_mask[0], local_mask[1], local_mask[2], local_mask[3]);
90 IP4_ADDR(&gw, local_gw[0], local_gw[1], local_gw[2], local_gw[3]);
91#endif
92
93 lwip_set_mac_address(mac_address);
94
95 /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
96 struct ip_addr *netmask, struct ip_addr *gw,
97 void *state, err_t (* init)(struct netif *netif),
98 err_t (* input)(struct pbuf *p, struct netif *netif))
99
100 Adds your network interface to the netif_list. Allocate a struct
101 netif and pass a pointer to this structure as the first argument.
102 Give pointers to cleared ip_addr structures when using DHCP,
103 or fill them with sane numbers otherwise. The state pointer may be NULL.
104
105 The init function pointer must point to a initialization function for
106 your ethernet netif interface. The following code illustrates it's use.*/
107
108 if(netif_add(&netif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &netif_input) == NULL)
109 {
110 while(1);
111 }
112
113 /* Registers the default network interface.*/
114 netif_set_default(&netif);
115
116 /* When the netif is fully configured this function must be called.*/
117 netif_set_up(&netif);
118
119 /* Set the link callback function, this function is called on change of link status*/
120 netif_set_link_callback(&netif, ethernetif_update_config);
121}
122
128void lwip_pkt_handle(void)
129{
130 /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */
131 if(ethernetif_input(&netif) != ERR_OK)
132 {
133 while(1);
134 }
135}
136
142void time_update(void)
143{
144 local_time += SYSTEMTICK_PERIOD_MS;
145}
146
152void lwip_periodic_handle(volatile uint32_t localtime)
153{
154
155 /* TCP periodic process every 250 ms */
156 if (localtime - tcp_timer >= TCP_TMR_INTERVAL)
157 {
158 tcp_timer = localtime;
159 tcp_tmr();
160 }
161 /* ARP periodic process every 5s */
162 if (localtime - arp_timer >= ARP_TMR_INTERVAL)
163 {
164 arp_timer = localtime;
165 etharp_tmr();
166 }
167
168#if LWIP_DHCP
169 /* Fine DHCP periodic process every 500ms */
170 if (localtime - dhcp_fine_timer >= DHCP_FINE_TIMER_MSECS)
171 {
172 dhcp_fine_timer = localtime;
173 dhcp_fine_tmr();
174 }
175 /* DHCP Coarse periodic process every 60s */
176 if (localtime - dhcp_coarse_timer >= DHCP_COARSE_TIMER_MSECS)
177 {
178 dhcp_coarse_timer = localtime;
179 dhcp_coarse_tmr();
180 }
181#endif
182
183#if (LINK_DETECTION > 0)
184 /* link detection process every 500 ms */
185 if (localtime - link_timer >= 500)
186 {
187 link_timer = localtime;
188 ethernetif_set_link(&netif);
189 }
190#endif
191}
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:49
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
lwip_pkt_handle
void lwip_pkt_handle(void)
Called when a frame is received.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:128
tcpip_stack_init
void tcpip_stack_init(void)
Initializes the lwIP stack.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:69
time_update
void time_update(void)
updates the system local time
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:142
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
LwIP periodic tasks.
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:152
local_mask
static uint8_t local_mask[(4)]
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:58
link_timer
volatile uint32_t link_timer
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:49
local_gw
static uint8_t local_gw[(4)]
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:57
ADDR_LENGTH
#define ADDR_LENGTH
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:42
arp_timer
volatile uint32_t arp_timer
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:48
MAC_ADDR_LENGTH
#define MAC_ADDR_LENGTH
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:41
SYSTEMTICK_PERIOD_MS
#define SYSTEMTICK_PERIOD_MS
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:43
netif
struct netif netif
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:46
tcp_timer
volatile uint32_t tcp_timer
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:47
local_ip
static uint8_t local_ip[(4)]
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:56
mac_address
static uint8_t mac_address[(6)]
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/netconf.c:51


AT32F435/437 Firmwary Library: at32_emac.h File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
Macros | Functions
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/at32_emac.h File Reference

header file of emac config program. More...

#include "at32f435_437.h"
#include "netif.h"

Go to the source code of this file.

Macros

#define | RX_REMAP (1)
#define | CRYSTAL_ON_PHY (0)
#define | RMII_MODE
#define | DM9162
#define | LINK_DETECTION (1)
#define | PHY_ADDRESS (0x03)
#define | PHY_CONTROL_REG (0x00)
#define | PHY_STATUS_REG (0x01)
#define | PHY_SPECIFIED_CS_REG (0x11)
#define | PHY_AUTO_NEGOTIATION_BIT (0x1000)
#define | PHY_LOOPBACK_BIT (0x4000)
#define | PHY_RESET_BIT (0x8000)
#define | PHY_LINKED_STATUS_BIT (0x0004)
#define | PHY_NEGO_COMPLETE_BIT (0x0020)
#define | PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
#define | PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
#define | PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
#define | PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Detailed Description

header file of emac config program.

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/at32_emac.h.


AT32F435/437 Firmwary Library: at32_emac.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/at32_emac.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32_EMAC_H
29#define __AT32_EMAC_H
30
31#ifdef __cplusplus
32 extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37#include "netif.h"
38
51#define RX_REMAP (1)
52#define CRYSTAL_ON_PHY (0)
53
54//#define MII_MODE
55#define RMII_MODE
56
57#define DM9162
58//#define DP83848
59
60#define LINK_DETECTION (1)
62#if defined (DM9162)
63 #define PHY_ADDRESS (0x03)
64 #define PHY_CONTROL_REG (0x00)
65 #define PHY_STATUS_REG (0x01)
66 #define PHY_SPECIFIED_CS_REG (0x11)
67 /* phy control register */
68 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
69 #define PHY_LOOPBACK_BIT (0x4000)
70 #define PHY_RESET_BIT (0x8000)
71 /* phy status register */
72 #define PHY_LINKED_STATUS_BIT (0x0004)
73 #define PHY_NEGO_COMPLETE_BIT (0x0020)
74 /* phy specified control/status register */
75 #define PHY_FULL_DUPLEX_100MBPS_BIT (0x8000)
76 #define PHY_HALF_DUPLEX_100MBPS_BIT (0x4000)
77 #define PHY_FULL_DUPLEX_10MBPS_BIT (0x2000)
78 #define PHY_HALF_DUPLEX_10MBPS_BIT (0x1000)
79#elif defined (DP83848)
80 #define PHY_ADDRESS (0x01)
81 #define PHY_CONTROL_REG (0x00)
82 #define PHY_STATUS_REG (0x01)
83 #define PHY_SPECIFIED_CS_REG (0x10)
84 /* phy control register */
85 #define PHY_AUTO_NEGOTIATION_BIT (0x1000)
86 #define PHY_LOOPBACK_BIT (0x4000)
87 #define PHY_RESET_BIT (0x8000)
88 /* phy status register */
89 #define PHY_LINKED_STATUS_BIT (0x0004)
90 #define PHY_NEGO_COMPLETE_BIT (0x0020)
92 #define PHY_DUPLEX_MODE (0x0002)
93 #define PHY_SPEED_MODE (0x0001) `
94#endif
95
104 error_status emac_system_init(void);
105void emac_nvic_configuration(void);
106void emac_pins_configuration(void);
107 error_status emac_layer2_configuration(void);
108void static reset_phy(void);
109 error_status emac_phy_register_reset(void);
110 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed);
111 error_status emac_phy_init(emac_control_config_type *control_para);
112
113uint16_t link_update(void);
114void ethernetif_set_link(void const *argument);
115void ethernetif_notify_conn_changed(struct netif *netif);
116void ethernetif_update_config(struct netif *netif);
117void emac_tmr_init(void);
118
131#ifdef __cplusplus
132}
133#endif
134
135#endif
at32f435_437.h
at32f435_437 header file
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:80
reset_phy
static void reset_phy(void)
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:523
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:470
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:205
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:574
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:70
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:335
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
error_status
error_status
Definition: at32f435_437.h:380
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588


AT32F435/437 Firmwary Library: at32f435_437_clock.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/at32f435_437_clock.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_CLOCK_H
29#define __AT32F435_437_CLOCK_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported functions ------------------------------------------------------- */
39void system_clock_config(void);
40
41#ifdef __cplusplus
42}
43#endif
44
45#endif
46
at32f435_437.h
at32f435_437 header file
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c:49


AT32F435/437 Firmwary Library: at32f435_437_conf.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/at32f435_437_conf.h
Go to the documentation of this file.
1
10/* define to prevent recursive inclusion -------------------------------------*/
11#ifndef __AT32F435_437_CONF_H
12#define __AT32F435_437_CONF_H
13
14#ifdef __cplusplus
15extern "C" {
16#endif
17
18#if defined (__CC_ARM)
19 #pragma anon_unions
20#endif
21
28#if !defined HEXT_VALUE
29#define HEXT_VALUE ((uint32_t)8000000)
30#endif
31
36#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000)
37#define HICK_VALUE ((uint32_t)8000000)
39/* module define -------------------------------------------------------------*/
40#define CRM_MODULE_ENABLED
41#define TMR_MODULE_ENABLED
42#define ERTC_MODULE_ENABLED
43#define GPIO_MODULE_ENABLED
44#define I2C_MODULE_ENABLED
45#define USART_MODULE_ENABLED
46#define PWC_MODULE_ENABLED
47#define CAN_MODULE_ENABLED
48#define ADC_MODULE_ENABLED
49#define DAC_MODULE_ENABLED
50#define SPI_MODULE_ENABLED
51#define EDMA_MODULE_ENABLED
52#define DMA_MODULE_ENABLED
53#define DEBUG_MODULE_ENABLED
54#define FLASH_MODULE_ENABLED
55#define CRC_MODULE_ENABLED
56#define WWDT_MODULE_ENABLED
57#define WDT_MODULE_ENABLED
58#define EXINT_MODULE_ENABLED
59#define SDIO_MODULE_ENABLED
60#define XMC_MODULE_ENABLED
61#define USB_MODULE_ENABLED
62#define ACC_MODULE_ENABLED
63#define MISC_MODULE_ENABLED
64#define QSPI_MODULE_ENABLED
65#define DVP_MODULE_ENABLED
66#define SCFG_MODULE_ENABLED
67#define EMAC_MODULE_ENABLED
68
69/* includes ------------------------------------------------------------------*/
70#ifdef CRM_MODULE_ENABLED
71#include "at32f435_437_crm.h"
72#endif
73#ifdef TMR_MODULE_ENABLED
74#include "at32f435_437_tmr.h"
75#endif
76#ifdef ERTC_MODULE_ENABLED
77#include "at32f435_437_ertc.h"
78#endif
79#ifdef GPIO_MODULE_ENABLED
80#include "at32f435_437_gpio.h"
81#endif
82#ifdef I2C_MODULE_ENABLED
83#include "at32f435_437_i2c.h"
84#endif
85#ifdef USART_MODULE_ENABLED
86#include "at32f435_437_usart.h"
87#endif
88#ifdef PWC_MODULE_ENABLED
89#include "at32f435_437_pwc.h"
90#endif
91#ifdef CAN_MODULE_ENABLED
92#include "at32f435_437_can.h"
93#endif
94#ifdef ADC_MODULE_ENABLED
95#include "at32f435_437_adc.h"
96#endif
97#ifdef DAC_MODULE_ENABLED
98#include "at32f435_437_dac.h"
99#endif
100#ifdef SPI_MODULE_ENABLED
101#include "at32f435_437_spi.h"
102#endif
103#ifdef DMA_MODULE_ENABLED
104#include "at32f435_437_dma.h"
105#endif
106#ifdef DEBUG_MODULE_ENABLED
107#include "at32f435_437_debug.h"
108#endif
109#ifdef FLASH_MODULE_ENABLED
110#include "at32f435_437_flash.h"
111#endif
112#ifdef CRC_MODULE_ENABLED
113#include "at32f435_437_crc.h"
114#endif
115#ifdef WWDT_MODULE_ENABLED
116#include "at32f435_437_wwdt.h"
117#endif
118#ifdef WDT_MODULE_ENABLED
119#include "at32f435_437_wdt.h"
120#endif
121#ifdef EXINT_MODULE_ENABLED
122#include "at32f435_437_exint.h"
123#endif
124#ifdef SDIO_MODULE_ENABLED
125#include "at32f435_437_sdio.h"
126#endif
127#ifdef XMC_MODULE_ENABLED
128#include "at32f435_437_xmc.h"
129#endif
130#ifdef ACC_MODULE_ENABLED
131#include "at32f435_437_acc.h"
132#endif
133#ifdef MISC_MODULE_ENABLED
134#include "at32f435_437_misc.h"
135#endif
136#ifdef EDMA_MODULE_ENABLED
137#include "at32f435_437_edma.h"
138#endif
139#ifdef QSPI_MODULE_ENABLED
140#include "at32f435_437_qspi.h"
141#endif
142#ifdef SCFG_MODULE_ENABLED
143#include "at32f435_437_scfg.h"
144#endif
145#ifdef EMAC_MODULE_ENABLED
146#include "at32f435_437_emac.h"
147#endif
148#ifdef DVP_MODULE_ENABLED
149#include "at32f435_437_dvp.h"
150#endif
151#ifdef USB_MODULE_ENABLED
152#include "at32f435_437_usb.h"
153#endif
154
155#ifdef __cplusplus
156}
157#endif
158
159#endif /* __AT32F435_437_CONF_H */
160
161
at32f435_437_acc.h
at32f435_437 acc header file
at32f435_437_adc.h
at32f435_437 adc header file
at32f435_437_can.h
at32f435_437 can header file
at32f435_437_crc.h
at32f435_437 crc header file
at32f435_437_crm.h
at32f435_437 crm header file
at32f435_437_dac.h
at32f435_437 dac header file
at32f435_437_debug.h
at32f435_437_dma.h
at32f435_437 dma header file
at32f435_437_dvp.h
at32f435_437 dvp header file
at32f435_437_edma.h
at32f435_437 edma header file
at32f435_437_emac.h
at32f435_437 eth header file
at32f435_437_ertc.h
at32f435_437 ertc header file
at32f435_437_exint.h
at32f435_437 exint header file
at32f435_437_flash.h
at32f435_437 flash header file
at32f435_437_gpio.h
at32f435_437 gpio header file
at32f435_437_i2c.h
at32f435_437 i2c header file
at32f435_437_misc.h
at32f435_437 misc header file
at32f435_437_pwc.h
at32f435_437 pwr header file
at32f435_437_qspi.h
at32f435_437 qspi header file
at32f435_437_scfg.h
at32f435_437 system config header file
at32f435_437_sdio.h
at32f435_437 sdio header file
at32f435_437_spi.h
at32f435_437 spi header file
at32f435_437_tmr.h
at32f435_437 tmr header file
at32f435_437_usart.h
at32f435_437 usart header file
at32f435_437_usb.h
at32f435_437 usb header file
at32f435_437_wdt.h
at32f435_437 wdt header file
at32f435_437_wwdt.h
at32f435_437 wwdt header file
at32f435_437_xmc.h
at32f435_437 xmc header file


AT32F435/437 Firmwary Library: at32f435_437_int.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/at32f435_437_int.h
Go to the documentation of this file.
1
27/* define to prevent recursive inclusion -------------------------------------*/
28#ifndef __AT32F435_437_INT_H
29#define __AT32F435_437_INT_H
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35/* includes ------------------------------------------------------------------*/
36#include "at32f435_437.h"
37
38/* exported types ------------------------------------------------------------*/
39/* exported constants --------------------------------------------------------*/
40/* exported macro ------------------------------------------------------------*/
41/* exported functions ------------------------------------------------------- */
42
43void NMI_Handler(void);
44void HardFault_Handler(void);
45void MemManage_Handler(void);
46void BusFault_Handler(void);
47void UsageFault_Handler(void);
48void SVC_Handler(void);
49void DebugMon_Handler(void);
50void PendSV_Handler(void);
51void SysTick_Handler(void);
52
53#ifdef __cplusplus
54}
55#endif
56
57#endif
58
at32f435_437.h
at32f435_437 header file
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:91
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:52
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:65
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:104
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:122
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:43
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:78
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:131
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c:113


AT32F435/437 Firmwary Library: flash.h File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
Macros | Functions
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/flash.h File Reference

flash header file More...

#include "at32f435_437_board.h"

Go to the source code of this file.

Macros

#define | SECTOR_SIZE_INDEX (((*(uint32_t*)0xE0042000) >> 12) & 0x07)
#define | FLASH_SIZE (*(uint32_t*)0x1FFFF7E0) /* read from at32 flash capacity register(unit:kbyte) */
#define | SRAM_SIZE 384 /* sram size, unit:kbyte */

Functions

void | flash_2kb_write (uint32_t write_addr, uint8_t *pbuffer)
flash erase/program operation. More...
uint32_t | flash_if_write (__IO uint32_t *flash_address, uint32_t *data, uint16_t data_length)
this function writes a data buffer in flash (data are 32-bit aligned). More...
flag_status | flash_upgrade_flag_read (void)
check flash upgrade flag. More...

Detailed Description

flash header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/flash.h.


AT32F435/437 Firmwary Library: flash.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/flash.h
Go to the documentation of this file.
1
27#ifndef __FLASH_H__
28#define __FLASH_H__
29
30#ifdef __cplusplus
31 extern "C" {
32#endif
33
34#include "at32f435_437_board.h"
35
48#define SECTOR_SIZE_INDEX (((*(uint32_t*)0xE0042000) >> 12) & 0x07)
49#define FLASH_SIZE (*(uint32_t*)0x1FFFF7E0) /* read from at32 flash capacity register(unit:kbyte) */
50#define SRAM_SIZE 384 /* sram size, unit:kbyte */
51
60void flash_2kb_write(uint32_t write_addr, uint8_t *pbuffer);
61uint32_t flash_if_write(__IO uint32_t* flash_address, uint32_t* data ,uint16_t data_length);
62 flag_status flash_upgrade_flag_read(void);
63
76#ifdef __cplusplus
77}
78#endif
79
80#endif
at32f435_437_board.h
flag_status
flag_status
Definition: at32f435_437.h:378
flash_2kb_write
void flash_2kb_write(uint32_t write_addr, uint8_t *pbuffer)
flash erase/program operation.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c:45
flash_if_write
uint32_t flash_if_write(__IO uint32_t *flash_address, uint32_t *data, uint16_t data_length)
this function writes a data buffer in flash (data are 32-bit aligned).
Definition: utilities/at32f437_emac_iap_demo/source_code/app_led3_toggle/src/flash.c:83
flash_upgrade_flag_read
flag_status flash_upgrade_flag_read(void)
check flash upgrade flag.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c:76


AT32F435/437 Firmwary Library: fsdata.h File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
Data Structures | Macros | Variables
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h File Reference

fsdata header file More...

Go to the source code of this file.

Data Structures

struct | fsdata_file
struct | fsdata_file_noconst

Macros

#define | FS_ROOT file_uploaddone_html
#define | FS_NUMFILES 4

Variables

const struct fsdata_file | file_index_html []
const struct fsdata_file | file_reset_html []
const struct fsdata_file | file_upload_html []
const struct fsdata_file | file_uploaddone_html []

Detailed Description

fsdata header file

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h.

Macro Definition Documentation

◆ FS_NUMFILES

#define FS_NUMFILES 4

Definition at line 35 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h.

◆ FS_ROOT

#define FS_ROOT file_uploaddone_html

Definition at line 34 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h.

Variable Documentation

◆ file_index_html

const struct fsdata_file file_index_html[]
extern

Definition at line 324 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.

◆ file_reset_html

const struct fsdata_file file_reset_html[]
extern

Definition at line 325 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.

◆ file_upload_html

const struct fsdata_file file_upload_html[]
extern

Definition at line 326 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.

◆ file_uploaddone_html

const struct fsdata_file file_uploaddone_html[]
extern

Definition at line 327 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.


AT32F435/437 Firmwary Library: fsdata.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h
Go to the documentation of this file.
1
27#ifndef __FSDATA_H__
28#define __FSDATA_H__
29
30#ifdef __cplusplus
31 extern "C" {
32#endif
33
34#define FS_ROOT file_uploaddone_html
35#define FS_NUMFILES 4
36
37struct fsdata_file {
38 const struct fsdata_file *next;
39 const char *name;
40 const char *data;
41 const int len;
42};
43
44struct fsdata_file_noconst {
45 struct fsdata_file *next;
46 char *name;
47 char *data;
48 int len;
49};
50
51extern const struct fsdata_file file_index_html[];
52extern const struct fsdata_file file_reset_html[];
53extern const struct fsdata_file file_upload_html[];
54extern const struct fsdata_file file_uploaddone_html[];
55
56#ifdef __cplusplus
57}
58#endif
59
60#endif /* __FSDATA_H__ */
fsdata_file_noconst
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:44
fsdata_file_noconst::len
int len
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:48
fsdata_file_noconst::next
struct fsdata_file * next
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:45
fsdata_file_noconst::data
char * data
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:47
fsdata_file_noconst::name
char * name
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:46
fsdata_file
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:37
fsdata_file::next
const struct fsdata_file * next
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:38
fsdata_file::data
const char * data
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:40
fsdata_file::len
const int len
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:41
fsdata_file::name
const char * name
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:39
file_upload_html
const struct fsdata_file file_upload_html[]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c:326
file_reset_html
const struct fsdata_file file_reset_html[]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c:325
file_index_html
const struct fsdata_file file_index_html[]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c:324
file_uploaddone_html
const struct fsdata_file file_uploaddone_html[]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c:327


AT32F435/437 Firmwary Library: lwipopts.h File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
Macros
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h File Reference

Go to the source code of this file.

Macros

#define | LWIP_IPV4 1
#define | NO_SYS 1
#define | SYS_LIGHTWEIGHT_PROT 0
#define | LWIP_NETCONN !NO_SYS
#define | LWIP_SOCKET !NO_SYS
#define | LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
#define | LWIP_NETBUF_RECVINFO 1
#define | LWIP_HAVE_LOOPIF 1
#define | LWIP_NETIF_LINK_CALLBACK 1
#define | LWIP_DNS 1
#define | DNS_DOES_NAME_CHECK 1
#define | LWIP_DHCP 0
#define | TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
#define | MEM_ALIGNMENT 4
#define | MEM_SIZE (20*1024)
#define | TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
#define | MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
#define | TCP_SND_BUF (2 * TCP_MSS)
#define | TCP_WND (2 * TCP_MSS)
#define | LWIP_WND_SCALE 0
#define | TCP_RCV_SCALE 0
#define | PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
#define | PBUF_POOL_BUFSIZE 2000
#define | LWIP_TCP 1
#define | TCP_TTL 255
#define | LWIP_IGMP 1
#define | LWIP_MDNS_RESPONDER 1
#define | LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
#define | ETHARP_SUPPORT_STATIC_ENTRIES 1
#define | MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
#define | MIB2_STATS 1
#define | LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */

Macro Definition Documentation

◆ DNS_DOES_NAME_CHECK

#define DNS_DOES_NAME_CHECK 1

Definition at line 56 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ ETHARP_SUPPORT_STATIC_ENTRIES

#define ETHARP_SUPPORT_STATIC_ENTRIES 1

Definition at line 91 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_DHCP

#define LWIP_DHCP 0

Definition at line 59 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_DNS

#define LWIP_DNS 1

Definition at line 55 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_HAVE_LOOPIF

#define LWIP_HAVE_LOOPIF 1

Definition at line 51 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_IGMP

#define LWIP_IGMP 1

Definition at line 86 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_IPV4

#define LWIP_IPV4 1

Definition at line 37 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_MDNS_RESPONDER

#define LWIP_MDNS_RESPONDER 1

Definition at line 87 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_MEM_ILLEGAL_FREE

#define LWIP_MEM_ILLEGAL_FREE ( msg ) /* to nothing */

Definition at line 102 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_NETBUF_RECVINFO

#define LWIP_NETBUF_RECVINFO 1

Definition at line 50 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_NETCONN

#define LWIP_NETCONN !NO_SYS

Definition at line 47 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_NETCONN_FULLDUPLEX

#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET

Definition at line 49 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_NETIF_LINK_CALLBACK

#define LWIP_NETIF_LINK_CALLBACK 1

Definition at line 54 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_NUM_NETIF_CLIENT_DATA

#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)

Definition at line 88 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_SOCKET

#define LWIP_SOCKET !NO_SYS

Definition at line 48 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_TCP

#define LWIP_TCP 1

Definition at line 82 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ LWIP_WND_SCALE

#define LWIP_WND_SCALE 0

Definition at line 74 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ MEM_ALIGNMENT

#define MEM_ALIGNMENT 4

Definition at line 68 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ MEM_SIZE

#define MEM_SIZE (20*1024)

Definition at line 69 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ MEMP_NUM_SYS_TIMEOUT

#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)

Definition at line 93 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ MEMP_NUM_TCP_SEG

#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN

Definition at line 71 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ MIB2_STATS

#define MIB2_STATS 1

Definition at line 96 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ NO_SYS

#define NO_SYS 1

Definition at line 45 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ PBUF_POOL_BUFSIZE

#define PBUF_POOL_BUFSIZE 2000

Definition at line 78 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ PBUF_POOL_SIZE

#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */

Definition at line 76 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ SYS_LIGHTWEIGHT_PROT

#define SYS_LIGHTWEIGHT_PROT 0

Definition at line 46 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ TCP_MSS

#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */

Definition at line 64 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ TCP_RCV_SCALE

#define TCP_RCV_SCALE 0

Definition at line 75 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ TCP_SND_BUF

#define TCP_SND_BUF (2 * TCP_MSS)

Definition at line 72 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ TCP_SND_QUEUELEN

#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS

Definition at line 70 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ TCP_TTL

#define TCP_TTL 255

Definition at line 83 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.

◆ TCP_WND

#define TCP_WND (2 * TCP_MSS)

Definition at line 73 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h.


AT32F435/437 Firmwary Library: lwipopts.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/lwipopts.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
21 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
25 * OF SUCH DAMAGE.
26 *
27 * This file is part of the lwIP TCP/IP stack.
28 *
29 * Author: Simon Goldschmidt
30 *
31 */
32#ifndef LWIP_HDR_LWIPOPTS_H
33#define LWIP_HDR_LWIPOPTS_H
34
35//#define LWIP_TESTMODE 0
36
37#define LWIP_IPV4 1
38//#define LWIP_TIMERS 0
39
40//#define LWIP_CHECKSUM_ON_COPY 1
41//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK 1
42//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL(printfmsg) LWIP_ASSERT("TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL", 0)
43
44/* We link to special sys_arch.c (for basic non-waiting API layers unit tests) */
45#define NO_SYS 1
46#define SYS_LIGHTWEIGHT_PROT 0
47#define LWIP_NETCONN !NO_SYS
48#define LWIP_SOCKET !NO_SYS
49#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET
50#define LWIP_NETBUF_RECVINFO 1
51#define LWIP_HAVE_LOOPIF 1
52//#define TCPIP_THREAD_TEST
53
54#define LWIP_NETIF_LINK_CALLBACK 1
55#define LWIP_DNS 1
56#define DNS_DOES_NAME_CHECK 1
57
58/* Enable DHCP to test it, disable UDP checksum to easier inject packets */
59#define LWIP_DHCP 0
60
61/* Minimal changes to opt.h required for tcp unit tests: */
62/* TCP Maximum segment size. */
63
64#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
65/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
66 lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
67 byte alignment -> define MEM_ALIGNMENT to 2. */
68#define MEM_ALIGNMENT 4
69#define MEM_SIZE (20*1024)
70#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS
71#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN
72#define TCP_SND_BUF (2 * TCP_MSS)
73#define TCP_WND (2 * TCP_MSS)
74#define LWIP_WND_SCALE 0
75#define TCP_RCV_SCALE 0
76#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */
77/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
78#define PBUF_POOL_BUFSIZE 2000
79//#define TCP_QUEUE_OOSEQ 0
80
81/* ---------- TCP options ---------- */
82#define LWIP_TCP 1
83#define TCP_TTL 255
84
85/* Enable IGMP and MDNS for MDNS tests */
86#define LWIP_IGMP 1
87#define LWIP_MDNS_RESPONDER 1
88#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER)
89
90/* Minimal changes to opt.h required for etharp unit tests: */
91#define ETHARP_SUPPORT_STATIC_ENTRIES 1
92
93#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8)
94
95/* MIB2 stats are required to check IPv4 reassembly results */
96#define MIB2_STATS 1
97
98/* netif tests want to test this, so enable: */
99//#define LWIP_NETIF_EXT_STATUS_CALLBACK 1
100
101/* Check lwip_stats.mem.illegal instead of asserting */
102#define LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */
103
104#endif /* LWIP_HDR_LWIPOPTS_H */


AT32F435/437 Firmwary Library: netconf.h File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
Functions
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/netconf.h File Reference

This file contains all the functions prototypes for the netconf.c file. More...

Go to the source code of this file.

Functions

void | tcpip_stack_init (void)
initializes the lwip stack More...
void | lwip_pkt_handle (void)
called when a frame is received More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
lwip periodic tasks More...

Detailed Description

This file contains all the functions prototypes for the netconf.c file.

Version
v2.0.9
Date
2022-06-28
        Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/netconf.h.


AT32F435/437 Firmwary Library: netconf.h Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • inc
utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/netconf.h
Go to the documentation of this file.
1
28/* Define to prevent recursive inclusion -------------------------------------*/
29#ifndef __NETCONF_H
30#define __NETCONF_H
31
32#ifdef __cplusplus
33 extern "C" {
34#endif
35
36/* Includes ------------------------------------------------------------------*/
37void tcpip_stack_init(void);
38void lwip_pkt_handle(void);
39void time_update(void);
40void lwip_periodic_handle(volatile uint32_t localtime);
41
42
43#ifdef __cplusplus
44}
45#endif
46
47#endif /* __NETCONF_H */
48
49
50
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:144
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:85
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:158
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:168


AT32F435/437 Firmwary Library: at32_emac.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
Functions | Variables
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c File Reference

emac config program More...

#include "at32f435_437_board.h"
#include "lwip/dhcp.h"
#include "at32_emac.h"

Go to the source code of this file.

Functions

error_status | emac_system_init (void)
enable emac clock and gpio clock More...
void | emac_nvic_configuration (void)
configures emac irq channel. More...
void | emac_pins_configuration (void)
configures emac required pins. More...
error_status | emac_layer2_configuration (void)
configures emac layer2 More...
static void | reset_phy (void)
reset layer 1 More...
error_status | emac_phy_register_reset (void)
reset phy register More...
error_status | emac_speed_config (emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters More...
error_status | emac_phy_init (emac_control_config_type *control_para)
initialize emac phy More...
uint16_t | link_update (void)
updates the link states More...
void | ethernetif_set_link (void const *argument)
this function sets the netif link status. More...
void | ethernetif_notify_conn_changed (struct netif *netif)
this function notify user about link status changement. More...
void | ethernetif_update_config (struct netif *netif)
link callback function, this function is called on change of link status to update low level driver configuration. More...
void | emac_tmr_init (void)
initialize tmr6 for emac More...

Variables

emac_control_config_type mac_control_para

Detailed Description

emac config program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c.


AT32F435/437 Firmwary Library: at32_emac.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c
Go to the documentation of this file.
1
27/* includes ------------------------------------------------------------------*/
28#include "at32f435_437_board.h"
29#include "lwip/dhcp.h"
30#include "at32_emac.h"
31
40 emac_control_config_type mac_control_para;
41
47 error_status emac_system_init(void)
48{
49 error_status status;
50
51 emac_nvic_configuration();
52
53 /* emac periph clock enable */
54 crm_periph_clock_enable(CRM_EMAC_PERIPH_CLOCK, TRUE);
55 crm_periph_clock_enable(CRM_EMACTX_PERIPH_CLOCK, TRUE);
56 crm_periph_clock_enable(CRM_EMACRX_PERIPH_CLOCK, TRUE);
57
58 emac_pins_configuration();
59 status = emac_layer2_configuration();
60 emac_tmr_init();
61
62 return status;
63}
64
70void emac_nvic_configuration(void)
71{
72 nvic_irq_enable(EMAC_IRQn, 1, 0);
73}
74
80void emac_pins_configuration(void)
81{
82 gpio_init_type gpio_init_struct = {0};
83
84 /* emac pins clock enable */
85 crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
86 crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
87 crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
88 crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
89 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
90 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
91
92 /* pa2 -> mdio */
93 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_11);
94 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
95 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
96 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
97 gpio_init_struct.gpio_pins = GPIO_PINS_2;
98 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
99 gpio_init(GPIOA, &gpio_init_struct);
100
101 /* pc1 -> mdc */
102 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE1, GPIO_MUX_11);
103 gpio_init_struct.gpio_pins = GPIO_PINS_1;
104 gpio_init(GPIOC, &gpio_init_struct);
105
106 #ifdef MII_MODE
107 /*
108 pb12 -> tx_d0
109 pb13 -> tx_d1
110 pc2 -> tx_d2
111 pb8 -> tx_d3
112 pb11 -> tx_en
113 pc3 -> tx_clk
114 */
115 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_11);
116 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_11);
117 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_11);
118 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_11);
119 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_11 | GPIO_PINS_12 | GPIO_PINS_13;
120 gpio_init(GPIOB, &gpio_init_struct);
121
122 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_11);
123 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE3, GPIO_MUX_11);
124 gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
125 gpio_init(GPIOC, &gpio_init_struct);
126
127 /*
128 pd8 -> rx_dv
129 pd9 -> rx_d0
130 pd10 -> rx_d1
131 pd11 -> rx_d2
132 pd12 -> rx_d3
133 */
134 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
135 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
136 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
137 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE11, GPIO_MUX_11);
138 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE12, GPIO_MUX_11);
139 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12;
140 gpio_init(GPIOD, &gpio_init_struct);
141
142 /*
143 pa1 -> rx_clk
144 pa0 -> crs
145 pa3 -> col
146 pb10 -> rx_er
147 */
148 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_11);
149 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
150 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_11);
151 gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_3;
152 gpio_init(GPIOA, &gpio_init_struct);
153
154 gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_11);
155 gpio_init_struct.gpio_pins = GPIO_PINS_10;
156 gpio_init(GPIOB, &gpio_init_struct);
157 #endif /* MII_MODE */
158
159 #ifdef RMII_MODE
160 /*
161 pb12 -> tx_d0
162 pb13 -> tx_d1
163 pb11 -> tx_en
164 */
165 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE11, GPIO_MUX_11);
166 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE13, GPIO_MUX_11);
167 gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE14, GPIO_MUX_11);
168 gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_13 | GPIO_PINS_14;
169 gpio_init(GPIOG, &gpio_init_struct);
170
171 /*
172 pd8 -> rx_dv
173 pd9 -> rx_d0
174 pd10 -> rx_d1
175 */
176 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11);
177 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11);
178 gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11);
179 gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10;
180 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
181 gpio_init(GPIOD, &gpio_init_struct);
182
183
184 #endif /* RMII_MODE */
185 /*
186 pa1 -> ref_clk
187 */
188 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11);
189 gpio_init_struct.gpio_pins = GPIO_PINS_1;
190 gpio_init(GPIOA, &gpio_init_struct);
191
192 #if !CRYSTAL_ON_PHY
193 gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_0);
194 gpio_init_struct.gpio_pins = GPIO_PINS_8;
195 gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
196 gpio_init(GPIOA, &gpio_init_struct);
197 #endif
198}
199
205 error_status emac_layer2_configuration(void)
206{
207 emac_dma_config_type dma_control_para;
208 crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE);
209 #ifdef MII
210 scfg_emac_interface_set(SCFG_EMAC_SELECT_MII);
211 #elif defined RMII_MODE
212 scfg_emac_interface_set(SCFG_EMAC_SELECT_RMII);
213 #endif
214 crm_clock_out1_set(CRM_CLKOUT1_PLL);
215 crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_5, CRM_CLKOUT_DIV2_2);
216
217 /* reset phy */
218 reset_phy();
219 /* reset emac ahb bus */
220 emac_reset();
221
222 /* software reset emac dma */
223 emac_dma_software_reset_set();
224
225 while(emac_dma_software_reset_get() == SET);
226
227 emac_control_para_init(&mac_control_para);
228
229 mac_control_para.auto_nego = EMAC_AUTO_NEGOTIATION_ON;
230
231 if(emac_phy_init(&mac_control_para) == ERROR)
232 {
233 return ERROR;
234 }
235
236 emac_dma_para_init(&dma_control_para);
237
238 dma_control_para.rsf_enable = TRUE;
239 dma_control_para.tsf_enable = TRUE;
240 dma_control_para.osf_enable = TRUE;
241 dma_control_para.aab_enable = TRUE;
242 dma_control_para.usp_enable = TRUE;
243 dma_control_para.fb_enable = TRUE;
244 dma_control_para.flush_rx_disable = TRUE;
245 dma_control_para.rx_dma_pal = EMAC_DMA_PBL_32;
246 dma_control_para.tx_dma_pal = EMAC_DMA_PBL_32;
247 dma_control_para.priority_ratio = EMAC_DMA_2_RX_1_TX;
248
249 emac_dma_config(&dma_control_para);
250 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_NORMAL_SUMMARY, TRUE);
251 emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_RX, TRUE);
252
253 return SUCCESS;
254}
255
261void static reset_phy(void)
262{
263 gpio_init_type gpio_init_struct = {0};
264 crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
265 crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE);
266 gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE8, GPIO_MUX_0);
267 gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
268 gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
269 gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
270 gpio_init_struct.gpio_pins = GPIO_PINS_15;
271 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
272 gpio_init(GPIOE, &gpio_init_struct);
273
274 gpio_init_struct.gpio_pins = GPIO_PINS_15;
275 gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
276 gpio_init(GPIOG, &gpio_init_struct);
277 gpio_bits_reset(GPIOG, GPIO_PINS_15);
278 gpio_bits_reset(GPIOE, GPIO_PINS_15);
279 delay_ms(2);
280 gpio_bits_set(GPIOE, GPIO_PINS_15);
281 delay_ms(2);
282}
283
289 error_status emac_phy_register_reset(void)
290{
291 uint16_t data = 0;
292 uint32_t timeout = 0;
293 uint32_t i = 0;
294
295 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_RESET_BIT) == ERROR)
296 {
297 return ERROR;
298 }
299
300 for(i = 0; i < 0x000FFFFF; i++);
301
302 do
303 {
304 timeout++;
305 if(emac_phy_register_read(PHY_ADDRESS, PHY_CONTROL_REG, &data) == ERROR)
306 {
307 return ERROR;
308 }
309 } while((data & PHY_RESET_BIT) && (timeout < PHY_TIMEOUT));
310
311 for(i = 0; i < 0x00FFFFF; i++);
312 if(timeout == PHY_TIMEOUT)
313 {
314 return ERROR;
315 }
316 return SUCCESS;
317}
318
335 error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
336{
337 uint16_t data = 0;
338 uint32_t timeout = 0;
339 if(nego == EMAC_AUTO_NEGOTIATION_ON)
340 {
341 do
342 {
343 timeout++;
344 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
345 {
346 return ERROR;
347 }
348 } while(!(data & PHY_LINKED_STATUS_BIT) && (timeout < PHY_TIMEOUT));
349
350 if(timeout == PHY_TIMEOUT)
351 {
352 return ERROR;
353 }
354
355 timeout = 0;
356
357 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_AUTO_NEGOTIATION_BIT) == ERROR)
358 {
359 return ERROR;
360 }
361
362
363 do
364 {
365 timeout++;
366 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR)
367 {
368 return ERROR;
369 }
370 } while(!(data & PHY_NEGO_COMPLETE_BIT) && (timeout < PHY_TIMEOUT));
371
372 if(timeout == PHY_TIMEOUT)
373 {
374 return ERROR;
375 }
376
377 if(emac_phy_register_read(PHY_ADDRESS, PHY_SPECIFIED_CS_REG, &data) == ERROR)
378 {
379 return ERROR;
380 }
381 #ifdef DM9162
382 if(data & PHY_FULL_DUPLEX_100MBPS_BIT)
383 {
384 emac_fast_speed_set(EMAC_SPEED_100MBPS);
385 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
386 }
387 else if(data & PHY_HALF_DUPLEX_100MBPS_BIT)
388 {
389 emac_fast_speed_set(EMAC_SPEED_100MBPS);
390 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
391 }
392 else if(data & PHY_FULL_DUPLEX_10MBPS_BIT)
393 {
394 emac_fast_speed_set(EMAC_SPEED_10MBPS);
395 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
396 }
397 else if(data & PHY_HALF_DUPLEX_10MBPS_BIT)
398 {
399 emac_fast_speed_set(EMAC_SPEED_10MBPS);
400 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
401 }
402 #else
403 if(data & PHY_DUPLEX_MODE)
404 {
405 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
406 }
407 else
408 {
409 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
410 }
411 if(data & PHY_SPEED_MODE)
412 {
413 emac_fast_speed_set(EMAC_SPEED_10MBPS);
414 }
415 else
416 {
417 emac_fast_speed_set(EMAC_SPEED_100MBPS);
418 }
419 #endif
420 }
421 else
422 {
423 if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, (uint16_t)((mode << 8) | (speed << 13))) == ERROR)
424 {
425 return ERROR;
426 }
427 if(speed == EMAC_SPEED_100MBPS)
428 {
429 emac_fast_speed_set(EMAC_SPEED_100MBPS);
430 }
431 else
432 {
433 emac_fast_speed_set(EMAC_SPEED_10MBPS);
434 }
435 if(mode == EMAC_FULL_DUPLEX)
436 {
437 emac_duplex_mode_set(EMAC_FULL_DUPLEX);
438 }
439 else
440 {
441 emac_duplex_mode_set(EMAC_HALF_DUPLEX);
442 }
443 }
444
445 return SUCCESS;
446}
447
453 error_status emac_phy_init(emac_control_config_type *control_para)
454{
455 emac_clock_range_set();
456 if(emac_phy_register_reset() == ERROR)
457 {
458 return ERROR;
459 }
460 emac_speed_config(mac_control_para.auto_nego, mac_control_para.duplex_mode, mac_control_para.fast_ethernet_speed);
461
462 emac_control_config(control_para);
463 return SUCCESS;
464}
465
471uint16_t link_update(void)
472{
473 uint16_t link_data, link_state;
474 if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &link_data) == ERROR)
475 {
476 return ERROR;
477 }
478
479 link_state = (link_data & PHY_LINKED_STATUS_BIT)>>2;
480 return link_state;
481}
482
488void ethernetif_set_link(void const *argument)
489{
490 uint16_t regvalue = 0;
491 struct netif *netif = (struct netif *)argument;
492
493 /* read phy_bsr*/
494 regvalue = link_update();
495
496 /* check whether the netif link down and the phy link is up */
497 if(!netif_is_link_up(netif) && (regvalue))
498 {
499 /* network cable is connected */
500 netif_set_link_up(netif);
501 }
502 else if(netif_is_link_up(netif) && (!regvalue))
503 {
504 /* network cable is dis-connected */
505 netif_set_link_down(netif);
506 }
507}
508
514void ethernetif_notify_conn_changed(struct netif *netif)
515{
516 /* note : this is function could be implemented in user file
517 when the callback is needed,
518 */
519
520 if (netif_is_link_up(netif)) {
521 netif_set_up(netif);
522
523#if LWIP_DHCP
524 /* creates a new dhcp client for this interface on the first call.
525 note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
526 the predefined regular intervals after starting the client.
527 you can peek in the netif->dhcp struct for the actual dhcp status.*/
528 dhcp_start(netif);
529#endif
530 }
531 else
532 netif_set_down(netif);
533}
534
541void ethernetif_update_config(struct netif *netif)
542{
543 if(netif_is_link_up(netif))
544 {
545 emac_speed_config(mac_control_para.auto_nego, mac_control_para.duplex_mode, mac_control_para.fast_ethernet_speed);
546
547 delay_ms(300);
548 /* enable mac and dma transmission and reception */
549 emac_start();
550 }
551 else
552 {
553 /* disable mac and dma transmission and reception */
554 emac_stop();
555 }
556
557 ethernetif_notify_conn_changed(netif);
558}
559
565void emac_tmr_init(void)
566{
567 crm_clocks_freq_type crm_clocks_freq_struct = {0};
568 crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
569
570 crm_clocks_freq_get(&crm_clocks_freq_struct);
571 /* tmr1 configuration */
572 /* time base configuration */
573 /* systemclock/24000/100 = 100hz */
574 tmr_base_init(TMR6, 99, (crm_clocks_freq_struct.ahb_freq / 10000) - 1);
575 tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
576
577 /* overflow interrupt enable */
578 tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
579
580 /* tmr1 overflow interrupt nvic init */
581 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
582 nvic_irq_enable(TMR6_DAC_GLOBAL_IRQn, 0, 0);
583 tmr_counter_enable(TMR6, TRUE);
584}
585
at32f435_437_board.h
gpio_init_struct
gpio_init_type gpio_init_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:38
crm_clocks_freq_struct
crm_clocks_freq_type crm_clocks_freq_struct
Definition: project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c:40
PHY_AUTO_NEGOTIATION_BIT
#define PHY_AUTO_NEGOTIATION_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:64
PHY_RESET_BIT
#define PHY_RESET_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:66
PHY_ADDRESS
#define PHY_ADDRESS
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:59
PHY_FULL_DUPLEX_10MBPS_BIT
#define PHY_FULL_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:73
PHY_FULL_DUPLEX_100MBPS_BIT
#define PHY_FULL_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:71
PHY_SPECIFIED_CS_REG
#define PHY_SPECIFIED_CS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:62
PHY_CONTROL_REG
#define PHY_CONTROL_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:60
PHY_NEGO_COMPLETE_BIT
#define PHY_NEGO_COMPLETE_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:69
PHY_HALF_DUPLEX_100MBPS_BIT
#define PHY_HALF_DUPLEX_100MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:72
PHY_STATUS_REG
#define PHY_STATUS_REG
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:61
PHY_LINKED_STATUS_BIT
#define PHY_LINKED_STATUS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:68
PHY_HALF_DUPLEX_10MBPS_BIT
#define PHY_HALF_DUPLEX_10MBPS_BIT
Definition: project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h:74
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
delay_ms
void delay_ms(uint16_t nms)
inserts a delay time.
Definition: at32f435_437_board.c:326
crm_clkout_div_set
void crm_clkout_div_set(crm_clkout_index_type index, crm_clkout_div1_type div1, crm_clkout_div2_type div2)
set crm clkout1 division1
Definition: at32f435_437_crm.c:831
crm_clock_out1_set
void crm_clock_out1_set(crm_clkout1_select_type clkout)
set crm clkout1
Definition: at32f435_437_crm.c:773
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_clocks_freq_get
void crm_clocks_freq_get(crm_clocks_freq_type *clocks_struct)
get crm clocks freqency
Definition: at32f435_437_crm.c:691
CRM_TMR6_PERIPH_CLOCK
@ CRM_TMR6_PERIPH_CLOCK
Definition: at32f435_437_crm.h:132
CRM_GPIOC_PERIPH_CLOCK
@ CRM_GPIOC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:107
CRM_SCFG_PERIPH_CLOCK
@ CRM_SCFG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:163
CRM_GPIOA_PERIPH_CLOCK
@ CRM_GPIOA_PERIPH_CLOCK
Definition: at32f435_437_crm.h:105
CRM_GPIOG_PERIPH_CLOCK
@ CRM_GPIOG_PERIPH_CLOCK
Definition: at32f435_437_crm.h:111
CRM_GPIOD_PERIPH_CLOCK
@ CRM_GPIOD_PERIPH_CLOCK
Definition: at32f435_437_crm.h:108
CRM_GPIOB_PERIPH_CLOCK
@ CRM_GPIOB_PERIPH_CLOCK
Definition: at32f435_437_crm.h:106
CRM_GPIOE_PERIPH_CLOCK
@ CRM_GPIOE_PERIPH_CLOCK
Definition: at32f435_437_crm.h:109
CRM_CLKOUT_DIV1_5
@ CRM_CLKOUT_DIV1_5
Definition: at32f435_437_crm.h:729
CRM_CLKOUT_DIV2_2
@ CRM_CLKOUT_DIV2_2
Definition: at32f435_437_crm.h:738
CRM_CLKOUT1_PLL
@ CRM_CLKOUT1_PLL
Definition: at32f435_437_crm.h:702
CRM_CLKOUT_INDEX_1
@ CRM_CLKOUT_INDEX_1
Definition: at32f435_437_crm.h:690
emac_phy_init
error_status emac_phy_init(emac_control_config_type *control_para)
initialize emac phy
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:453
emac_pins_configuration
void emac_pins_configuration(void)
configures emac required pins.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:80
reset_phy
static void reset_phy(void)
reset layer 1
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:261
ethernetif_notify_conn_changed
void ethernetif_notify_conn_changed(struct netif *netif)
this function notify user about link status changement.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:514
emac_phy_register_reset
error_status emac_phy_register_reset(void)
reset phy register
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:289
link_update
uint16_t link_update(void)
updates the link states
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:471
emac_layer2_configuration
error_status emac_layer2_configuration(void)
configures emac layer2
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:205
mac_control_para
emac_control_config_type mac_control_para
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:40
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:488
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:541
emac_tmr_init
void emac_tmr_init(void)
initialize tmr6 for emac
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:565
emac_nvic_configuration
void emac_nvic_configuration(void)
configures emac irq channel.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:70
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:47
emac_speed_config
error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed)
set mac speed related parameters
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32_emac.c:335
emac_dma_software_reset_set
void emac_dma_software_reset_set(void)
reset emac dma
Definition: at32f435_437_emac.c:156
emac_control_para_init
void emac_control_para_init(emac_control_config_type *control_para)
initialize emac control structure
Definition: at32f435_437_emac.c:70
emac_dma_software_reset_get
flag_status emac_dma_software_reset_get(void)
get emac dma reset status
Definition: at32f435_437_emac.c:166
emac_control_config
void emac_control_config(emac_control_config_type *control_struct)
configure emac control setting.
Definition: at32f435_437_emac.c:136
emac_phy_register_read
error_status emac_phy_register_read(uint8_t address, uint8_t reg, uint16_t *data)
read phy data
Definition: at32f435_437_emac.c:262
emac_reset
void emac_reset(void)
deinitialize the emac peripheral registers to their default reset values.
Definition: at32f435_437_emac.c:59
emac_start
void emac_start(void)
enable emac and dma reception/transmission
Definition: at32f435_437_emac.c:183
emac_duplex_mode_set
void emac_duplex_mode_set(emac_duplex_type duplex_mode)
set duplex mode.
Definition: at32f435_437_emac.c:463
emac_fast_speed_set
void emac_fast_speed_set(emac_speed_type speed)
set mac fast emac speed.
Definition: at32f435_437_emac.c:450
emac_clock_range_set
void emac_clock_range_set(void)
according to hclk to set mdc clock frequency.
Definition: at32f435_437_emac.c:93
emac_dma_interrupt_enable
void emac_dma_interrupt_enable(emac_dma_interrupt_type it, confirm_state new_state)
enable dma interrupt
Definition: at32f435_437_emac.c:1497
emac_dma_para_init
void emac_dma_para_init(emac_dma_config_type *control_para)
init emac dma parameters
Definition: at32f435_437_emac.c:1073
emac_phy_register_write
error_status emac_phy_register_write(uint8_t address, uint8_t reg, uint16_t data)
write phy data.
Definition: at32f435_437_emac.c:232
emac_dma_config
void emac_dma_config(emac_dma_config_type *control_para)
configure emac dma
Definition: at32f435_437_emac.c:1099
emac_stop
void emac_stop(void)
stop emac and dma reception/transmission
Definition: at32f435_437_emac.c:206
emac_duplex_type
emac_duplex_type
emac duplex type
Definition: at32f435_437_emac.h:302
emac_speed_type
emac_speed_type
emac speed type
Definition: at32f435_437_emac.h:311
emac_auto_negotiation_type
emac_auto_negotiation_type
emac auto negotiation type
Definition: at32f435_437_emac.h:282
EMAC_HALF_DUPLEX
@ EMAC_HALF_DUPLEX
Definition: at32f435_437_emac.h:303
EMAC_FULL_DUPLEX
@ EMAC_FULL_DUPLEX
Definition: at32f435_437_emac.h:304
EMAC_DMA_PBL_32
@ EMAC_DMA_PBL_32
Definition: at32f435_437_emac.h:427
EMAC_SPEED_10MBPS
@ EMAC_SPEED_10MBPS
Definition: at32f435_437_emac.h:312
EMAC_SPEED_100MBPS
@ EMAC_SPEED_100MBPS
Definition: at32f435_437_emac.h:313
EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
@ EMAC_DMA_INTERRUPT_NORMAL_SUMMARY
Definition: at32f435_437_emac.h:527
EMAC_DMA_INTERRUPT_RX
@ EMAC_DMA_INTERRUPT_RX
Definition: at32f435_437_emac.h:519
EMAC_AUTO_NEGOTIATION_ON
@ EMAC_AUTO_NEGOTIATION_ON
Definition: at32f435_437_emac.h:284
EMAC_DMA_2_RX_1_TX
@ EMAC_DMA_2_RX_1_TX
Definition: at32f435_437_emac.h:412
PHY_TIMEOUT
#define PHY_TIMEOUT
Definition: at32f435_437_emac.h:47
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
SUCCESS
@ SUCCESS
Definition: at32f435_437.h:380
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
gpio_bits_reset
void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins)
clear the selected data port bits.
Definition: at32f435_437_gpio.c:308
gpio_pin_mux_config
void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux)
configure the pin's muxing function.
Definition: at32f435_437_gpio.c:491
gpio_init
void gpio_init(gpio_type *gpio_x, gpio_init_type *gpio_init_struct)
initialize the gpio peripheral.
Definition: at32f435_437_gpio.c:103
gpio_bits_set
void gpio_bits_set(gpio_type *gpio_x, uint16_t pins)
set the selected data port bits.
Definition: at32f435_437_gpio.c:277
GPIO_MODE_MUX
@ GPIO_MODE_MUX
Definition: at32f435_437_gpio.h:84
GPIO_MODE_OUTPUT
@ GPIO_MODE_OUTPUT
Definition: at32f435_437_gpio.h:83
GPIO_DRIVE_STRENGTH_STRONGER
@ GPIO_DRIVE_STRENGTH_STRONGER
Definition: at32f435_437_gpio.h:93
GPIO_PINS_SOURCE3
@ GPIO_PINS_SOURCE3
Definition: at32f435_437_gpio.h:136
GPIO_PINS_SOURCE1
@ GPIO_PINS_SOURCE1
Definition: at32f435_437_gpio.h:134
GPIO_PINS_SOURCE12
@ GPIO_PINS_SOURCE12
Definition: at32f435_437_gpio.h:145
GPIO_PINS_SOURCE13
@ GPIO_PINS_SOURCE13
Definition: at32f435_437_gpio.h:146
GPIO_PINS_SOURCE0
@ GPIO_PINS_SOURCE0
Definition: at32f435_437_gpio.h:133
GPIO_PINS_SOURCE2
@ GPIO_PINS_SOURCE2
Definition: at32f435_437_gpio.h:135
GPIO_PINS_SOURCE10
@ GPIO_PINS_SOURCE10
Definition: at32f435_437_gpio.h:143
GPIO_PINS_SOURCE9
@ GPIO_PINS_SOURCE9
Definition: at32f435_437_gpio.h:142
GPIO_PINS_SOURCE11
@ GPIO_PINS_SOURCE11
Definition: at32f435_437_gpio.h:144
GPIO_PINS_SOURCE14
@ GPIO_PINS_SOURCE14
Definition: at32f435_437_gpio.h:147
GPIO_PINS_SOURCE8
@ GPIO_PINS_SOURCE8
Definition: at32f435_437_gpio.h:141
GPIO_PULL_NONE
@ GPIO_PULL_NONE
Definition: at32f435_437_gpio.h:111
GPIO_OUTPUT_PUSH_PULL
@ GPIO_OUTPUT_PUSH_PULL
Definition: at32f435_437_gpio.h:102
GPIO_MUX_0
@ GPIO_MUX_0
Definition: at32f435_437_gpio.h:156
GPIO_MUX_11
@ GPIO_MUX_11
Definition: at32f435_437_gpio.h:167
GPIO_PINS_10
#define GPIO_PINS_10
Definition: at32f435_437_gpio.h:61
GPIO_PINS_0
#define GPIO_PINS_0
Definition: at32f435_437_gpio.h:51
GPIO_PINS_11
#define GPIO_PINS_11
Definition: at32f435_437_gpio.h:62
GPIO_PINS_2
#define GPIO_PINS_2
Definition: at32f435_437_gpio.h:53
GPIO_PINS_13
#define GPIO_PINS_13
Definition: at32f435_437_gpio.h:64
GPIO_PINS_3
#define GPIO_PINS_3
Definition: at32f435_437_gpio.h:54
GPIO_PINS_12
#define GPIO_PINS_12
Definition: at32f435_437_gpio.h:63
GPIO_PINS_14
#define GPIO_PINS_14
Definition: at32f435_437_gpio.h:65
GPIO_PINS_9
#define GPIO_PINS_9
Definition: at32f435_437_gpio.h:60
GPIO_PINS_8
#define GPIO_PINS_8
Definition: at32f435_437_gpio.h:59
GPIO_PINS_1
#define GPIO_PINS_1
Definition: at32f435_437_gpio.h:52
GPIO_PINS_15
#define GPIO_PINS_15
Definition: at32f435_437_gpio.h:66
GPIOG
#define GPIOG
Definition: at32f435_437_gpio.h:527
GPIOC
#define GPIOC
Definition: at32f435_437_gpio.h:523
GPIOB
#define GPIOB
Definition: at32f435_437_gpio.h:522
GPIOD
#define GPIOD
Definition: at32f435_437_gpio.h:524
GPIOA
#define GPIOA
Definition: at32f435_437_gpio.h:521
GPIOE
#define GPIOE
Definition: at32f435_437_gpio.h:525
nvic_irq_enable
void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
enable nvic irq
Definition: at32f435_437_misc.c:64
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
scfg_emac_interface_set
void scfg_emac_interface_set(scfg_emac_interface_type mode)
scfg emac interface set
Definition: at32f435_437_scfg.c:113
SCFG_EMAC_SELECT_MII
@ SCFG_EMAC_SELECT_MII
Definition: at32f435_437_scfg.h:139
SCFG_EMAC_SELECT_RMII
@ SCFG_EMAC_SELECT_RMII
Definition: at32f435_437_scfg.h:140
tmr_counter_enable
void tmr_counter_enable(tmr_type *tmr_x, confirm_state new_state)
enable or disable tmr counter
Definition: at32f435_437_tmr.c:140
tmr_base_init
void tmr_base_init(tmr_type *tmr_x, uint32_t tmr_pr, uint32_t tmr_div)
init tmr base
Definition: at32f435_437_tmr.c:205
tmr_interrupt_enable
void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state new_state)
enable or disable tmr interrupt
Definition: at32f435_437_tmr.c:1389
tmr_cnt_dir_set
void tmr_cnt_dir_set(tmr_type *tmr_x, tmr_count_mode_type tmr_cnt_dir)
set tmr counter count direction
Definition: at32f435_437_tmr.c:251
TMR_COUNT_UP
@ TMR_COUNT_UP
Definition: at32f435_437_tmr.h:107
TMR_OVF_INT
#define TMR_OVF_INT
Definition: at32f435_437_tmr.h:75
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
TMR6_DAC_GLOBAL_IRQn
@ TMR6_DAC_GLOBAL_IRQn
Definition: at32f435_437.h:202
netif
struct netif netif
Definition: project/at_start_f437/examples/emac/dns_client/src/netconf.c:59
crm_clocks_freq_type
crm clocks freqency structure
Definition: at32f435_437_crm.h:788
crm_clocks_freq_type::ahb_freq
uint32_t ahb_freq
Definition: at32f435_437_crm.h:790
emac_control_config_type
ethernet mac control config type
Definition: at32f435_437_emac.h:588
emac_control_config_type::auto_nego
emac_auto_negotiation_type auto_nego
Definition: at32f435_437_emac.h:589
emac_control_config_type::fast_ethernet_speed
emac_speed_type fast_ethernet_speed
Definition: at32f435_437_emac.h:598
emac_control_config_type::duplex_mode
emac_duplex_type duplex_mode
Definition: at32f435_437_emac.h:595
emac_dma_config_type
ethernet mac dma config type
Definition: at32f435_437_emac.h:609
emac_dma_config_type::tx_dma_pal
emac_dma_pbl_type tx_dma_pal
Definition: at32f435_437_emac.h:614
emac_dma_config_type::aab_enable
confirm_state aab_enable
Definition: at32f435_437_emac.h:610
emac_dma_config_type::rx_dma_pal
emac_dma_pbl_type rx_dma_pal
Definition: at32f435_437_emac.h:612
emac_dma_config_type::flush_rx_disable
confirm_state flush_rx_disable
Definition: at32f435_437_emac.h:620
emac_dma_config_type::priority_ratio
emac_dma_rx_tx_ratio_type priority_ratio
Definition: at32f435_437_emac.h:617
emac_dma_config_type::osf_enable
confirm_state osf_enable
Definition: at32f435_437_emac.h:626
emac_dma_config_type::usp_enable
confirm_state usp_enable
Definition: at32f435_437_emac.h:611
emac_dma_config_type::rsf_enable
confirm_state rsf_enable
Definition: at32f435_437_emac.h:619
emac_dma_config_type::tsf_enable
confirm_state tsf_enable
Definition: at32f435_437_emac.h:621
emac_dma_config_type::fb_enable
confirm_state fb_enable
Definition: at32f435_437_emac.h:613
gpio_init_type
gpio init type
Definition: at32f435_437_gpio.h:120
gpio_init_type::gpio_out_type
gpio_output_type gpio_out_type
Definition: at32f435_437_gpio.h:122
gpio_init_type::gpio_pull
gpio_pull_type gpio_pull
Definition: at32f435_437_gpio.h:123
gpio_init_type::gpio_drive_strength
gpio_drive_type gpio_drive_strength
Definition: at32f435_437_gpio.h:125
gpio_init_type::gpio_mode
gpio_mode_type gpio_mode
Definition: at32f435_437_gpio.h:124
gpio_init_type::gpio_pins
uint32_t gpio_pins
Definition: at32f435_437_gpio.h:121


AT32F435/437 Firmwary Library: at32f435_437_clock.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
Functions
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_clock.c File Reference

system clock config program More...

#include "at32f435_437_clock.h"

Go to the source code of this file.

Functions

void system_clock_config (void)
system clock config program More...

Detailed Description

system clock config program

Version
v2.0.9
Date
2022-06-28

Definition in file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_clock.c.


AT32F435/437 Firmwary Library: at32f435_437_clock.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_clock.c
Go to the documentation of this file.
1
10/* includes ------------------------------------------------------------------*/
11#include "at32f435_437_clock.h"
12
32void system_clock_config(void)
33{
34 /* enable pwc periph clock */
35 crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
36
37 /* config ldo voltage */
38 pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
39
40 /* set the flash clock divider */
41 flash_clock_divider_set(FLASH_CLOCK_DIV_3);
42
43 /* reset crm */
44 crm_reset();
45
46 crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
47
48 /* wait till hext is ready */
49 while(crm_hext_stable_wait() == ERROR)
50 {
51 }
52
53 /* config pll clock resource */
54 crm_pll_config(CRM_PLL_SOURCE_HEXT, 125, 1, CRM_PLL_FR_4);
55
56 /* enable pll */
57 crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
58
59 /* wait till pll is ready */
60 while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
61 {
62 }
63
64 /* config ahbclk */
65 crm_ahb_div_set(CRM_AHB_DIV_1);
66
67 /* config apb2clk */
68 crm_apb2_div_set(CRM_APB2_DIV_2);
69
70 /* config apb1clk */
71 crm_apb1_div_set(CRM_APB1_DIV_2);
72
73 /* enable auto step mode */
74 crm_auto_step_mode_enable(TRUE);
75
76 /* select pll as system clock source */
77 crm_sysclk_switch(CRM_SCLK_PLL);
78
79 /* wait till pll is used as system clock source */
80 while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
81 {
82 }
83
84 /* disable auto step mode */
85 crm_auto_step_mode_enable(FALSE);
86
87 /* update system_core_clock global variable */
88 system_core_clock_update();
89}
90
system_clock_config
void system_clock_config(void)
system clock config program
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_clock.c:32
system_core_clock_update
void system_core_clock_update(void)
update system_core_clock variable according to clock register values. the system_core_clock variable ...
Definition: system_at32f435_437.c:114
crm_flag_get
flag_status crm_flag_get(uint32_t flag)
get crm flag status
Definition: at32f435_437_crm.c:124
crm_hext_stable_wait
error_status crm_hext_stable_wait(void)
wait for hext stable
Definition: at32f435_437_crm.c:143
crm_pll_config
void crm_pll_config(crm_pll_clock_source_type clock_source, uint16_t pll_ns, uint16_t pll_ms, crm_pll_fr_type pll_fr)
config crm pll pll_rcs_freq * pll_ns pll clock = -----------------------------— pll_ms * pll_fr_n att...
Definition: at32f435_437_crm.c:645
crm_ahb_div_set
void crm_ahb_div_set(crm_ahb_div_type value)
set crm ahb division
Definition: at32f435_437_crm.c:465
crm_sysclk_switch_status_get
crm_sclk_type crm_sysclk_switch_status_get(void)
indicate which clock source is used as system clock
Definition: at32f435_437_crm.c:680
crm_clock_source_enable
void crm_clock_source_enable(crm_clock_source_type source, confirm_state new_state)
enable or disable the crm clock source
Definition: at32f435_437_crm.c:314
crm_apb2_div_set
void crm_apb2_div_set(crm_apb2_div_type value)
set crm apb2 division
Definition: at32f435_437_crm.c:497
crm_apb1_div_set
void crm_apb1_div_set(crm_apb1_div_type value)
set crm apb1 division
Definition: at32f435_437_crm.c:481
crm_auto_step_mode_enable
void crm_auto_step_mode_enable(confirm_state new_state)
auto step clock switch enable
Definition: at32f435_437_crm.c:551
crm_periph_clock_enable
void crm_periph_clock_enable(crm_periph_clock_type value, confirm_state new_state)
enable or disable the peripheral clock
Definition: at32f435_437_crm.c:215
crm_reset
void crm_reset(void)
reset the crm register
Definition: at32f435_437_crm.c:49
crm_sysclk_switch
void crm_sysclk_switch(crm_sclk_type value)
select system clock source
Definition: at32f435_437_crm.c:666
CRM_PWC_PERIPH_CLOCK
@ CRM_PWC_PERIPH_CLOCK
Definition: at32f435_437_crm.h:149
CRM_APB1_DIV_2
@ CRM_APB1_DIV_2
Definition: at32f435_437_crm.h:588
CRM_CLOCK_SOURCE_PLL
@ CRM_CLOCK_SOURCE_PLL
Definition: at32f435_437_crm.h:561
CRM_CLOCK_SOURCE_HEXT
@ CRM_CLOCK_SOURCE_HEXT
Definition: at32f435_437_crm.h:560
CRM_PLL_SOURCE_HEXT
@ CRM_PLL_SOURCE_HEXT
Definition: at32f435_437_crm.h:538
CRM_AHB_DIV_1
@ CRM_AHB_DIV_1
Definition: at32f435_437_crm.h:571
CRM_SCLK_PLL
@ CRM_SCLK_PLL
Definition: at32f435_437_crm.h:682
CRM_APB2_DIV_2
@ CRM_APB2_DIV_2
Definition: at32f435_437_crm.h:600
CRM_PLL_FR_4
@ CRM_PLL_FR_4
Definition: at32f435_437_crm.h:548
CRM_PLL_STABLE_FLAG
#define CRM_PLL_STABLE_FLAG
Definition: at32f435_437_crm.h:57
ERROR
@ ERROR
Definition: at32f435_437.h:380
FALSE
@ FALSE
Definition: at32f435_437.h:379
TRUE
@ TRUE
Definition: at32f435_437.h:379
SET
@ SET
Definition: at32f435_437.h:378
flash_clock_divider_set
#define flash_clock_divider_set(div)
set the flash clock divider definition
Definition: at32f435_437_flash.h:161
FLASH_CLOCK_DIV_3
@ FLASH_CLOCK_DIV_3
Definition: at32f435_437_flash.h:191
PWC_LDO_OUTPUT_1V3
@ PWC_LDO_OUTPUT_1V3
Definition: at32f435_437_pwc.h:101
pwc_ldo_output_voltage_set
#define pwc_ldo_output_voltage_set(val)
select ldo output voltage.
Definition: at32f435_437_pwc.h:75
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: at32f435_437_int.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
Functions
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c File Reference

main interrupt service routines. More...

#include "at32f435_437_int.h"
#include "netconf.h"

Go to the source code of this file.

Functions

void | NMI_Handler (void)
this function handles nmi exception. More...
void | HardFault_Handler (void)
this function handles hard fault exception. More...
void | MemManage_Handler (void)
this function handles memory manage exception. More...
void | BusFault_Handler (void)
this function handles bus fault exception. More...
void | UsageFault_Handler (void)
this function handles usage fault exception. More...
void | SVC_Handler (void)
this function handles svcall exception. More...
void | DebugMon_Handler (void)
this function handles debug monitor exception. More...
void | PendSV_Handler (void)
this function handles pendsv_handler exception. More...
void | SysTick_Handler (void)
this function handles systick handler. More...
void | TMR6_DAC_GLOBAL_IRQHandler (void)
this function handles timer6 overflow handler. More...
void | EMAC_IRQHandler (void)
this function handles emac handler. More...

Detailed Description

main interrupt service routines.

Version
v2.0.9
Date
2022-06-28

Definition in file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c.

Function Documentation

◆ EMAC_IRQHandler()

void EMAC_IRQHandler ( void )

this function handles emac handler.

Parameters
none
Return values
none

< emac dma receive interrupt

< emac dma normal interrupt summary

Definition at line 131 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c.

◆ TMR6_DAC_GLOBAL_IRQHandler()

void TMR6_DAC_GLOBAL_IRQHandler ( void )

this function handles timer6 overflow handler.

Parameters
none
Return values
none

< tmr flag overflow

< tmr flag overflow

Definition at line 116 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c.


AT32F435/437 Firmwary Library: at32f435_437_int.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c
Go to the documentation of this file.
1
10/* includes ------------------------------------------------------------------*/
11#include "at32f435_437_int.h"
12#include "netconf.h"
13
19void NMI_Handler(void)
20{
21}
22
28void HardFault_Handler(void)
29{
30 /* go to infinite loop when hard fault exception occurs */
31 while (1)
32 {
33 }
34}
35
41void MemManage_Handler(void)
42{
43 /* go to infinite loop when memory manage exception occurs */
44 while (1)
45 {
46 }
47}
48
54void BusFault_Handler(void)
55{
56 /* go to infinite loop when bus fault exception occurs */
57 while (1)
58 {
59 }
60}
61
67void UsageFault_Handler(void)
68{
69 /* go to infinite loop when usage fault exception occurs */
70 while (1)
71 {
72 }
73}
74
80void SVC_Handler(void)
81{
82}
83
89void DebugMon_Handler(void)
90{
91}
92
98void PendSV_Handler(void)
99{
100}
101
107void SysTick_Handler(void)
108{
109}
110
116void TMR6_DAC_GLOBAL_IRQHandler(void)
117{
118 if(tmr_flag_get(TMR6, TMR_OVF_FLAG) != RESET)
119 {
120 /* Update the local_time by adding SYSTEMTICK_PERIOD_MS each SysTick interrupt */
121 time_update();
122 tmr_flag_clear(TMR6, TMR_OVF_FLAG);
123 }
124}
125
131void EMAC_IRQHandler(void)
132{
133 /* handles all the received frames */
134 while(emac_received_packet_size_get() != 0)
135 {
136 lwip_pkt_handle();
137 }
138
139 /* clear the emac dma rx it pending bits */
140 emac_dma_flag_clear(EMAC_DMA_RI_FLAG);
141 emac_dma_flag_clear(EMAC_DMA_NIS_FLAG);
142}
UsageFault_Handler
void UsageFault_Handler(void)
this function handles usage fault exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c:67
HardFault_Handler
void HardFault_Handler(void)
this function handles hard fault exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c:28
MemManage_Handler
void MemManage_Handler(void)
this function handles memory manage exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c:41
SVC_Handler
void SVC_Handler(void)
this function handles svcall exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c:80
PendSV_Handler
void PendSV_Handler(void)
this function handles pendsv_handler exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c:98
NMI_Handler
void NMI_Handler(void)
this function handles nmi exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c:19
BusFault_Handler
void BusFault_Handler(void)
this function handles bus fault exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c:54
SysTick_Handler
void SysTick_Handler(void)
this function handles systick handler.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c:107
DebugMon_Handler
void DebugMon_Handler(void)
this function handles debug monitor exception.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c:89
emac_dma_flag_clear
void emac_dma_flag_clear(uint32_t dma_flag)
clear the emac dma flag.
Definition: at32f435_437_emac.c:2290
emac_received_packet_size_get
uint32_t emac_received_packet_size_get(void)
get the size of received the received packet.
Definition: at32f435_437_emac.c:1044
EMAC_DMA_RI_FLAG
#define EMAC_DMA_RI_FLAG
Definition: at32f435_437_emac.h:264
EMAC_DMA_NIS_FLAG
#define EMAC_DMA_NIS_FLAG
Definition: at32f435_437_emac.h:272
RESET
@ RESET
Definition: at32f435_437.h:378
tmr_flag_clear
void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag)
clear tmr flag
Definition: at32f435_437_tmr.c:1463
tmr_flag_get
flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag)
get tmr flag
Definition: at32f435_437_tmr.c:1424
TMR_OVF_FLAG
#define TMR_OVF_FLAG
Definition: at32f435_437_tmr.h:52
TMR6
#define TMR6
Definition: at32f435_437_tmr.h:900
lwip_pkt_handle
void lwip_pkt_handle(void)
called when a frame is received
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:140
time_update
void time_update(void)
updates the system local time
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:154
at32f435_437_int.h
header file of main interrupt service routines.
EMAC_IRQHandler
void EMAC_IRQHandler(void)
this function handles emac handler.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c:131
TMR6_DAC_GLOBAL_IRQHandler
void TMR6_DAC_GLOBAL_IRQHandler(void)
this function handles timer6 overflow handler.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/at32f435_437_int.c:116


AT32F435/437 Firmwary Library: flash.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
Functions
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/flash.c File Reference

flash program More...

#include "flash.h"
#include "iap.h"

Go to the source code of this file.

Functions

void | flash_2kb_write (uint32_t write_addr, uint8_t *pbuffer)
flash erase/program operation. More...
uint32_t | flash_if_write (__IO uint32_t *flash_address, uint32_t *data, uint16_t data_length)
this function writes a data buffer in flash (data are 32-bit aligned). More...
flag_status | flash_upgrade_flag_read (void)
check flash upgrade flag. More...

Detailed Description

flash program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/flash.c.


AT32F435/437 Firmwary Library: flash.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/flash.c
Go to the documentation of this file.
1
27#include "flash.h"
28#include "iap.h"
29
44void flash_2kb_write(uint32_t write_addr, uint8_t *pbuffer)
45{
46 uint16_t index, write_data;
47 static uint32_t erased_addr = 0;
48 flash_unlock();
49 if(SECTOR_SIZE_INDEX == 0x04) /* 4kb/sector size */
50 {
51 if(erased_addr != (write_addr & 0xFFFFF000))
52 {
53 erased_addr = (write_addr & 0xFFFFF000);
54 flash_sector_erase(write_addr);
55 }
56 }
57 else /* 2kb/sector size */
58 {
59 flash_sector_erase(write_addr);
60 }
61 for(index = 0; index < 2048; index += 2)
62 {
63 write_data = (pbuffer[index+1] << 8) + pbuffer[index];
64 flash_halfword_program(write_addr, write_data);
65 write_addr += sizeof(uint16_t);
66 }
67 flash_lock();
68}
69
80uint32_t flash_if_write(__IO uint32_t* flash_address, uint32_t* data ,uint16_t data_length)
81{
82 uint32_t i = 0;
83
84 for (i = 0; (i < data_length) && (*flash_address <= (APP_END_ADDR - 4)); i++)
85 {
86 /* device voltage range supposed to be [2.7v to 3.6v], the operation will
87 be done by word */
88 if (flash_word_program(*flash_address, *(uint32_t*)(data + i)) == FLASH_OPERATE_DONE)
89 {
90 /* check the written value */
91 if (*(uint32_t*)*flash_address != *(uint32_t*)(data + i))
92 {
93 /* flash content doesn't match sram content */
94 return(2);
95 }
96 /* increment flash destination address */
97 *flash_address += 4;
98 }
99 else
100 {
101 /* error occurred while writing data in flash memory */
102 return (1);
103 }
104 }
105
106 return (0);
107}
108
114 flag_status flash_upgrade_flag_read(void)
115{
116 if((*(uint32_t*)IAP_UPGRADE_FLAG_ADDR) == IAP_UPGRADE_FLAG)
117 return SET;
118 else
119 return RESET;
120}
121
flash_2kb_write
void flash_2kb_write(uint32_t write_addr, uint8_t *pbuffer)
flash erase/program operation.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/flash.c:44
flash_if_write
uint32_t flash_if_write(__IO uint32_t *flash_address, uint32_t *data, uint16_t data_length)
this function writes a data buffer in flash (data are 32-bit aligned).
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/flash.c:80
flash_upgrade_flag_read
flag_status flash_upgrade_flag_read(void)
check flash upgrade flag.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/flash.c:114
flag_status
flag_status
Definition: at32f435_437.h:378
RESET
@ RESET
Definition: at32f435_437.h:378
SET
@ SET
Definition: at32f435_437.h:378
flash_sector_erase
flash_status_type flash_sector_erase(uint32_t sector_address)
erase a specified flash sector.
Definition: at32f435_437_flash.c:357
flash_halfword_program
flash_status_type flash_halfword_program(uint32_t address, uint16_t data)
program a halfword at a specified address.
Definition: at32f435_437_flash.c:643
flash_unlock
void flash_unlock(void)
unlock the flash controller.
Definition: at32f435_437_flash.c:290
flash_word_program
flash_status_type flash_word_program(uint32_t address, uint32_t data)
program a word at a specified address.
Definition: at32f435_437_flash.c:608
flash_lock
void flash_lock(void)
lock the flash controller.
Definition: at32f435_437_flash.c:325
FLASH_OPERATE_DONE
@ FLASH_OPERATE_DONE
Definition: at32f435_437_flash.h:203
IAP_UPGRADE_FLAG_ADDR
#define IAP_UPGRADE_FLAG_ADDR
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/inc/iap.h:52
IAP_UPGRADE_FLAG
#define IAP_UPGRADE_FLAG
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/inc/iap.h:64
SECTOR_SIZE_INDEX
#define SECTOR_SIZE_INDEX
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/inc/flash.h:48
APP_END_ADDR
#define APP_END_ADDR
Definition: at32f437_emac_iap_demo/source_code/bootloader/inc/iap.h:54


AT32F435/437 Firmwary Library: fsdata.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
Variables
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c File Reference

fsdata More...

#include "at32f435_437_board.h"
#include "fsdata.h"

Go to the source code of this file.

Variables

static const char | data_index_html []
static const char | data_reset_html []
static const char | data_upload_html []
static const char | data_uploaddone_html []
const struct fsdata_file | file_index_html [] = {{NULL, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}}
const struct fsdata_file | file_reset_html [] = {{file_index_html, data_reset_html, data_reset_html + 12, sizeof(data_reset_html) - 12}}
const struct fsdata_file | file_upload_html [] = {{file_reset_html, data_upload_html, data_upload_html + 13, sizeof(data_upload_html) - 13}}
const struct fsdata_file | file_uploaddone_html [] = {{file_upload_html, data_uploaddone_html, data_uploaddone_html + 17, sizeof(data_uploaddone_html) - 17}}

Detailed Description

fsdata

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.

Variable Documentation

◆ data_index_html

const char data_index_html[]
static

Definition at line 30 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.

◆ data_reset_html

const char data_reset_html[]
static

Definition at line 115 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.

◆ data_upload_html

const char data_upload_html[]
static

Definition at line 169 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.

◆ data_uploaddone_html

const char data_uploaddone_html[]
static

Definition at line 250 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.

◆ file_index_html

const struct fsdata_file file_index_html[] = {{NULL, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}}

Definition at line 324 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.

◆ file_reset_html

const struct fsdata_file file_reset_html[] = {{file_index_html, data_reset_html, data_reset_html + 12, sizeof(data_reset_html) - 12}}

Definition at line 325 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.

◆ file_upload_html

const struct fsdata_file file_upload_html[] = {{file_reset_html, data_upload_html, data_upload_html + 13, sizeof(data_upload_html) - 13}}

Definition at line 326 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.

◆ file_uploaddone_html

const struct fsdata_file file_uploaddone_html[] = {{file_upload_html, data_uploaddone_html, data_uploaddone_html + 17, sizeof(data_uploaddone_html) - 17}}

Definition at line 327 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c.


AT32F435/437 Firmwary Library: fsdata.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "fsdata.h"
29
30static const char data_index_html[] = {
31 0x2f,0x69,0x6e,0x64,0x65,0x78,0x2e,0x68,
32 0x74,0x6d,0x6c,0x00,0x48,0x54,0x54,0x50,
33 0x2f,0x31,0x2e,0x30,0x20,0x32,0x30,0x30,
34 0x20,0x4f,0x4b,0x0d,0x0a,0x53,0x65,0x72,
35 0x76,0x65,0x72,0x3a,0x20,0x75,0x49,0x50,
36 0x2f,0x30,0x2e,0x39,0x20,0x28,0x68,0x74,
37 0x74,0x70,0x3a,0x2f,0x2f,0x64,0x75,0x6e,
38 0x6b,0x65,0x6c,0x73,0x2e,0x63,0x6f,0x6d,
39 0x2f,0x61,0x64,0x61,0x6d,0x2f,0x75,0x69,
40 0x70,0x2f,0x29,0x0d,0x0a,0x43,0x6f,0x6e,
41 0x74,0x65,0x6e,0x74,0x2d,0x74,0x79,0x70,
42 0x65,0x3a,0x20,0x74,0x65,0x78,0x74,0x2f,
43 0x68,0x74,0x6d,0x6c,0x0d,0x0a,0x0d,0x0a,
44 0x3c,0x21,0x44,0x4f,0x43,0x54,0x59,0x50,
45 0x45,0x20,0x48,0x54,0x4d,0x4c,0x20,0x50,
46 0x55,0x42,0x4c,0x49,0x43,0x20,0x22,0x2d,
47 0x2f,0x2f,0x57,0x33,0x43,0x2f,0x44,0x54,
48 0x44,0x20,0x48,0x54,0x4d,0x4c,0x20,0x34,
49 0x2e,0x30,0x20,0x54,0x72,0x61,0x6e,0x73,
50 0x69,0x74,0x69,0x6f,0x6e,0x61,0x6c,0x2f,
51 0x2f,0x45,0x4e,0x22,0x3e,0x0d,0x0a,0x3c,
52 0x68,0x74,0x6d,0x6c,0x3e,0x0d,0x0a,0x3c,
53 0x4d,0x45,0x54,0x41,0x20,0x48,0x54,0x54,
54 0x50,0x2d,0x45,0x51,0x55,0x49,0x56,0x20,
55 0x3d,0x20,0x22,0x50,0x72,0x61,0x67,0x6d,
56 0x61,0x22,0x20,0x43,0x4f,0x4e,0x54,0x45,
57 0x4e,0x54,0x3d,0x22,0x6e,0x6f,0x2d,0x63,
58 0x61,0x63,0x68,0x65,0x22,0x3e,0x0d,0x0a,
59 0x3c,0x74,0x69,0x74,0x6c,0x65,0x3e,0x20,
60 0x41,0x54,0x33,0x32,0x46,0x34,0x33,0x37,
61 0x20,0x49,0x41,0x50,0x20,0x75,0x73,0x69,
62 0x6e,0x67,0x20,0x48,0x54,0x54,0x50,0x20,
63 0x3c,0x2f,0x74,0x69,0x74,0x6c,0x65,0x3e,
64 0x0d,0x0a,0x3c,0x62,0x6f,0x64,0x79,0x3e,
65 0x0d,0x0a,0x3c,0x68,0x32,0x3e,0x4c,0x6f,
66 0x67,0x69,0x6e,0x3c,0x2f,0x68,0x32,0x3e,
67 0x0d,0x0a,0x3c,0x46,0x4f,0x52,0x4d,0x20,
68 0x4d,0x45,0x54,0x48,0x4f,0x44,0x3d,0x50,
69 0x4f,0x53,0x54,0x20,0x41,0x43,0x54,0x49,
70 0x4f,0x4e,0x3d,0x22,0x2f,0x63,0x68,0x65,
71 0x63,0x6b,0x6c,0x6f,0x67,0x69,0x6e,0x2e,
72 0x63,0x67,0x69,0x22,0x3e,0x0d,0x0a,0x3c,
73 0x70,0x3e,0x0d,0x0a,0x3c,0x66,0x6f,0x6e,
74 0x74,0x20,0x73,0x69,0x7a,0x65,0x3d,0x22,
75 0x32,0x22,0x3e,0x20,0x3c,0x73,0x74,0x72,
76 0x6f,0x6e,0x67,0x3e,0x20,0x45,0x6e,0x74,
77 0x65,0x72,0x20,0x75,0x73,0x65,0x72,0x20,
78 0x49,0x44,0x20,0x61,0x6e,0x64,0x20,0x70,
79 0x61,0x73,0x73,0x77,0x6f,0x72,0x64,0x3a,
80 0x20,0x3c,0x2f,0x73,0x74,0x72,0x6f,0x6e,
81 0x67,0x3e,0x3c,0x2f,0x66,0x6f,0x6e,0x74,
82 0x3e,0x0d,0x0a,0x3c,0x42,0x52,0x3e,0x0d,
83 0x0a,0x3c,0x73,0x74,0x72,0x6f,0x6e,0x67,
84 0x3e,0x20,0x55,0x73,0x65,0x72,0x20,0x49,
85 0x44,0x3c,0x2f,0x73,0x74,0x72,0x6f,0x6e,
86 0x67,0x3e,0x20,0x3c,0x69,0x6e,0x70,0x75,
87 0x74,0x20,0x74,0x79,0x70,0x65,0x3d,0x22,
88 0x74,0x65,0x78,0x74,0x22,0x20,0x73,0x69,
89 0x7a,0x65,0x3d,0x22,0x32,0x30,0x22,0x20,
90 0x6e,0x61,0x6d,0x65,0x3d,0x22,0x75,0x73,
91 0x65,0x72,0x6e,0x61,0x6d,0x65,0x22,0x3e,
92 0x0d,0x0a,0x3c,0x73,0x74,0x72,0x6f,0x6e,
93 0x67,0x3e,0x20,0x50,0x61,0x73,0x73,0x77,
94 0x6f,0x72,0x64,0x20,0x3c,0x2f,0x73,0x74,
95 0x72,0x6f,0x6e,0x67,0x3e,0x20,0x20,0x3c,
96 0x69,0x6e,0x70,0x75,0x74,0x20,0x74,0x79,
97 0x70,0x65,0x3d,0x22,0x70,0x61,0x73,0x73,
98 0x77,0x6f,0x72,0x64,0x22,0x20,0x73,0x69,
99 0x7a,0x65,0x3d,0x22,0x32,0x30,0x22,0x20,
100 0x6e,0x61,0x6d,0x65,0x3d,0x22,0x70,0x61,
101 0x73,0x73,0x77,0x6f,0x72,0x64,0x22,0x3e,
102 0x0d,0x0a,0x3c,0x42,0x52,0x3e,0x0d,0x0a,
103 0x3c,0x69,0x6e,0x70,0x75,0x74,0x20,0x74,
104 0x79,0x70,0x65,0x3d,0x22,0x73,0x75,0x62,
105 0x6d,0x69,0x74,0x22,0x20,0x6e,0x61,0x6d,
106 0x65,0x3d,0x22,0x6c,0x6f,0x67,0x69,0x6e,
107 0x22,0x20,0x76,0x61,0x6c,0x75,0x65,0x3d,
108 0x22,0x4c,0x6f,0x67,0x69,0x6e,0x22,0x3e,
109 0x0d,0x0a,0x3c,0x2f,0x70,0x3e,0x0d,0x0a,
110 0x0d,0x0a,0x3c,0x2f,0x66,0x6f,0x72,0x6d,
111 0x3e,0x0d,0x0a,0x3c,0x2f,0x62,0x6f,0x64,
112 0x79,0x3e,0x0d,0x0a,0x3c,0x2f,0x68,0x74,
113 0x6d,0x6c,0x3e,0x0d,0x0a,};
114
115static const char data_reset_html[] = {
116 0x2f,0x72,0x65,0x73,0x65,0x74,0x2e,0x68,
117 0x74,0x6d,0x6c,0x00,0x48,0x54,0x54,0x50,
118 0x2f,0x31,0x2e,0x30,0x20,0x32,0x30,0x30,
119 0x20,0x4f,0x4b,0x0d,0x0a,0x53,0x65,0x72,
120 0x76,0x65,0x72,0x3a,0x20,0x75,0x49,0x50,
121 0x2f,0x30,0x2e,0x39,0x20,0x28,0x68,0x74,
122 0x74,0x70,0x3a,0x2f,0x2f,0x64,0x75,0x6e,
123 0x6b,0x65,0x6c,0x73,0x2e,0x63,0x6f,0x6d,
124 0x2f,0x61,0x64,0x61,0x6d,0x2f,0x75,0x69,
125 0x70,0x2f,0x29,0x0d,0x0a,0x43,0x6f,0x6e,
126 0x74,0x65,0x6e,0x74,0x2d,0x74,0x79,0x70,
127 0x65,0x3a,0x20,0x74,0x65,0x78,0x74,0x2f,
128 0x68,0x74,0x6d,0x6c,0x0d,0x0a,0x0d,0x0a,
129 0x3c,0x21,0x44,0x4f,0x43,0x54,0x59,0x50,
130 0x45,0x20,0x48,0x54,0x4d,0x4c,0x20,0x50,
131 0x55,0x42,0x4c,0x49,0x43,0x20,0x22,0x2d,
132 0x2f,0x2f,0x57,0x33,0x43,0x2f,0x2f,0x44,
133 0x54,0x44,0x20,0x48,0x54,0x4d,0x4c,0x20,
134 0x34,0x2e,0x30,0x31,0x20,0x54,0x72,0x61,
135 0x6e,0x73,0x69,0x74,0x69,0x6f,0x6e,0x61,
136 0x6c,0x2f,0x2f,0x45,0x4e,0x22,0x3e,0x0d,
137 0x0a,0x3c,0x68,0x74,0x6d,0x6c,0x3e,0x20,
138 0x20,0x20,0x20,0x20,0x0d,0x0a,0x20,0x20,
139 0x3c,0x68,0x65,0x61,0x64,0x3e,0x20,0x20,
140 0x20,0x20,0x20,0x20,0x20,0x0d,0x0a,0x20,
141 0x20,0x20,0x20,0x3c,0x6d,0x65,0x74,0x61,
142 0x20,0x68,0x74,0x74,0x70,0x2d,0x65,0x71,
143 0x75,0x69,0x76,0x3d,0x22,0x63,0x6f,0x6e,
144 0x74,0x65,0x6e,0x74,0x2d,0x74,0x79,0x70,
145 0x65,0x22,0x20,0x63,0x6f,0x6e,0x74,0x65,
146 0x6e,0x74,0x3d,0x22,0x74,0x65,0x78,0x74,
147 0x2f,0x68,0x74,0x6d,0x6c,0x3b,0x20,0x63,
148 0x68,0x61,0x72,0x73,0x65,0x74,0x3d,0x77,
149 0x69,0x6e,0x64,0x6f,0x77,0x73,0x2d,0x31,
150 0x32,0x35,0x30,0x22,0x3e,0x20,0x20,0x20,
151 0x20,0x20,0x20,0x20,0x0d,0x0a,0x20,0x20,
152 0x20,0x20,0x3c,0x74,0x69,0x74,0x6c,0x65,
153 0x3e,0x41,0x54,0x33,0x32,0x20,0x49,0x41,
154 0x50,0x20,0x75,0x73,0x69,0x6e,0x67,0x20,
155 0x48,0x54,0x54,0x50,0x20,0x20,0x20,0x20,
156 0x20,0x0d,0x0a,0x20,0x20,0x20,0x20,0x3c,
157 0x2f,0x74,0x69,0x74,0x6c,0x65,0x3e,0x20,
158 0x20,0x20,0x20,0x20,0x0d,0x0a,0x20,0x20,
159 0x3c,0x2f,0x68,0x65,0x61,0x64,0x3e,0x20,
160 0x20,0x20,0x20,0x20,0x0d,0x0a,0x20,0x20,
161 0x3c,0x62,0x6f,0x64,0x79,0x3e,0x20,0x20,
162 0x4d,0x43,0x55,0x20,0x52,0x65,0x73,0x65,
163 0x74,0x20,0x44,0x6f,0x6e,0x65,0x20,0x21,
164 0x20,0x20,0x20,0x20,0x20,0x20,0x0d,0x0a,
165 0x20,0x20,0x3c,0x2f,0x62,0x6f,0x64,0x79,
166 0x3e,0x0d,0x0a,0x3c,0x2f,0x68,0x74,0x6d,
167 0x6c,0x3e,};
168
169static const char data_upload_html[] = {
170 0x2f,0x75,0x70,0x6c,0x6f,0x61,0x64,0x2e,
171 0x68,0x74,0x6d,0x6c,0x00,0x48,0x54,0x54,
172 0x50,0x2f,0x31,0x2e,0x30,0x20,0x32,0x30,
173 0x30,0x20,0x4f,0x4b,0x0d,0x0a,0x53,0x65,
174 0x72,0x76,0x65,0x72,0x3a,0x20,0x75,0x49,
175 0x50,0x2f,0x30,0x2e,0x39,0x20,0x28,0x68,
176 0x74,0x74,0x70,0x3a,0x2f,0x2f,0x64,0x75,
177 0x6e,0x6b,0x65,0x6c,0x73,0x2e,0x63,0x6f,
178 0x6d,0x2f,0x61,0x64,0x61,0x6d,0x2f,0x75,
179 0x69,0x70,0x2f,0x29,0x0d,0x0a,0x43,0x6f,
180 0x6e,0x74,0x65,0x6e,0x74,0x2d,0x74,0x79,
181 0x70,0x65,0x3a,0x20,0x74,0x65,0x78,0x74,
182 0x2f,0x68,0x74,0x6d,0x6c,0x0d,0x0a,0x0d,
183 0x0a,0x3c,0x21,0x44,0x4f,0x43,0x54,0x59,
184 0x50,0x45,0x20,0x48,0x54,0x4d,0x4c,0x20,
185 0x50,0x55,0x42,0x4c,0x49,0x43,0x20,0x22,
186 0x2d,0x2f,0x2f,0x57,0x33,0x43,0x2f,0x2f,
187 0x44,0x54,0x44,0x20,0x48,0x54,0x4d,0x4c,
188 0x20,0x34,0x2e,0x30,0x31,0x20,0x54,0x72,
189 0x61,0x6e,0x73,0x69,0x74,0x69,0x6f,0x6e,
190 0x61,0x6c,0x2f,0x2f,0x45,0x4e,0x22,0x3e,
191 0x0d,0x0a,0x3c,0x68,0x74,0x6d,0x6c,0x3e,
192 0x0d,0x0a,0x20,0x20,0x3c,0x68,0x65,0x61,
193 0x64,0x3e,0x0d,0x0a,0x20,0x20,0x3c,0x6d,
194 0x65,0x74,0x61,0x20,0x68,0x74,0x74,0x70,
195 0x2d,0x65,0x71,0x75,0x69,0x76,0x3d,0x22,
196 0x63,0x6f,0x6e,0x74,0x65,0x6e,0x74,0x2d,
197 0x74,0x79,0x70,0x65,0x22,0x20,0x63,0x6f,
198 0x6e,0x74,0x65,0x6e,0x74,0x3d,0x22,0x74,
199 0x65,0x78,0x74,0x2f,0x68,0x74,0x6d,0x6c,
200 0x3b,0x20,0x63,0x68,0x61,0x72,0x73,0x65,
201 0x74,0x3d,0x77,0x69,0x6e,0x64,0x6f,0x77,
202 0x73,0x2d,0x31,0x32,0x35,0x30,0x22,0x3e,
203 0x0d,0x0a,0x20,0x20,0x3c,0x74,0x69,0x74,
204 0x6c,0x65,0x3e,0x41,0x54,0x33,0x32,0x46,
205 0x34,0x33,0x37,0x20,0x49,0x41,0x50,0x20,
206 0x75,0x73,0x69,0x6e,0x67,0x20,0x48,0x54,
207 0x54,0x50,0x3c,0x2f,0x74,0x69,0x74,0x6c,
208 0x65,0x3e,0x0d,0x0a,0x20,0x20,0x3c,0x2f,
209 0x68,0x65,0x61,0x64,0x3e,0x0d,0x0a,0x20,
210 0x20,0x3c,0x62,0x6f,0x64,0x79,0x3e,0x0d,
211 0x0a,0x20,0x20,0x20,0x20,0x3c,0x66,0x6f,
212 0x72,0x6d,0x20,0x61,0x63,0x74,0x69,0x6f,
213 0x6e,0x20,0x3d,0x22,0x2f,0x75,0x70,0x6c,
214 0x6f,0x61,0x64,0x2e,0x63,0x67,0x69,0x22,
215 0x20,0x65,0x6e,0x63,0x74,0x79,0x70,0x65,
216 0x3d,0x22,0x6d,0x75,0x6c,0x74,0x69,0x70,
217 0x61,0x72,0x74,0x2f,0x66,0x6f,0x72,0x6d,
218 0x2d,0x64,0x61,0x74,0x61,0x22,0x20,0x6d,
219 0x65,0x74,0x68,0x6f,0x64,0x3d,0x22,0x70,
220 0x6f,0x73,0x74,0x22,0x3e,0x0d,0x0a,0x20,
221 0x20,0x3c,0x70,0x3e,0x50,0x6c,0x65,0x61,
222 0x73,0x65,0x20,0x73,0x70,0x65,0x63,0x69,
223 0x66,0x79,0x20,0x61,0x20,0x62,0x69,0x6e,
224 0x61,0x72,0x79,0x20,0x66,0x69,0x6c,0x65,
225 0x20,0x74,0x6f,0x20,0x75,0x70,0x6c,0x6f,
226 0x61,0x64,0x20,0x69,0x6e,0x74,0x6f,0x20,
227 0x41,0x54,0x33,0x32,0x46,0x34,0x33,0x37,
228 0x20,0x66,0x6c,0x61,0x73,0x68,0x3a,0x0d,
229 0x0a,0x20,0x20,0x20,0x20,0x3c,0x62,0x72,
230 0x3e,0x0d,0x0a,0x20,0x20,0x20,0x20,0x3c,
231 0x69,0x6e,0x70,0x75,0x74,0x20,0x74,0x79,
232 0x70,0x65,0x3d,0x22,0x66,0x69,0x6c,0x65,
233 0x22,0x20,0x6e,0x61,0x6d,0x65,0x3d,0x22,
234 0x64,0x61,0x74,0x61,0x66,0x69,0x6c,0x65,
235 0x22,0x20,0x73,0x69,0x7a,0x65,0x3d,0x22,
236 0x34,0x30,0x22,0x3e,0x0d,0x0a,0x20,0x20,
237 0x3c,0x2f,0x70,0x3e,0x0d,0x0a,0x20,0x20,
238 0x3c,0x64,0x69,0x76,0x3e,0x0d,0x0a,0x20,
239 0x20,0x20,0x20,0x3c,0x69,0x6e,0x70,0x75,
240 0x74,0x20,0x74,0x79,0x70,0x65,0x3d,0x22,
241 0x73,0x75,0x62,0x6d,0x69,0x74,0x22,0x20,
242 0x76,0x61,0x6c,0x75,0x65,0x3d,0x22,0x55,
243 0x70,0x6c,0x6f,0x61,0x64,0x22,0x3e,0x0d,
244 0x0a,0x20,0x20,0x3c,0x2f,0x64,0x69,0x76,
245 0x3e,0x0d,0x0a,0x3c,0x2f,0x66,0x6f,0x72,
246 0x6d,0x3e,0x0d,0x0a,0x20,0x20,0x3c,0x2f,
247 0x62,0x6f,0x64,0x79,0x3e,0x0d,0x0a,0x3c,
248 0x2f,0x68,0x74,0x6d,0x6c,0x3e,0x0d,0x0a,};
249
250static const char data_uploaddone_html[] = {
251 0x2f,0x75,0x70,0x6c,0x6f,0x61,0x64,0x64,
252 0x6f,0x6e,0x65,0x2e,0x68,0x74,0x6d,0x6c,
253 0x00,0x48,0x54,0x54,0x50,0x2f,0x31,0x2e,
254 0x30,0x20,0x32,0x30,0x30,0x20,0x4f,0x4b,
255 0x0d,0x0a,0x53,0x65,0x72,0x76,0x65,0x72,
256 0x3a,0x20,0x75,0x49,0x50,0x2f,0x30,0x2e,
257 0x39,0x20,0x28,0x68,0x74,0x74,0x70,0x3a,
258 0x2f,0x2f,0x64,0x75,0x6e,0x6b,0x65,0x6c,
259 0x73,0x2e,0x63,0x6f,0x6d,0x2f,0x61,0x64,
260 0x61,0x6d,0x2f,0x75,0x69,0x70,0x2f,0x29,
261 0x0d,0x0a,0x43,0x6f,0x6e,0x74,0x65,0x6e,
262 0x74,0x2d,0x74,0x79,0x70,0x65,0x3a,0x20,
263 0x74,0x65,0x78,0x74,0x2f,0x68,0x74,0x6d,
264 0x6c,0x0d,0x0a,0x0d,0x0a,0x3c,0x21,0x44,
265 0x4f,0x43,0x54,0x59,0x50,0x45,0x20,0x48,
266 0x54,0x4d,0x4c,0x20,0x50,0x55,0x42,0x4c,
267 0x49,0x43,0x20,0x22,0x2d,0x2f,0x2f,0x57,
268 0x33,0x43,0x2f,0x2f,0x44,0x54,0x44,0x20,
269 0x48,0x54,0x4d,0x4c,0x20,0x34,0x2e,0x30,
270 0x31,0x20,0x54,0x72,0x61,0x6e,0x73,0x69,
271 0x74,0x69,0x6f,0x6e,0x61,0x6c,0x2f,0x2f,
272 0x45,0x4e,0x22,0x3e,0x0d,0x0a,0x3c,0x68,
273 0x74,0x6d,0x6c,0x3e,0x20,0x20,0x20,0x20,
274 0x20,0x0d,0x0a,0x20,0x20,0x3c,0x68,0x65,
275 0x61,0x64,0x3e,0x20,0x20,0x20,0x20,0x20,
276 0x20,0x20,0x0d,0x0a,0x20,0x20,0x20,0x20,
277 0x3c,0x6d,0x65,0x74,0x61,0x20,0x68,0x74,
278 0x74,0x70,0x2d,0x65,0x71,0x75,0x69,0x76,
279 0x3d,0x22,0x63,0x6f,0x6e,0x74,0x65,0x6e,
280 0x74,0x2d,0x74,0x79,0x70,0x65,0x22,0x20,
281 0x63,0x6f,0x6e,0x74,0x65,0x6e,0x74,0x3d,
282 0x22,0x74,0x65,0x78,0x74,0x2f,0x68,0x74,
283 0x6d,0x6c,0x3b,0x20,0x63,0x68,0x61,0x72,
284 0x73,0x65,0x74,0x3d,0x77,0x69,0x6e,0x64,
285 0x6f,0x77,0x73,0x2d,0x31,0x32,0x35,0x30,
286 0x22,0x3e,0x20,0x20,0x20,0x20,0x20,0x20,
287 0x20,0x0d,0x0a,0x20,0x20,0x20,0x20,0x3c,
288 0x74,0x69,0x74,0x6c,0x65,0x3e,0x41,0x54,
289 0x33,0x32,0x20,0x49,0x41,0x50,0x20,0x75,
290 0x73,0x69,0x6e,0x67,0x20,0x48,0x54,0x54,
291 0x50,0x20,0x20,0x20,0x20,0x20,0x0d,0x0a,
292 0x20,0x20,0x20,0x20,0x3c,0x2f,0x74,0x69,
293 0x74,0x6c,0x65,0x3e,0x20,0x20,0x20,0x20,
294 0x20,0x0d,0x0a,0x20,0x20,0x3c,0x2f,0x68,
295 0x65,0x61,0x64,0x3e,0x20,0x20,0x20,0x20,
296 0x20,0x0d,0x0a,0x20,0x20,0x3c,0x62,0x6f,
297 0x64,0x79,0x3e,0x20,0x20,0x46,0x69,0x6c,
298 0x65,0x20,0x55,0x70,0x6c,0x6f,0x61,0x64,
299 0x20,0x44,0x6f,0x6e,0x65,0x21,0x20,0x20,
300 0x20,0x20,0x20,0x20,0x0d,0x0a,0x20,0x20,
301 0x20,0x20,0x3c,0x62,0x72,0x3e,0x20,0x20,
302 0x20,0x20,0x20,0x20,0x20,0x20,0x0d,0x0a,
303 0x20,0x20,0x20,0x20,0x3c,0x66,0x6f,0x72,
304 0x6d,0x20,0x61,0x63,0x74,0x69,0x6f,0x6e,
305 0x20,0x3d,0x22,0x2f,0x72,0x65,0x73,0x65,
306 0x74,0x6d,0x63,0x75,0x2e,0x63,0x67,0x69,
307 0x22,0x20,0x65,0x6e,0x63,0x74,0x79,0x70,
308 0x65,0x3d,0x22,0x74,0x65,0x78,0x74,0x2f,
309 0x70,0x6c,0x61,0x69,0x6e,0x22,0x20,0x6d,
310 0x65,0x74,0x68,0x6f,0x64,0x3d,0x22,0x67,
311 0x65,0x74,0x22,0x3e,0x20,0x20,0x20,0x20,
312 0x0d,0x0a,0x20,0x20,0x20,0x20,0x20,0x20,
313 0x3c,0x69,0x6e,0x70,0x75,0x74,0x20,0x74,
314 0x79,0x70,0x65,0x3d,0x22,0x73,0x75,0x62,
315 0x6d,0x69,0x74,0x22,0x20,0x76,0x61,0x6c,
316 0x75,0x65,0x3d,0x22,0x52,0x65,0x73,0x65,
317 0x74,0x20,0x4d,0x43,0x55,0x22,0x3e,0x0d,
318 0x0a,0x20,0x20,0x20,0x20,0x3c,0x2f,0x66,
319 0x6f,0x72,0x6d,0x3e,0x20,0x20,0x0d,0x0a,
320 0x20,0x20,0x3c,0x2f,0x62,0x6f,0x64,0x79,
321 0x3e,0x0d,0x0a,0x3c,0x2f,0x68,0x74,0x6d,
322 0x6c,0x3e,};
323
324const struct fsdata_file file_index_html[] = {{NULL, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};
325const struct fsdata_file file_reset_html[] = {{file_index_html, data_reset_html, data_reset_html + 12, sizeof(data_reset_html) - 12}};
326const struct fsdata_file file_upload_html[] = {{file_reset_html, data_upload_html, data_upload_html + 13, sizeof(data_upload_html) - 13}};
327const struct fsdata_file file_uploaddone_html[] = {{file_upload_html, data_uploaddone_html, data_uploaddone_html + 17, sizeof(data_uploaddone_html) - 17}};
at32f435_437_board.h
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
fsdata_file
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/inc/fsdata.h:37
file_upload_html
const struct fsdata_file file_upload_html[]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c:326
data_uploaddone_html
static const char data_uploaddone_html[]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c:250
data_upload_html
static const char data_upload_html[]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c:169
data_reset_html
static const char data_reset_html[]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c:115
data_index_html
static const char data_index_html[]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c:30
file_reset_html
const struct fsdata_file file_reset_html[]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c:325
file_index_html
const struct fsdata_file file_index_html[]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c:324
file_uploaddone_html
const struct fsdata_file file_uploaddone_html[]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/fsdata.c:327


AT32F435/437 Firmwary Library: main.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
Functions | Variables
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/main.c File Reference

main program More...

#include "at32f435_437_board.h"
#include "at32f435_437_clock.h"
#include "at32_emac.h"
#include "stdlib.h"
#include "netconf.h"
#include "flash.h"
#include "iap.h"
#include "tmr.h"
#include "httpserver.h"
#include "tftpserver.h"

Go to the source code of this file.

Functions

int main (void)
main function. More...

Variables

volatile uint32_t local_time = 0

Detailed Description

main program

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/main.c.


AT32F435/437 Firmwary Library: main.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/main.c
Go to the documentation of this file.
1
27#include "at32f435_437_board.h"
28#include "at32f435_437_clock.h"
29#include "at32_emac.h"
30#include "stdlib.h"
31#include "netconf.h"
32#include "flash.h"
33#include "iap.h"
34#include "tmr.h"
35#include "httpserver.h"
36#include "tftpserver.h"
37
46volatile uint32_t local_time = 0;
47
53int main(void)
54{
55 error_status status;
56 uint32_t useraddr, sector_size;
57 system_clock_config();
58 at32_board_init();
59
60 /* config nvic priority group */
61 nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
62
63 delay_init();
64
65 /* check iap upgrade */
66 if(at32_button_press()==USER_BUTTON)
67 {
68 iap_command_handle();
69 }
70
71 /* check iap_upgrade_flag flag */
72 if(flash_upgrade_flag_read() == RESET)
73 {
74 /* check app starting address whether 0x08xxxxxx */
75 if(((*(uint32_t*)(APP_START_SECTOR_ADDR + 4)) & 0xFF000000) == 0x08000000)
76 app_load(APP_START_SECTOR_ADDR);
77 }
78
79 status = emac_system_init();
80
81 while(status == ERROR);
82
83 tcpip_stack_init();
84
85 /* init flash */
86 flash_unlock();
87
88 if(SECTOR_SIZE_INDEX == 0x04) /* 4kb/sector size */
89 {
90 sector_size = 4096;
91 }
92 else /* 2kb/sector size */
93 {
94 sector_size = 2048;
95 }
96
97 for(useraddr = APP_START_SECTOR_ADDR; useraddr <= APP_LAST_SECTOR_ADDR; useraddr += sector_size)
98 {
99 flash_sector_erase(useraddr);
100 }
101#ifdef USE_IAP_HTTP
102 /* initialize the http server */
103 iap_httpd_init();
104#endif
105
106#ifdef USE_IAP_TFTP
107 /* initialize the tftp server */
108 iap_tftpd_init();
109#endif
110
111 tmr_init();
112
113 while(1)
114 {
115 lwip_periodic_handle(local_time);
116 }
117}
118
at32f435_437_board.h
emac_system_init
error_status emac_system_init(void)
enable emac clock and gpio clock
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:47
system_clock_config
void system_clock_config(void)
system clock config program
Definition: project/at_start_f435/templates/src/at32f435_437_clock.c:57
sector_size
uint32_t sector_size
Definition: at_start_f435/examples/usb_device/composite_vcp_msc/src/msc_diskio.c:36
status
uint32_t status
Definition: project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c:43
USER_BUTTON
@ USER_BUTTON
Definition: at32f435_437_board.h:98
at32_button_press
button_type at32_button_press()
returns which button have press down
Definition: at32f435_437_board.c:194
delay_init
void delay_init()
initialize delay function
Definition: at32f435_437_board.c:293
at32_board_init
void at32_board_init()
board initialize interface init led and button
Definition: at32f435_437_board.c:138
main
int main(void)
main function.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/main.c:53
local_time
volatile uint32_t local_time
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/main.c:46
error_status
error_status
Definition: at32f435_437.h:380
ERROR
@ ERROR
Definition: at32f435_437.h:380
RESET
@ RESET
Definition: at32f435_437.h:378
flash_sector_erase
flash_status_type flash_sector_erase(uint32_t sector_address)
erase a specified flash sector.
Definition: at32f435_437_flash.c:357
flash_unlock
void flash_unlock(void)
unlock the flash controller.
Definition: at32f435_437_flash.c:290
iap_command_handle
void iap_command_handle(void)
iap command handle handle.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/iap.c:44
tmr_init
void tmr_init(void)
init tmr.
Definition: at32f435_437_usart_iap_demo/source_code/app_led3_toggle/src/tmr.c:44
nvic_priority_group_config
void nvic_priority_group_config(nvic_priority_group_type priority_group)
config nvic priority group
Definition: at32f435_437_misc.c:97
NVIC_PRIORITY_GROUP_4
@ NVIC_PRIORITY_GROUP_4
Definition: at32f435_437_misc.h:71
SECTOR_SIZE_INDEX
#define SECTOR_SIZE_INDEX
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/inc/flash.h:48
APP_START_SECTOR_ADDR
#define APP_START_SECTOR_ADDR
Definition: at32f437_emac_iap_demo/source_code/bootloader/inc/iap.h:52
APP_LAST_SECTOR_ADDR
#define APP_LAST_SECTOR_ADDR
Definition: at32f437_emac_iap_demo/source_code/bootloader/inc/iap.h:53
app_load
void app_load(uint32_t appxaddr)
app load.
Definition: at32f435_437_usart_iap_demo/source_code/bootloader/src/iap.c:60
flash_upgrade_flag_read
flag_status flash_upgrade_flag_read(void)
check flash upgrade flag.
Definition: utilities/at32f435_437_usart_iap_demo/source_code/bootloader/src/flash.c:76
tcpip_stack_init
void tcpip_stack_init(void)
initializes the lwip stack
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:81
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
lwip periodic tasks
Definition: project/at_start_f437/examples/emac/http_server/src/netconf.c:164
httpserver.h
httpserver header file
iap_httpd_init
void iap_httpd_init(void)
tftpserver.h
iap_tftpd_init
void iap_tftpd_init(void)
at32f435_437_clock.h
header file of clock program


AT32F435/437 Firmwary Library: netconf.c File Reference

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
Macros | Functions | Variables
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c File Reference

network connection configuration More...

#include "lwip/memp.h"
#include "lwip/tcp.h"
#include "lwip/priv/tcp_priv.h"
#include "lwip/udp.h"
#include "netif/etharp.h"
#include "lwip/dhcp.h"
#include "ethernetif.h"
#include "netconf.h"
#include "stdio.h"
#include "at32_emac.h"

Go to the source code of this file.

Macros

#define | MAC_ADDR_LENGTH (6)
#define | ADDR_LENGTH (4)
#define | SYSTEMTICK_PERIOD_MS 10

Functions

void | tcpip_stack_init (void)
Initializes the lwIP stack. More...
void | lwip_pkt_handle (void)
Called when a frame is received. More...
void | time_update (void)
updates the system local time More...
void | lwip_periodic_handle (volatile uint32_t localtime)
LwIP periodic tasks. More...

Variables

volatile uint32_t | local_time
flag_status http_iap_flag
flag_status tftp_iap_flag
struct netif | netif
volatile uint32_t | tcp_timer = 0
volatile uint32_t | arp_timer = 0
volatile uint32_t | link_timer = 0
static uint8_t | mac_address [(6)] = {0, 0, 0x44, 0x45, 0x56, 1}
static uint8_t | local_ip [(4)] = {192, 168, 81, 37}
static uint8_t | local_gw [(4)] = {192, 168, 81, 254}
static uint8_t | local_mask [(4)] = {255, 255, 255, 0}

Detailed Description

network connection configuration

Version
v2.0.9
Date
2022-06-28
                  Copyright notice & Disclaimer
The software Board Support Package (BSP) that is made available to download from Artery official website is the copyrighted work of Artery. Artery authorizes customers to use, copy, and distribute the BSP software and its related documentation for the purpose of design and development in conjunction with Artery microcontrollers. Use of the software is governed by this copyright notice and the following disclaimer.

THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.

Definition in file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c.

Macro Definition Documentation

◆ ADDR_LENGTH

#define ADDR_LENGTH (4)

Definition at line 42 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c.

◆ MAC_ADDR_LENGTH

#define MAC_ADDR_LENGTH (6)

Definition at line 41 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c.

◆ SYSTEMTICK_PERIOD_MS

#define SYSTEMTICK_PERIOD_MS 10

Definition at line 43 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c.

Variable Documentation

◆ arp_timer

volatile uint32_t arp_timer = 0

Definition at line 50 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c.

Referenced by lwip_periodic_handle().

◆ http_iap_flag

flag_status http_iap_flag
extern

Referenced by lwip_periodic_handle().

◆ link_timer

volatile uint32_t link_timer = 0

Definition at line 51 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c.

Referenced by lwip_periodic_handle().

◆ local_gw

uint8_t local_gw[(4)] = {192, 168, 81, 254}
static

Definition at line 59 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c.

Referenced by tcpip_stack_init().

◆ local_ip

uint8_t local_ip[(4)] = {192, 168, 81, 37}
static

Definition at line 58 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c.

Referenced by tcpip_stack_init().

◆ local_mask

uint8_t local_mask[(4)] = {255, 255, 255, 0}
static

Definition at line 60 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c.

Referenced by tcpip_stack_init().

◆ mac_address

uint8_t mac_address[(6)] = {0, 0, 0x44, 0x45, 0x56, 1}
static

Definition at line 53 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c.

Referenced by tcpip_stack_init().

◆ netif

struct netif netif

Definition at line 48 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c.

Referenced by lwip_periodic_handle(), lwip_pkt_handle(), and tcpip_stack_init().

◆ tcp_timer

volatile uint32_t tcp_timer = 0

Definition at line 49 of file utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c.

Referenced by lwip_periodic_handle().

◆ tftp_iap_flag

flag_status tftp_iap_flag
extern

Referenced by lwip_periodic_handle().


AT32F435/437 Firmwary Library: netconf.c Source File

  • utilities
  • at32f437_emac_iap_demo
  • source_code
  • bootloader
  • src
utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c
Go to the documentation of this file.
1
27/* Includes ------------------------------------------------------------------*/
28#include "lwip/memp.h"
29#include "lwip/tcp.h"
30#include "lwip/priv/tcp_priv.h"
31#include "lwip/udp.h"
32#include "netif/etharp.h"
33#include "lwip/dhcp.h"
34#include "ethernetif.h"
35#include "netconf.h"
36#include "stdio.h"
37#include "at32_emac.h"
38
39/* Private define ------------------------------------------------------------*/
40/* Private macro -------------------------------------------------------------*/
41#define MAC_ADDR_LENGTH (6)
42#define ADDR_LENGTH (4)
43#define SYSTEMTICK_PERIOD_MS 10
44/* Private variables ---------------------------------------------------------*/
45extern volatile uint32_t local_time;
46extern flag_status http_iap_flag;
47extern flag_status tftp_iap_flag;
48struct netif netif;
49volatile uint32_t tcp_timer = 0;
50volatile uint32_t arp_timer = 0;
51volatile uint32_t link_timer = 0;
52
53static uint8_t mac_address[MAC_ADDR_LENGTH] = {0, 0, 0x44, 0x45, 0x56, 1};;
54#if LWIP_DHCP
55volatile uint32_t dhcp_fine_timer = 0;
56volatile uint32_t dhcp_coarse_timer = 0;
57#else
58static uint8_t local_ip[ADDR_LENGTH] = {192, 168, 81, 37};
59static uint8_t local_gw[ADDR_LENGTH] = {192, 168, 81, 254};
60static uint8_t local_mask[ADDR_LENGTH] = {255, 255, 255, 0};
61#endif
62
63/* Private function prototypes -----------------------------------------------*/
64/* Private functions ---------------------------------------------------------*/
65
71void tcpip_stack_init(void)
72{
73 ip_addr_t ipaddr;
74 ip_addr_t netmask;
75 ip_addr_t gw;
76
77 /* Initializes the dynamic memory heap defined by MEM_SIZE.*/
78 mem_init();
79
80 /* Initializes the memory pools defined by MEMP_NUM_x.*/
81 memp_init();
82
83
84#if LWIP_DHCP //need DHCP server
85 ipaddr.addr = 0;
86 netmask.addr = 0;
87 gw.addr = 0;
88
89#else
90 IP4_ADDR(&ipaddr, local_ip[0], local_ip[1], local_ip[2], local_ip[3]);
91 IP4_ADDR(&netmask, local_mask[0], local_mask[1], local_mask[2], local_mask[3]);
92 IP4_ADDR(&gw, local_gw[0], local_gw[1], local_gw[2], local_gw[3]);
93#endif
94
95 lwip_set_mac_address(mac_address);
96
97 /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
98 struct ip_addr *netmask, struct ip_addr *gw,
99 void *state, err_t (* init)(struct netif *netif),
100 err_t (* input)(struct pbuf *p, struct netif *netif))
101
102 Adds your network interface to the netif_list. Allocate a struct
103 netif and pass a pointer to this structure as the first argument.
104 Give pointers to cleared ip_addr structures when using DHCP,
105 or fill them with sane numbers otherwise. The state pointer may be NULL.
106
107 The init function pointer must point to a initialization function for
108 your ethernet netif interface. The following code illustrates it's use.*/
109
110 if(netif_add(&netif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &netif_input) == NULL)
111 {
112 while(1);
113 }
114
115 /* Registers the default network interface.*/
116 netif_set_default(&netif);
117
118 /* When the netif is fully configured this function must be called.*/
119 netif_set_up(&netif);
120
121 /* Set the link callback function, this function is called on change of link status*/
122 netif_set_link_callback(&netif, ethernetif_update_config);
123}
124
130void lwip_pkt_handle(void)
131{
132 /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */
133 if(ethernetif_input(&netif) != ERR_OK)
134 {
135 while(1);
136 }
137}
138
144void time_update(void)
145{
146 local_time += SYSTEMTICK_PERIOD_MS;
147}
148
154void lwip_periodic_handle(volatile uint32_t localtime)
155{
156
157 /* TCP periodic process every 250 ms */
158 if (localtime - tcp_timer >= TCP_TMR_INTERVAL)
159 {
160 tcp_timer = localtime;
161 tcp_tmr();
162 }
163 /* ARP periodic process every 5s */
164 if (localtime - arp_timer >= ARP_TMR_INTERVAL)
165 {
166 arp_timer = localtime;
167 etharp_tmr();
168 }
169
170#if LWIP_DHCP
171 /* Fine DHCP periodic process every 500ms */
172 if (localtime - dhcp_fine_timer >= DHCP_FINE_TIMER_MSECS)
173 {
174 dhcp_fine_timer = localtime;
175 dhcp_fine_tmr();
176 }
177 /* DHCP Coarse periodic process every 60s */
178 if (localtime - dhcp_coarse_timer >= DHCP_COARSE_TIMER_MSECS)
179 {
180 dhcp_coarse_timer = localtime;
181 dhcp_coarse_tmr();
182 }
183#endif
184
185#if (LINK_DETECTION > 0)
186 /* link detection process every 500 ms */
187 if ((localtime - link_timer >= 500) && (http_iap_flag == RESET) && (tftp_iap_flag == RESET))
188 {
189 link_timer = localtime;
190 ethernetif_set_link(&netif);
191 }
192#endif
193}
ethernetif_set_link
void ethernetif_set_link(void const *argument)
this function sets the netif link status.
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:487
ethernetif_update_config
void ethernetif_update_config(struct netif *netif)
link callback function, this function is called on change of link status to update low level driver c...
Definition: project/at_start_f437/examples/emac/dns_client/src/at32_emac.c:550
local_time
volatile uint32_t local_time
Definition: project/at_start_f437/examples/emac/dns_client/src/main.c:49
flag_status
flag_status
Definition: at32f435_437.h:378
RESET
@ RESET
Definition: at32f435_437.h:378
NULL
#define NULL
Definition: at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h:342
lwip_pkt_handle
void lwip_pkt_handle(void)
Called when a frame is received.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:130
tcpip_stack_init
void tcpip_stack_init(void)
Initializes the lwIP stack.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:71
time_update
void time_update(void)
updates the system local time
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:144
lwip_periodic_handle
void lwip_periodic_handle(volatile uint32_t localtime)
LwIP periodic tasks.
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:154
local_mask
static uint8_t local_mask[(4)]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:60
link_timer
volatile uint32_t link_timer
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:51
local_gw
static uint8_t local_gw[(4)]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:59
ADDR_LENGTH
#define ADDR_LENGTH
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:42
http_iap_flag
flag_status http_iap_flag
arp_timer
volatile uint32_t arp_timer
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:50
MAC_ADDR_LENGTH
#define MAC_ADDR_LENGTH
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:41
tftp_iap_flag
flag_status tftp_iap_flag
SYSTEMTICK_PERIOD_MS
#define SYSTEMTICK_PERIOD_MS
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:43
netif
struct netif netif
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:48
tcp_timer
volatile uint32_t tcp_timer
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:49
local_ip
static uint8_t local_ip[(4)]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:58
mac_address
static uint8_t mac_address[(6)]
Definition: utilities/at32f437_emac_iap_demo/source_code/bootloader/src/netconf.c:53