462 lines
22 KiB
ArmAsm
462 lines
22 KiB
ArmAsm
;**************************************************************************
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;* @file startup_at32f435_437.s
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;* @version v2.0.9
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;* @date 2022-06-28
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;* @brief at32f435_437 startup file for keil
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;**************************************************************************
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;
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; Amount of memory (in bytes) allocated for Stack
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; Tailor this value to your application needs
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000200
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD WWDT_IRQHandler ; Window Watchdog Timer
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DCD PVM_IRQHandler ; PVM through EXINT Line detect
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DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXINT line
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DCD ERTC_WKUP_IRQHandler ; ERTC Wakeup through the EXINT line
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DCD FLASH_IRQHandler ; Flash
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DCD CRM_IRQHandler ; CRM
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DCD EXINT0_IRQHandler ; EXINT Line 0
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DCD EXINT1_IRQHandler ; EXINT Line 1
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DCD EXINT2_IRQHandler ; EXINT Line 2
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DCD EXINT3_IRQHandler ; EXINT Line 3
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DCD EXINT4_IRQHandler ; EXINT Line 4
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DCD EDMA_Stream1_IRQHandler ; EDMA Stream 1
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DCD EDMA_Stream2_IRQHandler ; EDMA Stream 2
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DCD EDMA_Stream3_IRQHandler ; EDMA Stream 3
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DCD EDMA_Stream4_IRQHandler ; EDMA Stream 4
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DCD EDMA_Stream5_IRQHandler ; EDMA Stream 5
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DCD EDMA_Stream6_IRQHandler ; EDMA Stream 6
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DCD EDMA_Stream7_IRQHandler ; EDMA Stream 7
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DCD ADC1_2_3_IRQHandler ; ADC1 & ADC2 & ADC3
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DCD CAN1_TX_IRQHandler ; CAN1 TX
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DCD CAN1_RX0_IRQHandler ; CAN1 RX0
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DCD CAN1_RX1_IRQHandler ; CAN1 RX1
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DCD CAN1_SE_IRQHandler ; CAN1 SE
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DCD EXINT9_5_IRQHandler ; EXINT Line [9:5]
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DCD TMR1_BRK_TMR9_IRQHandler ; TMR1 Brake and TMR9
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DCD TMR1_OVF_TMR10_IRQHandler ; TMR1 Overflow and TMR10
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DCD TMR1_TRG_HALL_TMR11_IRQHandler ; TMR1 Trigger and hall and TMR11
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DCD TMR1_CH_IRQHandler ; TMR1 Channel
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DCD TMR2_GLOBAL_IRQHandler ; TMR2
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DCD TMR3_GLOBAL_IRQHandler ; TMR3
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DCD TMR4_GLOBAL_IRQHandler ; TMR4
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DCD I2C1_EVT_IRQHandler ; I2C1 Event
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DCD I2C1_ERR_IRQHandler ; I2C1 Error
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DCD I2C2_EVT_IRQHandler ; I2C2 Event
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DCD I2C2_ERR_IRQHandler ; I2C2 Error
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DCD SPI1_IRQHandler ; SPI1
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DCD SPI2_I2S2EXT_IRQHandler ; SPI2
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DCD USART1_IRQHandler ; USART1
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DCD USART2_IRQHandler ; USART2
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DCD USART3_IRQHandler ; USART3
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DCD EXINT15_10_IRQHandler ; EXINT Line [15:10]
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DCD ERTCAlarm_IRQHandler ; RTC Alarm through EXINT Line
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DCD OTGFS1_WKUP_IRQHandler ; OTGFS1 Wakeup from suspend
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DCD TMR8_BRK_TMR12_IRQHandler ; TMR8 Brake and TMR12
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DCD TMR8_OVF_TMR13_IRQHandler ; TMR8 Overflow and TMR13
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DCD TMR8_TRG_HALL_TMR14_IRQHandler ; TMR8 Trigger and hall and TMR14
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DCD TMR8_CH_IRQHandler ; TMR8 Channel
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DCD EDMA_Stream8_IRQHandler ; EDMA Stream 8
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DCD XMC_IRQHandler ; XMC
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DCD SDIO1_IRQHandler ; SDIO1
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DCD TMR5_GLOBAL_IRQHandler ; TMR5
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DCD SPI3_I2S3EXT_IRQHandler ; SPI3
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DCD UART4_IRQHandler ; UART4
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DCD UART5_IRQHandler ; UART5
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DCD TMR6_DAC_GLOBAL_IRQHandler ; TMR6 & DAC
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DCD TMR7_GLOBAL_IRQHandler ; TMR7
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DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
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DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
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DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
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DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
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DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
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DCD EMAC_IRQHandler ; EMAC
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DCD EMAC_WKUP_IRQHandler ; EMAC Wakeup
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DCD CAN2_TX_IRQHandler ; CAN2 TX
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DCD CAN2_RX0_IRQHandler ; CAN2 RX0
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DCD CAN2_RX1_IRQHandler ; CAN2 RX1
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DCD CAN2_SE_IRQHandler ; CAN2 SE
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DCD OTGFS1_IRQHandler ; OTGFS1
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DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
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DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
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DCD 0 ; Reserved
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DCD USART6_IRQHandler ; USART6
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DCD I2C3_EVT_IRQHandler ; I2C3 Event
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DCD I2C3_ERR_IRQHandler ; I2C3 Error
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD OTGFS2_WKUP_IRQHandler ; OTGFS2 Wakeup from suspend
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DCD OTGFS2_IRQHandler ; OTGFS2
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DCD DVP_IRQHandler ; DVP
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD FPU_IRQHandler ; FPU
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DCD UART7_IRQHandler ; UART7
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DCD UART8_IRQHandler ; UART8
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DCD SPI4_IRQHandler ; SPI4
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD QSPI2_IRQHandler ; QSPI2
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DCD QSPI1_IRQHandler ; QSPI1
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DCD 0 ; Reserved
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DCD DMAMUX_IRQHandler ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SDIO2_IRQHandler ; SDIO2
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DCD ACC_IRQHandler ; ACC
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DCD TMR20_BRK_IRQHandler ; TMR20 Brake
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DCD TMR20_OVF_IRQHandler ; TMR20 Overflow
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DCD TMR20_TRG_HALL_IRQHandler ; TMR20 Trigger and hall
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DCD TMR20_CH_IRQHandler ; TMR20 Channel
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DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
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DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
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DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
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DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
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DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
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DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
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DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT __main
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IMPORT SystemInit
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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MemManage_Handler\
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PROC
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EXPORT MemManage_Handler [WEAK]
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B .
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ENDP
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BusFault_Handler\
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PROC
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EXPORT BusFault_Handler [WEAK]
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B .
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ENDP
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UsageFault_Handler\
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PROC
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EXPORT UsageFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT WWDT_IRQHandler [WEAK]
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EXPORT PVM_IRQHandler [WEAK]
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EXPORT TAMP_STAMP_IRQHandler [WEAK]
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EXPORT ERTC_WKUP_IRQHandler [WEAK]
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EXPORT FLASH_IRQHandler [WEAK]
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EXPORT CRM_IRQHandler [WEAK]
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EXPORT EXINT0_IRQHandler [WEAK]
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EXPORT EXINT1_IRQHandler [WEAK]
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EXPORT EXINT2_IRQHandler [WEAK]
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EXPORT EXINT3_IRQHandler [WEAK]
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EXPORT EXINT4_IRQHandler [WEAK]
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EXPORT EDMA_Stream1_IRQHandler [WEAK]
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EXPORT EDMA_Stream2_IRQHandler [WEAK]
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EXPORT EDMA_Stream3_IRQHandler [WEAK]
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EXPORT EDMA_Stream4_IRQHandler [WEAK]
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EXPORT EDMA_Stream5_IRQHandler [WEAK]
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EXPORT EDMA_Stream6_IRQHandler [WEAK]
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EXPORT EDMA_Stream7_IRQHandler [WEAK]
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EXPORT ADC1_2_3_IRQHandler [WEAK]
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EXPORT CAN1_TX_IRQHandler [WEAK]
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EXPORT CAN1_RX0_IRQHandler [WEAK]
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EXPORT CAN1_RX1_IRQHandler [WEAK]
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EXPORT CAN1_SE_IRQHandler [WEAK]
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EXPORT EXINT9_5_IRQHandler [WEAK]
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EXPORT TMR1_BRK_TMR9_IRQHandler [WEAK]
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EXPORT TMR1_OVF_TMR10_IRQHandler [WEAK]
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EXPORT TMR1_TRG_HALL_TMR11_IRQHandler [WEAK]
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EXPORT TMR1_CH_IRQHandler [WEAK]
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EXPORT TMR2_GLOBAL_IRQHandler [WEAK]
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EXPORT TMR3_GLOBAL_IRQHandler [WEAK]
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EXPORT TMR4_GLOBAL_IRQHandler [WEAK]
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EXPORT I2C1_EVT_IRQHandler [WEAK]
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EXPORT I2C1_ERR_IRQHandler [WEAK]
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EXPORT I2C2_EVT_IRQHandler [WEAK]
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EXPORT I2C2_ERR_IRQHandler [WEAK]
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EXPORT SPI1_IRQHandler [WEAK]
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EXPORT SPI2_I2S2EXT_IRQHandler [WEAK]
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EXPORT USART1_IRQHandler [WEAK]
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EXPORT USART2_IRQHandler [WEAK]
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EXPORT USART3_IRQHandler [WEAK]
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EXPORT EXINT15_10_IRQHandler [WEAK]
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EXPORT ERTCAlarm_IRQHandler [WEAK]
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EXPORT OTGFS1_WKUP_IRQHandler [WEAK]
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EXPORT TMR8_BRK_TMR12_IRQHandler [WEAK]
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EXPORT TMR8_OVF_TMR13_IRQHandler [WEAK]
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EXPORT TMR8_TRG_HALL_TMR14_IRQHandler [WEAK]
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EXPORT TMR8_CH_IRQHandler [WEAK]
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EXPORT EDMA_Stream8_IRQHandler [WEAK]
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EXPORT XMC_IRQHandler [WEAK]
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EXPORT SDIO1_IRQHandler [WEAK]
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EXPORT TMR5_GLOBAL_IRQHandler [WEAK]
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EXPORT SPI3_I2S3EXT_IRQHandler [WEAK]
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EXPORT UART4_IRQHandler [WEAK]
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EXPORT UART5_IRQHandler [WEAK]
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EXPORT TMR6_DAC_GLOBAL_IRQHandler [WEAK]
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EXPORT TMR7_GLOBAL_IRQHandler [WEAK]
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EXPORT DMA1_Channel1_IRQHandler [WEAK]
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EXPORT DMA1_Channel2_IRQHandler [WEAK]
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EXPORT DMA1_Channel3_IRQHandler [WEAK]
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EXPORT DMA1_Channel4_IRQHandler [WEAK]
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EXPORT DMA1_Channel5_IRQHandler [WEAK]
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EXPORT EMAC_IRQHandler [WEAK]
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EXPORT EMAC_WKUP_IRQHandler [WEAK]
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EXPORT CAN2_TX_IRQHandler [WEAK]
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EXPORT CAN2_RX0_IRQHandler [WEAK]
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EXPORT CAN2_RX1_IRQHandler [WEAK]
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EXPORT CAN2_SE_IRQHandler [WEAK]
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EXPORT OTGFS1_IRQHandler [WEAK]
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EXPORT DMA1_Channel6_IRQHandler [WEAK]
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EXPORT DMA1_Channel7_IRQHandler [WEAK]
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EXPORT USART6_IRQHandler [WEAK]
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EXPORT I2C3_EVT_IRQHandler [WEAK]
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EXPORT I2C3_ERR_IRQHandler [WEAK]
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EXPORT OTGFS2_WKUP_IRQHandler [WEAK]
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EXPORT OTGFS2_IRQHandler [WEAK]
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EXPORT DVP_IRQHandler [WEAK]
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EXPORT FPU_IRQHandler [WEAK]
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EXPORT UART7_IRQHandler [WEAK]
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EXPORT UART8_IRQHandler [WEAK]
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EXPORT SPI4_IRQHandler [WEAK]
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EXPORT QSPI2_IRQHandler [WEAK]
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EXPORT QSPI1_IRQHandler [WEAK]
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EXPORT DMAMUX_IRQHandler [WEAK]
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EXPORT SDIO2_IRQHandler [WEAK]
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EXPORT ACC_IRQHandler [WEAK]
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EXPORT TMR20_BRK_IRQHandler [WEAK]
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EXPORT TMR20_OVF_IRQHandler [WEAK]
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EXPORT TMR20_TRG_HALL_IRQHandler [WEAK]
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EXPORT TMR20_CH_IRQHandler [WEAK]
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EXPORT DMA2_Channel1_IRQHandler [WEAK]
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EXPORT DMA2_Channel2_IRQHandler [WEAK]
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EXPORT DMA2_Channel3_IRQHandler [WEAK]
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EXPORT DMA2_Channel4_IRQHandler [WEAK]
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EXPORT DMA2_Channel5_IRQHandler [WEAK]
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EXPORT DMA2_Channel6_IRQHandler [WEAK]
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EXPORT DMA2_Channel7_IRQHandler [WEAK]
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WWDT_IRQHandler
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PVM_IRQHandler
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TAMP_STAMP_IRQHandler
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ERTC_WKUP_IRQHandler
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FLASH_IRQHandler
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CRM_IRQHandler
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EXINT0_IRQHandler
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EXINT1_IRQHandler
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EXINT2_IRQHandler
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EXINT3_IRQHandler
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EXINT4_IRQHandler
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EDMA_Stream1_IRQHandler
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EDMA_Stream2_IRQHandler
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EDMA_Stream3_IRQHandler
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EDMA_Stream4_IRQHandler
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EDMA_Stream5_IRQHandler
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EDMA_Stream6_IRQHandler
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EDMA_Stream7_IRQHandler
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ADC1_2_3_IRQHandler
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CAN1_TX_IRQHandler
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CAN1_RX0_IRQHandler
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CAN1_RX1_IRQHandler
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CAN1_SE_IRQHandler
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EXINT9_5_IRQHandler
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TMR1_BRK_TMR9_IRQHandler
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TMR1_OVF_TMR10_IRQHandler
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TMR1_TRG_HALL_TMR11_IRQHandler
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TMR1_CH_IRQHandler
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TMR2_GLOBAL_IRQHandler
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TMR3_GLOBAL_IRQHandler
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TMR4_GLOBAL_IRQHandler
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I2C1_EVT_IRQHandler
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I2C1_ERR_IRQHandler
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I2C2_EVT_IRQHandler
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I2C2_ERR_IRQHandler
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SPI1_IRQHandler
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SPI2_I2S2EXT_IRQHandler
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USART1_IRQHandler
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USART2_IRQHandler
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USART3_IRQHandler
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EXINT15_10_IRQHandler
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ERTCAlarm_IRQHandler
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OTGFS1_WKUP_IRQHandler
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TMR8_BRK_TMR12_IRQHandler
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TMR8_OVF_TMR13_IRQHandler
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TMR8_TRG_HALL_TMR14_IRQHandler
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TMR8_CH_IRQHandler
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EDMA_Stream8_IRQHandler
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XMC_IRQHandler
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SDIO1_IRQHandler
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TMR5_GLOBAL_IRQHandler
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SPI3_I2S3EXT_IRQHandler
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UART4_IRQHandler
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UART5_IRQHandler
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TMR6_DAC_GLOBAL_IRQHandler
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TMR7_GLOBAL_IRQHandler
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DMA1_Channel1_IRQHandler
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DMA1_Channel2_IRQHandler
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DMA1_Channel3_IRQHandler
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DMA1_Channel4_IRQHandler
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DMA1_Channel5_IRQHandler
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EMAC_IRQHandler
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EMAC_WKUP_IRQHandler
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CAN2_TX_IRQHandler
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CAN2_RX0_IRQHandler
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CAN2_RX1_IRQHandler
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CAN2_SE_IRQHandler
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OTGFS1_IRQHandler
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DMA1_Channel6_IRQHandler
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DMA1_Channel7_IRQHandler
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USART6_IRQHandler
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I2C3_EVT_IRQHandler
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I2C3_ERR_IRQHandler
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OTGFS2_WKUP_IRQHandler
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OTGFS2_IRQHandler
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DVP_IRQHandler
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FPU_IRQHandler
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UART7_IRQHandler
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UART8_IRQHandler
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SPI4_IRQHandler
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QSPI2_IRQHandler
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QSPI1_IRQHandler
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DMAMUX_IRQHandler
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SDIO2_IRQHandler
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ACC_IRQHandler
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TMR20_BRK_IRQHandler
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TMR20_OVF_IRQHandler
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TMR20_TRG_HALL_IRQHandler
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TMR20_CH_IRQHandler
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DMA2_Channel1_IRQHandler
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DMA2_Channel2_IRQHandler
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DMA2_Channel3_IRQHandler
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DMA2_Channel4_IRQHandler
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DMA2_Channel5_IRQHandler
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DMA2_Channel6_IRQHandler
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DMA2_Channel7_IRQHandler
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B .
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ENDP
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ALIGN
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;*******************************************************************************
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; User Stack and Heap initialization
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;*******************************************************************************
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, = (Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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ENDIF
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END
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