231 lines
7.0 KiB
C
231 lines
7.0 KiB
C
/**
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**************************************************************************
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* @file at32f435_437_pwc.h
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* @version v2.0.9
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* @date 2022-06-28
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* @brief at32f435_437 pwr header file
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**************************************************************************
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* Copyright notice & Disclaimer
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*
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* The software Board Support Package (BSP) that is made available to
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* download from Artery official website is the copyrighted work of Artery.
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* Artery authorizes customers to use, copy, and distribute the BSP
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* software and its related documentation for the purpose of design and
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* development in conjunction with Artery microcontrollers. Use of the
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* software is governed by this copyright notice and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
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* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
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* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
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* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
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* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
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*
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**************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __AT32F435_437_PWC_H
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#define __AT32F435_437_PWC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "at32f435_437.h"
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/** @addtogroup AT32F435_437_periph_driver
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* @{
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*/
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/** @addtogroup PWC
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* @{
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*/
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/** @defgroup PWC_flags_definition
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* @brief pwc flag
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* @{
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*/
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#define PWC_WAKEUP_FLAG ((uint32_t)0x00000001) /*!< wakeup flag */
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#define PWC_STANDBY_FLAG ((uint32_t)0x00000002) /*!< standby flag */
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#define PWC_PVM_OUTPUT_FLAG ((uint32_t)0x00000004) /*!< pvm output flag */
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/**
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* @}
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*/
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/**
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* @brief pwc wakeup pin num definition
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*/
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#define PWC_WAKEUP_PIN_1 ((uint32_t)0x00000100) /*!< standby wake-up pin1 */
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#define PWC_WAKEUP_PIN_2 ((uint32_t)0x00000200) /*!< standby wake-up pin2 */
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/**
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* @brief select ldo output voltage.
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* @param val: set the ldo output voltage.
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* this parameter can be one of the following values:
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* - PWC_LDO_OUTPUT_1V2
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* - PWC_LDO_OUTPUT_1V3
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* - PWC_LDO_OUTPUT_1V1
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* - PWC_LDO_OUTPUT_1V0
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*/
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#define pwc_ldo_output_voltage_set(val) (PWC->ldoov_bit.ldoovsel = val)
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/** @defgroup PWC_exported_types
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* @{
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*/
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/**
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* @brief pwc pvm voltage type
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*/
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typedef enum
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{
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PWC_PVM_VOLTAGE_2V3 = 0x01, /*!< power voltage monitoring boundary 2.3v */
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PWC_PVM_VOLTAGE_2V4 = 0x02, /*!< power voltage monitoring boundary 2.4v */
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PWC_PVM_VOLTAGE_2V5 = 0x03, /*!< power voltage monitoring boundary 2.5v */
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PWC_PVM_VOLTAGE_2V6 = 0x04, /*!< power voltage monitoring boundary 2.6v */
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PWC_PVM_VOLTAGE_2V7 = 0x05, /*!< power voltage monitoring boundary 2.7v */
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PWC_PVM_VOLTAGE_2V8 = 0x06, /*!< power voltage monitoring boundary 2.8v */
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PWC_PVM_VOLTAGE_2V9 = 0x07 /*!< power voltage monitoring boundary 2.9v */
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} pwc_pvm_voltage_type;
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/**
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* @brief pwc ldo output voltage type
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*/
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typedef enum
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{
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PWC_LDO_OUTPUT_1V2 = 0x00, /*!< ldo output voltage is 1.2v */
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PWC_LDO_OUTPUT_1V3 = 0x01, /*!< ldo output voltage is 1.3v */
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PWC_LDO_OUTPUT_1V1 = 0x04, /*!< ldo output voltage is 1.1v */
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PWC_LDO_OUTPUT_1V0 = 0x05, /*!< ldo output voltage is 1.0v */
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} pwc_ldo_output_voltage_type;
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/**
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* @brief pwc sleep enter type
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*/
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typedef enum
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{
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PWC_SLEEP_ENTER_WFI = 0x00, /*!< use wfi enter sleep mode */
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PWC_SLEEP_ENTER_WFE = 0x01 /*!< use wfe enter sleep mode */
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} pwc_sleep_enter_type ;
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/**
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* @brief pwc deep sleep enter type
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*/
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typedef enum
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{
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PWC_DEEP_SLEEP_ENTER_WFI = 0x00, /*!< use wfi enter deepsleep mode */
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PWC_DEEP_SLEEP_ENTER_WFE = 0x01 /*!< use wfe enter deepsleep mode */
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} pwc_deep_sleep_enter_type ;
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/**
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* @brief pwc regulator type
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*/
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typedef enum
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{
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PWC_REGULATOR_ON = 0x00, /*!< voltage regulator state on when deepsleep mode */
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PWC_REGULATOR_LOW_POWER = 0x01 /*!< voltage regulator state low power when deepsleep mode */
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} pwc_regulator_type ;
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/**
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* @brief type define pwc register all
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*/
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typedef struct
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{
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/**
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* @brief pwc ctrl register, offset:0x00
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*/
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union
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{
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__IO uint32_t ctrl;
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struct
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{
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__IO uint32_t vrsel : 1; /* [0] */
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__IO uint32_t lpsel : 1; /* [1] */
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__IO uint32_t clswef : 1; /* [2] */
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__IO uint32_t clsef : 1; /* [3] */
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__IO uint32_t pvmen : 1; /* [4] */
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__IO uint32_t pvmsel : 3; /* [7:5] */
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__IO uint32_t bpwen : 1; /* [8] */
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__IO uint32_t reserved1 : 23;/* [31:9] */
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} ctrl_bit;
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};
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/**
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* @brief pwc ctrlsts register, offset:0x04
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*/
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union
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{
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__IO uint32_t ctrlsts;
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struct
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{
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__IO uint32_t swef : 1; /* [0] */
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__IO uint32_t sef : 1; /* [1] */
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__IO uint32_t pvmof : 1; /* [2] */
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__IO uint32_t reserved1 : 5; /* [7:3] */
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__IO uint32_t swpen1 : 1; /* [8] */
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__IO uint32_t swpen2 : 1; /* [9] */
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__IO uint32_t reserved2 : 22;/* [31:10] */
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} ctrlsts_bit;
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};
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__IO uint32_t reserved1[2];
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/**
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* @brief pwc ldoov register, offset:0x10
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*/
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union
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{
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__IO uint32_t ldoov;
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struct
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{
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__IO uint32_t ldoovsel : 3; /* [2:0] */
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__IO uint32_t reserved1 : 29;/* [31:3] */
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} ldoov_bit;
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};
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} pwc_type;
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/**
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* @}
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*/
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#define PWC ((pwc_type *) PWC_BASE)
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/** @defgroup PWC_exported_functions
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* @{
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*/
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void pwc_reset(void);
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void pwc_battery_powered_domain_access(confirm_state new_state);
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void pwc_pvm_level_select(pwc_pvm_voltage_type pvm_voltage);
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void pwc_power_voltage_monitor_enable(confirm_state new_state);
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void pwc_wakeup_pin_enable(uint32_t pin_num, confirm_state new_state);
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void pwc_flag_clear(uint32_t pwc_flag);
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flag_status pwc_flag_get(uint32_t pwc_flag);
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void pwc_sleep_mode_enter(pwc_sleep_enter_type pwc_sleep_enter);
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void pwc_deep_sleep_mode_enter(pwc_deep_sleep_enter_type pwc_deep_sleep_enter);
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void pwc_voltage_regulate_set(pwc_regulator_type pwc_regulator);
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void pwc_standby_mode_enter(void);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif
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