413 lines
16 KiB
C
413 lines
16 KiB
C
/**
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**************************************************************************
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* @file at32f435_437_usart.h
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* @version v2.0.9
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* @date 2022-06-28
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* @brief at32f435_437 usart header file
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**************************************************************************
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* Copyright notice & Disclaimer
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*
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* The software Board Support Package (BSP) that is made available to
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* download from Artery official website is the copyrighted work of Artery.
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* Artery authorizes customers to use, copy, and distribute the BSP
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* software and its related documentation for the purpose of design and
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* development in conjunction with Artery microcontrollers. Use of the
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* software is governed by this copyright notice and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
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* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
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* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
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* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
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* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
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*
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**************************************************************************
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*/
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/* define to prevent recursive inclusion -------------------------------------*/
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#ifndef __AT32F435_437_USART_H
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#define __AT32F435_437_USART_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* includes ------------------------------------------------------------------*/
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#include "at32f435_437.h"
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/** @addtogroup AT32F435_437_periph_driver
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* @{
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*/
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/** @addtogroup USART
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* @{
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*/
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/** @defgroup USART_flags_definition
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* @brief usart flag
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* @{
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*/
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#define USART_PERR_FLAG ((uint32_t)0x00000001) /*!< usart parity error flag */
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#define USART_FERR_FLAG ((uint32_t)0x00000002) /*!< usart framing error flag */
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#define USART_NERR_FLAG ((uint32_t)0x00000004) /*!< usart noise error flag */
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#define USART_ROERR_FLAG ((uint32_t)0x00000008) /*!< usart receiver overflow error flag */
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#define USART_IDLEF_FLAG ((uint32_t)0x00000010) /*!< usart idle flag */
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#define USART_RDBF_FLAG ((uint32_t)0x00000020) /*!< usart receive data buffer full flag */
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#define USART_TDC_FLAG ((uint32_t)0x00000040) /*!< usart transmit data complete flag */
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#define USART_TDBE_FLAG ((uint32_t)0x00000080) /*!< usart transmit data buffer empty flag */
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#define USART_BFF_FLAG ((uint32_t)0x00000100) /*!< usart break frame flag */
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#define USART_CTSCF_FLAG ((uint32_t)0x00000200) /*!< usart cts change flag */
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/**
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* @}
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*/
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/** @defgroup USART_interrupts_definition
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* @brief usart interrupt
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* @{
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*/
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#define USART_IDLE_INT MAKE_VALUE(0x0C,0x04) /*!< usart idle interrupt */
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#define USART_RDBF_INT MAKE_VALUE(0x0C,0x05) /*!< usart receive data buffer full interrupt */
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#define USART_TDC_INT MAKE_VALUE(0x0C,0x06) /*!< usart transmit data complete interrupt */
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#define USART_TDBE_INT MAKE_VALUE(0x0C,0x07) /*!< usart transmit data buffer empty interrupt */
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#define USART_PERR_INT MAKE_VALUE(0x0C,0x08) /*!< usart parity error interrupt */
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#define USART_BF_INT MAKE_VALUE(0x10,0x06) /*!< usart break frame interrupt */
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#define USART_ERR_INT MAKE_VALUE(0x14,0x00) /*!< usart error interrupt */
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#define USART_CTSCF_INT MAKE_VALUE(0x14,0x0A) /*!< usart cts change interrupt */
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/**
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* @}
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*/
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/** @defgroup USART_exported_types
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* @{
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*/
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/**
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* @brief usart parity selection type
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*/
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typedef enum
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{
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USART_PARITY_NONE = 0x00, /*!< usart no parity */
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USART_PARITY_EVEN = 0x01, /*!< usart even parity */
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USART_PARITY_ODD = 0x02 /*!< usart odd parity */
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} usart_parity_selection_type;
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/**
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* @brief usart wakeup mode type
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*/
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typedef enum
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{
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USART_WAKEUP_BY_IDLE_FRAME = 0x00, /*!< usart wakeup by idle frame */
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USART_WAKEUP_BY_MATCHING_ID = 0x01 /*!< usart wakeup by matching id */
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} usart_wakeup_mode_type;
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/**
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* @brief usart data bit num type
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*/
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typedef enum
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{
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USART_DATA_7BITS = 0x00, /*!< usart data size is 7 bits */
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USART_DATA_8BITS = 0x01, /*!< usart data size is 8 bits */
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USART_DATA_9BITS = 0x02 /*!< usart data size is 9 bits */
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} usart_data_bit_num_type;
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/**
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* @brief usart break frame bit num type
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*/
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typedef enum
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{
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USART_BREAK_10BITS = 0x00, /*!< usart lin mode berak frame detection 10 bits */
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USART_BREAK_11BITS = 0x01 /*!< usart lin mode berak frame detection 11 bits */
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} usart_break_bit_num_type;
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/**
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* @brief usart phase of the clock type
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*/
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typedef enum
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{
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USART_CLOCK_PHASE_1EDGE = 0x00, /*!< usart data capture is done on the clock leading edge */
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USART_CLOCK_PHASE_2EDGE = 0x01 /*!< usart data capture is done on the clock trailing edge */
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} usart_clock_phase_type;
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/**
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* @brief usart polarity of the clock type
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*/
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typedef enum
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{
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USART_CLOCK_POLARITY_LOW = 0x00, /*!< usart clock stay low level outside transmission window */
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USART_CLOCK_POLARITY_HIGH = 0x01 /*!< usart clock stay high level outside transmission window */
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} usart_clock_polarity_type;
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/**
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* @brief usart last bit clock pulse type
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*/
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typedef enum
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{
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USART_CLOCK_LAST_BIT_NONE = 0x00, /*!< usart clock pulse of the last data bit is not outputted */
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USART_CLOCK_LAST_BIT_OUTPUT = 0x01 /*!< usart clock pulse of the last data bit is outputted */
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} usart_lbcp_type;
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/**
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* @brief usart stop bit num type
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*/
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typedef enum
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{
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USART_STOP_1_BIT = 0x00, /*!< usart stop bits num is 1 */
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USART_STOP_0_5_BIT = 0x01, /*!< usart stop bits num is 0.5 */
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USART_STOP_2_BIT = 0x02, /*!< usart stop bits num is 2 */
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USART_STOP_1_5_BIT = 0x03 /*!< usart stop bits num is 1.5 */
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} usart_stop_bit_num_type;
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/**
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* @brief usart hardware flow control type
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*/
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typedef enum
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{
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USART_HARDWARE_FLOW_NONE = 0x00, /*!< usart without hardware flow */
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USART_HARDWARE_FLOW_RTS = 0x01, /*!< usart hardware flow only rts */
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USART_HARDWARE_FLOW_CTS = 0x02, /*!< usart hardware flow only cts */
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USART_HARDWARE_FLOW_RTS_CTS = 0x03 /*!< usart hardware flow both rts and cts */
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} usart_hardware_flow_control_type;
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/**
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* @brief usart identification bit num type
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*/
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typedef enum
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{
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USART_ID_FIXED_4_BIT = 0x00, /*!< usart id bit num fixed 4 bits */
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USART_ID_RELATED_DATA_BIT = 0x01 /*!< usart id bit num related data bits */
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} usart_identification_bit_num_type;
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/**
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* @brief usart de polarity type
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*/
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typedef enum
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{
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USART_DE_POLARITY_HIGH = 0x00, /*!< usart de polarity high */
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USART_DE_POLARITY_LOW = 0x01 /*!< usart de polarity low */
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} usart_de_polarity_type;
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/**
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* @brief type define usart register all
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*/
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typedef struct
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{
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/**
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* @brief usart sts register, offset:0x00
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*/
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union
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{
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__IO uint32_t sts;
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struct
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{
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__IO uint32_t perr : 1; /* [0] */
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__IO uint32_t ferr : 1; /* [1] */
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__IO uint32_t nerr : 1; /* [2] */
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__IO uint32_t roerr : 1; /* [3] */
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__IO uint32_t idlef : 1; /* [4] */
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__IO uint32_t rdbf : 1; /* [5] */
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__IO uint32_t tdc : 1; /* [6] */
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__IO uint32_t tdbe : 1; /* [7] */
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__IO uint32_t bff : 1; /* [8] */
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__IO uint32_t ctscf : 1; /* [9] */
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__IO uint32_t reserved1 : 22;/* [31:10] */
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} sts_bit;
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};
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/**
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* @brief usart dt register, offset:0x04
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*/
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union
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{
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__IO uint32_t dt;
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struct
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{
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__IO uint32_t dt : 9; /* [8:0] */
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__IO uint32_t reserved1 : 23;/* [31:9] */
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} dt_bit;
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};
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/**
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* @brief usart baudr register, offset:0x08
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*/
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union
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{
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__IO uint32_t baudr;
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struct
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{
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__IO uint32_t div : 16;/* [15:0] */
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__IO uint32_t reserved1 : 16;/* [31:16] */
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} baudr_bit;
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};
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/**
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* @brief usart ctrl1 register, offset:0x0C
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*/
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union
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{
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__IO uint32_t ctrl1;
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struct
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{
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__IO uint32_t sbf : 1; /* [0] */
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__IO uint32_t rm : 1; /* [1] */
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__IO uint32_t ren : 1; /* [2] */
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__IO uint32_t ten : 1; /* [3] */
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__IO uint32_t idleien : 1; /* [4] */
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__IO uint32_t rdbfien : 1; /* [5] */
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__IO uint32_t tdcien : 1; /* [6] */
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__IO uint32_t tdbeien : 1; /* [7] */
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__IO uint32_t perrien : 1; /* [8] */
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__IO uint32_t psel : 1; /* [9] */
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__IO uint32_t pen : 1; /* [10] */
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__IO uint32_t wum : 1; /* [11] */
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__IO uint32_t dbn_l : 1; /* [12] */
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__IO uint32_t uen : 1; /* [13] */
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__IO uint32_t reserved1 : 2; /* [15:14] */
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__IO uint32_t tcdt : 5; /* [20:16] */
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__IO uint32_t tsdt : 5; /* [25:21] */
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__IO uint32_t reserved2 : 2; /* [27:26] */
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__IO uint32_t dbn_h : 1; /* [28] */
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__IO uint32_t reserved3 : 3; /* [31:29] */
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} ctrl1_bit;
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};
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/**
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* @brief usart ctrl2 register, offset:0x10
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*/
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union
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{
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__IO uint32_t ctrl2;
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struct
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{
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__IO uint32_t id_l : 4; /* [3:0] */
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__IO uint32_t idbn : 1; /* [4] */
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__IO uint32_t bfbn : 1; /* [5] */
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__IO uint32_t bfien : 1; /* [6] */
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__IO uint32_t reserved1 : 1; /* [7] */
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__IO uint32_t lbcp : 1; /* [8] */
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__IO uint32_t clkpha : 1; /* [9] */
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__IO uint32_t clkpol : 1; /* [10] */
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__IO uint32_t clken : 1; /* [11] */
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__IO uint32_t stopbn : 2; /* [13:12] */
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__IO uint32_t linen : 1; /* [14] */
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__IO uint32_t trpswap : 1; /* [15] */
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__IO uint32_t reserved2 : 12;/* [27:16] */
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__IO uint32_t id_h : 4; /* [31:28] */
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} ctrl2_bit;
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};
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/**
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* @brief usart ctrl3 register, offset:0x14
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*/
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union
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{
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__IO uint32_t ctrl3;
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struct
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{
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__IO uint32_t errien : 1; /* [0] */
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__IO uint32_t irdaen : 1; /* [1] */
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__IO uint32_t irdalp : 1; /* [2] */
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__IO uint32_t slben : 1; /* [3] */
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__IO uint32_t scnacken : 1; /* [4] */
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__IO uint32_t scmen : 1; /* [5] */
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__IO uint32_t dmaren : 1; /* [6] */
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__IO uint32_t dmaten : 1; /* [7] */
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__IO uint32_t rtsen : 1; /* [8] */
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__IO uint32_t ctsen : 1; /* [9] */
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__IO uint32_t ctscfien : 1; /* [10] */
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__IO uint32_t reserved1 : 3; /* [13:11] */
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__IO uint32_t rs485en : 1; /* [14] */
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__IO uint32_t dep : 1; /* [15] */
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__IO uint32_t reserved2 : 16;/* [31:16] */
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} ctrl3_bit;
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};
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/**
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* @brief usart gdiv register, offset:0x18
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*/
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union
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{
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__IO uint32_t gdiv;
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struct
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{
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__IO uint32_t isdiv : 8; /* [7:0] */
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__IO uint32_t scgt : 8; /* [15:8] */
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__IO uint32_t reserved1 : 16;/* [31:16] */
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} gdiv_bit;
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};
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} usart_type;
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/**
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* @}
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*/
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#define USART1 ((usart_type *) USART1_BASE)
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#define USART2 ((usart_type *) USART2_BASE)
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#define USART3 ((usart_type *) USART3_BASE)
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#define UART4 ((usart_type *) UART4_BASE)
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#define UART5 ((usart_type *) UART5_BASE)
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#define USART6 ((usart_type *) USART6_BASE)
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#define UART7 ((usart_type *) UART7_BASE)
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#define UART8 ((usart_type *) UART8_BASE)
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/** @defgroup USART_exported_functions
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* @{
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*/
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void usart_reset(usart_type* usart_x);
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void usart_init(usart_type* usart_x, uint32_t baud_rate, usart_data_bit_num_type data_bit, usart_stop_bit_num_type stop_bit);
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void usart_parity_selection_config(usart_type* usart_x, usart_parity_selection_type parity);
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void usart_enable(usart_type* usart_x, confirm_state new_state);
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void usart_transmitter_enable(usart_type* usart_x, confirm_state new_state);
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void usart_receiver_enable(usart_type* usart_x, confirm_state new_state);
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void usart_clock_config(usart_type* usart_x, usart_clock_polarity_type clk_pol, usart_clock_phase_type clk_pha, usart_lbcp_type clk_lb);
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void usart_clock_enable(usart_type* usart_x, confirm_state new_state);
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void usart_interrupt_enable(usart_type* usart_x, uint32_t usart_int, confirm_state new_state);
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void usart_dma_transmitter_enable(usart_type* usart_x, confirm_state new_state);
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void usart_dma_receiver_enable(usart_type* usart_x, confirm_state new_state);
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void usart_wakeup_id_set(usart_type* usart_x, uint8_t usart_id);
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void usart_wakeup_mode_set(usart_type* usart_x, usart_wakeup_mode_type wakeup_mode);
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void usart_receiver_mute_enable(usart_type* usart_x, confirm_state new_state);
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void usart_break_bit_num_set(usart_type* usart_x, usart_break_bit_num_type break_bit);
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void usart_lin_mode_enable(usart_type* usart_x, confirm_state new_state);
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void usart_data_transmit(usart_type* usart_x, uint16_t data);
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uint16_t usart_data_receive(usart_type* usart_x);
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void usart_break_send(usart_type* usart_x);
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void usart_smartcard_guard_time_set(usart_type* usart_x, uint8_t guard_time_val);
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void usart_irda_smartcard_division_set(usart_type* usart_x, uint8_t div_val);
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void usart_smartcard_mode_enable(usart_type* usart_x, confirm_state new_state);
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void usart_smartcard_nack_set(usart_type* usart_x, confirm_state new_state);
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void usart_single_line_halfduplex_select(usart_type* usart_x, confirm_state new_state);
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void usart_irda_mode_enable(usart_type* usart_x, confirm_state new_state);
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void usart_irda_low_power_enable(usart_type* usart_x, confirm_state new_state);
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void usart_hardware_flow_control_set(usart_type* usart_x,usart_hardware_flow_control_type flow_state);
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flag_status usart_flag_get(usart_type* usart_x, uint32_t flag);
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void usart_flag_clear(usart_type* usart_x, uint32_t flag);
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void usart_rs485_delay_time_config(usart_type* usart_x, uint8_t start_delay_time, uint8_t complete_delay_time);
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void usart_transmit_receive_pin_swap(usart_type* usart_x, confirm_state new_state);
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void usart_id_bit_num_set(usart_type* usart_x, usart_identification_bit_num_type id_bit_num);
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void usart_de_polarity_set(usart_type* usart_x, usart_de_polarity_type de_polarity);
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void usart_rs485_mode_enable(usart_type* usart_x, confirm_state new_state);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif
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