2015-03-17 13:47:56 -07:00
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/*
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Copyright (C) 2014 Marco Veeneman
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file TIVA/LLD/spi_lld.h
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* @brief TM4C123x/TM4C129x SPI subsystem low level driver.
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*
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* @addtogroup SPI
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* @{
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*/
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#ifndef _SPI_LLD_H_
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#define _SPI_LLD_H_
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#if HAL_USE_SPI || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name Control 0
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* @{
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*/
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#define TIVA_CR0_DSS_MASK 0x0F
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#define TIVA_CR0_DSS(n) ((n-1) << 0)
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#define TIVA_CR0_FRF_MASK (3 << 4)
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#define TIVA_CR0_FRF(n) ((n) << 4)
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#define TIVA_CR0_SPO (1 << 6)
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#define TIVA_CR0_SPH (1 << 7)
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#define TIVA_CR0_SRC_MASK (0xFF << 8)
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#define TIVA_CR0_SRC(n) ((n) << 8)
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/** @} */
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/**
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* @name Control 1
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* @{
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*/
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#define TIVA_CR1_LBM (1 << 0)
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#define TIVA_CR1_SSE (1 << 1)
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#define TIVA_CR1_MS (1 << 2)
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#define TIVA_CR1_SOD (1 << 3)
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#define TIVA_CR1_EOT (1 << 4)
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/** @} */
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/**
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* @name Status
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* @{
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*/
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#define TIVA_SR_TFE (1 << 0)
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#define TIVA_SR_TNF (1 << 1)
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#define TIVA_SR_RNE (1 << 2)
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#define TIVA_SR_RFF (1 << 3)
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#define TIVA_SR_BSY (1 << 4)
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/** @} */
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/**
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* @name Interrupt Mask
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* @{
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*/
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#define TIVA_IM_RORIM (1 << 0)
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#define TIVA_IM_RTIM (1 << 1)
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#define TIVA_IM_RXIM (1 << 2)
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#define TIVA_IM_TXIM (1 << 3)
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/** @} */
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/**
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* @name Interrupt Status
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* @{
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*/
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#define TIVA_IS_RORIS (1 << 0)
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#define TIVA_IS_RTIS (1 << 1)
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#define TIVA_IS_RXIS (1 << 2)
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#define TIVA_IS_TXIS (1 << 3)
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/** @} */
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/**
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* @name Masked Interrupt Status
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* @{
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*/
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#define TIVA_MIS_RORMIS (1 << 0)
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#define TIVA_MIS_RTMIS (1 << 1)
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#define TIVA_MIS_RXMIS (1 << 2)
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#define TIVA_MIS_TXMIS (1 << 3)
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/** @} */
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/**
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* @name Interrupt Clear
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* @{
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*/
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#define TIVA_ICR_RORIC (1 << 0)
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#define TIVA_ICR_RTIC (1 << 1)
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/** @} */
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/**
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* @name DMA Control
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* @{
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*/
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#define TIVA_DMACTL_RXDMAE (1 << 0)
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#define TIVA_DMACTL_TXDMAE (1 << 1)
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2015-04-16 12:46:53 -07:00
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/** @} */
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2015-03-17 13:47:56 -07:00
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief SSI0 driver enable switch.
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* @details If set to @p TRUE the support for SSI0 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(TIVA_SPI_USE_SSI0) || defined(__DOXYGEN__)
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#define TIVA_SPI_USE_SSI0 FALSE
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#endif
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/**
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* @brief SSI1 driver enable switch.
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* @details If set to @p TRUE the support for SSI1 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(TIVA_SPI_USE_SSI1) || defined(__DOXYGEN__)
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#define TIVA_SPI_USE_SSI1 FALSE
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#endif
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/**
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* @brief SSI2 driver enable switch.
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* @details If set to @p TRUE the support for SSI2 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(TIVA_SPI_USE_SSI2) || defined(__DOXYGEN__)
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#define TIVA_SPI_USE_SSI2 FALSE
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#endif
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/**
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* @brief SSI3 driver enable switch.
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* @details If set to @p TRUE the support for SSI3 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(TIVA_SPI_USE_SSI3) || defined(__DOXYGEN__)
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#define TIVA_SPI_USE_SSI3 FALSE
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#endif
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/**
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* @brief SPID1 interrupt priority level setting.
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*/
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#if !defined(TIVA_SPI_SSI0_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define TIVA_SPI_SSI0_IRQ_PRIORITY 5
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#endif
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/**
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* @brief SPID2 interrupt priority level setting.
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*/
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#if !defined(TIVA_SPI_SSI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define TIVA_SPI_SSI1_IRQ_PRIORITY 5
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#endif
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/**
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* @brief SPID3 interrupt priority level setting.
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*/
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#if !defined(TIVA_SPI_SSI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define TIVA_SPI_SSI2_IRQ_PRIORITY 5
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#endif
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/**
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* @brief SPID4 interrupt priority level setting.
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*/
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#if !defined(TIVA_SPI_SSI3_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define TIVA_SPI_SSI3_IRQ_PRIORITY 5
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#endif
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/**
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* @brief SPI error hook.
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*/
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#if !defined(TIVA_SPI_SSI_ERROR_HOOK) || defined(__DOXYGEN__)
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#define TIVA_SPI_SSI_ERROR_HOOK(spip) osalSysHalt("SSI failure")
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if TIVA_SPI_USE_SSI0 && !TIVA_HAS_SSI0
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#error "SSI0 not present in the selected device"
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#endif
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#if TIVA_SPI_USE_SSI1 && !TIVA_HAS_SSI1
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#error "SSI1 not present in the selected device"
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#endif
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#if TIVA_SPI_USE_SSI2 && !TIVA_HAS_SSI2
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#error "SSI2 not present in the selected device"
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#endif
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#if TIVA_SPI_USE_SSI3 && !TIVA_HAS_SSI03
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#error "SSI3 not present in the selected device"
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#endif
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#if !TIVA_SPI_USE_SSI0 && !TIVA_SPI_USE_SSI1 && !TIVA_SPI_USE_SSI2 && \
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!TIVA_SPI_USE_SSI3
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#error "SPI driver activated but no SSI peripheral assigned"
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#endif
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#if TIVA_SPI_USE_SSI0 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SPI_SSI0_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to SSI0"
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#endif
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#if TIVA_SPI_USE_SSI1 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SPI_SSI1_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to SSI1"
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#endif
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#if TIVA_SPI_USE_SSI2 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SPI_SSI2_IRQ_PRIORITY)
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2015-03-17 13:47:56 -07:00
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#error "Invalid IRQ priority assigned to SSI2"
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#endif
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#if TM4C123x_SPI_USE_SSI3 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SPI_SSI3_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to SSI3"
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#endif
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#if !defined(TIVA_UDMA_REQUIRED)
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#define TIVA_UDMA_REQUIRED
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Type of a structure representing an SPI driver.
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*/
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typedef struct SPIDriver SPIDriver;
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/**
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* @brief SPI notification callback type.
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*
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* @param[in] spip pointer to the @p SPIDriver object triggering the
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* callback
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*/
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typedef void (*spicallback_t)(SPIDriver *spip);
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/**
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* @brief Driver configuration structure.
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*/
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typedef struct {
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/**
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* @brief Operation complete callback or @p NULL.
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*/
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spicallback_t end_cb;
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/* End of the mandatory fields.*/
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/**
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* @brief The chip select line port.
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*/
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ioportid_t ssport;
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/**
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* @brief The chip select line pad number.
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*/
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uint16_t sspad;
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/**
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* @brief SSI CR0 initialization data.
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*/
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uint16_t cr0;
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/**
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* @brief SSI CPSR initialization data.
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*/
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uint32_t cpsr;
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} SPIConfig;
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/**
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* @brief Structure representing a SPI driver.
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*/
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struct SPIDriver {
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/**
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* @brief Driver state.
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*/
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spistate_t state;
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/**
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* @brief Current configuration data.
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*/
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const SPIConfig *config;
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#if SPI_USE_WAIT || defined(__DOXYGEN__)
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/**
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* @brief Waiting thread.
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*/
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thread_reference_t thread;
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#endif /* SPI_USE_WAIT */
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#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
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/**
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* @brief Mutex protecting the bus.
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*/
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mutex_t mutex;
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#endif /* SPI_USE_MUTUAL_EXCLUSION */
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#if defined(SPI_DRIVER_EXT_FIELDS)
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SPI_DRIVER_EXT_FIELDS
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#endif
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the SSI registers block.
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*/
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SSI_TypeDef *ssi;
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/**
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* @brief Receive DMA channel number.
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*/
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uint8_t dmarxnr;
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/**
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* @brief Transmit DMA channel number.
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*/
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uint8_t dmatxnr;
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/**
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* @brief Receive DMA channel map.
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*/
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uint8_t rxchnmap;
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/**
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* @brief Transmit DMA channel map.
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*/
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uint8_t txchnmap;
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if TIVA_SPI_USE_SSI0 && !defined(__DOXYGEN__)
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extern SPIDriver SPID1;
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#endif
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#if TIVA_SPI_USE_SSI1 && !defined(__DOXYGEN__)
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extern SPIDriver SPID2;
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#endif
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#if TIVA_SPI_USE_SSI2 && !defined(__DOXYGEN__)
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extern SPIDriver SPID3;
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#endif
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#if TIVA_SPI_USE_SSI3 && !defined(__DOXYGEN__)
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extern SPIDriver SPID4;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void spi_lld_init(void);
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void spi_lld_start(SPIDriver *spip);
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void spi_lld_stop(SPIDriver *spip);
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void spi_lld_select(SPIDriver *spip);
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void spi_lld_unselect(SPIDriver *spip);
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void spi_lld_ignore(SPIDriver *spip, size_t n);
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void spi_lld_exchange(SPIDriver *spip, size_t n,
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const void *txbuf, void *rxbuf);
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void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
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void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
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uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_SPI */
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#endif /* _SPI_LLD_H_ */
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/** @} */
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