517 lines
15 KiB
C
517 lines
15 KiB
C
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/*
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ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file hal_adc_lld.h
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* @brief MSP430X ADC subsystem low level driver header.
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*
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* @addtogroup ADC
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* @{
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*/
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#ifndef HAL_ADC_LLD_H
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#define HAL_ADC_LLD_H
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#if (HAL_USE_ADC == TRUE) || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name Sampling rates
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* @{
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*/
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typedef enum {
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MSP430X_ADC_SHT_4 = 0x0000,
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MSP430X_ADC_SHT_8 = 0x1100,
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MSP430X_ADC_SHT_16 = 0x2200,
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MSP430X_ADC_SHT_32 = 0x3300,
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MSP430X_ADC_SHT_64 = 0x4400,
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MSP430X_ADC_SHT_96 = 0x5500,
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MSP430X_ADC_SHT_128 = 0x6600,
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MSP430X_ADC_SHT_192 = 0x7700,
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MSP430X_ADC_SHT_256 = 0x8800,
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MSP430X_ADC_SHT_384 = 0x9900,
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MSP430X_ADC_SHT_512 = 0xAA00
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} MSP430XADCSampleRates;
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/** @} */
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/**
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* @name Resolution
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* @{
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*/
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typedef enum {
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MSP430X_ADC_RES_8BIT = 0x0000,
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MSP430X_ADC_RES_10BIT = 0x0010,
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MSP430X_ADC_RES_12BIT = 0x0020
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} MSP430XADCResolution;
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/** @} */
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/**
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* @name References
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* @{
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*/
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typedef enum {
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MSP430X_ADC_VSS_VCC = 0x0000,
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MSP430X_ADC_VSS_VREF_BUF = 0x0100,
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MSP430X_ADC_VSS_VEREF_N = 0x0200,
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MSP430X_ADC_VSS_VEREF_P_BUF = 0x0300,
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MSP430X_ADC_VSS_VEREF_P = 0x0400,
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MSP430X_ADC_VEREF_P_BUF_VCC = 0x0500,
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MSP430X_ADC_VEREF_P_VCC = 0x0600,
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MSP430X_ADC_VEREF_P_VREF_BUF = 0x0700,
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MSP430X_ADC_VREF_BUF_VCC = 0x0900,
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MSP430X_ADC_VREF_BUF_VEREF_P = 0x0B00,
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MSP430X_ADC_VEREF_N_VCC = 0x0C00,
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MSP430X_ADC_VEREF_N_VREF_BUF = 0x0D00,
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MSP430X_ADC_VEREF_N_VEREF_P = 0x0E00,
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MSP430X_ADC_VEREF_N_VEREF_P_BUF = 0x0F00
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} MSP430XADCReferences;
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typedef enum {
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MSP430X_REF_1V2 = 0x0000,
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MSP430X_REF_2V0 = 0x0010,
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MSP430X_REF_2V5 = 0x0020,
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MSP430X_REF_1V2_EXT = 0x0002,
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MSP430X_REF_2V0_EXT = 0x0012,
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MSP430X_REF_2V5_EXT = 0x0022
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} MSP430XREFSources;
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#define MSP430X_REF_NONE MSP430X_REF_1V2
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/** @} */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name MSP430X configuration options
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* @{
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*/
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/**
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* @brief Stores ADC samples in an 8 bit integer.
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* @note 10 and 12 bit sampling modes must not be used when this option is
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* enabled.
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*/
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#if !defined(MSP430X_ADC_COMPACT_SAMPLES) || defined(__DOXYGEN__)
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#define MSP430X_ADC_COMPACT_SAMPLES FALSE
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#endif
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/**
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* @brief ADC1 driver enable switch.
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* @details If set to @p TRUE the support for ADC1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(MSP430X_ADC_USE_ADC1) || defined(__DOXYGEN__)
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#define MSP430X_ADC_USE_ADC1 TRUE
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#endif
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/**]
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* @brief Exclusive DMA enable switch.
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* @details If set to @p TRUE the support for exclusive DMA is included.
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* @note This increases the size of the compiled executable somewhat.
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* @note The default is @p FALSE.
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*/
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#if !defined(MSP430X_ADC_EXCLUSIVE_DMA) || defined(__DOXYGEN__)
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#define MSP430X_ADC_EXCLUSIVE_DMA FALSE
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#endif
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#if MSP430X_ADC_USE_ADC1
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/**
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* @brief ADC1 clock source configuration
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*/
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#if !defined(MSP430X_ADC1_CLK_SRC)
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#define MSP430X_ADC1_CLK_SRC MSP430X_MODCLK
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#endif
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if MSP430X_ADC_USE_ADC1
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#if !defined(__MSP430_HAS_ADC12_B__)
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#error "No ADC present or ADC version not supported"
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#endif
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#if (MSP430X_ADC1_CLK_SRC == MSP430X_MODCLK)
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#define MSP430X_ADC1_CLK_FREQ MSP430X_MODCLK_FREQ
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#define MSP430X_ADC1_SSEL ADC12SSEL_0
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#elif (MSP430X_ADC1_CLK_SRC == MSP430X_ACLK)
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#define MSP430X_ADC1_CLK_FREQ MSP430X_ACLK_FREQ
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#define MSP430X_ADC1_SSEL ADC12SSEL_1
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#elif (MSP430X_ADC1_CLK_SRC == MSP430X_MCLK)
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#define MSP$30X_ADC1_CLK_FREQ MSP430X_MCLK_FREQ
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#define MSP430X_ADC1_SSEL ADC12SSEL_2
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#elif (MSP430X_ADC1_CLK_SRC == MSP430SMCLK)
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#define MSP430X_ADC1_CLK_FREQ MSP430X_SMCLK_FREQ
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#define MSP430X_ADC1_SSEL ADC12SSEL_3
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#else
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#error "Invalid ADC1 clock source requested!"
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#endif
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#if !defined(MSP430X_ADC1_FREQ)
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#warning "ADC clock frequency not defined - assuming 1 for all dividers"
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#define MSP430X_ADC1_DIV_CALC(x) (x == 1)
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#else
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#define MSP430X_ADC1_DIV_CALC(x) \
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((MSP430X_ADC1_CLK_FREQ / x) == MSP430X_ADC1_FREQ)
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#endif
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/**
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* @brief ADC1 prescaler calculations
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*/
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#if MSP430X_ADC1_DIV_CALC(1)
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#define MSP430X_ADC1_PDIV ADC12PDIV__1
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#define MSP430X_ADC1_DIV ADC12DIV_0
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#elif MSP430X_ADC1_DIV_CALC(2)
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#define MSP430X_ADC1_PDIV ADC12PDIV__1
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#define MSP430X_ADC1_DIV ADC12DIV_1
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#elif MSP430X_ADC1_DIV_CALC(3)
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#define MSP430X_ADC1_PDIV ADC12PDIV__1
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#define MSP430X_ADC1_DIV ADC12DIV_2
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#elif MSP430X_ADC1_DIV_CALC(4)
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#define MSP430X_ADC1_PDIV ADC12PDIV__4
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#define MSP430X_ADC1_DIV ADC12DIV_0
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#elif MSP430X_ADC1_DIV_CALC(5)
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#define MSP430X_ADC1_PDIV ADC12PDIV__1
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#define MSP430X_ADC1_DIV ADC12DIV_4
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#elif MSP430X_ADC1_DIV_CALC(6)
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#define MSP430X_ADC1_PDIV ADC12PDIV__1
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#define MSP430X_ADC1_DIV ADC12DIV_5
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#elif MSP430X_ADC1_DIV_CALC(7)
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#define MSP430X_ADC1_PDIV ADC12PDIV__1
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#define MSP430X_ADC1_DIV ADC12DIV_6
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#elif MSP430X_ADC1_DIV_CALC(8)
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#define MSP430X_ADC1_PDIV ADC12PDIV__4
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#define MSP430X_ADC1_DIV ADC12DIV_2
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#elif MSP430X_ADC1_DIV_CALC(12)
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#define MSP430X_ADC1_PDIV ADC12PDIV__4
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#define MSP430X_ADC1_DIV ADC12DIV_2
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#elif MSP430X_ADC1_DIV_CALC(16)
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#define MSP430X_ADC1_PDIV ADC12PDIV__4
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#define MSP430X_ADC1_DIV ADC12DIV_3
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#elif MSP430X_ADC1_DIV_CALC(20)
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#define MSP430X_ADC1_PDIV ADC12PDIV__4
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#define MSP430X_ADC1_DIV ADC12DIV_4
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#elif MSP430X_ADC1_DIV_CALC(24)
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#define MSP430X_ADC1_PDIV ADC12PDIV__4
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#define MSP430X_ADC1_DIV ADC12DIV_5
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#elif MSP430X_ADC1_DIV_CALC(28)
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#define MSP430X_ADC1_PDIV ADC12PDIV__4
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#define MSP430X_ADC1_DIV ADC12DIV_6
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#elif MSP430X_ADC1_DIV_CALC(32)
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#define MSP430X_ADC1_PDIV ADC12PDIV__32
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#define MSP430X_ADC1_DIV ADC12DIV_0
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#elif MSP430X_ADC1_DIV_CALC(64)
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#define MSP430X_ADC1_PDIV ADC12PDIV__64
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#define MSP430X_ADC1_DIV ADC12DIV_0
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#elif MSP430X_ADC1_DIV_CALC(96)
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#define MSP430X_ADC1_PDIV ADC12PDIV__32
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#define MSP430X_ADC1_DIV ADC12DIV_2
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#elif MSP430X_ADC1_DIV_CALC(128)
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#define MSP430X_ADC1_PDIV ADC12PDIV__64
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#define MSP430X_ADC1_DIV ADC12DIV_1
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#elif MSP430X_ADC1_DIV_CALC(160)
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#define MSP430X_ADC1_PDIV ADC12PDIV__32
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#define MSP430X_ADC1_DIV ADC12DIV_4
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#elif MSP430X_ADC1_DIV_CALC(192)
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#define MSP430X_ADC1_PDIV ADC12PDIV__64
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#define MSP430X_ADC1_DIV ADC12DIV_2
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#elif MSP430X_ADC1_DIV_CALC(224)
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#define MSP430X_ADC1_PDIV ADC12PDIV__32
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#define MSP430X_ADC1_DIV ADC12DIV_6
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#elif MSP430X_ADC1_DIV_CALC(256)
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#define MSP430X_ADC1_PDIV ADC12PDIV__64
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#define MSP430X_ADC1_DIV ADC12DIV_3
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#elif MSP430X_ADC1_DIV_CALC(320)
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#define MSP430X_ADC1_PDIV ADC12PDIV__64
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#define MSP430X_ADC1_DIV ADC12DIV_4
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#elif MSP430X_ADC1_DIV_CALC(384)
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#define MSP430X_ADC1_PDIV ADC12PDIV__64
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#define MSP430X_ADC1_DIV ADC12DIV_5
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#elif MSP430X_ADC1_DIV_CALC(448)
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#define MSP430X_ADC1_PDIV ADC12PDIV__64
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#define MSP430X_ADC1_DIV ADC12DIV_6
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#elif MSP430X_ADC1_DIV_CALC(512)
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#define MSP430X_ADC1_PDIV ADC12PDIV__64
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#define MSP430X_ADC1_DIV ADC12DIV_7
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#else
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#error "MSP430X_ADC1_FREQ not achievable with MSP430X_ADC1_CLK_SRC"
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#endif
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#endif /* MSP430X_ADC_USE_ADC1 */
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief ADC sample data type.
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*/
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#if !MSP430X_ADC_COMPACT_SAMPLES || defined(__DOXYGEN__)
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typedef uint16_t adcsample_t;
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#else
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typedef uint8_t adcsample_t;
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#endif
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/**
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* @brief Channels number in a conversion group.
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*/
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typedef uint8_t adc_channels_num_t;
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/**
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* @brief Possible ADC failure causes.
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* @note Error codes are architecture dependent and should not relied
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* upon.
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*/
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typedef enum {
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ADC_ERR_UNKNOWN = 0, /**< Unknown error has occurred */
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ADC_ERR_OVERFLOW = 1, /**< ADC overflow condition. */
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ADC_ERR_AWD = 2 /**< Analog watchdog triggered. */
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} adcerror_t;
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/**
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* @brief Type of a structure representing an ADC driver.
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*/
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typedef struct ADCDriver ADCDriver;
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/**
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* @brief ADC notification callback type.
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*
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* @param[in] adcp pointer to the @p ADCDriver object triggering the
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* callback
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* @param[in] buffer pointer to the most recent samples data
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* @param[in] n number of buffer rows available starting from @p buffer
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*/
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typedef void (*adccallback_t)(ADCDriver * adcp, adcsample_t * buffer, size_t n);
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/**
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* @brief ADC error callback type.
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*
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* @param[in] adcp pointer to the @p ADCDriver object triggering the
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* callback
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* @param[in] err ADC error code
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*/
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typedef void (*adcerrorcallback_t)(ADCDriver * adcp, adcerror_t err);
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/**
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* @brief MSP430X ADC register structure.
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*/
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typedef struct {
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uint16_t ctl[4];
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uint16_t lo;
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uint16_t hi;
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uint16_t ifgr[3];
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uint16_t ier[3];
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uint16_t iv;
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uint16_t padding[3];
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uint16_t mctl[32];
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uint16_t mem[32];
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} msp430x_adc_reg_t;
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/**
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* @brief MSP430X ADC calibration structure.
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*/
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typedef struct {
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uint16_t CAL_ADC_GAIN_FACTOR;
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uint16_t CAL_ADC_OFFSET;
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uint16_t CAL_ADC_12T30;
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uint16_t CAL_ADC_12T85;
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uint16_t CAL_ADC_20T30;
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uint16_t CAL_ADC_20T85;
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uint16_t CAL_ADC_25T30;
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uint16_t CAL_ADC_25T85;
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} msp430x_adc_cal_t;
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/**
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* @brief MSP430X REF calibration structure.
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*/
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typedef struct {
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uint16_t CAL_ADC_12VREF_FACTOR;
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uint16_t CAL_ADC_20VREF_FACTOR;
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uint16_t CAL_ADC_25VREF_FACTOR;
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} msp430x_ref_cal_t;
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/**
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* @brief Conversion group configuration structure.
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* @details This implementation-dependent structure describes a conversion
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* operation.
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* @note The use of this configuration structure requires knowledge of
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* MSP430X ADC cell registers interface, please refer to the MSP430X
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* reference manual for details.
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*/
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typedef struct {
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/**
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* @brief Enables the circular buffer mode for the group.
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*/
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bool circular;
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/**
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* @brief Number of the analog channels belonging to the conversion group.
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*/
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adc_channels_num_t num_channels;
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/**
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* @brief Callback function associated to the group or @p NULL.
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*/
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adccallback_t end_cb;
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/**
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* @brief Error callback or @p NULL.
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*/
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adcerrorcallback_t error_cb;
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/* End of the mandatory fields.*/
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/**
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* @brief Sequence of analog channels belonging to the conversion group.
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* @note Only the first num_channels are valid.
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*/
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uint8_t channels[32];
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/**
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* @brief Sample resolution
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*/
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MSP430XADCResolution res;
|
||
|
/**
|
||
|
* @brief Sampling time in clock cycles
|
||
|
*/
|
||
|
MSP430XADCSampleRates rate;
|
||
|
/**
|
||
|
* @brief Voltage references to use
|
||
|
*/
|
||
|
MSP430XADCReferences ref;
|
||
|
/**
|
||
|
* @brief VREF source
|
||
|
*/
|
||
|
MSP430XREFSources vref_src;
|
||
|
} ADCConversionGroup;
|
||
|
|
||
|
/**
|
||
|
* @brief Driver configuration structure.
|
||
|
* @note It could be empty on some architectures.
|
||
|
*/
|
||
|
typedef struct {
|
||
|
#if MSP430X_ADC_EXCLUSIVE_DMA == TRUE || defined(__DOXYGEN__)
|
||
|
/**
|
||
|
* @brief The index of the DMA channel.
|
||
|
* @note This may be >MSP430X_DMA_CHANNELS to indicate that exclusive DMA
|
||
|
* is not used.
|
||
|
*/
|
||
|
uint8_t dma_index;
|
||
|
#endif
|
||
|
} ADCConfig;
|
||
|
|
||
|
/**
|
||
|
* @brief Structure representing an ADC driver.
|
||
|
*/
|
||
|
struct ADCDriver {
|
||
|
/**
|
||
|
* @brief Driver state.
|
||
|
*/
|
||
|
adcstate_t state;
|
||
|
/**
|
||
|
* @brief Current configuration data.
|
||
|
*/
|
||
|
const ADCConfig * config;
|
||
|
/**
|
||
|
* @brief Current samples buffer pointer or @p NULL.
|
||
|
*/
|
||
|
adcsample_t * samples;
|
||
|
/**
|
||
|
* @brief Current samples buffer depth or @p 0.
|
||
|
*/
|
||
|
size_t depth;
|
||
|
/**
|
||
|
* @brief Current conversion group pointer or @p NULL.
|
||
|
*/
|
||
|
const ADCConversionGroup * grpp;
|
||
|
#if (ADC_USE_WAIT == TRUE) || defined(__DOXYGEN__)
|
||
|
/**
|
||
|
* @brief Waiting thread.
|
||
|
*/
|
||
|
thread_reference_t thread;
|
||
|
#endif
|
||
|
#if (ADC_USE_MUTUAL_EXCLUSION == TRUE) || defined(__DOXYGEN__)
|
||
|
/**
|
||
|
* @brief Mutex protecting the peripheral.
|
||
|
*/
|
||
|
mutex_t mutex;
|
||
|
#endif
|
||
|
#if defined(ADC_DRIVER_EXT_FIELDS)
|
||
|
ADC_DRIVER_EXT_FIELDS
|
||
|
#endif
|
||
|
/* End of the mandatory fields.*/
|
||
|
/**
|
||
|
* @brief Base address of ADC12_B registers
|
||
|
*/
|
||
|
msp430x_adc_reg_t * regs;
|
||
|
/**
|
||
|
* @brief DMA request structure
|
||
|
*/
|
||
|
msp430x_dma_req_t req;
|
||
|
/**
|
||
|
* @brief ADC calibration structure from TLV
|
||
|
*/
|
||
|
msp430x_adc_cal_t * adc_cal;
|
||
|
/**
|
||
|
* @brief REF calibration structure from TLV
|
||
|
*/
|
||
|
msp430x_ref_cal_t * ref_cal;
|
||
|
/**
|
||
|
* @brief Count of times DMA callback has been called
|
||
|
*/
|
||
|
uint8_t count;
|
||
|
/**
|
||
|
* @brief DMA stream
|
||
|
*/
|
||
|
msp430x_dma_ch_t dma;
|
||
|
};
|
||
|
|
||
|
/*===========================================================================*/
|
||
|
/* Driver macros. */
|
||
|
/*===========================================================================*/
|
||
|
|
||
|
/*===========================================================================*/
|
||
|
/* External declarations. */
|
||
|
/*===========================================================================*/
|
||
|
|
||
|
#if (MSP430X_ADC_USE_ADC1 == TRUE) && !defined(__DOXYGEN__)
|
||
|
extern ADCDriver ADCD1;
|
||
|
#endif
|
||
|
|
||
|
#ifdef __cplusplus
|
||
|
extern "C" {
|
||
|
#endif
|
||
|
void adc_lld_init(void);
|
||
|
void adc_lld_start(ADCDriver * adcp);
|
||
|
void adc_lld_stop(ADCDriver * adcp);
|
||
|
void adc_lld_start_conversion(ADCDriver * adcp);
|
||
|
void adc_lld_stop_conversion(ADCDriver * adcp);
|
||
|
adcsample_t adcMSP430XAdjustResult(ADCConversionGroup * grpp,
|
||
|
adcsample_t sample);
|
||
|
adcsample_t adcMSP430XAdjustTemp(ADCConversionGroup * grpp, adcsample_t sample);
|
||
|
#ifdef __cplusplus
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
#endif /* HAL_USE_ADC == TRUE */
|
||
|
|
||
|
#endif /* HAL_ADC_LLD_H */
|
||
|
|
||
|
/** @} */
|