2014-10-13 14:01:10 -07:00
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/*
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2017-04-20 10:47:50 -07:00
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Copyright (C) 2014..2017 Marco Veeneman
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2014-10-13 14:01:10 -07:00
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file TIVA/TM4C123x/hal_lld.c
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* @brief TM4C123x HAL Driver subsystem low level driver source.
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*
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* @addtogroup HAL
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* @{
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*/
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#include "hal.h"
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level HAL driver initialization.
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*
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* @notapi
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*/
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void hal_lld_init(void)
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{
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}
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/**
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* @brief TM4C123x clocks and PLL initialization.
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* @note All the involved constants come from the file @p board.h and
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* @p mcuconf.h.
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* @note This function should be invoked just after the system reset.
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*
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* @special
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*/
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void tiva_clock_init(void)
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{
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uint32_t rcc, rcc2, i;
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/* 1. Bypass the PLL and system clock divider by setting the BYPASS bit and
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* clearing the USESYSDIV bit in the RCC register, thereby configuring the
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* microcontroller to run off a "raw" clock source and allowing for the new
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* PLL configuration to be validated before switching the system clock to the
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* PLL. */
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/* read */
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2016-08-24 11:43:29 -07:00
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rcc = HWREG(SYSCTL_RCC);
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rcc2 = HWREG(SYSCTL_RCC2);
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2014-10-13 14:01:10 -07:00
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/* modify */
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2016-10-27 15:03:49 -07:00
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rcc |= SYSCTL_RCC_BYPASS;
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rcc &= ~SYSCTL_RCC_USESYSDIV;
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rcc2 |= SYSCTL_RCC2_BYPASS2 | SYSCTL_RCC2_USERCC2;
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2014-10-13 14:01:10 -07:00
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/* write */
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2016-08-24 11:43:29 -07:00
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HWREG(SYSCTL_RCC) = rcc;
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HWREG(SYSCTL_RCC2) = rcc2;
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2014-10-13 14:01:10 -07:00
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/* 2 Select the crystal value (XTAL) and oscillator source (OSCSRC), and
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* clear the PWRDN bit in RCC and RCC2. Setting the XTAL field automatically
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* pulls valid PLL configuration data for the appropriate crystal, and
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* clearing the PWRDN bit powers and enables the PLL and its output. */
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/* modify */
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2016-10-27 15:03:49 -07:00
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rcc &= ~(SYSCTL_RCC_OSCSRC_M | SYSCTL_RCC_XTAL_M | SYSCTL_RCC_PWRDN | SYSCTL_RCC_MOSCDIS);
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rcc |= ((TIVA_XTAL | TIVA_OSCSRC | TIVA_MOSCDIS) & (SYSCTL_RCC_XTAL_M | SYSCTL_RCC_OSCSRC_M | SYSCTL_RCC_MOSCDIS));
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rcc2 &= ~(SYSCTL_RCC2_OSCSRC2_M | SYSCTL_RCC2_PWRDN2);
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rcc2 |= ((TIVA_OSCSRC | TIVA_DIV400) & (SYSCTL_RCC2_OSCSRC2_M | SYSCTL_RCC2_DIV400));
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2014-10-13 14:01:10 -07:00
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/* write */
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2016-08-24 11:43:29 -07:00
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HWREG(SYSCTL_RCC) = rcc;
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HWREG(SYSCTL_RCC2) = rcc2;
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2014-10-13 14:01:10 -07:00
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for(i = 100000; i; i--);
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/* 3. Select the desired system divider (SYSDIV) in RCC and RCC2 and set the
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* USESYSDIV bit in RCC. The SYSDIV field determines the system frequency for
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* the microcontroller. */
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/* modify */
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2016-10-27 15:03:49 -07:00
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rcc &= ~SYSCTL_RCC_SYSDIV_M;
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rcc |= (TIVA_SYSDIV & SYSCTL_RCC_SYSDIV_M) | SYSCTL_RCC_USESYSDIV;
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rcc2 &= ~(SYSCTL_RCC2_SYSDIV2_M | SYSCTL_RCC2_SYSDIV2LSB);
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rcc2 |= ((TIVA_SYSDIV2 | TIVA_SYSDIV2LSB) & (SYSCTL_RCC2_SYSDIV2_M | SYSCTL_RCC2_SYSDIV2LSB));
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2014-10-13 14:01:10 -07:00
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/* write */
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2016-08-24 11:43:29 -07:00
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HWREG(SYSCTL_RCC) = rcc;
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HWREG(SYSCTL_RCC2) = rcc2;
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2014-10-13 14:01:10 -07:00
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/* 4. Wait for the PLL to lock by polling the PLLLRIS bit in the Raw
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* Interrupt Status (RIS) register. */
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while ((HWREG(SYSCTL_RIS) & SYSCTL_RIS_PLLLRIS) == 0);
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2014-10-13 14:01:10 -07:00
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/* 5. Enable use of the PLL by clearing the BYPASS bit in RCC and RCC2. */
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rcc &= ~SYSCTL_RCC_BYPASS;
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rcc2 &= ~SYSCTL_RCC2_BYPASS2;
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2014-10-13 14:01:10 -07:00
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rcc |= (TIVA_BYPASS_VALUE << 11);
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rcc2 |= (TIVA_BYPASS_VALUE << 11);
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2016-08-24 11:43:29 -07:00
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HWREG(SYSCTL_RCC) = rcc;
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HWREG(SYSCTL_RCC2) = rcc2;
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2014-10-13 14:01:10 -07:00
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#if HAL_USE_PWM
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2016-08-24 11:43:29 -07:00
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HWREG(SYSCTL_RCC) |= TIVA_PWM_FIELDS;
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2014-10-13 14:01:10 -07:00
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#endif
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2015-03-17 13:49:01 -07:00
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#if defined(TIVA_UDMA_REQUIRED)
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udmaInit();
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#endif
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2014-10-13 14:01:10 -07:00
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}
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/**
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* @}
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*/
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