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Merge pull request #90 from sdalu/ioport1 

use IOPORT1 instead of NRF_GPIO
This commit is contained in:
Fabio Utzig 2016-07-09 16:47:11 -03:00 committed by GitHub
parent 8306aabdfc f78e2ae7d4
commit 097a59799a
2 changed files with 19 additions and 19 deletions
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12
os/hal/ports/NRF5/NRF51822/hal_pal_lld.c
View File

@ -51,7 +51,7 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
switch (mode) {
case PAL_MODE_RESET:
case PAL_MODE_UNCONNECTED:
NRF_GPIO->PIN_CNF[pad] =
IOPORT1->PIN_CNF[pad] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
(GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
@ -60,7 +60,7 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
break;
case PAL_MODE_INPUT:
case PAL_MODE_INPUT_ANALOG:
NRF_GPIO->PIN_CNF[pad] =
IOPORT1->PIN_CNF[pad] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
(GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
@ -68,7 +68,7 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
(GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_INPUT_PULLUP:
NRF_GPIO->PIN_CNF[pad] =
IOPORT1->PIN_CNF[pad] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
(GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) |
@ -76,7 +76,7 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
(GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_INPUT_PULLDOWN:
NRF_GPIO->PIN_CNF[pad] =
IOPORT1->PIN_CNF[pad] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
(GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos) |
@ -84,7 +84,7 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
(GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_OUTPUT_PUSHPULL:
NRF_GPIO->PIN_CNF[pad] =
IOPORT1->PIN_CNF[pad] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
(GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
@ -92,7 +92,7 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
(GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_OUTPUT_OPENDRAIN:
NRF_GPIO->PIN_CNF[pad] =
IOPORT1->PIN_CNF[pad] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
(GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |

26
os/hal/ports/NRF5/NRF51822/hal_pal_lld.h
View File

@ -152,7 +152,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_readport(port) (NRF_GPIO->IN)
#define pal_lld_readport(port) (IOPORT1->IN)
/**
* @brief Reads the output latch.
@ -164,7 +164,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_readlatch(port) (NRF_GPIO->OUT)
#define pal_lld_readlatch(port) (IOPORT1->OUT)
/**
* @brief Writes a bits mask on a I/O port.
@ -174,7 +174,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_writeport(port, bits) (NRF_GPIO->OUT = (bits))
#define pal_lld_writeport(port, bits) (IOPORT1->OUT = (bits))
/**
* @brief Sets a bits mask on a I/O port.
@ -187,7 +187,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_setport(port, bits) (NRF_GPIO->OUTSET = (bits))
#define pal_lld_setport(port, bits) (IOPORT1->OUTSET = (bits))
/**
@ -201,7 +201,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_clearport(port, bits) (NRF_GPIO->OUTCLR = (bits))
#define pal_lld_clearport(port, bits) (IOPORT1->OUTCLR = (bits))
/**
* @brief Pads group mode setup.
@ -234,7 +234,7 @@ typedef NRF_GPIO_Type *ioportid_t;
* @notapi
*/
#define pal_lld_readpad(port, pad) \
((NRF_GPIO->IN & ((uint32_t) 1 << pad)) ? PAL_HIGH : PAL_LOW)
((IOPORT1->IN & ((uint32_t) 1 << pad)) ? PAL_HIGH : PAL_LOW)
/**
* @brief Writes a logical state on an output pad.
@ -255,9 +255,9 @@ typedef NRF_GPIO_Type *ioportid_t;
do { \
(void)port; \
if (bit == PAL_HIGH) \
NRF_GPIO->OUTSET = ((uint32_t) 1 << pad); \
IOPORT1->OUTSET = ((uint32_t) 1 << pad); \
else \
NRF_GPIO->OUTCLR = ((uint32_t) 1 << pad); \
IOPORT1->OUTCLR = ((uint32_t) 1 << pad); \
} while (false)
/**
@ -271,7 +271,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_setpad(port, pad) (NRF_GPIO->OUTSET = (uint32_t) 1 << (pad))
#define pal_lld_setpad(port, pad) (IOPORT1->OUTSET = (uint32_t) 1 << (pad))
/**
* @brief Clears a pad logical state to @p PAL_LOW.
@ -284,7 +284,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_clearpad(port, pad) (NRF_GPIO->OUTCLR = (uint32_t) 1 << (pad))
#define pal_lld_clearpad(port, pad) (IOPORT1->OUTCLR = (uint32_t) 1 << (pad))
/**
* @brief Toggles a pad logical state.
@ -299,11 +299,11 @@ typedef NRF_GPIO_Type *ioportid_t;
*/
#define pal_lld_togglepad(port, pad) \
do { \
uint8_t bit = (NRF_GPIO->IN >> (pad)) & 1; \
uint8_t bit = (IOPORT1->IN >> (pad)) & 1; \
if (bit) \
NRF_GPIO->OUTCLR = 1 << (pad); \
IOPORT1->OUTCLR = 1 << (pad); \
else \
NRF_GPIO->OUTSET = 1 << (pad); \
IOPORT1->OUTSET = 1 << (pad); \
} while (0)
/**