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NUC123SD4AN0 -> NUC123 conversion

This commit is contained in:
Alex Lewontin 2020-12-11 12:17:24 -05:00
parent 7d6e9b8f23
commit 0b4b1d7542
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GPG Key ID: 52A3855FC3BB8CD7
16 changed files with 64786 additions and 214 deletions
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32378
ext/NUC123AE_v1.svd Executable file
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32352
ext/NUC123AN_v1.svd Executable file
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37
os/common/startup/ARMCMx/compilers/GCC/ld/NUC123SD4AN0.ld → os/common/startup/ARMCMx/compilers/GCC/ld/NUC123xD4xx0.ld
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@ -1,5 +1,5 @@
/*
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
Copyright (C) 2020 Alex Lewontin
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@ -15,26 +15,27 @@
*/
/*
* NUC123SD4AN0 memory setup.
* NUC123xD4xx0 memory setup.
* 64k ROM, 20k ram
*/
MEMORY
{
flash0 : org = 0x00000000, len = 64k
flash1 : org = 0x00000000, len = 0
flash2 : org = 0x00000000, len = 0
flash3 : org = 0x00000000, len = 0
flash4 : org = 0x00000000, len = 0
flash5 : org = 0x00000000, len = 0
flash6 : org = 0x00000000, len = 0
flash7 : org = 0x00000000, len = 0
ram0 : org = 0x20000000, len = 20k
ram1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0
ram3 : org = 0x00000000, len = 0
ram4 : org = 0x00000000, len = 0
ram5 : org = 0x00000000, len = 0
ram6 : org = 0x00000000, len = 0
ram7 : org = 0x00000000, len = 0
flash0 (rx) : org = 0x00000000, len = 64k
flash1 (rx) : org = 0x00000000, len = 0
flash2 (rx) : org = 0x00000000, len = 0
flash3 (rx) : org = 0x00000000, len = 0
flash4 (rx) : org = 0x00000000, len = 0
flash5 (rx) : org = 0x00000000, len = 0
flash6 (rx) : org = 0x00000000, len = 0
flash7 (rx) : org = 0x00000000, len = 0
ram0 (wx) : org = 0x20000000, len = 20k
ram1 (wx) : org = 0x00000000, len = 0
ram2 (wx) : org = 0x00000000, len = 0
ram3 (wx) : org = 0x00000000, len = 0
ram4 (wx) : org = 0x00000000, len = 0
ram5 (wx) : org = 0x00000000, len = 0
ram6 (wx) : org = 0x00000000, len = 0
ram7 (wx) : org = 0x00000000, len = 0
}
/* For each data/text section two region are defined, a virtual region

4
os/common/startup/ARMCMx/compilers/GCC/mk/startup_NUC123SD4AN0.mk → os/common/startup/ARMCMx/compilers/GCC/mk/startup_NUC123.mk
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@ -1,10 +1,10 @@
# List of the ChibiOS generic NUC123SD4AN0 startup and CMSIS files.
# List of the ChibiOS generic NUC123 startup and CMSIS files.
STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c
STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S \
$(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S
STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/NUC123SD4AN0 \
STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/NUC123 \
$(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld \
$(CHIBIOS)/os/common/ext/CMSIS/include \
$(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \

15
os/common/startup/ARMCMx/devices/NUC123SD4AN0/cmparams.h → os/common/startup/ARMCMx/devices/NUC123/cmparams.h
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@ -15,13 +15,13 @@
*/
/**
* @file NUC123SD4AN0/cmparams.h
* @brief ARM Cortex-M0 parameters for the NUC123SD4AN0.
* @file NUC123/cmparams.h
* @brief ARM Cortex-M0 parameters for the NUC123.
*
* @defgroup ARMCMx_NUC123 NUC123SD4AN0 Specific Parameters
* @defgroup ARMCMx_NUC123 NUC123 Specific Parameters
* @ingroup ARMCMx_SPECIFIC
* @details This file contains the Cortex-M0 specific parameters for the
* NUC123SD4AN0 platform.
* NUC123 platform.
* @{
*/
@ -57,7 +57,12 @@
/* If the device type is not externally defined, for example from the Makefile,
then a file named board.h is included. This file must contain a device
definition compatible with the vendor include file.*/
#if !defined (NUC123SD4AN0)
#if !defined(NUC123SD4AN0) && !defined(NUC123SC2AN1) && \
!defined(NUC123LD4AN0) && !defined(NUC123LC2AN1) && \
!defined(NUC123ZD4AN0) && !defined(NUC123ZC2AN1) && \
!defined(NUC123SD4AE0) && !defined(NUC123SC2AE1) && \
!defined(NUC123LD4AE0) && !defined(NUC123LC2AE1) && \
!defined(NUC123ZD4AE0) && !defined(NUC123ZC2AE1)
#include "board.h"
#endif

1
os/hal/boards/NUTINY-SDK-NUC123-V2.0/board.h
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@ -27,7 +27,6 @@
#define NUC123SD4AN0
#define BOARD_NAME "NUTINY SDK NUC123 V2.0"
#define NUC123_LSE_BYPASS TRUE
/*
* Board specific settings.
*/

4
os/hal/ports/NUMICRO/NUC123SD4AN0/hal_lld.c → os/hal/ports/NUMICRO/NUC123/hal_lld.c
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@ -385,8 +385,8 @@ static uint32_t enable_pll(uint32_t pllSrc, uint32_t pllFreq)
/** @brief Set Core Clock
*
* @description Set the core system clock some reference speed (Hz).
* This should be between 25MHz and 72MHz for the NUC123SD4AN0.
*
* This should be between 25MHz and 72MHz.
*
* Use either the HXT (exact) or HIRC (nearest using 22.1184MHz)
* as the clock source.
*

13
os/hal/ports/NUMICRO/NUC123SD4AN0/hal_lld.h → os/hal/ports/NUMICRO/NUC123/hal_lld.h
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@ -16,8 +16,8 @@
*/
/**
* @file NUC123SD4AN0/hal_lld.h
* @brief NUC123SD4AN0 HAL subsystem low level driver header.
* @file NUC123/hal_lld.h
* @brief NUC123 HAL subsystem low level driver header.
* @pre This module requires the following macros to be defined in the
* @p board.h file:
* - NUC123_HSECLK.
@ -41,12 +41,13 @@
*/
#if defined(NUC123SD4AN0) || defined(__DOXYGEN__)
#define PLATFORM_NAME "NUC123SD4AN0 NUC123 Cortex M0 USB Micro"
#define NUC123xxxANx
#undef NUC123xxxAEx
#else
#error "NUC123 device unsupported or not specified"
#endif
#define NUC123xxxANx
#undef NUC123xxxAEx
/* TODO: Add other NUC123xxxxxx versions */
/** @} */
@ -186,8 +187,8 @@
/*
* Configuration-related checks.
*/
#if !defined(NUC123SD4AN0_MCUCONF)
#error "Using a wrong mcuconf.h file, NUC123SD4AN0_MCUCONF not defined"
#if !defined(NUC123_MCUCONF)
#error "Using a wrong mcuconf.h file, NUC123_MCUCONF not defined"
#endif
/*

2
os/hal/ports/NUMICRO/NUC123SD4AN0/nuc123_isr.h → os/hal/ports/NUMICRO/NUC123/nuc123_isr.h
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@ -18,7 +18,7 @@
* @file NUMICRO/nuc123_isr.h
* @brief ISR remapper driver header.
*
* @addtogroup NUC123SD4AN0_ISR
* @addtogroup NUC123_ISR
* @{
*/

17
os/hal/ports/NUMICRO/NUC123SD4AN0/nuc123_registry.h → os/hal/ports/NUMICRO/NUC123/nuc123_registry.h
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@ -15,8 +15,8 @@
*/
/**
* @file NUC123SD4AN0/nuc123_registry.h
* @brief NUC123SD4AN0 capabilities registry.
* @file NUC123/nuc123_registry.h
* @brief NUC123 capabilities registry.
*
* @addtogroup HAL
* @{
@ -25,16 +25,12 @@
#ifndef NUC123_REGISTRY_H
#define NUC123_REGISTRY_H
#if !defined(NUC123SD4AN0) || defined(__DOXYGEN__)
#define NUC123SD4AN0
#endif
/*===========================================================================*/
/* Platform capabilities. */
/*===========================================================================*/
/**
* @name NUC123SD4AN0 capabilities
* @name NUC123 capabilities
* @{
*/
@ -253,13 +249,6 @@
#define NUC123_HAS_CRC TRUE
#define NUC123_CRC_PROGRAMMABLE FALSE
/*
This currently correspond to the header guards, and gets tripped on double inclusion.
This does not seem correct.
#else
#error "NUC123SD4AN0 device not specified"
*/
/** @} */
#endif /* NUC123_REGISTRY_H */

6
os/hal/ports/NUMICRO/NUC123SD4AN0/platform.mk → os/hal/ports/NUMICRO/NUC123/platform.mk
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@ -1,9 +1,9 @@
PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC123SD4AN0/hal_lld.c
$(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC123/hal_lld.c
# Required include directories.
PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
$(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC123SD4AN0 \
$(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC123 \
$(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD
# Optional platform files.
@ -18,4 +18,4 @@ include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/LLD/USBv1/driver.mk
# Shared variables
ALLCSRC += $(PLATFORMSRC)
ALLINC += $(PLATFORMINC)
ALLINC += $(PLATFORMINC)

153
os/hal/ports/NUMICRO/NUC123SD4AN0/system_NUC123SD4AN0.c
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@ -1,153 +0,0 @@
/**************************************************************************//**
* @file system_NUC123SD4AN0.c
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Source File for
* Device NUC123SD4AN0
* @version V5.00
* @date 13. May 2019
******************************************************************************/
/*
* Copyright (c) 2019 /u/KeepItUnder. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdint.h>
#include "NUC123SD4AN0.h"
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
/* ToDo: add here your necessary defines for device initialization
following is an example for different system frequencies */
// #define XTAL (12000000U) /* Oscillator frequency */
// #define SYSTEM_CLOCK (5 * XTAL)
/*----------------------------------------------------------------------------
System Core Clock Variable
*----------------------------------------------------------------------------*/
/* ToDo: initialize SystemCoreClock with the system core clock frequency value
achieved after system intitialization.
This means system core clock frequency after call to SystemInit() */
// uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Clock Frequency (Core Clock)*/
// uint32_t CyclesPerUs = (SYSTEM_CLOCK / 1000000); /* Cycles per micro second */
// uint32_t PllClock = SYSTEM_CLOCK; /*!< PLL Clock Frequency */
uint32_t SystemCoreClock = __HSI; /* System Clock Frequency (Core Clock)*/
uint32_t CyclesPerUs = (__HSI / 1000000); /* Cycles per micro second */
uint32_t PllClock = __HSI; /*!< PLL Clock Frequency */
/*----------------------------------------------------------------------------
Clock functions
*----------------------------------------------------------------------------*/
void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
{
/* ToDo: add code to calculate the system frequency based upon the current
register settings.
This function can be used to retrieve the system core clock frequeny
after user changed register sittings. */
// SystemCoreClock = SYSTEM_CLOCK;
uint32_t clkFreq;
uint32_t PllReg;
uint32_t pllFIN, pllNF, pllNR, pllNO;
/* Update PLL Clock */
// PllClock = clks_lld_get_pll_clock_freq();
PllReg = CLK->PLLCON;
if(PllReg & (CLK_PLLCON_PD_Msk | CLK_PLLCON_OE_Msk)) {
PllClock = 0; /* PLL is off. */
} else {
if (PllReg & 0x00080000ul) {
pllFIN = __HIRC; /* Use HXT for PLL clock */
} else {
pllFIN = __HXT; /* Use HXT for PLL clock */
}
if (PllReg & CLK_PLLCON_BP_Msk) {
PllClock = pllFIN;
} else {
switch (((PllReg & CLK_PLLCON_OUT_DV_Msk) >> CLK_PLLCON_OUT_DV_Pos)) {
case 0b00: /* OUT_DIV == 00 : NO = 1 */
pllNO = 1;
break;
case 0b11: /* OUT_DIV == 11 : NO = 4 */
pllNO = 4;
break;
default: /* OUT_DIV == 01 or 10 : NO = 2 */
pllNO = 2;
break;
}
pllNF = ((PllReg & CLK_PLLCON_FB_DV_Msk) >> CLK_PLLCON_FB_DV_Pos) + 2;
pllNR = ((PllReg & CLK_PLLCON_IN_DV_Msk) >> CLK_PLLCON_IN_DV_Pos) + 2;
/* Shift right to avoid overflow condition */
PllClock = (((pllFIN >> 2) * pllNF) / (pllNR * pllNO) << 2);
}
}
/* Pick Clock Source */
switch (CLK->CLKSEL0 & CLK_CLKSEL0_HCLK_S_Msk) {
case 0: // External HF Xtal
clkFreq = __HXT;
break;
case 1: // PLL clock / 2
clkFreq = PllClock >> 1;
break;
case 3: // Internal 10kHz
clkFreq = __LIRC;
break;
case 2: // PLL clock
clkFreq = PllClock;
break;
case 7: // Internal 22.184MHz
clkFreq = __HIRC;
break;
default:
clkFreq = NULL;
break;
}
SystemCoreClock = clkFreq / ((CLK->CLKDIV & CLK_CLKDIV_HCLK_N_Msk) + 1);
// CyclesPerUs = (SystemCoreClock + 500000) / 1000000;
CyclesPerUs = SystemCoreClock / 1000000;
}
void SystemInit (void)
{
/* ToDo: add code to initialize the system
do not use global variables because this function is called before
reaching pre-main. RW section maybe overwritten afterwards. */
// SystemCoreClock = SYSTEM_CLOCK;
}
void SystemUnlockReg(void)
{
while(SYS->REGWRPROT != SYS_REGWRPROT_REGPROTDIS_Msk)
{
SYS->REGWRPROT = 0x59ul;
SYS->REGWRPROT = 0x16ul;
SYS->REGWRPROT = 0x88ul;
}
}

6
testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/Blinky/Makefile
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@ -99,10 +99,10 @@ DEPDIR := ./.dep
# Licensing files.
include $(CHIBIOS)/os/license/license.mk
# Startup files.
include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_NUC123SD4AN0.mk
include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_NUC123.mk
# HAL-OSAL files (optional).
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC123SD4AN0/platform.mk
include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC123/platform.mk
include $(CHIBIOS_CONTRIB)/os/hal/boards/NUTINY-SDK-NUC123-V2.0/board.mk
include $(CHIBIOS)/os/hal/osal/os-less/ARMCMx/osal.mk
# RTOS files (optional).
@ -116,7 +116,7 @@ include $(CHIBIOS)/tools/mk/autobuild.mk
#include $(CHIBIOS)/test/oslib/oslib_test.mk
# Define linker script file here
LDSCRIPT= $(STARTUPLD_CONTRIB)/NUC123SD4AN0.ld
LDSCRIPT= $(STARTUPLD_CONTRIB)/NUC123xD4xx0.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.

2
testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/Blinky/cfg/mcuconf.h
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@ -29,6 +29,6 @@
#define NUC123_PLLSRC NUC123_PLLSRC_HSE
#define NUC123_HCLKSRC NUC123_HCLKSRC_PLL
#define NUC123SD4AN0_MCUCONF
#define NUC123_MCUCONF
#endif /* _MCUCONF_H_ */

8
testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/PWM/Makefile
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@ -99,10 +99,10 @@ DEPDIR := ./.dep
# Licensing files.
include $(CHIBIOS)/os/license/license.mk
# Startup files.
include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_NUC123SD4AN0.mk
include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_NUC123.mk
# HAL-OSAL files (optional).
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC123SD4AN0/platform.mk
include $(CHIBIOS_CONTRIB)/os/hal/ports/NUMICRO/NUC123/platform.mk
include $(CHIBIOS_CONTRIB)/os/hal/boards/NUTINY-SDK-NUC123-V2.0/board.mk
include $(CHIBIOS)/os/hal/osal/os-less/ARMCMx/osal.mk
# RTOS files (optional).
@ -116,7 +116,7 @@ include $(CHIBIOS)/tools/mk/autobuild.mk
#include $(CHIBIOS)/test/oslib/oslib_test.mk
# Define linker script file here
LDSCRIPT= $(STARTUPLD_CONTRIB)/NUC123SD4AN0.ld
LDSCRIPT= $(STARTUPLD_CONTRIB)/NUC123xD4xx0.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
@ -200,4 +200,4 @@ flash: $(BUILDDIR)/$(PROJECT).elf
#
# Custom rules
##############################################################################
##############################################################################

2
testhal/NUMICRO/NUC123/NUTINY-SDK-NUC123-V2.0/PWM/cfg/mcuconf.h
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@ -29,6 +29,6 @@
#define NUC123_PLLSRC NUC123_PLLSRC_HSE
#define NUC123_HCLKSRC NUC123_HCLKSRC_PLL
#define NUC123SD4AN0_MCUCONF
#define NUC123_MCUCONF
#endif /* _MCUCONF_H_ */