Rename missed AFIO register names

This commit is contained in:
Stefan Kerkmann 2021-07-03 13:45:27 +02:00
parent 3fc7254ad3
commit 1021a7771f
2 changed files with 6 additions and 6 deletions

View File

@ -215,7 +215,7 @@ void _pal_lld_enablepadevent(ioportid_t port,
portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU;
/* Port selection in SYSCFG.*/
AFIO->EXTICR[cridx] = (AFIO->EXTICR[cridx] & crmask) | (portidx << croff);
AFIO->EXTISS[cridx] = (AFIO->EXTISS[cridx] & crmask) | (portidx << croff);
/* Programming edge registers.*/
if (mode & PAL_EVENT_MODE_RISING_EDGE)
@ -262,7 +262,7 @@ void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad) {
0x400 intervals in memory space. So far this is true for all devices.*/
portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU;
crport = (AFIO->EXTICR[cridx] >> croff) & 0xFU;
crport = (AFIO->EXTISS[cridx] >> croff) & 0xFU;
osalDbgAssert(crport == portidx, "channel mapped on different port");

View File

@ -327,11 +327,11 @@ typedef struct
typedef struct
{
__IO uint32_t EVCR;
__IO uint32_t MAPR;
__IO uint32_t EXTICR[4];
__IO uint32_t EC;
__IO uint32_t PCF0;
__IO uint32_t EXTISS[4];
uint32_t RESERVED0;
__IO uint32_t MAPR2;
__IO uint32_t PCF1;
} AFIO_TypeDef;
/**
* @brief Inter Integrated Circuit Interface