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Merge branch 'tiva_ext_driver'

This commit is contained in:
marcoveeneman 2015-04-14 23:07:24 +02:00
parent 5a3391e392 246a8cc1d7
commit 2c0b573553
14 changed files with 2793 additions and 2 deletions
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981
os/hal/ports/TIVA/LLD/ext_lld.c Normal file
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/*
Copyright (C) 2014 Marco Veeneman
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file Tiva/ext_lld.c
* @brief Tiva EXT subsystem low level driver source.
*
* @addtogroup EXT
* @{
*/
#include "hal.h"
#if HAL_USE_EXT || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/**
* @brief Generic interrupt serving code for multiple pins per interrupt
* handler.
*/
#define ext_lld_serve_port_interrupt(gpiop, start) \
do { \
uint32_t mis = gpiop->MIS; \
\
gpiop->ICR = mis; \
\
if (mis & (1 << 0)) { \
EXTD1.config->channels[start + 0].cb(&EXTD1, start + 0); \
} \
if (mis & (1 << 1)) { \
EXTD1.config->channels[start + 1].cb(&EXTD1, start + 1); \
} \
if (mis & (1 << 2)) { \
EXTD1.config->channels[start + 2].cb(&EXTD1, start + 2); \
} \
if (mis & (1 << 3)) { \
EXTD1.config->channels[start + 3].cb(&EXTD1, start + 3); \
} \
if (mis & (1 << 4)) { \
EXTD1.config->channels[start + 4].cb(&EXTD1, start + 4); \
} \
if (mis & (1 << 5)) { \
EXTD1.config->channels[start + 5].cb(&EXTD1, start + 5); \
} \
if (mis & (1 << 6)) { \
EXTD1.config->channels[start + 6].cb(&EXTD1, start + 6); \
} \
if (mis & (1 << 7)) { \
EXTD1.config->channels[start + 7].cb(&EXTD1, start + 7); \
} \
} while (0);
/**
* @brief Generic interrupt serving code for single pin per interrupt
* handler.
*/
#define ext_lld_serve_pin_interrupt(gpiop, start, pin) \
do { \
gpiop->ICR = (1 << pin); \
EXTD1.config->channels[start].cb(&EXTD1, start); \
} while (0);
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/**
* @brief EXTD1 driver identifier.
*/
EXTDriver EXTD1;
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
const ioportid_t gpio[] =
{
#if TIVA_HAS_GPIOA
GPIOA,
#endif
#if TIVA_HAS_GPIOB
GPIOB,
#endif
#if TIVA_HAS_GPIOC
GPIOC,
#endif
#if TIVA_HAS_GPIOD
GPIOD,
#endif
#if TIVA_HAS_GPIOE
GPIOE,
#endif
#if TIVA_HAS_GPIOF
GPIOF,
#endif
#if TIVA_HAS_GPIOG
GPIOG,
#endif
#if TIVA_HAS_GPIOH
GPIOH,
#endif
#if TIVA_HAS_GPIOJ
GPIOJ,
#endif
#if TIVA_HAS_GPIOK
GPIOK,
#endif
#if TIVA_HAS_GPIOL
GPIOL,
#endif
#if TIVA_HAS_GPIOM
GPIOM,
#endif
#if TIVA_HAS_GPION
GPION,
#endif
#if TIVA_HAS_GPIOP
GPIOP,
#endif
#if TIVA_HAS_GPIOQ
GPIOQ,
#endif
#if TIVA_HAS_GPIOR
GPIOR,
#endif
#if TIVA_HAS_GPIOS
GPIOS,
#endif
#if TIVA_HAS_GPIOT
GPIOT,
#endif
};
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/**
* @brief Enables GPIO IRQ sources.
*
* @notapi
*/
static void ext_lld_irq_enable(void)
{
#if TIVA_HAS_GPIOA
nvicEnableVector(TIVA_GPIOA_NUMBER, TIVA_EXT_GPIOA_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOB
nvicEnableVector(TIVA_GPIOB_NUMBER, TIVA_EXT_GPIOB_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOC
nvicEnableVector(TIVA_GPIOC_NUMBER, TIVA_EXT_GPIOC_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOD
nvicEnableVector(TIVA_GPIOD_NUMBER, TIVA_EXT_GPIOD_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOE
nvicEnableVector(TIVA_GPIOE_NUMBER, TIVA_EXT_GPIOE_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOF
nvicEnableVector(TIVA_GPIOF_NUMBER, TIVA_EXT_GPIOF_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOG
nvicEnableVector(TIVA_GPIOG_NUMBER, TIVA_EXT_GPIOG_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOH
nvicEnableVector(TIVA_GPIOH_NUMBER, TIVA_EXT_GPIOH_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOJ
nvicEnableVector(TIVA_GPIOJ_NUMBER, TIVA_EXT_GPIOJ_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOK
nvicEnableVector(TIVA_GPIOK_NUMBER, TIVA_EXT_GPIOK_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOL
nvicEnableVector(TIVA_GPIOL_NUMBER, TIVA_EXT_GPIOL_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOM
nvicEnableVector(TIVA_GPIOM_NUMBER, TIVA_EXT_GPIOM_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPION
nvicEnableVector(TIVA_GPION_NUMBER, TIVA_EXT_GPION_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOP
nvicEnableVector(TIVA_GPIOP0_NUMBER, TIVA_EXT_GPIOP0_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOP1_NUMBER, TIVA_EXT_GPIOP1_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOP2_NUMBER, TIVA_EXT_GPIOP2_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOP3_NUMBER, TIVA_EXT_GPIOP3_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOP4_NUMBER, TIVA_EXT_GPIOP4_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOP5_NUMBER, TIVA_EXT_GPIOP5_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOP6_NUMBER, TIVA_EXT_GPIOP6_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOP7_NUMBER, TIVA_EXT_GPIOP7_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOQ
nvicEnableVector(TIVA_GPIOQ0_NUMBER, TIVA_EXT_GPIOQ0_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOQ1_NUMBER, TIVA_EXT_GPIOQ1_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOQ2_NUMBER, TIVA_EXT_GPIOQ2_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOQ3_NUMBER, TIVA_EXT_GPIOQ3_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOQ4_NUMBER, TIVA_EXT_GPIOQ4_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOQ5_NUMBER, TIVA_EXT_GPIOQ5_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOQ6_NUMBER, TIVA_EXT_GPIOQ6_IRQ_PRIORITY);
nvicEnableVector(TIVA_GPIOQ7_NUMBER, TIVA_EXT_GPIOQ7_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOR
nvicEnableVector(TIVA_GPIOR_NUMBER, TIVA_EXT_GPIOR_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOS
nvicEnableVector(TIVA_GPIOS_NUMBER, TIVA_EXT_GPIOS_IRQ_PRIORITY);
#endif
#if TIVA_HAS_GPIOT
nvicEnableVector(TIVA_GPIOT_NUMBER, TIVA_EXT_GPIOT_IRQ_PRIORITY);
#endif
}
/**
* @brief Disables GPIO IRQ sources.
*
* @notapi
*/
static void ext_lld_irq_disable(void)
{
#if TIVA_HAS_GPIOA
nvicDisableVector(TIVA_GPIOA_NUMBER);
#endif
#if TIVA_HAS_GPIOB
nvicDisableVector(TIVA_GPIOB_NUMBER);
#endif
#if TIVA_HAS_GPIOC
nvicDisableVector(TIVA_GPIOC_NUMBER);
#endif
#if TIVA_HAS_GPIOD
nvicDisableVector(TIVA_GPIOD_NUMBER);
#endif
#if TIVA_HAS_GPIOE
nvicDisableVector(TIVA_GPIOE_NUMBER);
#endif
#if TIVA_HAS_GPIOF
nvicDisableVector(TIVA_GPIOF_NUMBER);
#endif
#if TIVA_HAS_GPIOG
nvicDisableVector(TIVA_GPIOG_NUMBER);
#endif
#if TIVA_HAS_GPIOH
nvicDisableVector(TIVA_GPIOH_NUMBER);
#endif
#if TIVA_HAS_GPIOJ
nvicDisableVector(TIVA_GPIOJ_NUMBER);
#endif
#if TIVA_HAS_GPIOK
nvicDisableVector(TIVA_GPIOK_NUMBER);
#endif
#if TIVA_HAS_GPIOL
nvicDisableVector(TIVA_GPIOL_NUMBER);
#endif
#if TIVA_HAS_GPIOM
nvicDisableVector(TIVA_GPIOM_NUMBER);
#endif
#if TIVA_HAS_GPION
nvicDisableVector(TIVA_GPION_NUMBER);
#endif
#if TIVA_HAS_GPIOP
nvicDisableVector(TIVA_GPIOP0_NUMBER);
nvicDisableVector(TIVA_GPIOP1_NUMBER);
nvicDisableVector(TIVA_GPIOP2_NUMBER);
nvicDisableVector(TIVA_GPIOP3_NUMBER);
nvicDisableVector(TIVA_GPIOP4_NUMBER);
nvicDisableVector(TIVA_GPIOP5_NUMBER);
nvicDisableVector(TIVA_GPIOP6_NUMBER);
nvicDisableVector(TIVA_GPIOP7_NUMBER);
#endif
#if TIVA_HAS_GPIOQ
nvicDisableVector(TIVA_GPIOQ0_NUMBER);
nvicDisableVector(TIVA_GPIOQ1_NUMBER);
nvicDisableVector(TIVA_GPIOQ2_NUMBER);
nvicDisableVector(TIVA_GPIOQ3_NUMBER);
nvicDisableVector(TIVA_GPIOQ4_NUMBER);
nvicDisableVector(TIVA_GPIOQ5_NUMBER);
nvicDisableVector(TIVA_GPIOQ6_NUMBER);
nvicDisableVector(TIVA_GPIOQ7_NUMBER);
#endif
#if TIVA_HAS_GPIOR
nvicDisableVector(TIVA_GPIOR_NUMBER);
#endif
#if TIVA_HAS_GPIOS
nvicDisableVector(TIVA_GPIOS_NUMBER);
#endif
#if TIVA_HAS_GPIOT
nvicDisableVector(TIVA_GPIOT_NUMBER);
#endif
}
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if TIVA_HAS_GPIOA || defined(__DOXYGEN__)
/**
* @brief GPIOA interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOA_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(GPIOA, 0);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOB || defined(__DOXYGEN__)
/**
* @brief GPIOB interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOB_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(GPIOB, 8);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOC || defined(__DOXYGEN__)
/**
* @brief GPIOC interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOC_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(GPIOC, 16);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOD || defined(__DOXYGEN__)
/**
* @brief GPIOD interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOD_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(GPIOD, 24);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOE || defined(__DOXYGEN__)
/**
* @brief GPIOE interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOE_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(GPIOE, 32);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOF || defined(__DOXYGEN__)
/**
* @brief GPIOF interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOF_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(GPIOF, 40);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOG || defined(__DOXYGEN__)
/**
* @brief GPIOG interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOG_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(&GPIOG, 48);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOH || defined(__DOXYGEN__)
/**
* @brief GPIOH interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOH_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(&GPIOH, 56);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOJ || defined(__DOXYGEN__)
/**
* @brief GPIOJ interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOJ_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(&GPIOJ, 64);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOK || defined(__DOXYGEN__)
/**
* @brief GPIOK interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOK_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(&GPIOK, 72);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOL || defined(__DOXYGEN__)
/**
* @brief GPIOL interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOL_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(&GPIOL, 80);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOM || defined(__DOXYGEN__)
/**
* @brief GPIOM interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOM_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(&GPIOM, 88);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPION || defined(__DOXYGEN__)
/**
* @brief GPION interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPION_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(&GPION, 96);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOP || defined(__DOXYGEN__)
/**
* @brief GPIOP0 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOP0_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOP, 104, 0);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOP1 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOP1_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOP, 105, 1);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOP2 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOP2_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOP, 106, 2);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOP3 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOP3_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOP, 107, 3);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOP4 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOP4_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOP, 108, 4);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOP5 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOP5_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOP, 109, 5);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOP6 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOP6_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOP, 110, 6);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOP7 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOP7_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOP, 111, 7);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOQ || defined(__DOXYGEN__)
/**
* @brief GPIOQ0 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOQ0_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOQ, 112, 0);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOQ1 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOQ1_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOQ, 113, 1);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOQ2 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOQ2_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOQ, 114, 2);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOQ3 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOQ3_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOQ, 115, 3);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOQ4 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOQ4_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOQ, 116, 4);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOQ5 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOQ5_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOQ, 117, 5);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOQ6 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOQ6_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOQ, 118, 6);
OSAL_IRQ_EPILOGUE();
}
/**
* @brief GPIOQ7 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOQ7_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_pin_interrupt(&GPIOQ, 119, 7);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOR || defined(__DOXYGEN__)
/**
* @brief GPIOR interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOR_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(&GPIOR, 120);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOS || defined(__DOXYGEN__)
/**
* @brief GPIOS interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOS_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(&GPIOS, 128);
OSAL_IRQ_EPILOGUE();
}
#endif
#if TIVA_HAS_GPIOT || defined(__DOXYGEN__)
/**
* @brief GPIOT interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(TIVA_GPIOT_HANDLER)
{
OSAL_IRQ_PROLOGUE();
ext_lld_serve_port_interrupt(&GPIOT, 132);
OSAL_IRQ_EPILOGUE();
}
#endif
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level EXT driver initialization.
*
* @notapi
*/
void ext_lld_init(void)
{
extObjectInit(&EXTD1);
}
/**
* @brief Configures and activates the EXT peripheral.
*
* @param[in] extp pointer to the @p EXTDriver object
*
* @notapi
*/
void ext_lld_start(EXTDriver *extp)
{
uint8_t i;
if (extp->state == EXT_STOP) {
ext_lld_irq_enable();
}
/* Configuration of automatic channels.*/
for (i = 0; i < EXT_MAX_CHANNELS; i++) {
if (extp->config->channels[i].mode & EXT_CH_MODE_AUTOSTART) {
ext_lld_channel_enable(extp, i);
}
else {
ext_lld_channel_disable(extp, i);
}
}
}
/**
* @brief Deactivates the EXT peripheral.
*
* @param[in] extp pointer to the @p EXTDriver object
*
* @notapi
*/
void ext_lld_stop(EXTDriver *extp)
{
if (extp->state == EXT_ACTIVE) {
ext_lld_irq_disable();
}
#if TIVA_HAS_GPIOA
GPIOA->IM = 0;
#endif
#if TIVA_HAS_GPIOB
GPIOB->IM = 0;
#endif
#if TIVA_HAS_GPIOC
GPIOC->IM = 0;
#endif
#if TIVA_HAS_GPIOD
GPIOD->IM = 0;
#endif
#if TIVA_HAS_GPIOE
GPIOE->IM = 0;
#endif
#if TIVA_HAS_GPIOF
GPIOF->IM = 0;
#endif
#if TIVA_HAS_GPIOG
GPIOG->IM = 0;
#endif
#if TIVA_HAS_GPIOH
GPIOH->IM = 0;
#endif
#if TIVA_HAS_GPIOJ
GPIOJ->IM = 0;
#endif
#if TIVA_HAS_GPIOK
GPIOK->IM = 0;
#endif
#if TIVA_HAS_GPIOL
GPIOL->IM = 0;
#endif
#if TIVA_HAS_GPIOM
GPIOM->IM = 0;
#endif
#if TIVA_HAS_GPION
GPION->IM = 0;
#endif
#if TIVA_HAS_GPIOP
GPIOP->IM = 0;
#endif
#if TIVA_HAS_GPIOQ
GPIOQ->IM = 0;
#endif
#if TIVA_HAS_GPIOR
GPIOR->IM = 0;
#endif
#if TIVA_HAS_GPIOS
GPIOS->IM = 0;
#endif
#if TIVA_HAS_GPIOT
GPIOT->IM = 0;
#endif
}
/**
* @brief Enables an EXT channel.
*
* @param[in] extp pointer to the @p EXTDriver object
* @param[in] channel channel to be enabled
*
* @notapi
*/
void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel)
{
GPIO_TypeDef *gpiop;
uint8_t pin;
uint32_t im;
pin = channel & 0x07;
gpiop = gpio[channel >> 3];
/* Disable interrupts */
im = gpiop->IM;
gpiop->IM = 0;
/* Configure pin to be edge-sensitive.*/
gpiop->IS &= ~(1 << pin);
/* Programming edge registers.*/
if ((extp->config->channels[channel].mode & EXT_CH_MODE_EDGES_MASK) ==
EXT_CH_MODE_BOTH_EDGES) {
gpiop->IBE |= (1 << pin);
}
else if ((extp->config->channels[channel].mode & EXT_CH_MODE_EDGES_MASK) ==
EXT_CH_MODE_FALLING_EDGE) {
gpiop->IBE &= ~(1 << pin);
gpiop->IEV &= ~(1 << pin);
}
else if ((extp->config->channels[channel].mode & EXT_CH_MODE_EDGES_MASK) ==
EXT_CH_MODE_RISING_EDGE) {
gpiop->IBE &= ~(1 << pin);
gpiop->IEV |= (1 << pin);
}
/* Programming interrupt and event registers.*/
if ((extp->config->channels[channel].cb != NULL) &&
((extp->config->channels[channel].mode & EXT_CH_MODE_EDGES_MASK) !=
EXT_CH_MODE_DISABLED)) {
im |= (1 << pin);
}
else {
im &= ~(1 << pin);
}
/* Restore interrupts */
gpiop->IM = im;
}
/**
* @brief Disables an EXT channel.
*
* @param[in] extp pointer to the @p EXTDriver object
* @param[in] channel channel to be disabled
*
* @notapi
*/
void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel)
{
(void)extp;
GPIO_TypeDef *gpiop;
uint8_t pin;
pin = channel & 0x07;
gpiop = gpio[channel >> 3];
gpiop->IM &= ~(1 << pin);
}
#endif /* HAL_USE_EXT */
/** @} */

363
os/hal/ports/TIVA/LLD/ext_lld.h Normal file
View File

@ -0,0 +1,363 @@
/*
Copyright (C) 2014 Marco Veeneman
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file Tiva/ext_lld.h
* @brief Tiva EXT subsystem low level driver header.
*
* @addtogroup EXT
* @{
*/
#ifndef _EXT_LLD_H_
#define _EXT_LLD_H_
#if HAL_USE_EXT || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/**
* @brief Number of EXT per port.
*/
#define EXT_MAX_CHANNELS TIVA_GPIO_PINS
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @name Configuration options
* @{
*/
/**
* @brief GPIOA interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOA_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOA_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOB interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOB_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOB_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOC interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOC_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOC_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOD interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOD_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOD_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOE interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOE_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOE_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOF interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOF_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOF_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOG interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOG_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOG_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOH interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOH_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOH_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOJ interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOJ_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOJ_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOK interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOK_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOK_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOL interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOL_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOL_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOM interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOM_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOM_IRQ_PRIORITY 3
#endif
/**
* @brief GPION interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPION_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPION_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOP0 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOP0_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOP0_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOP1 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOP1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOP1_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOP2 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOP2_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOP2_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOP3 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOP3_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOP3_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOP4 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOP4_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOP4_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOP5 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOP5_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOP5_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOP6 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOP6_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOP6_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOP7 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOP7_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOP7_IRQ_PRIORITY 3
#endif
/** @} */
/**
* @brief GPIOQ0 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOQ0_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOQ0_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOQ1 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOQ1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOQ1_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOQ2 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOQ2_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOQ2_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOQ3 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOQ3_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOQ3_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOQ4 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOQ4_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOQ4_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOQ5 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOQ5_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOQ5_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOQ6 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOQ6_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOQ6_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOQ7 interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOQ7_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOQ7_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOR interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOR_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOR_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOS interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOS_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOS_IRQ_PRIORITY 3
#endif
/**
* @brief GPIOT interrupt priority level setting.
*/
#if !defined(TIVA_EXT_GPIOT_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_EXT_GPIOT_IRQ_PRIORITY 3
#endif
/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief EXT channel identifier.
*/
typedef uint32_t expchannel_t;
/**
* @brief Type of an EXT generic notification callback.
*
* @param[in] extp pointer to the @p EXPDriver object triggering the
* callback
*/
typedef void (*extcallback_t)(EXTDriver *extp, expchannel_t channel);
/**
* @brief Channel configuration structure.
*/
typedef struct {
/**
* @brief Channel mode.
*/
uint32_t mode;
/**
* @brief Channel callback.
*/
extcallback_t cb;
} EXTChannelConfig;
/**
* @brief Driver configuration structure.
* @note It could be empty on some architectures.
*/
typedef struct {
/**
* @brief Channel configurations.
*/
EXTChannelConfig channels[EXT_MAX_CHANNELS];
/* End of the mandatory fields.*/
} EXTConfig;
/**
* @brief Structure representing an EXT driver.
*/
struct EXTDriver {
/**
* @brief Driver state.
*/
extstate_t state;
/**
* @brief Current configuration data.
*/
const EXTConfig *config;
/* End of the mandatory fields.*/
};
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if !defined(__DOXYGEN__)
extern EXTDriver EXTD1;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void ext_lld_init(void);
void ext_lld_start(EXTDriver *extp);
void ext_lld_stop(EXTDriver *extp);
void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel);
void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_EXT */
#endif /* _EXT_LLD_H_ */
/** @} */

3
os/hal/ports/TIVA/TM4C123x/platform.mk
View File

@ -8,7 +8,8 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
${CHIBIOS}/community/os/hal/ports/TIVA/LLD/gpt_lld.c \
${CHIBIOS}/community/os/hal/ports/TIVA/LLD/pwm_lld.c \
${CHIBIOS}/community/os/hal/ports/TIVA/LLD/spi_lld.c \
${CHISIOS}/community/os/hal/ports/TIVA/LLD/tiva_udma.c
${CHISIOS}/community/os/hal/ports/TIVA/LLD/tiva_udma.c \
${CHISIOS}/community/os/hal/ports/TIVA/LLD/ext_lld.c
# Required include directories
PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \

5
os/hal/ports/TIVA/TM4C123x/tiva_registry.h
View File

@ -98,6 +98,7 @@
#define TIVA_HAS_GPIOR FALSE
#define TIVA_HAS_GPIOS FALSE
#define TIVA_HAS_GPIOT FALSE
#define TIVA_GPIO_PINS 56
#endif
#if defined(TM4C1231C3PM) || defined(TM4C1231D5PM) || defined(TM4C1231E6PM) \
|| defined(TM4C1231H6PM) || defined(TM4C1233C3PM) || defined(TM4C1233D5PM) \
@ -122,6 +123,7 @@
#define TIVA_HAS_GPIOR FALSE
#define TIVA_HAS_GPIOS FALSE
#define TIVA_HAS_GPIOT FALSE
#define TIVA_GPIO_PINS 48
#endif
#if defined(TM4C1231D5PZ) || defined(TM4C1231E6PZ) || defined(TM4C1231H6PZ) \
|| defined(TM4C1233D5PZ) || defined(TM4C1233E6PZ) || defined(TM4C1233H6PZ) \
@ -146,6 +148,7 @@
#define TIVA_HAS_GPIOR FALSE
#define TIVA_HAS_GPIOS FALSE
#define TIVA_HAS_GPIOT FALSE
#define TIVA_GPIO_PINS 88
#endif
#if defined(TM4C1231H6PGE) || defined(TM4C1233H6PGE) || defined(TM4C1237H6PGE)\
|| defined(TM4C123BH6PGE) || defined(TM4C123GH6PGE)
@ -167,6 +170,7 @@
#define TIVA_HAS_GPIOR FALSE
#define TIVA_HAS_GPIOS FALSE
#define TIVA_HAS_GPIOT FALSE
#define TIVA_GPIO_PINS 112
#endif
#if defined(TM4C123BH6ZRB) || defined(TM4C123GH6ZRB) || defined(TM4C123GH5ZXR)
#define TIVA_HAS_GPIOA TRUE
@ -187,6 +191,7 @@
#define TIVA_HAS_GPIOR FALSE
#define TIVA_HAS_GPIOS FALSE
#define TIVA_HAS_GPIOT FALSE
#define TIVA_GPIO_PINS 120
#endif
/* GPTM attributes.*/

3
os/hal/ports/TIVA/TM4C129x/platform.mk
View File

@ -4,7 +4,8 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
${CHIBIOS}/community/os/hal/ports/TIVA/LLD/st_lld.c \
${CHIBIOS}/community/os/hal/ports/TIVA/LLD/pal_lld.c \
${CHIBIOS}/community/os/hal/ports/TIVA/LLD/serial_lld.c \
${CHIBIOS}/community/os/hal/ports/TIVA/LLD/mac_lld.c
${CHIBIOS}/community/os/hal/ports/TIVA/LLD/mac_lld.c \
${CHISIOS}/community/os/hal/ports/TIVA/LLD/ext_lld.c
# Required include directories
PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \

51
testhal/TIVA/TM4C123x/EXT/.cproject Normal file
View File

@ -0,0 +1,51 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<?fileVersion 4.0.0?>
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<builder autoBuildTarget="all" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.579570726" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
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<storageModule moduleId="refreshScope"/>
</cproject>

106
testhal/TIVA/TM4C123x/EXT/.project Normal file
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@ -0,0 +1,106 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>TM4C123x-EXT</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
<dictionary>
<key>?name?</key>
<value></value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.append_environment</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.autoBuildTarget</key>
<value>all</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildArguments</key>
<value>-j1</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildCommand</key>
<value>make</value>
</dictionary>
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<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
<value>clean</value>
</dictionary>
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<key>org.eclipse.cdt.make.core.contents</key>
<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
<value>false</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.enableFullBuild</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.fullBuildTarget</key>
<value>all</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.stopOnError</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
<value>true</value>
</dictionary>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
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<natures>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
<linkedResources>
<link>
<name>board</name>
<type>2</type>
<locationURI>CHIBIOS3/community/os/hal/boards/TI_TM4C123G_LAUNCHPAD</locationURI>
</link>
<link>
<name>community_os</name>
<type>2</type>
<locationURI>CHIBIOS3/community/os</locationURI>
</link>
<link>
<name>os</name>
<type>2</type>
<locationURI>CHIBIOS3/os</locationURI>
</link>
<link>
<name>test</name>
<type>2</type>
<locationURI>CHIBIOS3/test</locationURI>
</link>
</linkedResources>
<variableList>
<variable>
<name>CHIBIOS3</name>
<value>file:/C:/ChibiStudio/chibios3</value>
</variable>
</variableList>
</projectDescription>

197
testhal/TIVA/TM4C123x/EXT/Makefile Normal file
View File

@ -0,0 +1,197 @@
##############################################################################
# Build global options
# NOTE: Can be overridden externally.
#
# Compiler options here.
ifeq ($(USE_OPT),)
USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
endif
# Enable this if you want the linker to remove unused code and data
ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
# Enable this if you want link time optimizations (LTO)
ifeq ($(USE_LTO),)
USE_LTO = yes
endif
# If enabled, this option allows to compile the application in THUMB mode.
ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#
# Build global options
##############################################################################
##############################################################################
# Architecture or project specific options
#
# Stack size to be allocated to the Cortex-M process stack. This stack is
# the stack used by the main() thread.
ifeq ($(USE_PROCESS_STACKSIZE),)
USE_PROCESS_STACKSIZE = 0x400
endif
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
# stack is used for processing interrupts and exceptions.
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
USE_EXCEPTIONS_STACKSIZE = 0x400
endif
# Enables the use of FPU on Cortex-M4.
ifeq ($(USE_FPU),)
USE_FPU = no
endif
#
# Architecture or project specific options
##############################################################################
##############################################################################
# Project, sources and paths
#
# Define project name here
PROJECT = ch
# Imported source files and paths
CHIBIOS = ../../../../..
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/community/os/hal/boards/TI_TM4C123G_LAUNCHPAD/board.mk
include $(CHIBIOS)/community/os/hal/ports/TIVA/TM4C123x/platform.mk
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
include $(CHIBIOS)/os/rt/rt.mk
include $(CHIBIOS)/community/os/rt/ports/ARMCMx/compilers/GCC/mk/port_tm4c123x.mk
# Define linker script file here
LDSCRIPT= $(PORTLD)/TM4C123xH6.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CSRC = $(PORTSRC) \
$(KERNSRC) \
$(TESTSRC) \
$(HALSRC) \
$(OSALSRC) \
$(PLATFORMSRC) \
$(BOARDSRC) \
main.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CPPSRC =
# C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACSRC =
# C++ sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACPPSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM)
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(OSALINC) $(PLATFORMINC) $(BOARDINC) \
$(CHIBIOS)/os/various
#
# Project, sources and paths
##############################################################################
##############################################################################
# Compiler settings
#
MCU = cortex-m4
#TRGT = arm-elf-
TRGT = arm-none-eabi-
CC = $(TRGT)gcc
CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode.
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
OD = $(TRGT)objdump
SZ = $(TRGT)size
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
# ARM-specific options here
AOPT =
# THUMB-specific options here
TOPT = -mthumb -DTHUMB
# Define C warning options here
CWARN = -Wall -Wextra -Wstrict-prototypes
# Define C++ warning options here
CPPWARN = -Wall -Wextra
#
# Compiler settings
##############################################################################
##############################################################################
# Start of user section
#
# List all user C define here, like -D_DEBUG=1
UDEFS =
# Define ASM defines here
UADEFS =
# List all user directories here
UINCDIR =
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
#
# End of user defines
##############################################################################
RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC
include $(RULESPATH)/rules.mk

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testhal/TIVA/TM4C123x/EXT/chconf.h Normal file
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#ifndef _CHCONF_H_
#define _CHCONF_H_
/*===========================================================================*/
/**
* @name System timers settings
* @{
*/
/*===========================================================================*/
/**
* @brief System time counter resolution.
* @note Allowed values are 16 or 32 bits.
*/
#define CH_CFG_ST_RESOLUTION 32
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#define CH_CFG_ST_FREQUENCY 1000
/**
* @brief Time delta constant for the tick-less mode.
* @note If this value is zero then the system uses the classic
* periodic tick. This value represents the minimum number
* of ticks that is safe to specify in a timeout directive.
* The value one is not valid, timeouts are rounded up to
* this value.
*/
#define CH_CFG_ST_TIMEDELTA 0
/**
* @brief Realtime Counter frequency.
* @details Frequency of the system counter used for realtime delays and
* measurements.
*/
#define CH_CFG_RTC_FREQUENCY 80000000
/** @} */
/*===========================================================================*/
/**
* @name Kernel parameters and options
* @{
*/
/*===========================================================================*/
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
* @note The round robin preemption is not supported in tickless mode and
* must be set to zero in that case.
*/
#define CH_CFG_TIME_QUANTUM 0
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_CFG_USE_MEMCORE.
*/
#define CH_CFG_MEMCORE_SIZE 0
/**
* @brief Idle thread automatic spawn suppression.
* @details When this option is activated the function @p chSysInit()
* does not spawn the idle thread. The application @p main()
* function becomes the idle thread and must implement an
* infinite loop. */
#define CH_CFG_NO_IDLE_THREAD FALSE
/** @} */
/*===========================================================================*/
/**
* @name Performance options
* @{
*/
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#define CH_CFG_OPTIMIZE_SPEED TRUE
/** @} */
/*===========================================================================*/
/**
* @name Subsystem options
* @{
*/
/*===========================================================================*/
/**
* @brief Time Measurement APIs.
* @details If enabled then the time measurement APIs are included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_TM TRUE
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_REGISTRY TRUE
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_WAITEXIT TRUE
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_SEMAPHORES TRUE
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special
* requirements.
* @note Requires @p CH_CFG_USE_SEMAPHORES.
*/
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_MUTEXES TRUE
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_MUTEXES.
*/
#define CH_CFG_USE_CONDVARS TRUE
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_CONDVARS.
*/
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_EVENTS TRUE
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_EVENTS.
*/
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_MESSAGES TRUE
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special
* requirements.
* @note Requires @p CH_CFG_USE_MESSAGES.
*/
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_SEMAPHORES.
*/
#define CH_CFG_USE_MAILBOXES TRUE
/**
* @brief I/O Queues APIs.
* @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_QUEUES TRUE
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_MEMCORE TRUE
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
* @p CH_CFG_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#define CH_CFG_USE_HEAP TRUE
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#define CH_CFG_USE_MEMPOOLS TRUE
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_WAITEXIT.
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
*/
#define CH_CFG_USE_DYNAMIC TRUE
/** @} */
/*===========================================================================*/
/**
* @name Debug options
* @{
*/
/*===========================================================================*/
/**
* @brief Debug option, kernel statistics.
*
* @note The default is @p FALSE.
*/
#define CH_DBG_STATISTICS FALSE
/**
* @brief Debug option, system state check.
* @details If enabled the correct call protocol for system APIs is checked
* at runtime.
*
* @note The default is @p FALSE.
*/
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#define CH_DBG_ENABLE_CHECKS FALSE
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#define CH_DBG_ENABLE_ASSERTS FALSE
/**
* @brief Debug option, trace buffer.
* @details If enabled then the context switch circular trace buffer is
* activated.
*
* @note The default is @p FALSE.
*/
#define CH_DBG_ENABLE_TRACE FALSE
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#define CH_DBG_ENABLE_STACK_CHECK FALSE
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#define CH_DBG_FILL_THREADS FALSE
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p thread_t structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p FALSE.
* @note This debug option is not currently compatible with the
* tickless mode.
*/
#define CH_DBG_THREADS_PROFILING FALSE
/** @} */
/*===========================================================================*/
/**
* @name Kernel hooks
* @{
*/
/*===========================================================================*/
/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p thread_t structure.
*/
#define CH_CFG_THREAD_EXTRA_FIELDS \
/* Add threads custom fields here.*/
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitly from all
* the threads creation APIs.
*/
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
/**
* @brief Context switch hook.
* @details This hook is invoked just before switching between threads.
*/
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* System halt code here.*/ \
}
/**
* @brief Idle thread enter hook.
* @note This hook is invoked within a critical zone, no OS functions
* should be invoked from here.
* @note This macro can be used to activate a power saving mode.
*/
#define CH_CFG_IDLE_ENTER_HOOK() { \
}
/**
* @brief Idle thread leave hook.
* @note This hook is invoked within a critical zone, no OS functions
* should be invoked from here.
* @note This macro can be used to deactivate a power saving mode.
*/
#define CH_CFG_IDLE_LEAVE_HOOK() { \
}
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#define CH_CFG_IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
/**
* @brief System tick event hook.
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#define CH_CFG_SYSTEM_TICK_HOOK() { \
/* System tick event code here.*/ \
}
/**
* @brief System halt hook.
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
/* System halt code here.*/ \
}
/** @} */
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
#endif /* _CHCONF_H_ */
/** @} */

10
testhal/TIVA/TM4C123x/EXT/debug/OpenOCD on ICDI (prompts for .cfg target configuration).launch Normal file
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@ -0,0 +1,10 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.eclipse.ui.externaltools.ProgramLaunchConfigurationType">
<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
<listEntry value="org.eclipse.ui.externaltools.launchGroup"/>
</listAttribute>
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LAUNCH_CONFIGURATION_BUILD_SCOPE" value="${none}"/>
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LOCATION" value="${eclipse_home}\..\tools\openocd\bin\openocd.exe"/>
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_TOOL_ARGUMENTS" value="-c &quot;telnet_port 4444&quot; -f &quot;interface/ti-icdi.cfg&quot; -f &quot;${file_prompt}&quot;"/>
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_WORKING_DIRECTORY" value="${eclipse_home}\..\tools\openocd\bin\"/>
</launchConfiguration>

52
testhal/TIVA/TM4C123x/EXT/debug/TM4C123x-EXT (OpenOCD, Flash and Run).launch Normal file
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@ -0,0 +1,52 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
<stringAttribute key="bad_container_name" value="\TM4C123x-\debug"/>
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="1"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="true"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="true"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="monitor reset halt&#13;&#10;monitor reset init"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-none-eabi-gdb"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;contentList&gt;&lt;content id=&quot;dmachis-spi_serve_interrupt-(format)&quot; val=&quot;0&quot;/&gt;&lt;/contentList&gt;"/>
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;globalVariableList/&gt;&#13;&#10;"/>
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList/&gt;&#13;&#10;"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="TM4C123x-EXT"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="0.114656749"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/TM4C123x-EXT"/>
</listAttribute>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/>
</listAttribute>
<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
</listAttribute>
</launchConfiguration>

278
testhal/TIVA/TM4C123x/EXT/halconf.h Normal file
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#ifndef _HALCONF_H_
#define _HALCONF_H_
#include "mcuconf.h"
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE
#endif
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC FALSE
#endif
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT TRUE
#endif
/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#endif
/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE
#endif
/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI FALSE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL FALSE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI FALSE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE
#endif
/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
#define MAC_USE_ZERO_COPY FALSE
#endif
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif
/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
#endif /* _HALCONF_H_ */
/** @} */

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/*
Copyright (C) 2014 Marco Veeneman
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
static void extcb1(EXTDriver *extp, expchannel_t channel)
{
(void)extp;
(void)channel;
palTogglePad(GPIOF, GPIOF_LED_RED);
}
static void extcb2(EXTDriver *extp, expchannel_t channel)
{
(void)extp;
(void)channel;
palTogglePad(GPIOF, GPIOF_LED_GREEN);
}
static const EXTConfig extcfg =
{
{
/* GPIOA */
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
/* GPIOB */
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
/* GPIOC */
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
/* GPIOD */
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
/* GPIOE */
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
/* GPIOF */
{EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART, extcb1},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART, extcb2},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL}
}
};
/*
* Application entry point.
*/
int main(void)
{
/*
* System initializations.
* - HAL initialization, this also initializes the configured device drivers
* and performs the board-specific initializations.
* - Kernel initialization, the main() function becomes a thread and the
* RTOS is active.
*/
halInit();
chSysInit();
palSetPadMode(GPIOF, GPIOF_LED_RED, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOF, GPIOF_LED_GREEN, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(GPIOF, GPIOF_SW1, PAL_MODE_INPUT_PULLUP);
palSetPadMode(GPIOF, GPIOF_SW2, PAL_MODE_INPUT_PULLUP);
extStart(&EXTD1, &extcfg);
/*
* Normal main() thread activity
*/
while (TRUE) {
chThdSleepMilliseconds(500);
}
return 0;
}

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/*
* TM4C123x drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h.
*
* IRQ priorities:
* 7...0 Lowest...Highest.
*/
#define TM4C123x_MCUCONF
/*
* HAL driver system settings.
*/
#define TIVA_OSCSRC TIVA_RCC2_OSCSRC2_MOSC
#define TIVA_MOSC_ENABLE TRUE
#define TIVA_DIV400_VALUE 1
#define TIVA_SYSDIV_VALUE 2
#define TIVA_USESYSDIV_ENABLE FALSE
#define TIVA_SYSDIV2LSB_ENABLE FALSE
#define TIVA_BYPASS_VALUE 0
#define TIVA_PWM_FIELDS (TIVA_RCC_USEPWMDIV | \
TIVA_RCC_PWMDIV_8)
/*
* GPIO driver system settings.
*/
#define TIVA_GPIO_GPIOA_USE_AHB TRUE
#define TIVA_GPIO_GPIOB_USE_AHB TRUE
#define TIVA_GPIO_GPIOC_USE_AHB TRUE
#define TIVA_GPIO_GPIOD_USE_AHB TRUE
#define TIVA_GPIO_GPIOE_USE_AHB TRUE
#define TIVA_GPIO_GPIOF_USE_AHB TRUE
/*
* GPT driver system settings.
*/
#define TIVA_GPT_USE_GPT0 FALSE
#define TIVA_GPT_USE_GPT1 FALSE
#define TIVA_GPT_USE_GPT2 FALSE
#define TIVA_GPT_USE_GPT3 FALSE
#define TIVA_GPT_USE_GPT4 FALSE
#define TIVA_GPT_USE_GPT5 FALSE
#define TIVA_GPT_USE_WGPT0 FALSE
#define TIVA_GPT_USE_WGPT1 FALSE
#define TIVA_GPT_USE_WGPT2 FALSE
#define TIVA_GPT_USE_WGPT3 FALSE
#define TIVA_GPT_USE_WGPT4 FALSE
#define TIVA_GPT_USE_WGPT5 FALSE
#define TIVA_GPT_GPT0A_IRQ_PRIORITY 7
#define TIVA_GPT_GPT1A_IRQ_PRIORITY 7
#define TIVA_GPT_GPT2A_IRQ_PRIORITY 7
#define TIVA_GPT_GPT3A_IRQ_PRIORITY 7
#define TIVA_GPT_GPT4A_IRQ_PRIORITY 7
#define TIVA_GPT_GPT5A_IRQ_PRIORITY 7
#define TIVA_GPT_WGPT0A_IRQ_PRIORITY 7
#define TIVA_GPT_WGPT1A_IRQ_PRIORITY 7
#define TIVA_GPT_WGPT2A_IRQ_PRIORITY 7
#define TIVA_GPT_WGPT3A_IRQ_PRIORITY 7
#define TIVA_GPT_WGPT4A_IRQ_PRIORITY 7
#define TIVA_GPT_WGPT5A_IRQ_PRIORITY 7
/*
* I2C driver system settings.
*/
#define TIVA_I2C_USE_I2C0 FALSE
#define TIVA_I2C_USE_I2C1 FALSE
#define TIVA_I2C_USE_I2C2 FALSE
#define TIVA_I2C_USE_I2C3 FALSE
#define TIVA_I2C_USE_I2C4 FALSE
#define TIVA_I2C_USE_I2C5 FALSE
#define TIVA_I2C_USE_I2C6 FALSE
#define TIVA_I2C_USE_I2C7 FALSE
#define TIVA_I2C_I2C0_IRQ_PRIORITY 4
#define TIVA_I2C_I2C1_IRQ_PRIORITY 4
#define TIVA_I2C_I2C2_IRQ_PRIORITY 4
#define TIVA_I2C_I2C3_IRQ_PRIORITY 4
#define TIVA_I2C_I2C4_IRQ_PRIORITY 4
#define TIVA_I2C_I2C5_IRQ_PRIORITY 4
#define TIVA_I2C_I2C6_IRQ_PRIORITY 4
#define TIVA_I2C_I2C7_IRQ_PRIORITY 4
/*
* PWM driver system settings.
*/
#define TIVA_PWM_USE_PWM0 FALSE
#define TIVA_PWM_USE_PWM1 FALSE
#define TIVA_PWM_PWM0_FAULT_IRQ_PRIORITY 4
#define TIVA_PWM_PWM0_0_IRQ_PRIORITY 4
#define TIVA_PWM_PWM0_1_IRQ_PRIORITY 4
#define TIVA_PWM_PWM0_2_IRQ_PRIORITY 4
#define TIVA_PWM_PWM0_3_IRQ_PRIORITY 4
#define TIVA_PWM_PWM1_FAULT_IRQ_PRIORITY 4
#define TIVA_PWM_PWM1_0_IRQ_PRIORITY 4
#define TIVA_PWM_PWM1_1_IRQ_PRIORITY 4
#define TIVA_PWM_PWM1_2_IRQ_PRIORITY 4
#define TIVA_PWM_PWM1_3_IRQ_PRIORITY 4
/*
* SERIAL driver system settings.
*/
#define TIVA_SERIAL_USE_UART0 FALSE
#define TIVA_SERIAL_USE_UART1 FALSE
#define TIVA_SERIAL_USE_UART2 FALSE
#define TIVA_SERIAL_USE_UART3 FALSE
#define TIVA_SERIAL_USE_UART4 FALSE
#define TIVA_SERIAL_USE_UART5 FALSE
#define TIVA_SERIAL_USE_UART6 FALSE
#define TIVA_SERIAL_USE_UART7 FALSE
#define TIVA_SERIAL_UART0_PRIORITY 5
#define TIVA_SERIAL_UART1_PRIORITY 5
#define TIVA_SERIAL_UART2_PRIORITY 5
#define TIVA_SERIAL_UART3_PRIORITY 5
#define TIVA_SERIAL_UART4_PRIORITY 5
#define TIVA_SERIAL_UART5_PRIORITY 5
#define TIVA_SERIAL_UART6_PRIORITY 5
#define TIVA_SERIAL_UART7_PRIORITY 5
/*
* SPI driver system settings.
*/
#define TIVA_SPI_USE_SSI0 TRUE
#define TIVA_SPI_USE_SSI1 FALSE
#define TIVA_SPI_USE_SSI2 FALSE
#define TIVA_SPI_USE_SSI3 FALSE
#define TIVA_SPI_SSI0_RX_UDMA_CHANNEL 10
#define TIVA_SPI_SSI1_RX_UDMA_CHANNEL 24
#define TIVA_SPI_SSI2_RX_UDMA_CHANNEL 12
#define TIVA_SPI_SSI3_RX_UDMA_CHANNEL 14
#define TIVA_SPI_SSI0_TX_UDMA_CHANNEL 11
#define TIVA_SPI_SSI1_TX_UDMA_CHANNEL 25
#define TIVA_SPI_SSI2_TX_UDMA_CHANNEL 13
#define TIVA_SPI_SSI3_TX_UDMA_CHANNEL 15
#define TIVA_SPI_SSI0_RX_UDMA_MAPPING 0
#define TIVA_SPI_SSI1_RX_UDMA_MAPPING 0
#define TIVA_SPI_SSI2_RX_UDMA_MAPPING 2
#define TIVA_SPI_SSI3_RX_UDMA_MAPPING 2
#define TIVA_SPI_SSI0_TX_UDMA_MAPPING 0
#define TIVA_SPI_SSI1_TX_UDMA_MAPPING 0
#define TIVA_SPI_SSI2_TX_UDMA_MAPPING 2
#define TIVA_SPI_SSI3_TX_UDMA_MAPPING 2
/*
* ST driver system settings.
*/
#define TIVA_ST_IRQ_PRIORITY 2
#define TIVA_ST_USE_WIDE_TIMER TRUE
#define TIVA_ST_TIMER_NUMBER 5
#define TIVA_ST_TIMER_LETTER A