Merge pull request #77 from sdalu/pwm_ppi
allow use of GPIOTE/PPI in PWM to drive gpio pin
This commit is contained in:
commit
3597ad7ed5
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@ -80,7 +80,7 @@
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/**
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* @brief Value identifying an invalid line.
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*/
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#define PAL_NOLINE FFU
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#define PAL_NOLINE ((ioline_t)-1)
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/** @} */
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/**
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@ -68,25 +68,27 @@ PWMDriver PWMD3;
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/*===========================================================================*/
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static void pwm_lld_serve_interrupt(PWMDriver *pwmp) {
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// Deal with PWM period
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if (pwmp->timer->EVENTS_COMPARE[pwmp->channels]) {
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pwmp->timer->EVENTS_COMPARE[pwmp->channels] = 0;
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if (pwmp->config->callback != NULL) {
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pwmp->config->callback(pwmp);
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}
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}
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// Deal with PWM channels
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uint8_t n;
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for (n = 0 ; n < pwmp->channels ; n++) {
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if (pwmp->timer->EVENTS_COMPARE[n]) {
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pwmp->timer->EVENTS_COMPARE[n] = 0;
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if (pwmp->config->channels[n].callback != NULL) {
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pwmp->config->channels[n].callback(pwmp);
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}
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}
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}
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// Deal with PWM period
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if (pwmp->timer->EVENTS_COMPARE[pwmp->channels]) {
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pwmp->timer->EVENTS_COMPARE[pwmp->channels] = 0;
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if (pwmp->config->callback != NULL) {
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pwmp->config->callback(pwmp);
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}
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}
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}
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/*===========================================================================*/
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@ -280,6 +282,47 @@ void pwm_lld_stop(PWMDriver *pwmp) {
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void pwm_lld_enable_channel(PWMDriver *pwmp,
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pwmchannel_t channel,
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pwmcnt_t width) {
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#if NRF51_PWM_USE_GPIOTE_PPI
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const PWMChannelConfig *cfg_channel = &pwmp->config->channels[channel];
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uint32_t outinit;
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switch(cfg_channel->mode & PWM_OUTPUT_MASK) {
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case PWM_OUTPUT_ACTIVE_LOW:
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outinit = GPIOTE_CONFIG_OUTINIT_Low;
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break;
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case PWM_OUTPUT_ACTIVE_HIGH:
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outinit = GPIOTE_CONFIG_OUTINIT_High;
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break;
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case PWM_OUTPUT_DISABLED:
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default:
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goto no_output_config;
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}
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const uint32_t gpio_pin = PAL_PAD(cfg_channel->ioline);
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const uint8_t gpiote_channel = cfg_channel->gpiote_channel;
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const uint8_t *ppi_channel = cfg_channel->ppi_channel;
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const uint32_t polarity = GPIOTE_CONFIG_POLARITY_Toggle;
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// Create GPIO Task
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NRF_GPIOTE->CONFIG[gpiote_channel] = GPIOTE_CONFIG_MODE_Task |
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((gpio_pin << GPIOTE_CONFIG_PSEL_Pos ) & GPIOTE_CONFIG_PSEL_Msk) |
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((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) |
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((outinit << GPIOTE_CONFIG_OUTINIT_Pos ) & GPIOTE_CONFIG_OUTINIT_Msk);
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// Program tasks (one for duty cycle, one for periode)
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NRF_PPI->CH[ppi_channel[0]].EEP =
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(uint32_t)&pwmp->timer->EVENTS_COMPARE[channel];
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NRF_PPI->CH[ppi_channel[0]].TEP =
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(uint32_t)&NRF_GPIOTE->TASKS_OUT[gpiote_channel];
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NRF_PPI->CH[ppi_channel[1]].EEP =
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(uint32_t)&pwmp->timer->EVENTS_COMPARE[pwmp->channels];
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NRF_PPI->CH[ppi_channel[1]].TEP =
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(uint32_t)&NRF_GPIOTE->TASKS_OUT[gpiote_channel];
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NRF_PPI->CHENSET = ((1 << ppi_channel[0]) | (1 << ppi_channel[1]));
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no_output_config:
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#endif
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pwmp->timer->CC[channel] = width;
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}
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@ -297,6 +340,22 @@ void pwm_lld_enable_channel(PWMDriver *pwmp,
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*/
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void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) {
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pwmp->timer->CC[channel] = 0;
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#if NRF51_PWM_USE_GPIOTE_PPI
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const PWMChannelConfig *cfg_channel = &pwmp->config->channels[channel];
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switch(cfg_channel->mode & PWM_OUTPUT_MASK) {
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case PWM_OUTPUT_ACTIVE_LOW:
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case PWM_OUTPUT_ACTIVE_HIGH: {
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const uint8_t gpiote_channel = cfg_channel->gpiote_channel;
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const uint8_t *ppi_channel = cfg_channel->ppi_channel;
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NRF_PPI->CHENCLR = ((1 << ppi_channel[0]) | (1 << ppi_channel[1]));
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NRF_GPIOTE->CONFIG[gpiote_channel] = GPIOTE_CONFIG_MODE_Disabled;
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break;
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}
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case PWM_OUTPUT_DISABLED:
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default:
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break;
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}
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#endif
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}
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/**
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@ -52,14 +52,28 @@
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief TIMER0 as driver implementation
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*/
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#if !defined(NRF51_PWM_USE_TIMER0)
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#define NRF51_PWM_USE_TIMER0 FALSE
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#endif
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/**
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* @brief TIMER1 as driver implementation
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*/
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#if !defined(NRF51_PWM_USE_TIMER1)
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#define NRF51_PWM_USE_TIMER1 FALSE
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#endif
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/**
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* @brief TIMER2 as driver implementation
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*/
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#if !defined(NRF51_PWM_USE_TIMER2)
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#define NRF51_PWM_USE_TIMER2 FALSE
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#endif
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@ -85,12 +99,13 @@
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#define NRF51_PWM_TIMER2_PRIORITY 12
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#endif
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/** @} */
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/**
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* @name Configuration options
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* @{
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* @brief Allow driver to use GPIOTE/PPI to control PAL line
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*/
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#if !defined(NRF51_PWM_USE_GPIOTE_PPI)
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#define NRF51_PWM_USE_GPIOTE_PPI FALSE
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#endif
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/** @} */
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/*===========================================================================*/
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@ -145,6 +160,32 @@ typedef struct {
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*/
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pwmcallback_t callback;
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/* End of the mandatory fields.*/
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/**
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* @brief PAL line to toggle.
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* @note Only used if mode is PWM_OUTPUT_HIGH or PWM_OUTPUT_LOW.
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* @note When NRF51_PWM_USE_GPIOTE_PPI is used and channel enabled,
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* it wont be possible to access this PAL line using the PAL
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* driver.
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*/
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ioline_t ioline;
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#if NRF51_PWM_USE_GPIOTE_PPI || defined(__DOXYGEN__)
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/**
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* @brief Unique GPIOTE channel to use. (1 channel)
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* @note Only used if mode is PWM_OUTPUT_HIGH or PWM_OUTPUT_LOW.
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* @note Only 4 GPIOTE channels are available on nRF51.
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*/
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uint8_t gpiote_channel;
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/**
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* @brief Unique PPI channels to use. (2 channels)
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* @note Only used if mode is PWM_OUTPUT_HIGH or PWM_OUTPUT_LOW.
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* @note Only 16 PPI channels are available on nRF51
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* (When Softdevice is enabled, only channels 0-7 are available)
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*/
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uint8_t ppi_channel[2];
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#endif
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} PWMChannelConfig;
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/**
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@ -39,9 +39,15 @@ int main(void) {
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.frequency = PWM_FREQUENCY_31250HZ,
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.period = 31250,
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.callback = pwm_cb_period,
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{ {PWM_OUTPUT_ACTIVE_HIGH, pwm_cb_channel0},
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{PWM_OUTPUT_DISABLED, NULL},
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{PWM_OUTPUT_DISABLED, NULL}
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{ { .mode = PWM_OUTPUT_DISABLED,
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.callback = pwm_cb_channel0, },
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{ .mode = PWM_OUTPUT_ACTIVE_HIGH,
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.callback = NULL,
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.ioline = LINE_LED2,
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.gpiote_channel = 0,
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.ppi_channel = { 0, 1 } },
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{ .mode = PWM_OUTPUT_DISABLED,
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.callback = NULL, },
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},
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};
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@ -62,6 +68,7 @@ int main(void) {
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pwmEnablePeriodicNotification(&PWMD1);
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pwmEnableChannel(&PWMD1, 0, PWM_FRACTION_TO_WIDTH(&PWMD1, 2, 1));
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pwmEnableChannelNotification(&PWMD1, 0);
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pwmEnableChannel(&PWMD1, 1, PWM_FRACTION_TO_WIDTH(&PWMD1, 4, 3));
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while (1) {
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chThdSleepMilliseconds(500);
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@ -25,5 +25,6 @@
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#define NRF51_ST_USE_RTC1 FALSE
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#define NRF51_ST_USE_TIMER0 FALSE
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#define NRF51_PWM_USE_TIMER0 TRUE
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#define NRF51_PWM_USE_GPIOTE_PPI TRUE
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#endif /* _MCUCONF_H_ */
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