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Rename OTG1 -> USBFS

This commit is contained in:
Stefan Kerkmann 2021-03-23 11:25:49 +01:00
parent b8976b4fb5
commit 3a51ec0bf3
9 changed files with 82 additions and 82 deletions
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8
os/hal/ports/GD/GD32VF103/OTG/gd32_otg.h
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@ -22,13 +22,13 @@
* @{ * @{
*/ */
#ifndef GD32_OTG_H #ifndef GD32_USBFS_H
#define GD32_OTG_H #define GD32_USBFS_H
/** /**
* @brief OTG_FS FIFO memory size in words. * @brief OTG_FS FIFO memory size in words.
*/ */
#define GD32_OTG1_FIFO_MEM_SIZE 320 #define GD32_USBFS_FIFO_MEM_SIZE 320
/** /**
* @brief Host channel registers group. * @brief Host channel registers group.
@ -899,6 +899,6 @@ typedef struct {
*/ */
#define OTG_FS ((gd32_otg_t *)OTG_FS_ADDR) #define OTG_FS ((gd32_otg_t *)OTG_FS_ADDR)
#endif /* GD32_OTG_H */ #endif /* GD32_USBFS_H */
/** @} */ /** @} */

26
os/hal/ports/GD/GD32VF103/OTG/hal_usb_lld.c
View File

@ -38,7 +38,7 @@
#define EP0_MAX_INSIZE 64 #define EP0_MAX_INSIZE 64
#define EP0_MAX_OUTSIZE 64 #define EP0_MAX_OUTSIZE 64
#if GD32_OTG_STEPPING == 1 #if GD32_USBFS_STEPPING == 1
#if defined(BOARD_OTG_NOVBUSSENS) #if defined(BOARD_OTG_NOVBUSSENS)
#define GCCFG_INIT_VALUE (GCCFG_NOVBUSSENS | GCCFG_VBUSASEN | \ #define GCCFG_INIT_VALUE (GCCFG_NOVBUSSENS | GCCFG_VBUSASEN | \
GCCFG_VBUSBSEN | GCCFG_PWRDWN) GCCFG_VBUSBSEN | GCCFG_PWRDWN)
@ -47,7 +47,7 @@
GCCFG_PWRDWN) GCCFG_PWRDWN)
#endif #endif
#elif GD32_OTG_STEPPING == 2 #elif GD32_USBFS_STEPPING == 2
#if defined(BOARD_OTG_NOVBUSSENS) #if defined(BOARD_OTG_NOVBUSSENS)
#define GCCFG_INIT_VALUE GCCFG_PWRDWN #define GCCFG_INIT_VALUE GCCFG_PWRDWN
#else #else
@ -61,7 +61,7 @@
/*===========================================================================*/ /*===========================================================================*/
/** @brief OTG_FS driver identifier.*/ /** @brief OTG_FS driver identifier.*/
#if GD32_USB_USE_OTG1 || defined(__DOXYGEN__) #if GD32_USB_USE_USBFS || defined(__DOXYGEN__)
USBDriver USBD1; USBDriver USBD1;
#endif #endif
@ -106,11 +106,11 @@ static const USBEndpointConfig ep0config = {
ep0setup_buffer ep0setup_buffer
}; };
#if GD32_USB_USE_OTG1 #if GD32_USB_USE_USBFS
static const gd32_otg_params_t fsparams = { static const gd32_otg_params_t fsparams = {
GD32_USB_OTG1_RX_FIFO_SIZE / 4, GD32_USB_USBFS_RX_FIFO_SIZE / 4,
GD32_OTG1_FIFO_MEM_SIZE, GD32_USBFS_FIFO_MEM_SIZE,
GD32_OTG1_ENDPOINTS GD32_USBFS_ENDPOINTS
}; };
#endif #endif
@ -427,7 +427,7 @@ static void otg_epout_handler(USBDriver *usbp, usbep_t ep) {
/* EP0 requires special handling.*/ /* EP0 requires special handling.*/
if (ep == 0) { if (ep == 0) {
#if defined(GD32_OTG_SEQUENCE_WORKAROUND) #if defined(GD32_USBFS_SEQUENCE_WORKAROUND)
/* If an OUT transaction end interrupt is processed while the state /* If an OUT transaction end interrupt is processed while the state
machine is not in an OUT state then it is ignored, this is caused machine is not in an OUT state then it is ignored, this is caused
on some devices (L4) apparently injecting spurious data complete on some devices (L4) apparently injecting spurious data complete
@ -623,13 +623,13 @@ static void usb_lld_serve_interrupt(USBDriver *usbp) {
/* Driver interrupt handlers. */ /* Driver interrupt handlers. */
/*===========================================================================*/ /*===========================================================================*/
#if GD32_USB_USE_OTG1 || defined(__DOXYGEN__) #if GD32_USB_USE_USBFS || defined(__DOXYGEN__)
/** /**
* @brief OTG1 interrupt handler. * @brief USBFS interrupt handler.
* *
* @isr * @isr
*/ */
OSAL_IRQ_HANDLER(GD32_OTG1_HANDLER) { OSAL_IRQ_HANDLER(GD32_USBFS_HANDLER) {
OSAL_IRQ_PROLOGUE(); OSAL_IRQ_PROLOGUE();
@ -678,7 +678,7 @@ void usb_lld_start(USBDriver *usbp) {
rccResetOTG_FS(); rccResetOTG_FS();
/* Enables IRQ vector.*/ /* Enables IRQ vector.*/
eclicEnableVector(GD32_OTG1_NUMBER, GD32_USB_OTG1_IRQ_PRIORITY, GD32_USB_OTG1_IRQ_TRIGGER); eclicEnableVector(GD32_USBFS_NUMBER, GD32_USB_USBFS_IRQ_PRIORITY, GD32_USB_USBFS_IRQ_TRIGGER);
/* - Forced device mode. /* - Forced device mode.
- USB turn-around time = TRDT_VALUE_FS. - USB turn-around time = TRDT_VALUE_FS.
@ -751,7 +751,7 @@ void usb_lld_stop(USBDriver *usbp) {
otgp->GCCFG = 0; otgp->GCCFG = 0;
if (&USBD1 == usbp) { if (&USBD1 == usbp) {
eclicDisableVector(GD32_OTG1_NUMBER); eclicDisableVector(GD32_USBFS_NUMBER);
rccDisableOTG_FS(); rccDisableOTG_FS();
} }
} }

68
os/hal/ports/GD/GD32VF103/OTG/hal_usb_lld.h
View File

@ -53,27 +53,27 @@
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief OTG1 driver enable switch. * @brief USBFS driver enable switch.
* @details If set to @p TRUE the support for OTG_FS is included. * @details If set to @p TRUE the support for OTG_FS is included.
* @note The default is @p FALSE * @note The default is @p FALSE
*/ */
#if !defined(GD32_USB_USE_OTG1) || defined(__DOXYGEN__) #if !defined(GD32_USB_USE_USBFS) || defined(__DOXYGEN__)
#define GD32_USB_USE_OTG1 FALSE #define GD32_USB_USE_USBFS FALSE
#endif #endif
/** /**
* @brief OTG1 interrupt priority level setting. * @brief USBFS interrupt priority level setting.
*/ */
#if !defined(GD32_USB_OTG1_IRQ_PRIORITY) || defined(__DOXYGEN__) #if !defined(GD32_USB_USBFS_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define GD32_USB_OTG1_IRQ_PRIORITY 1 #define GD32_USB_USBFS_IRQ_PRIORITY 1
#endif #endif
/** /**
* @brief OTG1 RX shared FIFO size. * @brief USBFS RX shared FIFO size.
* @note Must be a multiple of 4. * @note Must be a multiple of 4.
*/ */
#if !defined(GD32_USB_OTG1_RX_FIFO_SIZE) || defined(__DOXYGEN__) #if !defined(GD32_USB_USBFS_RX_FIFO_SIZE) || defined(__DOXYGEN__)
#define GD32_USB_OTG1_RX_FIFO_SIZE 128 #define GD32_USB_USBFS_RX_FIFO_SIZE 128
#endif #endif
/** /**
@ -107,53 +107,53 @@
/*===========================================================================*/ /*===========================================================================*/
/* Registry checks.*/ /* Registry checks.*/
#if !defined(GD32_OTG_STEPPING) #if !defined(GD32_USBFS_STEPPING)
#error "GD32_OTG_STEPPING not defined in registry" #error "GD32_USBFS_STEPPING not defined in registry"
#endif #endif
#if (GD32_OTG_STEPPING < 1) || (GD32_OTG_STEPPING > 2) #if (GD32_USBFS_STEPPING < 1) || (GD32_USBFS_STEPPING > 2)
#error "unsupported GD32_OTG_STEPPING" #error "unsupported GD32_USBFS_STEPPING"
#endif #endif
#if GD32_HAS_OTG1 && !defined(GD32_OTG1_ENDPOINTS) #if GD32_HAS_USBFS && !defined(GD32_USBFS_ENDPOINTS)
#error "GD32_OTG1_ENDPOINTS not defined in registry" #error "GD32_USBFS_ENDPOINTS not defined in registry"
#endif #endif
#if GD32_HAS_OTG1 && !defined(GD32_OTG1_FIFO_MEM_SIZE) #if GD32_HAS_USBFS && !defined(GD32_USBFS_FIFO_MEM_SIZE)
#error "GD32_OTG1_FIFO_MEM_SIZE not defined in registry" #error "GD32_USBFS_FIFO_MEM_SIZE not defined in registry"
#endif #endif
#if (GD32_USB_USE_OTG1 && !defined(GD32_OTG1_HANDLER)) #if (GD32_USB_USE_USBFS && !defined(GD32_USBFS_HANDLER))
#error "GD32_OTGx_HANDLER not defined in registry" #error "GD32_USBFS_HANDLER not defined in registry"
#endif #endif
#if (GD32_USB_USE_OTG1 && !defined(GD32_OTG1_NUMBER)) #if (GD32_USB_USE_USBFS && !defined(GD32_USBFS_NUMBER))
#error "GD32_OTGx_NUMBER not defined in registry" #error "GD32_USBFS_NUMBER not defined in registry"
#endif #endif
/** /**
* @brief Maximum endpoint address. * @brief Maximum endpoint address.
*/ */
#define USB_MAX_ENDPOINTS GD32_OTG1_ENDPOINTS #define USB_MAX_ENDPOINTS GD32_USBFS_ENDPOINTS
#if GD32_USB_USE_OTG1 && !GD32_HAS_OTG1 #if GD32_USB_USE_USBFS && !GD32_HAS_USBFS
#error "OTG1 not present in the selected device" #error "USBFS not present in the selected device"
#endif #endif
#if !GD32_USB_USE_OTG1 #if !GD32_USB_USE_USBFS
#error "USB driver activated but no USB peripheral assigned" #error "USB driver activated but no USB peripheral assigned"
#endif #endif
#if GD32_USB_USE_OTG1 && \ #if GD32_USB_USE_USBFS && \
!OSAL_IRQ_IS_VALID_PRIORITY(GD32_USB_OTG1_IRQ_PRIORITY) !OSAL_IRQ_IS_VALID_PRIORITY(GD32_USB_USBFS_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to OTG1" #error "Invalid IRQ priority assigned to USBFS"
#endif #endif
#if (GD32_USB_OTG1_RX_FIFO_SIZE & 3) != 0 #if (GD32_USB_USBFS_RX_FIFO_SIZE & 3) != 0
#error "OTG1 RX FIFO size must be a multiple of 4" #error "USBFS RX FIFO size must be a multiple of 4"
#endif #endif
#define GD32_USBCLK GD32_OTGFSCLK #define GD32_USBCLK GD32_USBFSCLK
/* Allowing for a small tolerance.*/ /* Allowing for a small tolerance.*/
#if GD32_USBCLK < 47880000 || GD32_USBCLK > 48120000 #if GD32_USBCLK < 47880000 || GD32_USBCLK > 48120000
@ -447,7 +447,7 @@ struct USBDriver {
* *
* @notapi * @notapi
*/ */
#if (GD32_OTG_STEPPING == 1) || defined(__DOXYGEN__) #if (GD32_USBFS_STEPPING == 1) || defined(__DOXYGEN__)
#define usb_lld_connect_bus(usbp) ((usbp)->otg->GCCFG |= GCCFG_VBUSBSEN) #define usb_lld_connect_bus(usbp) ((usbp)->otg->GCCFG |= GCCFG_VBUSBSEN)
#else #else
#define usb_lld_connect_bus(usbp) ((usbp)->otg->DCTL &= ~DCTL_SDIS) #define usb_lld_connect_bus(usbp) ((usbp)->otg->DCTL &= ~DCTL_SDIS)
@ -458,7 +458,7 @@ struct USBDriver {
* *
* @notapi * @notapi
*/ */
#if (GD32_OTG_STEPPING == 1) || defined(__DOXYGEN__) #if (GD32_USBFS_STEPPING == 1) || defined(__DOXYGEN__)
#define usb_lld_disconnect_bus(usbp) ((usbp)->otg->GCCFG &= ~GCCFG_VBUSBSEN) #define usb_lld_disconnect_bus(usbp) ((usbp)->otg->GCCFG &= ~GCCFG_VBUSBSEN)
#else #else
#define usb_lld_disconnect_bus(usbp) ((usbp)->otg->DCTL |= DCTL_SDIS) #define usb_lld_disconnect_bus(usbp) ((usbp)->otg->DCTL |= DCTL_SDIS)
@ -480,7 +480,7 @@ struct USBDriver {
/* External declarations. */ /* External declarations. */
/*===========================================================================*/ /*===========================================================================*/
#if GD32_USB_USE_OTG1 && !defined(__DOXYGEN__) #if GD32_USB_USE_USBFS && !defined(__DOXYGEN__)
extern USBDriver USBD1; extern USBDriver USBD1;
#endif #endif

6
os/hal/ports/GD/GD32VF103/gd32_isr.h
View File

@ -106,8 +106,8 @@
/* /*
* OTG units. * OTG units.
*/ */
#define GD32_OTG1_HANDLER vector86 #define GD32_USBFS_HANDLER vector86
#define GD32_OTG1_NUMBER 86 #define GD32_USBFS_NUMBER 86
/* /*
* RTC unit * RTC unit
@ -287,7 +287,7 @@
#define GD32_UART_USART2_IRQ_TRIGGER ECLIC_TRIGGER_DEFAULT #define GD32_UART_USART2_IRQ_TRIGGER ECLIC_TRIGGER_DEFAULT
#define GD32_UART_USART3_IRQ_TRIGGER ECLIC_TRIGGER_DEFAULT #define GD32_UART_USART3_IRQ_TRIGGER ECLIC_TRIGGER_DEFAULT
#define GD32_UART_USART6_IRQ_TRIGGER ECLIC_TRIGGER_DEFAULT #define GD32_UART_USART6_IRQ_TRIGGER ECLIC_TRIGGER_DEFAULT
#define GD32_USB_OTG1_IRQ_TRIGGER ECLIC_TRIGGER_DEFAULT #define GD32_USB_USBFS_IRQ_TRIGGER ECLIC_TRIGGER_DEFAULT
/*===========================================================================*/ /*===========================================================================*/
/* Derived constants and error checks. */ /* Derived constants and error checks. */

6
os/hal/ports/GD/GD32VF103/gd32_registry.h
View File

@ -303,9 +303,9 @@
#endif #endif
/* USB attributes.*/ /* USB attributes.*/
#define GD32_OTG_STEPPING 1 #define GD32_USBFS_STEPPING 1
#define GD32_HAS_OTG1 TRUE #define GD32_HAS_USBFS TRUE
#define GD32_OTG1_ENDPOINTS 3 #define GD32_USBFS_ENDPOINTS 3
#define GD32_HAS_USB TRUE #define GD32_HAS_USB TRUE

2
os/hal/ports/GD/GD32VF103/hal_lld.c
View File

@ -234,7 +234,7 @@ void gd32_clock_init(void) {
#endif #endif
/* Clock settings.*/ /* Clock settings.*/
#if GD32_HAS_OTG1 #if GD32_HAS_USBFS
RCC->CFGR = GD32_MCOSEL | GD32_USBPRE | GD32_PLLMUL | GD32_PLLSRC | RCC->CFGR = GD32_MCOSEL | GD32_USBPRE | GD32_PLLMUL | GD32_PLLSRC |
GD32_ADCPRE | GD32_PPRE2 | GD32_PPRE1 | GD32_HPRE; GD32_ADCPRE | GD32_PPRE2 | GD32_PPRE1 | GD32_HPRE;
#else #else

8
os/hal/ports/GD/GD32VF103/hal_lld_f103.h
View File

@ -571,13 +571,13 @@
* @brief USB frequency. * @brief USB frequency.
*/ */
#if (GD32_USBPRE == GD32_USBPRE_DIV1P5) || defined(__DOXYGEN__) #if (GD32_USBPRE == GD32_USBPRE_DIV1P5) || defined(__DOXYGEN__)
#define GD32_OTGFSCLK ((GD32_PLLCLKOUT * 2) / 3) #define GD32_USBFSCLK ((GD32_PLLCLKOUT * 2) / 3)
#elif (GD32_USBPRE == GD32_USBPRE_DIV1) #elif (GD32_USBPRE == GD32_USBPRE_DIV1)
#define GD32_OTGFSCLK GD32_PLLCLKOUT #define GD32_USBFSCLK GD32_PLLCLKOUT
#elif (GD32_USBPRE == GD32_USBPRE_DIV2) #elif (GD32_USBPRE == GD32_USBPRE_DIV2)
#define GD32_OTGFSCLK GD32_PLLCLKOUT / 2 #define GD32_USBFSCLK GD32_PLLCLKOUT / 2
#elif (GD32_USBPRE == GD32_USBPRE_DIV2P5) #elif (GD32_USBPRE == GD32_USBPRE_DIV2P5)
#define GD32_OTGFSCLK ((GD32_PLLCLKOUT * 2) / 5) #define GD32_USBFSCLK ((GD32_PLLCLKOUT * 2) / 5)
#else #else
#error "invalid GD32_USBPRE value specified" #error "invalid GD32_USBPRE value specified"
#endif #endif

24
os/hal/ports/GD/GD32VF103/hal_lld_f105_f107.h
View File

@ -165,8 +165,8 @@
#define GD32_PLLSRC_PREDIV1 (1 << 16) /**< PLL clock source is #define GD32_PLLSRC_PREDIV1 (1 << 16) /**< PLL clock source is
PREDIV1. */ PREDIV1. */
#define GD32_OTGFSPRE_DIV2 (1 << 22) /**< HCLK*2 divided by 2. */ #define GD32_USBFSPRE_DIV2 (1 << 22) /**< HCLK*2 divided by 2. */
#define GD32_OTGFSPRE_DIV3 (0 << 22) /**< HCLK*2 divided by 3. */ #define GD32_USBFSPRE_DIV3 (0 << 22) /**< HCLK*2 divided by 3. */
#define GD32_MCOSEL_NOCLOCK (0 << 24) /**< No clock on MCO pin. */ #define GD32_MCOSEL_NOCLOCK (0 << 24) /**< No clock on MCO pin. */
#define GD32_MCOSEL_SYSCLK (4 << 24) /**< SYSCLK on MCO pin. */ #define GD32_MCOSEL_SYSCLK (4 << 24) /**< SYSCLK on MCO pin. */
@ -315,15 +315,15 @@
/** /**
* @brief USB clock setting. * @brief USB clock setting.
*/ */
#if !defined(GD32_OTG_CLOCK_REQUIRED) || defined(__DOXYGEN__) #if !defined(GD32_USBFS_CLOCK_REQUIRED) || defined(__DOXYGEN__)
#define GD32_OTG_CLOCK_REQUIRED TRUE #define GD32_USBFS_CLOCK_REQUIRED TRUE
#endif #endif
/** /**
* @brief OTG prescaler initialization. * @brief OTG prescaler initialization.
*/ */
#if !defined(GD32_OTGFSPRE) || defined(__DOXYGEN__) #if !defined(GD32_USBFSPRE) || defined(__DOXYGEN__)
#define GD32_OTGFSPRE GD32_OTGFSPRE_DIV3 #define GD32_USBFSPRE GD32_USBFSPRE_DIV3
#endif #endif
/** /**
@ -452,7 +452,7 @@
#endif /* !GD32_LSE_ENABLED */ #endif /* !GD32_LSE_ENABLED */
/* PLL1 activation conditions.*/ /* PLL1 activation conditions.*/
#if GD32_OTG_CLOCK_REQUIRED || \ #if GD32_USBFS_CLOCK_REQUIRED || \
(GD32_SW == GD32_SW_PLL) || \ (GD32_SW == GD32_SW_PLL) || \
(GD32_MCOSEL == GD32_MCOSEL_PLLDIV2) || \ (GD32_MCOSEL == GD32_MCOSEL_PLLDIV2) || \
defined(__DOXYGEN__) defined(__DOXYGEN__)
@ -772,12 +772,12 @@
/** /**
* @brief OTG frequency. * @brief OTG frequency.
*/ */
#if (GD32_OTGFSPRE == GD32_OTGFSPRE_DIV3) || defined(__DOXYGEN__) #if (GD32_USBFSPRE == GD32_USBFSPRE_DIV3) || defined(__DOXYGEN__)
#define GD32_OTGFSCLK (GD32_PLLVCO / 3) #define GD32_USBFSCLK (GD32_PLLVCO / 3)
#elif (GD32_OTGFSPRE == GD32_OTGFSPRE_DIV2) #elif (GD32_USBFSPRE == GD32_USBFSPRE_DIV2)
#define GD32_OTGFSCLK (GD32_PLLVCO / 2) #define GD32_USBFSCLK (GD32_PLLVCO / 2)
#else #else
#error "invalid GD32_OTGFSPRE value specified" #error "invalid GD32_USBFSPRE value specified"
#endif #endif
/** /**

16
os/hal/ports/GD/GD32VF103/stm32_registry.h
View File

@ -249,7 +249,7 @@
/* USB attributes.*/ /* USB attributes.*/
#define GD32_HAS_USB FALSE #define GD32_HAS_USB FALSE
#define GD32_HAS_OTG1 FALSE #define GD32_HAS_USBFS FALSE
#define GD32_HAS_OTG2 FALSE #define GD32_HAS_OTG2 FALSE
/* IWDG attributes.*/ /* IWDG attributes.*/
@ -434,7 +434,7 @@
/* USB attributes.*/ /* USB attributes.*/
#define GD32_HAS_USB FALSE #define GD32_HAS_USB FALSE
#define GD32_HAS_OTG1 FALSE #define GD32_HAS_USBFS FALSE
#define GD32_HAS_OTG2 FALSE #define GD32_HAS_OTG2 FALSE
/* IWDG attributes.*/ /* IWDG attributes.*/
@ -635,7 +635,7 @@
#define GD32_USB_ACCESS_SCHEME_2x16 FALSE #define GD32_USB_ACCESS_SCHEME_2x16 FALSE
#define GD32_USB_PMA_SIZE 512 #define GD32_USB_PMA_SIZE 512
#define GD32_USB_HAS_BCDR FALSE #define GD32_USB_HAS_BCDR FALSE
#define GD32_HAS_OTG1 FALSE #define GD32_HAS_USBFS FALSE
#define GD32_HAS_OTG2 FALSE #define GD32_HAS_OTG2 FALSE
/* IWDG attributes.*/ /* IWDG attributes.*/
@ -875,7 +875,7 @@
#define GD32_USB_ACCESS_SCHEME_2x16 FALSE #define GD32_USB_ACCESS_SCHEME_2x16 FALSE
#define GD32_USB_PMA_SIZE 512 #define GD32_USB_PMA_SIZE 512
#define GD32_USB_HAS_BCDR FALSE #define GD32_USB_HAS_BCDR FALSE
#define GD32_HAS_OTG1 FALSE #define GD32_HAS_USBFS FALSE
#define GD32_HAS_OTG2 FALSE #define GD32_HAS_OTG2 FALSE
/* IWDG attributes.*/ /* IWDG attributes.*/
@ -1133,7 +1133,7 @@
#define GD32_USB_ACCESS_SCHEME_2x16 FALSE #define GD32_USB_ACCESS_SCHEME_2x16 FALSE
#define GD32_USB_PMA_SIZE 512 #define GD32_USB_PMA_SIZE 512
#define GD32_USB_HAS_BCDR FALSE #define GD32_USB_HAS_BCDR FALSE
#define GD32_HAS_OTG1 FALSE #define GD32_HAS_USBFS FALSE
#define GD32_HAS_OTG2 FALSE #define GD32_HAS_OTG2 FALSE
/* IWDG attributes.*/ /* IWDG attributes.*/
@ -1368,9 +1368,9 @@
#define GD32_HAS_LPUART1 FALSE #define GD32_HAS_LPUART1 FALSE
/* USB attributes.*/ /* USB attributes.*/
#define GD32_OTG_STEPPING 1 #define GD32_USBFS_STEPPING 1
#define GD32_HAS_OTG1 TRUE #define GD32_HAS_USBFS TRUE
#define GD32_OTG1_ENDPOINTS 3 #define GD32_USBFS_ENDPOINTS 3
#define GD32_HAS_OTG2 FALSE #define GD32_HAS_OTG2 FALSE
#define GD32_HAS_USB FALSE #define GD32_HAS_USB FALSE