diff --git a/os/hal/ports/GD/GD32VF103/CAN/hal_can_lld.c b/os/hal/ports/GD/GD32VF103/CAN/hal_can_lld.c index f8ec4c11..6385b898 100644 --- a/os/hal/ports/GD/GD32VF103/CAN/hal_can_lld.c +++ b/os/hal/ports/GD/GD32VF103/CAN/hal_can_lld.c @@ -16,7 +16,7 @@ /** * @file CAN/hal_can_lld.c - * @brief STM32 CAN subsystem low level driver source. + * @brief GD32 CAN subsystem low level driver source. * * @addtogroup CAN * @{ @@ -786,7 +786,7 @@ void can_lld_wakeup(CANDriver *canp) { /** * @brief Programs the filters. - * @note This is an STM32-specific API. + * @note This is an GD32-specific API. * * @param[in] canp pointer to the @p CANDriver object * @param[in] can2sb number of the first filter assigned to CAN1 @@ -797,7 +797,7 @@ void can_lld_wakeup(CANDriver *canp) { * * @api */ -void canSTM32SetFilters(CANDriver *canp, uint32_t can2sb, +void canGD32SetFilters(CANDriver *canp, uint32_t can2sb, uint32_t num, const CANFilter *cfp) { #if GD32_CAN_USE_CAN1 diff --git a/os/hal/ports/GD/GD32VF103/CAN/hal_can_lld.h b/os/hal/ports/GD/GD32VF103/CAN/hal_can_lld.h index 142b8152..0d66682b 100644 --- a/os/hal/ports/GD/GD32VF103/CAN/hal_can_lld.h +++ b/os/hal/ports/GD/GD32VF103/CAN/hal_can_lld.h @@ -16,7 +16,7 @@ /** * @file CAN/hal_can_lld.h - * @brief STM32 CAN subsystem low level driver header. + * @brief GD32 CAN subsystem low level driver header. * * @addtogroup CAN * @{ @@ -241,7 +241,7 @@ typedef struct { /** * @brief CAN filter. - * @note Refer to the STM32 reference manual for info about filters. + * @note Refer to the GD32 reference manual for info about filters. */ typedef struct { /** @@ -426,7 +426,7 @@ extern "C" { void can_lld_sleep(CANDriver *canp); void can_lld_wakeup(CANDriver *canp); #endif /* CAN_USE_SLEEP_MODE */ - void canSTM32SetFilters(CANDriver *canp, uint32_t can2sb, + void canGD32SetFilters(CANDriver *canp, uint32_t can2sb, uint32_t num, const CANFilter *cfp); #ifdef __cplusplus } diff --git a/os/hal/ports/GD/GD32VF103/DAC/hal_dac_lld.c b/os/hal/ports/GD/GD32VF103/DAC/hal_dac_lld.c index d1dc1681..655d6f7a 100644 --- a/os/hal/ports/GD/GD32VF103/DAC/hal_dac_lld.c +++ b/os/hal/ports/GD/GD32VF103/DAC/hal_dac_lld.c @@ -16,7 +16,7 @@ /** * @file DAC/hal_dac_lld.c - * @brief STM32 DAC subsystem low level driver source. + * @brief GD32 DAC subsystem low level driver source. * * @addtogroup DAC * @{ diff --git a/os/hal/ports/GD/GD32VF103/DAC/hal_dac_lld.h b/os/hal/ports/GD/GD32VF103/DAC/hal_dac_lld.h index edbc50e1..a83d5c54 100644 --- a/os/hal/ports/GD/GD32VF103/DAC/hal_dac_lld.h +++ b/os/hal/ports/GD/GD32VF103/DAC/hal_dac_lld.h @@ -16,7 +16,7 @@ /** * @file DAC/hal_dac_lld.h - * @brief STM32 DAC subsystem low level driver header. + * @brief GD32 DAC subsystem low level driver header. * * @addtogroup DAC * @{ diff --git a/os/hal/ports/GD/GD32VF103/DMA/gd32_dma.c b/os/hal/ports/GD/GD32VF103/DMA/gd32_dma.c index 3a66d6a8..24232a64 100644 --- a/os/hal/ports/GD/GD32VF103/DMA/gd32_dma.c +++ b/os/hal/ports/GD/GD32VF103/DMA/gd32_dma.c @@ -19,7 +19,7 @@ * @brief DMA helper driver code. * * @addtogroup GD32_DMA - * @details DMA sharing helper driver. In the STM32 the DMA streams are a + * @details DMA sharing helper driver. In the GD32 the DMA streams are a * shared resource, this driver allows to allocate and free DMA * streams at runtime in order to allow all the other device * drivers to coordinate the access to the resource. @@ -377,7 +377,7 @@ OSAL_IRQ_HANDLER(GD32_DMA1_CH4_HANDLER) { /*===========================================================================*/ /** - * @brief STM32 DMA helper initialization. + * @brief GD32 DMA helper initialization. * * @init */ diff --git a/os/hal/ports/GD/GD32VF103/DMA/gd32_dma.h b/os/hal/ports/GD/GD32VF103/DMA/gd32_dma.h index b9895c9f..72a3bc05 100644 --- a/os/hal/ports/GD/GD32VF103/DMA/gd32_dma.h +++ b/os/hal/ports/GD/GD32VF103/DMA/gd32_dma.h @@ -17,9 +17,7 @@ /** * @file DMA/gd32_dma.h * @brief DMA helper driver header. - * @note This driver uses the new naming convention used for the STM32F2xx - * so the "DMA channels" are referred as "DMA streams". - * + * @addtogroup GD32_DMA * @{ */ @@ -45,7 +43,7 @@ /** * @brief Returns the request line associated to the specified stream. - * @note In some STM32 manuals the request line is named confusingly + * @note In some GD32 manuals the request line is named confusingly * channel. * * @param[in] id the unique numeric stream identifier @@ -223,7 +221,7 @@ typedef void (*gd32_dmaisr_t)(void *p, uint32_t flags); /** - * @brief STM32 DMA stream descriptor structure. + * @brief GD32 DMA stream descriptor structure. */ typedef struct { DMA_TypeDef *dma; /**< @brief Associated DMA. */ diff --git a/os/hal/ports/GD/GD32VF103/DMA/notes.txt b/os/hal/ports/GD/GD32VF103/DMA/notes.txt deleted file mode 100644 index 2fb15d2a..00000000 --- a/os/hal/ports/GD/GD32VF103/DMA/notes.txt +++ /dev/null @@ -1,26 +0,0 @@ -STM32 DMA driver. - -Driver capability: - -- The driver supports the STM32 traditional DMA controller in the following - configurations: 5ch, 7ch, 7ch+5ch, 7ch+7ch. -- Support for automatic the channel selection through the CSELR register. -- For devices without CSELR register it is possible to select channels but - the SYSCFG CFGR register is not configured, the user has to configure it - before starting the DMA driver. -- The driver supports shared ISR handlers with a quirk: the IRQ priority is - established by the first allocated channel among the channels sharing the - ISR. - -The file registry must export: - -GD32_ADVANCED_DMA - TRUE not used by the DMA drivers but other - drivers use it to enable checks on DMA - channels. Probably will be removed in the - future. -GD32_DMA_SUPPORTS_CSELR - TRUE if the DMA have a CSELR register. -GD32_DMA_SUPPORTS_DMAMUX - TRUE if the DMA is riven by a DMAMUX. -GD32_DMAn_NUM_CHANNELS - Number of channels in DMAs "n" (1..2). -GD32_DMAn_CHx_HANDLER - Vector name for IRQ "x" (1..7). If the macro - is not exported then the ISR is not declared. -GD32_DMAn_CHx_NUMBER - Vector number for IRQ "x" (1..7). diff --git a/os/hal/ports/GD/GD32VF103/GPIO/hal_pal_lld.c b/os/hal/ports/GD/GD32VF103/GPIO/hal_pal_lld.c index 55b421da..afebd54f 100644 --- a/os/hal/ports/GD/GD32VF103/GPIO/hal_pal_lld.c +++ b/os/hal/ports/GD/GD32VF103/GPIO/hal_pal_lld.c @@ -16,7 +16,7 @@ /** * @file GPIO/hal_pal_lld.c - * @brief STM32 PAL low level driver code. + * @brief GD32 PAL low level driver code. * * @addtogroup PAL * @{ @@ -68,10 +68,10 @@ palevent_t _pal_events[16]; /*===========================================================================*/ /** - * @brief STM32 I/O ports configuration. + * @brief GD32 I/O ports configuration. * @details Ports A-D(E) clocks enabled, AFIO clock enabled. * - * @param[in] config the STM32 ports configuration + * @param[in] config the GD32 ports configuration * * @notapi */ @@ -199,7 +199,7 @@ void _pal_lld_enablepadevent(ioportid_t port, padmask = 1U << (uint32_t)pad; /* Multiple channel setting of the same channel not allowed, first disable - it. This is done because on STM32 the same channel cannot be mapped on + it. This is done because on GD32 the same channel cannot be mapped on multiple ports.*/ osalDbgAssert(((EXTI->RTEN & padmask) == 0U) && ((EXTI->FTEN & padmask) == 0U), "channel already in use"); diff --git a/os/hal/ports/GD/GD32VF103/GPIO/hal_pal_lld.h b/os/hal/ports/GD/GD32VF103/GPIO/hal_pal_lld.h index f1fc356c..96efd0ee 100644 --- a/os/hal/ports/GD/GD32VF103/GPIO/hal_pal_lld.h +++ b/os/hal/ports/GD/GD32VF103/GPIO/hal_pal_lld.h @@ -16,7 +16,7 @@ /** * @file GPIO/hal_pal_lld.h - * @brief STM32 PAL low level driver header. + * @brief GD32 PAL low level driver header. * * @addtogroup PAL * @{ @@ -32,16 +32,16 @@ /*===========================================================================*/ /** - * @name STM32-specific I/O mode flags + * @name GD32-specific I/O mode flags * @{ */ /** - * @brief STM32 specific alternate push-pull output mode. + * @brief GD32 specific alternate push-pull output mode. */ #define PAL_MODE_GD32_ALTERNATE_PUSHPULL 16 /** - * @brief STM32 specific alternate open-drain output mode. + * @brief GD32 specific alternate open-drain output mode. */ #define PAL_MODE_GD32_ALTERNATE_OPENDRAIN 17 /** @} */ @@ -111,7 +111,7 @@ typedef struct { } gd32_gpio_setup_t; /** - * @brief STM32 GPIO static initializer. + * @brief GD32 GPIO static initializer. * @details An instance of this structure must be passed to @p palInit() at * system startup time in order to initialize the digital I/O * subsystem. This represents only the initial setup, specific pads @@ -167,7 +167,7 @@ typedef uint32_t iopadid_t; /*===========================================================================*/ /* I/O Ports Identifiers. */ -/* The low level driver wraps the definitions already present in the STM32 */ +/* The low level driver wraps the definitions already present in the GD32 */ /* firmware library. */ /*===========================================================================*/ diff --git a/os/hal/ports/GD/GD32VF103/I2C/hal_i2c_lld.h b/os/hal/ports/GD/GD32VF103/I2C/hal_i2c_lld.h index f25ee2e6..ef98aeb2 100644 --- a/os/hal/ports/GD/GD32VF103/I2C/hal_i2c_lld.h +++ b/os/hal/ports/GD/GD32VF103/I2C/hal_i2c_lld.h @@ -20,7 +20,7 @@ /** * @file I2C/hal_i2c_lld.h - * @brief STM32 I2C subsystem low level driver header. + * @brief GD32 I2C subsystem low level driver header. * * @addtogroup I2C * @{ diff --git a/os/hal/ports/GD/GD32VF103/OTG/gd32_otg.h b/os/hal/ports/GD/GD32VF103/OTG/gd32_otg.h index 18b0d336..e71451d5 100644 --- a/os/hal/ports/GD/GD32VF103/OTG/gd32_otg.h +++ b/os/hal/ports/GD/GD32VF103/OTG/gd32_otg.h @@ -16,7 +16,7 @@ /** * @file OTG/gd32_otg.h - * @brief STM32 OTG registers layout header. + * @brief GD32 OTG registers layout header. * * @addtogroup USB * @{ diff --git a/os/hal/ports/GD/GD32VF103/OTG/hal_usb_lld.c b/os/hal/ports/GD/GD32VF103/OTG/hal_usb_lld.c index 9fe95d47..d72ce4e9 100644 --- a/os/hal/ports/GD/GD32VF103/OTG/hal_usb_lld.c +++ b/os/hal/ports/GD/GD32VF103/OTG/hal_usb_lld.c @@ -16,7 +16,7 @@ /** * @file OTG/hal_usb_lld.c - * @brief STM32 USB subsystem low level driver source. + * @brief GD32 USB subsystem low level driver source. * * @addtogroup USB * @{ diff --git a/os/hal/ports/GD/GD32VF103/OTG/hal_usb_lld.h b/os/hal/ports/GD/GD32VF103/OTG/hal_usb_lld.h index fcc1e63d..b901b6ab 100644 --- a/os/hal/ports/GD/GD32VF103/OTG/hal_usb_lld.h +++ b/os/hal/ports/GD/GD32VF103/OTG/hal_usb_lld.h @@ -16,7 +16,7 @@ /** * @file OTG/hal_usb_lld.h - * @brief STM32 USB subsystem low level driver header. + * @brief GD32 USB subsystem low level driver header. * * @addtogroup USB * @{ diff --git a/os/hal/ports/GD/GD32VF103/SPI/hal_i2s_lld.c b/os/hal/ports/GD/GD32VF103/SPI/hal_i2s_lld.c index ad86f78f..223e2ddb 100644 --- a/os/hal/ports/GD/GD32VF103/SPI/hal_i2s_lld.c +++ b/os/hal/ports/GD/GD32VF103/SPI/hal_i2s_lld.c @@ -16,7 +16,7 @@ /** * @file SPI/hal_i2s_lld.c - * @brief STM32 I2S subsystem low level driver source. + * @brief GD32 I2S subsystem low level driver source. * * @addtogroup I2S * @{ diff --git a/os/hal/ports/GD/GD32VF103/SPI/hal_i2s_lld.h b/os/hal/ports/GD/GD32VF103/SPI/hal_i2s_lld.h index 75b7d17a..08458f64 100644 --- a/os/hal/ports/GD/GD32VF103/SPI/hal_i2s_lld.h +++ b/os/hal/ports/GD/GD32VF103/SPI/hal_i2s_lld.h @@ -16,7 +16,7 @@ /** * @file SPI/hal_i2s_lld.h - * @brief STM32 I2S subsystem low level driver header. + * @brief GD32 I2S subsystem low level driver header. * * @addtogroup I2S * @{ @@ -230,8 +230,8 @@ * @brief Low level fields of the I2S configuration structure. */ #define i2s_lld_config_fields \ - /* Configuration of the I2SCFGR register. \ - NOTE: See the STM32 reference manual, this register is used for \ + /* Configuration of the I2SCTL register. \ + NOTE: See the GD32 reference manual, this register is used for \ the I2S configuration, the following bits must not be \ specified because handled directly by the driver: \ - I2SMOD \ @@ -239,8 +239,8 @@ - I2SCFG \ */ \ int16_t i2sctl; \ - /* Configuration of the I2SPR register. \ - NOTE: See the STM32 reference manual, this register is used for \ + /* Configuration of the I2SPSC register. \ + NOTE: See the GD32 reference manual, this register is used for \ the I2S clock setup.*/ \ int16_t i2spsc diff --git a/os/hal/ports/GD/GD32VF103/SPI/hal_spi_lld.c b/os/hal/ports/GD/GD32VF103/SPI/hal_spi_lld.c index 60b18e67..6b7fb381 100644 --- a/os/hal/ports/GD/GD32VF103/SPI/hal_spi_lld.c +++ b/os/hal/ports/GD/GD32VF103/SPI/hal_spi_lld.c @@ -16,7 +16,7 @@ /** * @file SPI/hal_spi_lld.c - * @brief STM32 SPI subsystem low level driver source. + * @brief GD32 SPI subsystem low level driver source. * * @addtogroup SPI * @{ @@ -353,7 +353,7 @@ void spi_lld_stop(SPIDriver *spip) { */ void spi_lld_select(SPIDriver *spip) { - /* No implementation on STM32.*/ + /* No implementation on GD32.*/ } /** @@ -366,7 +366,7 @@ void spi_lld_select(SPIDriver *spip) { */ void spi_lld_unselect(SPIDriver *spip) { - /* No implementation on STM32.*/ + /* No implementation on GD32.*/ } #endif diff --git a/os/hal/ports/GD/GD32VF103/SPI/hal_spi_lld.h b/os/hal/ports/GD/GD32VF103/SPI/hal_spi_lld.h index 8e653ae2..918857fa 100644 --- a/os/hal/ports/GD/GD32VF103/SPI/hal_spi_lld.h +++ b/os/hal/ports/GD/GD32VF103/SPI/hal_spi_lld.h @@ -16,7 +16,7 @@ /** * @file SPI/hal_spi_lld.h - * @brief STM32 SPI subsystem low level driver header. + * @brief GD32 SPI subsystem low level driver header. * * @addtogroup SPI * @{ diff --git a/os/hal/ports/GD/GD32VF103/TIM/gd32_tim.h b/os/hal/ports/GD/GD32VF103/TIM/gd32_tim.h index f32f0c37..86a8db91 100644 --- a/os/hal/ports/GD/GD32VF103/TIM/gd32_tim.h +++ b/os/hal/ports/GD/GD32VF103/TIM/gd32_tim.h @@ -16,8 +16,8 @@ /** * @file TIM/gd32_tim.h - * @brief STM32 TIM units common header. - * @note This file requires definitions from the ST STM32 header file. + * @brief GD32 TIM units common header. + * @note This file requires definitions from the GD32 header file. * * @addtogroup GD32_TIM * @{ @@ -359,7 +359,7 @@ /*===========================================================================*/ /** - * @brief STM32 TIM registers block. + * @brief GD32 TIM registers block. * @note This is the most general known form, not all timers have * necessarily all registers and bits. */ diff --git a/os/hal/ports/GD/GD32VF103/TIM/hal_gpt_lld.c b/os/hal/ports/GD/GD32VF103/TIM/hal_gpt_lld.c index 0acc6df5..78c98a6f 100644 --- a/os/hal/ports/GD/GD32VF103/TIM/hal_gpt_lld.c +++ b/os/hal/ports/GD/GD32VF103/TIM/hal_gpt_lld.c @@ -16,7 +16,7 @@ /** * @file TIM/hal_gpt_lld.c - * @brief STM32 GPT subsystem low level driver source. + * @brief GD32 GPT subsystem low level driver source. * * @addtogroup GPT * @{ diff --git a/os/hal/ports/GD/GD32VF103/TIM/hal_gpt_lld.h b/os/hal/ports/GD/GD32VF103/TIM/hal_gpt_lld.h index 70c9e9fd..d44d0c01 100644 --- a/os/hal/ports/GD/GD32VF103/TIM/hal_gpt_lld.h +++ b/os/hal/ports/GD/GD32VF103/TIM/hal_gpt_lld.h @@ -16,7 +16,7 @@ /** * @file TIM/hal_gpt_lld.h - * @brief STM32 GPT subsystem low level driver header. + * @brief GD32 GPT subsystem low level driver header. * * @addtogroup GPT * @{ diff --git a/os/hal/ports/GD/GD32VF103/TIM/hal_icu_lld.c b/os/hal/ports/GD/GD32VF103/TIM/hal_icu_lld.c index 4df30b52..b6f9ab4a 100644 --- a/os/hal/ports/GD/GD32VF103/TIM/hal_icu_lld.c +++ b/os/hal/ports/GD/GD32VF103/TIM/hal_icu_lld.c @@ -20,7 +20,7 @@ /** * @file TIM/hal_icu_lld.c - * @brief STM32 ICU subsystem low level driver header. + * @brief GD32 ICU subsystem low level driver header. * * @addtogroup ICU * @{ diff --git a/os/hal/ports/GD/GD32VF103/TIM/hal_icu_lld.h b/os/hal/ports/GD/GD32VF103/TIM/hal_icu_lld.h index c756e2d3..075715d9 100644 --- a/os/hal/ports/GD/GD32VF103/TIM/hal_icu_lld.h +++ b/os/hal/ports/GD/GD32VF103/TIM/hal_icu_lld.h @@ -16,7 +16,7 @@ /** * @file TIM/hal_icu_lld.h - * @brief STM32 ICU subsystem low level driver header. + * @brief GD32 ICU subsystem low level driver header. * * @addtogroup ICU * @{ diff --git a/os/hal/ports/GD/GD32VF103/TIM/hal_pwm_lld.c b/os/hal/ports/GD/GD32VF103/TIM/hal_pwm_lld.c index b0bdce5f..fbc30a13 100644 --- a/os/hal/ports/GD/GD32VF103/TIM/hal_pwm_lld.c +++ b/os/hal/ports/GD/GD32VF103/TIM/hal_pwm_lld.c @@ -16,7 +16,7 @@ /** * @file TIM/hal_pwm_lld.c - * @brief STM32 PWM subsystem low level driver header. + * @brief GD32 PWM subsystem low level driver header. * * @addtogroup PWM * @{ diff --git a/os/hal/ports/GD/GD32VF103/TIM/hal_pwm_lld.h b/os/hal/ports/GD/GD32VF103/TIM/hal_pwm_lld.h index eea72097..5f2b9d2c 100644 --- a/os/hal/ports/GD/GD32VF103/TIM/hal_pwm_lld.h +++ b/os/hal/ports/GD/GD32VF103/TIM/hal_pwm_lld.h @@ -16,7 +16,7 @@ /** * @file TIM/hal_pwm_lld.h - * @brief STM32 PWM subsystem low level driver header. + * @brief GD32 PWM subsystem low level driver header. * * @addtogroup PWM * @{ @@ -39,24 +39,24 @@ #define PWM_CHANNELS GD32_TIM_MAX_CHANNELS /** - * @name STM32-specific PWM complementary output mode macros + * @name GD32-specific PWM complementary output mode macros * @{ */ /** * @brief Complementary output modes mask. - * @note This is an STM32-specific setting. + * @note This is an GD32-specific setting. */ #define PWM_COMPLEMENTARY_OUTPUT_MASK 0xF0 /** * @brief Complementary output not driven. - * @note This is an STM32-specific setting. + * @note This is an GD32-specific setting. */ #define PWM_COMPLEMENTARY_OUTPUT_DISABLED 0x00 /** * @brief Complementary output, active is logic level one. - * @note This is an STM32-specific setting. + * @note This is an GD32-specific setting. * @note This setting is only available if the configuration option * @p GD32_PWM_USE_ADVANCED is set to TRUE and only for advanced * timer TIM0. @@ -65,7 +65,7 @@ /** * @brief Complementary output, active is logic level zero. - * @note This is an STM32-specific setting. + * @note This is an GD32-specific setting. * @note This setting is only available if the configuration option * @p GD32_PWM_USE_ADVANCED is set to TRUE and only for advanced * timer TIM0. diff --git a/os/hal/ports/GD/GD32VF103/USART/hal_serial_lld.h b/os/hal/ports/GD/GD32VF103/USART/hal_serial_lld.h index ff1d3826..641550e5 100644 --- a/os/hal/ports/GD/GD32VF103/USART/hal_serial_lld.h +++ b/os/hal/ports/GD/GD32VF103/USART/hal_serial_lld.h @@ -16,7 +16,7 @@ /** * @file USART/hal_serial_lld.h - * @brief STM32 low level serial driver header. + * @brief GD32 low level serial driver header. * * @addtogroup SERIAL * @{ @@ -180,7 +180,7 @@ /*===========================================================================*/ /** - * @brief STM32 Serial Driver configuration structure. + * @brief GD32 Serial Driver configuration structure. * @details An instance of this structure must be passed to @p sdStart() * in order to configure and start a serial driver operations. * @note This structure content is architecture dependent, each driver diff --git a/os/hal/ports/GD/GD32VF103/USART/hal_uart_lld.c b/os/hal/ports/GD/GD32VF103/USART/hal_uart_lld.c index 5a89ad60..a60945e8 100644 --- a/os/hal/ports/GD/GD32VF103/USART/hal_uart_lld.c +++ b/os/hal/ports/GD/GD32VF103/USART/hal_uart_lld.c @@ -16,7 +16,7 @@ /** * @file USART/hal_uart_lld.c - * @brief STM32 low level UART driver code. + * @brief GD32 low level UART driver code. * * @addtogroup UART * @{ diff --git a/os/hal/ports/GD/GD32VF103/gd32_rcu.h b/os/hal/ports/GD/GD32VF103/gd32_rcu.h index fc395a65..cb04d4c4 100644 --- a/os/hal/ports/GD/GD32VF103/gd32_rcu.h +++ b/os/hal/ports/GD/GD32VF103/gd32_rcu.h @@ -18,7 +18,7 @@ * @file GD32VF103/gd32_rcu.h * @brief RCU helper driver header. * @note This file requires definitions from the ST header file - * @p stm32f10x.h. + * @p gd32vf103.h. * * @addtogroup GD32VF103_RCU * @{ diff --git a/os/hal/ports/GD/GD32VF103/gd32vf103.h b/os/hal/ports/GD/GD32VF103/gd32vf103.h index 509fd711..f08513c1 100644 --- a/os/hal/ports/GD/GD32VF103/gd32vf103.h +++ b/os/hal/ports/GD/GD32VF103/gd32vf103.h @@ -2940,7 +2940,7 @@ typedef struct /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F1 family) + * @brief Specific device feature definitions (not present on all devices in the GD32VF103 family) */ #define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ @@ -10721,7 +10721,7 @@ typedef struct /* */ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F1 serie) + * @brief Specific device feature definitions (not present on all devices in the GD32VF103 serie) */ #define SPI_I2S_SUPPORT /*!< I2S support */ #define I2S2_I2S3_CLOCK_FEATURE diff --git a/os/hal/ports/GD/GD32VF103/hal_lld.c b/os/hal/ports/GD/GD32VF103/hal_lld.c index f684b547..14dbd8f0 100644 --- a/os/hal/ports/GD/GD32VF103/hal_lld.c +++ b/os/hal/ports/GD/GD32VF103/hal_lld.c @@ -32,11 +32,6 @@ /* Driver exported variables. */ /*===========================================================================*/ -/** - * @brief CMSIS system core clock variable. - * @note It is declared in system_stm32f10x.h. - */ -//uint32_t SystemCoreClock = GD32_HCLK; /*===========================================================================*/ /* Driver local variables and types. */ @@ -135,7 +130,7 @@ void hal_lld_init(void) { } /** - * @brief STM32 clocks and PLL initialization. + * @brief GD32 clocks and PLL initialization. * @note All the involved constants come from the file @p board.h. * @note This function should be invoked just after the system reset. * diff --git a/os/hal/ports/GD/GD32VF103/hal_lld.h b/os/hal/ports/GD/GD32VF103/hal_lld.h index e91ef345..a8d2c144 100644 --- a/os/hal/ports/GD/GD32VF103/hal_lld.h +++ b/os/hal/ports/GD/GD32VF103/hal_lld.h @@ -194,7 +194,7 @@ */ #define GD32_SCS_IRC8M (0 << 0) /**< SYSCLK source is IRC8M. */ #define GD32_SCS_HXTAL (1 << 0) /**< SYSCLK source is HXTAL. */ -#define GD32_SCS_PLL (2 << 0) /**< SYSCLK source is PLL. */ +#define GD32_SCS_PLL (2 << 0) /**< SYSCLK source is PLL. */ #define GD32_AHBPSC_DIV1 (0 << 4) /**< SYSCLK divided by 1. */ #define GD32_AHBPSC_DIV2 (8 << 4) /**< SYSCLK divided by 2. */ @@ -222,10 +222,10 @@ #define GD32_ADCPSC_DIV4 (1 << 14) /**< PPRE2 divided by 4. */ #define GD32_ADCPSC_DIV6 (2 << 14) /**< PPRE2 divided by 6. */ #define GD32_ADCPSC_DIV8 (3 << 14) /**< PPRE2 divided by 8. */ -#define GD32_ADCPSC_DIV12 ((1 << 28) | (1 << 14)) /**< PPRE2 divided by 12. */ -#define GD32_ADCPSC_DIV16 ((1 << 28) | (3 << 14)) /**< PPRE2 divided by 16. */ +#define GD32_ADCPSC_DIV12 ((1 << 28) | (1 << 14)) /**< PPRE2 divided by 12. */ +#define GD32_ADCPSC_DIV16 ((1 << 28) | (3 << 14)) /**< PPRE2 divided by 16. */ -#define GD32_PLLSEL_IRC8M (0 << 16) /**< PLL clock source is IRC8M. */ +#define GD32_PLLSEL_IRC8M (0 << 16) /**< PLL clock source is IRC8M. */ #define GD32_PLLSEL_PREDV0 (1 << 16) /**< PLL clock source is PREDV0. */ diff --git a/os/hal/ports/GD/GD32VF103/xWDG/hal_wdg_lld.h b/os/hal/ports/GD/GD32VF103/xWDG/hal_wdg_lld.h index 396da301..d8398fd1 100644 --- a/os/hal/ports/GD/GD32VF103/xWDG/hal_wdg_lld.h +++ b/os/hal/ports/GD/GD32VF103/xWDG/hal_wdg_lld.h @@ -107,12 +107,12 @@ typedef struct WDGDriver WDGDriver; typedef struct { /** * @brief Configuration of the FWDGT_PSC register. - * @details See the STM32 reference manual for details. + * @details See the GD32 reference manual for details. */ uint32_t psc; /** * @brief Configuration of the FWDGT_RLD register. - * @details See the STM32 reference manual for details. + * @details See the GD32 reference manual for details. */ uint32_t rld; } WDGConfig;