Updated cmparams.h files to start using the TivaWare headers.
This commit is contained in:
marcoveeneman
parent
771c151111
commit
41f8b0c0c6
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@ -17,22 +17,32 @@
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/**
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* @file TM4C123x/cmparams.h
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* @brief ARM Cortex-M4 parameters for the TM4C123x.
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*
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* @defgroup ARMCMx_TM4C123x TM4C123x Specific Parameters
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* @ingroup ARMCMx_SPECIFIC
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* @details This file contains the Cortex-M4 specific parameters for the
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* TM4C123x platform.
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* @{
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*/
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#ifndef CMPARAMS_H
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#define CMPARAMS_H
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/* Defines required for correct CMSIS header functioning */
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#define __MPU_PRESENT 1 /**< MPU present */
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#define __NVIC_PRIO_BITS 3 /**< Bits used for Priority Levels */
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#define __Vendor_SysTickConfig 1 /**< Use different SysTick Config */
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#define __FPU_PRESENT 1 /**< FPU present */
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/* The following two defines are needed by ChibiOS */
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#define SVCall_IRQn -5
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#define PendSV_IRQn -3
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/**
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* @brief Cortex core model.
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*/
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#define CORTEX_MODEL 4
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/**
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* @brief Memory Protection unit presence.
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*/
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#define CORTEX_HAS_MPU 1
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/**
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* @brief Floating Point unit presence.
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*/
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@ -57,56 +67,54 @@
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/* If the device type is not externally defined, for example from the Makefile,
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then a file named board.h is included. This file must contain a device
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definition compatible with the include file.*/
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#if !defined(TM4C1230C3PM) && !defined(TM4C1230D5PM) && \
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!defined(TM4C1230E6PM) && !defined(TM4C1230H6PM) && \
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!defined(TM4C1231C3PM) && !defined(TM4C1231D5PM) && \
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!defined(TM4C1231D5PZ) && !defined(TM4C1231E6PM) && \
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!defined(TM4C1231E6PZ) && !defined(TM4C1231H6PGE) && \
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!defined(TM4C1231H6PM) && !defined(TM4C1231H6PZ) && \
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!defined(TM4C1232C3PM) && !defined(TM4C1232D5PM) && \
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!defined(TM4C1232E6PM) && !defined(TM4C1232H6PM) && \
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!defined(TM4C1233C3PM) && !defined(TM4C1233D5PM) && \
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!defined(TM4C1233D5PZ) && !defined(TM4C1233E6PM) && \
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!defined(TM4C1233E6PZ) && !defined(TM4C1233H6PGE) && \
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!defined(TM4C1233H6PM) && !defined(TM4C1233H6PZ) && \
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!defined(TM4C1236D5PM) && !defined(TM4C1236E6PM) && \
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!defined(TM4C1236H6PM) && !defined(TM4C1237D5PM) && \
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!defined(TM4C1237D5PZ) && !defined(TM4C1237E6PM) && \
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!defined(TM4C1237E6PZ) && !defined(TM4C1237H6PGE) && \
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!defined(TM4C1237H6PM) && !defined(TM4C1237H6PZ) && \
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!defined(TM4C123AE6PM) && !defined(TM4C123AH6PM) && \
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!defined(TM4C123BE6PM) && !defined(TM4C123BE6PZ) && \
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!defined(TM4C123BH6PGE) && !defined(TM4C123BH6PM) && \
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!defined(TM4C123BH6PZ) && !defined(TM4C123BH6ZRB) && \
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!defined(TM4C123FE6PM) && !defined(TM4C123FH6PM) && \
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!defined(TM4C123GE6PM) && !defined(TM4C123GE6PZ) && \
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!defined(TM4C123GH6PGE) && !defined(TM4C123GH6PM) && \
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!defined(TM4C123GH6PZ) && !defined(TM4C123GH6ZRB) && \
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!defined(TM4C123GH5ZXR)
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#if !defined (PART_TM4C1230C3PM) && !defined (PART_TM4C1230D5PM) && \
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!defined (PART_TM4C1230E6PM) && !defined (PART_TM4C1230H6PM) && \
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!defined (PART_TM4C1231C3PM) && !defined (PART_TM4C1231D5PM) && \
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!defined (PART_TM4C1231D5PZ) && !defined (PART_TM4C1231E6PM) && \
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!defined (PART_TM4C1231E6PZ) && !defined (PART_TM4C1231H6PGE) && \
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!defined (PART_TM4C1231H6PM) && !defined (PART_TM4C1231H6PZ) && \
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!defined (PART_TM4C1232C3PM) && !defined (PART_TM4C1232D5PM) && \
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!defined (PART_TM4C1232E6PM) && !defined (PART_TM4C1232H6PM) && \
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!defined (PART_TM4C1233C3PM) && !defined (PART_TM4C1233D5PM) && \
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!defined (PART_TM4C1233D5PZ) && !defined (PART_TM4C1233E6PM) && \
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!defined (PART_TM4C1233E6PZ) && !defined (PART_TM4C1233H6PGE) && \
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!defined (PART_TM4C1233H6PM) && !defined (PART_TM4C1233H6PZ) && \
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!defined (PART_TM4C1236D5PM) && !defined (PART_TM4C1236E6PM) && \
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!defined (PART_TM4C1236H6PM) && !defined (PART_TM4C1237D5PM) && \
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!defined (PART_TM4C1237D5PZ) && !defined (PART_TM4C1237E6PM) && \
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!defined (PART_TM4C1237E6PZ) && !defined (PART_TM4C1237H6PGE) && \
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!defined (PART_TM4C1237H6PM) && !defined (PART_TM4C1237H6PZ) && \
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!defined (PART_TM4C123AE6PM) && !defined (PART_TM4C123AH6PM) && \
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!defined (PART_TM4C123BE6PM) && !defined (PART_TM4C123BE6PZ) && \
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!defined (PART_TM4C123BH6PGE) && !defined (PART_TM4C123BH6PM) && \
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!defined (PART_TM4C123BH6PZ) && !defined (PART_TM4C123BH6ZRB) && \
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!defined (PART_TM4C123FE6PM) && !defined (PART_TM4C123FH6PM) && \
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!defined (PART_TM4C123GE6PM) && !defined (PART_TM4C123GE6PZ) && \
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!defined (PART_TM4C123GH6PGE) && !defined (PART_TM4C123GH6PM) && \
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!defined (PART_TM4C123GH6PZ) && !defined (PART_TM4C123GH6ZRB) && \
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!defined (PART_TM4C123GH5ZXR)
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#include "board.h"
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#endif
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/* Including the device CMSIS header. Note, we are not using the definitions
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from this header because we need this file to be usable also from
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assembler source files. We verify that the info matches instead.*/
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#include "tm4c123x.h"
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typedef int IRQn_Type;
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#if !CORTEX_HAS_MPU != !__MPU_PRESENT
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#error "CMSIS __MPU_PRESENT mismatch"
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#endif
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#include "core_cm4.h"
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#if !CORTEX_HAS_FPU != !__FPU_PRESENT
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#error "CMSIS __FPU_PRESENT mismatch"
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#endif
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/* Including the TivaWare peripheral headers.*/
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#include "inc/hw_ints.h"
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#include "inc/hw_memmap.h"
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#include "inc/hw_types.h"
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#include "inc/hw_timer.h"
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#include "inc/hw_sysctl.h"
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#include "inc/hw_gpio.h"
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#include "inc/hw_uart.h"
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#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
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#error "CMSIS __NVIC_PRIO_BITS mismatch"
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#if CORTEX_NUM_VECTORS != ((((NUM_INTERRUPTS - 16) + 7) / 8) * 8)
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#error "TivaWare NUM_INTERRUPTS mismatch"
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#endif
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#endif /* !defined(_FROM_ASM_) */
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#endif /* CMPARAMS_H */
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/**
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* @}
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*/
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/** @} */
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@ -17,22 +17,32 @@
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/**
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* @file TM4C129x/cmparams.h
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* @brief ARM Cortex-M4 parameters for the TM4C129x.
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*
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* @defgroup ARMCMx_TM4C129x TM4C129x Specific Parameters
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* @ingroup ARMCMx_SPECIFIC
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* @details This file contains the Cortex-M4 specific parameters for the
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* TM4C129x platform.
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* @{
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*/
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#ifndef CMPARAMS_H
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#define CMPARAMS_H
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/* Defines required for correct CMSIS header functioning */
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#define __MPU_PRESENT 1 /**< MPU present */
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#define __NVIC_PRIO_BITS 3 /**< Bits used for Priority Levels */
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#define __Vendor_SysTickConfig 1 /**< Use different SysTick Config */
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#define __FPU_PRESENT 1 /**< FPU present */
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/* The following two defines are needed by ChibiOS */
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#define SVCall_IRQn -5
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#define PendSV_IRQn -3
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/**
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* @brief Cortex core model.
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*/
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#define CORTEX_MODEL 4
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/**
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* @brief Memory Protection unit presence.
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*/
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#define CORTEX_HAS_MPU 1
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/**
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* @brief Floating Point unit presence.
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*/
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@ -48,7 +58,7 @@
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* @note This number does not include the 16 system vectors and must be
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* rounded to a multiple of 8.
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*/
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#define CORTEX_NUM_VECTORS 112
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#define CORTEX_NUM_VECTORS 120
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/* The following code is not processed when the file is included from an
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asm module.*/
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@ -57,40 +67,38 @@
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/* If the device type is not externally defined, for example from the Makefile,
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then a file named board.h is included. This file must contain a device
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definition compatible with the include file.*/
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#if !defined(TM4C1290NCPDT) && !defined(TM4C1290NCZAD) \
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&& !defined(TM4C1292NCPDT) && !defined(TM4C1292NCZAD) \
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&& !defined(TM4C1294KCPDT) && !defined(TM4C1294NCPDT) \
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&& !defined(TM4C1294NCZAD) && !defined(TM4C1297NCZAD) \
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&& !defined(TM4C1299KCZAD) && !defined(TM4C1299NCZAD) \
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&& !defined(TM4C129CNCPDT) && !defined(TM4C129CNCZAD) \
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&& !defined(TM4C129DNCPDT) && !defined(TM4C129DNCZAD) \
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&& !defined(TM4C129EKCPDT) && !defined(TM4C129ENCPDT) \
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&& !defined(TM4C129ENCZAD) && !defined(TM4C129LNCZAD) \
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&& !defined(TM4C129XKCZAD) && !defined(TM4C129XNCZAD)
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#if !defined (PART_TM4C1290NCPDT) && !defined (PART_TM4C1290NCZAD) && \
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!defined (PART_TM4C1292NCPDT) && !defined (PART_TM4C1292NCZAD) && \
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!defined (PART_TM4C1294KCPDT) && !defined (PART_TM4C1294NCPDT) && \
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!defined (PART_TM4C1294NCZAD) && !defined (PART_TM4C1297NCZAD) && \
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!defined (PART_TM4C1299KCZAD) && !defined (PART_TM4C1299NCZAD) && \
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!defined (PART_TM4C129CNCPDT) && !defined (PART_TM4C129CNCZAD) && \
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!defined (PART_TM4C129DNCPDT) && !defined (PART_TM4C129DNCZAD) && \
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!defined (PART_TM4C129EKCPDT) && !defined (PART_TM4C129ENCPDT) && \
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!defined (PART_TM4C129ENCZAD) && !defined (PART_TM4C129LNCZAD) && \
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!defined (PART_TM4C129XKCZAD) && !defined (PART_TM4C129XNCZAD)
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#include "board.h"
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#endif
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/* Including the device CMSIS header. Note, we are not using the definitions
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from this header because we need this file to be usable also from
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assembler source files. We verify that the info matches instead.*/
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#include "tm4c129x.h"
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typedef int IRQn_Type;
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#if !CORTEX_HAS_MPU != !__MPU_PRESENT
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#error "CMSIS __MPU_PRESENT mismatch"
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#endif
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#include "core_cm4.h"
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#if !CORTEX_HAS_FPU != !__FPU_PRESENT
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#error "CMSIS __FPU_PRESENT mismatch"
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#endif
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/* Including the TivaWare peripheral headers.*/
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#include "inc/hw_ints.h"
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#include "inc/hw_memmap.h"
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#include "inc/hw_types.h"
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#include "inc/hw_timer.h"
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#include "inc/hw_sysctl.h"
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#include "inc/hw_gpio.h"
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#include "inc/hw_uart.h"
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#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
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#error "CMSIS __NVIC_PRIO_BITS mismatch"
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#if CORTEX_NUM_VECTORS != ((((NUM_INTERRUPTS - 16) + 7) / 8) * 8)
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#error "TivaWare NUM_INTERRUPTS mismatch"
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#endif
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#endif /* !defined(_FROM_ASM_) */
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#endif /* CMPARAMS_H */
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/**
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* @}
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*/
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/** @} */
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