Cleaned up MSP430X port to match recent changes to ChibiOS mainline.
Also fixed a couple of bugs identified as part of the refresh.
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5d20ce4595
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456702ee87
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@ -232,14 +232,19 @@ struct port_context {
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* @details This macro must be inserted at the end of all IRQ handlers
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* enabled to invoke system APIs.
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*/
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#define PORT_IRQ_EPILOGUE() chSchRescheduleS()
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#define PORT_IRQ_EPILOGUE() { \
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_dbg_check_lock(); \
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if (chSchIsPreemptionRequired()) \
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chSchDoReschedule(); \
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_dbg_check_unlock(); \
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}
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/**
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* @brief IRQ handler function declaration.
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* @note @p id can be a function name or a vector number depending on the
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* port implementation.
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*/
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#define PORT_IRQ_HANDLER(id) __attribute__ ((interrupt(id))) \
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#define PORT_IRQ_HANDLER(id) __attribute__ ((interrupt(id))) \
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void ISR_ ## id (void)
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/**
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@ -89,7 +89,9 @@ PORT_IRQ_HANDLER(DMA_VECTOR) {
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if (index < MSP430X_DMA_CHANNELS) {
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#if CH_CFG_USE_SEMAPHORES
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chSysLockFromISR();
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chSemSignalI(&dma_lock);
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chSysUnlockFromISR();
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#endif
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msp430x_dma_cb_t * cb = &callbacks[index];
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@ -129,7 +131,7 @@ void dmaInit(void) {
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bool dmaRequest(msp430x_dma_req_t * request, systime_t timeout) {
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/* Check if a DMA channel is available */
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#if CH_CFG_USE_SEMAPHORES
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msg_t semresult = chSemWaitTimeout(&dma_lock, timeout);
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msg_t semresult = chSemWaitTimeoutS(&dma_lock, timeout);
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if (semresult != MSG_OK)
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return true;
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#endif
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@ -374,6 +374,7 @@ PORT_IRQ_HANDLER(USCI_A0_VECTOR) {
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if (oqIsEmptyI(&SD0.oqueue))
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chnAddFlagsI(&SD0, CHN_TRANSMISSION_END);
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UCA0IE &= ~UCTXCPTIE;
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osalSysUnlockFromISR();
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break;
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default: /* other interrupts */
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@ -388,10 +388,11 @@ void spi_lld_start(SPIDriver * spip) {
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spip->regs->ctlw0 = UCSWRST;
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spip->regs->brw = brw;
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spip->regs->ctlw0 =
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(spip->config->spi_mode << 14) | (spip->config->bit_order << 13) |
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((spip->config->spi_mode ^ 0x02) << 14) | (spip->config->bit_order << 13) |
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(spip->config->data_size << 12) | (UCMST) |
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((spip->config->ss_line ? 0 : 2) << 9) | (UCSYNC) | (ssel) | (UCSTEM);
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*(spip->ifg) = 0;
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spi_lld_unselect(spip);
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}
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/**
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@ -561,15 +562,12 @@ void spi_lld_receive(SPIDriver * spip, size_t n, void * rxbuf) {
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* @param[in] frame the data frame to send over the SPI bus
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* @return The received data frame from the SPI bus.
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*/
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uint16_t spi_lld_polled_exchange(SPIDriver * spip, uint16_t frame) {
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uint8_t spi_lld_polled_exchange(SPIDriver * spip, uint8_t frame) {
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osalDbgAssert(!(frame & 0xFF00U), "16-bit transfers not supported");
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while (!(*(spip->ifg) & UCTXIFG))
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;
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spip->regs->txbuf = frame;
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while (!(*(spip->ifg) & UCRXIFG))
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;
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*(spip->ifg) &= ~(UCRXIFG | UCTXIFG);
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return spip->regs->rxbuf;
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}
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@ -630,7 +630,7 @@ extern "C" {
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const void *txbuf, void *rxbuf);
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void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
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void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
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uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame);
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uint8_t spi_lld_polled_exchange(SPIDriver *spip, uint8_t frame);
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#ifdef __cplusplus
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}
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#endif
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@ -34,11 +34,12 @@ const char * test_5_msg = "TEST 5: spiIgnore\r\n";
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const char * test_6_msg = "TEST 6: spiExchange\r\n";
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const char * test_7_msg = "TEST 7: spiSend\r\n";
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const char * test_8_msg = "TEST 8: spiReceive\r\n";
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const char * test_9_msg = "TEST 9: spiStartExchange with exclusive DMA\r\n";
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const char * test_10_msg =
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"TEST 10: spiStartExchange with exclusive DMA for TX\r\n";
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const char * test_9_msg = "TEST 9: spiPolledExchange\r\n";
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const char * test_10_msg = "TEST 10: spiStartExchange with exclusive DMA\r\n";
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const char * test_11_msg =
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"TEST 11: spiStartExchange with exclusive DMA for RX\r\n";
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"TEST 11: spiStartExchange with exclusive DMA for TX\r\n";
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const char * test_12_msg =
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"TEST 12: spiStartExchange with exclusive DMA for RX\r\n";
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const char * succeed_string = "SUCCESS\r\n\r\n";
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const char * fail_string = "FAILURE\r\n\r\n";
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@ -270,6 +271,25 @@ THD_FUNCTION(Thread1, arg) {
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else {
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chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string));
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}
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/* Test 9 - spiPolledExchange */
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chnWrite(&SD0, (const uint8_t *)test_9_msg, strlen(test_9_msg));
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strcpy(outstring, "After SPI test \r\n");
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strcpy(instring, "Before SPI test \r\n");
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if (strcmp("Before SPI test \r\n", instring) ||
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strcmp("After SPI test \r\n", outstring)) {
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chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
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}
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spiSelect(&SPIDB0);
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outstring[0] = spiPolledExchange(&SPIDB0, instring[0]);
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spiUnselect(&SPIDB0);
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if (strcmp("Bfter SPI test \r\n", outstring) ||
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strcmp("Before SPI test \r\n", instring)) {
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chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
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}
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else {
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chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string));
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}
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/* Reconfigure SPIDA1 to use exclusive DMA for both */
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spiStop(&SPIDA1);
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@ -278,8 +298,8 @@ THD_FUNCTION(Thread1, arg) {
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SPIDA1_config.spi_mode = 1; /* because why not get coverage */
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spiStart(&SPIDA1, &SPIDA1_config);
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/* Test 9 - spiStartExchange with exclusive DMA */
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chnWrite(&SD0, (const uint8_t *)test_9_msg, strlen(test_9_msg));
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/* Test 10 - spiStartExchange with exclusive DMA */
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chnWrite(&SD0, (const uint8_t *)test_10_msg, strlen(test_10_msg));
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strcpy(outstring, "After SPI test \r\n");
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strcpy(instring, "Before SPI test \r\n");
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cb_arg = 1;
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@ -307,8 +327,8 @@ THD_FUNCTION(Thread1, arg) {
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SPIDA1_config.spi_mode = 2; /* because why not get coverage */
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spiStart(&SPIDA1, &SPIDA1_config);
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/* Test 10 - spiStartExchange with exclusive DMA for TX */
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chnWrite(&SD0, (const uint8_t *)test_10_msg, strlen(test_10_msg));
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/* Test 11 - spiStartExchange with exclusive DMA for TX */
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chnWrite(&SD0, (const uint8_t *)test_11_msg, strlen(test_11_msg));
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strcpy(outstring, "After SPI test \r\n");
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strcpy(instring, "Before SPI test \r\n");
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cb_arg = 1;
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@ -336,8 +356,8 @@ THD_FUNCTION(Thread1, arg) {
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SPIDA1_config.spi_mode = 3; /* because why not get coverage */
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spiStart(&SPIDA1, &SPIDA1_config);
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/* Test 11 - spiStartExchange with exclusive DMA for RX */
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chnWrite(&SD0, (const uint8_t *)test_11_msg, strlen(test_11_msg));
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/* Test 12 - spiStartExchange with exclusive DMA for RX */
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chnWrite(&SD0, (const uint8_t *)test_12_msg, strlen(test_12_msg));
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strcpy(outstring, "After SPI test \r\n");
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strcpy(instring, "Before SPI test \r\n");
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cb_arg = 1;
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