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More corrections

This commit is contained in:
Michael Walker 2018-05-01 14:46:56 -07:00
parent 0fbddccd80
commit 4d7ccdd1fc
3 changed files with 566 additions and 557 deletions
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8
os/common/ext/CMSIS/KINETIS/MK66F18.h
View File

@ -279,7 +279,7 @@ typedef enum IRQn {
* @{
*/
#define __MPU_PRESENT 0 /**< Defines if an MPU is present or not */
#define __MPU_PRESENT 1 /**< Defines if an MPU is present or not */
#define __NVIC_PRIO_BITS 4 /**< Number of priority bits implemented in the NVIC */
#define __Vendor_SysTickConfig 0 /**< Vendor specific implementation of SysTickConfig is defined */
#define __FPU_PRESENT 1 /**< Defines if an FPU is present or not */
@ -12340,7 +12340,8 @@ typedef struct {
#define SIM_SCGC3_USBHS(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC3_USBHS_SHIFT)) & SIM_SCGC3_USBHS_MASK)
#define SIM_SCGC3_USBHSPHY_MASK (0x4U)
#define SIM_SCGC3_USBHSPHY_SHIFT (2U)
#define SIM_SCGC3_USBHSPHY(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC3_USBHSPHY_SHIFT)) & SIM_SCGC3_USBHSPHY_MASK)
#define SIM_SCGC3_USBHSPHY_SET(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC3_USBHSPHY_SHIFT)) & SIM_SCGC3_USBHSPHY_MASK)
#define SIM_SCGC3_USBHSPHY SIM_SCGC3_USBHSPHY_SET(1)
#define SIM_SCGC3_USBHSDCD_MASK (0x8U)
#define SIM_SCGC3_USBHSDCD_SHIFT (3U)
#define SIM_SCGC3_USBHSDCD(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC3_USBHSDCD_SHIFT)) & SIM_SCGC3_USBHSDCD_MASK)
@ -14465,7 +14466,8 @@ typedef struct {
#define USBx_CTL_RESUME USBx_CTL_RESUME_SET(1)
#define USBx_CTL_HOSTMODEEN_MASK (0x8U)
#define USBx_CTL_HOSTMODEEN_SHIFT (3U)
#define USBx_CTL_HOSTMODEEN(x) (((uint8_t)(((uint8_t)(x)) << USBx_CTL_HOSTMODEEN_SHIFT)) & USBx_CTL_HOSTMODEEN_MASK)
#define USBx_CTL_HOSTMODEEN_SET(x) (((uint8_t)(((uint8_t)(x)) << USBx_CTL_HOSTMODEEN_SHIFT)) & USBx_CTL_HOSTMODEEN_MASK)
#define USBx_CTL_HOSTMODEEN USBx_CTL_HOSTMODEEN_SET(1)
#define USBx_CTL_RESET_MASK (0x10U)
#define USBx_CTL_RESET_SHIFT (4U)
#define USBx_CTL_RESET(x) (((uint8_t)(((uint8_t)(x)) << USBx_CTL_RESET_SHIFT)) & USBx_CTL_RESET_MASK)

13
os/hal/boards/PJRC_TEENSY_3_6/board.c
View File

@ -166,6 +166,13 @@ const PALConfig pal_default_config =
/*
* PORTE setup.
*
* PTE0 - SDHC
* PTE1 - SDHC
* PTE2 - SDHC
* PTE3 - SDHC
* PTE4 - SDHC
* PTE5 - SDHC
* PTE6 - USB OTG power switch
* PTE10 - PIN56
* PTE11 - PIN57
* PTE24 - PIN33
@ -174,9 +181,9 @@ const PALConfig pal_default_config =
*/
.port = IOPORT5,
.pads = {
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
PAL_MODE_ALTERNATIVE_4, PAL_MODE_ALTERNATIVE_4, PAL_MODE_ALTERNATIVE_4,
PAL_MODE_ALTERNATIVE_4, PAL_MODE_ALTERNATIVE_4, PAL_MODE_ALTERNATIVE_4,
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
PAL_MODE_UNCONNECTED, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,