rusefi
/
ChibiOS-Contrib
mirror of https://github.com/rusefi/ChibiOS-Contrib.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

[Comp] Adding interrupt functions, updating example.

This commit is contained in:
Fabien Poussin 2017-02-09 12:30:21 +01:00
parent fd89254b0d
commit 4ffde4b17e
5 changed files with 302 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

187
os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.c
View File

@ -273,6 +273,102 @@ OSAL_IRQ_HANDLER(Vector148) {
OSAL_IRQ_EPILOGUE();
}
/**
* @brief Configures and activates an EXT channel (used by comp)
*
* @param[in] compp pointer to the @p COMPDriver object
* @param[in] channel EXT channel
*
* @notapi
*/
void comp_ext_lld_channel_enable(COMPDriver *compp, uint32_t channel) {
uint32_t cmask = (1 << (channel & 0x1F));
/* Don't touch other channels */
if (channel < 21 || channel > 33) {
return;
}
#if STM32_EXTI_NUM_LINES > 32
if (channel < 32) {
#endif
/* Masked out lines must not be touched by this driver.*/
if ((cmask & STM32_EXTI_IMR_MASK) != 0U) {
return;
}
/* Programming edge registers.*/
if (compp->config->irq_mode == COMP_IRQ_RISING || compp->config->irq_mode == COMP_IRQ_BOTH)
EXTI->RTSR |= cmask;
else
EXTI->RTSR &= ~cmask;
if (compp->config->irq_mode == COMP_IRQ_FALLING || compp->config->irq_mode == COMP_IRQ_BOTH)
EXTI->FTSR |= cmask;
else
EXTI->FTSR &= ~cmask;
/* Programming interrupt and event registers.*/
EXTI->IMR |= cmask;
EXTI->EMR &= ~cmask;
#if STM32_EXTI_NUM_LINES > 32
}
else {
/* Masked out lines must not be touched by this driver.*/
if ((cmask & STM32_EXTI_IMR2_MASK) != 0U) {
return;
}
/* Programming edge registers.*/
if (compp->config->irq_mode == COMP_IRQ_RISING || compp->config->irq_mode == COMP_IRQ_BOTH)
EXTI->RTSR2 |= cmask;
else
EXTI->RTSR2 &= ~cmask;
if (compp->config->irq_mode == COMP_IRQ_FALLING || compp->config->irq_mode == COMP_IRQ_BOTH)
EXTI->FTSR2 |= cmask;
else
EXTI->FTSR2 &= ~cmask;
/* Programming interrupt and event registers.*/
EXTI->IMR2 |= cmask;
EXTI->EMR2 &= ~cmask;
}
#endif
}
/**
* @brief Deactivate an EXT channel (used by comp)
*
* @param[in] compp pointer to the @p COMPDriver object
* @param[in] channel EXT channel
*
* @notapi
*/
void comp_ext_lld_channel_disable(COMPDriver *compp, uint32_t channel) {
(void) compp;
uint32_t cmask = (1 << (channel & 0x1F));
#if STM32_EXTI_NUM_LINES > 32
if (channel < 32) {
#endif
EXTI->IMR &= ~cmask;
EXTI->EMR &= ~cmask;
EXTI->RTSR &= ~cmask;
EXTI->FTSR &= ~cmask;
EXTI->PR = cmask;
#if STM32_EXTI_NUM_LINES > 32
}
else {
EXTI->IMR2 &= ~cmask;
EXTI->EMR2 &= ~cmask;
EXTI->RTSR2 &= ~cmask;
EXTI->FTSR2 &= ~cmask;
EXTI->PR2 = cmask;
}
#endif
}
/**
* @brief Configures and activates the COMP peripheral.
*
@ -286,9 +382,53 @@ void comp_lld_start(COMPDriver *compp) {
compp->reg->CSR = compp->config->csr & ~COMP_CSR_COMPxEN;
// Inverted output
if (compp->config->mode == COMP_OUTPUT_INVERTED)
if (compp->config->output_mode == COMP_OUTPUT_INVERTED)
compp->reg->CSR |= COMP_CSR_COMPxPOL;
#if STM32_COMP_USE_INTERRUPTS
#if STM32_COMP_USE_COMP1
if (compp == &COMPD1) {
comp_ext_lld_channel_enable(compp, 21);
}
#endif
#if STM32_COMP_USE_COMP2
if (compp == &COMPD2) {
comp_ext_lld_channel_enable(compp, 22);
}
#endif
#if STM32_COMP_USE_COMP3
if (compp == &COMPD3) {
comp_ext_lld_channel_enable(compp, 29);
}
#endif
#if STM32_COMP_USE_COMP4
if (compp == &COMPD4) {
comp_ext_lld_channel_enable(compp, 30);
}
#endif
#if STM32_COMP_USE_COMP5
if (compp == &COMPD5) {
comp_ext_lld_channel_enable(compp, 31);
}
#endif
#if STM32_COMP_USE_COMP6
if (compp == &COMPD6) {
comp_ext_lld_channel_enable(compp, 32);
}
#endif
#if STM32_COMP_USE_COMP7
if (compp == &COMPD7) {
comp_ext_lld_channel_enable(compp, 33);
}
#endif
#endif
}
/**
@ -304,6 +444,51 @@ void comp_lld_stop(COMPDriver *compp) {
compp->reg->CSR = 0;
}
#if STM32_COMP_USE_INTERRUPTS
#if STM32_COMP_USE_COMP1
if (compp == &COMPD1) {
comp_ext_lld_channel_disable(compp, 21);
}
#endif
#if STM32_COMP_USE_COMP2
if (compp == &COMPD2) {
comp_ext_lld_channel_disable(compp, 22);
}
#endif
#if STM32_COMP_USE_COMP3
if (compp == &COMPD3) {
comp_ext_lld_channel_disable(compp, 29);
}
#endif
#if STM32_COMP_USE_COMP4
if (compp == &COMPD4) {
comp_ext_lld_channel_disable(compp, 30);
}
#endif
#if STM32_COMP_USE_COMP5
if (compp == &COMPD5) {
comp_ext_lld_channel_disable(compp, 31);
}
#endif
#if STM32_COMP_USE_COMP6
if (compp == &COMPD6) {
comp_ext_lld_channel_disable(compp, 32);
}
#endif
#if STM32_COMP_USE_COMP7
if (compp == &COMPD7) {
comp_ext_lld_channel_disable(compp, 33);
}
#endif
#endif
}
/**

15
os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.h
View File

@ -367,6 +367,14 @@ typedef enum {
COMP_OUTPUT_INVERTED = 1
} comp_output_mode_t;
/**
* @brief COMP interrupt mode.
*/
typedef enum {
COMP_IRQ_RISING = 0,
COMP_IRQ_FALLING = 1,
COMP_IRQ_BOTH = 2
} comp_irq_mode_t;
/**
* @brief Driver configuration structure.
@ -376,7 +384,12 @@ typedef struct {
/**
* @brief Ouput mode.
*/
comp_output_mode_t mode;
comp_output_mode_t output_mode;
/**
* @brief Ouput mode.
*/
comp_irq_mode_t irq_mode;
/**
* @brief Callback.

4
testhal/STM32/STM32F3xx/COMP/halconf.h
View File

@ -55,7 +55,7 @@
* @brief Enables the DAC subsystem.
*/
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
#define HAL_USE_DAC FALSE
#define HAL_USE_DAC TRUE
#endif
/**
@ -69,7 +69,7 @@
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#define HAL_USE_GPT TRUE
#endif
/**

116
testhal/STM32/STM32F3xx/COMP/main.c
View File

@ -17,33 +17,86 @@
#include "ch.h"
#include "hal.h"
#define DAC_BUFFER_SIZE 360
/*
* DAC test buffer (sine wave).
*/
static const dacsample_t dac_buffer[DAC_BUFFER_SIZE] = {
2047, 2082, 2118, 2154, 2189, 2225, 2260, 2296, 2331, 2367, 2402, 2437,
2472, 2507, 2542, 2576, 2611, 2645, 2679, 2713, 2747, 2780, 2813, 2846,
2879, 2912, 2944, 2976, 3008, 3039, 3070, 3101, 3131, 3161, 3191, 3221,
3250, 3278, 3307, 3335, 3362, 3389, 3416, 3443, 3468, 3494, 3519, 3544,
3568, 3591, 3615, 3637, 3660, 3681, 3703, 3723, 3744, 3763, 3782, 3801,
3819, 3837, 3854, 3870, 3886, 3902, 3917, 3931, 3944, 3958, 3970, 3982,
3993, 4004, 4014, 4024, 4033, 4041, 4049, 4056, 4062, 4068, 4074, 4078,
4082, 4086, 4089, 4091, 4092, 4093, 4094, 4093, 4092, 4091, 4089, 4086,
4082, 4078, 4074, 4068, 4062, 4056, 4049, 4041, 4033, 4024, 4014, 4004,
3993, 3982, 3970, 3958, 3944, 3931, 3917, 3902, 3886, 3870, 3854, 3837,
3819, 3801, 3782, 3763, 3744, 3723, 3703, 3681, 3660, 3637, 3615, 3591,
3568, 3544, 3519, 3494, 3468, 3443, 3416, 3389, 3362, 3335, 3307, 3278,
3250, 3221, 3191, 3161, 3131, 3101, 3070, 3039, 3008, 2976, 2944, 2912,
2879, 2846, 2813, 2780, 2747, 2713, 2679, 2645, 2611, 2576, 2542, 2507,
2472, 2437, 2402, 2367, 2331, 2296, 2260, 2225, 2189, 2154, 2118, 2082,
2047, 2012, 1976, 1940, 1905, 1869, 1834, 1798, 1763, 1727, 1692, 1657,
1622, 1587, 1552, 1518, 1483, 1449, 1415, 1381, 1347, 1314, 1281, 1248,
1215, 1182, 1150, 1118, 1086, 1055, 1024, 993, 963, 933, 903, 873,
844, 816, 787, 759, 732, 705, 678, 651, 626, 600, 575, 550,
526, 503, 479, 457, 434, 413, 391, 371, 350, 331, 312, 293,
275, 257, 240, 224, 208, 192, 177, 163, 150, 136, 124, 112,
101, 90, 80, 70, 61, 53, 45, 38, 32, 26, 20, 16,
12, 8, 5, 3, 2, 1, 0, 1, 2, 3, 5, 8,
12, 16, 20, 26, 32, 38, 45, 53, 61, 70, 80, 90,
101, 112, 124, 136, 150, 163, 177, 192, 208, 224, 240, 257,
275, 293, 312, 331, 350, 371, 391, 413, 434, 457, 479, 503,
526, 550, 575, 600, 626, 651, 678, 705, 732, 759, 787, 816,
844, 873, 903, 933, 963, 993, 1024, 1055, 1086, 1118, 1150, 1182,
1215, 1248, 1281, 1314, 1347, 1381, 1415, 1449, 1483, 1518, 1552, 1587,
1622, 1657, 1692, 1727, 1763, 1798, 1834, 1869, 1905, 1940, 1976, 2012
};
static const DACConfig dac1cfg1 = {
.init = 2047U,
.datamode = DAC_DHRM_12BIT_RIGHT,
.cr = 0
};
static const DACConversionGroup dacgrpcfg1 = {
.num_channels = 1U,
.end_cb = NULL,
.error_cb = NULL,
.trigger = DAC_TRG(0)
};
/*
* GPT6 configuration.
*/
static const GPTConfig gpt6cfg1 = {
.frequency = 10000U,
.callback = NULL,
.cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
.dier = 0U
};
void comp2_cb(COMPDriver *comp) {
/* Check if output is high (rising) */
if (comp->reg->CSR & COMP_CSR_COMPxOUT) {
palToggleLine(LINE_LED9_BLUE);
}
}
void comp4_cb(COMPDriver *comp) {
(void) comp;
}
static const COMPConfig comp2_conf = {
COMP_OUTPUT_NORMAL,
COMP_IRQ_RISING,
comp2_cb,
STM32_COMP_InvertingInput_VREFINT || STM32_COMP_Hysteresis_High // CSR
STM32_COMP_InvertingInput_VREFINT |
STM32_COMP_NonInvertingInput_IO2 |
STM32_COMP_Hysteresis_High // CSR
};
static const COMPConfig comp4_conf = {
COMP_OUTPUT_INVERTED,
comp4_cb,
STM32_COMP_InvertingInput_1_2VREFINT | COMP_CSR_COMPxOUTSEL_1 // CSR
};
/*
* Application entry point.
*/
@ -52,14 +105,41 @@ int main(void) {
halInit();
chSysInit();
compStart(&COMPD2, &comp2_conf);
compStart(&COMPD4, &comp4_conf);
/*
* Set PA3 - PA4 to Analog (DAC1_CH1, COMP2_INP)
* You will have to connect these with a jumper wire
*/
palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);
/*
* Normal main() thread activity, it resets the watchdog.
* Set PA2 to alternate 8 (COMP2_OUT)
* You can connect this to an oscilloscope along with PA4 to compare input/output.
*/
palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(8));
/*
* Start peripherals
*/
dacStart(&DACD1, &dac1cfg1);
compStart(&COMPD2, &comp2_conf);
gptStart(&GPTD6, &gpt6cfg1);
/*
* Starting a continuous conversion.
*/
dacStartConversion(&DACD1, &dacgrpcfg1, dac_buffer, DAC_BUFFER_SIZE);
gptStartContinuous(&GPTD6, 2U);
compEnable(&COMPD2);
/*
* Normal main() thread activity.
*/
while (true) {
chThdSleepMilliseconds(500);
chThdSleepMilliseconds(250);
palToggleLine(LINE_LED3_RED);
}
return 0;
}

4
testhal/STM32/STM32F3xx/COMP/mcuconf.h
View File

@ -104,7 +104,7 @@
*/
#define STM32_DAC_DUAL_MODE FALSE
#define STM32_DAC_USE_DAC1_CH1 TRUE
#define STM32_DAC_USE_DAC1_CH2 TRUE
#define STM32_DAC_USE_DAC1_CH2 FALSE
#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
@ -136,7 +136,7 @@
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM4 FALSE
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM6 TRUE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7