fix whitespace

This commit is contained in:
Nicolas Reinecke 2016-04-28 12:31:41 +02:00
parent f665da37bd
commit 509816147d
5 changed files with 71 additions and 71 deletions

View File

@ -13,7 +13,7 @@ HALSRC += ${CHIBIOS_CONTRIB}/os/hal/src/hal_community.c \
${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_msd.c \
${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_ftdi.c \
${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_uvc.c \
${CHIBIOS_CONTRIB}/os/hal/src/hal_ee24xx.c \
${CHIBIOS_CONTRIB}/os/hal/src/hal_ee24xx.c \
${CHIBIOS_CONTRIB}/os/hal/src/hal_ee25xx.c \
${CHIBIOS_CONTRIB}/os/hal/src/hal_eeprom.c \
${CHIBIOS_CONTRIB}/os/hal/src/hal_timcap.c \

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@ -7,7 +7,7 @@ PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1/hal_stm32_dma2d
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1/hal_stm32_ltdc.c \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c \
${CHIBIOS_CONTRIB}/os/hal/src/hal_fsmc_sdram.c \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c
@ -15,6 +15,6 @@ PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1 \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1 \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1 \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1 \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1 \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD

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@ -10,7 +10,7 @@ endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
@ -25,7 +25,7 @@ endif
# Linker extra options here.
ifeq ($(USE_LDOPT),)
USE_LDOPT =
USE_LDOPT =
endif
# Enable this if you want link time optimizations (LTO)
@ -102,7 +102,7 @@ include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
include $(CHIBIOS)/test/rt/test.mk
# Define linker script file here
LDSCRIPT= $(STARTUPLD)/STM32F407xG.ld
LDSCRIPT = $(STARTUPLD)/STM32F407xG.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.

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@ -82,86 +82,86 @@
/*===========================================================================*/
/* USBH driver related settings. */
/* USBH driver related settings. */
/*===========================================================================*/
/* main driver */
#define HAL_USBH_PORT_DEBOUNCE_TIME 200
#define HAL_USBH_PORT_RESET_TIMEOUT 500
#define HAL_USBH_DEVICE_ADDRESS_STABILIZATION 20
#define HAL_USBH_PORT_DEBOUNCE_TIME 200
#define HAL_USBH_PORT_RESET_TIMEOUT 500
#define HAL_USBH_DEVICE_ADDRESS_STABILIZATION 20
/* MSD */
#define HAL_USBH_USE_MSD 1
#define HAL_USBH_USE_MSD 1
#define HAL_USBHMSD_MAX_LUNS 1
#define HAL_USBHMSD_MAX_INSTANCES 1
#define HAL_USBHMSD_MAX_LUNS 1
#define HAL_USBHMSD_MAX_INSTANCES 1
/* IAD */
#define HAL_USBH_USE_FTDI 1
#define HAL_USBH_USE_FTDI 1
#define HAL_USBHFTDI_MAX_PORTS 1
#define HAL_USBHFTDI_MAX_INSTANCES 1
#define HAL_USBHFTDI_DEFAULT_SPEED 9600
#define HAL_USBHFTDI_DEFAULT_FRAMING (USBHFTDI_FRAMING_DATABITS_8 | USBHFTDI_FRAMING_PARITY_NONE | USBHFTDI_FRAMING_STOP_BITS_1)
#define HAL_USBHFTDI_DEFAULT_HANDSHAKE USBHFTDI_HANDSHAKE_NONE
#define HAL_USBHFTDI_DEFAULT_XON 0x11
#define HAL_USBHFTDI_DEFAULT_XOFF 0x13
#define HAL_USBHFTDI_MAX_PORTS 1
#define HAL_USBHFTDI_MAX_INSTANCES 1
#define HAL_USBHFTDI_DEFAULT_SPEED 9600
#define HAL_USBHFTDI_DEFAULT_FRAMING (USBHFTDI_FRAMING_DATABITS_8 | USBHFTDI_FRAMING_PARITY_NONE | USBHFTDI_FRAMING_STOP_BITS_1)
#define HAL_USBHFTDI_DEFAULT_HANDSHAKE USBHFTDI_HANDSHAKE_NONE
#define HAL_USBHFTDI_DEFAULT_XON 0x11
#define HAL_USBHFTDI_DEFAULT_XOFF 0x13
/* IAD */
#define HAL_USBH_USE_IAD 0
#define HAL_USBH_USE_IAD 0
/* UVC */
#define HAL_USBH_USE_UVC 0
#define HAL_USBH_USE_UVC 0
#define HAL_USBHUVC_MAX_INSTANCES 1
#define HAL_USBHUVC_MAX_MAILBOX_SZ 70
#define HAL_USBHUVC_WORK_RAM_SIZE 20000
#define HAL_USBHUVC_STATUS_PACKETS_COUNT 10
#define HAL_USBHUVC_MAX_INSTANCES 1
#define HAL_USBHUVC_MAX_MAILBOX_SZ 70
#define HAL_USBHUVC_WORK_RAM_SIZE 20000
#define HAL_USBHUVC_STATUS_PACKETS_COUNT 10
/* HUB */
#define HAL_USBH_USE_HUB 1
#define HAL_USBH_USE_HUB 1
#define HAL_USBHHUB_MAX_INSTANCES 1
#define HAL_USBHHUB_MAX_PORTS 6
#define HAL_USBHHUB_MAX_INSTANCES 1
#define HAL_USBHHUB_MAX_PORTS 6
/* debug */
#define USBH_DEBUG_ENABLE 1
#define USBH_DEBUG_USBHD USBHD1
#define USBH_DEBUG_SD SD2
#define USBH_DEBUG_BUFFER 25000
#define USBH_DEBUG_ENABLE 1
#define USBH_DEBUG_USBHD USBHD1
#define USBH_DEBUG_SD SD2
#define USBH_DEBUG_BUFFER 25000
#define USBH_DEBUG_ENABLE_TRACE 0
#define USBH_DEBUG_ENABLE_INFO 1
#define USBH_DEBUG_ENABLE_WARNINGS 1
#define USBH_DEBUG_ENABLE_ERRORS 1
#define USBH_DEBUG_ENABLE_TRACE 0
#define USBH_DEBUG_ENABLE_INFO 1
#define USBH_DEBUG_ENABLE_WARNINGS 1
#define USBH_DEBUG_ENABLE_ERRORS 1
#define USBH_LLD_DEBUG_ENABLE_TRACE 0
#define USBH_LLD_DEBUG_ENABLE_INFO 1
#define USBH_LLD_DEBUG_ENABLE_WARNINGS 1
#define USBH_LLD_DEBUG_ENABLE_ERRORS 1
#define USBH_LLD_DEBUG_ENABLE_TRACE 0
#define USBH_LLD_DEBUG_ENABLE_INFO 1
#define USBH_LLD_DEBUG_ENABLE_WARNINGS 1
#define USBH_LLD_DEBUG_ENABLE_ERRORS 1
#define USBHHUB_DEBUG_ENABLE_TRACE 0
#define USBHHUB_DEBUG_ENABLE_INFO 1
#define USBHHUB_DEBUG_ENABLE_WARNINGS 1
#define USBHHUB_DEBUG_ENABLE_ERRORS 1
#define USBHHUB_DEBUG_ENABLE_TRACE 0
#define USBHHUB_DEBUG_ENABLE_INFO 1
#define USBHHUB_DEBUG_ENABLE_WARNINGS 1
#define USBHHUB_DEBUG_ENABLE_ERRORS 1
#define USBHMSD_DEBUG_ENABLE_TRACE 0
#define USBHMSD_DEBUG_ENABLE_INFO 1
#define USBHMSD_DEBUG_ENABLE_WARNINGS 1
#define USBHMSD_DEBUG_ENABLE_ERRORS 1
#define USBHMSD_DEBUG_ENABLE_TRACE 0
#define USBHMSD_DEBUG_ENABLE_INFO 1
#define USBHMSD_DEBUG_ENABLE_WARNINGS 1
#define USBHMSD_DEBUG_ENABLE_ERRORS 1
#define USBHUVC_DEBUG_ENABLE_TRACE 0
#define USBHUVC_DEBUG_ENABLE_INFO 1
#define USBHUVC_DEBUG_ENABLE_WARNINGS 1
#define USBHUVC_DEBUG_ENABLE_ERRORS 1
#define USBHUVC_DEBUG_ENABLE_TRACE 0
#define USBHUVC_DEBUG_ENABLE_INFO 1
#define USBHUVC_DEBUG_ENABLE_WARNINGS 1
#define USBHUVC_DEBUG_ENABLE_ERRORS 1
#define USBHFTDI_DEBUG_ENABLE_TRACE 0
#define USBHFTDI_DEBUG_ENABLE_INFO 1
#define USBHFTDI_DEBUG_ENABLE_WARNINGS 1
#define USBHFTDI_DEBUG_ENABLE_ERRORS 1
#define USBHFTDI_DEBUG_ENABLE_TRACE 0
#define USBHFTDI_DEBUG_ENABLE_INFO 1
#define USBHFTDI_DEBUG_ENABLE_WARNINGS 1
#define USBHFTDI_DEBUG_ENABLE_ERRORS 1
/*===========================================================================*/
/* FSMCNAND driver related settings. */

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@ -48,19 +48,19 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4