From 52107b2ccbf1b5ed29123d77d5cd3bc982fdee2e Mon Sep 17 00:00:00 2001 From: Stephane D'Alu Date: Sun, 10 Jul 2016 21:46:46 +0200 Subject: [PATCH] moved QEI to LLD --- demos/NRF52/Classic/halconf_community.h | 2 +- demos/NRF52/Classic/mcuconf.h | 2 ++ os/hal/ports/NRF5/LLD/hal_pal_lld.h | 4 +--- os/hal/ports/NRF5/{NRF51822 => LLD}/hal_qei_lld.c | 14 +++++++++++++- os/hal/ports/NRF5/{NRF51822 => LLD}/hal_qei_lld.h | 0 os/hal/ports/NRF5/NRF51822/platform.mk | 4 ++-- os/hal/ports/NRF5/NRF52832/platform.mk | 6 +++++- os/hal/ports/NRF5/NRF52832/todo.txt | 1 + 8 files changed, 25 insertions(+), 8 deletions(-) rename os/hal/ports/NRF5/{NRF51822 => LLD}/hal_qei_lld.c (92%) rename os/hal/ports/NRF5/{NRF51822 => LLD}/hal_qei_lld.h (100%) diff --git a/demos/NRF52/Classic/halconf_community.h b/demos/NRF52/Classic/halconf_community.h index 646fbf0e..907a7a6c 100644 --- a/demos/NRF52/Classic/halconf_community.h +++ b/demos/NRF52/Classic/halconf_community.h @@ -35,7 +35,7 @@ #endif -#define HAL_USE_QEI FALSE +#define HAL_USE_QEI TRUE /*===========================================================================*/ diff --git a/demos/NRF52/Classic/mcuconf.h b/demos/NRF52/Classic/mcuconf.h index f70f2cc0..ee51b4d7 100644 --- a/demos/NRF52/Classic/mcuconf.h +++ b/demos/NRF52/Classic/mcuconf.h @@ -43,6 +43,8 @@ #define NRF5_RNG_USE_RNG0 TRUE #define NRF5_GPT_USE_TIMER0 TRUE +#define NRF5_QEI_USE_QDEC0 TRUE +#define NRF5_QEI_USE_LED FALSE #define WDG_USE_TIMEOUT_CALLBACK TRUE diff --git a/os/hal/ports/NRF5/LLD/hal_pal_lld.h b/os/hal/ports/NRF5/LLD/hal_pal_lld.h index 34caa7ed..745afd36 100644 --- a/os/hal/ports/NRF5/LLD/hal_pal_lld.h +++ b/os/hal/ports/NRF5/LLD/hal_pal_lld.h @@ -130,10 +130,8 @@ typedef NRF_GPIO_Type *ioportid_t; */ #if NRF_SERIES == 51 #define IOPORT1 NRF_GPIO -#elif NRF_SERIES == 52 -#define IOPORT1 NRF_P0 #else -#error "Unknown NRF_SERIES" +#define IOPORT1 NRF_P0 #endif /*===========================================================================*/ diff --git a/os/hal/ports/NRF5/NRF51822/hal_qei_lld.c b/os/hal/ports/NRF5/LLD/hal_qei_lld.c similarity index 92% rename from os/hal/ports/NRF5/NRF51822/hal_qei_lld.c rename to os/hal/ports/NRF5/LLD/hal_qei_lld.c index 9397d5ad..90448970 100644 --- a/os/hal/ports/NRF5/NRF51822/hal_qei_lld.c +++ b/os/hal/ports/NRF5/LLD/hal_qei_lld.c @@ -160,19 +160,31 @@ void qei_lld_start(QEIDriver *qeip) { #endif /* Select pin for Phase A and Phase B */ +#if NRF_SERIES == 51 qdec->PSELA = PAL_PAD(cfg->phase_a); qdec->PSELB = PAL_PAD(cfg->phase_b); - +#else + qdec->PSEL.A = PAL_PAD(cfg->phase_a); + qdec->PSEL.B = PAL_PAD(cfg->phase_b); +#endif /* Select (optional) pin for LED, and configure it */ #if NRF5_QEI_USE_LED == TRUE +#if NRF_SERIES == 51 qdec->PSELLED = PAL_PAD(cfg->led); +#else + qdec->PSEL.LED = PAL_PAD(cfg->led); +#endif qdec->LEDPOL = ((cfg->led_polarity == QEI_LED_POLARITY_LOW) ? QDEC_LEDPOL_LEDPOL_ActiveLow : QDEC_LEDPOL_LEDPOL_ActiveHigh) << QDEC_LEDPOL_LEDPOL_Pos; qdec->LEDPRE = cfg->led_warming; #else +#if NRF_SERIES == 51 qdec->PSELLED = (uint32_t)-1; +#else + qdec->PSEL.LED = (uint32_t)-1; +#endif #endif /* Set sampling resolution and debouncing */ diff --git a/os/hal/ports/NRF5/NRF51822/hal_qei_lld.h b/os/hal/ports/NRF5/LLD/hal_qei_lld.h similarity index 100% rename from os/hal/ports/NRF5/NRF51822/hal_qei_lld.h rename to os/hal/ports/NRF5/LLD/hal_qei_lld.h diff --git a/os/hal/ports/NRF5/NRF51822/platform.mk b/os/hal/ports/NRF5/NRF51822/platform.mk index 8631487b..a8526b7f 100644 --- a/os/hal/ports/NRF5/NRF51822/platform.mk +++ b/os/hal/ports/NRF5/NRF51822/platform.mk @@ -38,7 +38,7 @@ ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),) PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_pwm_lld.c endif ifneq ($(findstring HAL_USE_QEI TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_qei_lld.c +PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_qei_lld.c endif else PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ @@ -55,7 +55,7 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_wdg_lld.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_rng_lld.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_pwm_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_qei_lld.c + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_qei_lld.c endif # Required include directories diff --git a/os/hal/ports/NRF5/NRF52832/platform.mk b/os/hal/ports/NRF5/NRF52832/platform.mk index 57ae88d2..7ce922f8 100644 --- a/os/hal/ports/NRF5/NRF52832/platform.mk +++ b/os/hal/ports/NRF5/NRF52832/platform.mk @@ -21,6 +21,9 @@ endif ifneq ($(findstring HAL_USE_RNG TRUE,$(HALCONF)),) PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_rng_lld.c endif +ifneq ($(findstring HAL_USE_QEI TRUE,$(HALCONF)),) +PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_qei_lld.c +endif else PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832/hal_lld.c \ @@ -29,7 +32,8 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_st_lld.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_gpt_lld.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_wdg_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_rng_lld.c + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_rng_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_qei_lld.c endif # Required include directories diff --git a/os/hal/ports/NRF5/NRF52832/todo.txt b/os/hal/ports/NRF5/NRF52832/todo.txt index dc14b726..bc6423a1 100644 --- a/os/hal/ports/NRF5/NRF52832/todo.txt +++ b/os/hal/ports/NRF5/NRF52832/todo.txt @@ -4,3 +4,4 @@ https://devzone.nordicsemi.com/question/86564/nrf52-write-buffer/ * implement pin-reset, swo trace, trace pin configuration * implement errata (see system_nrf52.c) +* check GPIO DETECTMODE and LATCH