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NRF52832 implementation

This commit is contained in:
Stephane D'Alu 2016-07-09 23:57:48 +02:00
parent ddebbfc5d2
commit 5805e10f74
23 changed files with 17909 additions and 42 deletions
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251
demos/NRF52/Classic/Makefile Normal file
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@ -0,0 +1,251 @@
##############################################################################
# Build global options
# NOTE: Can be overridden externally.
#
PLATFORM=NRF5/NRF52832
BOARD=NRF52-DK
# Compiler options here.
ifeq ($(USE_OPT),)
USE_OPT = -Os -ggdb -fomit-frame-pointer -falign-functions=16 -std=c11
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
endif
# Enable this if you want the linker to remove unused code and data
ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
# Linker extra options here.
ifeq ($(USE_LDOPT),)
USE_LDOPT =
endif
# Enable this if you want link time optimizations (LTO)
ifeq ($(USE_LTO),)
USE_LTO = yes
endif
# If enabled, this option allows to compile the application in THUMB mode.
ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
# If enabled, this option makes the build process faster by not compiling
# modules not used in the current configuration.
ifeq ($(USE_SMART_BUILD),)
USE_SMART_BUILD = yes
endif
#
# Build global options
##############################################################################
##############################################################################
# Architecture or project specific options
#
# Stack size to be allocated to the Cortex-M process stack. This stack is
# the stack used by the main() thread.
ifeq ($(USE_PROCESS_STACKSIZE),)
USE_PROCESS_STACKSIZE = 0x400
endif
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
# stack is used for processing interrupts and exceptions.
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
USE_EXCEPTIONS_STACKSIZE = 0x400
endif
# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
ifeq ($(USE_FPU),)
USE_FPU = no
endif
#
# Architecture or project specific options
##############################################################################
##############################################################################
# Project, sources and paths
#
# Define project name here
PROJECT = ch
# Imported source files and paths
NRF51SDK = /home/sdalu/nRF51-SDK
CHIBIOS = /home/sdalu/ChibiOS/ChibiOS
CHIBIOS_CONTRIB = /home/sdalu/ChibiOS/ChibiOS-Contrib
# Startup files.
include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk
# HAL-OSAL files (optional).
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS_CONTRIB)/os/hal/hal.mk
include $(CHIBIOS_CONTRIB)/os/hal/ports/$(PLATFORM)/platform.mk
include $(CHIBIOS_CONTRIB)/os/hal/boards/$(BOARD)/board.mk
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
# RTOS files (optional).
include $(CHIBIOS)/os/rt/rt.mk
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
# Other files (optional).
include $(CHIBIOS)/test/rt/test.mk
include $(CHIBIOS)/os/various/shell/shell.mk
# Define linker script file here
LDSCRIPT= $(STARTUPLD)/NRF52832.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CSRC = $(STARTUPSRC) \
$(KERNSRC) \
$(PORTSRC) \
$(OSALSRC) \
$(HALSRC) \
$(PLATFORMSRC) \
$(BOARDSRC) \
$(TESTSRC) \
$(SHELLSRC) \
$(CHIBIOS)/os/hal/lib/streams/memstreams.c \
$(CHIBIOS)/os/hal/lib/streams/chprintf.c
CSRC += main.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CPPSRC =
# C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACSRC =
# C++ sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACPPSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCSRC =
# C++ sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCPPSRC =
# List ASM source files here
ASMSRC =
ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
INCDIR = $(CHIBIOS)/os/license \
$(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
$(SHELLINC) \
$(CHIBIOS)/os/hal/lib/streams $(CHIBIOS)/os/various
INCDIR += $(CHIBIOS_CONTRIB)/os/various
#
# Project, sources and paths
##############################################################################
##############################################################################
# Compiler settings
#
MCU = cortex-m4
TRGT = arm-none-eabi-
CC = $(TRGT)gcc
CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode.
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
AR = $(TRGT)ar
OD = $(TRGT)objdump
SZ = $(TRGT)size
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
SREC = $(CP) -O srec
# ARM-specific options here
AOPT =
# THUMB-specific options here
TOPT = -mthumb -DTHUMB
# Define C warning options here
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes -Wno-unused-parameter
# Define C++ warning options here
CPPWARN = -Wall -Wextra -Wundef
#
# Compiler settings
##############################################################################
##############################################################################
# Start of user section
#
# List all user C define here, like -D_DEBUG=1
UDEFS =
# Define ASM defines here
UADEFS =
# List all user directories here
UINCDIR =
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
#
# End of user defines
##############################################################################
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/
include $(RULESPATH)/rules.mk
OHEX = $(BUILDDIR)/$(PROJECT).hex
OELF = $(BUILDDIR)/$(PROJECT).elf
OBIN = $(BUILDDIR)/$(PROJECT).bin
include $(CHIBIOS_CONTRIB)/os/various/jlink.mk
include $(CHIBIOS_CONTRIB)/os/various/gdb.mk
pin-reset: jlink-pin-reset
flash: all jlink-flash
debug: gdb-debug
erase-all: jlink-erase-all
debug-server: jlink-debug-server

104
demos/NRF52/Classic/main.c Normal file
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@ -0,0 +1,104 @@
#include <stdint.h>
#include <string.h>
#include "ch.h"
#include "hal.h"
#include "chprintf.h"
#include "shell.h"
#include "ch_test.h"
#define LED_EXT 14
static THD_WORKING_AREA(shell_wa, 1024);
static const ShellCommand commands[] = {
{NULL, NULL}
};
static const ShellConfig shell_cfg1 = {
(BaseSequentialStream *)&SD1,
commands
};
static SerialConfig serial_config = {
.speed = 115200,
.tx_pad = UART_TX,
.rx_pad = UART_RX,
#if NRF51_SERIAL_USE_HWFLOWCTRL == TRUE
.rts_pad = UART_RTS,
.cts_pad = UART_CTS,
#endif
};
static THD_WORKING_AREA(waThread1, 64);
static THD_FUNCTION(Thread1, arg) {
(void)arg;
uint8_t led = LED4;
chRegSetThreadName("blinker");
while (1) {
palSetPad(IOPORT1, led);
chThdSleepMilliseconds(100);
palClearPad(IOPORT1, led);
chThdSleepMilliseconds(100);
}
}
#define printf(fmt, ...) \
chprintf((BaseSequentialStream*)&SD1, fmt, ##__VA_ARGS__)
/**@brief Function for application main entry.
*/
int main(void)
{
halInit();
chSysInit();
shellInit();
sdStart(&SD1, &serial_config);
palSetPad(IOPORT1, LED1);
palSetPad(IOPORT1, LED2);
palSetPad(IOPORT1, LED3);
palSetPad(IOPORT1, LED4);
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO+1,
Thread1, NULL);
chThdCreateStatic(shell_wa, sizeof(shell_wa), NORMALPRIO+1,
shellThread, (void *)&shell_cfg1);
printf(PORT_INFO "\r\n");
chThdSleep(2);
printf("Priority levels %d\r\n", CORTEX_PRIORITY_LEVELS);
test_execute((BaseSequentialStream *)&SD1);
while (true) {
chThdSleepMilliseconds(100);
}
}

84
os/common/startup/ARMCMx/compilers/GCC/ld/NRF52832.ld Normal file
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@ -0,0 +1,84 @@
/*
Copyright (C) 2016 Stephane D'Alu
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* NRF52832 memory setup.
*/
MEMORY
{
flash0 : org = 0x00000000, len = 512k
flash1 : org = 0x00000000, len = 0
flash2 : org = 0x00000000, len = 0
flash3 : org = 0x00000000, len = 0
flash4 : org = 0x00000000, len = 0
flash5 : org = 0x00000000, len = 0
flash6 : org = 0x00000000, len = 0
flash7 : org = 0x00000000, len = 0
ram0 : org = 0x20000000, len = 64k
ram1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0
ram3 : org = 0x00000000, len = 0
ram4 : org = 0x00000000, len = 0
ram5 : org = 0x00000000, len = 0
ram6 : org = 0x00000000, len = 0
ram7 : org = 0x00000000, len = 0
}
/* For each data/text section two region are defined, a virtual region
and a load region (_LMA suffix).*/
/* Flash region to be used for exception vectors.*/
REGION_ALIAS("VECTORS_FLASH", flash0);
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
/* Flash region to be used for constructors and destructors.*/
REGION_ALIAS("XTORS_FLASH", flash0);
REGION_ALIAS("XTORS_FLASH_LMA", flash0);
/* Flash region to be used for code text.*/
REGION_ALIAS("TEXT_FLASH", flash0);
REGION_ALIAS("TEXT_FLASH_LMA", flash0);
/* Flash region to be used for read only data.*/
REGION_ALIAS("RODATA_FLASH", flash0);
REGION_ALIAS("RODATA_FLASH_LMA", flash0);
/* Flash region to be used for various.*/
REGION_ALIAS("VARIOUS_FLASH", flash0);
REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
/* Flash region to be used for RAM(n) initialization data.*/
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
/* RAM region to be used for Main stack. This stack accommodates the processing
of all exceptions and interrupts*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
the main() function.*/
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
REGION_ALIAS("DATA_RAM_LMA", flash0);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for HEAP segment.*/
REGION_ALIAS("HEAP_RAM", ram0);
INCLUDE rules.ld

10
os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk Normal file
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@ -0,0 +1,10 @@
# List of the ChibiOS generic NRF51 startup and CMSIS files.
STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \
$(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c
STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S
STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/NRF52832 \
$(CHIBIOS)/os/common/ext/CMSIS/include
STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld

82
os/common/startup/ARMCMx/devices/NRF52832/cmparams.h Normal file
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@ -0,0 +1,82 @@
/*
Copyright (C) 2016 Stephane D'Alu
This file is part of ChibiOS.
ChibiOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file NRF51822/cmparams.h
* @brief ARM Cortex-M4 parameters for the Nordic Semi NRF52832 family.
*
* @defgroup ARMCMx_NRF52x Nordic semiconductor NRF52x.
* @ingroup ARMCMx_SPECIFIC
* @details This file contains the Cortex-M4 specific parameters for the
* NRF52x platform.
* @{
*/
#ifndef _CMPARAMS_H_
#define _CMPARAMS_H_
/**
* @brief Cortex core model.
*/
#define CORTEX_MODEL 4
/**
* @brief Memory Protection unit presence.
*/
#define CORTEX_HAS_MPU 1
/**
* @brief Floating Point unit presence.
*/
#define CORTEX_HAS_FPU 1
/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 3
/**
* @brief Number of interrupt vectors.
* @note This number does not include the 16 system vectors and must be
* rounded to a multiple of 8.
*/
#define CORTEX_NUM_VECTORS 40
/* The following code is not processed when the file is included from an
asm module.*/
#if !defined(_FROM_ASM_)
/* Including the device CMSIS header. Note, we are not using the definitions
from this header because we need this file to be usable also from
assembler source files. We verify that the info matches instead.*/
#include "nrf52.h"
#if CORTEX_MODEL != __CORTEX_M
#error "CMSIS __CORTEX_M mismatch"
#endif
#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
#error "CMSIS __NVIC_PRIO_BITS mismatch"
#endif
#endif /* !defined(_FROM_ASM_) */
#endif /* _CMPARAMS_H_ */
/** @} */

6
os/hal/boards/NRF52-DK/board.mk
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@ -5,8 +5,8 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF52-DK/board.c
BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF52-DK
# Flash
JLINK_DEVICE = nrf52832
#JLINK_PRE_FLASH = w4 4001e504 1
JLINK_DEVICE = nrf52
JLINK_PRE_FLASH = w4 4001e504 1
#JLINK_ERASE_ALL = w4 4001e504 2\nw4 4001e50c 1\nsleep 100
JLINK_PIN_RESET = w4 40000544 1\nsi 0\ntck0\nt0\nsleep 10\nt1
JLINK_PIN_RESET = w4 40000544 1

18
os/hal/ports/NRF5/NRF51822/hal_pal_lld.c → os/hal/ports/NRF5/LLD/hal_pal_lld.c
View File

@ -16,7 +16,7 @@
/**
* @file pal_lld.c
* @brief NRF51822 PAL subsystem low level driver source.
* @brief NRF5 PAL subsystem low level driver source.
*
* @addtogroup PAL
* @{
@ -51,7 +51,7 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
switch (mode) {
case PAL_MODE_RESET:
case PAL_MODE_UNCONNECTED:
NRF_GPIO->PIN_CNF[pad] =
IOPORT1->PIN_CNF[pad] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
(GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
@ -60,7 +60,7 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
break;
case PAL_MODE_INPUT:
case PAL_MODE_INPUT_ANALOG:
NRF_GPIO->PIN_CNF[pad] =
IOPORT1->PIN_CNF[pad] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
(GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
@ -68,7 +68,7 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
(GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_INPUT_PULLUP:
NRF_GPIO->PIN_CNF[pad] =
IOPORT1->PIN_CNF[pad] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
(GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) |
@ -76,7 +76,7 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
(GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_INPUT_PULLDOWN:
NRF_GPIO->PIN_CNF[pad] =
IOPORT1->PIN_CNF[pad] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
(GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos) |
@ -84,7 +84,7 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
(GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_OUTPUT_PUSHPULL:
NRF_GPIO->PIN_CNF[pad] =
IOPORT1->PIN_CNF[pad] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
(GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
@ -92,7 +92,7 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
(GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_OUTPUT_OPENDRAIN:
NRF_GPIO->PIN_CNF[pad] =
IOPORT1->PIN_CNF[pad] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
(GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
@ -114,9 +114,9 @@ void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
/*===========================================================================*/
/**
* @brief NRF51 I/O ports configuration.
* @brief NRF5 I/O ports configuration.
*
* @param[in] config the NRF51 ports configuration
* @param[in] config the NRF5 ports configuration
*
* @notapi
*/

32
os/hal/ports/NRF5/NRF51822/hal_pal_lld.h → os/hal/ports/NRF5/LLD/hal_pal_lld.h
View File

@ -16,7 +16,7 @@
/**
* @file pal_lld.h
* @brief NRF51822 PAL subsystem low level driver header.
* @brief NRF5 PAL subsystem low level driver header.
*
* @addtogroup PAL
* @{
@ -128,7 +128,11 @@ typedef NRF_GPIO_Type *ioportid_t;
* @details Low level drivers can define multiple ports, it is suggested to
* use this naming convention.
*/
#if NRF_SERIE == 51
#define IOPORT1 NRF_GPIO
#elif NRF_SERIE == 52
#define IOPORT1 NRF_P0
#endif
/*===========================================================================*/
/* Implementation, some of the following macros could be implemented as */
@ -152,7 +156,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_readport(port) (NRF_GPIO->IN)
#define pal_lld_readport(port) (IOPORT1->IN)
/**
* @brief Reads the output latch.
@ -164,7 +168,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_readlatch(port) (NRF_GPIO->OUT)
#define pal_lld_readlatch(port) (IOPORT1->OUT)
/**
* @brief Writes a bits mask on a I/O port.
@ -174,7 +178,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_writeport(port, bits) (NRF_GPIO->OUT = (bits))
#define pal_lld_writeport(port, bits) (IOPORT1->OUT = (bits))
/**
* @brief Sets a bits mask on a I/O port.
@ -187,7 +191,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_setport(port, bits) (NRF_GPIO->OUTSET = (bits))
#define pal_lld_setport(port, bits) (IOPORT1->OUTSET = (bits))
/**
@ -201,7 +205,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_clearport(port, bits) (NRF_GPIO->OUTCLR = (bits))
#define pal_lld_clearport(port, bits) (IOPORT1->OUTCLR = (bits))
/**
* @brief Pads group mode setup.
@ -234,7 +238,7 @@ typedef NRF_GPIO_Type *ioportid_t;
* @notapi
*/
#define pal_lld_readpad(port, pad) \
((NRF_GPIO->IN & ((uint32_t) 1 << pad)) ? PAL_HIGH : PAL_LOW)
((IOPORT1->IN & ((uint32_t) 1 << pad)) ? PAL_HIGH : PAL_LOW)
/**
* @brief Writes a logical state on an output pad.
@ -255,9 +259,9 @@ typedef NRF_GPIO_Type *ioportid_t;
do { \
(void)port; \
if (bit == PAL_HIGH) \
NRF_GPIO->OUTSET = ((uint32_t) 1 << pad); \
IOPORT1->OUTSET = ((uint32_t) 1 << pad); \
else \
NRF_GPIO->OUTCLR = ((uint32_t) 1 << pad); \
IOPORT1->OUTCLR = ((uint32_t) 1 << pad); \
} while (false)
/**
@ -271,7 +275,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_setpad(port, pad) (NRF_GPIO->OUTSET = (uint32_t) 1 << (pad))
#define pal_lld_setpad(port, pad) (IOPORT1->OUTSET = (uint32_t) 1 << (pad))
/**
* @brief Clears a pad logical state to @p PAL_LOW.
@ -284,7 +288,7 @@ typedef NRF_GPIO_Type *ioportid_t;
*
* @notapi
*/
#define pal_lld_clearpad(port, pad) (NRF_GPIO->OUTCLR = (uint32_t) 1 << (pad))
#define pal_lld_clearpad(port, pad) (IOPORT1->OUTCLR = (uint32_t) 1 << (pad))
/**
* @brief Toggles a pad logical state.
@ -299,11 +303,11 @@ typedef NRF_GPIO_Type *ioportid_t;
*/
#define pal_lld_togglepad(port, pad) \
do { \
uint8_t bit = (NRF_GPIO->IN >> (pad)) & 1; \
uint8_t bit = (IOPORT1->IN >> (pad)) & 1; \
if (bit) \
NRF_GPIO->OUTCLR = 1 << (pad); \
IOPORT1->OUTCLR = 1 << (pad); \
else \
NRF_GPIO->OUTSET = 1 << (pad); \
IOPORT1->OUTSET = 1 << (pad); \
} while (0)
/**

12
os/hal/ports/NRF5/NRF51822/hal_serial_lld.c → os/hal/ports/NRF5/LLD/hal_serial_lld.c
View File

@ -26,12 +26,18 @@
#if (HAL_USE_SERIAL == TRUE) || defined(__DOXYGEN__)
#if NRF_SERIE == 51
#include "nrf51.h"
#elif NRF_SERIE == 52
#include "nrf52.h"
#define UART0_IRQn UARTE0_UART0_IRQn
#endif
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
@ -142,8 +148,9 @@ static void configure_uart(const SerialConfig *config)
/* Enable UART and clear events */
NRF_UART0->ENABLE = UART_ENABLE_ENABLE_Enabled;
NRF_UART0->EVENTS_RXDRDY = 0;
(void)NRF_UART0->EVENTS_RXDRDY;
NRF_UART0->EVENTS_TXDRDY = 0;
(void)NRF_UART0->EVENTS_TXDRDY;
if (config->rx_pad != NRF51_SERIAL_PAD_DISCONNECTED) {
while (NRF_UART0->EVENTS_RXDRDY != 0) {
@ -197,6 +204,7 @@ OSAL_IRQ_HANDLER(Vector48) {
if ((NRF_UART0->EVENTS_RXDRDY != 0) && (isr & UART_INTENSET_RXDRDY_Msk)) {
// Clear UART RX event flag
NRF_UART0->EVENTS_RXDRDY = 0;
(void)NRF_UART0->EVENTS_RXDRDY;
osalSysLockFromISR();
if (iqIsEmptyI(&sdp->iqueue))
@ -211,6 +219,7 @@ OSAL_IRQ_HANDLER(Vector48) {
// Clear UART TX event flag.
NRF_UART0->EVENTS_TXDRDY = 0;
(void)NRF_UART0->EVENTS_TXDRDY;
osalSysLockFromISR();
b = oqGetI(&sdp->oqueue);
@ -232,6 +241,7 @@ OSAL_IRQ_HANDLER(Vector48) {
if ((NRF_UART0->EVENTS_ERROR != 0) && (isr & UART_INTENSET_ERROR_Msk)) {
// Clear UART ERROR event flag.
NRF_UART0->EVENTS_ERROR = 0;
(void)NRF_UART0->EVENTS_ERROR;
}

0
os/hal/ports/NRF5/NRF51822/hal_serial_lld.h → os/hal/ports/NRF5/LLD/hal_serial_lld.h
View File

16
os/hal/ports/NRF5/NRF51822/hal_st_lld.c → os/hal/ports/NRF5/LLD/hal_st_lld.c
View File

@ -65,6 +65,7 @@ OSAL_IRQ_HANDLER(Vector6C) {
OSAL_IRQ_PROLOGUE();
NRF_RTC0->EVENTS_TICK = 0;
(void)NRF_RTC0->EVENTS_TICK;
osalSysLockFromISR();
osalOsTimerHandlerI();
@ -87,6 +88,7 @@ OSAL_IRQ_HANDLER(Vector84) {
OSAL_IRQ_PROLOGUE();
NRF_RTC1->EVENTS_TICK = 0;
(void)NRF_RTC1->EVENTS_TICK;
osalSysLockFromISR();
osalOsTimerHandlerI();
@ -109,12 +111,14 @@ OSAL_IRQ_HANDLER(Vector60) {
OSAL_IRQ_PROLOGUE();
/* Clear timer compare event */
if (NRF_TIMER0->EVENTS_COMPARE[0] != 0)
if (NRF_TIMER0->EVENTS_COMPARE[0] != 0) {
NRF_TIMER0->EVENTS_COMPARE[0] = 0;
(void)NRF_TIMER0->EVENTS_COMPARE[0];
osalSysLockFromISR();
osalOsTimerHandlerI();
osalSysUnlockFromISR();
osalSysLockFromISR();
osalOsTimerHandlerI();
osalSysUnlockFromISR();
}
OSAL_IRQ_EPILOGUE();
}
@ -136,6 +140,7 @@ OSAL_IRQ_HANDLER(Vector6C) {
if (NRF_RTC0->EVENTS_COMPARE[0]) {
NRF_RTC0->EVENTS_COMPARE[0] = 0;
(void)NRF_RTC0->EVENTS_COMPARE[0];
osalSysLockFromISR();
osalOsTimerHandlerI();
@ -145,6 +150,7 @@ OSAL_IRQ_HANDLER(Vector6C) {
#if OSAL_ST_RESOLUTION == 16
if (NRF_RTC0->EVENTS_COMPARE[1]) {
NRF_RTC0->EVENTS_COMPARE[1] = 0;
(void)NRF_RTC0->EVENTS_COMPARE[1];
NRF_RTC0->TASKS_CLEAR = 1;
}
#endif
@ -167,6 +173,7 @@ OSAL_IRQ_HANDLER(Vector84) {
if (NRF_RTC1->EVENTS_COMPARE[0]) {
NRF_RTC1->EVENTS_COMPARE[0] = 0;
(void)NRF_RTC1->EVENTS_COMPARE[0];
osalSysLockFromISR();
osalOsTimerHandlerI();
@ -176,6 +183,7 @@ OSAL_IRQ_HANDLER(Vector84) {
#if OSAL_ST_RESOLUTION == 16
if (NRF_RTC1->EVENTS_COMPARE[1]) {
NRF_RTC1->EVENTS_COMPARE[1] = 0;
(void)NRF_RTC1->EVENTS_COMPARE[1];
NRF_RTC1->TASKS_CLEAR = 1;
}
#endif

2
os/hal/ports/NRF5/NRF51822/hal_st_lld.h → os/hal/ports/NRF5/LLD/hal_st_lld.h
View File

@ -71,7 +71,7 @@
*/
#if !defined(NRF51_ST_PRIORITY) || defined(__DOXYGEN__)
#if !defined(SOFTDEVICE_PRESENT)
#define NRF51_ST_PRIORITY 1
#define NRF51_ST_PRIORITY CORTEX_MAX_KERNEL_PRIORITY
#else
#define NRF51_ST_PRIORITY 1
#endif

2
os/hal/ports/NRF5/NRF51822/hal_i2c_lld.c
View File

@ -24,7 +24,7 @@
#include "osal.h"
#include "hal.h"
#include "nrf51_delay.h"
#include "nrf_delay.h"
#if HAL_USE_I2C || defined(__DOXYGEN__)

5
os/hal/ports/NRF5/NRF51822/hal_lld.h
View File

@ -29,6 +29,11 @@
/* Driver constants. */
/*===========================================================================*/
/**
* @name Chip serie
*/
#define NRF_SERIE 51
/**
* @name Platform identification
* @{

4
os/hal/ports/NRF5/NRF51822/nrf51_delay.h → os/hal/ports/NRF5/NRF51822/nrf_delay.h
View File

@ -15,8 +15,8 @@
*/
/**
* @file NRF51822/nrf51_delay.h
* @brief NRF51822 Delay routines
* @file NRF5/NRF51822/nrf_delay.h
* @brief NRF5 Delay routines
*
* @{
*/

15
os/hal/ports/NRF5/NRF51822/platform.mk
View File

@ -4,13 +4,13 @@ HALCONF := $(strip $(shell cat halconf.h halconf_community.h 2>/dev/null | egrep
# List of all the NRF51x platform files.
PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_st_lld.c
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_st_lld.c
ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),)
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_pal_lld.c
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_pal_lld.c
endif
ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),)
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_serial_lld.c
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_serial_lld.c
endif
ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),)
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_spi_lld.c
@ -43,9 +43,9 @@ endif
else
PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_pal_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_serial_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_st_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_pal_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_serial_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_st_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_spi_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_ext_lld.c \
@ -60,6 +60,7 @@ endif
# Required include directories
PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822

85
os/hal/ports/NRF5/NRF52832/hal_lld.c Normal file
View File

@ -0,0 +1,85 @@
/*
Copyright (C) 2015 Fabio Utzig
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file NRF51/NRF51822/hal_lld.c
* @brief NRF51822 HAL Driver subsystem low level driver source.
*
* @addtogroup HAL
* @{
*/
#include "hal.h"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void)
{
/* High frequency clock initialisation
* (If NRF51_XTAL_VALUE is not defined assume its an RC oscillator)
*/
NRF_CLOCK->TASKS_HFCLKSTOP = 1;
#if defined(NRF51_XTAL_VALUE)
#if NRF51_XTAL_VALUE == 16000000
NRF_CLOCK->XTALFREQ = 0xFF;
#elif NRF51_XTAL_VALUE == 32000000
NRF_CLOCK->XTALFREQ = 0x00;
#endif
#endif
/* Low frequency clock initialisation
* Clock is only started if st driver requires it
*/
NRF_CLOCK->TASKS_LFCLKSTOP = 1;
NRF_CLOCK->LFCLKSRC = NRF51_LFCLK_SOURCE;
#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) && \
(NRF51_SYSTEM_TICKS == NRF51_SYSTEM_TICKS_AS_RTC)
NRF_CLOCK->TASKS_LFCLKSTART = 1;
#endif
}
/**
* @}
*/

107
os/hal/ports/NRF5/NRF52832/hal_lld.h Normal file
View File

@ -0,0 +1,107 @@
/*
Copyright (C) 2015 Fabio Utzig
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file NRF5/NRF52832/hal_lld.h
* @brief NRF52832 HAL subsystem low level driver header.
*
* @addtogroup HAL
* @{
*/
#ifndef HAL_LLD_H
#define HAL_LLD_H
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/**
* @name Chip serie
*/
#define NRF_SERIE 52
/**
* @name Platform identification
* @{
*/
#define PLATFORM_NAME "Nordic Semiconductor nRF52832"
/**
* @}
*/
/**
* @brief Frequency valuefor the Low Frequency Clock
*/
#define NRF51_LFCLK_FREQUENCY 32768
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief Select source of Low Frequency Clock (LFCLK)
* @details Possible values for source are:
* 0 : RC oscillator
* 1 : External cristal
* 2 : Synthetized clock from High Frequency Clock (HFCLK)
* When cristal is not available it's preferable to use the
* internal RC oscillator that synthezing the clock.
*/
#if !defined(NRF51_LFCLK_SOURCE) || defined(__DOXYGEN__)
#define NRF51_LFCLK_SOURCE 0
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if (NRF51_LFCLK_SOURCE < 0) || (NRF51_LFCLK_SOURCE > 2)
#error "Possible value for NRF51_LFCLK_SOURCE are 0=RC, 1=XTAL, 2=Synth"
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#include "nvic.h"
#define NRF51_LFCLK_FREQUENCY 32768
#define NRF51_HFCLK_FREQUENCY 16000000
#ifdef __cplusplus
extern "C" {
#endif
void hal_lld_init(void);
void nrf51_clock_init(void);
#ifdef __cplusplus
}
#endif
#endif /* HAL_LLD_H */
/**
* @}
*/

2126
os/hal/ports/NRF5/NRF52832/nrf52.h Normal file
View File

File diff suppressed because it is too large Load Diff

14861
os/hal/ports/NRF5/NRF52832/nrf52_bitfields.h Normal file
View File

File diff suppressed because it is too large Load Diff

97
os/hal/ports/NRF5/NRF52832/nrf_delay.h Normal file
View File

@ -0,0 +1,97 @@
/*
Copyright (C) 2015 Stephen Caudle
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file NRF5/NRF52832/nrf_delay.h
* @brief NRF5 Delay routines
*
* @{
*/
#ifndef _NRF_DELAY_H
#define _NRF_DELAY_H
inline static void nrf_delay_us(uint32_t volatile number_of_us) __attribute__((always_inline));
inline static void nrf_delay_us(uint32_t volatile number_of_us)
{
register uint32_t delay asm ("r0") = number_of_us;
__asm volatile (
".syntax unified\n"
"1:\n"
" SUBS %0, %0, #1\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" NOP\n"
" BNE 1b\n"
".syntax divided\n"
: "+r" (delay));
}
#endif //__NRF_DELAY_H

28
os/hal/ports/NRF5/NRF52832/platform.mk Normal file
View File

@ -0,0 +1,28 @@
ifeq ($(USE_SMART_BUILD),yes)
HALCONF := $(strip $(shell cat halconf.h halconf_community.h 2>/dev/null | egrep -e "define"))
# List of all the NRF51x platform files.
PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832/hal_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_st_lld.c
ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),)
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_pal_lld.c
endif
ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),)
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_serial_lld.c
endif
else
PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832/hal_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_pal_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_serial_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_st_lld.c
endif
# Required include directories
PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832

4
os/various/jlink.mk
View File

@ -27,6 +27,10 @@ jlink-reset:
printf "r\nexit\n" > $(BUILDDIR)/reset.jlink
$(JLINK) $(JLINK_COMMON_OPTS) $(BUILDDIR)/reset.jlink
jlink-pin-reset:
printf "$(JLINK_PIN_RESET)\nexit\n" > $(BUILDDIR)/pin-reset.jlink
$(JLINK) $(JLINK_COMMON_OPTS) $(BUILDDIR)/pin-reset.jlink
jlink-debug-server:
$(JLINK_GDB_SERVER) $(JLINK_COMMON_OPTS) -port $(JLINK_GDB_PORT)