moved spi to LLD
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89b707fd7c
commit
5923ee5d50
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@ -49,7 +49,7 @@ endif
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# If enabled, this option makes the build process faster by not compiling
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# modules not used in the current configuration.
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ifeq ($(USE_SMART_BUILD),)
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USE_SMART_BUILD = yes
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USE_SMART_BUILD = no
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endif
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#
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@ -15,8 +15,8 @@
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*/
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/**
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* @file NRF51822/spi_lld.c
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* @brief NRF51822 low level SPI driver code.
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* @file NRF5/LLD/hal_spi_lld.c
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* @brief NRF5 low level SPI driver code.
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*
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* @addtogroup SPI
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* @{
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@ -76,7 +76,10 @@ static void serve_interrupt(SPIDriver *spip) {
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// Clear SPI READY event flag
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port->EVENTS_READY = 0;
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#if CORTEX_MODEL >= 4
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(void)port->EVENTS_READY;
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#endif
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if (spip->rxptr != NULL) {
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*(uint8_t *)spip->rxptr++ = port->RXD;
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}
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@ -209,6 +212,9 @@ void spi_lld_start(SPIDriver *spip) {
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/* clear events flag */
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spip->port->EVENTS_READY = 0;
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#if CORTEX_MODEL >= 4
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(void)spip->port->EVENTS_READY;
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#endif
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}
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/**
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@ -366,6 +372,9 @@ uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) {
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while (spip->port->EVENTS_READY == 0)
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;
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spip->port->EVENTS_READY = 0;
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#if CORTEX_MODEL >= 4
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(void)spip->port->EVENTS_READY;
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#endif
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return spip->port->RXD;
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}
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@ -15,8 +15,8 @@
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*/
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/**
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* @file NRF51822/spi_lld.h
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* @brief NRF51822 low level SPI driver header.
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* @file NRF/LLD/hal_spi_lld.h
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* @brief NRF5 low level SPI driver header.
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*
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* @addtogroup SPI
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* @{
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@ -13,7 +13,7 @@ ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),)
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PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_serial_lld.c
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endif
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ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),)
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PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_spi_lld.c
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PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_spi_lld.c
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endif
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ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
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PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.c \
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@ -46,7 +46,7 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_pal_lld.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_serial_lld.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_st_lld.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_spi_lld.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_spi_lld.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_ext_lld.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_i2c_lld.c \
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@ -27,7 +27,7 @@
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inline static void nrf_delay_us(uint32_t volatile number_of_us) __attribute__((always_inline));
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inline static void nrf_delay_us(uint32_t volatile number_of_us)
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{
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register uint32_t delay asm ("r0") = number_of_us;
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register uint32_t delay __asm ("r0") = number_of_us;
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__asm volatile (
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".syntax unified\n"
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"1:\n"
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@ -12,6 +12,9 @@ endif
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ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),)
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PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_serial_lld.c
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endif
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ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),)
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PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_spi_lld.c
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endif
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ifneq ($(findstring HAL_USE_GPT TRUE,$(HALCONF)),)
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PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_gpt_lld.c
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endif
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@ -29,6 +32,7 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832/hal_lld.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_pal_lld.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_serial_lld.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_spi_lld.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_st_lld.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_gpt_lld.c \
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${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_wdg_lld.c \
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