Fix MK66F18 compilation for the following HALs: Serial, I2C, EXT, ADC, GPT, PWM, SPI

os/common/startup/ARMCMx/compilers/GCC/ld/MK66FX1M0.ld

@@ -29,14 +29,10 @@ MEMORY
   flash0   : org = 0x00000000, len = 0x400
   flash1   : org = 0x00000400, len = 0x10
   flash2   : org = 0x00000410, len = 1024k - 0x410
-  flash3   : org = 0x00000000, len = 0
+  flash3   : org = 0x10000000, len = 128k   /* FlexNVM */
-  flash4   : org = 0x00000000, len = 0
+  ram0     : org = 0x1FFF0000, len = 64k    /* SRAM_L (code RAM) */
-  flash5   : org = 0x00000000, len = 0
+  ram1     : org = 0x20000000, len = 192k   /* SRAM_U (data RAM) */
-  flash6   : org = 0x00000000, len = 0
+  ram2     : org = 0x14000000, len = 4k     /* FlexRAM */
-  flash7   : org = 0x00000000, len = 0
-  ram0     : org = 0x1FFF0000, len = 256k
-  ram1     : org = 0x00000000, len = 0
-  ram2     : org = 0x00000000, len = 0
   ram3     : org = 0x00000000, len = 0
   ram4     : org = 0x00000000, len = 0
   ram5     : org = 0x00000000, len = 0
@@ -81,21 +77,21 @@ REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
 
 /* RAM region to be used for Main stack. This stack accommodates the processing
    of all exceptions and interrupts.*/
-REGION_ALIAS("MAIN_STACK_RAM", ram0);
+REGION_ALIAS("MAIN_STACK_RAM", ram1);
 
 /* RAM region to be used for the process stack. This is the stack used by
    the main() function.*/
-REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+REGION_ALIAS("PROCESS_STACK_RAM", ram1);
 
 /* RAM region to be used for data segment.*/
-REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM", ram1);
 REGION_ALIAS("DATA_RAM_LMA", flash2);
 
 /* RAM region to be used for BSS segment.*/
-REGION_ALIAS("BSS_RAM", ram0);
+REGION_ALIAS("BSS_RAM", ram1);
 
 /* RAM region to be used for the default heap.*/
-REGION_ALIAS("HEAP_RAM", ram0);
+REGION_ALIAS("HEAP_RAM", ram1);
 
 /* Generic rules inclusion.*/
 INCLUDE rules.ld

os/hal/ports/KINETIS/LLD/hal_i2c_lld.c

@@ -442,7 +442,13 @@ static inline msg_t _i2c_txrx_timeout(I2CDriver *i2cp, i2caddr_t addr,
     /* wait until the bus is released */
     /* Calculating the time window for the timeout on the busy bus condition.*/
     start = osalOsGetSystemTimeX();
+#if defined(OSAL_TIME_MS2I)
     end = start + OSAL_TIME_MS2I(KINETIS_I2C_BUSY_TIMEOUT);
+#elif defined(OSAL_TIME_MS2ST)
+    end = start + OSAL_TIME_MS2ST(KINETIS_I2C_BUSY_TIMEOUT);
+#else
+    end = start + OSAL_MS2ST(KINETIS_I2C_BUSY_TIMEOUT);
+#endif
 
     while(true) {
       osalSysLock();

os/hal/ports/KINETIS/LLD/hal_sdc_lld.c

@@ -29,7 +29,7 @@
  * or write).
  *
  * The SDHC signals must be routed to the desired pins, and pullups/pulldowns
- * configured.
+ * configured.
  *
  * @addtogroup SDC
  * @{
@@ -45,8 +45,13 @@
 /* Driver local definitions.                                                 */
 /*===========================================================================*/
 
+#if defined(MK66F18)
+/* Configure SDHC block to use the IRC48M clock */
+#define KINETIS_SDHC_PERIPHERAL_FREQUENCY 48000000UL
+#else
 /* We configure the SDHC block to use the system clock */
 #define KINETIS_SDHC_PERIPHERAL_FREQUENCY KINETIS_SYSCLK_FREQUENCY
+#endif
 
 #ifndef KINETIS_SDHC_PRIORITY
 #define KINETIS_SDHC_PRIORITY 12 /* TODO? Default IRQ priority for SDHC */
@@ -189,6 +194,11 @@ static void enable_clock_when_stable(uint32_t new_sysctl)
 
   /* Restart the clock */
   SDHC->SYSCTL = new_sysctl | SDHC_SYSCTL_SDCLKEN;
+
+  /* Wait for clock to stabilize again */
+  while(!(SDHC->PRSSTAT & SDHC_PRSSTAT_SDSTB)) {
+    osalThreadSleepMilliseconds(1);
+  }
 }
 
 /**
@@ -589,9 +599,15 @@ void sdc_lld_init(void) {
 void sdc_lld_start(SDCDriver *sdcp) {
 
   if (sdcp->state == BLK_STOP) {
+#if defined(MK66F18)
+    /* Use IRC48M clock for SDHC */
+    SIM->SOPT2 |= SIM_SOPT2_SDHCSRC(1);
+    SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_SET(3);
+#else
     SIM->SOPT2 =
       (SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) |
       SIM_SOPT2_SDHCSRC(0);  /* SDHC clock source 0: Core/system clock. */
+#endif
     SIM->SCGC3 |= SIM_SCGC3_SDHC; /* Enable clock to SDHC peripheral */
 
     /* Reset the SDHC block */

os/hal/ports/KINETIS/LLD/hal_serial_lld.c

@@ -262,7 +262,7 @@ static void configure_uart(SerialDriver *sdp, const SerialConfig *config) {
   }
 #endif /* KINETIS_SERIAL_USE_UART0 */
 
-#elif defined(K20x) || defined(K60x) /* KL2x */
+#elif defined(K20x) || defined(K60x) || defined(MK66F18) /* KL2x */
 
   /* UARTs 0 and 1 are clocked from SYSCLK, others from BUSCLK on K20x and K60x. */
 #if KINETIS_SERIAL_USE_UART0

os/hal/ports/KINETIS/MK66F18/hal_lld.c

@@ -15,8 +15,8 @@
 */
 
 /**
- * @file    templates/hal_lld.c
+ * @file    MK66F18/hal_lld.c
- * @brief   HAL Driver subsystem low level driver source template.
+ * @brief   Kinetis MK66F18 HAL Driver subsystem low level driver source template.
  *
  * @addtogroup HAL
  * @{

os/hal/ports/KINETIS/MK66F18/platform.mk

@@ -8,6 +8,7 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
               ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_ext_lld.c \
               ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_adc_lld.c \
               ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_gpt_lld.c \
+              ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_sdc_lld.c \
               ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/MK66F18/hal_pwm_lld.c \
               ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_st_lld.c \
               ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_usb_lld.c