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Updated serial driver to use new register access.

This commit is contained in:
marcoveeneman 2016-08-30 18:43:47 +02:00
parent d5476e6ce6
commit 6675bf01e1
2 changed files with 55 additions and 55 deletions
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108
os/hal/ports/TIVA/LLD/UART/hal_serial_lld.c
View File

@ -116,18 +116,18 @@ static const SerialConfig sd_default_config =
*/
static void uart_init(SerialDriver *sdp, const SerialConfig *config)
{
UART_TypeDef *u = sdp->uart;
uint32_t u = sdp->uart;
uint32_t div; /* baud rate divisor */
/* disable the UART before any of the control registers are reprogrammed */
u->CTL &= ~TIVA_CTL_UARTEN;
HWREG(u + UART_O_CTL) &= ~TIVA_CTL_UARTEN;
div = (((TIVA_SYSCLK * 8) / config->sc_speed) + 1) / 2;
u->IBRD = div / 64; /* integer portion of the baud rate divisor */
u->FBRD = div % 64; /* fractional portion of the baud rate divisor */
u->LCRH = config->sc_lcrh; /* set data format */
u->IFLS = config->sc_ifls;
u->CTL |= TIVA_CTL_TXE | TIVA_CTL_RXE | TIVA_CTL_UARTEN;
u->IM |= TIVA_IM_RXIM | TIVA_IM_TXIM | TIVA_IM_RTIM; /* interrupts enable */
HWREG((u) + UART_O_IBRD) = div / 64; /* integer portion of the baud rate divisor */
HWREG((u) + UART_O_FBRD) = div % 64; /* fractional portion of the baud rate divisor */
HWREG((u) + UART_O_LCRH) = config->sc_lcrh; /* set data format */
HWREG((u) + UART_O_IFLS) = config->sc_ifls;
HWREG((u) + UART_O_CTL) |= TIVA_CTL_TXE | TIVA_CTL_RXE | TIVA_CTL_UARTEN;
HWREG((u) + UART_O_IM) |= TIVA_IM_RXIM | TIVA_IM_TXIM | TIVA_IM_RTIM; /* interrupts enable */
}
/**
@ -135,9 +135,9 @@ static void uart_init(SerialDriver *sdp, const SerialConfig *config)
*
* @param[in] u pointer to an UART I/O block
*/
static void uart_deinit(UART_TypeDef *u)
static void uart_deinit(uint32_t u)
{
u->CTL &= ~TIVA_CTL_UARTEN;
HWREG((u) + UART_O_CTL) &= ~TIVA_CTL_UARTEN;
}
/**
@ -174,10 +174,10 @@ static void set_error(SerialDriver *sdp, uint16_t err)
*/
static void serial_serve_interrupt(SerialDriver *sdp)
{
UART_TypeDef *u = sdp->uart;
uint16_t mis = u->MIS;
uint32_t u = sdp->uart;
uint16_t mis = HWREG((u) + UART_O_MIS);
u->ICR = mis; /* clear interrupts */
HWREG((u) + UART_O_ICR) = mis; /* clear interrupts */
if (mis & (TIVA_MIS_FEMIS | TIVA_MIS_PEMIS | TIVA_MIS_BEMIS | TIVA_MIS_OEMIS)) {
set_error(sdp, mis);
@ -189,9 +189,9 @@ static void serial_serve_interrupt(SerialDriver *sdp)
chnAddFlagsI(sdp, CHN_INPUT_AVAILABLE);
}
osalSysUnlockFromISR();
while ((u->FR & TIVA_FR_RXFE) == 0) {
while ((HWREG((u) + UART_O_FR) & TIVA_FR_RXFE) == 0) {
osalSysLockFromISR();
if (iqPutI(&sdp->iqueue, u->DR) < Q_OK) {
if (iqPutI(&sdp->iqueue, HWREG((u) + UART_O_DR)) < Q_OK) {
chnAddFlagsI(sdp, SD_OVERRUN_ERROR);
}
osalSysUnlockFromISR();
@ -199,19 +199,19 @@ static void serial_serve_interrupt(SerialDriver *sdp)
}
if (mis & TIVA_MIS_TXMIS) {
while ((u->FR & TIVA_FR_TXFF) == 0) {
while ((HWREG((u) + UART_O_FR) & TIVA_FR_TXFF) == 0) {
msg_t b;
osalSysLockFromISR();
b = oqGetI(&sdp->oqueue);
osalSysUnlockFromISR();
if (b < Q_OK) {
u->IM &= ~TIVA_IM_TXIM;
HWREG((u) + UART_O_IM) &= ~TIVA_IM_TXIM;
osalSysLockFromISR();
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
osalSysUnlockFromISR();
break;
}
u->DR = b;
HWREG((u) + UART_O_DR) = b;
}
}
}
@ -221,17 +221,17 @@ static void serial_serve_interrupt(SerialDriver *sdp)
*/
static void fifo_load(SerialDriver *sdp)
{
UART_TypeDef *u = sdp->uart;
uint32_t u = sdp->uart;
while ((u->FR & TIVA_FR_TXFF) == 0) {
while ((HWREG((u) + UART_O_FR) & TIVA_FR_TXFF) == 0) {
msg_t b = oqGetI(&sdp->oqueue);
if (b < Q_OK) {
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
return;
}
u->DR = b;
HWREG((u) + UART_O_DR) = b;
}
u->IM |= TIVA_IM_TXIM; /* transmit interrupt enable */
HWREG((u) + UART_O_IM) |= TIVA_IM_TXIM; /* transmit interrupt enable */
}
/**
@ -452,42 +452,42 @@ void sd_lld_init(void)
{
#if TIVA_SERIAL_USE_UART0
sdObjectInit(&SD1, NULL, notify1);
SD1.uart = UART0;
SD1.uart = UART0_BASE;
#endif
#if TIVA_SERIAL_USE_UART1
sdObjectInit(&SD2, NULL, notify2);
SD2.uart = UART1;
SD2.uart = UART1_BASE;
#endif
#if TIVA_SERIAL_USE_UART2
sdObjectInit(&SD3, NULL, notify3);
SD3.uart = UART2;
SD3.uart = UART2_BASE;
#endif
#if TIVA_SERIAL_USE_UART3
sdObjectInit(&SD4, NULL, notify4);
SD4.uart = UART3;
SD4.uart = UART3_BASE;
#endif
#if TIVA_SERIAL_USE_UART4
sdObjectInit(&SD5, NULL, notify5);
SD5.uart = UART4;
SD5.uart = UART4_BASE;
#endif
#if TIVA_SERIAL_USE_UART5
sdObjectInit(&SD6, NULL, notify6);
SD6.uart = UART5;
SD6.uart = UART5_BASE;
#endif
#if TIVA_SERIAL_USE_UART6
sdObjectInit(&SD7, NULL, notify7);
SD7.uart = UART6;
SD7.uart = UART6_BASE;
#endif
#if TIVA_SERIAL_USE_UART7
sdObjectInit(&SD8, NULL, notify8);
SD8.uart = UART7;
SD8.uart = UART7_BASE;
#endif
}
@ -507,9 +507,9 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config)
if (sdp->state == SD_STOP) {
#if TIVA_SERIAL_USE_UART0
if (&SD1 == sdp) {
SYSCTL->RCGCUART |= (1 << 0);
HWREG(SYSCTL_RCGCUART) |= (1 << 0);
while (!(SYSCTL->PRUART & (1 << 0)))
while (!(HWREG(SYSCTL_PRUART) & (1 << 0)))
;
nvicEnableVector(TIVA_UART0_NUMBER, TIVA_SERIAL_UART0_PRIORITY);
@ -517,9 +517,9 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config)
#endif
#if TIVA_SERIAL_USE_UART1
if (&SD2 == sdp) {
SYSCTL->RCGCUART |= (1 << 1);
HWREG(SYSCTL_RCGCUART) |= (1 << 1);
while (!(SYSCTL->PRUART & (1 << 1)))
while (!(HWREG(SYSCTL_PRUART) & (1 << 1)))
;
nvicEnableVector(TIVA_UART1_NUMBER, TIVA_SERIAL_UART1_PRIORITY);
@ -527,9 +527,9 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config)
#endif
#if TIVA_SERIAL_USE_UART2
if (&SD3 == sdp) {
SYSCTL->RCGCUART |= (1 << 2);
HWREG(SYSCTL_RCGCUART) |= (1 << 2);
while (!(SYSCTL->PRUART & (1 << 2)))
while (!(HWREG(SYSCTL_PRUART) & (1 << 2)))
;
nvicEnableVector(TIVA_UART2_NUMBER, TIVA_SERIAL_UART2_PRIORITY);
@ -537,9 +537,9 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config)
#endif
#if TIVA_SERIAL_USE_UART3
if (&SD4 == sdp) {
SYSCTL->RCGCUART |= (1 << 3);
HWREG(SYSCTL_RCGCUART) |= (1 << 3);
while (!(SYSCTL->PRUART & (1 << 3)))
while (!(HWREG(SYSCTL_PRUART) & (1 << 3)))
;
nvicEnableVector(TIVA_UART3_NUMBER, TIVA_SERIAL_UART3_PRIORITY);
@ -547,9 +547,9 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config)
#endif
#if TIVA_SERIAL_USE_UART4
if (&SD5 == sdp) {
SYSCTL->RCGCUART |= (1 << 4);
HWREG(SYSCTL_RCGCUART) |= (1 << 4);
while (!(SYSCTL->PRUART & (1 << 4)))
while (!(HWREG(SYSCTL_PRUART) & (1 << 4)))
;
nvicEnableVector(TIVA_UART4_NUMBER, TIVA_SERIAL_UART4_PRIORITY);
@ -557,9 +557,9 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config)
#endif
#if TIVA_SERIAL_USE_UART5
if (&SD6 == sdp) {
SYSCTL->RCGCUART |= (1 << 5);
HWREG(SYSCTL_RCGCUART) |= (1 << 5);
while (!(SYSCTL->PRUART & (1 << 5)))
while (!(HWREG(SYSCTL_PRUART) & (1 << 5)))
;
nvicEnableVector(TIVA_UART5_NUMBER, TIVA_SERIAL_UART5_PRIORITY);
@ -567,9 +567,9 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config)
#endif
#if TIVA_SERIAL_USE_UART6
if (&SD7 == sdp) {
SYSCTL->RCGCUART |= (1 << 6);
HWREG(SYSCTL_RCGCUART) |= (1 << 6);
while (!(SYSCTL->PRUART & (1 << 6)))
while (!(HWREG(SYSCTL_PRUART) & (1 << 6)))
;
nvicEnableVector(TIVA_UART6_NUMBER, TIVA_SERIAL_UART6_PRIORITY);
@ -577,9 +577,9 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config)
#endif
#if TIVA_SERIAL_USE_UART7
if (&SD8 == sdp) {
SYSCTL->RCGCUART |= (1 << 7);
HWREG)SYSCTL_RCGCUART) |= (1 << 7);
while (!(SYSCTL->PRUART & (1 << 7)))
while (!(HWREG(SYSCTL_PRUART) & (1 << 7)))
;
nvicEnableVector(TIVA_UART7_NUMBER, TIVA_SERIAL_UART7_PRIORITY);
@ -602,56 +602,56 @@ void sd_lld_stop(SerialDriver *sdp)
uart_deinit(sdp->uart);
#if TIVA_SERIAL_USE_UART0
if (&SD1 == sdp) {
SYSCTL->RCGCUART &= ~(1 << 0); /* disable UART0 module */
HWREG(SYSCTL_RCGCUART) &= ~(1 << 0); /* disable UART0 module */
nvicDisableVector(TIVA_UART0_NUMBER);
return;
}
#endif
#if TIVA_SERIAL_USE_UART1
if (&SD2 == sdp) {
SYSCTL->RCGCUART &= ~(1 << 1); /* disable UART1 module */
HWREG(SYSCTL_RCGCUART) &= ~(1 << 1); /* disable UART1 module */
nvicDisableVector(TIVA_UART1_NUMBER);
return;
}
#endif
#if TIVA_SERIAL_USE_UART2
if (&SD3 == sdp) {
SYSCTL->RCGCUART &= ~(1 << 2); /* disable UART2 module */
HWREG(SYSCTL_RCGCUART) &= ~(1 << 2); /* disable UART2 module */
nvicDisableVector(TIVA_UART2_NUMBER);
return;
}
#endif
#if TIVA_SERIAL_USE_UART3
if (&SD4 == sdp) {
SYSCTL->RCGCUART &= ~(1 << 3); /* disable UART3 module */
HWREG(SYSCTL_RCGCUART) &= ~(1 << 3); /* disable UART3 module */
nvicDisableVector(TIVA_UART3_NUMBER);
return;
}
#endif
#if TIVA_SERIAL_USE_UART4
if (&SD5 == sdp) {
SYSCTL->RCGCUART &= ~(1 << 4); /* disable UART4 module */
HWREG(SYSCTL_RCGCUART) &= ~(1 << 4); /* disable UART4 module */
nvicDisableVector(TIVA_UART4_NUMBER);
return;
}
#endif
#if TIVA_SERIAL_USE_UART5
if (&SD6 == sdp) {
SYSCTL->RCGCUART &= ~(1 << 5); /* disable UART5 module */
HWREG(SYSCTL_RCGCUART) &= ~(1 << 5); /* disable UART5 module */
nvicDisableVector(TIVA_UART5_NUMBER);
return;
}
#endif
#if TIVA_SERIAL_USE_UART6
if (&SD7 == sdp) {
SYSCTL->RCGCUART &= ~(1 << 6); /* disable UART6 module */
HWREG(SYSCTL_RCGCUART) &= ~(1 << 6); /* disable UART6 module */
nvicDisableVector(TIVA_UART6_NUMBER);
return;
}
#endif
#if TIVA_SERIAL_USE_UART7
if (&SD8 == sdp) {
SYSCTL->RCGCUART &= ~(1 << 7); /* disable UART7 module */
HWREG(SYSCTL_RCGCUART) &= ~(1 << 7); /* disable UART7 module */
nvicDisableVector(TIVA_UART7_NUMBER);
return;
}

2
os/hal/ports/TIVA/LLD/UART/hal_serial_lld.h
View File

@ -423,7 +423,7 @@ typedef struct {
uint8_t ob[SERIAL_BUFFERS_SIZE]; \
/* End of the mandatory fields.*/ \
/* Pointer to the USART registers block.*/ \
UART_TypeDef *uart;
uint32_t uart;
/*===========================================================================*/
/* Driver macros. */