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Update CRC for master branch

This commit is contained in:
Fabien Poussin 2021-03-20 23:20:15 +01:00
parent fdcbac6a8c
commit 6683eaffb1
No known key found for this signature in database
GPG Key ID: 6166CABA99FC385C
2 changed files with 15 additions and 19 deletions
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32
os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c
View File

@ -119,12 +119,12 @@ static void crc_lld_serve_interrupt(CRCDriver *crcp, uint32_t flags) {
#endif #endif
/* Stop everything.*/ /* Stop everything.*/
dmaStreamDisable(crcp->dma); dmaStreamDisable(crcp->dmastp);
if (crcp->rem_data_size) { if (crcp->rem_data_size) {
/* Start DMA follow up transfer for next data chunk */ /* Start DMA follow up transfer for next data chunk */
crc_lld_start_calc(crcp, crcp->rem_data_size, crc_lld_start_calc(crcp, crcp->rem_data_size,
(const void *)crcp->dma->channel->CPAR+0xffff); (const void *)crcp->dmastp->channel->CPAR+0xffff);
} else { } else {
/* Portable CRC ISR code defined in the high level driver, note, it is a macro.*/ /* Portable CRC ISR code defined in the high level driver, note, it is a macro.*/
_crc_isr_code(crcp, crcp->crc->DR ^ crcp->config->final_val); _crc_isr_code(crcp, crcp->crc->DR ^ crcp->config->final_val);
@ -144,9 +144,6 @@ static void crc_lld_serve_interrupt(CRCDriver *crcp, uint32_t flags) {
void crc_lld_init(void) { void crc_lld_init(void) {
crcObjectInit(&CRCD1); crcObjectInit(&CRCD1);
CRCD1.crc = CRC; CRCD1.crc = CRC;
#if CRC_USE_DMA == TRUE
CRCD1.dma = STM32_CRC_CRC1_DMA_STREAM;
#endif
} }
/** /**
@ -215,12 +212,11 @@ void crc_lld_start(CRCDriver *crcp) {
STM32_DMA_CR_PL(STM32_CRC_CRC1_DMA_PRIORITY); STM32_DMA_CR_PL(STM32_CRC_CRC1_DMA_PRIORITY);
#endif #endif
{ {
bool b; crcp->dmastp = dmaStreamAlloc(STM32_CRC_CRC1_DMA_STREAM,
b = dmaStreamAllocate(crcp->dma, STM32_CRC_CRC1_DMA_IRQ_PRIORITY,
STM32_CRC_CRC1_DMA_IRQ_PRIORITY, (stm32_dmaisr_t)crc_lld_serve_interrupt,
(stm32_dmaisr_t)crc_lld_serve_interrupt, (void *)crcp);
(void *)crcp); osalDbgAssert(crcp->dmastp != NULL, "unable to allocate stream");
osalDbgAssert(!b, "stream already allocated");
} }
#endif #endif
} }
@ -235,7 +231,7 @@ void crc_lld_start(CRCDriver *crcp) {
*/ */
void crc_lld_stop(CRCDriver *crcp) { void crc_lld_stop(CRCDriver *crcp) {
#if CRC_USE_DMA == TRUE #if CRC_USE_DMA == TRUE
dmaStreamFree(crcp->dma); dmaStreamFree(crcp->dmastp);
#else #else
(void)crcp; (void)crcp;
#endif #endif
@ -318,16 +314,16 @@ void crc_lld_start_calc(CRCDriver *crcp, size_t n, const void *buf) {
size_t sz = (n > 0xffff) ? 0xffff : n; size_t sz = (n > 0xffff) ? 0xffff : n;
crcp->rem_data_size = n-sz; crcp->rem_data_size = n-sz;
dmaStreamSetPeripheral(crcp->dma, buf); dmaStreamSetPeripheral(crcp->dmastp, buf);
dmaStreamSetMemory0(crcp->dma, &crcp->crc->DR); dmaStreamSetMemory0(crcp->dmastp, &crcp->crc->DR);
#if STM32_CRC_PROGRAMMABLE == TRUE #if STM32_CRC_PROGRAMMABLE == TRUE
dmaStreamSetTransactionSize(crcp->dma, sz); dmaStreamSetTransactionSize(crcp->dmastp, sz);
#else #else
dmaStreamSetTransactionSize(crcp->dma, (sz / 4)); dmaStreamSetTransactionSize(crcp->dmastp, (sz / 4));
#endif #endif
dmaStreamSetMode(crcp->dma, crcp->dmamode); dmaStreamSetMode(crcp->dmastp, crcp->dmamode);
dmaStreamEnable(crcp->dma); dmaStreamEnable(crcp->dmastp);
} }
#endif #endif

2
os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.h
View File

@ -211,7 +211,7 @@ struct CRCDriver {
/** /**
* @brief CRC DMA stream * @brief CRC DMA stream
*/ */
const stm32_dma_stream_t *dma; const stm32_dma_stream_t *dmastp;
/** /**
* @brief DMA mode bit mask. * @brief DMA mode bit mask.
*/ */