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Remove STM32F1x specific checks

This commit is contained in:
Stefan Kerkmann 2021-03-25 17:15:47 +01:00
parent 73949757f4
commit 7178909bb1
2 changed files with 1 additions and 22 deletions
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16
os/hal/ports/GD/GD32VF103/I2C/hal_i2c_lld.c
View File

@ -20,7 +20,7 @@
/**
* @file I2C/hal_i2c_lld.c
* @brief STM32 I2C subsystem low level driver source.
* @brief GD32 I2C subsystem low level driver source.
*
* @addtogroup I2C
* @{
@ -377,8 +377,6 @@ static void i2c_lld_serve_error_interrupt(I2CDriver *i2cp, uint16_t sr) {
if (sr & I2C_STAT0_BERR) { /* Bus error. */
i2cp->errors |= I2C_BUS_ERROR;
/* Errata 2.4.6 for STM32F40x, Spurious Bus Error detection in
Master mode.*/
i2cp->i2c->STAT0 &= ~I2C_STAT0_BERR;
}
@ -634,8 +632,6 @@ void i2c_lld_stop(I2CDriver *i2cp) {
/**
* @brief Receives data via the I2C bus as master.
* @details Number of receiving bytes must be more than 1 on STM32F1x. This is
* hardware restriction.
*
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] addr slave device address
@ -662,10 +658,6 @@ msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
systime_t start, end;
msg_t msg;
#if defined(STM32F1XX_I2C)
osalDbgCheck(rxbytes > 1);
#endif
/* Resetting error flags for this transfer.*/
i2cp->errors = I2C_NO_ERROR;
@ -719,8 +711,6 @@ msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
/**
* @brief Transmits data via the I2C bus as master.
* @details Number of receiving bytes must be 0 or more than 1 on STM32F1x.
* This is hardware restriction.
*
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] addr slave device address
@ -750,10 +740,6 @@ msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
systime_t start, end;
msg_t msg;
#if defined(STM32F1XX_I2C)
osalDbgCheck((rxbytes == 0) || ((rxbytes > 1) && (rxbuf != NULL)));
#endif
/* Resetting error flags for this transfer.*/
i2cp->errors = I2C_NO_ERROR;

7
os/hal/ports/GD/GD32VF103/I2C/hal_i2c_lld.h
View File

@ -121,13 +121,6 @@
#define GD32_I2C_I2C2_RX_DMA_STREAM GD32_DMA_STREAM_ID(1, 5)
#define GD32_I2C_I2C2_TX_DMA_STREAM GD32_DMA_STREAM_ID(1, 4)
/* Flag for the whole STM32F1XX family. */
#if defined(STM32F10X_LD_VL) || defined(GD32VF103_MD_VL) || \
defined(STM32F10X_HD_VL) || defined(STM32F10X_LD) || \
defined(GD32VF103_MD) || defined(STM32F10X_HD) || \
defined(STM32F10X_XL) || defined(STM32F10X_CL)
#define STM32F1XX_I2C
#endif
/** @} */
/*===========================================================================*/