PWM driver
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/*
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ChibiOS/HAL - Copyright (C) 2016 Stéphane D'Alu
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file hal_pwm_lld.c
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* @brief NRF51 PWM subsystem low level driver source.
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*
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* @addtogroup PWM
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* @{
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*/
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#include "hal.h"
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#if HAL_USE_PWM || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/**
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* @brief PWMD1 driver identifier.
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* @note The driver PWMD1 allocates the timer TIMER0 when enabled.
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*/
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#if NRF51_PWM_USE_TIMER0 || defined(__DOXYGEN__)
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PWMDriver PWMD1;
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#endif
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/**
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* @brief PWMD2 driver identifier.
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* @note The driver PWMD2 allocates the timer TIMER1 when enabled.
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*/
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#if NRF51_PWM_USE_TIMER1 || defined(__DOXYGEN__)
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PWMDriver PWMD2;
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#endif
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/**
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* @brief PWMD3 driver identifier.
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* @note The driver PWMD3 allocates the timer TIMER2 when enabled.
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*/
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#if NRF51_PWM_USE_TIMER2 || defined(__DOXYGEN__)
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PWMDriver PWMD3;
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#endif
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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static void pwm_lld_serve_interrupt(PWMDriver *pwmp) {
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// Deal with PWM period
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if (pwmp->timer->EVENTS_COMPARE[pwmp->channels]) {
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pwmp->timer->EVENTS_COMPARE[pwmp->channels] = 0;
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if (pwmp->config->callback != NULL) {
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pwmp->config->callback(pwmp);
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}
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}
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// Deal with PWM channels
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for (uint8_t n = 0 ; n < pwmp->channels ; n++) {
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if (pwmp->timer->EVENTS_COMPARE[n]) {
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pwmp->timer->EVENTS_COMPARE[n] = 0;
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if (pwmp->config->channels[n].callback != NULL) {
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pwmp->config->channels[n].callback(pwmp);
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}
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}
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}
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if NRF51_PWM_USE_TIMER0
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/**
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* @brief TIMER0 interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(Vector60) {
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_interrupt(&PWMD1);
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OSAL_IRQ_EPILOGUE();
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}
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#endif /* NRF51_PWM_USE_TIMER0 */
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#if NRF51_PWM_USE_TIMER1
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/**
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* @brief TIMER1 interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(Vector64) {
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_interrupt(&PWMD2);
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OSAL_IRQ_EPILOGUE();
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}
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#endif /* NRF51_PWM_USE_TIMER1 */
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#if NRF51_PWM_USE_TIMER2
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/**
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* @brief TIMER2 interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(Vector68) {
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_interrupt(&PWMD3);
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OSAL_IRQ_EPILOGUE();
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}
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#endif /* NRF51_PWM_USE_TIMER2 */
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level PWM driver initialization.
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*
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* @notapi
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*/
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void pwm_lld_init(void) {
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#if NRF51_PWM_USE_TIMER0
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pwmObjectInit(&PWMD1);
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PWMD1.channels = PWM_CHANNELS;
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PWMD1.timer = NRF_TIMER0;
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#endif
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#if NRF51_PWM_USE_TIMER1
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pwmObjectInit(&PWMD2);
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PWMD2.channels = PWM_CHANNELS;
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PWMD2.timer = NRF_TIMER1;
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#endif
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#if NRF51_PWM_USE_TIMER2
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pwmObjectInit(&PWMD3);
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PWMD3.channels = PWM_CHANNELS;
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PWMD3.timer = NRF_TIMER2;
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#endif
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}
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/**
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* @brief Configures and activates the PWM peripheral.
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* @note Starting a driver that is already in the @p PWM_READY state
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* disables all the active channels.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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*
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* @notapi
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*/
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void pwm_lld_start(PWMDriver *pwmp) {
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// Prescaler value calculation: ftimer = 16MHz / 2^PRESCALER
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uint16_t psc_ratio = NRF51_HFCLK_FREQUENCY / pwmp->config->frequency;
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// Prescaler ratio must be between 1 and 512, and a power of two.
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osalDbgAssert(psc_ratio <= 512 && !(psc_ratio & (psc_ratio - 1)),
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"invalid frequency");
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// Prescaler value as a power of 2, must be 0..9
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uint32_t psc_value;
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for (psc_value = 0; psc_value < 10; psc_value++)
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if (psc_ratio == (unsigned)(1 << psc_value))
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break;
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// Configure as 16bits timer (only TIMER0 support 32bits)
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pwmp->timer->BITMODE = TIMER_BITMODE_BITMODE_16Bit;
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pwmp->timer->MODE = TIMER_MODE_MODE_Timer;
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// With clear shortcuts for period
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pwmp->timer->SHORTS =
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0x1UL << (TIMER_SHORTS_COMPARE0_CLEAR_Pos + pwmp->channels);
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// Disable and reset interrupts for compare events
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pwmp->timer->INTENCLR = (TIMER_INTENCLR_COMPARE0_Msk |
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TIMER_INTENCLR_COMPARE1_Msk |
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TIMER_INTENCLR_COMPARE2_Msk |
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TIMER_INTENCLR_COMPARE3_Msk );
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pwmp->timer->EVENTS_COMPARE[0] = 0;
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pwmp->timer->EVENTS_COMPARE[1] = 0;
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pwmp->timer->EVENTS_COMPARE[2] = 0;
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pwmp->timer->EVENTS_COMPARE[3] = 0;
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// Set prescaler
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pwmp->timer->PRESCALER = psc_value;
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// Set period
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pwmp->timer->CC[pwmp->channels] = pwmp->period;
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// Clear everything
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pwmp->timer->TASKS_CLEAR = 1;
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// Enable interrupt
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#if NRF51_PWM_USE_TIMER0
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if (&PWMD1 == pwmp) {
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nvicEnableVector(TIMER0_IRQn, NRF51_PWM_TIMER0_PRIORITY);
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}
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#endif
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#if NRF51_PWM_USE_TIMER1
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if (&PWMD2 == pwmp) {
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nvicEnableVector(TIMER1_IRQn, NRF51_PWM_TIMER1_PRIORITY);
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}
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#endif
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#if NRF51_PWM_USE_TIMER2
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if (&PWMD3 == pwmp) {
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nvicEnableVector(TIMER2_IRQn, NRF51_PWM_TIMER2_PRIORITY);
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}
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#endif
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// Start timer
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pwmp->timer->TASKS_START = 1;
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}
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/**
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* @brief Deactivates the PWM peripheral.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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*
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* @notapi
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*/
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void pwm_lld_stop(PWMDriver *pwmp) {
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pwmp->timer->TASKS_STOP = 1;
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#if NRF51_PWM_USE_TIMER0
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if (&PWMD1 == pwmp) {
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nvicDisableVector(TIMER0_IRQn);
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}
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#endif
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#if NRF51_PWM_USE_TIMER1
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if (&PWMD2 == pwmp) {
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nvicDisableVector(TIMER1_IRQn);
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}
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#endif
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#if NRF51_PWM_USE_TIMER2
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if (&PWMD3 == pwmp) {
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nvicDisableVector(TIMER2_IRQn);
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}
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#endif
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}
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/**
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* @brief Enables a PWM channel.
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* @pre The PWM unit must have been activated using @p pwmStart().
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* @post The channel is active using the specified configuration.
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* @note The function has effect at the next cycle start.
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* @note Channel notification is not enabled.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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* @param[in] channel PWM channel identifier (0...channels-1)
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* @param[in] width PWM pulse width as clock pulses number
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*
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* @notapi
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*/
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void pwm_lld_enable_channel(PWMDriver *pwmp,
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pwmchannel_t channel,
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pwmcnt_t width) {
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pwmp->timer->CC[channel] = width;
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}
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/**
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* @brief Disables a PWM channel and its notification.
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* @pre The PWM unit must have been activated using @p pwmStart().
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* @post The channel is disabled and its output line returned to the
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* idle state.
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* @note The function has effect at the next cycle start.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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* @param[in] channel PWM channel identifier (0...channels-1)
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*
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* @notapi
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*/
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void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) {
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pwmp->timer->CC[channel] = 0;
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}
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/**
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* @brief Enables the periodic activation edge notification.
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* @pre The PWM unit must have been activated using @p pwmStart().
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* @note If the notification is already enabled then the call has no effect.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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*
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* @notapi
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*/
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void pwm_lld_enable_periodic_notification(PWMDriver *pwmp) {
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pwmp->timer->INTENSET =
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0x1UL << (TIMER_INTENSET_COMPARE0_Pos + pwmp->channels);
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}
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/**
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* @brief Disables the periodic activation edge notification.
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* @pre The PWM unit must have been activated using @p pwmStart().
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* @note If the notification is already disabled then the call has no effect.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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*
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* @notapi
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*/
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void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) {
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pwmp->timer->INTENCLR =
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0x1UL << (TIMER_INTENCLR_COMPARE0_Pos + pwmp->channels);
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}
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/**
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* @brief Enables a channel de-activation edge notification.
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* @pre The PWM unit must have been activated using @p pwmStart().
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* @pre The channel must have been activated using @p pwmEnableChannel().
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* @note If the notification is already enabled then the call has no effect.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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* @param[in] channel PWM channel identifier (0...channels-1)
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*
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* @notapi
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*/
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void pwm_lld_enable_channel_notification(PWMDriver *pwmp,
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pwmchannel_t channel) {
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pwmp->timer->INTENSET =
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0x1UL << (TIMER_INTENSET_COMPARE0_Pos + channel);
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}
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/**
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* @brief Disables a channel de-activation edge notification.
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* @pre The PWM unit must have been activated using @p pwmStart().
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* @pre The channel must have been activated using @p pwmEnableChannel().
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* @note If the notification is already disabled then the call has no effect.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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* @param[in] channel PWM channel identifier (0...channels-1)
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*
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* @notapi
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*/
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void pwm_lld_disable_channel_notification(PWMDriver *pwmp,
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pwmchannel_t channel) {
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pwmp->timer->INTENCLR =
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0x1UL << (TIMER_INTENCLR_COMPARE0_Pos + channel);
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}
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#endif /* HAL_USE_PWM */
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/** @} */
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@ -0,0 +1,276 @@
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/*
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ChibiOS/HAL - Copyright (C) 2016 Stéphane D'Alu
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file hal_pwm_lld.h
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* @brief NRF51 PWM subsystem low level driver header.
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*
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* @addtogroup PWM
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* @{
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*/
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#ifndef HAL_PWM_LLD_H_
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#define HAL_PWM_LLD_H_
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#if HAL_USE_PWM || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @brief Number of PWM channels per PWM driver.
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*/
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#define PWM_CHANNELS 3
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#define PWM_FREQUENCY_16MHZ 16000000 /** @brief 16MHz */
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#define PWM_FREQUENCY_8MHZ 8000000 /** @brief 8MHz */
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#define PWM_FREQUENCY_4MHZ 4000000 /** @brief 4MHz */
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#define PWM_FREQUENCY_2MHZ 2000000 /** @brief 2MHz */
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#define PWM_FREQUENCY_1MHZ 1000000 /** @brief 1MHz */
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#define PWM_FREQUENCY_500KHZ 500000 /** @brief 500kHz */
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#define PWM_FREQUENCY_250KHZ 250000 /** @brief 250kHz */
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#define PWM_FREQUENCY_125KHZ 125000 /** @brief 125kHz */
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#define PWM_FREQUENCY_62500HZ 62500 /** @brief 62500Hz */
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#define PWM_FREQUENCY_31250HZ 31250 /** @brief 31250Hz */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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#if !defined(NRF51_PWM_USE_TIMER0)
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#define NRF51_PWM_USE_TIMER0 FALSE
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#endif
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#if !defined(NRF51_PWM_USE_TIMER1)
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#define NRF51_PWM_USE_TIMER1 FALSE
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#endif
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#if !defined(NRF51_PWM_USE_TIMER2)
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#define NRF51_PWM_USE_TIMER2 FALSE
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#endif
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/**
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* @brief TIMER0 interrupt priority level setting.
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*/
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#if !defined(NRF51_PWM_TIMER0_PRIORITY) || defined(__DOXYGEN__)
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#define NRF51_PWM_TIMER0_PRIORITY 12
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#endif
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/**
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* @brief TIMER1 interrupt priority level setting.
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*/
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#if !defined(NRF51_PWM_TIMER1_PRIORITY) || defined(__DOXYGEN__)
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#define NRF51_PWM_TIMER1_PRIORITY 12
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#endif
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/**
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* @brief TIMER2 interrupt priority level setting.
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*/
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#if !defined(NRF51_PWM_TIMER2_PRIORITY) || defined(__DOXYGEN__)
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#define NRF51_PWM_TIMER2_PRIORITY 12
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#endif
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/** @} */
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/**
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* @name Configuration options
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* @{
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*/
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/** @} */
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/*===========================================================================*/
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/* Configuration checks. */
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/*===========================================================================*/
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#if !NRF51_PWM_USE_TIMER0 && !NRF51_PWM_USE_TIMER1 && !NRF51_PWM_USE_TIMER2
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#error "PWM driver activated but no TIMER peripheral assigned"
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#endif
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#if (NRF51_ST_USE_TIMER0 == TRUE) && (NRF51_PWM_USE_TIMER0 == TRUE)
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#error "TIMER0 used for ST and PWM"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Type of a PWM mode.
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*/
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typedef uint32_t pwmmode_t;
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/**
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* @brief Type of a PWM channel.
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*/
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typedef uint8_t pwmchannel_t;
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||||
|
||||
/**
|
||||
* @brief Type of a channels mask.
|
||||
*/
|
||||
typedef uint32_t pwmchnmsk_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM counter.
|
||||
*/
|
||||
typedef uint16_t pwmcnt_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM driver channel configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Channel active logic level.
|
||||
*/
|
||||
pwmmode_t mode;
|
||||
|
||||
/**
|
||||
* @brief Channel callback pointer.
|
||||
* @note This callback is invoked on the channel compare event. If set to
|
||||
* @p NULL then the callback is disabled.
|
||||
*/
|
||||
pwmcallback_t callback;
|
||||
/* End of the mandatory fields.*/
|
||||
} PWMChannelConfig;
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM driver configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Timer clock in Hz.
|
||||
* @note The low level can use assertions in order to catch invalid
|
||||
* frequency specifications.
|
||||
*/
|
||||
uint32_t frequency;
|
||||
/**
|
||||
* @brief PWM period in ticks.
|
||||
* @note The low level can use assertions in order to catch invalid
|
||||
* period specifications.
|
||||
*/
|
||||
pwmcnt_t period;
|
||||
/**
|
||||
* @brief Periodic callback pointer.
|
||||
* @note This callback is invoked on PWM counter reset. If set to
|
||||
* @p NULL then the callback is disabled.
|
||||
*/
|
||||
pwmcallback_t callback;
|
||||
/**
|
||||
* @brief Channels configurations.
|
||||
*/
|
||||
PWMChannelConfig channels[PWM_CHANNELS];
|
||||
/* End of the mandatory fields.*/
|
||||
} PWMConfig;
|
||||
|
||||
/**
|
||||
* @brief Structure representing a PWM driver.
|
||||
*/
|
||||
struct PWMDriver {
|
||||
/**
|
||||
* @brief Driver state.
|
||||
*/
|
||||
pwmstate_t state;
|
||||
/**
|
||||
* @brief Current driver configuration data.
|
||||
*/
|
||||
const PWMConfig *config;
|
||||
/**
|
||||
* @brief Current PWM period in ticks.
|
||||
*/
|
||||
pwmcnt_t period;
|
||||
/**
|
||||
* @brief Mask of the enabled channels.
|
||||
*/
|
||||
pwmchnmsk_t enabled;
|
||||
/**
|
||||
* @brief Number of channels in this instance.
|
||||
*/
|
||||
pwmchannel_t channels;
|
||||
#if defined(PWM_DRIVER_EXT_FIELDS)
|
||||
PWM_DRIVER_EXT_FIELDS
|
||||
#endif
|
||||
/* End of the mandatory fields.*/
|
||||
/**
|
||||
* @brief Pointer to the TIMER registers block.
|
||||
*/
|
||||
NRF_TIMER_Type *timer;
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Changes the period the PWM peripheral.
|
||||
* @details This function changes the period of a PWM unit that has already
|
||||
* been activated using @p pwmStart().
|
||||
* @pre The PWM unit must have been activated using @p pwmStart().
|
||||
* @post The PWM unit period is changed to the new value.
|
||||
* @note The function has effect at the next cycle start.
|
||||
* @note If a period is specified that is shorter than the pulse width
|
||||
* programmed in one of the channels then the behavior is not
|
||||
* guaranteed.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
* @param[in] period new cycle time in ticks
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pwm_lld_change_period(pwmp, period) \
|
||||
do { \
|
||||
(pwmp)->timer->CC[(pwmp)->channels] = ((period) - 1); \
|
||||
} while(0)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if NRF51_PWM_USE_TIMER0 || defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD1;
|
||||
#endif
|
||||
#if NRF51_PWM_USE_TIMER1 || defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD2;
|
||||
#endif
|
||||
#if NRF51_PWM_USE_TIMER2 || defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD3;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void pwm_lld_init(void);
|
||||
void pwm_lld_start(PWMDriver *pwmp);
|
||||
void pwm_lld_stop(PWMDriver *pwmp);
|
||||
void pwm_lld_enable_channel(PWMDriver *pwmp,
|
||||
pwmchannel_t channel,
|
||||
pwmcnt_t width);
|
||||
void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel);
|
||||
void pwm_lld_enable_periodic_notification(PWMDriver *pwmp);
|
||||
void pwm_lld_disable_periodic_notification(PWMDriver *pwmp);
|
||||
void pwm_lld_enable_channel_notification(PWMDriver *pwmp,
|
||||
pwmchannel_t channel);
|
||||
void pwm_lld_disable_channel_notification(PWMDriver *pwmp,
|
||||
pwmchannel_t channel);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_PWM */
|
||||
|
||||
#endif /* HAL_PWM_LLD_H_ */
|
||||
|
||||
/** @} */
|
|
@ -34,6 +34,9 @@ endif
|
|||
ifneq ($(findstring HAL_USE_RNG TRUE,$(HALCONF)),)
|
||||
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/hal_rng_lld.c
|
||||
endif
|
||||
ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),)
|
||||
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/hal_pwm_lld.c
|
||||
endif
|
||||
else
|
||||
PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
|
||||
${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/hal_lld.c \
|
||||
|
@ -47,7 +50,8 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
|
|||
${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/hal_adc_lld.c \
|
||||
${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/hal_gpt_lld.c \
|
||||
${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/hal_wdg_lld.c \
|
||||
${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/hal_rng_lld.c
|
||||
${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/hal_rng_lld.c \
|
||||
${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/hal_pwm_lld.c
|
||||
endif
|
||||
|
||||
# Required include directories
|
||||
|
|
Loading…
Reference in New Issue