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Updated pwm_lld to use TivaWare.

This commit is contained in:
marcoveeneman 2016-10-26 21:09:34 +02:00
parent 8881004050
commit 94fe96d3ae
4 changed files with 77 additions and 49 deletions
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1
os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h
View File

@ -113,6 +113,7 @@ typedef int IRQn_Type;
#include "inc/hw_watchdog.h" #include "inc/hw_watchdog.h"
#include "inc/hw_ssi.h" #include "inc/hw_ssi.h"
#include "inc/hw_udma.h" #include "inc/hw_udma.h"
#include "inc/hw_pwm.h"
#if CORTEX_NUM_VECTORS != ((((NUM_INTERRUPTS - 16) + 7) / 8) * 8) #if CORTEX_NUM_VECTORS != ((((NUM_INTERRUPTS - 16) + 7) / 8) * 8)
#error "TivaWare NUM_INTERRUPTS mismatch" #error "TivaWare NUM_INTERRUPTS mismatch"

1
os/common/startup/ARMCMx/devices/TM4C129x/cmparams.h
View File

@ -98,6 +98,7 @@ typedef int IRQn_Type;
#include "inc/hw_watchdog.h" #include "inc/hw_watchdog.h"
#include "inc/hw_ssi.h" #include "inc/hw_ssi.h"
#include "inc/hw_udma.h" #include "inc/hw_udma.h"
#include "inc/hw_pwm.h"
#if CORTEX_NUM_VECTORS != ((((NUM_INTERRUPTS - 16) + 7) / 8) * 8) #if CORTEX_NUM_VECTORS != ((((NUM_INTERRUPTS - 16) + 7) / 8) * 8)
#error "TivaWare NUM_INTERRUPTS mismatch" #error "TivaWare NUM_INTERRUPTS mismatch"

114
os/hal/ports/TIVA/LLD/PWM/hal_pwm_lld.c
View File

@ -59,6 +59,8 @@ PWMDriver PWMD2;
/* Driver local variables and types. */ /* Driver local variables and types. */
/*===========================================================================*/ /*===========================================================================*/
static uint32_t pwm_generator_offsets[] = { PWM_GEN_0_OFFSET, PWM_GEN_1_OFFSET, PWM_GEN_2_OFFSET, PWM_GEN_3_OFFSET};
/*===========================================================================*/ /*===========================================================================*/
/* Driver local functions. */ /* Driver local functions. */
/*===========================================================================*/ /*===========================================================================*/
@ -75,9 +77,10 @@ PWMDriver PWMD2;
static void pwm_lld_serve_generator_interrupt (PWMDriver *pwmp, uint8_t i) static void pwm_lld_serve_generator_interrupt (PWMDriver *pwmp, uint8_t i)
{ {
uint32_t isc; uint32_t isc;
uint32_t pwm = pwmp->pwm;
isc = pwmp->pwm->PWM[i].ISC; isc = HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_ISC);
pwmp->pwm->PWM[i].ISC = isc; HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_ISC) = isc;
if (((isc & PWM_INT_CMPAD) != 0) && if (((isc & PWM_INT_CMPAD) != 0) &&
(pwmp->config->channels[i * 2 + 0].callback != NULL)) { (pwmp->config->channels[i * 2 + 0].callback != NULL)) {
@ -311,13 +314,13 @@ void pwm_lld_init(void)
#if TIVA_PWM_USE_PWM0 #if TIVA_PWM_USE_PWM0
pwmObjectInit(&PWMD1); pwmObjectInit(&PWMD1);
PWMD1.channels = PWM_CHANNELS; PWMD1.channels = PWM_CHANNELS;
PWMD1.pwm = PWM0; PWMD1.pwm = PWM0_BASE;
#endif #endif
#if TIVA_PWM_USE_PWM1 #if TIVA_PWM_USE_PWM1
pwmObjectInit(&PWMD2); pwmObjectInit(&PWMD2);
PWMD2.channels = PWM_CHANNELS; PWMD2.channels = PWM_CHANNELS;
PWMD2.pwm = PWM1; PWMD2.pwm = PWM1_BASE;
#endif #endif
} }
@ -335,14 +338,15 @@ void pwm_lld_start(PWMDriver *pwmp)
uint8_t i; uint8_t i;
uint32_t invert = 0; uint32_t invert = 0;
uint32_t enable = 0; uint32_t enable = 0;
uint32_t pwm = pwmp->pwm;
if (pwmp->state == PWM_STOP) { if (pwmp->state == PWM_STOP) {
/* Clock activation.*/ /* Clock activation.*/
#if TIVA_PWM_USE_PWM0 #if TIVA_PWM_USE_PWM0
if (&PWMD1 == pwmp) { if (&PWMD1 == pwmp) {
SYSCTL->RCGCPWM |= (1 << 0); HWREG(SYSCTL_RCGCPWM) |= (1 << 0);
while (!(SYSCTL->PRPWM & (1 << 0))) while (!(HWREG(SYSCTL_PRPWM) & (1 << 0)))
; ;
nvicEnableVector(TIVA_PWM0FAULT_NUMBER, nvicEnableVector(TIVA_PWM0FAULT_NUMBER,
@ -356,9 +360,9 @@ void pwm_lld_start(PWMDriver *pwmp)
#if TIVA_PWM_USE_PWM1 #if TIVA_PWM_USE_PWM1
if (&PWMD2 == pwmp) { if (&PWMD2 == pwmp) {
SYSCTL->RCGCPWM |= (1 << 1); HWREG(SYSCTL_RCGCPWM) |= (1 << 1);
while (!(SYSCTL->PRPWM & (1 << 1))) while (!(HWREG(SYSCTL_PRPWM) & (1 << 1)))
; ;
nvicEnableVector(TIVA_PWM1FAULT_NUMBER, nvicEnableVector(TIVA_PWM1FAULT_NUMBER,
@ -372,20 +376,20 @@ void pwm_lld_start(PWMDriver *pwmp)
} }
else { else {
/* Driver re-configuration scenario, it must be stopped first.*/ /* Driver re-configuration scenario, it must be stopped first.*/
pwmp->pwm->PWM[0].CTL = 0; HWREG(pwm + PWM_O_0_CTL) = 0;
pwmp->pwm->PWM[1].CTL = 0; HWREG(pwm + PWM_O_1_CTL) = 0;
pwmp->pwm->PWM[2].CTL = 0; HWREG(pwm + PWM_O_2_CTL) = 0;
pwmp->pwm->PWM[3].CTL = 0; HWREG(pwm + PWM_O_3_CTL) = 0;
} }
/* Timer configuration.*/ /* Timer configuration.*/
for (i = 0; i < (PWM_CHANNELS >> 1); i++) { for (i = 0; i < (PWM_CHANNELS >> 1); i++) {
pwmp->pwm->PWM[i].CTL = 0; HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_CTL) = 0;
pwmp->pwm->PWM[i].GEN[0] = 0x08C; HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_GENA) = 0x08C;
pwmp->pwm->PWM[i].GEN[1] = 0x80C; HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_GENB) = 0x80C;
pwmp->pwm->PWM[i].LOAD = (uint16_t)(pwmp->config->frequency - 1); HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_LOAD) = (uint16_t)(pwmp->config->frequency - 1);
pwmp->pwm->PWM[i].CMP[0] = (uint16_t)(pwmp->period - 1); HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_CMPA) = (uint16_t)(pwmp->period - 1);
pwmp->pwm->PWM[i].CMP[1] = (uint16_t)(pwmp->period - 1); HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_CMPB) = (uint16_t)(pwmp->period - 1);
} }
/* Output enables and polarities setup.*/ /* Output enables and polarities setup.*/
@ -407,9 +411,9 @@ void pwm_lld_start(PWMDriver *pwmp)
} }
} }
pwmp->pwm->INVERT = invert; HWREG(pwm + PWM_O_INVERT) = invert;
pwmp->pwm->ENABLE = enable; HWREG(pwm + PWM_O_ENABLE) = enable;
pwmp->pwm->ISC = 0xFFFFFFFF; HWREG(pwm + PWM_O_ISC) = 0xFFFFFFFF;
} }
/** /**
@ -421,12 +425,14 @@ void pwm_lld_start(PWMDriver *pwmp)
*/ */
void pwm_lld_stop(PWMDriver *pwmp) void pwm_lld_stop(PWMDriver *pwmp)
{ {
uint32_t pwm = pwmp->pwm;
/* If in ready state then disables the PWM clock.*/ /* If in ready state then disables the PWM clock.*/
if (pwmp->state == PWM_READY) { if (pwmp->state == PWM_READY) {
pwmp->pwm->PWM[0].CTL = 0; HWREG(pwm + PWM_O_0_CTL) = 0;
pwmp->pwm->PWM[1].CTL = 0; HWREG(pwm + PWM_O_1_CTL) = 0;
pwmp->pwm->PWM[2].CTL = 0; HWREG(pwm + PWM_O_2_CTL) = 0;
pwmp->pwm->PWM[3].CTL = 0; HWREG(pwm + PWM_O_3_CTL) = 0;
#if TIVA_PWM_USE_PWM0 #if TIVA_PWM_USE_PWM0
if (&PWMD1 == pwmp) { if (&PWMD1 == pwmp) {
@ -435,7 +441,7 @@ void pwm_lld_stop(PWMDriver *pwmp)
nvicDisableVector(TIVA_PWM0GEN1_NUMBER); nvicDisableVector(TIVA_PWM0GEN1_NUMBER);
nvicDisableVector(TIVA_PWM0GEN2_NUMBER); nvicDisableVector(TIVA_PWM0GEN2_NUMBER);
nvicDisableVector(TIVA_PWM0GEN3_NUMBER); nvicDisableVector(TIVA_PWM0GEN3_NUMBER);
SYSCTL->RCGCPWM &= ~(1 << 0); HWREG(SYSCTL_RCGCPWM) &= ~(1 << 0);
} }
#endif #endif
@ -446,7 +452,7 @@ void pwm_lld_stop(PWMDriver *pwmp)
nvicDisableVector(TIVA_PWM1GEN1_NUMBER); nvicDisableVector(TIVA_PWM1GEN1_NUMBER);
nvicDisableVector(TIVA_PWM1GEN2_NUMBER); nvicDisableVector(TIVA_PWM1GEN2_NUMBER);
nvicDisableVector(TIVA_PWM1GEN3_NUMBER); nvicDisableVector(TIVA_PWM1GEN3_NUMBER);
SYSCTL->RCGCPWM &= ~(1 << 1); HWREG(SYSCTL_RCGCPWM) &= ~(1 << 1);
} }
#endif #endif
} }
@ -469,9 +475,16 @@ void pwm_lld_enable_channel(PWMDriver *pwmp,
pwmchannel_t channel, pwmchannel_t channel,
pwmcnt_t width) pwmcnt_t width)
{ {
uint32_t pwm = pwmp->pwm;
/* Changing channel duty cycle on the fly.*/ /* Changing channel duty cycle on the fly.*/
pwmp->pwm->PWM[channel >> 1].CMP[channel & 1] = width; if (channel & 1)
pwmp->pwm->PWM[channel >> 1].CTL |= (1 << 0); HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_CMPB) = width;
else
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_CMPA) = width;
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_CTL) = (1 << 0);
} }
/** /**
@ -488,8 +501,14 @@ void pwm_lld_enable_channel(PWMDriver *pwmp,
*/ */
void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel)
{ {
pwmp->pwm->PWM[channel >> 1].CMP[channel & 1] = 0; uint32_t pwm = pwmp->pwm;
pwmp->pwm->PWM[channel >> 1].CTL &= ~(1 << 0);
if (channel & 1)
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_CMPB) = 0;
else
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_CMPA) = 0;
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_CTL) = (1 << 0);
} }
/** /**
@ -505,18 +524,19 @@ void pwm_lld_enable_periodic_notification(PWMDriver *pwmp)
{ {
uint32_t inten; uint32_t inten;
uint8_t i; uint8_t i;
uint32_t pwm = pwmp->pwm;
/* If the IRQ is not already enabled care must be taken to clear it, /* If the IRQ is not already enabled care must be taken to clear it,
it is probably already pending because the timer is running.*/ it is probably already pending because the timer is running.*/
for(i = 0; i < (PWM_CHANNELS >> 1); i++) { for(i = 0; i < (PWM_CHANNELS >> 1); i++) {
inten = pwmp->pwm->PWM[i].INTEN; inten = HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_INTEN);
if ((inten & 0x03) == 0) { if ((inten & 0x03) == 0) {
pwmp->pwm->PWM[i].INTEN |= 0x03; HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_INTEN) |= 0x03;
pwmp->pwm->PWM[i].ISC = 0x03; HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_ISC) = 0x03;
} }
} }
pwmp->pwm->INTEN = 0x3f; HWREG(pwm + PWM_O_INTEN) = 0x3f;
} }
/** /**
@ -530,11 +550,14 @@ void pwm_lld_enable_periodic_notification(PWMDriver *pwmp)
*/ */
void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) void pwm_lld_disable_periodic_notification(PWMDriver *pwmp)
{ {
pwmp->pwm->PWM[0].INTEN &= ~(0x03); uint32_t pwm = pwmp->pwm;
pwmp->pwm->PWM[1].INTEN &= ~(0x03);
pwmp->pwm->PWM[2].INTEN &= ~(0x03); HWREG(pwm + PWM_O_0_INTEN) = ~(0x03);
pwmp->pwm->PWM[3].INTEN &= ~(0x03); HWREG(pwm + PWM_O_1_INTEN) = ~(0x03);
pwmp->pwm->INTEN &= ~(0x3F); HWREG(pwm + PWM_O_2_INTEN) = ~(0x03);
HWREG(pwm + PWM_O_3_INTEN) = ~(0x03);
HWREG(pwm + PWM_O_INTEN) &= ~(0x3F);
} }
/** /**
@ -551,13 +574,14 @@ void pwm_lld_disable_periodic_notification(PWMDriver *pwmp)
void pwm_lld_enable_channel_notification(PWMDriver *pwmp, void pwm_lld_enable_channel_notification(PWMDriver *pwmp,
pwmchannel_t channel) pwmchannel_t channel)
{ {
uint32_t inten = pwmp->pwm->PWM[channel >> 1].INTEN; uint32_t pwm = pwmp->pwm;
uint32_t inten = HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_ISC);
/* If the IRQ is not already enabled care must be taken to clear it, /* If the IRQ is not already enabled care must be taken to clear it,
it is probably already pending because the timer is running.*/ it is probably already pending because the timer is running.*/
if ((inten & (0x03 << (((channel & 1) * 2) + 2))) == 0) { if ((inten & (0x03 << (((channel & 1) * 2) + 2))) == 0) {
pwmp->pwm->PWM[channel >> 1].INTEN |= (0x03 << (((channel & 1) * 2) + 2)); HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_INTEN) |= (0x03 << (((channel & 1) * 2) + 2));
pwmp->pwm->PWM[channel >> 1].ISC = (0x03 << (((channel & 1) * 2) + 2)); HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_ISC) = (0x03 << (((channel & 1) * 2) + 2));
} }
} }
@ -575,7 +599,9 @@ void pwm_lld_enable_channel_notification(PWMDriver *pwmp,
void pwm_lld_disable_channel_notification(PWMDriver *pwmp, void pwm_lld_disable_channel_notification(PWMDriver *pwmp,
pwmchannel_t channel) pwmchannel_t channel)
{ {
pwmp->pwm->PWM[channel >> 1].INTEN &= ~(0x03 << (((channel & 1) * 2) + 2)); uint32_t pwm = pwmp->pwm;
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_INTEN) = ~(0x03 << (((channel & 1) * 2) + 2));
} }
#endif /* HAL_USE_PWM */ #endif /* HAL_USE_PWM */

10
os/hal/ports/TIVA/LLD/PWM/hal_pwm_lld.h
View File

@ -304,7 +304,7 @@ struct PWMDriver {
/** /**
* @brief Pointer to the PWMx registers block. * @brief Pointer to the PWMx registers block.
*/ */
PWM_TypeDef *pwm; uint32_t pwm;
}; };
/*===========================================================================*/ /*===========================================================================*/
@ -328,10 +328,10 @@ struct PWMDriver {
* @notapi * @notapi
*/ */
#define pwm_lld_change_period(pwmp, period) \ #define pwm_lld_change_period(pwmp, period) \
((pwmp)->pwm->PWM[0].LOAD = (uint16_t)((period) - 1)); \ HWREG((pwmp)->pwm + PWM_O_0_LOAD) = (uint16_t)((period) - 1); \
((pwmp)->pwm->PWM[1].LOAD = (uint16_t)((period) - 1)); \ HWREG((pwmp)->pwm + PWM_O_1_LOAD) = (uint16_t)((period) - 1); \
((pwmp)->pwm->PWM[2].LOAD = (uint16_t)((period) - 1)); \ HWREG((pwmp)->pwm + PWM_O_2_LOAD) = (uint16_t)((period) - 1); \
((pwmp)->pwm->PWM[3].LOAD = (uint16_t)((period) - 1)) HWREG((pwmp)->pwm + PWM_O_3_LOAD) = (uint16_t)((period) - 1)
/*===========================================================================*/ /*===========================================================================*/
/* External declarations. */ /* External declarations. */