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USB host driver cleanup (OTG1/2 -> HS/FS)

This commit is contained in:
Fabien Poussin 2020-12-25 01:19:58 +01:00
parent 11478d784b
commit 958059c864
No known key found for this signature in database
GPG Key ID: 6166CABA99FC385C
26 changed files with 326 additions and 318 deletions
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20
demos/STM32/RT-STM32F303-DISCOVERY-PID/mcuconf_community.h
View File

@ -87,18 +87,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/.cproject
View File

@ -87,18 +87,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

166
os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c
View File

@ -21,67 +21,75 @@
#include "usbh/internal.h"
#include <string.h>
#if STM32_USBH_USE_OTG1
#if !defined(STM32_OTG1_CHANNELS_NUMBER)
#error "STM32_OTG1_CHANNELS_NUMBER must be defined"
#if STM32_USBH_USE_OTG_FS
#if !defined(STM32_OTG_FS_CHANNELS_NUMBER)
#error "STM32_OTG_FS_CHANNELS_NUMBER must be defined"
#endif
#if !defined(STM32_OTG1_RXFIFO_SIZE)
#define STM32_OTG1_RXFIFO_SIZE 1024
#if !defined(STM32_OTG_FS_RXFIFO_SIZE)
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#endif
#if !defined(STM32_OTG1_PTXFIFO_SIZE)
#define STM32_OTG1_PTXFIFO_SIZE 128
#if !defined(STM32_OTG_FS_PTXFIFO_SIZE)
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#endif
#if !defined(STM32_OTG1_NPTXFIFO_SIZE)
#define STM32_OTG1_NPTXFIFO_SIZE 128
#if !defined(STM32_OTG_FS_NPTXFIFO_SIZE)
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#endif
#if (STM32_OTG1_RXFIFO_SIZE + STM32_OTG1_PTXFIFO_SIZE + STM32_OTG1_NPTXFIFO_SIZE) > (STM32_OTG1_FIFO_MEM_SIZE * 4)
#error "Not enough memory in OTG1 implementation"
#elif (STM32_OTG1_RXFIFO_SIZE + STM32_OTG1_PTXFIFO_SIZE + STM32_OTG1_NPTXFIFO_SIZE) < (STM32_OTG1_FIFO_MEM_SIZE * 4)
#warning "Spare memory in OTG1; could enlarge RX, PTX or NPTX FIFO sizes"
#if !defined(STM32_OTG_FS_FIFO_MEM_SIZE)
#define STM32_OTG_FS_FIFO_MEM_SIZE 320
#endif
#if (STM32_OTG1_RXFIFO_SIZE % 4) || (STM32_OTG1_PTXFIFO_SIZE % 4) || (STM32_OTG1_NPTXFIFO_SIZE % 4)
#error "FIFO sizes must be a multiple of 32-bit words"
#endif
#if defined(STM32H7XX)
#define rccEnableUSB1(x) rccEnableUSB1_OTG_HS(x)
#define rccDisableUSB1() rccDisableUSB1_OTG_HS()
#define rccResetUSB1() rccResetUSB1_OTG_HS()
#if defined(STM32H7xx)
#define STM32_OTG_FS_NUMBER STM32_OTG2_NUMBER
#define STM32_USB_OTG_FS_IRQ_PRIORITY STM32_USB_OTG2_IRQ_PRIORITY
#define rccEnableOTG_FS(x) rccEnableAHB1(RCC_AHB1ENR_USB2OTGFSEN, lp)
#define rccDisableOTG_FS() rccDisableAHB1(RCC_AHB1ENR_USB2OTGFSEN)
#define rccResetOTG_FS() rccResetAHB1(RCC_AHB1ENR_USB2OTGFSEN)
#else
#define rccEnableUSB1(x) rccEnableOTG_FS(x)
#define rccDisableUSB1() rccDisableOTG_FS()
#define rccResetUSB1() rccResetOTG_FS()
#define STM32_OTG_FS_NUMBER STM32_OTG1_NUMBER
#define STM32_USB_OTG_FS_IRQ_PRIORITY STM32_USB_OTG1_IRQ_PRIORITY
#endif
#if (STM32_OTG_FS_RXFIFO_SIZE + STM32_OTG_FS_PTXFIFO_SIZE + STM32_OTG_FS_NPTXFIFO_SIZE) > (STM32_OTG_FS_FIFO_MEM_SIZE * 4)
#error "Not enough memory in OTG_FS implementation"
#elif (STM32_OTG_FS_RXFIFO_SIZE + STM32_OTG_FS_PTXFIFO_SIZE + STM32_OTG_FS_NPTXFIFO_SIZE) < (STM32_OTG1_FIFO_MEM_SIZE * 4)
#warning "Spare memory in OTG_FS; could enlarge RX, PTX or NPTX FIFO sizes"
#endif
#if (STM32_OTG_FS_RXFIFO_SIZE % 4) || (STM32_OTG_FS_PTXFIFO_SIZE % 4) || (STM32_OTG_FS_NPTXFIFO_SIZE % 4)
#error "FIFO sizes must be a multiple of 32-bit words"
#endif
#endif
#if STM32_USBH_USE_OTG2
#if !defined(STM32_OTG2_CHANNELS_NUMBER)
#error "STM32_OTG2_CHANNELS_NUMBER must be defined"
#if STM32_USBH_USE_OTG_HS
#if !defined(STM32_OTG_HS_CHANNELS_NUMBER)
#error "STM32_OTG_HS_CHANNELS_NUMBER must be defined"
#endif
#if !defined(STM32_OTG2_RXFIFO_SIZE)
#define STM32_OTG2_RXFIFO_SIZE 2048
#if !defined(STM32_OTG_HS_RXFIFO_SIZE)
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#endif
#if !defined(STM32_OTG2_PTXFIFO_SIZE)
#define STM32_OTG2_PTXFIFO_SIZE 1024
#if !defined(STM32_OTG_HS_PTXFIFO_SIZE)
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#endif
#if !defined(STM32_OTG2_NPTXFIFO_SIZE)
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#if !defined(STM32_OTG_HS_NPTXFIFO_SIZE)
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#endif
#if (STM32_OTG2_RXFIFO_SIZE + STM32_OTG2_PTXFIFO_SIZE + STM32_OTG2_NPTXFIFO_SIZE) > (STM32_OTG2_FIFO_MEM_SIZE * 4)
#error "Not enough memory in OTG2 implementation"
#elif (STM32_OTG2_RXFIFO_SIZE + STM32_OTG2_PTXFIFO_SIZE + STM32_OTG2_NPTXFIFO_SIZE) < (STM32_OTG2_FIFO_MEM_SIZE * 4)
#warning "Spare memory in OTG2; could enlarge RX, PTX or NPTX FIFO sizes"
#endif
#if (STM32_OTG2_RXFIFO_SIZE % 4) || (STM32_OTG2_PTXFIFO_SIZE % 4) || (STM32_OTG2_NPTXFIFO_SIZE % 4)
#error "FIFO sizes must be a multiple of 32-bit words"
#if !defined(STM32_OTG_HS_FIFO_MEM_SIZE)
#define STM32_OTG_HS_FIFO_MEM_SIZE 1024
#endif
#if defined(STM32H7xx)
#define rccEnableUSB2(x) rccEnableUSB1_OTG_FS(x)
#define rccDisableUSB2() rccDisableUSB1_OTG_FS()
#define rccResetUSB2() rccResetUSB2_OTG_HS()
#define STM32_OTG_HS_NUMBER STM32_OTG1_NUMBER
#define STM32_USB_OTG_HS_IRQ_PRIORITY STM32_USB_OTG1_IRQ_PRIORITY
#define rccEnableOTG_HS(x) rccEnableAHB1(RCC_AHB1ENR_USB1OTGHSEN, lp)
#define rccDisableOTG_HS() rccDisableAHB1(RCC_AHB1ENR_USB1OTGHSEN)
#define rccResetOTG_HS() rccResetAHB1(RCC_AHB1ENR_USB1OTGHSEN)
#else
#define rccEnableUSB2(x) rccEnableOTG_HS(x)
#define rccDisableUSB2() rccDisableOTG_HS()
#define rccResetUSB2() rccResetOTG_HS()
#define STM32_OTG_HS_NUMBER STM32_OTG2_NUMBER
#define STM32_USB_OTG_HS_IRQ_PRIORITY STM32_USB_OTG2_IRQ_PRIORITY
#endif
#if (STM32_OTG_HS_RXFIFO_SIZE + STM32_OTG_HS_PTXFIFO_SIZE + STM32_OTG_HS_NPTXFIFO_SIZE) > (STM32_OTG_HS_FIFO_MEM_SIZE * 4)
#error "Not enough memory in OTG_HS implementation"
#elif (STM32_OTG_HS_RXFIFO_SIZE + STM32_OTG_HS_PTXFIFO_SIZE + STM32_OTG_HS_NPTXFIFO_SIZE) < (STM32_OTG_HS_FIFO_MEM_SIZE * 4)
#warning "Spare memory in OTG_HS; could enlarge RX, PTX or NPTX FIFO sizes"
#endif
#if (STM32_OTG_HS_RXFIFO_SIZE % 4) || (STM32_OTG_HS_PTXFIFO_SIZE % 4) || (STM32_OTG_HS_NPTXFIFO_SIZE % 4)
#error "FIFO sizes must be a multiple of 32-bit words"
#endif
#endif
@ -96,10 +104,10 @@ static void _try_commit_np(USBHDriver *host);
static void otg_rxfifo_flush(USBHDriver *usbp);
static void otg_txfifo_flush(USBHDriver *usbp, uint32_t fifo);
#if STM32_USBH_USE_OTG1
#if STM32_USBH_USE_OTG_FS
USBHDriver USBHD1;
#endif
#if STM32_USBH_USE_OTG2
#if STM32_USBH_USE_OTG_HS
USBHDriver USBHD2;
#endif
@ -1230,24 +1238,24 @@ static inline void _hprtint_int(USBHDriver *host) {
/* configure FIFOs */
#define HNPTXFSIZ DIEPTXF0
#if STM32_USBH_USE_OTG1
#if STM32_USBH_USE_OTG2
#if STM32_USBH_USE_OTG_FS
#if STM32_USBH_USE_OTG_HS
if (&USBHD1 == host)
#endif
{
otg->GRXFSIZ = GRXFSIZ_RXFD(STM32_OTG1_RXFIFO_SIZE / 4);
otg->HNPTXFSIZ = HPTXFSIZ_PTXSA(STM32_OTG1_RXFIFO_SIZE / 4) | HPTXFSIZ_PTXFD(STM32_OTG1_NPTXFIFO_SIZE / 4);
otg->HPTXFSIZ = HPTXFSIZ_PTXSA((STM32_OTG1_RXFIFO_SIZE / 4) + (STM32_OTG1_NPTXFIFO_SIZE / 4)) | HPTXFSIZ_PTXFD(STM32_OTG1_PTXFIFO_SIZE / 4);
otg->GRXFSIZ = GRXFSIZ_RXFD(STM32_OTG_FS_RXFIFO_SIZE / 4);
otg->HNPTXFSIZ = HPTXFSIZ_PTXSA(STM32_OTG_FS_RXFIFO_SIZE / 4) | HPTXFSIZ_PTXFD(STM32_OTG_FS_NPTXFIFO_SIZE / 4);
otg->HPTXFSIZ = HPTXFSIZ_PTXSA((STM32_OTG_FS_RXFIFO_SIZE / 4) + (STM32_OTG_FS_NPTXFIFO_SIZE / 4)) | HPTXFSIZ_PTXFD(STM32_OTG_FS_PTXFIFO_SIZE / 4);
}
#endif
#if STM32_USBH_USE_OTG2
#if STM32_USBH_USE_OTG1
#if STM32_USBH_USE_OTG_HS
#if STM32_USBH_USE_OTG_FS
if (&USBHD2 == host)
#endif
{
otg->GRXFSIZ = GRXFSIZ_RXFD(STM32_OTG2_RXFIFO_SIZE / 4);
otg->HNPTXFSIZ = HPTXFSIZ_PTXSA(STM32_OTG2_RXFIFO_SIZE / 4) | HPTXFSIZ_PTXFD(STM32_OTG2_NPTXFIFO_SIZE / 4);
otg->HPTXFSIZ = HPTXFSIZ_PTXSA((STM32_OTG2_RXFIFO_SIZE / 4) + (STM32_OTG2_NPTXFIFO_SIZE / 4)) | HPTXFSIZ_PTXFD(STM32_OTG2_PTXFIFO_SIZE / 4);
otg->GRXFSIZ = GRXFSIZ_RXFD(STM32_OTG_HS_RXFIFO_SIZE / 4);
otg->HNPTXFSIZ = HPTXFSIZ_PTXSA(STM32_OTG_HS_RXFIFO_SIZE / 4) | HPTXFSIZ_PTXFD(STM32_OTG_HS_NPTXFIFO_SIZE / 4);
otg->HPTXFSIZ = HPTXFSIZ_PTXSA((STM32_OTG_HS_RXFIFO_SIZE / 4) + (STM32_OTG_HS_NPTXFIFO_SIZE / 4)) | HPTXFSIZ_PTXFD(STM32_OTG_HS_PTXFIFO_SIZE / 4);
}
#endif
#undef HNPTXFSIZ
@ -1368,8 +1376,8 @@ static void usb_lld_serve_interrupt(USBHDriver *host) {
/* Interrupt handlers. */
/*===========================================================================*/
#if STM32_USBH_USE_OTG1
OSAL_IRQ_HANDLER(STM32_OTG1_HANDLER) {
#if STM32_USBH_USE_OTG_FS
OSAL_IRQ_HANDLER(STM32_OTG_FS_HANDLER) {
OSAL_IRQ_PROLOGUE();
osalSysLockFromISR();
usb_lld_serve_interrupt(&USBHD1);
@ -1378,8 +1386,8 @@ OSAL_IRQ_HANDLER(STM32_OTG1_HANDLER) {
}
#endif
#if STM32_USBH_USE_OTG2
OSAL_IRQ_HANDLER(STM32_OTG2_HANDLER) {
#if STM32_USBH_USE_OTG_HS
OSAL_IRQ_HANDLER(STM32_OTG_HS_HANDLER) {
OSAL_IRQ_PROLOGUE();
osalSysLockFromISR();
usb_lld_serve_interrupt(&USBHD2);
@ -1438,23 +1446,23 @@ static void _init(USBHDriver *host) {
usbhObjectInit(host);
#if STM32_USBH_USE_OTG1
#if STM32_USBH_USE_OTG2
#if STM32_USBH_USE_OTG_FS
#if STM32_USBH_USE_OTG_HS
if (&USBHD1 == host)
#endif
{
host->otg = OTG_FS;
host->channels_number = STM32_OTG1_CHANNELS_NUMBER;
host->channels_number = STM32_OTG_FS_CHANNELS_NUMBER;
}
#endif
#if STM32_USBH_USE_OTG2
#if STM32_USBH_USE_OTG1
#if STM32_USBH_USE_OTG_HS
#if STM32_USBH_USE_OTG_FS
if (&USBHD2 == host)
#endif
{
host->otg = OTG_HS;
host->channels_number = STM32_OTG2_CHANNELS_NUMBER;
host->channels_number = STM32_OTG_HS_CHANNELS_NUMBER;
}
#endif
INIT_LIST_HEAD(&host->ch_free[0]);
@ -1476,10 +1484,10 @@ static void _init(USBHDriver *host) {
}
void usbh_lld_init(void) {
#if STM32_USBH_USE_OTG1
#if STM32_USBH_USE_OTG_FS
_init(&USBHD1);
#endif
#if STM32_USBH_USE_OTG2
#if STM32_USBH_USE_OTG_HS
_init(&USBHD2);
#endif
}
@ -1488,36 +1496,36 @@ static void _usbh_start(USBHDriver *host) {
stm32_otg_t *const otgp = host->otg;
/* Clock activation.*/
#if STM32_USBH_USE_OTG1
#if STM32_USBH_USE_OTG2
#if STM32_USBH_USE_OTG_FS
#if STM32_USBH_USE_OTG_HS
if (&USBHD1 == host)
#endif
{
/* OTG FS clock enable and reset.*/
rccEnableUSB1(FALSE);
rccResetUSB1();
rccEnableOTG_FS(FALSE);
rccResetOTG_FS();
otgp->GINTMSK = 0;
/* Enables IRQ vector.*/
nvicEnableVector(STM32_OTG1_NUMBER, STM32_USB_OTG1_IRQ_PRIORITY);
nvicEnableVector(STM32_OTG_FS_NUMBER, STM32_USB_OTG_FS_IRQ_PRIORITY);
}
#endif
#if STM32_USBH_USE_OTG2
#if STM32_USBH_USE_OTG1
#if STM32_USBH_USE_OTG_HS
#if STM32_USBH_USE_OTG_FS
if (&USBHD2 == host)
#endif
{
/* OTG HS clock enable and reset.*/
rccEnableUSB2(FALSE); // Disable HS clock when cpu is in sleep mode
rccEnableOTG_HS(FALSE); // Disable HS clock when cpu is in sleep mode
rccDisableOTG_HSULPI();
rccResetUSB2();
rccResetOTG_HS();
otgp->GINTMSK = 0;
/* Enables IRQ vector.*/
nvicEnableVector(STM32_OTG2_NUMBER, STM32_USB_OTG2_IRQ_PRIORITY);
nvicEnableVector(STM32_OTG_HS_NUMBER, STM32_USB_OTG_HS_IRQ_PRIORITY);
}
#endif

6
os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.h
View File

@ -67,7 +67,7 @@ typedef struct stm32_hc_management {
bool check_ls_activity; \
/* channels */ \
uint8_t channels_number; \
stm32_hc_management_t channels[STM32_OTG2_CHANNELS_NUMBER]; \
stm32_hc_management_t channels[STM32_OTG_HS_CHANNELS_NUMBER]; \
struct list_head ch_free[2]; \
/* Enpoints being processed */ \
struct list_head ep_active_lists[4]; \
@ -153,11 +153,11 @@ uint8_t usbh_lld_roothub_get_statuschange_bitmap(USBHDriver *usbh);
#endif
#if STM32_USBH_USE_OTG1
#if STM32_USBH_USE_OTG_FS
extern USBHDriver USBHD1;
#endif
#if STM32_USBH_USE_OTG2
#if STM32_USBH_USE_OTG_HS
extern USBHDriver USBHD2;
#endif

20
testhal/STM32/STM32F0xx/COMP/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F0xx/crc/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F0xx/onewire/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F0xx/qei/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F1xx/onewire/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F1xx/qei/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F3xx/COMP/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F3xx/EEProm/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h
View File

@ -99,18 +99,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F3xx/TIMCAP/mcuconf_community.h
View File

@ -88,18 +88,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F4xx/EICU/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h
View File

@ -87,18 +87,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h
View File

@ -90,18 +90,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf_community.h
View File

@ -90,18 +90,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

12
testhal/STM32/STM32F4xx/USB_HOST/main.c
View File

@ -911,12 +911,12 @@ int main(void) {
palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7));
palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7));
#if STM32_USBH_USE_OTG1
#if STM32_USBH_USE_OTG_FS
//VBUS - configured in board.h
//USB_FS - configured in board.h
#endif
#if STM32_USBH_USE_OTG2
#if STM32_USBH_USE_OTG_HS
#error "TODO: Initialize USB_HS pads"
#endif
@ -945,20 +945,20 @@ int main(void) {
chThdSleepMilliseconds(100);
//start
#if STM32_USBH_USE_OTG1
#if STM32_USBH_USE_OTG_FS
usbhStart(&USBHD1);
_usbh_dbgf(&USBHD1, "Started");
#endif
#if STM32_USBH_USE_OTG2
#if STM32_USBH_USE_OTG_HS
usbhStart(&USBHD2);
_usbh_dbgf(&USBHD2, "Started");
#endif
for(;;) {
#if STM32_USBH_USE_OTG1
#if STM32_USBH_USE_OTG_FS
usbhMainLoop(&USBHD1);
#endif
#if STM32_USBH_USE_OTG2
#if STM32_USBH_USE_OTG_HS
usbhMainLoop(&USBHD2);
#endif
chThdSleepMilliseconds(100);

20
testhal/STM32/STM32F4xx/USB_HOST/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F4xx/USB_MSD/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F4xx/onewire/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32F7xx/USB_MSD/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32H7xx/USB_MSD/mcuconf_community.h
View File

@ -89,18 +89,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
testhal/STM32/STM32L0xx/COMP/mcuconf_community.h
View File

@ -87,18 +87,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4

20
tools/templates/mcuconf_community.h
View File

@ -99,18 +99,18 @@
/*
* USBH driver system settings.
*/
#define STM32_OTG1_CHANNELS_NUMBER 8
#define STM32_OTG2_CHANNELS_NUMBER 12
#define STM32_OTG_FS_CHANNELS_NUMBER 8
#define STM32_OTG_HS_CHANNELS_NUMBER 12
#define STM32_USBH_USE_OTG1 1
#define STM32_OTG1_RXFIFO_SIZE 1024
#define STM32_OTG1_PTXFIFO_SIZE 128
#define STM32_OTG1_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG_FS 1
#define STM32_OTG_FS_RXFIFO_SIZE 1024
#define STM32_OTG_FS_PTXFIFO_SIZE 128
#define STM32_OTG_FS_NPTXFIFO_SIZE 128
#define STM32_USBH_USE_OTG2 0
#define STM32_OTG2_RXFIFO_SIZE 2048
#define STM32_OTG2_PTXFIFO_SIZE 1024
#define STM32_OTG2_NPTXFIFO_SIZE 1024
#define STM32_USBH_USE_OTG_HS 0
#define STM32_OTG_HS_RXFIFO_SIZE 2048
#define STM32_OTG_HS_PTXFIFO_SIZE 1024
#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
#define STM32_USBH_MIN_QSPACE 4
#define STM32_USBH_CHANNELS_NP 4