Attempting to fix IRQ priorities in mcuconf.h again
This commit is contained in:
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56b7db2d57
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969f0d1996
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@ -87,17 +87,9 @@
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_SDMMC1_PRIORITY 9
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#define STM32_IRQ_SDMMC2_PRIORITY 9
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#define STM32_IRQ_TIM1_UP_PRIORITY 7
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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@ -109,9 +101,6 @@
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#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
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#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
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#define STM32_IRQ_TIM8_CC_PRIORITY 7
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#define STM32_IRQ_TIM15_PRIORITY 7
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#define STM32_IRQ_TIM16_PRIORITY 7
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#define STM32_IRQ_TIM17_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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@ -86,17 +86,9 @@
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_SDMMC1_PRIORITY 9
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#define STM32_IRQ_SDMMC2_PRIORITY 9
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#define STM32_IRQ_TIM1_UP_PRIORITY 7
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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@ -108,9 +100,6 @@
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#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
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#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
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#define STM32_IRQ_TIM8_CC_PRIORITY 7
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#define STM32_IRQ_TIM15_PRIORITY 7
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#define STM32_IRQ_TIM16_PRIORITY 7
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#define STM32_IRQ_TIM17_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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@ -83,17 +83,9 @@
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_SDMMC1_PRIORITY 9
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#define STM32_IRQ_SDMMC2_PRIORITY 9
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#define STM32_IRQ_TIM1_UP_PRIORITY 7
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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@ -105,9 +97,6 @@
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#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
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#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
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#define STM32_IRQ_TIM8_CC_PRIORITY 7
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#define STM32_IRQ_TIM15_PRIORITY 7
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#define STM32_IRQ_TIM16_PRIORITY 7
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#define STM32_IRQ_TIM17_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_SDMMC1_PRIORITY 9
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#define STM32_IRQ_SDMMC2_PRIORITY 9
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#define STM32_IRQ_TIM1_UP_PRIORITY 7
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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@ -105,9 +97,6 @@
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#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
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#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
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#define STM32_IRQ_TIM8_CC_PRIORITY 7
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#define STM32_IRQ_TIM15_PRIORITY 7
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#define STM32_IRQ_TIM16_PRIORITY 7
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#define STM32_IRQ_TIM17_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_SDMMC1_PRIORITY 9
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#define STM32_IRQ_SDMMC2_PRIORITY 9
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#define STM32_IRQ_TIM1_UP_PRIORITY 7
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
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#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
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#define STM32_IRQ_TIM8_CC_PRIORITY 7
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#define STM32_IRQ_TIM15_PRIORITY 7
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#define STM32_IRQ_TIM16_PRIORITY 7
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#define STM32_IRQ_TIM17_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_SDMMC1_PRIORITY 9
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#define STM32_IRQ_SDMMC2_PRIORITY 9
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#define STM32_IRQ_TIM1_UP_PRIORITY 7
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
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#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
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#define STM32_IRQ_TIM8_CC_PRIORITY 7
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#define STM32_IRQ_TIM15_PRIORITY 7
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#define STM32_IRQ_TIM16_PRIORITY 7
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#define STM32_IRQ_TIM17_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_SDMMC1_PRIORITY 9
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#define STM32_IRQ_SDMMC2_PRIORITY 9
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#define STM32_IRQ_TIM1_UP_PRIORITY 7
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
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#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
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#define STM32_IRQ_TIM8_CC_PRIORITY 7
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#define STM32_IRQ_TIM15_PRIORITY 7
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#define STM32_IRQ_TIM16_PRIORITY 7
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#define STM32_IRQ_TIM17_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_SDMMC1_PRIORITY 9
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#define STM32_IRQ_SDMMC2_PRIORITY 9
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#define STM32_IRQ_TIM1_UP_PRIORITY 7
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
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#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
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#define STM32_IRQ_TIM8_CC_PRIORITY 7
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#define STM32_IRQ_TIM15_PRIORITY 7
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#define STM32_IRQ_TIM16_PRIORITY 7
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#define STM32_IRQ_TIM17_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_SDMMC1_PRIORITY 9
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#define STM32_IRQ_SDMMC2_PRIORITY 9
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#define STM32_IRQ_TIM1_UP_PRIORITY 7
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
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#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
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#define STM32_IRQ_TIM8_CC_PRIORITY 7
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#define STM32_IRQ_TIM15_PRIORITY 7
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#define STM32_IRQ_TIM16_PRIORITY 7
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#define STM32_IRQ_TIM17_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_SDMMC1_PRIORITY 9
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#define STM32_IRQ_SDMMC2_PRIORITY 9
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#define STM32_IRQ_TIM1_UP_PRIORITY 7
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
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#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
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#define STM32_IRQ_TIM8_CC_PRIORITY 7
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#define STM32_IRQ_TIM15_PRIORITY 7
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#define STM32_IRQ_TIM16_PRIORITY 7
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#define STM32_IRQ_TIM17_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_SDMMC1_PRIORITY 9
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#define STM32_IRQ_SDMMC2_PRIORITY 9
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#define STM32_IRQ_TIM1_UP_PRIORITY 7
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
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#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
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#define STM32_IRQ_TIM8_CC_PRIORITY 7
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#define STM32_IRQ_TIM15_PRIORITY 7
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#define STM32_IRQ_TIM16_PRIORITY 7
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#define STM32_IRQ_TIM17_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_SDMMC1_PRIORITY 9
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#define STM32_IRQ_SDMMC2_PRIORITY 9
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#define STM32_IRQ_TIM1_UP_PRIORITY 7
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
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#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
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#define STM32_IRQ_TIM8_CC_PRIORITY 7
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#define STM32_IRQ_TIM15_PRIORITY 7
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#define STM32_IRQ_TIM16_PRIORITY 7
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#define STM32_IRQ_TIM17_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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