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Rename otg -> usbfs

This commit is contained in:
Stefan Kerkmann 2021-03-23 11:57:43 +01:00
parent 3a51ec0bf3
commit 9dace8a9ce
5 changed files with 64 additions and 64 deletions
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22
os/hal/ports/GD/GD32VF103/OTG/gd32_otg.h
View File

@ -26,7 +26,7 @@
#define GD32_USBFS_H
/**
* @brief OTG_FS FIFO memory size in words.
* @brief USBFS FIFO memory size in words.
*/
#define GD32_USBFS_FIFO_MEM_SIZE 320
@ -45,7 +45,7 @@ typedef struct {
volatile uint32_t resvd14;
volatile uint32_t resvd18;
volatile uint32_t resvd1c;
} gd32_otg_host_chn_t;
} gd32_usbfs_host_chn_t;
/**
* @brief Device input endpoint registers group.
@ -63,7 +63,7 @@ typedef struct {
volatile uint32_t DTXFSTS; /**< @brief Device IN endpoint transmit FIFO
status register. */
volatile uint32_t resvd1C;
} gd32_otg_in_ep_t;
} gd32_usbfs_in_ep_t;
/**
* @brief Device output endpoint registers group.
@ -80,7 +80,7 @@ typedef struct {
volatile uint32_t resvd14;
volatile uint32_t resvd18;
volatile uint32_t resvd1C;
} gd32_otg_out_ep_t;
} gd32_usbfs_out_ep_t;
/**
* @brief USB registers memory map.
@ -127,7 +127,7 @@ typedef struct {
volatile uint32_t HPRT; /**< @brief Host port control and status
register. */
volatile uint32_t resvd444[47];
gd32_otg_host_chn_t hc[16]; /**< @brief Host channels array. */
gd32_usbfs_host_chn_t hc[16]; /**< @brief Host channels array. */
volatile uint32_t resvd700[64];
volatile uint32_t DCFG; /**< @brief Device configuration register. */
volatile uint32_t DCTL; /**< @brief Device control register. */
@ -155,14 +155,14 @@ typedef struct {
volatile uint32_t resvd840[16];
volatile uint32_t resvd880[16];
volatile uint32_t resvd8C0[16];
gd32_otg_in_ep_t ie[16]; /**< @brief Input endpoints. */
gd32_otg_out_ep_t oe[16]; /**< @brief Output endpoints. */
gd32_usbfs_in_ep_t ie[16]; /**< @brief Input endpoints. */
gd32_usbfs_out_ep_t oe[16]; /**< @brief Output endpoints. */
volatile uint32_t resvdD00[64];
volatile uint32_t PCGCCTL; /**< @brief Power and clock gating control
register. */
volatile uint32_t resvdE04[127];
volatile uint32_t FIFO[16][1024];
} gd32_otg_t;
} gd32_usbfs_t;
/**
* @name GOTGCS register bit definitions
@ -892,12 +892,12 @@ typedef struct {
#define PCGCCTL_STPPCLK (1U<<0) /**< Stop PCLK. */
/** @} */
#define OTG_FS_ADDR 0x50000000
#define USBFS_ADDR 0x50000000
/**
* @brief Accesses to the OTG_FS registers block.
* @brief Accesses to the USBFS registers block.
*/
#define OTG_FS ((gd32_otg_t *)OTG_FS_ADDR)
#define USBFS ((gd32_usbfs_t *)USBFS_ADDR)
#endif /* GD32_USBFS_H */

64
os/hal/ports/GD/GD32VF103/OTG/hal_usb_lld.c
View File

@ -39,7 +39,7 @@
#define EP0_MAX_OUTSIZE 64
#if GD32_USBFS_STEPPING == 1
#if defined(BOARD_OTG_NOVBUSSENS)
#if defined(BOARD_USBFS_NOVBUSSENS)
#define GCCFG_INIT_VALUE (GCCFG_NOVBUSSENS | GCCFG_VBUSASEN | \
GCCFG_VBUSBSEN | GCCFG_PWRDWN)
#else
@ -48,7 +48,7 @@
#endif
#elif GD32_USBFS_STEPPING == 2
#if defined(BOARD_OTG_NOVBUSSENS)
#if defined(BOARD_USBFS_NOVBUSSENS)
#define GCCFG_INIT_VALUE GCCFG_PWRDWN
#else
#define GCCFG_INIT_VALUE (GCCFG_VBDEN | GCCFG_PWRDWN)
@ -60,7 +60,7 @@
/* Driver exported variables. */
/*===========================================================================*/
/** @brief OTG_FS driver identifier.*/
/** @brief USBFS driver identifier.*/
#if GD32_USB_USE_USBFS || defined(__DOXYGEN__)
USBDriver USBD1;
#endif
@ -107,7 +107,7 @@ static const USBEndpointConfig ep0config = {
};
#if GD32_USB_USE_USBFS
static const gd32_otg_params_t fsparams = {
static const gd32_usbfs_params_t fsparams = {
GD32_USB_USBFS_RX_FIFO_SIZE / 4,
GD32_USBFS_FIFO_MEM_SIZE,
GD32_USBFS_ENDPOINTS
@ -119,7 +119,7 @@ static const gd32_otg_params_t fsparams = {
/*===========================================================================*/
static void otg_core_reset(USBDriver *usbp) {
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
/* Wait AHB idle condition.*/
while ((otgp->GRSTCTL & GRSTCTL_AHBIDL) == 0)
@ -139,7 +139,7 @@ static void otg_core_reset(USBDriver *usbp) {
}
static void otg_disable_ep(USBDriver *usbp) {
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
unsigned i;
for (i = 0; i <= usbp->otgparams->num_endpoints; i++) {
@ -159,7 +159,7 @@ static void otg_disable_ep(USBDriver *usbp) {
}
static void otg_rxfifo_flush(USBDriver *usbp) {
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
otgp->GRSTCTL = GRSTCTL_RXFFLSH;
while ((otgp->GRSTCTL & GRSTCTL_RXFFLSH) != 0)
@ -169,7 +169,7 @@ static void otg_rxfifo_flush(USBDriver *usbp) {
}
static void otg_txfifo_flush(USBDriver *usbp, uint32_t fifo) {
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
otgp->GRSTCTL = GRSTCTL_TXFNUM(fifo) | GRSTCTL_TXFFLSH;
while ((otgp->GRSTCTL & GRSTCTL_TXFFLSH) != 0)
@ -204,7 +204,7 @@ static uint32_t otg_ram_alloc(USBDriver *usbp, size_t size) {
next = usbp->pmnext;
usbp->pmnext += size;
osalDbgAssert(usbp->pmnext <= usbp->otgparams->otg_ram_size,
"OTG FIFO memory overflow");
"USBFS FIFO memory overflow");
return next;
}
@ -337,9 +337,9 @@ static bool otg_txfifo_handler(USBDriver *usbp, usbep_t ep) {
return false;
// TODO Enable again or keep brute force?
/*#if GD32_USB_OTGFIFO_FILL_BASEPRI
/*#if GD32_USB_USBFSFIFO_FILL_BASEPRI
uint8_t threshold_old = eclic_get_mth();
eclic_set_mth(GD32_USB_OTGFIFO_FILL_BASEPRI);
eclic_set_mth(GD32_USB_USBFSFIFO_FILL_BASEPRI);
#endif*/
osalSysLockFromISR();
otg_fifo_write_from_buffer(usbp->otg->FIFO[ep],
@ -348,7 +348,7 @@ static bool otg_txfifo_handler(USBDriver *usbp, usbep_t ep) {
usbp->epc[ep]->in_state->txbuf += n;
usbp->epc[ep]->in_state->txcnt += n;
osalSysUnlockFromISR();
/*#if GD32_USB_OTGFIFO_FILL_BASEPRI
/*#if GD32_USB_USBFSFIFO_FILL_BASEPRI
eclic_set_mth(threshold_old);
#endif*/
}
@ -363,7 +363,7 @@ static bool otg_txfifo_handler(USBDriver *usbp, usbep_t ep) {
* @notapi
*/
static void otg_epin_handler(USBDriver *usbp, usbep_t ep) {
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
uint32_t epint = otgp->ie[ep].DIEPINT;
otgp->ie[ep].DIEPINT = epint;
@ -406,7 +406,7 @@ static void otg_epin_handler(USBDriver *usbp, usbep_t ep) {
* @notapi
*/
static void otg_epout_handler(USBDriver *usbp, usbep_t ep) {
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
uint32_t epint = otgp->oe[ep].DOEPINT;
/* Resets all EP IRQ sources.*/
@ -464,7 +464,7 @@ static void otg_epout_handler(USBDriver *usbp, usbep_t ep) {
*/
static void otg_isoc_in_failed_handler(USBDriver *usbp) {
usbep_t ep;
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
for (ep = 0; ep <= usbp->otgparams->num_endpoints; ep++) {
if (((otgp->ie[ep].DIEPCTL & DIEPCTL_EPTYP_MASK) == DIEPCTL_EPTYP_ISO) &&
@ -496,7 +496,7 @@ static void otg_isoc_in_failed_handler(USBDriver *usbp) {
*/
static void otg_isoc_out_failed_handler(USBDriver *usbp) {
usbep_t ep;
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
for (ep = 0; ep <= usbp->otgparams->num_endpoints; ep++) {
if (((otgp->oe[ep].DOEPCTL & DOEPCTL_EPTYP_MASK) == DOEPCTL_EPTYP_ISO) &&
@ -514,14 +514,14 @@ static void otg_isoc_out_failed_handler(USBDriver *usbp) {
}
/**
* @brief OTG shared ISR.
* @brief USBFS shared ISR.
*
* @param[in] usbp pointer to the @p USBDriver object
*
* @notapi
*/
static void usb_lld_serve_interrupt(USBDriver *usbp) {
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
uint32_t sts, src;
sts = otgp->GINTF;
@ -652,13 +652,13 @@ void usb_lld_init(void) {
/* Driver initialization.*/
usbObjectInit(&USBD1);
USBD1.otg = OTG_FS;
USBD1.otg = USBFS;
USBD1.otgparams = &fsparams;
}
/**
* @brief Configures and activates the USB peripheral.
* @note Starting the OTG cell can be a slow operation carried out with
* @note Starting the USBFS cell can be a slow operation carried out with
* interrupts disabled, perform it before starting time-critical
* operations.
*
@ -667,28 +667,28 @@ void usb_lld_init(void) {
* @notapi
*/
void usb_lld_start(USBDriver *usbp) {
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
if (usbp->state == USB_STOP) {
/* Clock activation.*/
if (&USBD1 == usbp) {
/* OTG FS clock enable and reset.*/
rccEnableOTG_FS(true);
rccResetOTG_FS();
/* USBFS clock enable and reset.*/
rccEnableUSBFS(true);
rccResetUSBFS();
/* Enables IRQ vector.*/
eclicEnableVector(GD32_USBFS_NUMBER, GD32_USB_USBFS_IRQ_PRIORITY, GD32_USB_USBFS_IRQ_TRIGGER);
/* - Forced device mode.
/* - Forced device mode.
- USB turn-around time = TRDT_VALUE_FS.
- Full Speed 1.1 PHY.*/
otgp->GUSBCS = GUSBCS_FDMOD | GUSBCS_TRDT(TRDT_VALUE_FS) |
GUSBCS_PHYSEL;
GUSBCS_PHYSEL;
/* 48MHz 1.1 PHY.*/
otgp->DCFG = 0x02200000 | DCFG_DSPD_FS11;
}
}
/* PHY enabled.*/
otgp->PCGCCTL = 0;
@ -737,7 +737,7 @@ void usb_lld_start(USBDriver *usbp) {
* @notapi
*/
void usb_lld_stop(USBDriver *usbp) {
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
/* If in ready state then disables the USB clock.*/
if (usbp->state != USB_STOP) {
@ -752,7 +752,7 @@ void usb_lld_stop(USBDriver *usbp) {
if (&USBD1 == usbp) {
eclicDisableVector(GD32_USBFS_NUMBER);
rccDisableOTG_FS();
rccDisableUSBFS();
}
}
}
@ -766,7 +766,7 @@ void usb_lld_stop(USBDriver *usbp) {
*/
void usb_lld_reset(USBDriver *usbp) {
unsigned i;
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
/* Flush the Tx FIFO.*/
otg_txfifo_flush(usbp, 0);
@ -819,7 +819,7 @@ void usb_lld_reset(USBDriver *usbp) {
* @notapi
*/
void usb_lld_set_address(USBDriver *usbp) {
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
otgp->DCFG = (otgp->DCFG & ~DCFG_DAD_MASK) | DCFG_DAD(usbp->address);
}
@ -834,7 +834,7 @@ void usb_lld_set_address(USBDriver *usbp) {
*/
void usb_lld_init_endpoint(USBDriver *usbp, usbep_t ep) {
uint32_t ctl, fsize;
gd32_otg_t *otgp = usbp->otg;
gd32_usbfs_t *otgp = usbp->otg;
/* IN and OUT common parameters.*/
switch (usbp->epc[ep]->ep_mode & USB_EP_MODE_TYPE) {

16
os/hal/ports/GD/GD32VF103/OTG/hal_usb_lld.h
View File

@ -54,7 +54,7 @@
/**
* @brief USBFS driver enable switch.
* @details If set to @p TRUE the support for OTG_FS is included.
* @details If set to @p TRUE the support for USBFS is included.
* @note The default is @p FALSE
*/
#if !defined(GD32_USB_USE_USBFS) || defined(__DOXYGEN__)
@ -80,7 +80,7 @@
* @brief Exception priority level during TXFIFOs operations.
* @note Because an undocumented silicon behavior the operation of
* copying a packet into a TXFIFO must not be interrupted by
* any other operation on the OTG peripheral.
* any other operation on the USBFS peripheral.
* This parameter represents the priority mask during copy
* operations. The default value only allows to call USB
* functions from callbacks invoked from USB ISR handlers.
@ -91,8 +91,8 @@
* functions is only safe from thread level or from USB
* callbacks.
*/
#if !defined(GD32_USB_OTGFIFO_FILL_BASEPRI) || defined(__DOXYGEN__)
#define GD32_USB_OTGFIFO_FILL_BASEPRI 0
#if !defined(GD32_USB_USBFSFIFO_FILL_BASEPRI) || defined(__DOXYGEN__)
#define GD32_USB_USBFSFIFO_FILL_BASEPRI 0
#endif
/**
@ -175,7 +175,7 @@ typedef struct {
uint32_t rx_fifo_size;
uint32_t otg_ram_size;
uint32_t num_endpoints;
} gd32_otg_params_t;
} gd32_usbfs_params_t;
/**
* @brief Type of an IN endpoint state structure.
@ -408,13 +408,13 @@ struct USBDriver {
#endif
/* End of the mandatory fields.*/
/**
* @brief Pointer to the OTG peripheral associated to this driver.
* @brief Pointer to the USBFS peripheral associated to this driver.
*/
gd32_otg_t *otg;
gd32_usbfs_t *otg;
/**
* @brief Peripheral-specific parameters.
*/
const gd32_otg_params_t *otgparams;
const gd32_usbfs_params_t *otgparams;
/**
* @brief Pointer to the next address in the packet memory.
*/

12
os/hal/ports/GD/GD32VF103/gd32_rcc.h
View File

@ -495,27 +495,27 @@
* @{
*/
/**
* @brief Enables the OTG_FS peripheral clock.
* @brief Enables the USBFS peripheral clock.
*
* @param[in] lp low power enable flag
*
* @api
*/
#define rccEnableOTG_FS(lp) rccEnableAHB(RCC_AHBENR_OTGFSEN, lp)
#define rccEnableUSBFS(lp) rccEnableAHB(RCC_AHBENR_OTGFSEN, lp)
/**
* @brief Disables the OTG_FS peripheral clock.
* @brief Disables the USBFS peripheral clock.
*
* @api
*/
#define rccDisableOTG_FS() rccDisableAHB(RCC_AHBENR_OTGFSEN)
#define rccDisableUSBFS() rccDisableAHB(RCC_AHBENR_OTGFSEN)
/**
* @brief Resets the OTG_FS peripheral.
* @brief Resets the USBFS peripheral.
*
* @api
*/
#define rccResetOTG_FS() rccResetAHB(RCC_AHBRSTR_OTGFSRST)
#define rccResetUSBFS() rccResetAHB(RCC_AHBRSTR_OTGFSRST)
/** @} */
/**

14
os/hal/ports/GD/GD32VF103/stm32f105xc.h
View File

@ -762,7 +762,7 @@ typedef struct
/*!< USB registers base address */
#define USB_OTG_FS_PERIPH_BASE 0x50000000U
#define USB_USBFS_PERIPH_BASE 0x50000000U
#define USB_OTG_GLOBAL_BASE 0x00000000U
#define USB_OTG_DEVICE_BASE 0x00000800U
@ -842,7 +842,7 @@ typedef struct
#define OB ((OB_TypeDef *)OB_BASE)
#define DBGMCU ((DBGMCU_TypeDef *)DBGMCU_BASE)
#define USB_OTG_FS ((USB_OTG_GlobalTypeDef *)USB_OTG_FS_PERIPH_BASE)
#define USB_USBFS ((USB_OTG_GlobalTypeDef *)USB_USBFS_PERIPH_BASE)
/**
* @}
@ -14211,7 +14211,7 @@ typedef struct
/****************************** USB Instances ********************************/
#define IS_USB_ALL_INSTANCE(INSTANCE) ((INSTANCE) == USB_OTG_FS)
#define IS_USB_ALL_INSTANCE(INSTANCE) ((INSTANCE) == USB_USBFS)
#define RCC_HSE_MIN 3000000U
@ -14237,8 +14237,8 @@ typedef struct
#define USB_HP_CAN1_TX_IRQn CAN1_TX_IRQn
#define USB_HP_IRQn CAN1_TX_IRQn
#define DMA1_Channel3_5_IRQn DMA1_Channel3_IRQn
#define USBWakeUp_IRQn OTG_FS_WKUP_IRQn
#define CEC_IRQn OTG_FS_WKUP_IRQn
#define USBWakeUp_IRQn USBFS_WKUP_IRQn
#define CEC_IRQn USBFS_WKUP_IRQn
#define TIM1_BRK_TIM9_IRQn TIM1_BRK_IRQn
#define TIM1_BRK_TIM15_IRQn TIM1_BRK_IRQn
#define TIM9_IRQn TIM1_BRK_IRQn
@ -14258,8 +14258,8 @@ typedef struct
#define USB_HP_CAN1_TX_IRQHandler CAN1_TX_IRQHandler
#define USB_HP_IRQHandler CAN1_TX_IRQHandler
#define DMA1_Channel3_5_IRQHandler DMA1_Channel3_IRQHandler
#define USBWakeUp_IRQHandler OTG_FS_WKUP_IRQHandler
#define CEC_IRQHandler OTG_FS_WKUP_IRQHandler
#define USBWakeUp_IRQHandler USBFS_WKUP_IRQHandler
#define CEC_IRQHandler USBFS_WKUP_IRQHandler
#define TIM1_BRK_TIM9_IRQHandler TIM1_BRK_IRQHandler
#define TIM1_BRK_TIM15_IRQHandler TIM1_BRK_IRQHandler
#define TIM9_IRQHandler TIM1_BRK_IRQHandler