demos/RT-TEENSY4_1: enable USB shell / tests in demo
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@ -104,6 +104,10 @@ include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
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include $(CHIBIOS)/test/lib/test.mk
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include $(CHIBIOS)/test/lib/test.mk
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include $(CHIBIOS)/test/rt/rt_test.mk
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include $(CHIBIOS)/test/rt/rt_test.mk
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include $(CHIBIOS)/test/oslib/oslib_test.mk
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include $(CHIBIOS)/test/oslib/oslib_test.mk
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# for printf
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include $(CHIBIOS)/os/hal/lib/streams/streams.mk
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include $(CHIBIOS)/os/various/shell/shell.mk
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# Define linker script file here
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# Define linker script file here
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LDSCRIPT= $(STARTUPLD_CONTRIB)/MIMXRT1062.ld
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LDSCRIPT= $(STARTUPLD_CONTRIB)/MIMXRT1062.ld
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@ -112,7 +116,7 @@ LDSCRIPT= $(STARTUPLD_CONTRIB)/MIMXRT1062.ld
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# setting.
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# setting.
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CSRC = $(ALLCSRC) \
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CSRC = $(ALLCSRC) \
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$(TESTSRC) \
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$(TESTSRC) \
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main.c
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main.c usbcfg.c $(CHIBIOS)/os/various/syscalls.c
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# C++ sources that can be compiled in ARM or THUMB mode depending on the global
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# C++ sources that can be compiled in ARM or THUMB mode depending on the global
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# setting.
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# setting.
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@ -149,7 +149,7 @@
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* @brief Enables the SERIAL over USB subsystem.
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* @brief Enables the SERIAL over USB subsystem.
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*/
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*/
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#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
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#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
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#define HAL_USE_SERIAL_USB FALSE
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#define HAL_USE_SERIAL_USB TRUE
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#endif
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#endif
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/**
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/**
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@ -184,7 +184,7 @@
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* @brief Enables the USB subsystem.
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* @brief Enables the USB subsystem.
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*/
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*/
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#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
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#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
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#define HAL_USE_USB FALSE
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#define HAL_USE_USB TRUE
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#endif
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#endif
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/**
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/**
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@ -19,6 +19,32 @@
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#include "ch_test.h"
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#include "ch_test.h"
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#include "rt_test_root.h"
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#include "rt_test_root.h"
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#include "oslib_test_root.h"
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#include "oslib_test_root.h"
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#include "chprintf.h"
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#include "shell.h"
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#include <string.h>
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#include "usbcfg.h"
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/* This demo can be customized in scope for easier debugging.
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*
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* Define one of the following: */
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/* Run rt and oslib test suite to serial console: */
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//#define DEMO_MODE_TESTS_TO_SERIAL
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/* Provide an interactive shell on serial console.
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* You can run the tests using the test command: */
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//#define DEMO_MODE_SHELL_ON_SERIAL
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/* Provide an interactive shell on serial console over USB.
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* This mode does not require any extra serial hardware: */
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#define DEMO_MODE_SHELL_ON_USB_SERIAL
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/*
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* Serial 1 (LPUART1) corresponds to Pin 24 on the Teensy 4.1, or to the built-in
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* usb-to-serial on the debug probe of the MIMXRT1060-EVK.
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*/
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#define MYSERIAL &SD1
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/*
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/*
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* LED blinker thread.
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* LED blinker thread.
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@ -30,10 +56,42 @@ static THD_FUNCTION(Thread1, arg) {
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chRegSetThreadName("LEDBlinker");
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chRegSetThreadName("LEDBlinker");
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while (true) {
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while (true) {
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palTogglePad(TEENSY_PIN13_IOPORT, TEENSY_PIN13);
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palTogglePad(TEENSY_PIN13_IOPORT, TEENSY_PIN13);
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chThdSleepMilliseconds(500);
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chThdSleepSeconds(1);
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}
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}
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}
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}
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#define SHELL_WA_SIZE THD_WORKING_AREA_SIZE(2048)
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static const ShellCommand commands[] = {{NULL, NULL}};
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static const ShellConfig shell_cfg1 = {
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#ifdef DEMO_MODE_SHELL_ON_USB_SERIAL
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(BaseSequentialStream *)&SDU1,
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#else
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(BaseSequentialStream *)MYSERIAL,
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#endif
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commands
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};
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char buf[1024];
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#include "fsl_lpuart.h"
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void printf_debug(const char *format, ...)
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{
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va_list args;
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va_start(args, format);
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int n = chvsnprintf(buf, sizeof(buf), format, args);
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// Directly write to serial instead of using SD4 BaseSequentialStream, because
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// the latter does not work from within a locked section (e.g. usbStart grabs
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// a lock).
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buf[n] = '\r';
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buf[n+1] = '\n';
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buf[n+2] = '\0';
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LPUART_WriteBlocking(LPUART1, (unsigned char*)buf, n+2);
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va_end(args);
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}
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/*
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/*
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* Application entry point.
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* Application entry point.
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*/
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*/
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@ -50,20 +108,59 @@ int main(void) {
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chSysInit();
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chSysInit();
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/*
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/*
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* Activates serial 1 (UART0) using the driver default configuration.
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* Activates MYSERIAL with 115200 baud.
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*/
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*/
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sdStart(&SD1, NULL);
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const SerialConfig sc = {
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.sc_speed = 115200,
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};
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sdStart(MYSERIAL, &sc);
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chprintf((BaseSequentialStream*)MYSERIAL, "ChibiOS Teensy 4.1 demo\r\n");
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/*
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/*
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* Creates the blinker thread.
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* Creates the blinker thread.
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*/
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*/
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chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
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chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
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test_execute((BaseSequentialStream *)&SD1, &rt_test_suite);
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#if defined(DEMO_MODE_TESTS_TO_SERIAL)
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test_execute((BaseSequentialStream *)&SD1, &oslib_test_suite);
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test_execute((BaseSequentialStream *)MYSERIAL, &rt_test_suite);
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test_execute((BaseSequentialStream *)MYSERIAL, &oslib_test_suite);
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#elif defined(DEMO_MODE_SHELL_ON_SERIAL)
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while (true) {
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while (true) {
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chThdSleepMilliseconds(1000);
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chprintf((BaseSequentialStream*)MYSERIAL, "Starting serial shell\r\n");
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thread_t *shelltp = chThdCreateFromHeap(NULL, SHELL_WA_SIZE, "shell", NORMALPRIO + 1, shellThread, (void *)&shell_cfg1);
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chThdWait(shelltp); /* Waiting termination. */
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}
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}
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#elif defined(DEMO_MODE_SHELL_ON_USB_SERIAL)
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chprintf((BaseSequentialStream*)MYSERIAL, "Starting USB serial\r\n");
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/*
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* Initializes a serial-over-USB CDC driver.
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*/
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sduObjectInit(&SDU1);
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sduStart(&SDU1, &serusbcfg);
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/*
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* Activates the USB driver and then the USB bus pull-up on D+.
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* Note, a delay is inserted in order to not have to disconnect the cable
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* after a reset.
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*/
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usbDisconnectBus(serusbcfg.usbp);
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chThdSleepMilliseconds(1500);
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usbStart(serusbcfg.usbp, &usbcfg);
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usbConnectBus(serusbcfg.usbp);
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while (true) {
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if (SDU1.config->usbp->state == USB_ACTIVE) {
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chprintf((BaseSequentialStream*)MYSERIAL, "Starting serial-over-USB CDC Shell\r\n");
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thread_t *shelltp = chThdCreateFromHeap(NULL, SHELL_WA_SIZE, "shell", NORMALPRIO + 1, shellThread, (void *)&shell_cfg1);
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chThdWait(shelltp); /* Waiting termination. */
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}
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chThdSleepSeconds(1);
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}
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#else
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#error One of DEMO_MODE_TESTS_TO_SERIAL, DEMO_MODE_SHELL_ON_SERIAL or DEMO_MODE_SHELL_ON_USB_SERIAL must be defined
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#endif
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return 0;
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return 0;
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}
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}
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@ -19,73 +19,8 @@
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#define MIMXRT1062_MCUCONF
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#define MIMXRT1062_MCUCONF
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/*
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/* The NXP USB stack uses more stack space than the default 256 byte of thread
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* HAL driver system settings.
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* working area for the test command can fit, so make some more room: */
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*/
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#define SHELL_CMD_TEST_WA_SIZE THD_WORKING_AREA_SIZE(1024)
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/* Select the MCU clocking mode below by enabling the appropriate block. */
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/* PEE mode - 180 MHz system clock driving by 16 MHz xtal */
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#if 1
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#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE
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#define KINETIS_PLLCLK_FREQUENCY 180000000UL
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#define KINETIS_SYSCLK_FREQUENCY KINETIS_PLLCLK_FREQUENCY
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#define KINETIS_BUSCLK_FREQUENCY 60000000UL
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#define KINETIS_FLASHCLK_FREQUENCY 28000000UL
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#define KINETIS_CLKDIV1_OUTDIV1 1 // -> 0
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#define KINETIS_CLKDIV1_OUTDIV2 3 // -> 2
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#define KINETIS_CLKDIV1_OUTDIV4 7 // -> 6
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#endif
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/* PEE mode - 48MHz system clock driven by external crystal. */
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#if 0
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#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE
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#define KINETIS_PLLCLK_FREQUENCY 96000000UL
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#define KINETIS_SYSCLK_FREQUENCY 48000000UL
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#endif
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/* FEI mode (~48MHz) */
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#if 0
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#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEI
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#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
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#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
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#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
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#define KINETIS_CLKDIV1_OUTDIV1 1 /* Divide MCGCLKOUT (~48MHz) by 1 to SYSCLK */
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#define KINETIS_CLKDIV1_OUTDIV2 1 /* Divide by 1 for (~48MHz) peripheral clock */
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#define KINETIS_CLKDIV1_OUTDIV4 2 /* Divide by 2 for (~24MHz) flash clock */
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#define KINETIS_BUSCLK_FREQUENCY KINETIS_SYSCLK_FREQUENCY
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#define KINETIS_FLASHCLK_FREQUENCY KINETIS_SYSCLK_FREQUENCY/2
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#endif /* 0 */
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/* FEE mode - 24 MHz with external 32.768 kHz crystal */
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/* not implemented */
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#if 0
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#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
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#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
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#define KINETIS_MCG_FLL_DRS 0 /* 732x FLL factor */
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#define KINETIS_CLKDIV1_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 24 MHz */
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#define KINETIS_CLKDIV1_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 12 MHz */
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#define KINETIS_SYSCLK_FREQUENCY 23986176UL /* 32.768 kHz*732 (~24 MHz) */
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#define KINETIS_UART0_CLOCK_FREQ (32768 * 732) /* FLL output */
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#define KINETIS_UART0_CLOCK_SRC 1 /* Select FLL clock */
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#define KINETIS_BUSCLK_FREQUENCY (KINETIS_SYSCLK_FREQUENCY / KINETIS_CLKDIV1_OUTDIV4)
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#endif /* 0 */
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/* FEE mode - 48 MHz */
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/* not implemented */
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#if 0
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#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
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#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
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#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
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#define KINETIS_CLKDIV1_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 48 MHz */
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#define KINETIS_CLKDIV1_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 24 MHz */
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#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
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#endif /* 0 */
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/*
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* SERIAL driver system settings.
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*/
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#define KINETIS_SERIAL_USE_UART0 TRUE
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#endif /* _MCUCONF_H_ */
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#endif /* _MCUCONF_H_ */
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